УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ИНФОРМАЦИИ

FIELD: computer engineering; single-record disk units. SUBSTANCE: device designed for re-recording record medium originally meant for single record as well as for checking remaining useful capacity of this medium has control facility for ensuring matching between physical position of file data and logic position and for generating tables of this matching thereby controlling mentioned matching ratio in response to changes in physical position; recording facility; computing facility; comparison facility; output facility. Method describes operation of device. EFFECT: enlarged functional capabilities. 7 cl, 38 dwg ССС с ПЧ сэ РОССИЙСКОЕ АГЕНТСТВО ПО ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (19) ВИ” 2182 722‘ (51) МПК? 13) С2 С 06Е 7/00, 7/06 12) ОПИСАНИЕ ИЗОБРЕТЕНИЯ К ПАТЕНТУ РОССИЙСКОЙ ФЕДЕРАЦИИ (21), (22) Заявка: 97113713109, 31.10.1996 (24) Дата начала действия патента: 31.10.1996 (30) Приоритет: 10.11.1995 УР 7/317417 (43) Дата публикации заявки: 21.06.1999 (46) Дата публикации: 20.05.2002 (56) Ссылки: УР 6-87229 В2, 02.11.1994. КУ 2009538 СЛ, 15.03.1994. у4Р 2-214924 А, 27.08.1990. 4Р 2-19445Ъ А, 01.08.1990. 4$ 4992938 А, 12.02.1991. 4$ 4853849 А, 01.08.1989. КЦ 2029359 СЛ, 20.02.1995. (85) Дата перевода заявки РСТ на национальную фазу: 11.08.1997 (86) Заявка РСТ: УР 96/03194 (31.10.1996) (87) Публикация РСТ: \М/О 97/17652 (15.05.1997) (98) Адрес для переписки: 103735, Москва, ул.Ильинка, 5/2, ООО "Союзпатент", Л.И.Ятровой (71) Заявитель: . СОНИ КОРПОРЕИШН (Р) (72) Изобретатель: ИНОКУТИ Татсуя (+Р), УДАГАВА Осаму (Р), КАНЕКО Ясуйоси (.Р) (73) Патентообладатель: СОНИ КОРПОРЕЙШН (.Р) (74) Патентный поверенный: Ятрова Лариса Ивановна (54) УСТРОЙСТВО И СПОСОБ ОБРАБОТКИ ИНФОРМАЦИИ (57) Изобретение относится к устройствам и способам обработки информации, в которых информация записывается, например, на дисковом носителе записи для однократной записи. Техническим результатом является возможность перезаписывания носителя записи, изначально предназначенного для однократной записи, и ...

Verfahren und Vorrichtung zur Verarbeitung von Ein-/Ausgabeanforderungen von mehreren Host-Rechnern

Festplattencontroller

Datenkompression/-dekompression und Speicherung von komprimierten und nicht komprimierten Daten in einem einzigen Datenspeichervolumen

TARGETVERWALTUNGSVERFAHREN ZUR DATENSICHERUNG ZU EINER GEMEINSAMEN TRANFERSTATION, MULTIMEDIEN-BAUELEMENT

Optimierte Stricherkennung für redundante Speicherplattenanordnung

Speichergerät und Verfahren zu seiner Steuerung

Online-Setzen von Videodateien in Festplatten in einer Serverumgebung

Vefahren und Vorrichtung zur Ein-/Ausgabeanforderungsverarbeitung mit einer Mehrzahl von Kanalbussen

Hintergrund-Plattenoberflächenanalyse durch eine Steuerung für intelligente Speicherplattenanordnung ausgeführt

Elektronisches Datenbibliotheksystem

SPEICHERSYSTEM

Einen Flashspeicher verwendendes Speichergerät

Informationsspeicheranlage

MODULARES EIN-/AUSGABESYSTEM FÜR SUPERRECHNER.

Verfahren und Anordnung zur auf Regeln beruhende Datenübertragung

Netzwerkplattenanordnung.

Datenverarbeitungseinrichtung mit einem Metadatensicherungsmanagement

Um eine Datenverarbeitungseinrichtung umfassend ein Datennetzwerk, einen in das Datennetzwerk integrierten Fileserver mit einem servereigenen Datenspeicher und mit mindestens einem primären Dateisystem, in welchem auf dem Serverdatenspeicher gespeicherte Dateien abgelegt sind, hinsichtlich ihrer Ausfallsicherheit und des Zugriffes auf die Dateien nach einem Ausfall zu verbessern, wird vorgeschlagen, daß die Dateien des primären Dateisystems durch ein primäres hierarchisches Speichermanagement entsprechend einen primären Aktivitätskriterium in mindestens zwei primäre Aktivitätsgruppen mit unterschiedlichem hierarchischem Rang eingeteilt werden, daß das Speichermanagement mindestens die Dateien der primären Aktivitätsgruppe mit niedrigstem Rang in mindestens ein sekundäres Dateisystem auf einen Datenspeicher einer dem Serverdatenspeicher nachgelagerten Datenspeichereinrichtung kopiert und daß das Speichermanagement von den kopierten Dateien der primären Aktivitätsgruppe mit niedrigstem Rang ...

Aufzeichnungsbereichsverwaltungsverfahren und Speichergerät

EINFÜHRUNG VON MASSENSPEICHERVORRICHTUNGSFUNKTIONEN UNTER VERWENDUNG VON WIRTVERARBEITERGEDÄCHTNIS

Interface circuit arrangement for optionally storing data by a magnetic disk storage and/or video recorder

In the circuit arrangement, a disk controller is combined with a video recorder interface. The combination allows conventional disk controller chips to be used for optionally selecting magnetic disk drives and/or video recorders. The interface offers inexpensive solutions for the mass storage of data, mainly in the field of home computers and videotex terminals.

VERFAHREN UND VORRICHTUNG ZUM ZUGANG ZU MAGNETBANDEINRICHTUNGEN IN EINEM RECHNERSYSTEM

Vorrichtung und Verfahren zur Datenaufzeichnung/-wiedergabe

PROCESSING DATA

Data storage

SOLID STATE DISK DRIVE EMULATION

In a system for causing a computer solid state memory to emulate a magnetic disk mounted in a disk drive, firmware in the system BIOS translates disk service requests from software running on the computer into appropriate commands and addresses for removable RAM cards or system ROM. The system permits software written for use with floppy or hard disks to be used with solid state memory devices such as RAM cards or ROM without modification of the software. ...

PROCESSING DATA

Data storage system with device independent file directories

A computer file system 100, having a multiplicity of distinct disk storage devices 108, 110, 112, includes a multiplicity of file directories 152, stored on various disks. Each file directory is used to translate file names into corresponding tag values. For each disk there is a file descriptor table 154 with a file descriptor entry for every file stored on the disk. A single tag directory 156 contains one tag entry for every file stored in the system. The tag directory is used by the file system to find a file by translating a tag value into a pointer to point to the disk on which the file is stored and a pointer indicating the file's file descriptor entry. To move a file from a first disk to a second disk, the file is copied to the second disk, a new file descriptor entry for the copied file is generated in the file descriptor table 154 for the second disk, the copy of the file on the first disk is de-allocated, and the tag entry for the file is updated to point to the second disk and ...

Disc autochanger interface system

A system for interfacing an optical disk autochanger 302 having a robot 314 and a plurality of disk drives 308 to a 102 host includes a master SCSI bus 104, a subordinate SCSI bus 306, a SCSI multiplexer 304 and a move controller 305. The master SCSI bus 104 is connected to the host. The subordinate SCSI 306 bus is connected to the plurality of disk drives 308. The multiplexer 304 is connected between the master SCSI bus and the subordinate SCSI bus. The multiplexer transfers communications between the host and a selected disk drive. The move controller 305 receives jukebox control commands from the host and selects the disk drive based on the jukebox control commands.

Processing data

Method and apparatus for processing data wherein control dependency on a host computer during data recording/ reproduction is lowered through use of an external controller 10 with the aid of a simple program, and an error correction method wherein the error correction capability for burst errors may be improved. Commands from the host computer are held in a register in the controller and interpreted, 12, as microprograms. An error correction processor 13 handles double-encoded interleaved data.

METHOD FOR PROCESSING DATA

Flash solid state disk card

Apparatus and methods for operating a computer storage system

Computer input apparatus

DISK DATA STORAGE SYSTEM

DISK DRIVE CONTROLLER

Dynamic reassignment of logical units in a storage virtualisation subsystem

Disk controller

Storage device control unit and method of controlling the same

Method of and system for controlling tape recorder with computer

A video tape recorder (3) is controlled by a computer (1) and images from both are displayed on a single display (4). This system is such that address data are recorded in a video tape, address data of a start and an end of a desired image portion are stored in the computer, and an operation mode of the video tape recorder is automatically controlled in accordance with the address data recorded in the video tape and the address data stored in the computer, whereby images from both sets are alternately or simultaneously displayed on the single display. ...

Distributed computing

Data communications processing unit with magnetic disk controller

A data communications processing unit includes a terminal processor unit (TPU) which controls the transfer of data words between a plurality of data terminals. A magnetic disk 48 provides storage for data words and program information specifying the sequence of data transfer between the terminal processor unit and the data terminals. A microprocessor-based, disk controller, Fig. 7, responsive to control commands from the terminal processor unit, controls the transfer of data and program words between the terminal processor unit and the magnetic disk 48, in addition to controlling the operation of the disk drive unit 50 and providing data formatting and error checks. ...

Type determination in disk device selector circuits

A system of disk device selector circuits for a disk controller, which is provided for the disk controller to which different types of plural magnetic disk devices are connected via common control signal lines and each of the magnetic disk devices, for selecting one out of the different types of the disk devices by means of a selection controlling circuit provided in the disk controller. Each of the magnetic disk devices is provided with a response signal outputting circuit whereby a response signal indicating that the device has been selected is output when the disk device selected by the selection controlling circuit of the controller is the device itself. The response signal is received by a response signal receiving circuit provided in the controller via a common reply signal line from the selected magnetic device, whereby the controller can recognize the type of the selected disk device and set up the correct data transferring rate between that type of the device and the controller ...

Disk drive size selector circuit

An information processing system having first and second floppy disk drives for permanently storing information, and a floppy disk controller (34) operatively connected to both drives. The controller has a circuit for selecting which drive is to receive information from or transfer information to the controller. The first drive is adaptable for use with 5-1/4 inch (133 mm) diameter disks and the second for use with 8 inch (203 mm) diameter disks. A user can direct the controller to select either drive. ...

MEMORY UTILISATION AND DATA RETRIEVAL

SCATTER-GATHER IN DATA PROCESSING SYSTEM

INTEGRATED FLOPPY DISK DRIVE CONTROLLER

EXTERNAL DATA STORAGE DEVICE AND CONNECTION THEREFOR

Data storage devices

Flash memory system with arbitrary block size

Improvements in systems for data storage and processing machines

... 902,778. Digital electric-calculating apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 28, 1959 [Aug. 29, 1958 (2)], No. 29445/59. Drawings to Specification. Class 106 (1). ). An internally programmed digital data processor has condition checking means associated with the input/output equipment which may produce coded signals (status words) indicating the operating condition of the equipment. A status word may be used to initiate a sub-routine dependent on the condition indicated by the word, e.g. an errorcorrection routine. The machine incorporating the invention is similar to that described in Specification 893,555, operating to two-address instructions, the second address being that of the next instruction. In a status word the second address is replaced by the digits 40, followed by a digit indicating the input/output equipment referred to, and a digit indicating the condition, which may be (for tape) a tape error, correct length record, short or long length record (these ...

Improvements in magnetic recording apparatus

... 857,284. Digital data storage apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Aug. 12, 1957 [Aug. 13, 1956], No. 25346/57. Class 106(1). A data storage device comprises a rotatable member having a plurality of circular magnetic recording tracks thereon, a recording head movable selectively to co-operate with different ones of said tracks, and is characterized in that the beginning of recording of each new item of data occurs at any random position along a track. In the embodiment described each new item of data comprises 60 words which is 2 words less than the capacity of each circular track and its recording is preceded by the erasure of a length of track corresponding to 4 words whereby after an item of data has been recorded its beginning and its end are separated by 2 words of erased track. The beginning and end of each item of data are further distinguished by having special characters recorded therein. As described, a number of magnetic disc data-storage units 37, Fig. 1, ...

A portable data storage device.

A portable data storage device (10)includes a universal serial bus (usb)coupling device (1)and an interface device (2)is coupled to the usb coupling device (1). The portable data storage device (10)also includes a memory control device (3)and a non volatile solid-state memory device (4). The memory control device (3)is coupled betweem the interface device (2)and the memory device (4)to control the flow of data from the memory device (4)to the usb coupling device (1) ...

A portable data storage device

DATA MEDIUM FOR STORING FILES, DEVICE FOR MANAGING SUCH A DATA MEDIUM AND PROCEDURE FOR WORKING ON DATA IN SUCH A DATA MEDIUM

DATENUEBERTRAGUNGSEINRICHTUNG

PORTABLE MULTI-FUNCTION MECHANISM FOR ELECTRONIC PROCESSORS

DATENUEBERTRAGUNGSEINRICHTUNG

RECORDING MEDIUM DEFECT MANAGEMENT

DATA PROCESSING DEVICE, FAKSIMILEGERÄT WITH DATA PROCESSING FUNCTION AND COMPUTING PROGRAM

DATA ITSELF RIDING SYSTEM FOR A EDP MECHANISM

PORTABLE DATA MEMORY DEVICE

MECHANISM TO THE PROTECTION OF DATA.

NON REMOVABLE DISK WITH CONTENTS, WHICH ARE LARGER THAN 528MB, AND PROCEDURE FOR PC

AUFZEICHNUNGDMEDIUM, - EQUIPMENT AND - METHOD FOR THE RECORDING OF DATA ON A RECORDING MEDIUM, AND PLAYBACK UNIT AND - METHOD TO THE RENDITION OF DATA OF A RECORDING MEDIUM

DATA SECURITY ELEMENT FOR A EDP MECHANISM, A DATA SECURITY SYSTEM AND A PROCEDURE FOR THE USE OF THIS SYSTEM

Switching configuration for the controlling of data flow between the central processing unit of a program controlled data-processing system and a number of magnetic plate storages

PROCEDURE AND DEVICE FOR THE ENTRANCE TO MAGNETIC TAPE MECHANISMS IN A COMPUTER SYSTEM

MASS STORAGE ARCHITECTURE WITH FLASH MEMORY

SIGNAL PROCESSING AND - RENDITION

LOAD-COMPENSATORY CONFIGURATION FOR MEMORY ARRANGEMENTS THE REFLECTION AND STRIP USES

USE OF A SDRAM'S AS MEMORY TO THE ERROR CORRECTION AND TRACE BUFFERING IN FRONT END IC'S OF OPTICAL RECORDING OR RENDITION DEVICES

METHOD AND CIRCUIT FOR PROGRAMMABLE ELEMENT SEQUENCE SELECTION

System and method for managing storage resources in a clustered computing environment

Efficient storage of data files received in a non-sequential manner

COMPUTER MEMORY ARRAY CONTROL

EFFICIENT STORAGE OF DATA FILES RECEIVED IN A NON-SEQUENTIAL MANNER

Multibyte random access mass storage/memory system

Intelligent data storage and processing using FPGA devices

DIRECT MEMORY SWAPPING BETWEEN NAND FLASH AND SRAM WITH ERROR CORRECTION CODING

FAST PATH FOR PERFORMING DATA OPERATIONS

An apparatus and method for automatically starting and ending a process in a host device

Data storage system

DISK CONTROLLER BUS INTERFACE

DATA BACKUP AND RESTORATION USING DYNAMIC VIRTUAL STORAGE

Adaptive compression caching for tape recording

MICROPROCESSOR SIGNAL DETECTOR

Multipurpose digital recording method and apparatus and media therefor

Optimizing hard drive performance using benchmarking

AUTOMATED CARTRIDGE SYSTEM

MEMORY ASSIGNMENT

Data storage system that selects performance level and acoustic noise level based on system profile

ARRAYED DISK DRIVE SYSTEM AND METHOD

DISTRIBUTED STORAGE NETWORK

STORAGE ALLOCATION PER APPLICATION

MICROPROCESSOR SIGNAL DETECTOR

SELF-TESTING PERIPHERAL-CONTROLLER SYSTEM

A storage module device - data link processor (200d, FIG. 1) manages data transfers between a main host computer (10) and up to eight disk drive units (D0 - D7, FIG. 1). The data link processor (200d) provides a host access unit (FIG. 2.) to the host computer (10) and connects to a Formatter Unit (FIG. 3) which establishes the protocol for accessing a particular sector of a selected disk drive unit and for transferring data to-from a selected disk drive (D0 - D7) via an Interface Circuit Unit (FIG. 4) which insures that only one particular disk drive is selected at a given time. The data link processor (200d) initiates a self-test operation to verify integrity of the host access unit (FIG. 2) and the Formatter Unit (FIG. 3) before data transfer operations can take place.

DAS DEVICE COMMAND EXECUTION SEQUENCE

IMPROVED DAS DEVICE COMMAND EXECUTION SEQUENCE A method and means are provided to increase the effective data transfer rate between a direct access storage device (DASD) and a central processing unit (CPU) communicating with the DAS device through a channel and a DASD control device. A command issued to the DAS subsystem which requires mechanical motion in the DAS device is stored in the subsystem and the subsystem provides a response to the channel indicating that the command has been carried out, without actually carrying out the command. The channel responds by issuing one or more additional commands in the chain to the subsystem which may be carried out without mechanical motion. When a command is issued to the subsystem which again requires mechanical motion of the device, the control device causes the stored command to be executed essentially simultaneously with the newly received command. This execution of the stored command out of its normal sequence and in parallel with another ...

Computer system, control apparatus, storage system and computer device

The computer system includes a server being configured to manage a first virtual machine to which a first part of a server resource included in the server is allocated and a second virtual machine to which a second part of the server resource is allocated. The computer system also includes a storage apparatus including a storage controller and a plurality of storage devices and being configured to manage a first virtual storage apparatus to which a first storage area on the plurality of storage devices is allocated and a second virtual storage apparatus to which a second storage area on the plurality of storage devices is allocated. The first virtual machine can access to the first virtual storage apparatus but not the second virtual storage apparatus and the second virtual machine can access to the second virtual storage apparatus but not the first virtual storage apparatus.

Transmission control device, memory control device, and plc including the transmission control device

A transmission control device in the present invention includes: a data storage memory in which data are written; a plurality of data copy memories into which the data written in the data storage memory are copied; an unread copy-memory selection unit that selects one of the data copy memories for which reading of data is not performed from among the data copy memories; a memory copy unit that copies the data written in the data storage memory into a data copy memory selected by the unread copy-memory selection unit; a read copy-memory selection unit that selects a data copy memory into which the memory copy unit copies data from among the data copy memories; and a data output unit that reads data from a data copy memory selected by the read copy-memory selection unit and outputs the read data to a transmission unit.

Diagnostic and managing distributed processor system

A network of microcontrollers for monitoring and diagnosing the environmental conditions of a computer is disclosed. The network of microcontrollers provides a management system by which computer users can accurately gauge the health of their computer. The network of microcontrollers provides users the ability to detect system fan speeds, internal temperatures and voltage levels. The invention is designed to not only be resilient to faults, but also allows for the system maintenance, modification, and growth—without downtime. Additionally, the present invention allows users to replace failed components, and add new functionality, such as new network interfaces, disk interface cards and storage, without impacting existing users. One of the primary roles of the present invention is to manage the environment without outside involvement. This self-management allows the system to continue to operate even though components have failed.

DISK ARRAY SYSTEM AND HARD DISK DRIVE EXPANSION METHOD THEREOF

Even if an arbitrary hard disk drive is added, the hard disk drive is operated in a specific operation mode suited for that hard disk drive. 1. A disk array system coupled to a host computer , comprising:a plurality of hard disk drives;an expander device each including a memory and a plurality of ports, each coupled to one of the plurality of hard disk drives; anda disk controller being coupled to the expander device and controlling data transfer between the host computer and the plurality of hard disk drives via the expander device,wherein each of the plurality of hard disk drives stores their own particular parameter information used for the communication between the expander and each of the plurality disk drives,wherein, when the disk controller begins communication between the disk controller and a first disk drive coupled to a first port of the plurality of ports of the expander via the expander, the disk controller is configured to:read a first particular parameter information, which represents a plurality of parameter values being suited for the communication between the expander and the first disk drive regarding an attribute of the first disk drive, in the first disk drive via the expander;specify a first particular parameter value which is suitable for the communication between the expander and the first disk drive based on a location to which the first disk drive mounted to the among the plurality parameter values of the first particular parameter information; andset the particular parameter value on a memory of the first port of the expander and the first disk drive so that the expander and the first disk drive can optimize a status of communication signal between the expander and the first disk drive based on the first particular parameter value.2. A disk array system according to claim 1 ,wherein, when the disk controller begins communication between the disk controller and a second disk drive coupled to a second port of the plurality of ports of the ...

COMPUTING DEVICE AND METHOD FOR ADJUSTING PHYSICAL LINKS OF A SAS EXPANDER OF THE COMPUTING DEVICE

A method to adjust physical links of serial attached small computer system interface (SAS) expanders of a computing device. The SAS expanders include a first SAS expander and one or more second SAS expanders. When data flow of the physical links of the first SAS expander for transmitting data to a second SAS expander is saturated, the method determines whether the first SAS expander has reserved physical links that can be adjusted. If the first SAS expander has reserved physical links that can be adjusted, the method generates a new firmware, and adjusts the adjusted physical link to the second SAS expander by writing the new firmware to the first SAS expander. The method also adjusts the adjusted physical link to the second SAS expander on hardware circuit. 1. A computer-implemented method for adjusting physical links of serial attached small computer system interface (SAS) expanders of a computing device , the SAS expanders comprising a first SAS expander and one or more second SAS expanders , the method comprising:(a) detecting whether data flow of physical links of the first SAS expander for transmitting data to a second SAS expander connected to the first SAS expander is saturated;(b) determining whether the first SAS expander has reserved physical links that can be adjusted when the data flow of the physical links of the first SAS expander for transmitting data to the second SAS expander is saturated;(c) determining a reserved physical link to be adjusted from the reserved physical links, obtaining configuration parameters of the adjusted physical link, and setting address information of the configuration parameters as an address of the second SAS expander when the first SAS expander has reserved physical links that can be adjusted;(d) modifying the configuration parameters of the adjusted physical link, generating a new firmware according to the modified configuration parameters, and adjusting the adjusted physical link to the second SAS expander by writing ...

Bridge circuit

A bridge circuit of an embodiment includes: a command transfer portion which is configured by wired logic into which a host controller capable of sending a command that corresponds to each of a plurality of devices inputs the command, and which is configured to transfer the inputted command to the plurality of devices; a command analysis portion which is configured by wired logic, and which is configured to analyze the command from the host controller; and a response reply portion which is configured by wired logic, and which is capable of reading out a response based on an analysis result of the command analysis portion from a register that holds a response corresponding to the command and sending the response to the host controller.

Method and server for managing redundant arrays of independent disks cards

In a method for managing redundant arrays of independent disks (RAID) cards and a server for executing the method, the server calculates a theoretical percentage of a load of each RAID card according to a number of the RAID cards, and loads an actual percentage of the load of each RAID card through a multi input output (MIO) interface, and detects peripheral component interconnect-express (PCI-E) bandwidth of each RAID card. When the load of each RAID card is unbalanced or the PCI-E bandwidth of the RAID card is saturated, the server transfers the load from a RAID card having a greater actual percentage of the load into a RAID card having a less actual percentage of the load, and transfers the load from a RAID card whose PCI-E bandwidth is saturated into a RAID card whose PCI-E bandwidth is unsaturated according to differential signals through the MIO interface.

STORAGE APPARATUS AND METHOD OF CONTROLLING THE SAME

A storage apparatus includes a communication control processor that is a processor configured to control communications with a host apparatus and plurality of main processors each configured to perform an I/O process on a storage drive according to an I/O request received from the host apparatus The storage apparatus manages data to be stored or that has been stored in the storage drive in accordance with the CKD format. The storage apparatus distributes the I/O process to the plurality of main processors in units of the data fields on basis of the operation rates of the respective main processors information on a C field, a K field, and a D field that are data fields forming a record of data targeted by the I/O process and managed in CKD format, and an I/O load indicator being a load indicator of the I/O process currently running on each of the main processors. 1. A storage apparatus comprising:a communication control processor that is a processor configured to control communications with an external apparatus; anda plurality of main processors each configured to perform an I/O process on a storage drive according to an I/O request received from the external apparatus,wherein the storage apparatusmanages data to be stored or data that has been stored in the storage drive in accordance with CKD format, anddistributes the I/O process to a plurality of the main processors in units of data fields on basis of operation rates of the respective main processors and information on a C field, a K field, and a D field that are data fields forming a record of data targeted by the I/O process and managed in CKD format.2. The storage apparatus according to claim 1 , whereinthe storage apparatus distributes the I/O process to the plurality of main processors on basis of the operation rates, the information on the C field, the K field, and the D field that are the data fields forming the record of data targeted by the I/O process and managed in the CKD format, and an I/O load ...

Interface Circuits Configured to Interface with Multi-Rank Memory

An interface circuit may include a first FIFO circuit and a second FIFO circuit. The first FIFO circuit may generate first output data based on a first sampling signal and a second sampling signal. The second FIFO circuit may generate second output data based on a third sampling signal and a fourth sampling signal. The first FIFO circuit and the second FIFO circuit may be cross-reset. 1. An interface circuit comprising:a first FIFO circuit configured to generate pieces of first parallel data from a first sampling signal in response to a first edge of a first reference signal, generate pieces of second parallel data from a second sampling signal in response to a second edge of the first reference signal, and generate first output data from the pieces of first parallel data and the pieces of second parallel data in response to a first select signal which is generated based on a first division signal generated by dividing the first reference signal; anda second FIFO circuit configured to generate pieces of third parallel data from a third sampling signal in response to a first edge of a second reference signal, generate pieces of fourth parallel data from a fourth sampling signal in response to a second edge of the second reference signal, and generate second output data from the pieces of third parallel data and the pieces of fourth parallel data in response to a second select signal that is generated based on a second division signal generated by dividing the second reference signal,wherein the second FIFO circuit is configured to be reset by the first division signal before the first output data is output from the first FIFO circuit, and the first FIFO circuit is configured to be reset by the second division signal before the second output data is output from the second FIFO circuit.2. The interface circuit of claim 1 ,wherein the first FIFO circuit is configured to select at least one of the pieces of first parallel data in response to a first edge of the first ...

Diagnostic and managing distributed processor system

A network of microcontrollers for monitoring and diagnosing the environmental conditions of a computer is disclosed. The network of microcontrollers provides a management system by which computer users can accurately gauge the health of their computer. The network of microcontrollers provides users the ability to detect system fan speeds, internal temperatures and voltage levels. The invention is designed to not only be resilient to faults, but also allows for the system maintenance, modification, and growth—without downtime. Additionally, the present invention allows users to replace failed components, and add new functionality, such as new network interfaces, disk interface cards and storage, without impacting existing users. One of the primary roles of the present invention is to manage the environment without outside involvement. This self-management allows the system to continue to operate even though components have failed.

Multi-mode nmve over fabrics devices

A device may include a connector to connect the device to a chassis. The device may include chassis type circuitry to determine a type of the chassis. The device may further include mode configuration circuitry to configure the device to use a particular mode appropriate for the type of the chassis.

Sensing apparatus

A sensor apparatus includes a sensing means having one or more sensors. A processor unit processes data received from the one or more sensors. The processor unit has a processor, a memory which stores data used by the processor, and a memory controller that receives instructions from the processor and in response writes data output from the processor to the memory or retrieves data from the memory to the processor. The memory controller is configured to read and write data to one or more areas of the memory with ECC protection of the data and arranged to read and write data to one or more areas of the memory without applying any ECC protection. The sensor apparatus may be configured to process data captured from an antenna to identify the position and/or the range of at least one target in the line of sight of the antenna.

Data search using bloom filters and nand based content addressable memory

A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host. This arrangement can be applied to data search operations using bloom filters stored along bit lines of search matrix, where the search matrix can extend across large numbers of arrays. In the example of an internet search, the bloom filters are formed from key words associated with a website are stored along bit lines of the matrix and corresponding URLs are stored in primary storage. In response to search word based query, any matching URLs are returned.

MEMORY SECURITY PROTOCOL

An NVDIMM requests an authentication object in response to a detected command to initiate a save operation to copy first memory data located in volatile memory on the NVDIMM to non-volatile memory located on the NVDIMM. The NVDIMM determines based on the authentication object that authentication has failed. The NVDIMM implements, in response to determining that authentication has failed, a security measure to prevent recovery of the first memory data. 1. A method for Non-Volatile Dual In-line Memory Module (NVDIMM) security , the method comprising:requesting, by an NVDIMM, an authentication object in response to a detected command to initiate a save operation to copy first memory data located in volatile memory on the NVDIMM to non-volatile memory located on the NVDIMM;determining, by the NVDIMM and based on the authentication object, that authentication has failed; andimplementing, by the NVDIMM and in response to determining that authentication has failed, a security measure to prevent recovery of the first memory data.2. The method of claim 1 , wherein the first memory data located in the volatile memory on the NVDIMM is erased when power to the NVDIMM is removed by the computer; andwherein implementing the security measure to prevent recovery of the first memory data comprises failing to copy the first memory data located in the volatile memory on the NVDIMM to the non-volatile memory on the NVDIMM.3. The method of claim 1 , wherein second memory data is located in non-volatile memory on the NVDIMM claim 1 , the second memory data being a copy of the first memory data located in the volatile memory on the NVDIMM; andwherein the implementing the security measure further prevents recovery of the second memory data.4. The method of claim 3 , wherein the first memory data located in the volatile memory on the NVDIMM is erased when power to the NVDIMM is removed by the computer; andwherein implementing the security measure to prevent recovery of the first memory data ...

SYSTEMS AND METHODS FOR MULTIPATH INPUT/OUTPUT CONFIGURATION

In accordance with these and other embodiments of the present disclosure, a method may include retrieving recommended settings for input/output communications for one or more operating systems executing on one or more modular information handling systems disposed in a chassis configured to receive a plurality of modular information handling systems and a plurality of modular information handling resources including one or more storage controllers and a plurality of disk drives. The method may also include enumerating one or more logical units, each logical unit comprising one or more of plurality of disk drives and associated with the one or more storage controllers. The method may further include based on the recommended settings and enumeration of the one or more logical units, generating preferred input/output paths between the one or more modular information handling systems and the one or more logical units. 1. A system comprising:a chassis configured to receive a plurality of modular information handling systems and a plurality of modular information handling resources including one or more storage controllers and a plurality of disk drives; retrieve recommended settings for input/output communications for one or more operating systems executing on one or more modular information handling systems disposed in the chassis;', 'enumerate one or more logical units, each logical unit comprising one or more of plurality of disk drives and associated with the one or more storage controllers; and', 'based on the recommended settings and enumeration of the one or more logical units, generate preferred input/output paths between the one or more modular information handling systems and the one or more logical units., 'a chassis management controller disposed in the chassis and configured to2. The system of claim 1 , the chassis management controller further configured to store a configuration file including the preferred input/output paths on computer-readable media ...

APPLICATION MATERIALIZATION IN HIERARCHICAL SYSTEMS

Various techniques are disclosed herein for storing and managing master data in hierarchical data systems. Several related concepts, embodiments, and examples are disclosed, including techniques for incremental rationalization in a hierarchical data model, techniques for implementing governance pools in a hierarchical data model, techniques for application materialization in a hierarchical data model, techniques for data intersection mastering in a hierarchical data model, techniques for change request visualization in a hierarchical data model, and techniques for hierarchy preparation in a hierarchical data model. 1. A method comprising:receiving, by a computer system via a first application, a request to output one or more data hierarchies associated with the first application;determining, by the computer system, that the first application subscribes to at least one data dimension maintained by an application external to the first application;retrieving, by the computer system, one or more data nodes of the at least one data dimension, from the application external to the first application;combining, by the computer system, the data nodes retrieved from the application external to the first application, with one or more application-level data hierarchies maintained by the first application; andgenerating and outputting, by the computer system, a graphical interface representation of the requested data hierarchies associated with the first application, the requested data hierarchies including the combination of the data nodes retrieved from the application external to the first application with the one or more application-level data hierarchies maintained by the first application.2. The method of claim 1 , wherein retrieving the data nodes of the at least one data dimension claim 1 , from the application external to the first application claim 1 , comprises retrieving the data nodes from a shared master data dimension within a hierarchical master data store.3. The ...

Mapping logical identifiers using multiple identifier spaces

It is determined that a first data unit is to be written to a storage device and that the first data unit is associated with a first attribute. In response to determining that the first data unit is associated with the first attribute, a first identifier is selected from a first identifier space and the first identifier is associated with the first data unit. It is determined that a second data unit is to be written to the storage device and that the second data unit is associated with the second attribute. In response to determining that the second data unit is associated with the second attribute, a second identifier is selected from a second identifier space and the second identifier is associated with the second data unit.

MECHANISM FOR MULTIPLE COEXISTING CONFIGURATIONS SUPPORT IN VIRTUAL TAPE APPLICATIONS

A mechanism for multiple coexisting configurations support in virtual tape applications. Specifically, the introduction of various additional computer processes facilitate the introduction or modification of user specific configurations on a virtual tape solution: (i) without requiring the shutdown and re-initialization of the virtual tape solution; and (ii) without compromising the performance of computing resources allocated towards the implementation of other user specific configurations already existing on the virtual tape solution. 120.-. (canceled)21. A method for supporting coexisting user specific configurations , comprising:receiving a request comprising a new user identifier (ID) and a new user specific configuration associated with a new mainframe user; generating a library batch request (LBR) based on at least a portion of the new user specific configuration;', 'making a first determination that the LBR is valid;', 'processing, based on the first determination, the LBR to create a set of new virtual tape libraries;', 'generating a drive batch request (DBR) based on at least another portion of the new user specific configuration;', 'making a second determination that the DBR is valid; and', 'processing, based on the second determination, the DBR to create a set of new virtual tape drives., 'in response to receiving the request22. The method of claim 21 , wherein the LBR comprises a set of tape library addition requests claim 21 , wherein each tape library addition request of the set of tape library addition requests comprises a different new library management information (LMI) to configure one new virtual tape library of the set of new virtual tape libraries.23. The method of claim 22 , wherein making the first determination claim 22 , comprises: inspecting the different new LMI included in the tape library addition request for deficiencies;', 'detecting, based on the inspecting, that the different new LMI exhibits zero deficiencies; and, 'for each tape ...

FACE RECOGNITION METHOD AND ELECTRONIC DEVICE USING SAME

The application provides a face recognition method and an electronic device using the method. The method includes: obtaining face information from an image frame in a video stream; determining whether a first similarity between pre-registration information and the face information is higher than a first similarity threshold; determining that face recognition is successful if the first similarity is higher than the first similarity threshold, and updating real-time registration information with the face information; and determining that face recognition fails if the first similarity is lower than the first similarity threshold, and then determining whether a second similarity between the real-time registration information and the face information is higher than a second similarity threshold, where the second similarity threshold is higher than the first similarity threshold. 1. A face recognition method for recognizing a face in a video stream , the face recognition method comprising:obtaining face information from an image frame in the video stream;determining whether a first similarity between pre-registration information and the face information is higher than a first similarity threshold;determining that face recognition is successful if the first similarity is higher than the first similarity threshold, and updating real-time registration information with the face information of the image frame; anddetermining that face recognition fails if the first similarity is lower than the first similarity threshold, and then determining whether a second similarity between the real-time registration information and the face information is higher than a second similarity threshold, wherein the real-time registration information is generated based on face information corresponding to another image frame extracted prior to the image frame in the video stream, and the second similarity threshold is higher than the first similarity threshold.2. The face recognition method ...

RECONCILIATION OF DATA IN A DISTRIBUTED SYSTEM

Methods and systems are presented for providing data consistency in a distributed data storage system using an eventual consistency model. The distributed data storage system may store data across multiple data servers. To process a request for writing a first data value for a data field, a first data server may generate, for the first data value, a first causality chain representing a data replacement history for the data field leading to the first data value. The first data server may insert the first data value without deleting pre-existing data values from the data field. To process a data read request, multiple data values corresponding to the data field may be retrieved. The first data server may then select one data value based on the causality chains associated with the multiple data values for responding to the data read request. 1. A system , comprising:a non-transitory memory; and receiving, from a remote device, a data read request comprising a data key;', 'in response to receiving the data read request, retrieving, from a first data store based on the data key, a plurality of data objects comprising at least a first data object and a second data object, wherein the first data object comprises a first data value and a first causality chain indicating a first data update history corresponding to the first data value, wherein the second data object comprises a second data value and a second causality chain indicating a second data update history corresponding to the second data value;', 'determining that the first data object and the second data object are not replacements of each other for the data key based on the first causality chain and the second causality chain;', 'selecting, from among the plurality of data objects corresponding to the data key, the first data object for responding to the data read request based at least in part on a comparison between the first causality chain and the second causality chain; and', 'transmitting the first data ...

RECONCILIATION OF DATA IN A DISTRIBUTED SYSTEM

Methods and systems are presented for providing data consistency in a distributed data storage system using an eventual consistency model. The distributed data storage system may store data across multiple data servers. To process a request for writing a first data value for a data field, a first data server may generate, for the first data value, a first causality chain representing a data replacement history for the data field leading to the first data value. The first data server may insert the first data value without deleting pre-existing data values from the data field. To process a data read request, multiple data values corresponding to the data field may be retrieved. The first data server may then select one data value based on the causality chains associated with the multiple data values for responding to the data read request. 1. A system , comprising:a non-transitory memory; andone or more hardware processors coupled with the non-transitory memory and configured to read instructions from the non-transitory memory to cause the system to perform operations comprising:receiving, from a remote device, a data read request comprising a data key;in response to receiving the data read request, determining a location of a data server of a plurality of data servers for servicing the data read request;accessing the data server to retrieve, based on the data key, a first data object that comprises a first data value and a first causality chain indicating a first data update history corresponding to the first data value, wherein the causality chain indicates a second data object that comprises a second data value;determining that the first data object and the second data object are not replacements of each other for the data key based on the first causality chain;selecting, from among the plurality of data objects corresponding to the data key, the first data object for responding to the data read request based at least in part on the first causality chain; ...

INTERFACE CIRCUITS CONFIGURED TO INTERFACE WITH MULTI-RANK MEMORY

An interface circuit may include a first FIFO circuit and a second FIFO circuit. The first FIFO circuit may generate first output data based on a first sampling signal and a second sampling signal. The second FIFO circuit may generate second output data based on a third sampling signal and a fourth sampling signal. The first FIFO circuit and the second FIFO circuit may be cross-reset. 1. An interface circuit comprising:a first FIFO circuit configured to process pieces of first input data in a FIFO manner in response to a first reference signal, configured to generate first output data, and configured to divide the first reference signal to generate a first division signal;a second FIFO circuit configured to process pieces of second input data in the FIFO manner in response to a second reference signal, configured to generate second output data, and configured to divide the second reference signal to generate a second division signal; anda third FIFO circuit configured to store third input data that is generated based on the first output data and the second output data,wherein the first FIFO circuit is configured to be reset by the second division signal before the second output data is output from the second FIFO circuit,wherein the second FIFO circuit is configured to be reset by the first division signal before the first output data is output from the first FIFO circuit,wherein the first FIFO circuit is configured to operate at a first frequency,wherein the second FIFO circuit is configured to operate at a second frequency, andwherein the third FIFO circuit is configured to operate at a third frequency that is different from the first frequency.2. The interface circuit of claim 1 , further comprising:a first sampling circuit configured to generate the first input data; anda second sampling circuit configured to generate the second input data.3. The interface circuit of claim 1 , further comprising:a first delay circuit configured to delay a first data strobe ...

Adaptive guard band for improved data storage capacity

An adaptive guard band for a ramp load/unload device is disclosed to provide extended data storage. In illustrated embodiments, an adaptive guard band algorithm is configured to format one or more discs or media having a lower capacity device with the adaptive guard band and extended data zone utilizing capacity measurements. The algorithm formats the media to provide a track zero at a first cylinder if the capacity is at or above the threshold capacity and a second cylinder if the capacity is below the threshold capacity to provide the extended data storage zone. A size or width of the extended data zone is variable to provide additional capacity to meet the threshold capacity.

Method and Apparatus for Hardware-Accelerated Machine Learning

A feature extractor for a convolutional neural network (CNN) is disclosed, wherein the feature extractor is deployed on a member of the group consisting of (1) a reconfigurable logic device, (2) a graphics processing unit (GPU), and (3) a chip multi-processor (CMP). A processing pipeline can be implemented on the member, where the processing pipeline implements a plurality convolution layers for the CNN, wherein each of a plurality of the convolutional layers comprises (1) a convolution stage that convolves first data with second data if activated and (2) a sub-sampling stage that performs a member of the group consisting of (i) a max pooling operation, (ii) an averaging operation, and (iii) a sampling operation on data received thereby if activated. The processing pipeline can be controllable with respect to which of the convolution stages are activated/deactivated and which of the sub-sampling stages are activated/deactivated when processing streaming data through the processing pipeline. The deactivated convolution and sub-sampling stages can remain instantiated within the processing pipeline but act as pass-throughs when deactivated. The processing pipeline performs feature vector extraction on the streaming data using the activated convolution stages and the activated sub-sampling stages.

SYSTEMS AND METHODS FOR NOR PAGE WRITE EMULATION MODE IN SERIAL STT-MRAM

The present disclosure is drawn to, among other things, a method of managing a magnetoresistive memory (MRAM) device. In some aspects, the method includes receiving a configuration bit from a write mode configuration register. In response to determining the configuration bit is a first value, the MRAM device is operated in a NOR emulation mode. In response to determining the configuration bit is a second value, the MRAM device is operated in a persistent memory mode. 1. A method for managing a magnetoresistive memory (MRAM) device , comprising:receiving a configuration bit from a write mode configuration register;in response to determining the configuration bit is a first value, operating the MRAM device in a NOR emulation mode; andin response to determining the configuration bit is a second value, operating the MRAM device in a persistent memory mode, wherein operating the MRAM device in the persistent memory mode comprises writing first data to a cache in parallel with writing second data from the cache to one or more memory array banks.2. The method of claim 1 , wherein the first value is zero and the second value is one.3. The method of claim 1 , wherein the configuration bit is set according to a user input.4. The method of claim 1 , wherein operating the MRAM device in the NOR emulation mode comprises operating the MRAM device to emulate a NOR memory device.5. The method of claim 4 , wherein operating the MRAM device to emulate the NOR memory device comprises:receiving a write or program command comprising a starting address and a sequence of data bytes;incrementing a counter value for each byte that is written to the one or more memory array banks; andin response to the counter value reaching a predefined buffer size, wrapping to the starting address and writing the rest of the sequence of data bytes over data previously stored from the starting address.6. The method of claim 5 , wherein operating the MRAM device to emulate the NOR memory device further ...

Intelligent Data Storage and Processing Using FPGA Devices

Methods and systems are disclosed where a plurality of precompiled hardware templates are stored in memory, each of the hardware templates being configured for loading onto a re-configurable logic device such as a FPGA to define a data processing operation to be performed by the re-configurable logic device, each of the data processing operations defined by the precompiled hardware templates having an associated performance characteristic. A processor selects a precompiled hardware template from a plurality of the precompiled hardware templates in the memory for loading onto the re-configurable logic device based at least in part on the associated performance characteristics of the data processing operations defined by the precompiled hardware templates. 1a processing device for communicating with a computer system to offload a plurality of processing tasks from a processor within the computer system, wherein the processing device comprises a re-configurable logic device;wherein the re-configurable logic device is configured to receive and process streaming data through a multi-functional pipeline deployed on the re-configurable logic device;wherein the multi-functional pipeline comprises a plurality of pipelined data processing engines, each pipelined data processing engine being configured to (1) perform a processing operation on streaming data that it receives, and (2) be responsive to a control instruction that defines whether that pipelined data processing engine is an activated data processing engine or a deactivated data processing engine, wherein an activated data processing engine is configured to perform its processing operation on any received streaming data, and wherein a deactivated data processing engine remains in the pipeline but does not perform its processing operation on any received streaming data, the multi-functional pipeline thereby being configured to provide a plurality of different pipeline functions in response to control instructions that ...

Intelligent Data Storage and Processing Using FPGA Devices

A system is disclosed that comprises a field programmable gate array (FPGA), a network interface, and hardware description code, wherein the hardware description code is compilable into a plurality of bit configuration files for loading onto the FPGA, wherein each bit configuration file defines a pipelined processing operation for a hardware template. The FPGA comprises configurable hardware logic, and the FPGA can be accessible over a network via the network interface for commanding the FPGA to load a bit configuration file from among the bit configuration files onto the FPGA to thereby configure hardware logic on the FPGA to perform the pipelined processing operation defined by the loaded bit configuration file, and wherein the FPGA is configured to (1) receive streaming data and (2) process the streaming data through the configured hardware logic to perform the pipelined processing operation defined by the loaded bit configuration file on the streaming data. 1. A system comprising:a field programmable gate array (FPGA), the FPGA comprising configurable hardware logic;a network interface; andhardware description code that is compilable into a plurality of bit configuration files for loading onto the FPGA, wherein each bit configuration file defines a pipelined processing operation for a hardware template;wherein the FPGA is accessible over a network via the network interface for commanding the FPGA to load a bit configuration file from among the bit configuration files onto the FPGA to thereby configure hardware logic on the FPGA to perform the pipelined processing operation defined by the loaded bit configuration file; andwherein the FPGA is configured to (1) receive streaming data and (2) process the streaming data through the configured hardware logic to perform the pipelined processing operation defined by the loaded bit configuration file on the streaming data.2. The system of further comprising:a processor; anda bus that links the processor with the FPGA; ...

STORAGE SYSTEM, STORAGE CONTROL METHOD, AND RELAY DEVICE

A storage system includes a plurality of controllers each including a processor module and a memory, and a relay unit to relay a communication between the processor modules. The relay unit executes assignment determination to determine one of the processor module of a first controller and the processor module of a second controller is a processor module processing a command stored in the memory. The first controller includes memory storing the command, and the second controller is any of the controllers other than the first controller. When the relay unit determines the command of the processor module of the first controller, the relay unit notifies storage location information of the command to the processor module of the first controller, and when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit transfer the command to the second controller. 1. A storage system comprising:a plurality of controllers each including a processor module and a memory; anda relay unit configured to relay a communication between the processor modules,wherein the relay unit is configured to execute assigning determination of determining one of the processor module of a first controller and the processor module of a second controller as a processor module that processes a command stored in the memory, the first controller being one of the controllers that includes the memory storing the command, the second controller being any of the controllers other than the first controller,wherein when the relay unit determines the command to be processed by the processor module of the first controller, the relay unit is configured to notify storage location information, indicating a storage location of the command in the memory of the first controller, to the processor module of the first controller, andwherein when the relay unit determines the command to be processed by the processor module of the second controller, the relay unit ...

Converting virtual volumes in place

A technique includes changing a configuration setting of a virtual volume of data stored in a storage system. The technique includes converting data of the virtual volume in place to reflect the changing of the configuration setting.

Intelligent Data Storage and Processing Using FPGA Devices

A multi-functional data processing pipeline for use with machine learning is disclosed. The multi-functional pipeline may comprise a plurality of pipelined data processing engines, the plurality of pipelined data processing engines being configured to perform processing operations, and the pipelined data processing engines can include correlation logic. The multi-functional pipeline can be configured to controllably activate or deactivate each of the pipelined data processing engines in the pipeline in response to control instructions and thereby define a function for the pipeline, each pipeline function being the combined functionality of each activated pipelined data processing engine in the pipeline. In example embodiments, such pipelines can be used to accelerate convolutional layers in machine-learning technology such as convolutional neural networks. 1. A machine-learning apparatus comprising:a feature extractor for a convolutional neural network, wherein the feature extractor is deployed on a member of the group consisting of (1) a reconfigurable logic device, (2) a graphics processing unit (GPU), and (3) a chip multi-processor (CMP), wherein the member comprises a plurality of data processing engines arranged as a multi-functional pipeline through which data is streamed, the pipelined data processing engines configured for operation in parallel with each other;each pipelined data processing engine being configured to (1) receive streaming data and perform a processing operation on the received streaming data, and (2) be responsive to a control instruction that defines whether that pipelined data processing engine is an activated data processing engine or a deactivated data processing engine, wherein an activated data processing engine is configured to perform its processing operation on streaming data received thereby, and wherein a deactivated data processing engine remains in the pipeline but does not perform its processing operation on streaming data ...

Method and computer program product and apparatus for adjusting operating frequencies

The invention introduces a non-transitory computer program product for adjusting operating frequencies when executed by a processing unit of a device, containing program code to: collect an interface-activity parameter comprising information about data transmissions on a host access interface and/or a flash access interface; select one from multiple frequencies according to the interface-activity parameter; and drive a clock generator to output a clock signal at the selected frequency, thereby enabling the host access interface and/or the flash access interface to operate at an operating frequency.

Management of extent migration on tiered storage

Aspects of the present disclosure are directed toward a method, a system, and a computer program product for managing the migration of extents on tiered systems. The method can include receiving a space reservation request for one or more requested extents on a first storage tier of a storage system. The method can also include releasing a first storage tier reserve space that includes one or more first tier reserved extents in response to the first storage tier reserve space being insufficient for the reservation request. The method can also include migrating the one or more requested extents to the first storage tier reserve space.

CACHE TRANSFER TIME MITIGATION

In accordance with one implementation, a method for mitigating cache transfer time entails reading data into memory from at least two consecutive elliptical data tracks in a main store region of data storage and writing the data read from the at least two consecutive elliptical data tracks to a spiral data track within a cache storage region. 1. A method comprising:determining a linear storage density capability of each of a plurality of transducer heads;identifying a subset of the transducer heads for which the determined linear storage density capability satisfies a predetermined threshold; andassembling a storage device, the storage device having a storage media with a cache region that is read/write accessible by a select transducer head of the identified subset.2. The method of claim 1 , further comprising:selecting a physical location for the cache region prior to assembling the storage device, wherein assembling the storage device further comprises:assembling the storage device with the select transducer head of the identified subset positioned to access the selected physical location.3. The method of claim 1 , further comprising:after assembling the storage device, identifying a storage area accessible by the select transducer head in the identified subset; andselectively defining the cache region within the identified storage area.4. The method of claim 1 , further comprising:defining multiple cache storage areas, each of the multiple cache storage areas located within a storage region accessible by an associated transducer head of the identified subset.5. The method of claim 1 , wherein the select transducer head demonstrates a highest linear storage density capability of multiple transducer heads included within the storage device.6. The method of claim 1 , further comprising:selectively defining the cache region in an outer diameter region of the storage media.7. The method of claim 1 , wherein determining the linear storage density capability of each of ...

Infographic disk activity interface and method for displaying relative saturation of a computer disk system

A computer-readable medium storing instructions which, when executed by at least one processor of a computer system, adapt the computer system to implement a method for displaying relative saturation of a computer disk system. The method includes visually displaying elements of the computer disk system in an infographic disk activity interface. The elements may include at least one of the group including at least one disk controller, at least one physical disk, at least one file, and at least one other files. The elements are visually linked using an arrangement of connectors defining respective data flow paths between the elements. Disk system activity along the data flow paths is visually indicated using static and/or dynamic infographic display elements.

Multi-mode nmve over fabrics devices

A device may include a connector to connect the device to a chassis. The device may include chassis type circuitry to determine a type of the chassis. The device may further include mode configuration circuitry to configure the device to use a particular mode appropriate for the type of the chassis.

MEMORY PROTOCOL WITH COMMAND PRIORITY

The present disclosure includes apparatuses and methods related to a memory protocol with command priority. An example apparatus can execute a command that includes a read identification (RID) number based on a priority assigned to the RID number in a register. The apparatus can be a non-volatile dual in-line memory module (NVDIMM) device. 1. An apparatus , comprising:a memory device; and 'execute a command that includes a read identification (RID) number based on a priority assigned to the RID number in a register.', 'a controller coupled to the memory device configured to2. The apparatus of claim 1 , wherein the memory device is a non-volatile dual in-line memory module (NVDIMM) device.3. The apparatus of claim 1 , wherein the priority assigned to the RID number is changed by reprogramming the register.4. The apparatus of claim 1 , wherein the command is executed before another command based on the priority assigned to the RID number.5. The apparatus of claim 4 , wherein the another command was sent to the memory device for execution prior to the command being sent to the memory device for execution.6. The apparatus of claim 1 , wherein the register includes a plurality of ranges of RID numbers and wherein each of the plurality of ranges of RID numbers are assigned priority information.7. The apparatus of claim 1 , wherein the controller determines when to execute the command based on the RID number and priority information in the register.8. An apparatus comprising:a memory device; and receive a first command having a first read identification (RID) number, a second command having a second RID number, and a third command having a third RID number; and', 'execute the first command, the second command, and the third command in an order based on priority information in a register., 'a controller coupled to the memory device configured to9. The apparatus of claim 8 , wherein the register is programmed to high priority for a first range of RIDs that includes the first ...

Preventing Conflicts of Interests Between Two or More Groups Using Applications

To prevent conflicts of interest, an information management system is used to make sure two or more groups are kept apart so that information does not circulate freely between these groups. The system has policies to implement an “ethical wall” to separate users or groups of users. The user or groups of user may be organized in any arbitrary way, and may be in the same organization or different organizations. The two groups (or two or more users) will not be able to access information belonging to the other, and users in one group may not be able to pass information to the other group. The system may manage access to documents, e-mail, files, and other forms of information.

EXTENSIBLE INPUT STACK FOR PROCESSING INPUT DEVICE DATA

Methods, systems, and computer program products are described herein an extensible input stack for processing input device data received from a plurality of different input devices attached to a computing device. The extensible input stack comprises a plurality of stack layers. Each of the plurality of stack layers performs a particular set of processing with respect to the input device data, among other operations. Each of the plurality of stack layers comprises a code interface, which is used to provide and/or or receive data from the input device and/or other stack layers. Each of the stack layers is extensible to include additional functionality to support new input devices. By separating out the functionality performed by the input stack into separate stack layers, and having each layer accessible via a code interface, the functionality of each of stack layers may be easily extended to support any type of input device. 1. A system , comprising:at least one processor; and an extensible input stack configured to interface an operating system (OS) with input devices, the extensible input stack comprising a plurality of stack layers that include:', 'a contextual processing layer having a communication interface configured to receive converted input device data from another stack layer in the extensible input stack, the contextual processing layer configured to:', determine a first component-specific format in which the converted input device data is to be provided to a first target component, and', 'convert the converted input device data into the first component-specific format to generate first formatted input device data; and, 'in response to the converted input device data being determined to be a first type,'}, determine a second component-specific format in which the converted input device data is to be provided to a second target component, and', 'convert the converted input device data into the second component-specific format to generate second formatted ...

EXTENSIBLE INPUT STACK FOR PROCESSING INPUT DEVICE DATA

Methods, systems, and computer program products are described herein an extensible input stack for processing input device data received from a plurality of different input devices attached to a computing device. The extensible input stack comprises a plurality of stack layers. Each of the plurality of stack layers performs a particular set of processing with respect to the input device data, among other operations. Each of the plurality of stack layers comprises a code interface, which is used to provide and/or or receive data from the input device and/or other stack layers. Each of the stack layers is extensible to include additional functionality to support new input devices. By separating out the functionality performed by the input stack into separate stack layers, and having each layer accessible via a code interface, the functionality of each of stack layers may be easily extended to support any type of input device. 1. A system , comprising:at least one processor; and determine an input device coupled to the computing device;', 'determine an application operable on the computing device that is interacted with via the input device;', 'determine at least one software component that extends the functionality of at least one stack layer of a plurality of stack layers of an extensible input stack to support operability of the determined input device for the application, the extensible input stack being configured to process input device data generated by the input device; and', 'load the software component for the at least one stack layer., 'an operating system configured to, 'at least one memory that stores program code configured to be executed by the at least one processor, the program code comprising2. The system of claim 1 , wherein the operating system is further configured to:determine a second application operable on the computing device that is interacted with via the input device;determine at least a second software component that extends the ...

SIGNAL TRANSMISSION METHOD AND A CIRCUIT STRUCTURE FOR HETEROGENEOUS PLATFORMS

A signal transmission method and a circuit structure for heterogeneous platforms are provided. The method includes: adjusting signal transmission bandwidths between a first platform and a bridge circuit and between the bridge circuit and a second platform according to signal transmission speeds between the first platform and the bridge circuit and between the bridge circuit and the second platform; transmitting a command signal from the first platform to the bridge circuit and saving the command signal at a buffer of the bridge circuit; reading the command signal at the buffer of the bridge circuit by the second platform; transmitting data to the buffer of the bridge according to the command signal by the second platform; acquiring the data at the buffer of the bridge by the first platform. 1. A circuit structure for heterogeneous platforms , comprising:a first platform;a bridge circuit electrically connected to the first platform; anda second platform electrically connected to the bridge circuit, and a signal transmission speed of the first platform being different from the second platform thereof;wherein a signal transmission bandwidth between the bridge platform and the second platform is adjusted according to the signal transmission speed between the first platform and the bridge.2. The circuit structure for heterogeneous platforms according to claim 1 , wherein the bridge circuit further includes a buffer and the buffer is configured to store data transmitted from the first platform and the second platform.3. The circuit structure for heterogeneous platforms according to claim 2 , wherein the buffer is a first in claim 2 , first out (FIFO) buffer.4. The circuit structure for heterogeneous platforms according to claim 2 , wherein the data transmitted from the first platform is stored in the buffer claim 2 , and the data is read by the second platform from the buffer.5. The circuit structure for heterogeneous platforms according to claim 1 , wherein the first ...

Mirror Copies of Solid State Drives Using Portions of Hard Disk Drives

Mechanisms for storing data to a storage system comprising a set of one or more solid state storage devices and a set of non-solid state storage devices are provided. A request to write data to the storage system is received and the data is written to the set of one or more solid state storage devices in response to receiving the request. Moreover, a mirror copy of the data is written to the set of non-solid state storage devices in response to receiving the request. Thus, the non-solid state storage devices serve as a mirror backup copy of the data stored to the solid state storage devices.

CLONE EFFICIENCY IN A HYBRID STORAGE CLOUD ENVIRONMENT

An efficient cloning mechanism is provided for a distributed storage environment, where, for example, a private cloud computing environment and a public cloud computing environment are included in a hybrid cloud computing environment (on-premise object storage to off-premise computation resources), to improve computation workloads. The disclosed algorithm forms an efficient cloning mechanism in a hybrid storage environment where the read/write speed of data from the disk is not limited by its angular velocity. 1. A computer program product for improving the clone efficiency between a public cloud environment and a private cloud environment of a hybrid cloud computing environment by leveraging the speed variations between inner partitioned tracks of a storage disk and outer partitioned tracks of the storage disk of the private cloud environment , the computer program product comprising a computer readable storage medium having stored thereon:first program instructions programmed to receive a request for a clone operation for a target data on a storage disk of a private cloud environment from the public cloud environment where the public cloud environment provides a computing resource for a processing operation performed by the hybrid cloud computing environment;second program instructions programmed to identify a current track location of the target data on the storage disk; andthird program instructions programmed to, upon meeting a condition that the target data is located on the inner partitioned tracks of the storage disk, perform an internal alteration of the current track location of target data to a set of outer partitioned tracks of the storage disk prior to the cloning operation performed by the public cloud environment;wherein:the private cloud environment provides the storage disk for the processing operation performed by the hybrid cloud computing environment.2. The computer program product of claim 1 , wherein the target data is a virtual machine ...

MEMORY SECURITY PROTOCOL

An NVDIMM requests an authentication object in response to a detected command to initiate a save operation to copy first memory data located in volatile memory on the NVDIMM to non-volatile memory located on the NVDIMM. The NVDIMM determines based on the authentication object that authentication has failed. The NVDIMM implements, in response to determining that authentication has failed, a security measure to prevent recovery of the first memory data. 1requesting, by an NVDIMM, a private key in response to a detected command to initiate a save operation to copy first memory data located in volatile memory on the NVDIMM to non-volatile memory located on the NVDIMM, the command to initiate a save operation occurring before detection of removal of power;creating, by the NVDIMM, second memory data located in non-volatile memory on the NVDIMM, the second memory data being a copy of the first memory data located in the volatile memory on the NVDIMM;detecting, by a computer, removal of power from the NVDIMM, and wherein the first memory data located in the volatile memory on the NVDIMM is erased when power to the NVDIMM is removed;determining, by the NVDIMM, based on the private key, and based upon determining the computer does not contain a proper hardware authentication device, that authentication has failed;encrypting, by the computer, the second memory data using an encryption key; and implementing, by the NVDIMM and in response to determining that authentication has failed, a security measure to prevent recovery of the first memory data, wherein the implementing the security measure further prevents recovery of the second memory data and wherein the implementing the security measure comprises deleting the encryption key.. A method for Non-Volatile Dual In-line Memory Module (NVDIMM) security, the method comprising: The present disclosure generally relates to memory modules, and more specifically, to security protocols for Non-Volatile Dual In-line Memory Modules ( ...

TASK QUEUES

A data storage device may be configured to use multiple task queues to schedule tasks. The multiple task queues may be configured based on an architecture of the data storage device. In some implementations, the multiple task queues may be used to organize tasks received from an access device. In other implementations, the multiple task queues may be used to identify tasks, and identification of the tasks may be associated with an order of execution of the tasks. 1. A data storage device , comprising:a non-volatile memory; and a controller memory configured to store instructions;', 'a task scheduler module within the controller; and', 'a processor connected to the controller memory, the processor configured to execute the instructions to select a first queue of multiple task queues within the task scheduler module based on a selection scheme and to identify a first task to be processed from the first queue, the multiple task queues configured based on one or more architectural aspects of the memory, the controller, or a combination thereof, the selection scheme configured to indicate an order of access of the multiple task queues, and wherein, after the first task is identified, the processor is configured to execute instructions to select a second queue of the multiple task queues based on the selection scheme and to identify a second task to be processed from the second queue., 'a controller connected to the non-volatile memory, wherein the controller comprises2. The data storage device according to claim 1 , further comprising:an execution module within the controller, wherein the execution module is configured to read one of the first task and the second task and execute the one of the first task and the second task.3. The data storage device according to claim 1 , further comprising:a data buffer within the controller, the data buffer configured to store user data and allow for retrieval of the user data.4. The data storage device according to claim 1 , wherein ...

Access control policy simulation and testing

A method and apparatus for testing and simulating an access control policy are disclosed. Evaluating an access control policy may be performed by utilizing a deny statement that causes the access request to be rejected despite actions indicated in the access request being authorized. Further, an independent simulation environment may be utilized for testing access control policy evaluation.

TWO PIN SERIAL BUS COMMUNICATION INTERFACE AND PROCESS

A two pin communication interface bus and control circuits are used with circuit boards, integrated circuits, or embedded cores within integrated circuits. One pin carries data bi-directionally and address and instruction information from a controller to a selected port. The other pin carries a clock signal from the controller to a target port or ports in or on the desired circuit or circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is minimal. The bus is used for communication, such as serial communication related to the functional operation of an IC or core design, or serial communication related to test, emulation, debug, and/or trace operations of an IC or core design. 1. An integrated circuit comprising:a bidirectional data pin;a clock input pin; a first input of the first data circuit coupled to the bidirectional data pin;', 'a second input of the first data circuit;', 'an output of the first data circuit; and', 'an output enable input of the first data circuit; and, 'a first data circuit including an output enable output coupled to the output enable input of the first data circuit;', 'an address clock output coupled to an address circuit;', 'an instruction clock output coupled to an instruction circuit; and', 'a plurality of data signals coupled to a second data circuit., 'a port control circuit including a message controller coupled to the clock input pin and the output of the first data circuit, wherein the message controller includes2. The integrated circuit of claim 1 , wherein:the port control circuit includes a reset controller coupled to a function reset input; andthe reset controller includes a port reset output coupled to the instruction circuit.3. The integrated circuit of claim 1 , wherein:the port control circuit includes a frame bit counter circuit coupled to the message controller; andthe frame bit counter circuit has a frame bit counter input coupled to an instruction output ...

DATA DISTRIBUTION METHOD IN STORAGE SYSTEM, DISTRIBUTION APPARATUS, AND STORAGE SYSTEM

Embodiments of the present disclosure provide a storage system, including a distribution apparatus and a storage device; the storage device includes at least two storage controllers and multiple storage units, where each storage unit is configured with any one of the at least two storage controllers as a home storage controller; and the distribution apparatus includes a front-end interface and at least two back-end interfaces, where the front-end interface is configured to connect to a host device, and each back-end interface is connected to each storage controller in a one-to-one correspondence manner. According to the technical solutions provided in the present disclosure, the distribution apparatus parses an IO read/write instruction, so that the IO read/write instruction can be accurately sent to the home storage controller, which avoids forwarding the IO read/write instruction between the storage controllers, thereby improving IO processing efficiency of the storage system. 1. A storage system , comprising:a storage device comprising at least two storage controllers and multiple storage units, with each storage unit configured with any one of the at least two storage controllers as a home storage controller; a front-end interface configured to connect to a host device; and', 'at least two back-end interfaces, wherein each back-end interface is configured to connect to each storage controller in a one-to-one correspondence manner; and, 'a distribution apparatus comprising 'receive, using the front-end interface, an IO read/write instruction sent by the host device;', 'the distribution apparatus is configured todetermine, according to an identifier of a to-be-read/written storage unit and carried in the IO read/write instruction, a home storage controller corresponding to the to-be-read/written storage unit; andforward, using a back-end interface connected to the home storage controller corresponding to the to-be-read/written storage unit, the IO read/write ...

Two pin serial bus communication interface and process

A two pin communication interface bus and control circuits are used with circuit boards, integrated circuits, or embedded cores within integrated circuits. One pin carries data bi-directionally and address and instruction information from a controller to a selected port. The other pin carries a clock signal from the controller to a target port or ports in or on the desired circuit or circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is minimal. The bus is used for communication, such as serial communication related to the functional operation of an IC or core design, or serial communication related to test, emulation, debug, and/or trace operations of an IC or core design.

SYSTEMS AND METHODS FOR DYNAMIC TRANSCEIVER PATH ADAPTATION BASED ON MEASUREMENTS FROM MULTIPLE SENSORS

In accordance with embodiments of the present disclosure, a wireless network interface may include a transmit/receive path comprising an antenna for transmitting and receiving wireless transmissions and a baseband controller communicatively coupled to the transmit/receive path and configured to receive fused sensor information indicative of environmental conditions detected by a plurality of sensors and, based on the fused sensor information, tune one or more parameters of the transmit/receive path. 1. An information handling system comprising:a processor;a plurality of sensors, each sensor configured to detect an environmental condition of the information handling system; receive from each of the plurality of sensors a signal indicative of the environmental condition detected by such sensor; and', 'generate fused sensor information indicative of the environmental conditions detected by the plurality of sensors;, 'a sensor controller communicatively coupled to the processor and configured to a transmit/receive path comprising an antenna for transmitting and receiving wireless transmissions; and', receive the fused sensor information; and', 'based on the fused sensor information, tune one or more parameters of the transmit/receive path., 'a baseband controller communicatively coupled to the transmit/receive path and the processor and configured to], 'a wireless network interface communicatively coupled to the processor and comprising2. The information handling system of claim 1 , wherein the plurality of sensors include at least one of a gyroscope claim 1 , an accelerometer claim 1 , a magnetometer claim 1 , a proximity sensor claim 1 , and a location sensor.3. The information handling system of claim 1 , wherein the transmit/receive path comprises a power amplifier claim 1 , and the one or more parameters comprise a gain of the power amplifier.4. The information handling system of claim 1 , wherein the transmit/receive path comprises a radio frequency front-end ...

SYSTEM, TARGET APPARATUS, TERMINAL, PROGRAM, AND METHOD

A system includes: a terminal that is capable of executing a plurality of programs; and a target apparatus that is capable of communicating with the terminal. The target apparatus includes: an acceptance unit that receives a specific operation; and a transmission unit that transmits trigger information to the terminal upon the acceptance unit receiving the specific operation. The terminal includes: a receiving unit that receives the trigger information from the transmission unit; a selection unit that selects a program corresponding to the target apparatus from the plurality of programs upon the receiving unit receiving the trigger information; and a processing unit that performs processing corresponding to the selected program. 1. A system comprising:a terminal that is capable of executing a plurality of programs; anda target apparatus that is capable of communicating with the terminal,wherein the target apparatus comprises:an acceptance unit that receives a specific operation; anda transmission unit that transmits trigger information to the terminal upon the acceptance unit receiving the specific operation, andthe terminal comprises:a receiving unit that receives the trigger information from the transmission unit;a selection unit that selects a program corresponding to the target apparatus from the plurality of programs upon the receiving unit receiving the trigger information; anda processing unit that performs processing corresponding to the selected program.2. The system according to claim 1 , wherein the trigger information includes information that instructs activation of a program relating to the target apparatus.3. The system according to claim 1 , wherein the trigger information includes identifying information that indicates the target apparatus.4. The system according to claim 1 ,wherein the terminal further comprises a display unit that performs display, andthe processing unit causes the display unit to perform display corresponding to the selected ...

POWER-LOSS PROTECTION FOR PLUG-IN MODULE

One example includes a power-loss protection (PLP) module. The module includes a data bus and a plurality of connectors to enable removable coupling between a receptacle of a computer system and a plug-in module to provide electrical connectivity between the computer system and the plug-in module via the data bus. The module also includes a PLP controller to detect a power-loss event associated with the computer system and to provide auxiliary power on a power bus conductively interconnecting the computer system and the plug-in module in response to detecting the power-loss event. 1. An apparatus comprising:a data bus;a plurality of connectors to enable removable coupling between a receptacle of a computer system and a plug-in module to provide electrical connectivity between the computer system and the plug-in module via the data bus; anda power-loss protection (PLP) controller to detect a power-loss event associated with the computer system and to provide auxiliary power on a power bus conductively interconnecting the computer system and the plug-in module in response to detecting the power-loss event.2. The apparatus of claim 1 , wherein the plurality of connectors comprises:a plug-in connector to plug-in to a receptacle associated with the computer system; anda module receptacle to receive a connector associated with the plug-in module.3. The apparatus of claim 2 , wherein the plug-in connector comprises a plurality of conductive connector elements claim 2 , and wherein the receptacle comprises a plurality of conductive receptacle elements that are associated with the respective plurality of conductive connector elements claim 2 , such that the receptacle associated with the computer system is arranged substantially the same as the module receptacle.4. The apparatus of claim 1 , wherein the PLP controller comprises a voltage-rail isolator to isolate the power bus conductively interconnecting the receptacle and the plug-in module claim 1 , such that the power bus ...

Data Distribution Method In Storage System, Distribution Apparatus, And Storage System

Embodiments of the present disclosure provide a storage system, including a distribution apparatus and a storage device; the storage device includes at least two storage controllers and multiple storage units, where each storage unit is configured with any one of the at least two storage controllers as a home storage controller; and the distribution apparatus includes a front-end interface and at least two back-end interfaces, where the front-end interface is configured to connect to a host device, and each back-end interface is connected to each storage controller in a one-to-one correspondence manner. 1. A storage system , comprising:a storage device comprising at least two storage controllers and multiple storage units, each storage unit coupled to one storage controller as a home storage controller;a distribution apparatus coupled to a host device and the at least two storage controller; and receive, an input/output (TO) read/write instruction sent by the host device, wherein the IO read/write instruction comprises an identifier of a to-be-read/written storage unit;', 'determine, according to the identifier, one home storage controller corresponding to the to-be-read/written storage unit; and', 'forward the IO read/write instruction to the home storage controller corresponding to the to-be-read/written storage unit., 'the distribution apparatus is configured to2. The storage system according to claim 1 , wherein the distribution apparatus comprising a front-end interface configured to be coupled to the host device; and at least two back-end interfaces claim 1 , wherein each back-end interface is configured to be coupled to one storage controller; receive, using the front-end interface, the IO read/write instruction sent by the host device;', 'forward, using the back-end interface, the IO read/write instruction to the home storage controller corresponding to the to-be-read/written storage unit., 'the distribution apparatus is further configured to3. The storage ...

Intelligent Data Storage and Processing Using FPGA Devices

Methods and systems are disclosed where an FPGA offloads a plurality of processing tasks from a processor. The FPGA can process streaming data received via a network interface, and the FPGA can be controllable in response to control instructions received from the processor. The FPGA comprises resident hardware logic for a plurality of data processing engines that are combinable as a processing pipeline within the FPGA. In response to the control instructions, the FPGA can control which of the data processing engines are activated and which of the data processing engines are deactivated to selectively tap into the streaming data to perform pipelined processing operations on the streaming data via the activated data processing engines. The deactivated data processing engines remain on the FPGA and provide a pass through path for the streaming data whereby the deactivated data processing engines do not perform processing operations on streaming data received thereby.

Re-encoding data in a dispersed storage network

A method begins by a storage unit partially decoding a first encoded data slice of a set of encoded data slices in accordance with previous dispersed storage error encoding parameters to produce a partially decoded first encoded data slice that is stored by another storage unit. The method continues with the storage unit partially re-encoding the partially decoded first encoded data slice in accordance with updated dispersed storage error encoding parameters to produce a first partially re-encoded data slice that is used to create a new first encoded data slice of a new set of encoded data slices.

MATCHING A RESOURCE WITH A USER FOR A PREDICTED USER NEED

A conversation assistance resource system is provided to connected a user to a resource based on a predicted user need. The conversation assistance resource system monitors user signals relative to a user profile associated with the user. The user profile is based on previously received user signals and includes user preferences, interests, etc. A user need is predicted based on a received user signal. A resource is identified based on the predicted user need and the user profile relative to the resource profile. A communication channel is established between the user and the resource responsive to confirmation by the parties such that the user may query the resource to resolve the predicted user need. 1. A system comprising:a user need predictor configured to predict a user need of a user associated with a user profile, the prediction based on a user signal of one or more user signals associated with the user profile;a matchmaking service configured to identify at least one conversation assistance resource based on the predicted user need and a matching of the user profile with one or more profiles associated with potential conversation assistance resources; anda communications manager configured to establish a communication channel between the user and the identified at least one conversation assistance resource responsive to identification of the at least one conversation assistance resource.2. The system of wherein the matchmaking service is further configured to:match the user profile with one or more profiles associated with potential conversation assistance resources to determine whether the at least one conversation assistance resource satisfies an assisting condition, satisfaction of the assisting condition qualifying the at least one conversation assistance resource to assist the user with the predicted user need.3. The system of wherein the communications manager is further configured to:receive confirmation from the identified at least one conversation ...

TASK QUEUES

A data storage device may be configured to use multiple task queues to schedule tasks. The multiple task queues may be configured based on an architecture of the data storage device. In some implementations, the multiple task queues may be used to organize tasks received from an access device. In other implementations, the multiple task queues may be used to identify tasks, and identification of the tasks may be associated with an order of execution of the tasks.

Multi-mode nmve over fabrics devices

A device may include a connector to connect the device to a chassis. The device may include chassis type circuitry to determine a type of the chassis. The device may further include mode configuration circuitry to configure the device to use a particular mode appropriate for the type of the chassis.

Intelligent Data Storage and Processing Using FPGA Devices

A system is disclosed that comprises a field programmable gate array (FPGA), a network interface, and a plurality of hardware templates. The FPGA comprises configurable hardware logic, and the hardware templates define a plurality of different pipelined processing operations. The FPGA can be accessible over a network via the network interface for commanding the FPGA to load a hardware template from among the hardware templates onto the FPGA to thereby configure hardware logic on the FPGA to perform the pipelined processing operation defined by the loaded hardware template, and wherein the FPGA is configured to (1) receive streaming data and (2) process the streaming data through the configured hardware logic to perform the pipelined processing operation defined by the loaded hardware template on the streaming data. 1. A system comprising:a field programmable gate array (FPGA), the FPGA comprising configurable hardware logic;a network interface; anda plurality of hardware templates that define a plurality of different pipelined processing operations;wherein the FPGA is accessible over a network via the network interface for commanding the FPGA to load a hardware template from among the hardware templates onto the FPGA to thereby configure hardware logic on the FPGA to perform the pipelined processing operation defined by the loaded hardware template; andwherein the FPGA is configured to (1) receive streaming data and (2) process the streaming data through the configured hardware logic to perform the pipelined processing operation defined by the loaded hardware template on the streaming data.2. The system of further comprising:a processor; anda bus that links the processor with the FPGA; andwherein the FPGA is accessible over the network interface via the processor and the bus.3. The system of wherein the FPGA is configured to offload a plurality of processing tasks from the processor.4. The system of wherein the network interface claim 2 , processor claim 2 , FPGA ...

METHOD AND DEVICE FOR MANAGING INPUT/OUTPUT (I/O) OF STORAGE DEVICE

Embodiments of the present disclosure relate to a method and a device of managing input/output of a storage device. The storage device at least includes a first I/O port and a second I/O port. The method comprises receiving a first I/O request for the storage device, and determining a type of the first I/O request. Based on the type of the first I/O request, the first I/O request is dispatched to the first I/O port or the second I/O port. If the first I/O request is a read request, the first I/O request may be dispatched to the first I/O port, and if the first I/O request is determined as a write request, the first I/O request may be dispatched to the second I/O port. The method may reuse at least one of the first I/O port or the second I/O port. 1. A method of managing an input/output (I/O) of a storage device , the storage device at least including a first I/O port and a second I/O port , the method comprising:receiving a first I/O request for the storage device; and in response to the first I/O request being a read request, dispatching the first I/O request to the first I/O port; and', 'in response to the first I/O request being a write request, dispatching the first I/O request to the second I/O port., 'dispatching the first I/O request based on a type of the first I/O request, comprising2. The method according to claim 1 , further comprising:reusing at least one of the first I/O port or the second I/O port based on priorities of a read operation and a write operation on the storage device.3. The method according to claim 2 , wherein the reusing comprises:receiving a second I/O request, the second I/O request being a read request; andin response to determining that the read operation on the storage device has a higher priority than the write operation, dispatching the second I/O request to the second I/O port.4. The method according to claim 2 , wherein the reusing comprises:receiving a third I/O request, the third I/O request being a write request; andin ...

電子回路を有する記憶媒体と該記憶媒体を有するコンピュータシステム

(57)【要約】 【課題】 電子回路部を有する記憶媒体がシステムの心 臓部となり本体側を周辺機器とすることにより、記憶媒 体の所有者が必要とするシステムを任意に構築できる記 憶媒体及び該記憶媒体を有するコンピュータシステム、 例えばパソコン、カーナビゲーション、多機能テレビジ ョン等を提供する。 【解決手段】 情報を記憶するディスク部３と情報を処 理する電子回路部２とを有するインテリジェント・ディ スク１であって、前記ディスク部３には少なくとも外部 装置１０を周辺機器として制御するためのプログラムが 記憶され、前記電子回路部２は前記プログラムを実行し て前記外部装置１０を周辺機器として制御する。

METHOD AND SYSTEM FOR ACCESSING TAPE DEVICES IN AN INFORMATIC SYSTEM.

Un método para ejecutar órdenes de cambiador de medio recibidas desde un ordenador personal anfitrión (2) en una biblioteca (8) de datos automatizada, la cual incluye un servidor (6) de cinta controlado por un gestor (42) de biblioteca que gestiona los medios de almacenamiento de la biblioteca de datos automatizada, cuyo método comprende los pasos de: proporcionar una orden de cambiador de medio por una línea general de transmisión (4) de interfaz para pequeños sistemas de ordenador, entre el ordenador personal anfitrión (2) y el servidor de cinta, caracterizado porque dicha orden de cambiador de medio comprende una indicación de la presencia de un número especificado de cartuchos de cinta en blanco en la línea general de transmisión de interfaz para pequeños sistemas de ordenador; transformar dicha orden de cambiador de medio procedente del ordenador personal en una orden compatible con el gestor de biblioteca para crear un número idéntico de volúmenes lógicos de una masa de memoria disponible en el servidor de cinta; y proporcionar la orden de cambiador de medio transformada al gestor de biblioteca. A method for executing media changer orders received from a host personal computer (2) in an automated data library (8), which includes a tape server (6) controlled by a library manager (42) that manages the automated data library storage media, the method of which comprises the steps of: providing a media changer order via a general transmission line (4) of interface for small computer systems, between the host personal computer (2) and the tape server, characterized in that said media changer order comprises an indication of the presence of a specified number of blank tape cartridges in the general interface transmission line for small computer systems; transforming said media changer order from the personal computer into an order compatible with the library manager to create an identical number of logical volumes of a mass of memory available on the tape server; and ...

Directory rebuild method and apparatus for maintaining and rebuilding directory information for compressed data on direct access storage device (DASD)

A method and apparatus for maintaining and rebuilding directory information for compressed data on a direct access storage device are provided. A directory of DASD compressed data is stored in the storage controller and directory information is periodically written to the DASD for compressed data written to the DASD. A drive write count (DWC) of each write operation to the DASD is maintained. A number of sectors in a compressed data page is identified for the drive write count. A sector sequence number is identified for each of the number of sectors in the compressed data page. A span for the compressed data page is identified for the drive write count. A page offset is identified for the identified number of sectors in the compressed data page. A deallocation status of a first page of an extent is identified. The extent is a block of sequential compressed data pages. Compressed data is written to the DASD with a compression sector header including the drive write, the identified number of sectors, the identified write length indicator, the identified page offset, the identified span, and the identified deallocation status. Directory recovery is performed by reading compressed data from the DASD and utilizing the compression sector header to enable reclamation of valid sequences of DASD sectors into compressed pages.

External storage system using semiconductor memory and control method thereof

Data compression method and structure for a direct access storage device

직접 액세스 저장 장치(direct access storage device; DASD)에 대한 데이터 압축 방법 및 압축 데이터 구조를 제공한다. DASD는 다수 개의 압축 그룹들로 분할된다. 각각의 압축 그룹들은 고정된 논리적 크기를 가진다. 디렉토리 테이블은 각 압축 그룹들내에 기록된다. 각각의 압축 그룹은 압축 데이터가 기록될 수 있는 적어도 하나의 압축 데이터 영역과 압축 데이터 예외가 기록될 수 있는 예외 영역을 가진다. 압축 데이터 예외는 대응하는 원래의 압축 데이터에 대해 원래의 저장 공간을 초과하는 갱신된 압축 데이터를 포함한다. A data compression method and a compressed data structure for a direct access storage device (DASD). The DASD is divided into a plurality of compression groups. Each compression group has a fixed logical size. A directory table is recorded in each compression group. Each compression group has at least one compressed data area in which compressed data can be recorded and an exception area in which a compressed data exception can be recorded. The compressed data exception includes updated compressed data that exceeds the original storage space for the corresponding original compressed data.

Nonsynchronous direct access memory control method and system therefor

내용 없음. No content.

コンピュータ・システム内のテープ装置にアクセスするための方法およびシステム

【課題】オープン・システム・ホスト・コンピュータが、単一のＳＣＳＩ接続機構によって、実際に本当のＳＣＳＩテープ・ライブラリを利用しているかのように、自動データ・ライブラリに接続できるようにすること。 【解決手段】自動テープ・ライブラリを有する仮想データ・ストレージ・サブシステム内に、ＳＣＳＩ（小型コンピュータ・システム・インタフェース）ライブラリ・ストレージのエミュレーションを提供する。これにより、論理ボリュームのデータにアクセスし、また論理ボリュームにデータを格納することができるようになる。ＳＣＳＩおよびその他のオープン・システム・インタフェースで使用されるような媒体チェンジャ・コマンドは、企業サーバ環境で共通に使用されるようなライブラリ機能コマンドにマッピングされる。これにより、企業サーバ環境で利用可能な仮想テープ・ストレージを、オープン・システム・ストレージとして、完全に透過的に利用できるようになる。 【選択図】図２

High-speed media priority release exclusion method

磁気テ−プ装置のデ−タ先取り制御方法及びその装置

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

包括多个存储装置的存储器设备

一个模拟磁盘驱动的固态存储器包括：将逻辑区段地址译至主存储地址的泽码设备；由部件中可控除非易失性存储器组成的主存储器；其特征在于，第一指示字用于指示主存储器中的未写区域，第二指示字用于指示紧接着含有所说的未写存储区的可擦除字块的下一个未擦除但可擦除字块；提供的控制装置可保证至少总有一个可擦除数字块处于第一和第二指示字间的擦除状态。

반도체 기억장치

플래시메모리를 사용한 반도체기억장치에 관한 것으로써, 데이타의 라이트시간을 단축하기 위해, 표준버스 (1), 여러개의 플래시메모리(4), 데이타를 일시 유지하기 위한 라이트버퍼메모리(5), 프로세서(2)를 갖고, 프로세서 (2)는 데이타의 라이트의 제어, 코맨드나 스테이터스의 수수 및 해석을 실행하고, 프로세서(2)는 연속으로 라이트되는 1워드의 데이타를 임의의 플래시메모리로 라이트하고, 그 플래시메모리로 다음의 1워드의 데이타의 라이트가 가능하게 될때까지의 대기시간 동안에 액세스가능한 플래시메모리로 연속해서 라이트한다. 이러한 반도체기억장치를 이용하는 것에 의해 라이트의 고속화를 도모할 수 있다.

Recording / reproducing method, recording / reproducing apparatus, optical disc

Universal multi-path driver for storage systems

Disc stroage controller

Recording status information is received from an upper hierarchy device, the information indicating one of a number of different types of recording parameters of the information as recorded on the medium. In response to the information and commands from the upper hierarchy device, the disc storage is controlled in accordance with the parameter indicated by the information on the medium to effect read and write opperations on the medium.

Media streamer

Information recording apparatus and method, program storage medium, and program

Disk array unit

A disk array unit connected to a host unit to give information thereto and receive information therefrom. The disk unit includes a plurality of disk units for storing information transmitted from the host unit and a management information recording device, formed by utilizing information storage areas in the disk units, for causing information relating to a logical unit for storing information from the host unit to correspond to information relating to the units. The invention further includes a control unit, when there is no access from the host unit to the logical unit for a predetermined time, for determining the disk units corresponding to the logical unit based on information recorded in the management information recording device and performing power saving of power supply for the disk units.

디지털비디오 재생시 기동대기시간을 감소시키는 장치 및 그 방법

1. 청구범위에 기재된 발명이 속한 기술분야 비디오재생시 기동 대기시간을 줄이는 데이타처리시스템. 2. 발명이 해결하려고 하는 기술적 과제 데이터 저장을 위해 계층적 시스템을 사용하여 이러한 저장계층중 가장 빠른 층에 속하지 않는 비디오 데이터를 엑세싱(accessing)하는 것과 본질적으로 연관된 기동 대기시간을 줄이는 장치 및 그 방법을 제공하는데 있다. 3. 발명의 해결방법의 요지 제1저장소자(예를 들면, 자기테이프)는 화상신호가 사용자에게 전달되기 전에 발생하는 지연시간을 가지고 있다. 사용자가 화상신호를 요청하기 전에, 화상신호의 일부분 즉 세그먼트(segment)가 제2저장소자(예를 들면, 자기디스크)로 미리 로드되는데 제2저장소자의 지연시간은 제1저장소자의 지연시간보다 작다. 화상신호가 요청되면, 제2저장소자에 저장된 화상신호의 일부분이 사용자에게 전달되는데, 이와 동시에 제1저장소자에 저장된 화상신호의 나머지 부분은 사용자에게 전달되기 위해 제2저장소자로 전달된다. 여기서 제1저장소자의 지연시간이 최소화 된다. 4. 발명의 중요한 용도 디지털 비디오의 재생장치.

Interface apparatus with system board for inspection of image decoder

An interface apparatus for connecting a system board with a video decoder is provided to inspect the video decoder without deteriorating the performance of the system board by connecting the system board and the video decoder by using two clock signals having different operating frequencies. An interface apparatus(20) for connecting a system board(10) having a system processor to a video decoder(30) includes a first clock signal supply(22), a second clock signal supply(24), a global interface(100), an input image interface(200), and an output image interface(300). The first clock signal supply provides a first clock signal at an operating frequency identical to the operating frequency of the system board. The second clock signal supply provides a second clock signal at an operating frequency identical to the operating frequency of the video decoder. The global interface transmits a global signal for controlling the video decoder from the system board to the video decoder. The input image interface synchronizes an encoded video signal with the first clock signal provided by the first clock signal supply and transmits the synchronized video signal to the video decoder. The output image interface synchronizes a decoded video signal received from the video decoder with the second clock signal provided by the second clock signal supply, synchronizes the decoded video signal with the first clock signal, and transmits the synchronized video signal to the system board.

Batch erase nonvolatile memory and semiconductor disk device using the same

Multiple control system of magnetic disk

Optical disk, optical disk drive, and optical disk write / read method

Video placement system and method for balancing video placement among multiple storage devices in a video server

METHOD AND DEVICE FOR CONTROLLING A MAGNETOSCOPE WITH A COMPUTER

Data storage device capable of storing multiple sets of history information on input/output processing of security data without duplication

一种数据存储设备包括安全数据存储部分(250)，所述安全数据存储部分(250)包括日志存储器(253)。所述日志存储器(253)由多个存储体(2531-253N)形成，并且将历史信息以环状方式存储在多个存储体(2531-253N)中。分别由地址(0-(N-1))来指定多个存储体(2531-253N)。分别存储在存储体(2531-253N)中的每一历史信息项包括管理号区域(2541)、许可证ID(LID)区域(2542)、Ks2x区域(2543)、ST1区域(2544)、ST2区域(2545)、KPcmy区域(2546)和LBA区域(2547)。

Apparatus and method for recording a digital signal

본 발명에 따라 기록 매체상에 형성되어 있는 트랙에 디지털 신호를 기록하는 디지털 신호 기록 장치가 제공되며, 이 디지털 신호 기록 장치는 전체 기록 매체보다 작고 복수의 트랙으로 형성된 단위를 결정하는 수단과, 상기 단위의 최종 트랙에 상기 단위의 최종 트랙을 지시해 주는 신호를 기록하는 수단과, 상기 단위의 최종 트랙을 지시해 주는 상기 신호를 검출하는 수단과, 상기 검출을 기초로 디지털 신호를 중복 기록하는 수단을 구비하고 있다. According to the present invention there is provided a digital signal recording apparatus for recording a digital signal on a track formed on a recording medium, the digital signal recording apparatus comprising means for determining a unit smaller than the entire recording medium and formed of a plurality of tracks; Means for recording a signal indicative of the last track of the unit in the last track of the unit, means for detecting the signal indicative of the last track in the unit, and means for redundantly recording a digital signal based on the detection Equipped with.

Flash EEprom system

A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected combination may also be de-selected during the erase operation. Another improvement is the ability to remap and replace defective cells with substitute cells. The remapping is performed automatically as soon as a defective cell is detected. When the number of defects in a Flash sector becomes large, the whole sector is remapped. Yet another improvement is the use of a write cache to reduce the number of writes to the Flash EEprom memory, thereby minimizing the stress to the device from undergoing too many write/erase cycling.

Disc controller

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Control method of flash memory and information processing apparatus using the same

없음. none.

File system with read/write and read only storage

A file system which has component file systems including a primary file system which is read/write and a number of dump file systems which are read only. Each dump file system is created from the primary file system by means of a dumpoperation and conserves the state of the primary file system at the time the dump operation was performed. Component file systems share read only storage elementswith older component file systems. The file system is implemented on a system including a file server, a magnetic disk mass storage device, and an optical write once-read many (WORM) disk. The magnetic disk mass storage device contains the read/write storage elements of the primary file system and encached read only storage elements from the WORM disk. Space is reserved on the unwritten portion of the WORM disk for the read-write storage elements of the primary file system.Techniques for performing file operations including opening, reading, writing, creating, and deleting files are disclosed, as well as techniques for performing the operations of dumping and restoring the primary file system.

File management method for partially rewritable storage media

Method and file system for assigning file blocks to storage space in a RAID disk system

The present invention is a method for integrating a file system with a RAID array (1030) that exports precise information about the arrangement of data blocks in the RAID subsystem (1030). The system uses explicit knowledge of the underlying RAID disk layout to schedule disk allocation. The present invention uses separate current-write location (CWL) pointers for each disk (1022) in the disk array (1030) where the pointers simply advance through disks (1022) as writes occur. The algorithm used has two primary goals. The first goal is to keep the CWL pointers as close together as possible, thereby improving RAID (1030) efficiency by writing to multiple blocks in the stripe simultaneously. The second goal is to allocate adjacent blocks of a file on the same disk (1022), thereby improving read back performance. The first goal is satisfied by always writing on the disk (1022) with the lowest CWL pointer. For the second goal, another disk (1024) is chosen only when the algorithm starts allocating space for a new file, or when it has allocated N blocks on the same disk (1022) for a single file. The result is that CWL pointers are never more than N blocks apart on different disks (1024), and large files have N consecutive blocks on the same disk (1022).

Device driver for accessing computer files

A computer device driver for accessing compressed files held in archives in a memory device, the device driver comprising: means for reading a compressed file from an archive in the memory device, decompressing the file in RAM and retaining the decompressed file in RAM in whole or in part so that operations to the memory device can be performed on the decompressed file by the operating system without having first to write the decompressed file to the memory device. The device driver also comprises means for accessing the file in said RAM and changing the contents of the file; and for returning the file to the archive in said memory device.

Fibre channel controller having both inbound and outbound control units for simultaneously processing both multiple inbound and outbound sequences

A FC controller that interfaces between a host system and a 10-bit FC interface is herein described. The FC controller acts as both a FCP initiator and FCP target device and has the capability to receive and process SCSI I/O requests received from a FC and a host system. The FC controller can process both multiple inbound and outbound sequences simultaneously since it does not employ a processor-based architecture. Rather, the FC controller relies on specialized circuitry that can operate in a relatively independent manner so that multiple tasks are performed concurrently thereby achieving a faster throughput and data transfer rate.

Scalable file server with highly available pairs

The invention provides a file server system and a method for operating that system, which is easily scalable in number and type of individual components. A plurality of file servers are coupled using inter-node connectivity, such as an inter-node network, so that any one node can be accessed from any other node. Each file server includes a pair of file server nodes, each of which has a memory and each of which conducts file server operations by simultaneously writing to its own memory and to that of its twin, the pair being used to simultaneously control a set of storage elements such as disk drives. File server requests directed to particular mass storage elements are routed among file servers using an inter-node switch and processed by the file servers controlling those particular storage elements. The mass storage elements are disposed and controlled to form a redundant array, such as a RAID storage system. The inter-node network and inter-node switch are redundant, so that no single point of failure prevents access to any individual storage element. The file servers are disposed and controlled to recognize failures of any single element in the file server system and to provide access to all mass storage elements despite any such failures.

Reserving file system blocks

A system that manages a file system for a file server. A file operation is received that signals a reservation operation for a file having a file size. Preferably, the file system uses a write anywhere file system layout, the file operation that signals the reservation operation is a zero length write request, and the file operation that signals the reservation operation includes a parameter that specifies the file size. A number of blocks needed to be reserved to accommodate the file is computed. Preferably, computing the number of blocks needed to be reserved to accommodate the file includes determining a total number of direct and indirect blocks needed to accommodate the file size, and subtracting a total number of blocks already allocated for the file and a total number of cached unallocated blocks for the file from the total number of direct and indirect blocks needed to accommodate the file size. A number of unallocated blocks is reserved in the file system, with the number of reserved blocks equal to the number of blocks needed to be reserved to accommodate the file. Reserving the number of blocks preferably includes setting a flag in an inode for the file that indicates blocks have been reserved for the file, and incrementing a reserved block count in a file system information block by the number of blocks needed.

Signal reproducing apparatus, signal reproducing systems and methods, signal processing methods, and data thermal processing methods

기억 장치내 기록 매체의 데이타가 섹터마다 판독되어, 이 CPU는, CPU 의 제어하에 있는 링 버퍼에 저장되고, 시스템상의 부하가 변화함에 따라 버퍼로부터의 판독 속도를 변화시킬 수 있다. 이 링 버퍼에 저장된 데이타는 프레임마다 판독되어, 출력 장치로 출력된다. 상기 기록 매체로부터 판독된 데이타가 실시간으로 재생될 때, 데이타는, 데이타 손실을 최소화하고 시간적 품질을 개선하면서, 실질적으로 기록 매체로부터의 데이타 판독 속도에 대응하는 속도로 재생될 수 있다. Data of the recording medium in the storage device is read out sector by sector, and this CPU is stored in a ring buffer under the control of the CPU, and can change the read speed from the buffer as the load on the system changes. Data stored in this ring buffer is read out frame by frame and output to an output device. When data read from the recording medium is reproduced in real time, the data can be reproduced at a rate substantially corresponding to the data reading speed from the recording medium, while minimizing data loss and improving temporal quality.

Low-overhead storage cluster configuration locking

A storage control apparatus, in communication with a cluster of storage devices in a storage network having plural administrator systems, comprises a cluster lock requester component, a cluster lock receiver component and a configuration component, wherein, responsive to receipt of a cluster lock by said cluster lock receiver component, the configuration component is operable to configure a logical resource object within said cluster. The apparatus may also include a cluster lock granter component operable to grant a cluster lock to the cluster lock receiver component responsive to said cluster lock requester component. A method of operating a storage control apparatus includes method steps corresponding to functional components of an apparatus and may be embodied in computer program codes.

System and method for identifying shared virtual memory in a computer cluster

For use with a computer cluster having virtual memory logical devices associated therewith, a system and method for determining which of the virtual memory logical devices are shared devices and a computer cluster employing such system or method. The system includes: (1) a polling circuit that retrieves volume information from at least some of the virtual memory logical devices and (2) a matching circuit that determines which ones of the at least some of the virtual memory logical devices are shared devices as a function of the volume information.

Method, system, program, and data structures for restricting host access to a storage space

A method, system, program, and data structure for restricting host access to at least one logical device. Each logical device comprises a section of physical storage space that is non-overlapping with the physical storage space associated with other logical devices. At least one logical device and at least one host are assigned to a cluster group. A cluster group is defined such that hosts that are not in a particular cluster group cannot access the logical devices that are assigned to the cluster group. Further, within each cluster group, a logical number is assigned to each logical device in the cluster group such that no host member of that cluster group uses the assigned logical number to access another logical device. The hosts in the cluster group use the logical number to access the logical device to which the logical number is assigned.