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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 358928. Отображено 100.
05-01-2012 дата публикации

Light emitting device and method of fabricating the same

Номер: US20120001218A1
Автор: Hwan Hee Jeong, Ji Hyung Moon, June O. Song, Kwang Ki CHOI, Sang Youl Lee, Se Yeon Jung, Tae-yeon Seong
Принадлежит: LG Innotek Co Ltd

Provided are a light emitting device and a method of fabricating the same. The light emitting device includes a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, the active layer being formed of a semiconductor material. Also, the light emitting device further includes a current spreading layer comprising a plurality of carbon nanotube bundles physically connected to each other on one of the first and second conductive type semiconductor layers.

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Номер записи: 1
05-01-2012 дата публикации

Double molded chip scale package

Номер: US20120001322A1
Автор: Luke England, Yong Liu
Принадлежит: Fairchild Semiconductor Corp

Chip scale semiconductor packages and methods for making and using the same are described. The chip scale semiconductor packages (CSPs) contain a die with an integrated circuit device, a patterned plating layer, and a second interconnect structure formed from a Cu etched substrate that has a portion of an upper surface connected to the patterned plating layer, a side surface, and a bottom surface. The die can be attached to the patterned plating layer by a first interconnect structure that uses wirebonding or that uses a flip chip attachment process. The CSP contains a double molded structure where a first molding layer encapsulates the die, the patterned plating layer, the first interconnect structure, and the upper surface of the second interconnect structure. The second molding layer encapsulates the side surface of the second interconnect structure without encapsulating the bottom surface of the second interconnect structure. With such a configuration, the second molding layer helps control warpage during the manufacturing process and no printed circuit board (PCB) substrate is needed when the package is used in an electronic device since the signal routing is performed by the second interconnect structure. Other embodiments are described.

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Номер записи: 2
05-01-2012 дата публикации

Semiconductor device

Номер: US20120001341A1
Автор: Akihiro Niimi, Shigeo Ide
Принадлежит: Denso Corp

The semiconductor device has a unit stack body including a plurality of units stacked on one another. Each unit includes a power terminal constituted of a lead part and a connection part. The connection part is formed with a projection and a recess. When the units are stacked on one another, the projection of one unit is fitted to the recess of the adjacent unit, so that the power terminals of the respective unit are connected to one another.

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Номер записи: 3
05-01-2012 дата публикации

Semiconductor package having a stacked structure

Номер: US20120001347A1
Автор: Chan-Min Han, Jin-yang Lee, Kil-Soo Kim
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor package includes a substrate, a first semiconductor chip stacked on the substrate and a second semiconductor chip stacked on the first semiconductor chip. In the semiconductor package, the second semiconductor chip is rotated to be stacked on the first semiconductor chip. The semiconductor package is used in an electronic system.

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Номер записи: 4
05-01-2012 дата публикации

High-precision resistor and trimming method thereof

Номер: US20120001679A1
Автор: Antonello Santangelo, Stefania Maria Serena PRIVITERA
Принадлежит: STMICROELECTRONICS SRL

An embodiment of an electrically trimmable electronic device, wherein a resistor of electrically modifiable material is formed by a first generally strip-shaped portion and by a second generally strip-shaped portion, which extend transversely with respect to one another and are in direct electrical contact in a crossing area. The first and second portions have respective ends connected to own contact regions, coupled to a current pulse source and are made of the same material or of the same composition of materials starting from a same resistive layer of the material having electrically modifiable resistivity, for example, a phase-change material, such as a Ge—Sb—Te alloy, or polycrystalline silicon, or a metal material used for thin-film resistors. The trimming is performed by supplying a trimming current to the second portion so as to heat the crossing area and modify the resistivity thereof, without flowing longitudinally in the first portion.

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Номер записи: 5
05-01-2012 дата публикации

Driving circuit and liquid crystal display device including the same

Номер: US20120002146A1
Автор: Jin-Cheol Hong, Min-Hwa Kim
Принадлежит: Individual

A tape carrier package (TCP) includes a film, a plurality of output leads and a plurality of input leads on the film, the plurality of output leads and the plurality of input leads being disposed on different sides, first and second TCP alignment marks arranged on opposing sides of the plurality of output leads, and a third TCP alignment mark at a central portion of the plurality of output leads.

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Номер записи: 6
05-01-2012 дата публикации

Copper interconnection structure and method for forming copper interconnections

Номер: US20120003390A1
Автор: Akihiro Shibatomi, Junichi Koike
Принадлежит: Advanced Interconnect Materials LLC

A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer, and a diffusion barrier layer formed between the insulating layer and the interconnection body. The diffusion barrier layer includes an oxide layer including manganese having a compositional ratio of oxygen to manganese (y/x) less than 2.

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Номер записи: 7
05-01-2012 дата публикации

Active energy ray-curable pressure-sensitive adhesive for re-release and dicing die-bonding film

Номер: US20120003470A1
Автор: Chie Kitano, Hironao OTAKE, Katsuhiko Kamiya, Masatsugu KOSO, Mika Okada, Shuhei Murata, Takeshi Matsumura, Tomokazu Takahashi
Принадлежит: Nitto Denko Corp

Provided is an active energy ray-curable pressure-sensitive adhesive for re-release, which has a small influence on an environment or a human body, can be easily handled, can largely change its pressure-sensitive adhesiveness before and after irradiation with an active energy ray, and can express high pressure-sensitive adhesiveness before the irradiation with the active energy ray and express high releasability after the irradiation with the active energy ray. The active energy ray-curable pressure-sensitive adhesive for re-release includes an active energy ray-curable polymer (P), in which the polymer (P) includes one of a polymer obtained by causing a carboxyl group-containing polymer (P3) and an oxazoline group-containing monomer (m3) to react with each other, and a polymer obtained by causing an oxazoline group-containing polymer (P4) and a carboxyl group-containing monomer (m2) to react with each other.

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Номер записи: 8
05-01-2012 дата публикации

Method for manufacture of integrated circuit package system with protected conductive layers for pads

Номер: US20120003830A1
Автор: Haijing Cao, Qing Zhang, Yaojian Lin
Принадлежит: Individual

A method for manufacture of an integrated circuit package system includes: providing an integrated circuit die having a contact pad; forming a protection cover over the contact pad; forming a passivation layer having a first opening over the protection cover with the first opening exposing the protection cover; developing a conductive layer over the passivation layer; forming a pad opening in the protection cover for exposing the contact pad having the conductive layer partially removed; and an interconnect directly on the contact pad and only adjacent to the protection cover and the passivation layer.

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Номер записи: 9
11-07-2017 дата публикации

Выводная рамка мощной интегральной микросхемы

Номер: RU0000172495U1
Автор: Александр Владимирович Минин, Евгений Викторович Абашин, Константин Львович Афанасьев, Николай Александрович Брюхно
Принадлежит: Закрытое акционерное общество "ГРУППА КРЕМНИЙ ЭЛ"

Использование: для создания выводных рамок мощных интегральных схем. Сущность полезной модели заключается в том, что выводная рамка мощной интегральной микросхемы содержит теплорастекатель с участком присоединения кристалла с рифлением, и траверсы для присоединения гибких выводов, рифление теплорастекателя выполено виде сетки из канавок, расположенных в двух взаимоперпендикулярных направлениях с шагомпричем:где- наибольший диаметр гибкого вывода, соединяющий контактную площадку с теплорастекателем,наименьший линейный размер кристалла. Технический результат: обеспечение возможности повышения качества мощной микросхемы. 2 ил. Ц 1 172495 ко РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ 27; 22, 7 р», 77 8? аа) ил < < $ >< оо п РЦ ‘’ (50) МПК НО. 23/495 (2006.01) (12) ОПИСАНИЕ ПОЛЕЗНОЙ МОДЕЛИ К ПАТЕНТУ (21)(22) Заявка: 2017109009, 17.03.2017 (24) Дата начала отсчета срока действия патента: 17.03.2017 Дата регистрации: 11.07.2017 Приоритет(ы): (22) Дата подачи заявки: 17.03.2017 (45) Опубликовано: 11.07.2017 Бюл. № 20 Адрес для переписки: 241037, г. Брянск, ул. Красноармейская, 103, ЗАО "ГРУППА КРЕМНИЙ ЭЛ", Технический отдел (72) Автор(ы): Абашин Евгений Викторович (КО), Афанасьев Константин Львович (КО), Брюхно Николай Александрович (КО), Минин Александр Владимирович (КО) (73) Патентообладатель(и): Закрытое акционерное общество "ГРУ1ИТА КРЕМНИЙ ЭЛ" (ВО) (56) Список документов, цитированных в отчете о поиске: ВО 2040075 С1, 20.07.1995. ВЧ 2222074 СТ, 20.01.2004. ВО 2193260 СТ, 20.11.2002. 05 5299091 АТ, 29.03.1994. 05 5633528 А1, 27.05.1997 . (54) ВЫВОДНАЯ РАМКА МОЩНОЙ ИНТЕГРАЛЬНОЙ МИКРОСХЕМЫ (57) Реферат: Использование: для создания выводных рамок мощных интегральных схем. Сущность полезной модели заключается в том, что выводная рамка мощной интегральной микросхемы содержит теплорастекатель с участком присоединения кристалла с рифлением, и траверсы для присоединения гибких выводов, рифление теплорастекателя выполено виде сетки из канавок, ...

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Номер записи: 10
12-01-2012 дата публикации

Method for molecular adhesion bonding with compensation for radial misalignment

Номер: US20120006463A1
Автор: Gweltaz Gaudin
Принадлежит: Soitec SA

A method for bonding a first wafer on a second wafer by molecular adhesion, where the wafers have an initial radial misalignment between them. The method includes bringing the two wafers into contact so as to initiate the propagation of a bonding wave between the two wafers while a predefined bonding curvature is imposed on at least one of the two wafers during the contacting step as a function of the initial radial misalignment.

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Номер записи: 11
12-01-2012 дата публикации

Wiring board and method for manufacturing the same

Номер: US20120006592A1
Автор: Makoto Terui, Shigeru Yamada, Shinji OUCHI, Yoshinori Shizuno
Принадлежит: Ibiden Co Ltd

A wiring board including a first insulation layer, a conductive pattern formed on the first insulation layer, a second insulation layer formed on the conductive pattern and the first insulation layer and having an opening portion exposing at least a portion of the conductive pattern, and a connection conductor formed in the opening portion of the second insulation layer such that the connection conductor is positioned on the portion of the conductive pattern. The connection conductor has a tip portion which protrudes from a surface of the second insulation layer and which has a tapered side surface tapering toward an end of the tip portion.

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Номер записи: 12
12-01-2012 дата публикации

Heat dissipating material and semiconductor device using same

Номер: US20120007017A1
Автор: Chisato Hoshino, Shingo Tabei
Принадлежит: MOMENTIVE PERFORMANCE MATERIALS JAPAN LLC

Disclosed is a heat dissipating material which is interposed between a heat-generating electronic component and a heat dissipating body. This heat dissipating material contains (A) 100 parts by weight of a silicone gel cured by an addition reaction having a penetration of not less than 100 (according to ASTM D 1403), and (B) 500-2000 parts by weight of a heat conductive filler. Also disclosed is a semiconductor device comprising a heat-generating electronic component and a heat dissipating body, wherein the heat dissipating material is interposed between the heat-generating electronic component and the heat dissipating body.

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Номер записи: 13
12-01-2012 дата публикации

Light emitting module

Номер: US20120007076A1
Автор: Yun Min CHO
Принадлежит: LG Innotek Co Ltd

Disclosed is a light emitting module capable of representing improved heat radiation and improved light collection. there is provided a light emitting module. The light emitting module includes a metallic circuit board formed therein with a cavity, and a light emitting device package including a nitride insulating substrate attached in the cavity of the metallic circuit board, at least one pad part on the nitride insulating substrate, and at least one light emitting device attached on the pad part.

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Номер записи: 14
12-01-2012 дата публикации

Light emitting device package and a lighting device

Номер: US20120007122A1
Автор: Yong Seok Choi
Принадлежит: Yong Seok Choi

Provided are a light emitting device package and a lighting device. The light emitting device package includes a base, a light emitting device on the base, a plurality of electrode pads on the base, the plurality of electrode pads electrically connected to the light emitting device, a frame disposed on the base, wherein a size of the frame is smaller than a size of the base, a silver layer on a portion of the plurality of electrode pads, the silver layer directly contacted with the frame and an optical member covering the light emitting device.

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Номер записи: 15
12-01-2012 дата публикации

Light emitting apparatus, and method for manufacturing the same, and lighting system

Номер: US20120007123A1
Автор: Bum Chul Cho
Принадлежит: Bum Chul Cho

A light emitting apparatus includes: a substrate including a first conductive type impurity; a first heatsink and a second heatsink on a first region and a second region of the substrate; second conductive type impurity regions on the substrate and electrically connected to the first heatsink and the second heatsink, respectively; a first electrode electrically connected to the first heatsink on the substrate; a second electrode electrically connected to the second heatsink on the substrate; and a light emitting device electrically connected to the first electrode and the second electrode on the substrate.

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Номер записи: 16
12-01-2012 дата публикации

Protecting bond pad for subsequent processing

Номер: US20120007199A1
Автор: Helen Hongwei Li, Jeanne M. McNamara, John T. Gasner, Joy Ellen Jones, Phillip J. Benzel
Принадлежит: INTERSIL AMERICAS LLC

A method for opening a bond pad on a semiconductor device is provided. The method comprises removing a first layer to expose a first portion of the bond pad and forming a protective layer over the exposed first portion of the bond pad. The method further comprises performing subsequent processing of the semiconductor device and removing the protective layer to expose a second portion of the bond pad.

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Номер записи: 17
12-01-2012 дата публикации

Method for Reducing Chip Warpage

Номер: US20120007220A1
Автор: Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai, Ting-Hau Wu
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the opening, wherein substantially no portion of the organic material is outside of the opening and on the back surface of the wafer; and baking the organic material to cause a contraction of the organic material.

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Номер записи: 18
12-01-2012 дата публикации

Semiconductor device

Номер: US20120007224A1
Автор: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
Принадлежит: Hitachi Hokkai Semiconductor Ltd, Renesas Electronics Corp

In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

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Номер записи: 19
12-01-2012 дата публикации

System-in-a-package based flash memory card

Номер: US20120007226A1
Автор: Hem Takiar, Michael W. Patterson, Robert C. Miller, Shrikar Bhagath, Warren Middlekauff
Принадлежит: SanDisk Technologies LLC

A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.

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Номер записи: 20
12-01-2012 дата публикации

Method of forming cu pillar capped by barrier layer

Номер: US20120007231A1
Автор: Wei Sen CHANG
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A nickel barrier layer is formed on an upper sidewall surface of a Cu pillar. A mask layer with an opening for defining the Cu pillar window has an upper portion and a lower portion. The upper portion of the mask layer is removed after the formation of the Cu pillar so as to expose the upper sidewall surface of the Cu pillar. The nickel barrier layer is then deposited on the exposed sidewall surface of the Cu pillar followed by removing and the lower portion of the mask layer.

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Номер записи: 21
12-01-2012 дата публикации

Microelectronic packages with dual or multiple-etched flip-chip connectors

Номер: US20120007232A1
Автор: Belgacem Haba
Принадлежит: TESSERA RESEARCH LLC

A packaged microelectronic element includes a microelectronic element having a front surface and a plurality of first solid metal posts extending away from the front surface. A substrate has a major surface and a plurality of conductive elements exposed at the major surface and joined to the first solid metal posts. In particular examples, the conductive elements can be bond pads or can be second posts having top surfaces and edge surfaces extending at substantial angles away therefrom. Each first solid metal post includes a base region adjacent the microelectronic element and a tip region remote from the microelectronic element, the base region and tip region having respective concave circumferential surfaces. Each first solid metal post has a horizontal dimension which is a first function of vertical location in the base region and which is a second function of vertical location in the tip region.

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Номер записи: 22
12-01-2012 дата публикации

Semiconductor device and package

Номер: US20120007236A1
Автор: Jin Ho Bae
Принадлежит: Hynix Semiconductor Inc

A semiconductor device includes a semiconductor substrate having an upper surface, a lower surface, a first side and a second side, wherein the lower surface has a slope so that the first side is thicker than the second side, and a circuit pattern including a bonding pad on the upper surface of the semiconductor substrate.

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Номер записи: 23
12-01-2012 дата публикации

Resin-Encapsulated Semiconductor Device

Номер: US20120007247A1
Автор: Motoharu Haga, Shoji Yasunaga, Yasumasa Kasuya
Принадлежит: ROHM CO LTD

A resin-sealed semiconductor device includes a semiconductor chip including a silicon substrate; a die pad on which the semiconductor chip is secured via a solder layer; a sealing resin layer sealing the semiconductor chip; and lead terminals connected electrically with the semiconductor chip. One end portion of the lead terminals is covered by the sealing resin layer. The die pad and the lead terminals are formed of copper and a copper alloy, and the die pad is formed with a thickness larger than a thickness of the lead terminals, which is a thickness of 0.25 mm or more.

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Номер записи: 24
12-01-2012 дата публикации

Redistribution layers for microfeature workpieces, and associated systems and methods

Номер: US20120007256A1
Автор: David Pratt
Принадлежит: Micron Technology Inc

Redistribution layers for microfeature workpieces, and associated systems and methods are disclosed. One method for processing a microfeature workpiece system includes positioning a pre-formed redistribution layer as a unit proximate to and spaced apart from a microfeature workpiece having an operable microfeature device. The method can further include attaching the redistribution layer to the microfeature workpiece and electrically coupling the redistribution layer to the operable microfeature device.

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Номер записи: 25
12-01-2012 дата публикации

Method and system for measuring patterned structures

Номер: US20120008147A1
Автор: Boaz Brill, Moshe Finarov
Принадлежит: Nova Measuring Instruments Ltd

A method and system are presented for determining a line profile in a patterned structure, aimed at controlling a process of manufacture of the structure. The patterned structure comprises a plurality of different layers, the pattern in the structure being formed by patterned regions and un-patterned regions. At least first and second measurements are carried out, each utilizing illumination of the structure with a broad wavelengths band of incident light directed on the structure at a certain angle of incidence, detection of spectral characteristics of light returned from the structure, and generation of measured data representative thereof. The measured data obtained with the first measurement is analyzed, and at least one parameter of the structure is thereby determined. Then, this determined parameter is utilized, while analyzing the measured data obtained with the second measurements enabling the determination of the profile of the structure

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Номер записи: 26
12-01-2012 дата публикации

Method of fabricating light emitting device

Номер: US20120009701A1
Автор: Yu-Sik Kim
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A method of fabricating a light emitting device includes forming a plurality of light emitting elements on light emitting element mounting regions, respectively, of a substrate, forming lens supports on the light emitting element mounting regions, respectively, are raised relative to isolation regions of the substrate located between neighboring ones of the light emitting element mounting regions, and forming lenses covering the light emitting elements on the lens support patterns, respectively.

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Номер записи: 27
12-01-2012 дата публикации

Power semiconductor module and fabrication method

Номер: US20120009733A1
Автор: Eladio Clemente Delgado, Ernest Wayne Balch, Kevin Matthew Durocher, Paul Alan McConnelee, Raymond Albert Fillion, Richard Alfred Beaupre, Stephen Daley Arthur
Принадлежит: General Electric Co

A power semiconductor module includes: an interconnect layer including an electrical conductor patterned on a dielectric layer, the electrical conductor including a power coupling portion having a thickness sufficient to carry power currents and a control coupling portion having a thickness thinner than that of the power coupling portion; and a semiconductor power device physically coupled to the interconnect layer and electrically coupled to the power coupling portion of the electrical conductor.

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Номер записи: 28
19-01-2012 дата публикации

Temporary substrate, transfer method and production method

Номер: US20120012244A1
Автор: Gregory Riou
Принадлежит: Soitec SA

The present invention relates to a method of manufacturing a temporary substrate, the temporary substrate thus produced, and a method of using the temporary substrate for transfer of a thin layer from an original substrate to a final substrate. The temporary substrate has a principle part of the original substrate and a surface layer thereon that includes a plurality of inserts formed of a material having a coefficient of thermal expansion different from that of the material constituting the rest of the surface layer. When exposed to heat treatment, these inserts form detachment zones between the upper face of an attached thin layer and the temporary substrate.

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Номер записи: 29
19-01-2012 дата публикации

Interconnections for flip-chip using lead-free solders and having reaction barrier layers

Номер: US20120012642A1
Автор: Balaram Ghosal, Da-Yuan Shih, Donna S. Zupanski-Nielsen, Henry A. Nye, III, Keith E. Fogel, Paul A. Lauro, Stephen Kilpatrick, Sung K. Kang
Принадлежит: International Business Machines Corp

An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components. With a two-layer ball-limiting composition comprising an adhesion/reaction barrier layer, wherein the adhesion/reaction barrier layer serves both as an adhesion layer and a reaction barrier layer, the adhesion/reaction barrier layer can be comprised of a material selected from the group consisting of Zr and ZrN

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Номер записи: 30
19-01-2012 дата публикации

Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing

Номер: US20120012812A1
Автор: Cem Basceri, Thomas Gehrke
Принадлежит: Micron Technology Inc

Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.

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Номер записи: 31
19-01-2012 дата публикации

Light emitting device having a lateral passibation layer

Номер: US20120012878A1
Автор: Sun Kyung Kim
Принадлежит: Sun Kyung Kim

Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, and a passivation layer protecting a surface of the light emitting structure. The passivation layer includes a first passivation layer on a top surface of the light emitting structure and a second passivation layer having a refractive index different from that of the first passivation layer, the second passivation layer being disposed on a side surface of the light emitting structure. The second passivation layer has a refractive index greater than that of the first passivation layer.

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Номер записи: 32
19-01-2012 дата публикации

Methods of forming semiconductor chip underfill anchors

Номер: US20120012987A1
Автор: Neil McLellan, Roden R. Topacio
Принадлежит: Individual

Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.

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Номер записи: 33
19-01-2012 дата публикации

Conductive Sidewall for Microbumps

Номер: US20120012998A1
Автор: Arvind Chandrasekaran, Christine S. Hay-Riege, Shiqun Gu
Принадлежит: Qualcomm Inc

Electromigration in microbump connections causes voids in the microbumps, which reduces the lifetime of an integrated circuit containing the microbump. Electromigration lifetime may be increased in microbumps by forming a copper shell around the solder. The copper shell of one microbump contacts the copper shell of a second microbump to enclose the solder of the microbump connection. The copper shell allows higher current densities through the microbump. Thus, smaller microbumps may be manufactured on a smaller pitch without suffering failure from electromigration. Additionally, the copper shell reduces shorting or bridging between microbump connections on a substrate.

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Номер записи: 34
19-01-2012 дата публикации

Semiconductor-encapsulating adhesive, semiconductor-encapsulating film-form adhesive, method for producing semiconductor device, and semiconductor device

Номер: US20120012999A1
Автор: Kazutaka Honda, Tetsuya Enomoto, Yuuki Nakamura
Принадлежит: Hitachi Chemical Co Ltd

The present invention relates to a semiconductor-encapsulating adhesive, a semiconductor-encapsulating film-form adhesive, a method for producing a semiconductor device, and a semiconductor device. The present invention provides a semiconductor-encapsulating adhesive comprising (a) an epoxy resin, and (b) a compound formed of an organic acid reactive with an epoxy resin and a curing accelerator.

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Номер записи: 35
19-01-2012 дата публикации

Package structure

Номер: US20120013002A1
Автор: Shih-Ping Hsu
Принадлежит: Unimicron Technology Corp

Disclosed is a package structure including a semiconductor chip disposed in a core board having a first surface and an opposite second surface. The package structure further includes a plurality of first and second electrode pads disposed on an active surface and an opposite inactive surface of the semiconductor chip respectively, the semiconductor chip having a plurality of through-silicon vias for electrically connecting the first and second electrode pads. As a result, the semiconductor chip is electrically connected to the two sides of the package structure via the through-silicon vias instead of conductive through holes, so as to enhance electrical quality and prevent the inactive surface of the semiconductor chip from occupying wiring layout space of the second surface of the core board to thereby increase wiring layout density and enhance electrical performance.

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Номер записи: 36
19-01-2012 дата публикации

Stacked semiconductor package and method of fabricating the same

Номер: US20120013026A1
Автор: Won-Gil HAN
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A stacked semiconductor package and an electronic system, the stacked semiconductor package including a plurality of semiconductor chips, a set of the semiconductor chips being stacked such that an extension region of a top surface of each semiconductor chip of the set extends beyond an end of a semiconductor chip stacked thereon to form a plurality of extension regions; and a plurality of protection layers on the extension regions and on an uppermost semiconductor chip of the plurality of semiconductor chips.

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Номер записи: 37
19-01-2012 дата публикации

Stacked microelectronic packages having at least two stacked microelectronic elements adjacent one another

Номер: US20120013028A1
Автор: Belgacem Haba, Ilyas Mohammed
Принадлежит: Tessera LLC

A microelectronic assembly includes first and second microelectronic elements. Each of the microelectronic elements has oppositely-facing first and second surfaces and edges bounding the surfaces. The first microelectronic element is disposed on the second microelectronic element with the second surface of the first microelectronic element facing toward the first surface of the second microelectronic element. The first microelectronic element preferably extends beyond at least one edge of the second microelectronic element and the second microelectronic element preferably extends beyond at least one edge of the first microelectronic element. A first edge of the first microelectronic element has a length that is smaller than a first edge of the second microelectronic element. A second edge of the first microelectronic element has a length that is greater than the second edge of the second microelectronic element.

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Номер записи: 38
19-01-2012 дата публикации

Substrate processing apparatus, substrate processing method and non-transitory computer storage medium

Номер: US20120013730A1
Автор: Norihisa Koga
Принадлежит: Tokyo Electron Ltd

A substrate processing apparatus includes: a holding unit holding a substrate; a rotation driving unit rotating the substrate held on the holding unit; a moving mechanism moving the holding unit between a delivery position and an edge exposure position; an exposure unit provided on the edge exposure position side and exposing an edge portion of a coating film above the substrate held on the holding unit; an image capturing unit provided on the edge exposure position side and above the exposure unit and capturing an image of the substrate held on the holding unit; and a direction change unit changing a direction of an optical path formed between the substrate held on the holding unit and the image capturing unit. The direction change unit includes a first reflecting mirror, a second reflecting mirror, and a third reflecting mirror.

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Номер записи: 39
19-01-2012 дата публикации

Support structures for various apparatuses including opto-electrical apparatuses

Номер: US20120015163A1
Автор: Gang He, Melissa Archer, Thomas J. Gmitter
Принадлежит: Awbscqemgk Inc

Present embodiments generally relate to support structures for thin film components and methods for fabricating the support structures. In one embodiment, an apparatus comprises a device structure including portions of an electronic device; a support structure coupled to the device structure; wherein the support structure supplements features of the device structure and the support structure includes: a metal component coupled to the device structure; and a non-metal component coupled to the metal component. The support component can supplement structural and mechanical integrity of the device structure and functional operations of the device structure. In one embodiment, the metal component includes at least one layer of metal material and the non-metal component includes at least one layer of non metal material (e.g., polymeric material, etc.). The metal component can have greater stiffness characteristics with respect to the device structure and the non-metal component can have greater flexibility characteristics with respect to the metal layer component. The support structure can be configured to reflect light towards the device structure. The support structure can also be configured to conduct electricity from the device structure.

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Номер записи: 40
26-01-2012 дата публикации

Alternating-current light emitting diode structure with overload protection

Номер: US20120018773A1
Автор: Ching-Jen Pan, Jing-Yi Chen, Ming-Hung Chen, Shih-Yi Wen
Принадлежит: Helio Optoelectronics Corp

The present invention relates to an alternating current (AC) light emitting diode (LED) structure with overload protection, which comprises an AC LED, a heat dissipating unit and an overload protecting unit. The AC LED is thermally connected with the heat dissipating unit, and the overload protecting unit is connected in series between the AC LED and a power source. Thus, when an overload current is inputted to the AC LED structure, the temperature of the overload protecting unit will rise to disconnect the AC LED from the power source. In this way, an open-circuit status can be produced timely in the AC LED structure to block the power input into the AC LED for purpose of protection against overload.

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Номер записи: 41
26-01-2012 дата публикации

Switching element, variable inductor, and electronic circuit device having circuit configuration incorporating the switching element and the variable inductor

Номер: US20120018842A1
Автор: Hideo Ishihara, Kunihiko Nakajima, Yuichi Sasajima
Принадлежит: TAIYO YUDEN CO LTD

An inexpensive variable inductor has inductance value continuously changeable without reducing a Q value. When a control voltage is applied to a control terminal of a MOS transistor from a power supply, a continuity region is formed in a channel, and a region between main terminals becomes conductive. When the control voltage is changed, length of the continuity region in the channel is changed. This changes length of a path area of an induced current, flowing in an induced current film. Thus, the amount of induced current is increased or decreased. Therefore, when the control voltage of the MOS transistor is changed, the inductance value of the coil is continuously changed.

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Номер записи: 42
26-01-2012 дата публикации

Substrate for semiconductor element, method for manufacturing substrate for semiconductor element, and semiconductor device

Номер: US20120018867A1
Автор: Junko Toda, Susumu Maniwa, Takehito Tsukamoto
Принадлежит: Toppan Printing Co Ltd

Provided is a manufacturing method of a semiconductor element substrate including: a step of forming a first photoresist pattern on a first surface of a metallic plate, to form a semiconductor element mounting part, a semiconductor element electrode connection terminal, a wiring, an outer frame part, and a slit; a step of forming a second photoresist pattern on the second surface of the metallic plate; a step of forming the slit by half etching to connect the metallic chip with a four corners of the outer frame part; a step of forming a plurality of concaved parts on the second surface of the metallic plate; a step of forming a resin layer by injecting a resin to the plurality of concaved parts; and a step of etching the first surface of the metallic plate and forming the semiconductor element electrode connection terminal and the outer frame.

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Номер записи: 43
26-01-2012 дата публикации

Stack package and method for manufacturing the same

Номер: US20120018879A1
Автор: Cheol-Ho JOH, Eun-Hye DO, Hee-Min SHIN, Ji-Eun Kim, Kyu-Won Lee
Принадлежит: Hynix Semiconductor Inc

A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.

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Номер записи: 44
26-01-2012 дата публикации

Methods of forming semiconductor elements using micro-abrasive particle stream

Номер: US20120018893A1
Автор: Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia, Vage Oganesian
Принадлежит: TESSERA RESEARCH LLC

A method of fabricating a microelectronic unit includes providing a semiconductor element having a front surface and a rear surface remote from the front surface, forming at least one first opening extending from the rear surface partially through the semiconductor element towards the front surface by directing a jet of fine abrasive particles towards the semiconductor element, and forming at least one conductive contact and at least one conductive interconnect coupled thereto. The semiconductor element can include a plurality of active semiconductor devices therein. The semiconductor element can include a plurality of conductive pads exposed at the front surface. Each conductive interconnect can extend within one or more of the first openings and can be coupled directly or indirectly to at least one of the conductive pads. Each of the conductive contacts can be exposed at the rear surface of the semiconductor element for electrical connection to an external device.

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Номер записи: 45
26-01-2012 дата публикации

Semiconductor Device and Method of Forming RDL Wider than Contact Pad along First Axis and Narrower than Contact Pad Along Second Axis

Номер: US20120018904A1
Автор: Jianmin Fang, KANG Chen, Xia Feng, Yaojian Lin
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a semiconductor die and first conductive layer formed over a surface of the semiconductor die. A first insulating layer is formed over the surface of the semiconductor die. A second insulating layer is formed over the first insulating layer and first conductive layer. An opening is formed in the second insulating layer over the first conductive layer. A second conductive layer is formed in the opening over the first conductive layer and second insulating layer. The second conductive layer has a width that is less than a width of the first conductive layer along a first axis. The second conductive layer has a width that is greater than a width of the first conductive layer along a second axis perpendicular to the first axis. A third insulating layer is formed over the second conductive layer and first insulating layer.

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Номер записи: 46
26-01-2012 дата публикации

Electronic module with vertical connector between conductor patterns

Номер: US20120020044A1
Автор: Antti Iihola, Petteri Palm
Принадлежит: IMBERA ELECTRONICS OY

The present invention generally relates to a new structure to be used with electronic modules such as printed circuit boards and semiconductor package substrates. Furthermore there are presented herein methods for manufacturing the same. According to an aspect of the invention, the aspect ratio of through holes is significantly improved. Aspect ratio measures a relationship of a through hole or a micro via conductor in the direction of height divided width. According to the aspect of the invention, the aspect ratio can be increased over that of the prior art solution by a factor of ten or more.

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Номер записи: 47
26-01-2012 дата публикации

Plasma processing method and storage medium

Номер: US20120021538A1
Автор: Kazuya Dobashi, Sung Tae Lee
Принадлежит: Tokyo Electron Ltd

There is provided a plasma processing method performing a plasma etching process on an oxide film of a target substrate through one or more steps by using a processing gas including a CF-based gas and a COS gas. The plasma processing method includes: performing a plasma etching process on the oxide film of the target substrate according to a processing recipe; measuring a concentration of sulfur (S) remaining on the target substrate (residual S concentration) after the plasma etching process is performed according to the processing recipe; adjusting a ratio of a COS gas flow rate with respect to a CF-based gas flow rate (COS/CF ratio) so as to allow the residual S concentration to become equal to or smaller than a predetermined value; and performing an actual plasma etching process according to a modified processing recipe storing the adjusted COS/CF ratio.

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Номер записи: 48
26-01-2012 дата публикации

In-line metrology system

Номер: US20120021539A1
Автор: Arnold Allenic, Chong Lim, II Stephan Paul George, Oleh Karpenko, Sreenivas Jayaraman
Принадлежит: Individual

A metrology system for gauging and spatially mapping a semiconductor material on a substrate can be used in controlling deposition and thermal activation processes.

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Номер записи: 49
26-01-2012 дата публикации

Method of forming a packaged semiconductor device

Номер: US20120021565A1
Автор: Douglas G. Mitchell, George R. Leal, Jason R. Wright, Jianwen Xu, Scott M. Hayes, Zhiwei Gong
Принадлежит: Individual

A method is used to form a packaged semiconductor device. A semiconductor device, which has an active surface, is placed in an opening of a circuit board. The circuit board has a first major surface and a second major surface having the opening, first vias that extend between the first major surface and the second major surface, first contact pads terminating the vias at the first major surface, and second contact pads terminating the vias at the second major surface. A dielectric layer is applied over the semiconductor device and the second major surface of the circuit board. An interconnect layer is formed over the dielectric layer. The interconnect layer has second vias electrically connected to the second contact pads, third vias that are electrically connected to the active surface of the semiconductor device, an exposed surface, and third contact pads at the exposed surface.

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Номер записи: 50
02-02-2012 дата публикации

Process for electrodeposition of copper chip to chip, chip to wafer and wafer to wafer interconnects in through-silicon vias (tsv) with heated substrate and cooled electrolyte

Номер: US20120024713A1
Автор: Robert F. Preisser
Принадлежит: Individual

Process of electrodepositing a metal in a high aspect ratio via in a silicon substrate to form a through-silicon-via (TSV), utilizing an electrolytic bath including a redox mediator, in an electrolytic metal plating system including a chuck adapted to hold the silicon substrate and to heat the silicon substrate to a first temperature, a temperature control device to maintain temperature of the electrolytic bath at a second temperature, in which the first temperature is maintained in a range from about 30° C. to about 60° C. and the second temperature is maintained at a temperature (a) at least 5° C. lower than the first temperature and (b) in a range from about 15° C. to about 35° C.

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Номер записи: 51
02-02-2012 дата публикации

Surface mounted led structure and packaging method of integrating functional circuits on a silicon

Номер: US20120025242A1
Автор: Guowei David Xiao, Haiying Chen, YU Hou, Yugang Zhou, Zhaoming Zeng
Принадлежит: Apt Electronics Co ltd

The present invention relates to a surface mounted LED structure of integrating functional circuits on a silicon substrate, comprising the silicon substrate and an LED chip. Said silicon substrate has an upper surface of planar structure without grooves. An oxide layer covers the upper surface of the silicon substrate, and metal electrode layers are arranged in the upper surface of the oxide layer. The upper surfaces of said metal electrode layers are arranged with metal bumps, and the LED chip is flip-chip mounted to the silicon substrate. Two conductive metal pads are arranged on the lower surface of said silicon substrate, said conductive metal pads are electrically connected to the metal electrode layers on the upper surface of the silicon substrate by a metal lead arranged on the side wall of the silicon substrate. A heat conduction metal pad is arranged on the corresponding lower, surface of the silicon substrate just below the LED chip. Peripheral functional circuits required by LED are integrated on the upper surface of said silicon substrate. The structure of the present invention has advantages of good heat dissipation effect and small volume, and direct integration of functional circuits such as protection and drive circuits etc. in the silicon substrate achieves large-scale production package of wafer level, reducing the cost of packaging and lighting fixture.

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Номер записи: 52
02-02-2012 дата публикации

Led package and method for manufacturing the same

Номер: US20120025243A1
Автор: Shen-Bo Lin
Принадлежит: Advanced Optoelectronic Technology Inc

An LED package includes a substrate, an LED chip, a bounding dam, and a first encapsulation. The substrate includes a first surface and a second surface opposite to the first surface. The LED chip is mounted on the first surface of the substrate. The bounding dam is formed on the first surface of the substrate and surrounds the LED chip. The bounding dam and the substrate cooperatively define a receiving space. The bounding dam is made of thermoset resin. The first encapsulation is formed in the receiving space and encloses the LED chip.

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Номер записи: 53
02-02-2012 дата публикации

Semiconductor light emitting device substrate strips and packaged semiconductor light emitting devices

Номер: US20120025254A1
Автор: Ban P. Loh, Nicholas W. Medendorp, JR.
Принадлежит: Cree Inc

Semiconductor light emitting device packaging methods include fabricating a substrate configured to mount a semiconductor light emitting device thereon. The substrate may include a cavity configured to mount the semiconductor light emitting device therein. The semiconductor light emitting device is mounted on the substrate and electrically connected to a contact portion of the substrate. The substrate is liquid injection molded to form an optical element bonded to the substrate over the semiconductor light emitting device. Liquid injection molding may be preceded by applying a soft resin on the electrically connected semiconductor light emitting device in the cavity. Semiconductor light emitting device substrate strips are also provided.

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Номер записи: 54
02-02-2012 дата публикации

Semiconductor device

Номер: US20120025260A1
Автор: Kenichi Ito, Shigehisa Oonakahara, Tooru Aoyagi, Yuu Hasegawa
Принадлежит: Panasonic Corp

A semiconductor device includes a lead frame, a first semiconductor element mounted on the lead frame, a frame-like member formed on the lead frame, surrounding the first semiconductor element, and a protective resin filling a space surrounded by the frame-like member. The lead frame has an external terminal protruding outside the frame-like member. The external terminal has a barrier portion which is located at an end portion thereof protruding from the frame-like member and rises from a top surface of the external terminal.

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Номер записи: 55
02-02-2012 дата публикации

Semiconductor device comprising a passive component of capacitors and process for fabrication

Номер: US20120025348A1
Автор: Laurent Marechal, Romain Coffy, Yvon Imbs
Принадлежит: STMicroelectronics Grenoble 2 SAS

A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.

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Номер записи: 56
02-02-2012 дата публикации

Semiconductor device and semiconductor package including the same

Номер: US20120025349A1
Автор: Hyun-seok Kim, Hyung-Dong Lee, Jun-Ho Lee
Принадлежит: Individual

Provided is a semiconductor device capable of removing a power ground grid noise using a small area. The semiconductor device includes a first chip including at least one decoupling capacitor; and a second semiconductor chip stacked over the first semiconductor chip, including internal circuits.

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Номер записи: 57
02-02-2012 дата публикации

Laminated semiconductor substrate, laminated chip package and method of manufacturing the same

Номер: US20120025354A1
Автор: Atsushi Iijima, Hiroyuki Ito, Yoshitaka Sasaki
Принадлежит: Headway Technologies Inc, SAE Magnetics HK Ltd

In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions insulated from each other and has a semiconductor device formed therein. Further, an uppermost substrate and a lowermost substrate have an electromagnetic shielding layer formed using a ferromagnetic body. The electromagnetic shielding layer is formed in a shielding region except the extending zone. The extending zone is set a part which the wiring electrode crosses, in a peripheral edge part of the device region.

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Номер записи: 58
02-02-2012 дата публикации

Leadframe for ic package and method of manufacture

Номер: US20120025357A1
Автор: Tunglok Li
Принадлежит: Kaixin Inc

A leadframe for use in an integrated circuit (IC) package comprising a metal strip partially etched on a first side. In some embodiments, the leadframe may be selectively plated on the first side and/or on a second side. The leadframe may be configured for an IC chip to be mounted thereon and for a plurality of electrical contacts to be electrically coupled to the leadframe and the IC chip.

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Номер записи: 59
02-02-2012 дата публикации

Semiconductor device

Номер: US20120025367A1
Автор: Akio Katsumata, Goshi Kawazu, Isao Kudo, Yoichi Hiruta, Yukari Imaizumi
Принадлежит: J Devices Corp, Toshiba Corp

A semiconductor device which includes a substrate, a semiconductor element arranged on the substrate, a heat dissipation component arranged on the semiconductor element, and a mold component covering an upper part of the substrate, the semiconductor element and the heat dissipation component, wherein an area of a surface on the semiconductor element of the heat dissipation component is larger than an area of a surface on which the heat dissipation component of the semiconductor element is arranged.

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Номер записи: 60
02-02-2012 дата публикации

Chip having a driving integrated circuit

Номер: US20120025372A1
Автор: Pao-Yun Tang, Wei-Hao Sun
Принадлежит: Hannstar Display Corp

A chip having a bump layout suitable for the chip on glass technology and a driving IC includes a plurality of first bumps and a plurality of second bumps for electrically connecting to a glass substrate of a displayer. The first and second bumps are disposed on a surface of the chip and near two opposite long sides of the chip respectively. The ratio of the total contacting area of the first bumps to that of the second bumps is between 0.8 and 1.2. Thus, a pressure applied on the chip and the glass substrate of the displayer for connection can be uniformly exerted all over the chip, and the stability of the connection is therefore improved.

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Номер записи: 61
02-02-2012 дата публикации

Semiconductor device and method of designing a wiring of a semiconductor device

Номер: US20120025377A1
Автор: Hideaki Ikuma, Shoji Seta, Yukihito Oowaki
Принадлежит: Toshiba Corp

A semiconductor device has an LSI chip including a semiconductor substrate, an LSI core section provided at a center portion of the semiconductor substrate and serving as a multilayered wiring layer of the semiconductor substrate, a first rewiring layer provided adjacent to an outer periphery of the LSI core section on the semiconductor substrate and including a plurality of wiring layers, a first pad electrode disposed at an outer periphery of the first rewiring layer, and an insulation layer covering the first pad electrode. The semiconductor device includes a second rewiring layer provided on the LSI chip and including a rewiring connected to the first pad electrode. The semiconductor device includes a plurality of ball electrodes provided on the second rewiring layer. The first rewiring layer is electrically connected to the LSI core section and the first pad electrode.

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Номер записи: 62
02-02-2012 дата публикации

Chip package and fabricating method thereof

Номер: US20120025387A1
Автор: Kuo-Ching Chang, Tzu-Han Lin, Wu-Cheng Kuo
Принадлежит: Individual

A chip package and a fabrication method thereof are provided. The chip package includes a substrate and a chip disposed over the substrate. A solder layer is disposed between the chip and the substrate. A conductive pad is disposed between the solder layer and the substrate, wherein the conductive pad includes a first portion disposed under the solder layer, a second portion disposed away from the first portion and a connective portion disposed between the first portion and the second portion. The connective portion has a width which is narrower than a width of the first portion along a first direction perpendicular to a second direction extending from the first portion to the connective portion.

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Номер записи: 63
02-02-2012 дата публикации

Power Semiconductor Module, Method for Producing a Power Semiconductor Module and a Housing Element for a Power Semiconductor Module

Номер: US20120025393A1
Автор: Andre Roehrig, Olaf Kirsch, Peter Kanschat, Thilo Stolze
Принадлежит: INFINEON TECHNOLOGIES AG

A power semiconductor module includes a housing element into which one or more connecting lugs are inserted. Each connecting lug has a foot region on the topside of which one or more bonding connections can be produced. In order to fix the foot regions, press-on elements are provided, which press against the end of the connecting lug.

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Номер записи: 64
02-02-2012 дата публикации

Semiconductor device and method of manufacturing semiconductor device

Номер: US20120025395A1
Автор: Shinichi Chikaki, Takahiro Nakayama
Принадлежит: Renesas Electronics Corp, Ulvac Inc

A semiconductor device includes: a first porous layer that is formed over a substrate and includes a SiO 2 skeleton; a second porous layer that is formed immediately above the first porous layer and includes a SiO 2 skeleton; a via wiring that is provided in the first porous layer; and a trench wiring that is buried in the second porous layer. The first porous layer has a pore density x 1 of 40% or below and the second porous layer has a pore density x 2 of (x 1 +5) % or above.

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Номер записи: 65
02-02-2012 дата публикации

Film for flip chip type semiconductor back surface, dicing tape-integrated film for semiconductor back surface, process for producing semiconductor device, and flip chip type semiconductor device

Номер: US20120025400A1
Автор: Fumiteru Asai, Goji Shiga, Naohide Takamoto, Yusuke Komoto
Принадлежит: Nitto Denko Corp

The present invention relates to a film for flip chip type semiconductor back surface to be formed on a back surface of a semiconductor element flip chip-connected onto an adherend, in which the film for flip chip type semiconductor back surface before thermal curing has, at the thermal curing thereof, a volume contraction ratio within a range of 23° C. to 165° C. of 100 ppm/° C. to 400 ppm/° C.

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Номер записи: 66
02-02-2012 дата публикации

Method and electrostatic transfer stamp for transferring semiconductor dice using electrostatic transfer printing techniques

Номер: US20120027557A1
Автор: Ian Ashdown, Ingo Speier
Принадлежит: Cooledge Lighting Inc

A transfer stamp that can be charged with a spatial pattern of electrostatic charge for picking up selected semiconductor dice from a host substrate and transferring them to a target substrate. The stamp may be bulk charged and then selectively discharged using irradiation through a patterned mask. The technique may also be used to electrostatically transfer selected semiconductor dice from a host substrate to a target substrate.

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Номер записи: 67
02-02-2012 дата публикации

Film for flip chip type semiconductor back surface, process for producing strip film for semiconductor back surface, and flip chip type semiconductor device

Номер: US20120028050A1
Автор: Fumiteru Asai, Goji Shiga, Naohide Takamoto
Принадлежит: Nitto Denko Corp

The present invention relates to a film for flip chip type semiconductor back surface to be formed on a back surface of a semiconductor element flip chip-connected onto an adherend, the film for flip chip type semiconductor back surface having a ratio of A/B falling within a range of 1 to 8×10 3 (%/GPa), in which A is an elongation ratio (%) of the film for flip chip type semiconductor back surface at 23° C. before thermal curing and B is a tensile storage modulus (GPa) of the film for flip chip type semiconductor back surface at 23° C. before thermal curing.

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Номер записи: 68
02-02-2012 дата публикации

Method of Controlling Critical Dimensions of Trenches in a Metallization System of a Semiconductor Device During Etch of an Etch Stop Layer

Номер: US20120028376A1
Автор: Johann Steinmetz, Mohammed Radwan
Принадлежит: Globalfoundries Inc

When forming metal lines and vias in complex metallization systems of semiconductor devices, an additional control mechanism for adjusting the final critical dimension may be implemented in the last etch process for etching through the etch stop layer after having patterned the low-k dielectric material. To this end, the concentration of a polymerizing gas may be controlled in accordance with the initial critical dimension obtained after the lithography process, thereby efficiently re-adjusting the final critical dimension so as to be close to the desired target value.

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Номер записи: 69
02-02-2012 дата публикации

Method for forming pattern and a semiconductor device

Номер: US20120028378A1
Автор: Hiroyuki Morinaga, Ryoichi Inanami
Принадлежит: Individual

According to one embodiment, a pattern forming method comprises transferring a pattern formed in a surface of a template to a plurality of chip areas in a semiconductor substrate under different transfer conditions. Furthermore, the transferring the pattern formed in the surface of the template to the plurality of chip areas in the semiconductor substrate under the different transfer conditions comprises transferring the pattern formed in the surface of the template to the semiconductor substrate at least twice under each identical transfer condition. Moreover, the pattern forming method comprises dividing each of the plurality of chip areas into a plurality of areas, determining an optimum condition for each set of corresponding divided areas in the plurality of chip areas, and transferring the pattern onto the semiconductor substrate using the optimum transfer condition determined for each divided area.

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Номер записи: 70
02-02-2012 дата публикации

Method of manufacturing semiconductor chip

Номер: US20120028414A1
Автор: Kenji Nakagawa, Kiyofumi Sakaguchi, Nobuo Kawase, Takao Yonehara
Принадлежит: Canon Inc

A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer includes the steps of preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth that does not reach the release layer; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semiconductor layer exposed by the separation to expose the bottom of the electrical conductor.

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Номер записи: 71
02-02-2012 дата публикации

Methods of operating electronic devices, and methods of providing electronic devices

Номер: US20120028582A1
Автор: Patrick W. Tandy
Принадлежит: Round Rock Research LLC

Some embodiments include a method disposing an integrated circuit die within a housing, the integrated circuit die having integrated circuitry formed thereon, the integrated circuitry including first transponder circuitry configured to transmit and receive radio frequency signals, wherein the integrated circuit die is void of external electrical connections for anything except power supply external connections; and disposing second transponder circuitry, discrete from the first transponder circuitry, within the housing, the second transponder circuitry being configured to transmit and receive radio frequency signals, wherein the first and second transponder circuitry are configured to establish wireless communication between one another within the housing, the second transponder circuitry being disposed within 24 inches of the first transponder circuitry within the housing.

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Номер записи: 72
02-02-2012 дата публикации

Method for determining cop generation factors for single-crystal silicon wafer

Номер: US20120029834A1
Автор: Shuichi Inami
Принадлежит: Sumco Corp

A whole determination area of a targeted wafer is concentrically divided in a radial direction, COP density is obtained in each divided determination segment, a maximum value of the COP density is set as COP density RADIUSMAX , a minimum value of the COP density is set as COP density RADIUSMIN , a value computed by “(COP density RADIUSMAX −COP density RADIUSMIN )/COP density RADIUSMAX ” is compared to a predetermined set value, and a non-crystal-induced COP and a crystal-induced COP are distinguished from each other based on a clear criterion, thereby determining the COP generation factor. Therefore, a rejected wafer in which a determination of the crystal-induced COP is made despite being the non-crystal-induced COP can be relieved, so that a wafer production yield can be enhanced.

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Номер записи: 73
02-02-2012 дата публикации

Dynamic care areas

Номер: US20120029858A1
Автор: Ashok V. Kulkarni, Chien-Huei Adam Chen
Принадлежит: KLA Tencor Corp

Various embodiments for determining dynamic care areas are provided.

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Номер записи: 74
09-02-2012 дата публикации

Gas delivery system for reducing oxidation in wire bonding operations

Номер: US20120031877A1
Автор: Gary S. Gillotti, Peter J. Van Emmerik, Stanley Szczesniak
Принадлежит: Kulicke and Soffa Industries Inc

A wire bonding machine is provided. The wire bonding machine includes a bonding tool and an electrode for forming a free air ball on an end of a wire extending through the bonding tool where the free air ball is formed at a free air ball formation area of the wire bonding machine. The wire bonding machine also includes a bond site area for holding a semiconductor device during a wire bonding operation. The wire bonding machine also includes a gas delivery mechanism configured to provide a cover gas to: (1) the bond site area whereby the cover gas is ejected through at least one aperture of the gas delivery mechanism to the bond site area, and (2) the free air ball formation area.

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Номер записи: 75
09-02-2012 дата публикации

Packaged light emitting diodes including phosphor coating and phosphor coating systems

Номер: US20120032220A1
Автор: Mitchell Jackson, Nathaniel O. Cannon
Принадлежит: Cree Inc

Light emitting structures are disclosed that can include a semiconductor light emitting diode (LED) that includes a p-n junction active layer. A first layer can include a binder material having a thickness that is less than about 1000 μm, wherein the first layer is directly on the LED. A second layer can include phosphor particles, where the second layer can have a thickness that is less than about 1000 μm and can be directly on the first layer so that the first layer is between the LED and the second layer.

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Номер записи: 76
09-02-2012 дата публикации

Method for fabrication of a semiconductor device and structure

Номер: US20120032294A1
Автор: Brian Cronquist, Deepak C. Sekar, Israel Beinglass, Jan Lodewijk de Jong, Zvi Or-Bach
Принадлежит: Monolithic 3D Inc

A semiconductor device comprising: a first single crystal silicon layer comprising first transistors, first alignment mark, and at least one metal layer overlying said first single crystal silicon layer, wherein said at least one metal layer comprises copper or aluminum more than other materials; a second layer overlying said at least one metal layer, said second layer comprising second transistors, second alignment mark, and a through via through said second layer, wherein said through via is a part of a connection path between said first transistors and said second transistors, wherein alignment of said through via is based on said first alignment mark and said second alignment mark and effected by a distance between said first alignment mark and said second alignment mark.

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Номер записи: 77
09-02-2012 дата публикации

Semiconductor device and method for producing such a device

Номер: US20120032295A1
Автор: Carsten Von Koblinski, Francisco Javier Santos Rodriguez, Friedrich Kroener
Принадлежит: INFINEON TECHNOLOGIES AG

A semiconductor device and method for producing such a device is disclosed. One embodiment provides a semiconductor functional wafer having a first and second main surface. Component production processes are performed for producing a component functional region at the first main surface, wherein the component production processes produce an end state that is stable up to at least a first temperature. A carrier substrate is fitted to the first main surface. Access openings are produced to the first main surface. At least one further component production process is performed for producing patterned component functional regions at the first main surface of the functional wafer in the access openings. The end state produced in this process is stable up to a second temperature, which is less than the first temperature.

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Номер записи: 78
09-02-2012 дата публикации

Semiconductor device, electronic apparatus, and method of manufacturing semiconductor device

Номер: US20120032298A1
Автор: Hideki Fujii, Kenji Furuya, Yuichi Miyagawa
Принадлежит: Renesas Electronics Corp

A semiconductor chip is mounted on a first surface of an interconnect substrate, and has a multilayer interconnect layer. A first inductor is formed over the multilayer interconnect layer, and a wiring axis direction thereof is directed in a horizontal direction to the interconnect substrate. A second inductor is formed on the multilayer interconnect layer, and a wiring axis direction thereof is directed in the horizontal direction to the interconnect substrate. The second inductor is opposite to the first inductor. A sealing resin seals at least the first surface of the interconnect substrate and the semiconductor chip. A groove is formed over the whole area of a portion that is positioned between the at least first inductor and the second inductor of a boundary surface of the multilayer interconnect layer and the sealing resin.

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Номер записи: 79
09-02-2012 дата публикации

Integrated circuit packaging system with die paddle and method of manufacture thereof

Номер: US20120032315A1
Автор: Arnel Senosa Trasporto, Byung Tai Do, Linda Pei Ee CHUA
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: providing a package paddle having a single integral structure with a paddle central portion surrounded by a paddle peripheral portion; forming a terminal adjacent the package paddle; mounting an integrated circuit over the paddle central portion; and forming an encapsulation over the integrated circuit and the terminal, the encapsulation free of delamination with the encapsulation directly on the paddle peripheral portion.

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Номер записи: 80
09-02-2012 дата публикации

High-voltage packaged device

Номер: US20120032319A1
Автор: Richard A. Dunipace
Принадлежит: Individual

Packaged devices and methods for making and using the same are described. The packaged devices contain one or more circuit components, such as a die, that is attached to a leadframe having a first lead, a second lead, and a third lead (although, higher lead counts may be employed in some implementations). A portion of the circuit component and the leadframe are encapsulated in a molded housing so that the first lead is exposed from a first end of the housing while the second and third leads are exposed from a second end of the housing. In some configurations, the packaged device does not contain a fourth lead that is both electrically connected to the first lead and that is exposed from the second end of the molded housing. In other configurations, an area extending from the second lead to the third lead in the molded housing comprises an insulating material having a substantially uniform conductivity. Thus, the packaged devices have relatively large creepage and clearance distances between the first lead and the second and third leads. As a result, the packaged devices are able to operate at relatively high operating voltages without experiencing voltage breakdown. Other embodiments are described.

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Номер записи: 81
09-02-2012 дата публикации

Semiconductor device and method of manufacturing the same

Номер: US20120032323A1
Автор: Akihiro Osaki, Atsushi Ishii, Masahiko Fujisawa, Masahiro Matsumoto
Принадлежит: Renesas Electronics Corp

A preferred aim of the invention is to provide technique for improving reliability of semiconductor devices when using a low-dielectric-constant film having a lower dielectric constant than a silicon oxide film to a part of an interlayer insulating film. More specifically, to achieve the preferred aim, an interlayer insulating film IL 1 forming a first fine layer is formed of a middle-Young's-modulus film, and thus it is possible to separate an integrated high-Young's-modulus layer (a semiconductor substrate 1 S and a contact interlayer insulating film CIL) and an interlayer insulating film (a low-Young's-modulus film; a low-dielectric-constant film) IL 2 forming a second fine layer not to let them directly contact with each other, and stress can be diverged. As a result, film exfoliation of the interlayer insulating film IL 2 formed of a low-Young's-modulus film can be prevented and thus reliability of semiconductor devices can be improved.

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Номер записи: 82
09-02-2012 дата публикации

Semiconductor device

Номер: US20120032325A1
Автор: Osamu Miyata, Shingo Higuchi
Принадлежит: ROHM CO LTD

There is provided a semiconductor device with which stress can be prevented from locally concentrating on an external connecting terminal on a post and thus damages of the external connecting terminal can be prevented. The semiconductor device includes a semiconductor chip, a sealing resin layer stacked on a surface of the semiconductor chip, and the post which penetrates the sealing resin layer in a stacking direction of the semiconductor chip and the sealing resin layer, protrudes from the sealing resin layer, and has a periphery of the protruding portion opposedly in contact with a surface of the sealing resin layer in the stacking direction.

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Номер записи: 83
09-02-2012 дата публикации

Circuit substrate and manufacturing method thereof and package structure and manufacturing method thereof

Номер: US20120032331A1
Автор: Chih-Cheng LEE
Принадлежит: Advanced Semiconductor Engineering Inc

A circuit substrate includes the following elements. A conductive layer and a dielectric layer are disposed on an inner circuit structure in sequence, and a plurality of conductive blind vias are embedded in the dielectric layer and connected to a portion of the conductive layer. A plating seed layer is disposed between each of the first blind vias and the first conductive layer. Another conductive layer is disposed on the dielectric layer, wherein a portion of the another conductive layer is electrically connected to the conductive layer through the conductive blind vias. A third plating seed layer is disposed between the third conductive layer and each of the first blind vias and on the first dielectric layer.

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Номер записи: 84
09-02-2012 дата публикации

Self-aligned permanent on-chip interconnect structure formed by pitch splitting

Номер: US20120032336A1
Автор: Qinghuang Lin
Принадлежит: International Business Machines Corp

A method of fabricating an interconnect structure is provided. The method includes forming a hybrid photo-patternable dielectric material atop a substrate. The hybrid photo-patternable dielectric material has dual-tone properties with a parabola like dissolution response to radiation. The hybrid photo-patternable dielectric material is then image-wise exposed to radiation such that a self-aligned pitch split pattern forms. A portion of the self-aligned split pattern is removed to provide a patterned hybrid photo-patternable dielectric material having at least one opening therein. The patterned hybrid photo-patternable dielectric material is then converted into a cured and patterned dielectric material having the at least one opening therein. The at least one opening within the cured and patterned dielectric material is then filed with at least an electrically conductive material. Also provided are a hybrid photo-patternable dielectric composition and an interconnect structure.

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Номер записи: 85
09-02-2012 дата публикации

Systems and Methods for Heat Dissipation Using Thermal Conduits

Номер: US20120032350A1
Автор: Jianjun Li, Nic Rossi, Robert W. Warren
Принадлежит: Conexant Systems LLC

The addition of thermal conduits by bonding bond wires to bond pads either in a wire loop configuration or a pillar configuration can improve thermal dissipation of a fabricated die. The thermal conduits can be added as part of the normal packaging process of a semiconductor die and are electrically decoupled from the circuitry fabricated on the fabricated die. In an alternative, a dummy die is affixed to the fabricated die and the thermal conduits are affixed to the dummy die. Additionally, thermal conduits can be used in conjunction with a heat spreader.

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Номер записи: 86
09-02-2012 дата публикации

Light emitting apparatus and method for manufacturing thereof

Номер: US20120032578A1
Автор: Hiroshi Fukunaga, Kazunori Annen, Kenichi Yoshimura, Kimiko Mieda, Makoto Izumi
Принадлежит: Sharp Corp

A light emitting apparatus includes a light emitting device emitting primary light and a wavelength conversion unit absorbing a part of the primary light to emit secondary light. The wavelength conversion unit includes a first wavelength conversion unit containing at least a nanocrystalline phosphor and a second wavelength conversion unit containing a rare-earth-activated phosphor or a transition-metal-element-activated phosphor. In the light emitting device, the first wavelength conversion unit and the second wavelength conversion unit are closely stacked in order.

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Номер записи: 87
09-02-2012 дата публикации

Phosphor, production method thereof and light emitting instrument

Номер: US20120032579A1
Автор: Naoto Hirosaki
Принадлежит: NATIONAL INSTITUTE FOR MATERIALS SCIENCE

A light emitting element includes a light-emitting source for emitting light at a wavelength of 330 to 500 nm and a constituent phosphor. The constituent phosphor includes a compound including M, A, Al, O, and N, where M is at least one kind of element selected from Mn, Ce, Nd, Sm, Eu, Tb, Dy, Ho, Er, Tm, and Yb, and A is at least one kind of element selected from C, Si, Ge, Sn, B, Ga, In, Mg, Ca, Sr, Ba, Sc, Y, La, Gd, Lu, Ti, Zr, Hf, Ta, and W.

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Номер записи: 88
09-02-2012 дата публикации

Semiconductor Device and Power Supply Unit Utilizing the Same

Номер: US20120032713A1
Автор: Atsushi Kitagawa
Принадлежит: ROHM CO LTD

A semiconductor device has pluralities of grid array terminals forming a grid array structure, e.g. a BGA structure, in which the output end of a built-in switch circuit is connected to multiple terminals of the grid array structure, thereby reducing the current that flows through each of the multiple terminals below a permissible level and minimizing the heat due to contact resistances of the multiple terminals in contact with the IC socket of the semiconductor device. Each pair of nearest neighbors of the multiple terminals is interposed by at least one further array terminal. The multiple terminals are all located at the outermost peripheral terminal positions of the grid array structure. Thus, the heat generated in the respective multiple terminals connected to the switch circuit is reduced, thereby minimizing the possibility of hazardous melting of the terminals.

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Номер записи: 89
09-02-2012 дата публикации

Gain Enhanced LTCC System-on-Package for UMRR Applications

Номер: US20120032836A1
Автор: Atif SHAMIM, Farhan Abdul Ghaffar, Khaled Nabil Salama, Muhammad Umair Khalid
Принадлежит: King Abdullah University of Science and Technology KAUST

An apparatus, system, and method for Gain Enhanced LTCC System-on-Package radar sensor. The sensor includes a substrate and an integrated circuit coupled to the substrate, where the integrated circuit is configured to transmit and receive radio frequency (RF) signals. An antenna may be coupled to the integrated circuit and a lens may be coupled to the antenna. The lens may be configured to enhance the gain of the sensor.

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Номер записи: 90
09-02-2012 дата публикации

Energy Conditioning Circuit Arrangement for Integrated Circuit

Номер: US20120034774A1
Автор: Anthony A. Anthony, William M. Anthony
Принадлежит: X2Y Attenuators LLC

The present invention relates to an interposer substrate for interconnecting between active electronic componentry such as but not limited to a single or multiple integrated circuit chips in either a single or a combination and elements that could comprise of a mounting substrate, substrate module, a printed circuit board, integrated circuit chips or other substrates containing conductive energy pathways that service an energy utilizing load and leading to and from an energy source. The interposer will also possess a multi-layer, universal multi-functional, common conductive shield structure with conductive pathways for energy and EMI conditioning and protection that also comprise a commonly shared and centrally positioned conductive pathway or electrode of the structure that can simultaneously shield and allow smooth energy interaction between grouped and energized conductive pathway electrodes containing a circuit architecture for energy conditioning as it relates to integrated circuit device packaging. The invention can be employed between an active electronic component and a multilayer circuit card. A method for making the interposer is not presented and can be varied to the individual or proprietary construction methodologies that exist or will be developed.

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Номер записи: 91
09-02-2012 дата публикации

Method for Forming a Patterned Thick Metallization atop a Power Semiconductor Chip

Номер: US20120034775A1
Автор: Il Kwan Lee
Принадлежит: Individual

A method is disclosed for forming a patterned thick metallization atop a semiconductor chip wafer. The method includes fabricating a nearly complete semiconductor chip wafer ready for metallization; depositing a bottom metal layer of sub-thickness TK 1 together with its built-in alignment mark using a hot metal process; depositing a top metal layer of sub-thickness TK 2 using a cold metal process thus forming a stacked thick metallization of total thickness TK=TK 1 +TK 2 ; then, use the built-in alignment mark as reference, patterning the stacked thick metallization. A patterned thick metallization is thus formed with the advantages of better metal step coverage owing to the superior step coverage nature of the hot metal process as compared to the cold metal process; and lower alignment error rate owing to the lower alignment signal noise nature of the cold metal process as compared to the hot metal process.

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Номер записи: 92
16-02-2012 дата публикации

Overmolded electronic module with an integrated electromagnetic shield using smt shield wall components

Номер: US20120036710A1
Автор: Larry D. Pottebaum, Philip H. Thompson
Принадлежит: Skyworks Solutions Inc

An electronic module with an integrated electromagnetic shield using surface mount shield wall components has been disclosed. Each surface mount shield wall component provides side shielding of the circuitry within the overmolded electronic module and provides an exposed conductive shield wall section to which a top conductive shield can be applied. By including the shield structure as part of the overmolded electronic module, the need for a separate shield and separate process steps for installing the separate shield can be eliminated. Each surface mount shield wall component comprises a non-conductive portion that provides stability during a reflow soldering process, but at least a sacrificial portion of the non-conductive portion can be removed to reduce the amount of area occupied by the overmoldable shield structure.

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Номер записи: 93
16-02-2012 дата публикации

Capillary and ultrasonic transducer for ultrasonic bonding

Номер: US20120037687A1
Автор: Takayoshi Matsumura
Принадлежит: Fujitsu Ltd

A capillary is attached to an ultrasonic transducer of a wire-bonding apparatus. The capillary includes a first part configured to be attached to the ultrasonic transducer, and a second part other than the first part and extending from the first part. The first part has a shape different from a shape of the second part so that the first part has a flexure rigidity larger than the second part.

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Номер записи: 94
16-02-2012 дата публикации

Process for producing fluorescent substance and fluorescent substance produced thereby

Номер: US20120037849A1
Автор: Naotoshi Matsuda, Ryosuke Hiramatsu, Yumi Fukuda
Принадлежит: Toshiba Corp

The present invention provides a fluorescent substance excellent both in quantum efficiency and in temperature characteristics, and also provides a process for producing the fluorescent substance. This fluorescent substance is an oxynitride phosphor having a low paramagnetic defect density and comprising aluminum, silicon, either or both of oxygen and nitrogen, and a metal element M, provided that the metal element M is partly replaced with an emission center element R. That phosphor can be produced by the steps of: subjecting a mixture of starting materials to heat treatment under a nitrogen atmosphere so as to obtain an intermediate fired product, and then further subjecting the intermediate fired product to heat treatment under an atmosphere of nitrogen-hydrogen mixed gas.

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Номер записи: 95
16-02-2012 дата публикации

Surface-modified silicate luminophores

Номер: US20120037850A1
Автор: Chung Hoon Lee, Detlef Starick, Gundula Roth, Walter Tews
Принадлежит: Litec LLL GmbH, Seoul Semiconductor Co Ltd

A surface-modified silicate luminophore includes a silicate luminophore and a coating includes at least one of (a) a fluorinated coating including a fluorinated inorganic agent, a fluorinated organic agent, or a combination of fluorinated inorganic and organic agents, the fluorinated coating generating hydrophobic surface sites and (b) a combination of the fluorinated coating and at least one moisture barrier layer. The moisture barrier layer includes MgO, Al 2 O 3 , Y 2 O 3 , La 2 O 3 , Gd 2 O 3 , Lu 2 O 3 , and SiO 2 or the corresponding precursors, and the coating is disposed on the surface of the silicate luminophore.

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Номер записи: 96
16-02-2012 дата публикации

Light emitting diode

Номер: US20120037939A1
Автор: Youji Urano
Принадлежит: Panasonic Corp, Panasonic Electric Works Co Ltd

A light emitting diode comprises a LED chip, a package in which the LED chip is housed, and a connection electrode electrically connected to an element electrode with which the LED chip is provided. The package is a laminated body comprising at least a submount substrate and a frame body, and the LED chip is fixedly-mounted on one surface of the submount substrate, and the frame body is laminated on the one surface of the submount substrate and is provided with a through-hole in which the LED chip is stored. The connection electrode is formed on at least either the one surface of the submount substrate or one surface of the frame body facing toward a light irradiation direction, while being exposed in the light irradiation direction. Therefore, the light emitting diode can improve both heat dissipation performance and density of LED placement together.

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Номер записи: 97
16-02-2012 дата публикации

Light emitting device

Номер: US20120037944A1
Автор: Kenji Takine
Принадлежит: Nichia Corp

A light emitting device, which has: a light emitting element; a package that comprises a concavity for holding the light emitting element, and that has on its side wall where the concavity is integrally formed a light reflector for reflecting light from the light emitting element and a light transmitter for transmitting light from the light emitting element to the outside.

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Номер записи: 98
16-02-2012 дата публикации

Semiconductor device with less power supply noise

Номер: US20120037959A1
Автор: Tetsuya Katou
Принадлежит: Renesas Electronics Corp

A semiconductor device includes a first power supply line; a second power supply line; a first cell arrangement area in which a first cell is arranged; and a switch area in which a switching transistor and a decoupling capacitance are arranged. The first cell is provided in a first well of a first conductive type, the switching transistor is provided in a second well of the first conductive type, and the decoupling capacitance is provided in a separation area of a second conductive type to separate the first well and the second well from each other. The switching transistor connects the first power supply line and the second power supply line in response to a control signal, the first cell operates with power supplied from the second power supply line, and the decoupling capacitance is connected with the first power supply line.

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Номер записи: 99
16-02-2012 дата публикации

Method for molecular adhesion bonding at low pressure

Номер: US20120038027A1
Автор: Marcel Broekaart
Принадлежит: Soitec SA

The present invention relates to a method for molecular adhesion bonding between at least a first wafer and a second wafer involving aligning the first and second wafers, placing the first and second wafers in an environment having a first pressure (P 1 ) greater than a predetermined threshold pressure; bringing the first wafer and the second wafer into alignment and contact; and initiating the propagation of a bonding wave between the first and second wafer after the wafers are aligned and in contact by reducing the pressure within the environment to a second pressure (P 2 ) below the threshold pressure. The invention also relates to the three-dimensional composite structure that is obtained by the described method of adhesion bonding.

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Номер записи: 100