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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 37237. Отображено 100.
05-01-2012 дата публикации

Active energy ray-curable pressure-sensitive adhesive for re-release and dicing die-bonding film

Номер: US20120003470A1
Автор: Chie Kitano, Hironao OTAKE, Katsuhiko Kamiya, Masatsugu KOSO, Mika Okada, Shuhei Murata, Takeshi Matsumura, Tomokazu Takahashi
Принадлежит: Nitto Denko Corp

Provided is an active energy ray-curable pressure-sensitive adhesive for re-release, which has a small influence on an environment or a human body, can be easily handled, can largely change its pressure-sensitive adhesiveness before and after irradiation with an active energy ray, and can express high pressure-sensitive adhesiveness before the irradiation with the active energy ray and express high releasability after the irradiation with the active energy ray. The active energy ray-curable pressure-sensitive adhesive for re-release includes an active energy ray-curable polymer (P), in which the polymer (P) includes one of a polymer obtained by causing a carboxyl group-containing polymer (P3) and an oxazoline group-containing monomer (m3) to react with each other, and a polymer obtained by causing an oxazoline group-containing polymer (P4) and a carboxyl group-containing monomer (m2) to react with each other.

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Номер записи: 1
12-01-2012 дата публикации

Method for molecular adhesion bonding with compensation for radial misalignment

Номер: US20120006463A1
Автор: Gweltaz Gaudin
Принадлежит: Soitec SA

A method for bonding a first wafer on a second wafer by molecular adhesion, where the wafers have an initial radial misalignment between them. The method includes bringing the two wafers into contact so as to initiate the propagation of a bonding wave between the two wafers while a predefined bonding curvature is imposed on at least one of the two wafers during the contacting step as a function of the initial radial misalignment.

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Номер записи: 2
12-01-2012 дата публикации

Light emitting device package and a lighting device

Номер: US20120007122A1
Автор: Yong Seok Choi
Принадлежит: Yong Seok Choi

Provided are a light emitting device package and a lighting device. The light emitting device package includes a base, a light emitting device on the base, a plurality of electrode pads on the base, the plurality of electrode pads electrically connected to the light emitting device, a frame disposed on the base, wherein a size of the frame is smaller than a size of the base, a silver layer on a portion of the plurality of electrode pads, the silver layer directly contacted with the frame and an optical member covering the light emitting device.

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Номер записи: 3
12-01-2012 дата публикации

Method for Reducing Chip Warpage

Номер: US20120007220A1
Автор: Chun-Ren Cheng, Jiou-Kang Lee, Jung-Huei Peng, Shang-Ying Tsai, Ting-Hau Wu
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method of forming an integrated circuit structure including providing a wafer comprising a front surface and a back surface, wherein the wafer comprises a chip; forming an opening extending from the back surface into the chip; filling an organic material in the opening, wherein substantially no portion of the organic material is outside of the opening and on the back surface of the wafer; and baking the organic material to cause a contraction of the organic material.

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Номер записи: 4
12-01-2012 дата публикации

Semiconductor device

Номер: US20120007224A1
Автор: Hajime Hasebe, Tadatoshi Danno, Yukihiro Satou
Принадлежит: Hitachi Hokkai Semiconductor Ltd, Renesas Electronics Corp

In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

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Номер записи: 5
12-01-2012 дата публикации

System-in-a-package based flash memory card

Номер: US20120007226A1
Автор: Hem Takiar, Michael W. Patterson, Robert C. Miller, Shrikar Bhagath, Warren Middlekauff
Принадлежит: SanDisk Technologies LLC

A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.

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Номер записи: 6
26-01-2012 дата публикации

Stack package and method for manufacturing the same

Номер: US20120018879A1
Автор: Cheol-Ho JOH, Eun-Hye DO, Hee-Min SHIN, Ji-Eun Kim, Kyu-Won Lee
Принадлежит: Hynix Semiconductor Inc

A stack package includes a cover film, a first package having a first semiconductor chip which is attached to the cover film, a first adhesive member which is formed to seal the first semiconductor chip and a surface of the cover film, and a first circuit pattern which is disposed over the first adhesive member and electrically connected with the first semiconductor chip; a second package disposed over the first package, having a second semiconductor chip which is electrically connected with the first circuit pattern, a second adhesive member which is formed to seal the second semiconductor chip, and a second circuit pattern which is formed over the second adhesive member, and a via formed to pass through the second circuit pattern and the second adhesive member and to be electrically connected with the first circuit pattern and the second circuit pattern.

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Номер записи: 7
26-01-2012 дата публикации

Electronic module with vertical connector between conductor patterns

Номер: US20120020044A1
Автор: Antti Iihola, Petteri Palm
Принадлежит: IMBERA ELECTRONICS OY

The present invention generally relates to a new structure to be used with electronic modules such as printed circuit boards and semiconductor package substrates. Furthermore there are presented herein methods for manufacturing the same. According to an aspect of the invention, the aspect ratio of through holes is significantly improved. Aspect ratio measures a relationship of a through hole or a micro via conductor in the direction of height divided width. According to the aspect of the invention, the aspect ratio can be increased over that of the prior art solution by a factor of ten or more.

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Номер записи: 8
02-02-2012 дата публикации

Led package and method for manufacturing the same

Номер: US20120025243A1
Автор: Shen-Bo Lin
Принадлежит: Advanced Optoelectronic Technology Inc

An LED package includes a substrate, an LED chip, a bounding dam, and a first encapsulation. The substrate includes a first surface and a second surface opposite to the first surface. The LED chip is mounted on the first surface of the substrate. The bounding dam is formed on the first surface of the substrate and surrounds the LED chip. The bounding dam and the substrate cooperatively define a receiving space. The bounding dam is made of thermoset resin. The first encapsulation is formed in the receiving space and encloses the LED chip.

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Номер записи: 9
02-02-2012 дата публикации

Semiconductor light emitting device substrate strips and packaged semiconductor light emitting devices

Номер: US20120025254A1
Автор: Ban P. Loh, Nicholas W. Medendorp, JR.
Принадлежит: Cree Inc

Semiconductor light emitting device packaging methods include fabricating a substrate configured to mount a semiconductor light emitting device thereon. The substrate may include a cavity configured to mount the semiconductor light emitting device therein. The semiconductor light emitting device is mounted on the substrate and electrically connected to a contact portion of the substrate. The substrate is liquid injection molded to form an optical element bonded to the substrate over the semiconductor light emitting device. Liquid injection molding may be preceded by applying a soft resin on the electrically connected semiconductor light emitting device in the cavity. Semiconductor light emitting device substrate strips are also provided.

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Номер записи: 10
02-02-2012 дата публикации

Semiconductor device comprising a passive component of capacitors and process for fabrication

Номер: US20120025348A1
Автор: Laurent Marechal, Romain Coffy, Yvon Imbs
Принадлежит: STMicroelectronics Grenoble 2 SAS

A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.

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Номер записи: 11
02-02-2012 дата публикации

Laminated semiconductor substrate, laminated chip package and method of manufacturing the same

Номер: US20120025354A1
Автор: Atsushi Iijima, Hiroyuki Ito, Yoshitaka Sasaki
Принадлежит: Headway Technologies Inc, SAE Magnetics HK Ltd

In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions insulated from each other and has a semiconductor device formed therein. Further, an uppermost substrate and a lowermost substrate have an electromagnetic shielding layer formed using a ferromagnetic body. The electromagnetic shielding layer is formed in a shielding region except the extending zone. The extending zone is set a part which the wiring electrode crosses, in a peripheral edge part of the device region.

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Номер записи: 12
02-02-2012 дата публикации

Method and electrostatic transfer stamp for transferring semiconductor dice using electrostatic transfer printing techniques

Номер: US20120027557A1
Автор: Ian Ashdown, Ingo Speier
Принадлежит: Cooledge Lighting Inc

A transfer stamp that can be charged with a spatial pattern of electrostatic charge for picking up selected semiconductor dice from a host substrate and transferring them to a target substrate. The stamp may be bulk charged and then selectively discharged using irradiation through a patterned mask. The technique may also be used to electrostatically transfer selected semiconductor dice from a host substrate to a target substrate.

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Номер записи: 13
02-02-2012 дата публикации

Method of manufacturing semiconductor chip

Номер: US20120028414A1
Автор: Kenji Nakagawa, Kiyofumi Sakaguchi, Nobuo Kawase, Takao Yonehara
Принадлежит: Canon Inc

A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer includes the steps of preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth that does not reach the release layer; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semiconductor layer exposed by the separation to expose the bottom of the electrical conductor.

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Номер записи: 14
09-02-2012 дата публикации

Semiconductor device and method for producing such a device

Номер: US20120032295A1
Автор: Carsten Von Koblinski, Francisco Javier Santos Rodriguez, Friedrich Kroener
Принадлежит: INFINEON TECHNOLOGIES AG

A semiconductor device and method for producing such a device is disclosed. One embodiment provides a semiconductor functional wafer having a first and second main surface. Component production processes are performed for producing a component functional region at the first main surface, wherein the component production processes produce an end state that is stable up to at least a first temperature. A carrier substrate is fitted to the first main surface. Access openings are produced to the first main surface. At least one further component production process is performed for producing patterned component functional regions at the first main surface of the functional wafer in the access openings. The end state produced in this process is stable up to a second temperature, which is less than the first temperature.

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Номер записи: 15
09-02-2012 дата публикации

Semiconductor device, electronic apparatus, and method of manufacturing semiconductor device

Номер: US20120032298A1
Автор: Hideki Fujii, Kenji Furuya, Yuichi Miyagawa
Принадлежит: Renesas Electronics Corp

A semiconductor chip is mounted on a first surface of an interconnect substrate, and has a multilayer interconnect layer. A first inductor is formed over the multilayer interconnect layer, and a wiring axis direction thereof is directed in a horizontal direction to the interconnect substrate. A second inductor is formed on the multilayer interconnect layer, and a wiring axis direction thereof is directed in the horizontal direction to the interconnect substrate. The second inductor is opposite to the first inductor. A sealing resin seals at least the first surface of the interconnect substrate and the semiconductor chip. A groove is formed over the whole area of a portion that is positioned between the at least first inductor and the second inductor of a boundary surface of the multilayer interconnect layer and the sealing resin.

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Номер записи: 16
09-02-2012 дата публикации

High-voltage packaged device

Номер: US20120032319A1
Автор: Richard A. Dunipace
Принадлежит: Individual

Packaged devices and methods for making and using the same are described. The packaged devices contain one or more circuit components, such as a die, that is attached to a leadframe having a first lead, a second lead, and a third lead (although, higher lead counts may be employed in some implementations). A portion of the circuit component and the leadframe are encapsulated in a molded housing so that the first lead is exposed from a first end of the housing while the second and third leads are exposed from a second end of the housing. In some configurations, the packaged device does not contain a fourth lead that is both electrically connected to the first lead and that is exposed from the second end of the molded housing. In other configurations, an area extending from the second lead to the third lead in the molded housing comprises an insulating material having a substantially uniform conductivity. Thus, the packaged devices have relatively large creepage and clearance distances between the first lead and the second and third leads. As a result, the packaged devices are able to operate at relatively high operating voltages without experiencing voltage breakdown. Other embodiments are described.

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Номер записи: 17
09-02-2012 дата публикации

Semiconductor device and method of manufacturing the same

Номер: US20120032323A1
Автор: Akihiro Osaki, Atsushi Ishii, Masahiko Fujisawa, Masahiro Matsumoto
Принадлежит: Renesas Electronics Corp

A preferred aim of the invention is to provide technique for improving reliability of semiconductor devices when using a low-dielectric-constant film having a lower dielectric constant than a silicon oxide film to a part of an interlayer insulating film. More specifically, to achieve the preferred aim, an interlayer insulating film IL 1 forming a first fine layer is formed of a middle-Young's-modulus film, and thus it is possible to separate an integrated high-Young's-modulus layer (a semiconductor substrate 1 S and a contact interlayer insulating film CIL) and an interlayer insulating film (a low-Young's-modulus film; a low-dielectric-constant film) IL 2 forming a second fine layer not to let them directly contact with each other, and stress can be diverged. As a result, film exfoliation of the interlayer insulating film IL 2 formed of a low-Young's-modulus film can be prevented and thus reliability of semiconductor devices can be improved.

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Номер записи: 18
16-02-2012 дата публикации

Overmolded electronic module with an integrated electromagnetic shield using smt shield wall components

Номер: US20120036710A1
Автор: Larry D. Pottebaum, Philip H. Thompson
Принадлежит: Skyworks Solutions Inc

An electronic module with an integrated electromagnetic shield using surface mount shield wall components has been disclosed. Each surface mount shield wall component provides side shielding of the circuitry within the overmolded electronic module and provides an exposed conductive shield wall section to which a top conductive shield can be applied. By including the shield structure as part of the overmolded electronic module, the need for a separate shield and separate process steps for installing the separate shield can be eliminated. Each surface mount shield wall component comprises a non-conductive portion that provides stability during a reflow soldering process, but at least a sacrificial portion of the non-conductive portion can be removed to reduce the amount of area occupied by the overmoldable shield structure.

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Номер записи: 19
16-02-2012 дата публикации

Light emitting device

Номер: US20120037944A1
Автор: Kenji Takine
Принадлежит: Nichia Corp

A light emitting device, which has: a light emitting element; a package that comprises a concavity for holding the light emitting element, and that has on its side wall where the concavity is integrally formed a light reflector for reflecting light from the light emitting element and a light transmitter for transmitting light from the light emitting element to the outside.

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Номер записи: 20
16-02-2012 дата публикации

Method for molecular adhesion bonding at low pressure

Номер: US20120038027A1
Автор: Marcel Broekaart
Принадлежит: Soitec SA

The present invention relates to a method for molecular adhesion bonding between at least a first wafer and a second wafer involving aligning the first and second wafers, placing the first and second wafers in an environment having a first pressure (P 1 ) greater than a predetermined threshold pressure; bringing the first wafer and the second wafer into alignment and contact; and initiating the propagation of a bonding wave between the first and second wafer after the wafers are aligned and in contact by reducing the pressure within the environment to a second pressure (P 2 ) below the threshold pressure. The invention also relates to the three-dimensional composite structure that is obtained by the described method of adhesion bonding.

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Номер записи: 21
16-02-2012 дата публикации

Stitch bump stacking design for overall package size reduction for multiple stack

Номер: US20120038059A1
Автор: Foong Yue Ho, Kevin Guan, Koo Eng LUON, Lai Nguk Chin, Sally Foong, Wong Kwet Nam
Принадлежит: Individual

A method for die stacking is disclosed. In one embodiment a first die is formed overlying a substrate. A first wire is bonded to the first die and to a bond finger of the substrate, wherein the first wire is bonded to the bond finger with a first bond. A first stitch bump is formed overlying the first stitch bond, wherein the first stitch bump is formed from a molten ball of conductive material. A second die is formed overlying the first die. A second wire is bonded to the second die and to the first stitch bump, wherein the second wire is bonded to the first stitch bump with a second bond.

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Номер записи: 22
01-03-2012 дата публикации

Semiconductor structure having conductive vias and method for manufacturing the same

Номер: US20120049347A1
Автор: Meng-Jen Wang
Принадлежит: Advanced Semiconductor Engineering Inc

A semiconductor structure includes a plurality of thermal vias and a heat dissipation layer disposed at a periphery of a back surface of a lower chip in a stacked-chip package. This arrangement improves solderability of a subsequently-bonded heat sink. Additionally, the thermal vias and the heat dissipation layer provide an improved thermal conduction path for enhancing heat dissipation efficiency of the semiconductor structure. A method for manufacturing the semiconductor structure is also provided.

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Номер записи: 23
01-03-2012 дата публикации

Process for assembling two parts of a circuit

Номер: US20120052629A1
Автор: Patrick Lamontagne, Perceval Coudrain, Yacine Felk
Принадлежит: STMICROELECTRONICS SA

A three-dimensional integrated structure is fabricated by assembling at least two parts together, wherein each part contains at least one metallic line covered with a covering region and having a free side. A cavity is formed in the covering region of each part, that cavity opening onto the metallic line. The two parts are joined together with the free sides facing each other and the cavities in each covering region aligned with each other. The metallic lines are then electrically joined to each other through an electromigration of the metal within at least one of the metallic lines, the electromigrated material filling the aligned cavities.

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Номер записи: 24
08-03-2012 дата публикации

Multi-chip package with offset die stacking

Номер: US20120056335A1
Автор: Peter B. Gillingham
Принадлежит: Mosaid Technologies Inc

A semiconductor device has a plurality of stacked semiconductor dice mounted on a substrate. Each die has similar dimensions. Each die has a first plurality of bonding pads arranged along a bonding edge of the die. A first group of the dice are mounted to the substrate with the bonding edge oriented in a first direction. A second group of the dice are mounted to the substrate with the bonding edge oriented in a second direction opposite the first direction. Each die is laterally offset in the second direction relative to the remaining dice by a respective lateral offset distance such that the bonding pads of each die are not disposed between the substrate and any portion of the remaining dice in a direction perpendicular to the substrate. A plurality of bonding wires connects the bonding pads to the substrate. A method of manufacturing a semiconductor device is also disclosed.

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Номер записи: 25
15-03-2012 дата публикации

Light emitting device and manufacturing method of light emitting device

Номер: US20120061703A1
Автор: Mitsuhiro Kobayashi
Принадлежит: Toshiba Corp

A light emitting device may include a base provided with a recess portion in a side surface thereof, a light emitting element mounted on a main surface of the base, a first resin body filled in an inside of the recess portion, and covering at least the main surface and the light emitting element, a second resin body covering an outside of the first resin body from the main surface side to at least a position of the lowermost end of the recess portion in a direction orthogonal to the main surface, and phosphor, provided in the second resin body, for absorbing light emitted from the light emitting element and then emitting light having a different wavelength.

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Номер записи: 26
15-03-2012 дата публикации

Semiconductor device and manufacturing method of the same

Номер: US20120061817A1
Автор: Mamoru SHISHIDO, Noriyuki Takahashi
Принадлежит: Renesas Electronics Corp

A semiconductor chip is mounted on a heat sink disposed inside a through-hole of a wiring board, electrodes of the semiconductor chip and connecting terminals of the wiring board are connected by bonding wires, a sealing resin is formed to cover the semiconductor chip and the bonding wires, and solder balls are formed on the lower surface of the wiring board, thereby constituting the semiconductor device. The heat sink is thicker than the wiring board. The heat sink has a protruded portion protruding to outside from the side surface of the heat sink, the protruded portion is located on the upper surface of the wiring board outside the through-hole, and the lower surface of the protruded portion contacts to the upper surface of the wiring board. When the semiconductor device is manufactured, the heat sink is inserted from the upper surface side of the wiring board.

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Номер записи: 27
15-03-2012 дата публикации

Semiconductor chip, stacked chip semiconductor package including the same, and fabricating method thereof

Номер: US20120061834A1
Автор: Tae Min Kang
Принадлежит: Hynix Semiconductor Inc

A semiconductor chip includes a silicon wafer formed with a via hole, a metal wire disposed in the via hole, and a filler that exposes a part of an upper portion of the metal wire while filing the via hole.

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Номер записи: 28
15-03-2012 дата публикации

Semiconductor package integrated with conformal shield and antenna

Номер: US20120062439A1
Автор: Chi-Hong Chan, Kuo-Hsien Liao, Shih Fuyu
Принадлежит: Advanced Semiconductor Engineering Inc

A semiconductor package integrated with conformal shield and antenna is provided. The semiconductor package includes a semiconductor element, an electromagnetic interference shielding element, a dielectric structure, an antenna element and an antenna signal feeding element. The electromagnetic interference shielding element includes an electromagnetic interference shielding film and a grounding element, wherein the electromagnetic interference shielding film covers the semiconductor element and the grounding element is electrically connected to the electromagnetic interference shielding layer and a grounding segment of the semiconductor element. The dielectric structure covers a part of the electromagnetic interference shielding element and has an upper surface. The antenna element is formed adjacent to the upper surface of the dielectric structure. The antenna signal feeding element passing through the dielectric structure electrically connects the antenna element and the semiconductor element.

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Номер записи: 29
15-03-2012 дата публикации

Manufacturing method of substrate for a semiconductor package, manufacturing method of semiconductor package, substrate for a semiconductor package and semiconductor package

Номер: US20120064666A1
Автор: Shigeru Hosomomi, Yoichiro Hamada
Принадлежит: SUMITOMO METAL MINING CO LTD

A manufacturing method of a substrate for a semiconductor package includes a resist layer forming step to form a resist layer on a surface of a conductive substrate; an exposure step to expose the resist layer using a glass mask with a mask pattern including a transmission area, a light shielding area, and an intermediate transmission area, wherein transmittance of the intermediate transmission area is lower than that of the transmission area and is higher than that of the light shielding area; a development step to form a resist pattern including a hollow with a side shape including a slope part decreasing in hollow circumference as the hollow circumference approaches the substrate; and a plating step to plate on an exposed area to form a metal layer with a side shape including a slope part decreasing in circumference as the circumference approaches the substrate.

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Номер записи: 30
22-03-2012 дата публикации

Integrated circuit packaging system with stack interconnect and method of manufacture thereof

Номер: US20120068319A1
Автор: Daesik Choi, Oh Han Kim, SangMi Park
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: forming a connection carrier having base device pads and base interconnect pads on a carrier top side of the connection carrier; connecting a base integrated circuit to the base device pads and mounted over the carrier top side; mounting base vertical interconnects directly on the base interconnect pads; attaching a base package substrate to the base integrated circuit and directly on the base vertical interconnects; forming a base encapsulation on the base package substrate, the base device pads, and the base interconnect pads; and removing a portion of the connection carrier with the base device pads and the base interconnect pads partially exposed opposite the base package substrate.

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Номер записи: 31
22-03-2012 дата публикации

Substrate bonding with metal germanium silicon material

Номер: US20120068325A1
Автор: Alex P. Pamatat, Ruben B. Montez
Принадлежит: FREESCALE SEMICONDUCTOR INC

In one embodiment, a semiconductor structure including a first substrate, a semiconductor device on the first substrate, a second substrate, and a conductive bond between the first substrate and the second substrate that surrounds the semiconductor device to seal the semiconductor device between the first substrate and the second substrate. The conductive bond comprises metal, silicon, and germanium. A percentage by atomic weight of silicon in the conductive bond is greater than 5%.

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Номер записи: 32
22-03-2012 дата публикации

Integrated circuit packaging system with active surface heat removal and method of manufacture thereof

Номер: US20120068328A1
Автор: Hin Hwa Goh, KANG Chen, Rui Huang, Xusheng Bao, Yung Kuan Hsiao
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: providing an interconnect structure having a structure bottom side, a structure top side, and a cavity, the structure bottom side electrically connected to the structure top side; mounting an integrated circuit entirely within the cavity, the integrated circuit having an active side coplanar with the structure top side; forming an encapsulation partially covering the interconnect structure and the integrated circuit, the encapsulation having an encapsulation top side coplanar with the structure top side and the active side; forming a top re-passivation layer over the structure top side and the encapsulation; and mounting a heat sink over the top re-passivation layer for removing heat from the active side.

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Номер записи: 33
22-03-2012 дата публикации

Semiconductor device and method of manufacturing the same

Номер: US20120069530A1
Автор: Kazushige Kanda, Satoshi Inoue, Yuui Shimizu
Принадлежит: Toshiba Corp

According to one embodiment, a semiconductor device includes a stacked chip includes semiconductor chips which are stacked, the semiconductor chips comprises semiconductor substrates and through electrodes formed in the semiconductor substrates, respectively, the through electrodes being electrically connected, and deactivating circuits provided in the semiconductor chips, respectively, and configured to deactivate a failed semiconductor chip.

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Номер записи: 34
22-03-2012 дата публикации

Method of making a light emitting device having a molded encapsulant

Номер: US20120070921A1
Автор: Catherine A. Leatherdale, D. Scott Thompson, Larry D. Boardman
Принадлежит: 3M Innovative Properties Co

Disclosed herein is a method of making a light emitting device having an LED die and a molded encapsulant made by polymerizing at least two polymerizable compositions. The method includes: (a) providing an LED package having an LED die disposed in a reflecting cup, the reflecting cup filled with a first polymerizable composition such that the LED die is encapsulated; (b) providing a mold having a cavity filled with a second polymerizable composition; (c) contacting the first and second polymerizable compositions; (d) polymerizing the first and second polymerizable compositions to form first and second polymerized compositions, respectively, wherein the first and second polymerized compositions are bonded together; and (e) optionally separating the mold from the second polymerized composition. Light emitting devices prepared according to the method are also described.

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Номер записи: 35
29-03-2012 дата публикации

Integrated circuit packaging system with warpage control and method of manufacture thereof

Номер: US20120074588A1
Автор: Hin Hwa Goh, KANG Chen, Rui Huang, Xusheng Bao, Yung Kuan Hsiao
Принадлежит: Individual

A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier.

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Номер записи: 36
29-03-2012 дата публикации

Flexible underfill compositions for enhanced reliability

Номер: US20120074597A1
Автор: Dingying Xu, Gregory S. Constable, Hong Dong, Nachiket Raravikar, Nisha ANANTHAKRISHNAN, Rahul N. Manepalli
Принадлежит: Intel Corp

Underfill materials for fabricating electronic devices are described. One embodiment includes an underfill composition including an epoxy mixture, an amine hardener component, and a filler. The epoxy mixture may include a first epoxy comprising a bisphenol epoxy, a second epoxy comprising a multifunctional epoxy, and a third epoxy comprising an aliphatic epoxy, the aliphatic epoxy comprising a silicone epoxy. The first, second, and third epoxies each have a different chemical structure. Other embodiments are described and claimed.

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Номер записи: 37
05-04-2012 дата публикации

Light emitting diode package and method of making the same

Номер: US20120080693A1
Автор: HUNG-YI LIN, Kuan-Jui Huang, She-Fen Tien, Yen-Ting Kung
Принадлежит: Touch Micro System Technology Inc

The light emitting diode package of the present invention uses photosensitive materials to form phosphor encapsulations or a phosphor layer, which can be fabricated by means of semiconductor processes in batch. Also, the concentration of phosphors in individual regions can be accurately and easily controlled by a laser printing process or by light-through holes. Accordingly, the optic effects of light emitting diode packages can be accurately adjusted.

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Номер записи: 38
05-04-2012 дата публикации

Off-chip vias in stacked chips

Номер: US20120080807A1
Автор: Belgacem Haba, David Ovrutsky, Ilyas Mohammed, Laura Wills Mirkarimi, Vage Oganesian
Принадлежит: Tessera LLC

A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

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Номер записи: 39
05-04-2012 дата публикации

Semiconductor die package including low stress configuration

Номер: US20120083071A1
Автор: Maria Clemens Y. Quinones, Maria Cristina B. Estacio
Принадлежит: Individual

A semiconductor die package. The semiconductor die package comprises a semiconductor die and a molded clip structure comprising a clip structure and a first molding material covering at least a portion of the clip structure. The first molding material exposes an outer surface of the clip structure. The clip structure is electrically coupled to the semiconductor die. The semiconductor die package further comprises a leadframe structure comprising a die attach pad and a plurality of leads extending from the die attach pad. The semiconductor die is on the die attach pad of the leadframe structure. A second molding material covers at least a portion of the semiconductor die and the leadframe structure. The semiconductor die package also includes a heat slug and a thermally conductive material coupling the heat slug to the exposed surface of the clip structure.

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Номер записи: 40
12-04-2012 дата публикации

Package systems and manufacturing methods thereof

Номер: US20120086126A1
Автор: Chia-Pao SHU, Chun-Wen Cheng, Kuei-Sung CHANG
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A package system includes a first substrate and a second substrate. The second substrate is electrically coupled with the first substrate. The second substrate includes at least one first opening. At least one electrical bonding material is disposed between the first substrate and the second substrate. A first portion of the at least one electrical bonding material is at least partially filled in the at least one first opening.

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Номер записи: 41
12-04-2012 дата публикации

Package systems and manufacturing methods thereof

Номер: US20120086127A1
Автор: Chia-Pao SHU, Chun-Wen Cheng, Hsin-Ting HUANG, Jung-Huei Peng, Kuei-Sung CHANG, Shang-Ying Tsai
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A package system includes a first substrate. A second substrate is electrically coupled with the first substrate. At least one electrical bonding material is disposed between the first substrate and the second substrate. The at least one electrical bonding material includes a eutectic bonding material. The eutectic bonding material includes a metallic material and a semiconductor material. The metallic material is disposed adjacent to a surface of the first substrate. The metallic material includes a first pad and at least one first guard ring around the first pad.

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Номер записи: 42
26-04-2012 дата публикации

Chip package and manufacturing method thereof

Номер: US20120098109A1
Автор: Dongkyun Ko, Jaesun An, Jung Lee
Принадлежит: Individual

A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure.

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Номер записи: 43
03-05-2012 дата публикации

Cutting and clamping device

Номер: US20120102700A1
Автор: Feng-Chi Lee, Kuo-Chuan Chiu, Tsung-han Wei
Принадлежит: Cheng Uei Precision Industry Co Ltd

A cutting and clamping device includes an electrical control box. A base board is mounted atop the electrical control box and includes slide rails and a slide block. A supply mechanism is mounted to the base board for supplying an un-processed part strip. A conveyance mechanism is mounted to the slide block and has one end adjacent to the supply mechanism. A forwarding mechanism is mounted on the conveyance mechanism and includes a sharp tip, which is releasably insertable into positioning holes defined in the part strip. A cutting mechanism is mounted to the slide block and is connected to an opposite end of the conveyance mechanism. The cutting mechanism includes a cutting blade assembly and defines a cutting zone into which the cutting blade assembly is extendable. A clamping and retaining mechanism includes a first clamp assembly, a second clamp assembly, and a retaining assembly.

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Номер записи: 44
03-05-2012 дата публикации

Semiconductor package and manufacturing method thereof

Номер: US20120104571A1
Автор: Jin O. YOO
Принадлежит: Samsung Electro Mechanics Co Ltd

There are provided a semiconductor package including an electromagnetic shielding structure having excellent electromagnetic interference (EMI) and electromagnetic susceptibility (EMS) characteristics, while protecting individual elements in an inner portion thereof from impacts, and a manufacturing method thereof. The semiconductor package includes: a substrate having ground electrodes formed on an upper surface thereof; at least one electronic component mounted on the upper surface of the substrate; an insulating molding part including an internal space in which the electronic component is accommodated, and fixed to the substrate such that at least a portion of the ground electrode is externally exposed; and a conductive shield part closely adhered to the molding part to cover an outer surface of the molding part and electrically connected to the externally exposed ground electrodes.

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Номер записи: 45
03-05-2012 дата публикации

Semiconductor package device with a heat dissipation structure and the packaging method thereof

Номер: US20120104581A1
Автор: Chia-Feng Yeh, Chung-Hwa Wu, Shao-Kang Hung
Принадлежит: Global Unichip Corp

The present invention provide a heat dissipation structure on the active surface of the die to increase the performance of the heat conduction in longitude direction of the semiconductor package device, so that the heat dissipating performance can be improved when the semiconductor package device is associated with the exterior heat dissipation mechanism.

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Номер записи: 46
03-05-2012 дата публикации

Chip-on-chip structure and manufacturing method therof

Номер: US20120104597A1
Автор: Junji Yoshikawa, Tatsuji Ishiduka, Tsutomu Kojima
Принадлежит: Toshiba Corp

According to an embodiment, a chip-on-chip structure includes a first chip, a second chip, the first chip and the second chip being opposite to each other, a first electrode terminal, a second electrode terminal, a bump and a protecting material. The first electrode terminal is provided on the surface of the first chip at the side of the second chip. The second electrode terminal is provided on the surface of the second chip at the side of the first chip. The bump electrically connects the first electrode terminal and the second electrode terminal. The protecting material is formed around the bump between the first chip and the second chip. The protecting material includes a layer made of a material having heat-sensitive adhesive property.

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Номер записи: 47
03-05-2012 дата публикации

Method for Producing an Electrical Circuit and Electrical Circuit

Номер: US20120106112A1
Автор: Ricardo Ehrenpfordt, Sonja Knies
Принадлежит: ROBERT BOSCH GMBH

A method for producing an electrical circuit includes providing a main printed circuit board having a plurality of metalized plated-through holes through the main printed circuit board along at least one separating line between adjacent printed circuit board regions of the main printed circuit board. Each printed circuit board region has electrical contact connection pads on at least the main surface of the printed circuit board region that is to be populated, electrical lines for connection between the plurality of plated-through holes and the contact connection pads, and at least one semiconductor chip electrically contact-connected by means of the contact connection pads. The main printed circuit board is covered with a potting compound across the printed circuit board regions with the semiconductor chips.

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Номер записи: 48
10-05-2012 дата публикации

Electronic element unit and reinforcing adhesive agent

Номер: US20120111617A1
Автор: Koji Motomura, Seiichi Yoshinaga, Tadahiko Sakai
Принадлежит: Panasonic Corp

It is an object of the present invention to provide an electronic element unit and a reinforcing adhesive agent in which a bonding strength can be improved between an electronic element and a circuit board and a repairing work can be carried out without giving a thermal damage to the electronic element or the circuit board. In an electronic element unit ( 1 ) including an electronic element ( 2 ) having a plurality of connecting terminals ( 12 ) on a lower surface thereof, a circuit board ( 3 ) having a plurality of electrodes ( 22 ) corresponding to the connecting terminals ( 12 ) on an upper surface thereof. The connecting terminals ( 12 ) and the electrodes ( 22 ) are connected by solder bumps ( 23 ), and the electronic element ( 2 ) and the circuit board ( 3 ) are partly bond by a resin bond part ( 24 ) made of a thermosetting material of a thermosetting resin, and a metal powder ( 25 ) is included in the resin bond parts ( 24 ) in a dispersed state. The metal powder ( 25 ) has a melting point lower than a temperature at which the resin bond parts ( 24 ) are heated when a work (a repairing work) is carried out for removing the electronic element ( 2 ) from the circuit board ( 3 ).

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Номер записи: 49
10-05-2012 дата публикации

Semiconductor Device and Method of Forming Prefabricated EMI Shielding Frame with Cavities Containing Penetrable Material Over Semiconductor Die

Номер: US20120112327A1
Автор: Reza A. Pagaila, Yaojian Lin
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a plurality of semiconductor die mounted to a temporary carrier. A prefabricated shielding frame has a plate and integrated bodies extending from the plate. The bodies define a plurality of cavities in the shielding frame. A penetrable material is deposited in the cavities of the shielding frame. The shielding frame is mounted over the semiconductor die such that the penetrable material encapsulates the die. The carrier is removed. An interconnect structure is formed over the die, shielding frame, and penetrable material. The bodies of the shielding frame are electrically connected through the interconnect structure to a ground point. The shielding frame is singulated through the bodies or through the plate and penetrable material to separate the die. TIM is formed over the die adjacent to the plate of the shielding frame. A heat sink is mounted over the plate of the shielding frame.

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Номер записи: 50
10-05-2012 дата публикации

Semiconductor device with nested rows of contacts

Номер: US20120112333A1
Автор: Qiang Liu, Qingchun He, Zhaojun Tian
Принадлежит: FREESCALE SEMICONDUCTOR INC

A molded surface mount semiconductor device has electrical contact elements disposed in a set of pairs of zigzag rows extending adjacent and generally parallel to opposite edges of an active face of a semiconductor die. Each of the pairs of rows includes an inner zigzag row of electrical contact elements nested inside an outer zigzag row of electrical contact elements. The electrical contact elements of the inner and outer zigzag rows are partially inter-digitated. A lead frame used in making the device also has a die pad located inside the set of pairs of zigzag rows, and an outer frame element located outside the set of pairs of zigzag rows, and which support the electrical contact elements of the inner and outer zigzag rows respectively.

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Номер записи: 51
17-05-2012 дата публикации

Semiconductor Device And Method Of Manufacturing Semiconductor Device

Номер: US20120119338A1
Автор: Shintaro Yamamichi, Takahito Watanabe, Yoshitaka USHIYAMA
Принадлежит: Renesas Electronics Corp

A semiconductor chip includes a magnetic storage device and includes an electrode pad on a first face. The semiconductor chip is coated with a magnetic shield layer in a state in which at least the electrode pad is exposed. The semiconductor chip is mounted on an interconnect substrate through a bump. At least one of the semiconductor chip and the interconnect substrate includes a convex portion, and the bump is disposed over the convex portion.

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Номер записи: 52
17-05-2012 дата публикации

System for clamping heat sink

Номер: US20120119351A1
Автор: Greg Mlotkowski
Принадлежит: Harman International Industries Inc

A system for clamping a heat sink that prevents excessive clamping force is provided. The system may include a heat sink, a semiconductor device, a printed circuit board, and a cover. The semiconductor device may be mounted onto the circuit board and attached to the cover. The heat sink may be designed to interface with the semiconductor device to transfer heat away from the semiconductor device and dissipate the heat into the environment. Accordingly, the heat sink may be clamped into a tight mechanical connection with the semiconductor device to minimize thermal resistance between the semiconductor device and the heat sink. To prevent excessive clamping force from damaging the semiconductor device, loading columns may extend between the cover and the heat sink.

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Номер записи: 53
17-05-2012 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US20120119375A1
Автор: Cha-Hsin Lin, John H. Lau, Jui-Chin Chen, Tzu-Kun Ku
Принадлежит: Industrial Technology Research Institute ITRI

In a manufacturing method of a semiconductor structure, a substrate having a front surface and a back surface is provided. The front surface has a device layer thereon and conductive plugs electrically connected to the device layer. A thinning process is performed on the back surface of the substrate, such that the back surface of the substrate and surfaces of the conductive plugs have a distance therebetween. Holes are formed in the substrate from the back surface to the conductive plugs, so as to form a porous film. An oxidization process is performed, such that the porous film correspondingly is reacted to form an oxide material layer. A polishing process is performed on the oxide material layer to expose the surfaces of the conductive plugs.

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Номер записи: 54
17-05-2012 дата публикации

Electric part package and manufacturing method thereof

Номер: US20120119379A1
Автор: Kenta Uchiyama, Masahiro Kyozuka, Naoyuki Koizumi
Принадлежит: Shinko Electric Industries Co Ltd

A disclosed electric part package includes a supporting member that includes a first area in which an electric part is arranged, and a second area in which a first opening is positioned, the second area being isolated from the first area; a resin part provided on the supporting member thereby to cover the electric part arranged in the first area, the resin part including an electric terminal exposed in the first opening of the supporting member; and a wiring structure provided on the resin part, the wiring structure being electrically connected to the electric part and the electric terminal of the resin part.

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Номер записи: 55
24-05-2012 дата публикации

Illumination apparatus

Номер: US20120126266A1
Автор: Gen Watari, Kazuhiro Inoue
Принадлежит: Toshiba Corp

According to one embodiment, an illumination apparatus includes an LED (Light Emitting Diode) module, a light guide plate, and a support body. The support body supports the LED module and the light guide plate. A reflective surface of the support body is provided between a portion supporting the LED module and a portion supporting the light guide plate. The reflective surface is reflective with respect to the light emitted from the LED package. The LED module is tilted relative to the reflective surface with the LED package mounting surface being toward the reflective surface. An angle between the LED module and the reflective surface is less than 90°.

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Номер записи: 56
24-05-2012 дата публикации

Semiconductor device package with electromagnetic shielding

Номер: US20120126378A1
Автор: Allan C. Toriaga, Anang Subagio, Michael H. McKerreghan, Romarico S. San Antonio
Принадлежит: Unisem (Mauritius) Holdings Ltd

A package for a semiconductor device includes shielding from RF interference. The package has a lead frame with a lead and a connecting bar. The lead has an inner end for connecting to the device and an outer end having an exposed surface at the package side face. The connecting bar also has an end with an exposed surface at the package side face. A molding compound overlying the leadframe forms a portion of the side face. Electrically conductive shielding forms a top surface of the package, and extends downward therefrom to form an upper portion of the package side face. The exposed surface at the connecting bar end has an upper edge higher than the upper edge of the exposed surface of lead end. Accordingly, the shielding makes electrical contact with the connecting bar adjacent to its exposed surface, while being electrically isolated from the lead.

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Номер записи: 57
24-05-2012 дата публикации

Semiconductor device and method of forming the same

Номер: US20120126402A1
Автор: Keiyo Kusanagi, Koichi Hatakeyama, Mitsuhisa Watanabe
Принадлежит: Elpida Memory Inc

A semiconductor device includes a wiring board; a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chip comprising via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes to the wiring board; a first seal that seals the stack of semiconductor chips; and a second seal that covers the first seal. The first seal is smaller in elastic modulus than the second seal.

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Номер записи: 58
31-05-2012 дата публикации

Semiconductor Structures and Method for Fabricating the Same

Номер: US20120135201A1
Автор: Ching-Hung Ko, Mu-Jia Liu, Tsung-Chieh Chang
Принадлежит: Himax Technologies Ltd

A semiconductor structure is provided. The semiconductor structure includes a first substrate, a second substrate opposite to the first substrate, a plurality of spacers disposed between the first substrate and the second substrate, and an adhesive material bonded with the first substrate and the second substrate within the two adjacent spacers. The invention also provides a method for fabricating the semiconductor structure.

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Номер записи: 59
07-06-2012 дата публикации

Wafer mold material and method for manufacturing semiconductor apparatus

Номер: US20120139131A1
Автор: Hideto Kato, Kazunori Kondo, Michihiro Sugo
Принадлежит: Shin Etsu Chemical Co Ltd

The invention provides a wafer mold material for collectively subjecting a wafer having semiconductor devices on a surface thereof to resin molding, wherein the wafer mold material has a resin layer containing a filler and at least any one of an acrylic resin, a silicone resin having an epoxy group, an urethane resin, and a polyimide silicone resin, and the wafer mold material is formed into a film-like shape. There can be a wafer mold material that enables collective molding (wafer molding) with respect to a wafer having semiconductor devices formed thereon, has excellent transference performance with respect to a large-diameter thin-film wafer, can provide a flexible hardened material with low-stress properties, and can be preferably used as a mold material in a wafer level package with less warp of a formed (molded) wafer.

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Номер записи: 60
14-06-2012 дата публикации

Mold release film and process for producing light emitting diode

Номер: US20120148820A1
Автор: Tamao Okuya
Принадлежит: Asahi Glass Co Ltd

To provide a mold release film for producing a light emitting diode by a mold, which is less susceptible to formation of pin holes or rupture and which is applicable to mass production of a light emitting diode by means of a mold having a plurality of cavities, and a process for producing a light emitting diode by means of such a mold release film. A mold release film to be disposed on the cavity surface of a mold to form a substantially hemispherical lens portion by encapsulating a light emitting element of a light emitting diode with an encapsulation resin, which release film has a thickness of from 16 to 175 μm and a tensile rupture elongation of from 600 to 3,000% at 110° C. as measured in accordance with JIS K7127, and a process for producing a light emitting diode by means of such a mold release film.

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Номер записи: 61
14-06-2012 дата публикации

Method for Manufacturing Heat Dissipation Bulk of Semiconductor Device

Номер: US20120149138A1
Автор: Chun-Liang Lin, Kuan-Chun Chen, Yan-Kuin Su
Принадлежит: National Cheng Kung University NCKU

A method for manufacturing a heat dissipation bulk of a semiconductor device including the following steps is described. An electrically conductive layer is formed to cover a surface of a temporary substrate. At least one semiconductor chip is connected to the electrically conductive layer by at least one metal bump, wherein the at least one metal bump is located between the at least one semiconductor chip and the electrically conductive layer. A metal substrate is formed on the electrically conductive layer, wherein the metal substrate fills up a gap between the at least one semiconductor chip and the electrically conductive layer. The temporary substrate is removed.

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Номер записи: 62
21-06-2012 дата публикации

Tsv for 3d packaging of semiconductor device and fabrication method thereof

Номер: US20120153496A1
Автор: Chang-woo Lee, Jae-hak Lee, Joon-Yub Song, Tae-Ho Ha
Принадлежит: Korea Institute of Machinery and Materials KIMM

The present invention relates to a through silicon via (TSV) for 3D packaging to integrate a semiconductor device and a method for manufacturing the same, and more particularly, to a through silicon via (TSV) for 3D packaging of a semiconductor device that is capable of improving production efficiency, having very high electric conductivity, and minimizing electrical signal delay, without using a carrier wafer by self-aligning substrates in a low temperature state and sequentially bonding a plurality of semiconductor dies (or semiconductor chips), and a method of manufacturing the same.

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Номер записи: 63
21-06-2012 дата публикации

Semiconductor package and manufacturing method therefor

Номер: US20120153509A1
Автор: Akihiko Tateiwa, Masahiro Kyozuka, Toru Hizume
Принадлежит: Shinko Electric Industries Co Ltd

According to one embodiment, there is provided a semiconductor package including: a semiconductor chip; a resin portion formed to cover the semiconductor chip; a wiring structure formed on the resin portion and electrically connected to the semiconductor chip; and a warpage preventing member provided above the resin portion to have a thermal expansion coefficient closer to that of the semiconductor chip than to that of the wiring structure.

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Номер записи: 64
28-06-2012 дата публикации

Semiconductor Device and Method of Forming Integrated Passive Device Over Semiconductor Die with Conductive Bridge and Fan-Out Redistribution Layer

Номер: US20120161279A1
Автор: Kai Liu, KANG Chen, Yaojian Lin
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a first semiconductor die. A first inductor is formed over the first semiconductor die. A second inductor is formed over the first inductor and aligned with the first inductor. An insulating layer is formed over the first semiconductor die and the first and second inductors. A conductive bridge is formed over the insulating layer and electrically connected between the second inductor and the first semiconductor die. In one embodiment, the semiconductor device has a second semiconductor die and a conductive layer is formed between the first and second semiconductor die. In another embodiment, a capacitor is formed over the first semiconductor die. In another embodiment, the insulating layer has a first thickness over a footprint of the first semiconductor die and a second thickness less than the first thickness outside the footprint of the first semiconductor die.

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Номер записи: 65
28-06-2012 дата публикации

Chip scale surface mounted semiconductor device package and process of manufacture

Номер: US20120161307A1
Автор: Tao Feng
Принадлежит: ALPHA AND OMEGA SEMICONDUCTOR INC

A semiconductor device package die and method of manufacture are disclosed. The device package die may comprise a device substrate having one or more front electrodes located on a front surface of the device substrate and electrically connected to one or more corresponding device regions formed within the device substrate proximate the front surface. A back conductive layer is formed on a back surface of the device substrate. The back conductive layer is electrically connected to a device region formed within the device substrate proximate a back surface of the device substrate. One or more conductive extensions are formed on one or more corresponding sidewalls of the device substrate in electrical contact with the back conductive layer, and extend to a portion of the front surface of the device substrate. A support substrate is bonded to the back surface of the device substrate.

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Номер записи: 66
28-06-2012 дата публикации

Semiconductor device and assembling method thereof

Номер: US20120161336A1
Автор: Chau-Jie Zhan, Su-Tsai Lu, Yu-Min Lin
Принадлежит: Industrial Technology Research Institute ITRI

A semiconductor device and an assembling method thereof are provided. The semiconductor device includes a chip, a carrier, a plurality of first conductive elements and a plurality of second conductive elements. The chip has a plurality of first pads. The carrier has a plurality of second pads. The second pads correspond to the first pads. Each first conductive element is disposed between one of the first pads and one of the second pads. Each second conductive element is disposed between one of the first pads and one of the second pads. A volume ratio of intermetallic compound of the second conductive elements is greater than a volume ratio of intermetallic compound of the first conductive elements.

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Номер записи: 67
28-06-2012 дата публикации

Method of Manufacturing a Printable Composition of a Liquid or Gel Suspension of Diodes

Номер: US20120164796A1
Автор: Brad Oraw, Eric Anthony Perozziello, Jeffrey Baldridge, Mark Allan Lewandowski, Mark David Lowenthal, Neil O. Shotton, Richard A. Blanchard, William Johnstone Ray
Принадлежит: NthDegree Technologies Worldwide Inc

An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary method of making a liquid or gel suspension of diodes comprises: adding a viscosity modifier to a plurality of diodes in a first solvent; and mixing the plurality of diodes, the first solvent and the viscosity modifier to form the liquid or gel suspension of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.

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Номер записи: 68
05-07-2012 дата публикации

Low cost thermally enhanced hybrid bga and method of manufacturing the same

Номер: US20120168929A1
Автор: Kim-yong Goh
Принадлежит: STMICROELECTRONICS PTE LTD

A semiconductor package is formed having a substrate juxtaposed on at least two sides of a semiconductor die. Both the substrate and the semiconductor die are affixed to a conductive layer that draws heat generated during use of the semiconductor package away from the semiconductor die and the substrate. There are also electrical contacts affixed to the substrate and the semiconductor die. The electrical contacts facilitate electrical connection between the semiconductor die, the substrate, and any external devices or components making use of the semiconductor die. The substrate, semiconductor die, and at least a portion of some of the electrical contacts are enclosed by an encapsulating layer insulating the components. Portions of the electrical contacts not enclosed by the encapsulating layer are affixed to an outside device, such as a printed circuit board.

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Номер записи: 69
12-07-2012 дата публикации

Method of post-mold grinding a semiconductor package

Номер: US20120175786A1
Автор: Chong Hin Tan, James Yii Lee Kiong, Max Mah Boon Hooi, Shivaram Sahadevan, Tang Shiau Phing
Принадлежит: Individual

A method of grinding a molded semiconductor package to a desired ultra thin thickness without damage to the package is disclosed. Prior to grinding a molded package to a desired package thickness, the package may be protected from excessive mechanical stress generated during grinding by applying a protective tape to enclose interconnects formed on the package. This way, the protective tape provides support to the semiconductor package during package grinding involving the mold material as well as the die. In the post-grind package, the grinded die surface may be exposed and substantially flush with the mold material. The protective tape may then be removed to prepare the post-grind package for connection with an external device or PCB.

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Номер записи: 70
12-07-2012 дата публикации

Alignment marks to enable 3d integration

Номер: US20120175789A1
Автор: Emily R. Kinser, Kevin R. Winstel, Kevin S. Patrarca, Mukta G. Farooq, Richard P. Volant, Robert Hannon, Troy L. Graves-Abe, William F. Landers
Принадлежит: International Business Machines Corp

Disclosed are a structure including alignment marks and a method of forming alignment marks in three dimensional (3D) structures. The method includes forming apertures in a first surface of a first semiconductor substrate; joining the first surface of the first semiconductor substrate to a first surface of a second semiconductor substrate; thinning the first semiconductor on a second surface of the first semiconductor substrate to provide optical contrast between the apertures and the first semiconductor substrate; and aligning a feature on the second surface of the first semiconductor substrate using the apertures as at least one alignment mark.

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Номер записи: 71
26-07-2012 дата публикации

Direct Edge Connection for Multi-Chip Integrated Circuits

Номер: US20120187577A1
Автор: James L. Speidell, John U. Knickerbocker, Matthew J. Farinelli, Peter A. Gruber, Sherif A. Goma, Steven A. Cordes
Принадлежит: International Business Machines Corp

The present invention allows for direct chip-to-chip connections using the shortest possible signal path.

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Номер записи: 72
02-08-2012 дата публикации

Semiconductor device and method of fabricating the same

Номер: US20120193779A1
Автор: Chung-Sun Lee, Hyun-jung SONG, Jung-Hwan Kim, Sun-pil Youn, Tae-Hong Min
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A stack of semiconductor chips, a semiconductor device, and a method of manufacturing are disclosed. The stack of semiconductor chips may comprise a first chip of the stack, a second chip of the stack over the first chip, conductive bumps, a homogeneous integral underfill material, and a molding material. The conductive bumps may extend between an upper surface of the first chip and a lower surface of the second chip. The homogeneous integral underfill material may be interposed between the first chip and the second chip, encapsulate the conductive bumps, and extend along sidewalls of the second chip. The homogeneous integral underfill material may have an upper surface extending in a direction parallel to an upper surface of the second chip and located adjacent the upper surface of the second chip. The molding material may be on outer side surfaces of the homogeneous integral underfill material above the upper surface of the first chip, wherein, in view of a first cross sectional profile, the molding material is separated from sidewalls of the second chip by the homogeneous integral underfill material such that the molding material does not contact sidewalls of the second chip.

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Номер записи: 73
02-08-2012 дата публикации

Ohmic connection using widened connection zones in a portable electronic object

Номер: US20120193804A1
Автор: Yannick Grasset
Принадлежит: RFIDEAL

The invention relates to portable electronic objects comprising an integrated circuit chip, and a mounting having two connection terminals for a circuit, as well as to a method for manufacturing such objects. The invention is characterized in that the chip is provided, on the active surface thereof, with two widened connection zones, in particular connection plates, said connection plates being positioned opposite said terminals and electrically connected, by ohmic contact, to the latter, and in that the surface defined by the connection plates, at the surface of the active integrated circuit having said plates, is greater than ½ of the surface of said surface. The invention can be used, in particular, for RFID objects.

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Номер записи: 74
09-08-2012 дата публикации

Semiconductor device and method of fabricating the semiconductor device

Номер: US20120199981A1
Автор: Ho-geon Song, Jae-hyun PHEE, Ju-Il Choi, Se-young Jeong
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A semiconductor device includes a first device including a first substrate and a first external connection terminal for connecting outside the first device; a second device stacked on the first device, the second device including a second substrate and a second external connection terminal for connecting outside the second device; an adhesive pattern disposed between the first device and second device, the adhesive pattern disposed in locations other than locations where the first external connection terminal and second external connection terminal are disposed, and the adhesive pattern causing the first device and second device, when stacked, to be spaced apart by a predetermined distance; and a plated layer disposed between and electrically and physically connecting the first external connection terminal and the second external connection terminal.

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Номер записи: 75
16-08-2012 дата публикации

Semiconductor package and method for manufacturing the same

Номер: US20120208325A1
Автор: Qwan Ho Chung
Принадлежит: Hynix Semiconductor Inc

Manufacturing a semiconductor package includes preparing a semiconductor chip having a top surface with bumps electrically connected to bonding pads, a bottom surface opposite to the top surface and side surfaces joining the top surface to the bottom surface. The bottom surface of the semiconductor chip is attached to a base substrate. A heat pressure process is performed to form a wiring support member on the base substrate to cover the top surface and the side surfaces of the semiconductor chip while exposing each of the bumps. Wirings are formed to be electrically connected to the bumps on the wiring support member. The base substrate is removed from the semiconductor chip and the wiring support member.

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Номер записи: 76
30-08-2012 дата публикации

Semiconductor Device and Method of Forming the Device Using Sacrificial Carrier

Номер: US20120217634A9
Автор: Il Kwon Shim, Seng Guan Chow, Yaojian Lin
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device includes a first semiconductor die or component having a plurality of bumps, and a plurality of first and second contact pads. In one embodiment, the first and second contact pads include wettable contact pads. The bumps are mounted directly to a first surface of the first contact pads to align the first semiconductor die or component. An encapsulant is deposited over the first semiconductor die or component. An interconnect structure is formed over the encapsulant and is connected to a second surface of the first and second contact pads opposite the first surface of the first contact pads. A plurality of vias is formed through the encapsulant and extends to a first surface of the second contact pads. A conductive material is deposited in the vias to form a plurality of conductive vias that are aligned by the second contact pads to reduce interconnect pitch.

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Номер записи: 77
30-08-2012 дата публикации

Semiconductor Device and Method of Forming Bond Wires Between Semiconductor Die Contact Pads and Conductive TOV in Peripheral Area Around Semiconductor Die

Номер: US20120217643A1
Автор: Byung Tai Do, Dioscoro A. Merilo, Reza A. Pagaila
Принадлежит: Stats Chippac Pte Ltd

A semiconductor wafer has a plurality of semiconductor die with contact pads. An organic material is deposited in a peripheral region around the semiconductor die. A portion of the organic material is removed to form a plurality of vias. A conductive material is deposited in the vias to form conductive TOV. The conductive TOV can be recessed with respect to a surface of the semiconductor die. Bond wires are formed between the contact pads and conductive TOV. The bond wires can be bridged in multiple sections across the semiconductor die between the conductive TOV and contact pads. An insulating layer is formed over the bond wires and semiconductor die. The semiconductor wafer is singulated through the conductive TOV or organic material between the conductive TOV to separate the semiconductor die. A plurality of semiconductor die can be stacked and electrically connected through the bond wires and conductive TOV.

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Номер записи: 78
30-08-2012 дата публикации

Semiconductor devices and methods of manufacturing semiconductor devices

Номер: US20120217652A1
Автор: David S. Pratt
Принадлежит: Micron Technology Inc

Semiconductor devices and methods of manufacturing semiconductor devices. One example of a method of fabricating a semiconductor device comprises forming a conductive feature extending through a semiconductor substrate such that the conductive feature has a first end and a second end opposite the first end, and wherein the second end projects outwardly from a surface of the substrate. The method can further include forming a dielectric layer over the surface of the substrate and the second end of the conductive feature such that the dielectric layer has an original thickness. The method can also include removing a portion of the dielectric layer to an intermediate depth less than the original thickness such that at least a portion of the second end of the conductive feature is exposed.

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Номер записи: 79
30-08-2012 дата публикации

Semiconductor apparatus, method for manufacturing the same and electric device

Номер: US20120217660A1
Автор: Keishiro Okamoto, Motoaki Tani
Принадлежит: Fujitsu Ltd

A semiconductor apparatus includes: a semiconductor device including a first electrode; a substrate including a second electrode and a recess; and a heat-dissipating adhesive material to set the semiconductor device in the recess so as to arrange the first electrode close to the second electrode, wherein the first electrode is coupled to the second electrode and the heat-dissipating adhesive material covers a bottom surface and at least part of a side surface of the semiconductor device.

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Номер записи: 80
06-09-2012 дата публикации

Method for producing an integrated device

Номер: US20120222294A1
Автор: Laurent A. DELLMANN, Michel Despont, Roland M. Guerre, Ute Drechsler
Принадлежит: International Business Machines Corp

An article for producing an integrated device includes a deformable layer and one or more components releasably attached on one surface of the deformable layer.

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Номер записи: 81
13-09-2012 дата публикации

Semiconductor device and manufacturing method of the same

Номер: US20120228762A1
Автор: Hiroshi Watabe, Masatoshi Fukuda
Принадлежит: Toshiba Corp

A semiconductor device, includes: a wiring substrate, a stacked body mounted on the wiring substrate, an underfill layer filled into gaps between respective semiconductor chips of the stacked body; and a molding body made up of a molding resin covered and formed at outside of the stacked body and so on. The underfill layer is made up of a cured product of a resin material containing an amine-based curing agent, and the cured product has a Tg of 65° C. or more and 100° C. or less.

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Номер записи: 82
13-09-2012 дата публикации

Method of manufacturing film for semiconductor device

Номер: US20120231557A1
Автор: Koichi Inoue, Miki Morita, Yuichiro Shishido
Принадлежит: Nitto Denko Corp

The present invention aims to provides a method of manufacturing a film for a semiconductor device in which a dicing film, a die bond film, and a protecting film are laminated in this order, including the steps of: irradiating the die bond film with a light ray having a wavelength of 400 to 800 nm to detect the position of the die bond film based on the obtained light transmittance and punching the dicing film out based on the detected position of the die bond film, and in which T 2 /T 1 is 0.04 or more, wherein T 1 is the light transmittance of the portion where the dicing film and the protecting film are laminated and T 2 is the light transmittance of the portion where the dicing film, the die bond film, and the protecting film are laminated.

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Номер записи: 83
20-09-2012 дата публикации

Electronic device and method for producing a device

Номер: US20120235298A1
Автор: Harry Hedler, Markus Brunnbauer, Thorsten Meyer
Принадлежит: INFINEON TECHNOLOGIES AG

An electronic device or devices and method for producing a device is disclosed. One embodiment provides an integrated component, a first package body and a contact device. The contact device penetrates the package body.

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Номер записи: 84
20-09-2012 дата публикации

Manufacturing method of semiconductor device, and semiconductor device

Номер: US20120235308A1
Автор: Noriyuki Takahashi
Принадлежит: Renesas Electronics Corp

To suppress the reduction in reliability of a resin-sealed semiconductor device. A first cap (member) and a second cap (member) with a cavity (space formation portion) are superimposed and bonded together to form a sealed space. A semiconductor including a sensor chip (semiconductor chip) and wires inside the space is manufactured in the following way. In a sealing step of sealing a joint part between the caps, a sealing member is formed of resin such that an entirety of an upper surface of the second cap and an entirety of a lower surface of the first cap are respectively exposed. Thus, in the sealing step, the pressure acting in the direction of crushing the second cap can be decreased.

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Номер записи: 85
27-09-2012 дата публикации

Unpackaged and packaged IC stacked in a system-in-package module

Номер: US20120241954A1
Автор: Nic Rossi, Robert W. Warren
Принадлежит: Conexant Systems LLC

There is provided a system and method for unpackaged and packaged IC stacked in a system-in-package module. There is provided a system-in-package module comprising a substrate including a first contact pad and a second contact pad disposed thereon, a packaged device disposed on the substrate, and an unpackaged device stacked atop the packaged device, wherein a first electrode of the packaged device is electrically and mechanically coupled to the first contact pad, and wherein a second electrode of the unpackaged device is electrically coupled to the second contact pad. The structure of the disclosed system-in-package module provides several advantages over conventional designs including increased yields, facilitated die substitution, enhanced thermal and grounding performance through direct connect vias, stacking of wider devices without a spacer, and a simplified single package structure for reduced fabrication time and cost.

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Номер записи: 86
18-10-2012 дата публикации

Phosphor reflecting sheet, light emitting diode device, and producing method thereof

Номер: US20120261700A1
Автор: Hisataka Ito, Toshiki Naito, Tsutomu Nishioka, Yasunari Ooyabu
Принадлежит: Nitto Denko Corp

A phosphor reflecting sheet provides a phosphor layer on one side in a thickness direction of a light emitting diode element and provides a reflecting resin layer at the side of the light emitting diode element. The phosphor reflecting sheet includes the phosphor layer and the reflecting resin layer provided on one surface in the thickness direction of the phosphor layer. The reflecting resin layer is formed corresponding to the light emitting diode element so as to be disposed in opposed relation to the side surface of the light emitting diode element.

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Номер записи: 87
18-10-2012 дата публикации

Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof

Номер: US20120261808A1
Автор: Dioscoro A. Merilo, Henry Descalzo Bathan, Lionel Chien Hui Tay, Zigmund Ramirez Camacho
Принадлежит: Individual

A method of manufacture of an integrated circuit package system includes: attaching a first die to a first die pad; connecting electrically a second die to the first die through a die interconnect positioned between the first die and the second die; connecting a first lead adjacent the first die pad to the first die; connecting a second lead to the second die, the second lead opposing the first lead and adjacent the second die; and providing a molding material around the first die, the second die, the die interconnect, the first lead and the second lead, with a portion of the first lead exposed.

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Номер записи: 88
18-10-2012 дата публикации

Tsv structure and method for forming the same

Номер: US20120261826A1
Автор: Chia-Fang Lin, Chien-Li Kuo
Принадлежит: Individual

A TSV structure includes a through via connecting a first side and a second side of a wafer, a conductive layer which fills up the through via, a through via dielectric ring surrounding and directly contacting the conductive layer, a first conductive ring surrounding and directly contacting the through via dielectric ring as well as a first dielectric ring surrounding and directly contacting the first conductive ring and surrounded by the wafer.

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Номер записи: 89
18-10-2012 дата публикации

Method and system for template assisted wafer bonding

Номер: US20120264256A1
Автор: John Dallesasse, Stephen B. Krasulick
Принадлежит: Skorpios Technologies Inc

A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the substrate and the assembly substrate, joining the substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure.

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Номер записи: 90
25-10-2012 дата публикации

Semiconductor device

Номер: US20120267682A1
Автор: Takamitsu Kanazawa, Toshiyuki Hata
Принадлежит: Renesas Electronics Corp

A semiconductor device in which the wiring resistance and parasitic inductance of a semiconductor package configuring a power semiconductor module is reduced. In the semiconductor device, a semiconductor chip with an IGBT formed therein and a diode chip are mounted over the upper surface of a die pad. An emitter pad of the semiconductor chip and an anode pad of the diode chip are coupled with a lead by an Al wire. One end of the lead is located in a higher position than the upper surface of the die pad in order to shorten the length of the Al wire for coupling the emitter pad and the lead.

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Номер записи: 91
25-10-2012 дата публикации

Method for disposing a component

Номер: US20120269971A1
Автор: Hidekazu Arase
Принадлежит: Panasonic Corp

Provided is a method for disposing a component on a substrate ( 100 ), the method comprising steps of: a step (a) of preparing the substrate ( 100 ), a first liquid, and a component-dispersing liquid; a step (b) of applying the first liquid to the substrate ( 100 ) along the +X direction continuously to dispose the first liquid on hydrophilic lines ( 112 ) and hydrophilic body regions ( 111 ) along the +X direction alternately; a step (c) of bringing the component-dispersing liquid in contact with the first liquid disposed on the hydrophilic region ( 111 ); and a step (d) of removing the first liquid and the second liquid from the substrate ( 100 ) to dispose the component on the hydrophilic region ( 111 ).

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Номер записи: 92
01-11-2012 дата публикации

Three-dimensional system-in-a-package

Номер: US20120273933A1
Автор: Belgacem Haba, Craig Mitchell, Ilyas Mohammed, Piyush Savalia, Vage Oganesian
Принадлежит: TESSERA RESEARCH LLC

A microelectronic assembly can include first, second and third stacked substantially planar elements, e.g., of dielectric or semiconductor material, and which may have a CTE of less than 10 ppm/° C. The assembly may be a microelectronic package and may incorporate active semiconductor devices in one, two or more of the first, second or third elements to function cooperatively as a system-in-a-package. In one example, an electrically conductive element having a minimum thickness less than 10 microns, may be formed by plating, and may electrically connect two or more of the first, second or third elements. The conductive element may entirely underlie a surface of another one of the substantially planar elements.

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Номер записи: 93
01-11-2012 дата публикации

Semiconductor Device and Method of Making a Semiconductor Device

Номер: US20120273935A1
Автор: Beng Keh See, Chin Wei Ronnie Tan, Horst Theuss, Kathleen Ong, Kian Pin Queck, Stefan Martens, Tze Yang Hin, Ulrich Krumbein
Принадлежит: INFINEON TECHNOLOGIES AG

A semiconductor device and a method of manufacturing a semiconductor device are disclosed. An embodiment comprises forming a bump on a die, the bump having a solder top, melting the solder top by pressing the solder top directly on a contact pad of a support substrate, and forming a contact between the die and the support substrate.

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Номер записи: 94
01-11-2012 дата публикации

Chip-packaging module for a chip and a method for forming a chip-packaging module

Номер: US20120273957A1
Автор: Thorsten Meyer
Принадлежит: INFINEON TECHNOLOGIES AG

A chip-packaging module for a chip is provided, the chip-packaging module including an isolation material configured to cover a chip on at least one side, the isolation material having a first surface proximate to a first side of a chip, and said isolation material having a second surface facing an opposite direction to the first surface; and at least one layer in connection with the chip first side, the at least one layer further configured to extend from the chip first side to the second surface of the isolation material.

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Номер записи: 95
01-11-2012 дата публикации

Semiconductor Device and Method of Embedding TSV Semiconductor Die Within Substrate for Vertical Interconnect in POP

Номер: US20120273959A1
Автор: Dongsam Park, Yongduk Lee
Принадлежит: Stats Chippac Pte Ltd

A semiconductor device has a substrate with a first conductive layer over a surface of the substrate and a plurality of cavities exposing the first conductive layer. A first semiconductor die having conductive TSV is mounted into the cavities of the substrate. A first insulating layer is formed over the substrate and first semiconductor die and extends into the cavities to embed the first semiconductor die within the substrate. A portion of the first insulating layer is removed to expose the conductive TSV. A second conductive layer is formed over the conductive TSV. A portion of the first conductive layer is removed to form electrically common or electrically isolated conductive segments of the first conductive layer. A second insulating layer is formed over the substrate and conductive segments of the first conductive layer. A second semiconductor die is mounted over the substrate electrically connected to the second conductive layer.

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Номер записи: 96
01-11-2012 дата публикации

Support structures and clamping systems for semiconductor devices during wire and ribbon bonding operations

Номер: US20120274014A1
Автор: Jonathan Michael Byars
Принадлежит: Orthodyne Electronics Corp

A support structure for supporting a semiconductor device during a bonding operation is provided. The support structure comprises a body portion defining an upper surface configured to support a semiconductor device during a bonding operation. The upper surface defines a constraining feature for constraining at least a portion of the semiconductor device during the bonding operation.

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Номер записи: 97
08-11-2012 дата публикации

Heating apparatus and implemented body manufacturing method

Номер: US20120279653A1
Автор: Takashi Matsumura
Принадлежит: Sony Chemical and Information Device Corp

To improve the tact time of a heating apparatus, provided is a heating apparatus comprising a first pressing member that heats a heating target; a second pressing member that includes an elastic body, and sandwiches the heating target between the first pressing member and the elastic body; and a floating jig that thermally separates the first pressing member from the heating target, holds the heating target between the first pressing member and the second pressing member, and when one of the first pressing member and the second pressing member presses the heating target toward the other of the first pressing member and the second pressing member, thermally connects the heating target and the first pressing member.

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Номер записи: 98
08-11-2012 дата публикации

Circuit module and manufacturing method for the same

Номер: US20120281370A1
Автор: Fumikiyo KAWAHARA, Hiroshi Nishikawa, Makoto Fujita
Принадлежит: Murata Manufacturing Co Ltd

A circuit module and a manufacturing method for the same, reduce a possibility that a defect area where an electrically conductive resin is not coated may occur in a shield layer. A mother board is prepared. A plurality of electronic components are mounted on a principal surface of the mother board. An insulator layer is arranged so as to cover the principal surface of the mother board and the electronic components. The insulator layer is cut such that grooves and projections are formed in and on the principal surface of the insulator layer and the insulator layer has a predetermined thickness H. An electrically conductive resin is coated on the principal surface of the insulator layer to form a shield layer. The mother board including the insulator layer and the shield layer both formed thereon is divided to obtain a plurality of circuit modules.

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Номер записи: 99
08-11-2012 дата публикации

Method of manufacturing chip-stacked semiconductor package

Номер: US20120282735A1
Автор: Chang-seong Jeon, Dong-Hyeon Jang, Ho-geon Song, Jung-seok Ahn, Sang-sick Park, Sung-Jun IM, Teak-Hoon LEE
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A method of manufacturing a chip-stacked semiconductor package, the method including preparing a base wafer including a plurality of first chips each having a through-silicon via (TSV); bonding the base wafer including the plurality of first chips to a supporting carrier; preparing a plurality of second chips; forming stacked chips by bonding the plurality of second chips to the plurality of first chips; sealing the stacked chips with a sealing portion; and separating the stacked chips from each other.

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Номер записи: 100