Aktivmatrixsubstrat und Verfahren zu dessen Herstellung

Ein Aktivmatrix-Substrat (100) weist auf: ein Substrat (12); einen ersten Dünnfilmtransistor (10A), der auf dem Substrat (12) getragen ist und eine erste Halbleiterschicht (13A) mit kristallinem Silizium aufweist; einen zweiten Dünnfilmtransistor (10B), der auf dem Substrat (12) getragen ist und eine zweite Halbleiterschicht (17) mit einem Oxid-Halbleiter aufweist; und eine dritte Halbleiterschicht (13B), welche Silizium beinhaltet, die auf der Substratseite (12) der zweiten Halbleiterschicht (17) des zweiten Dünnfilmtransistors (10B) angeordnet ist, wobei eine erste Isolierschicht (14) zwischen der dritten Halbleiterschicht und der zweiten Halbleiterschicht angeordnet ist.

SUBSTRATE

DEVICE FOR THE LOADING OF A CONTAINER, WHICH FINDS IN A FIMS SYSTEM USE

Manufacturing method of TFT substrate and manufactured TFT substrate

A method for manufacturing of array substrate using a driving circuit for one body Liquid Crystal Display Device

LASER MASK AND METHOD OF CRYSTALLIZATION USING THEREOF

박막 트랜지스터의 제조 방법 및 그 제조 방법에 사용하는 마스크

... 본 발명은 기판 위에 성막된 아몰퍼스 실리콘막(8)에 레이저 광을 조사하는 처리를 포함하는 박막 트랜지스터의 제조 방법으로서, 상기 아몰퍼스 실리콘막(8) 중에서 채널 영역(52)의 형성 영역을 포함하는 영역에 상기 레이저 광을 조사하고, 상기 형성 영역을 포함하는 영역을 가열 용융시켜 재결정화함으로써, 상기 채널 영역(52)을 포함한 폴리실리콘막(9)을 형성시키는 레이저 어닐링 공정과, 상기 폴리실리콘막(9) 중에서 상기 채널 영역(52) 이외의 영역을 에칭에 의하여 제거하는 공정을 포함한다. 이로써, 본 발명은 레이저 광의 조사 조건이 한정되는 상황 하에 있더라도, 아몰퍼스 실리콘막(8)의 재결정화를 더 촉진시켜 이동도를 더 높이는 것이 가능한 박막 트랜지스터의 제조 방법 및 그 제조 방법에 사용하는 마스크를 제공할 수 있다.

Method of manufacturing a semiconductor device

To obtain a TFT, in which an off-current value is low and the fluctuation is suppressed, and an electronic equipment provided with the TFT. A film deposition temperature is set to substantially the same between a base insulating film and an amorphous semiconductor film to improve flatness of the semiconductor film. Then, laser light irradiation is conducted.

Display device and semiconductor device having laser annealed semiconductor elements

Two charge transfer passages of one TFT, which comprise two areas with island layers of p-Si intersecting at right angles and running from respective drain areas ND, PD to source areas NS, PS through an LD area LD and a channel area CH, are arranged non-parallel to each other. Even if a defective crystallization area R, which is caused due to uneven intensity in an irradiated area in laser annealing for forming p-Si of a p-Si TFT LCD, passes across the TFT area, and either of the transfer passages is defective, the remaining one operates normally, and the component characteristics are maintained as desired.

LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE STRUCTURE AND MANUFACTURE METHOD THEREOF

A method for manufacturing a LTPS TFT substrate is provided. Buffer layers are respectively provided in a drive TFT area and a display TFT area and have different thicknesses, such that the thickness of the buffer layer in the drive TFT area is larger than the thickness of the buffer layer in the display TFT area so that different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. A poly-silicon layer that is formed in the drive TFT area in the crystallization process has a large lattice dimension to increase electron mobility thereof. Fractured crystals can be formed in a poly-silicon layer of the display TFT area in the crystallization process for ensuring the uniformity of the grain boundary and increasing the uniformity of electrical current. Accordingly, the electrical property demands for different TFTs can be satisfied. 1. A method for manufacturing a low temperature poly-silicon thin film transistor (TFT) substrate structure , comprising the following steps:{'b': '1', 'Step , providing a substrate, wherein the substrate comprises a drive TFT area and a display TFT area, depositing a buffer layer on the substrate, and patterning the buffer layer to make a thickness of the buffer layer in the drive TFT area be larger than a thickness of the buffer layer in the display TFT area, wherein the buffer layer of the drive TFT area and the buffer layer of the display area are formed of the same material such that a thickness of the material of the buffer layer in the drive TFT area is larger than a thickness of the material of the buffer layer in the display TFT area;'}{'b': '2', 'Step , depositing an amorphous silicon layer on the buffer layer, implementing an excimer laser annealing process to the amorphous silicon layer to make the amorphous silicon layer crystallized and converted to a poly-silicon layer after excimer laser annealing pretreatment, and patterning the poly-silicon layer ...

THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE

A thin film transistor, its manufacturing method, and a display device are provided. The method comprises: forming a gate metal layer (35), forming a step-like gate structure (352) by one patterning process; performing a first ion implantation procedure to forming a first heavily doped area (39a) and a second heavily doped area (39b), the first heavily doped area (39a) being separated apart from the second heavily doped area (39b) by a first length; forming a gate electrode (353) from the step-like gate structure (352); performing a second ion implantation procedure to form a first lightly doped area (38a) and a second lightly doped area (38b), the first lightly doped area (38a) being separated apart from the second lightly doped area (38b) by a second length less than the first length. By the above method, the process for manufacturing the LTPS TFT having the lightly doped source/drain structure can be simplified.

Thin film transistor and a manufacturing method thereof, array substrate and a manufacturing method thereof, display device

A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of the array substrate includes depositing an amorphous silicon thin film layer on a base substrate; performing a patterning process on the amorphous silicon thin film layer, so as to form a pattern with multiple small pores at a surface of the amorphous silicon thin film layer. With this method, when a laser annealing treatment of amorphous silicon is performed, the molten silicon after melting fills the space of small pores at a surface of the amorphous silicon thin film layer firstly, thereby avoiding forming a protruded grain boundary that is produced because the excess volume of polysilicon is squeezed.

Thin film transfer, manufacturing method thereof, array substrate and manufacturing method thereof

The present disclosure provides a TFT, a manufacturing method thereof, an array substrate and a manufacturing method thereof. The TFT includes a substrate, a p-Si active layer arranged on the substrate, and a first a-Si layer arranged on a surface of the p-Si active layer at a side adjacent to the substrate. An orthogonal projection of the p-Si active layer onto the substrate at least partially overlaps an orthogonal projection of the first a-Si layer onto the substrate.

DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

A method of manufacturing a display apparatus includes: crystallizing portions of an amorphous silicon layer to form a preliminary semiconductor layer defining a channel region of a thin film transistor (“TFT”), a preliminary source and drain region disposed at opposing sides of the channel region, respectively, and an amorphous silicon layer region of the TFT, disposed between the channel region and the preliminary source or drain region; forming a source and drain region of the TFT at the opposing sides of the channel region, respectively, by doping the preliminary source and drain regions; and forming a source and drain electrode of the TFT respectively connected to the source and drain regions, where the semiconductor layer includes the amorphous silicon layer region connecting the channel region to at least one of the source and drain regions, and forming a display device connected to the TFT including the amorphous silicon layer region.

Method of manufacturing a thin film transistor

A method of manufacturing a thin film transistor is provided, and includes: providing a substrate; depositing a buffer layer and patterning the buffer layer; sequentially depositing an insulation layer and a first metal layer, coating a photoresist on the first metal layer; metal etching the first metal layer; ashing the photoresist; metal etching the first metal layer of the lightly doped region; implanting ions to an active area; and removing the photoresist.

Method of Manufacturing Thin Film Transistor, Thin Film Transistor Manufactured Using the Method, Method of Manufacturing Organic Light-Emitting Display Apparatus, and Organic Light-Emitting Display Apparatus Manufactured Using the Method

A method of manufacturing a TFT, including forming a buffer layer, an amorphous silicon layer, an insulating layer, and a first conductive layer on a substrate, forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer, forming a semiconductor layer, a gate insulating layer, and a gate electrode that have a predetermined shape by simultaneously patterning the polycrystalline silicon layer, the insulating layer, and the first conductive layer, wherein the polycrystalline silicon layer is further etched to produce an undercut recessed a distance compared to sidewalls of the insulating layer and the first conductive layer, forming source and drain regions within the semiconductor layer by doping corresponding portions of the semiconductor layer, forming an interlayer insulating layer on the gate electrode, the interlayer insulating layer covering the gate insulating layer and forming source and drain electrodes that are electrically connected to source and drain ...

Manufacturing method of TFT substrate, TFT substrate, and OLED display panel

This disclosure discloses a manufacturing method of a TFT substrate, a TFT substrate, and an OLED display panel. The manufacturing method of the TFT substrate includes sequentially forming a gate electrode, a gate insulating layer, a polysilicon layer, and a barrier layer on the substrate, the polysilicon layer including a source region, a drain region, and a channel region; the barrier layer above the source and drain regions is etched by a photomask so that the thickness of the barrier layer allows ions to pass through and is not zero; and then the polysilicon layer is ion implanted; through the method, the polysilicon layer of the source and drain regions can be ion implanted without exposing the polysilicon layer, the damage of the polysilicon layer during the process can be avoided, and the stability of the TFT substrate can be improved, thereby improving the display quality.

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING SAME

The present disclosure provides an array substrate and a method for manufacturing the same. By disposing hybrid TFT on the substrate which includes disposing an oxide TFT in a display driving area and disposing an LTPS TFT in a non-display driving area, not only can a driving current of an LCD gate driving circuit be improved, but a leakage current can also be diminished when LCD display pixels are driven. When manufacturing a hybrid TFT structure, a second active layer in the display driving area is disposed on a first active layer, and a semiconductor insulation layer is disposed between the first active layer and the second active layer, so that patterns of the first active layer and the second active layer can be formed by etching through one mask during an etching process, thus reducing manufacturing cost. 1. An array substrate comprising a display driving area and a non-display driving area , wherein the array substrate comprises:a substrate;a buffer layer disposed on the substrate;a first active layer disposed at a side of the buffer layer away from the buffer layer;a semiconductor insulation layer disposed on the first active layer in the display driving area;a second active layer disposed on the semiconductor insulation layer in the display driving area;a gate insulation layer disposed on the first active layer, the substrate, and the second active layer;a gate disposed on the gate insulation layer;an interlayer insulation layer disposed on the gate and the gate insulation layer; anda source/drain metal layer disposed on the interlayer insulation layer;wherein in the display driving area, the source/drain metal layer is connected to the second active layer by a first through hole, and in the non-display driving area, the source/drain metal layer is connected to the first active layer by a second through hole.2. The array substrate as claimed in claim 1 , wherein the first through hole extends through the interlayer insulation layer and a part of the gate ...

Display substrate, preparation method and driving method therefor, and display apparatus

A display substrate, a preparation method and driving method therefor, and a display apparatus. The display substrate includes a substrate and a switch structure arranged on the substrate, the switch structure being electrically connected to a control signal terminal, a signal input terminal and a signal output terminal. The switch structure comprises a switching unit. The switching unit comprises a first transistor and a second transistor; and the types of the first transistor and the second transistor are opposite. The first transistor comprises: a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The second transistor comprises: a second active layer, a second gate electrode, a second source electrode, and a second drain electrode.

Semiconductor device and manufacturing method thereof

Display device and method for manufacturing display device

A SEMICONDUCTOR DEVICE, A IMAGE DISPLAY APPARATUS, METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE IMAGE DISPLAY APPARATUS

유기 발광장치

... 본 발명은 기판 상에서 서로 교차하도록 배열된 게이트 라인 및 데이터 라인 및 게이트 라인 및 데이터 라인이 교차하는 영역에 형성된 박막 트랜지스터를 포함한 유기 발광장치에 관한 것이다. 본 발명에 따른 유기 발광장치는 기판, 기판 상에 형성된 스위칭 박막 트랜지스터, 스위칭 박막 트랜지스터와 연결된 구동 박막 트랜지스터, 및 구동 박막 트랜지스터와 연결된 유기 발광 다이오드를 포함한다. 본 발명의 구동 박막 트랜지스터는, 기판 상에 형성된 제1 게이트 전극, 제1 게이트 전극 위에 형성된 액티브층, 액티브층 상에 형성된 에치스톱퍼, 에치 스톱퍼 상에 형성된 오믹 콘택층, 오믹 콘택층 상에 형성된 소스 전극 및 드레인 전극, 소스 전극 및 드레인 전극 위에서 에치 스톱퍼 상부에 형성된 제2 게이트 전극을 포함한다. 본 발명의 제1 게이트 전극과 제2 게이트 전극은 전기적으로 연결되어 있다. 본 발명에 따르면, 액티브층 아래에 제1 게이트 전극을 형성하고, 액티브층 위에 제2 게이트 전극을 형성함으로써, 액티브층의 상면 및 하면 모두를 통해서 전자가 이동할 수 있게 되어 박막 트랜지스터의 온 전류 특성이 개선되는 효과가 있다.

METHOD FOR MANUFACTURING A DISPLAY DEVICE, CAPABLE OF ALIGNING A SUBSTRATE ACCURATELY BY MINIMIZING AN ERROR

PURPOSE: A method for manufacturing a display device is provided to precisely align a substrate effectively in manufacturing process by using the interface between a crystalline area and non crystalline area as an alignment line. CONSTITUTION: A semiconductor layer having a plurality of crystallization regions and a plurality of non crystalline regions which are arranged alternately is formed in a substrate(S110). The substrate is aligned using contrast ration difference between the plural crystallization regions and the plural non crystalline regions(S290). A photolithography or the lithographically processing is progressed(S300). The substrate is classified into a plurality of pixel regions. COPYRIGHT KIPO 2012 ...

스폿 빔 결정화를 위한 방법 및 시스템

... 박형 필름을 결정화하기 위한 방법 및 시스템은 박형 필름을 가로질러 연속적으로 전진되는 레이저 빔 스폿을 제공하여 그 박형 필름을 가로질러 이동되는 지속적인 완전 또는 부분 용융 구역을 생성하고, 균일한 미세 입자의 결정질 구조 또는 입자를 형성하도록 결정화한다.

Semiconductor device with thin-film transistors and method of fabricating the same

POD LOAD INTERFACE EQUIPMENT ADAPTED FOR IMPLEMENTATION IN A FIMS SYSTEM

A box load interface implemented in a FIMS system includes a translation mechanism that actuates a port door attachable to the box door of a transport box to move the box door toward or away from the transport box to open or close it. A clamping mechanism clamps the transport box on a slidable tray controlled to move the transport box against and away from a port plate. An elevator assembly cooperates with the translation mechanism to move the port door after the box door has moved away from the transport box. The translation mechanism and elevator assembly may be integral. A differential optical scanning assembly detects positions of wafer specimens located in the transport box. A robot assembly removes and inserts wafer specimens from the transport box. A linear traveling assembly supports the robot assembly and travels along a lead screw driven by a lead nut mechanism.

Semiconductor thin-film manufacturing method, semiconductor device manufacturing method, semiconductor device, integrated circuit, electro-optical device, and electronic appliance

According to the semiconductor thin-film and semiconductor device manufacturing method of the present invention, an insulating film having a through-hole between two layers of silicon film is provided, the silicon film is partially melted by irradiating a laser thereon, and a substantially monocrystalline film is continuously formed extending via the through-hole from at least part of the layer of silicon film below the insulating film that continues to the through-hole, to at least part of the layer of silicon film above the insulating film. It is therefore sufficient to form a through-hole with a larger diameter than that of a hole formed by the conventional method, because the diameter of the through-hole in the insulating film may be the same size or slightly smaller than the size of a single crystal grain that comprises the polycrystal formed in the silicon film below the insulating film. Costly precision exposure devices and etching devices are therefore unnecessary. Numerous high-performance ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided. 1. (canceled)2. A semiconductor device comprising: [ a first electrode;', 'an EL layer over the first electrode; and', 'a second electrode over the EL layer;, 'a light-emitting element comprising, 'a first wiring;', 'a second wiring;', 'a third wiring;', 'a first transistor;', 'a second transistor; and', 'a capacitor,, 'a pixel, the pixel comprisingwherein the first wiring is electrically connected to one of a source and a drain of the first transistor,wherein the second wiring is electrically connected to a gate of the first transistor,wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor,wherein the third wiring is electrically connected to one of a source and a drain of the second transistor, andwherein the other of the source and the drain is electrically connected to the first electrode of the light-emitting element.3. A semiconductor device comprising: [ a first electrode;', 'an EL layer over the first electrode; and', 'a second electrode over the EL layer;, 'a light-emitting element comprising, 'a first wiring;', 'a second wiring;', ...

Semiconductor device and method of manufacturing the same

The present invention improves the aperture ratio of a pixel of a reflection-type display device or a reflection type display device without increasing the number of masks and without using a blackmask. A pixel electrode ( 167 ) is arranged so as to partially overlap a source wiring ( 137 ) for shielding the gap between pixels from light, and a thin film transistor is arranged so as to partially overlap a gate wiring ( 166 ) for shielding a channel region of the thin film transistor from light, thereby realizing a high pixel aperture ratio.

Display device, method for manufacturing the same, and electronic device having the same

In a case where a p-channel thin film transistor is used as a thin film transistor that is electrically connected to a light-emitting element and drives the light-emitting element, a value of cutoff current of the p-channel thin film transistor is made lower than that of a p-channel thin film transistor of a driver circuit. Specifically, channel doping is selectively performed on a semiconductor layer of a thin film transistor included in a pixel.

Organic light emitting diode display device with different configurations of switching and driving transistors

An organic light emitting diode (OLED) display device and a method of fabricating the same are disclosed. The OLED display device includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels disposed in a region in which the scan lines cross the data lines, where each pixel of the plurality of pixels includes: a switching transistor including a first gate electrode, a first semiconductor layer disposed over the first gate electrode, a first gate insulating layer interposed between the first gate electrode and the first semiconductor layer, a first source electrode and a first drain electrode, a driving transistor including a second semiconductor layer, a second gate electrode disposed over the second semiconductor layer, a second gate insulating layer interposed between the second gate electrode and the second semiconductor layer, a second source electrode and a second drain electrode, and an organic light emitting diode electrically connected with the second ...

Display panel, display device and method for preparing a low-temperature polysilicon thin film transistor

A display panel, a display device and a method for preparing a low-temperature polysilicon thin film transistor are provided. The method includes: providing a base substrate; forming a semiconducting layer on the base substrate; forming a first insulating layer on the semiconducting layer; forming a first metal layer on the first insulating layer and pattering the first metal layer to obtain a first metal gate layer; forming a second insulating layer on the first metal layer; forming a second metal layer on the second insulating layer and patterning the second metal layer to obtain a second metal gate layer; forming a third insulating layer on the second metal layer; forming a third metal layer on the third insulating layer and patterning the third metal layer to form a source and a drain. The LTPS technology can be applied to the production of large-size panels by adopting the present disclosure.

MANUFACTURING METHOD OF POLYCRYSTALLINE SILICON THIN FILM AND MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY SUBSTRATE

The present disclosure discloses a manufacturing method of a polycrystalline silicon thin film, which includes: forming a first amorphous silicon thin film; crystallizing the first amorphous silicon thin film to form a polycrystalline silicon thin film by applying an excimer laser annealing process; forming a second amorphous silicon thin film on a first surface of the polycrystalline silicon thin film; and etching until the second amorphous silicon thin film is completely removed toward a direction of the polycrystalline silicon thin film from the second amorphous silicon thin film by applying a dry etching process. The present disclosure further discloses a manufacturing method of a thin film transistor array substrate which includes the steps of manufacturing an active layer: forming a layer of a polycrystalline silicon thin film according to the previous polycrystalline silicon thin film; and etching the polycrystalline silicon thin film to form a patterned active layer. 1. A manufacturing method of a polycrystalline silicon thin film , comprising:forming a first amorphous silicon thin film by applying a semiconductor deposition process;crystallizing the first amorphous silicon thin film to form a polycrystalline silicon thin film by applying an excimer laser annealing process;forming a second amorphous silicon thin film on a first surface of the polycrystalline silicon thin film by applying a semiconductor deposition process; andetching until the second amorphous silicon thin film is completely removed toward a direction of the polycrystalline silicon thin film from the second amorphous silicon thin film by applying a dry etching process.2. The manufacturing method of a polycrystalline silicon thin film of claim 1 , wherein the etching is performed to below the first surface while the dry etching process is performed.3. The manufacturing method of a polycrystalline silicon thin film of claim 1 , wherein etching speeds are equal everywhere within a whole plane ...

Array-Substrat, Verfahren zu dessen Herstellung und Flüssigkristallanzeigefeld

Die Erfindung stellt ein Array-Substrat, eine das Array-Substrat enthaltende Flüssigkristallanzeige und ein Verfahren zur Herstellung eines Array-Substrats bereit. Das erfindungsgemäße Array-Substrat umfasst: ein Substrat und eine erste Filmschicht, eine Isolierschicht, eine Dispersionsschicht für elektrostatische Ladung und eine zweite Filmschicht, die in dieser Reihenfolge auf einer Seitenfläche des Substrats angeordnet sind, wobei die Isolierschicht und die Dispersionsschicht für elektrostatische Ladung mit Kontaktlöchern versehen sind und die zweite Filmschicht elektrisch mit der ersten Filmschicht über die Kontaktlöcher verbunden ist und sich die Dispersionsschicht für elektrostatische Ladung im selben Profil wie die zweite Filmschicht befindet.

Anzeigevorrichtung mit einer Mehrzahl getrennt voneinander betreibbarer Bildpunkte

Es wird eine Anzeigevorrichtung (1) angegeben miteiner Mehrzahl getrennt voneinander betreibbaren Bildpunkten (1a, 1b, 1c), umfassend:eine Halbleiterschichtenfolge (3) zur Erzeugung von elektromagnetischer Strahlung mit einer ersten Halbleiterschicht (31), einer aktiven Schicht (33) und einer zweiten Halbleiterschicht (35),eine erste Kontaktstruktur (51) zur Kontaktierung der ersten Halbleiterschicht (31) und eine zweite Kontaktstruktur (55) zur Kontaktierung der zweiten Halbleiterschicht (35), undzumindest einen Trennbereich (7x), der sich durch die erste Kontaktstruktur (51), die erste Halbleiterschicht (31) und die aktive Schicht (33) hindurch in die zweite Halbleiterschicht (35) hinein erstreckt, wobeider zumindest eine Trennbereich (7x) zwischen zwei lateral benachbarten Bildpunkten (1a, 1b, 1c) angeordnet ist, undder zumindest eine Trennbereich (7x) zur Reduzierung eines optischen und/oder elektrischen Übersprechens zwischen den lateral benachbarten Bildpunkten (1a, 1b, 1c) ausgebildet ...

MANUFACTURING ELECTRONIC DEVICES COMPRISING,E.G.TFTS AND MIMS

Method of manufacturing semiconductor device

Laser mask and crystallization method using the same and manufacture method of displayer

The low-temperature polysilicon TFT substrate structure and its manufacturing method

Organic light emitting device and manufacturing method thereof

Method for manufacturing a semiconductor device

THIN-FILM SEMICONDUCTOR DEVICE AND ITS PRODUCTION METHOD

Semiconductor device, electronic component, and electronic device

To provide a semiconductor device including element layers that are stacked. A first wiring layer and a second wiring layer are stacked between a first element layer and a second element layer. A third wiring layer and a fourth wiring layer are stacked over the second element layer. Transistors of logic cells are provided in the first element layer. Wirings of the logic cells are provided in the first wiring layer or the second wiring layer. Input ports and output ports of the logic cells are provided in the third wiring layer. The input port of one of the logic cells is connected to the output port of another logic cell through the wiring of the third wiring layer or the fourth wiring layer. Connecting the logic cells through the wiring layers over the second element layer improves the efficiency of steps of arranging and connecting the logic cells.

Manufacturing method of array substrate, array substrate and display device

A manufacturing method of an array substrate, an array substrate and a display device are provided. The manufacturing method of the array substrate comprises: forming a first conductive thin film (100) on a base substrate (1); and patterning the first conductive thin film (100), to form a pattern of a cathode (11) on a first region (11) of the base substrate (1), and form a pattern of a gate electrode (4) on a second region (12) of the base substrate (1). Complexity and process time of a fabrication process of an array substrate can be reduced, a fabrication process of an organic electroluminescent panel can be simplified, and production cost can be reduced, by forming a cathode layer of a light-emitting diode and a gate electrode layer of a thin film transistor in different regions of the base substrate at the same time by one patterning process.

METHODS AND SYSTEMS FOR SPOT BEAM CRYSTALLIZATION

Methods and systems for crystallizing a thin film provide a laser beam spot that is continually advanced across the thin film to create a sustained complete or partial molten zone that is translated across the thin film, and crystallizes to form uniform, small-grained crystalline structures or grains. 1. A method for crystallizing a thin film , the method comprising:providing a thin film;providing a laser beam producing a spot on the thin film;continually translating the laser beam in a first direction while irradiating overlapping regions of the thin film to generate a molten zone by applying a laser pulse in each region, each laser pulse applied before a previously irradiated region has been fully solidified;propagating the molten zone along the first direction by initiating melting in the leading edge of the overlap irradiated region; andallowing the molten zone to cool and solidify and form the crystalline region in the trailing edge of the region.2. The method of claim 1 , further comprising:translating the laser beam a first distance in a second direction largely perpendicular to the first direction; andcontinually translating the laser beam in a third direction parallel to the first direction, while irradiating second overlapping regions of the thin film;wherein the first distance is shorter than the dimension of the beam in the second direction.3. The method of claim 2 , further comprising:translating the laser beam a second distance in the second direction largely perpendicular to the first direction; andcontinually translating the laser beam in the first direction, while irradiating third overlapping regions of the thin film;wherein the second distance is shorter than the dimension of the beam in the second direction.4. The method of claim 1 , wherein the molten zone is a complete molten zone.5. The method of claim 1 , wherein the molten zone is a partial molten zone.6. The method of claim 1 , wherein the laser is one of a constant frequency laser claim 1 ...

Method of fabricating a thin film transistor

An insulated gate semiconductor device comprising an insulator substrate having provided thereon a source and a drain region; a channel region being incorporated between said source and said drain regions, said channel region comprising a polycrystalline, a single crystal, or a semi-amorphous semiconductor material; and a region provided under said channel region, said region comprising an amorphous material containing the same material as that of the channel region as the principal component, or said region comprising a material having a band gap larger than said channel region.A process for fabricating the device is also disclosed.

Method of manufacturing low temperature polycrystalline silicon thin film and thin film transistor, thin film transistor, display panel and display device

A method of manufacturing a low temperature polycrystalline silicon thin film and a thin film transistor, a thin film transistor, a display panel and a display device are provided. The method includes: forming an amorphous silicon thin film (01) on a substrate (1); forming a pattern of a silicon oxide thin film (02) covering the amorphous silicon thin film (01), a thickness of the silicon oxide thin film (02) located at a preset region being larger than that of the silicon oxide thin film (02) located at other regions; and irradiating the silicon oxide thin film (02) by using excimer laser to allow the amorphous silicon thin film (01) forming an initial polycrystalline silicon thin film (04), the initial polycrystalline silicon thin film (04) located at the preset region being a target low temperature polycrystalline silicon thin film (05). The polycrystalline silicon thin film has more uniform crystal size.

Organic light emitting device and manufacturing method thereof

An organic light emitting device includes a substrate, first and second ohmic contacts formed on the substrate, a driving semiconductor formed on the substrate and the first and second ohmic contacts and including polysilicon, a driving input electrode electrically connected to the first ohmic contact, a driving output electrode electrically connected to the second ohmic contact, a first gate insulating layer formed on the driving semiconductor, the driving input electrode, and the driving output electrode, and a driving control electrode formed on the first gate insulating layer and overlapping the driving semiconductor.

SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR CIRCUIT MADE FROM SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREOF

In the present invention, a semiconductor film is formed through a sputtering method, and then, the semiconductor film is crystallized. After the crystallization, a patterning step is carried out to form an active layer with a desired shape. The present invention is also characterized by forming a semiconductor film through a sputtering method, subsequently forming an insulating film. Next, the semiconductor film is crystallized through the insulating film, so that a crystalline semiconductor film is formed. According this structure, it is possible to obtain a thin film transistor with a good electronic property and a high reliability in a safe processing environment.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

An insulating film provided between adjacent pixels is referred to as a bank, a partition, a harrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even when the insulating film provided between adjacent pixels is formed by a coating method, thin portions are problematically partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wiring and the lower wiring are arranged in a misaligned manner so as not to align the end portions.

Display panel, method for driving the same, and display device

The disclosure discloses a display panel, a method for driving the same, and a display device, where a control electrode is arranged on the side of an active layer of a thin film transistor away from a gate electrode, and the thickness of a buffer layer between the control electrode and the active layer is controlled so that the buffer layer is thicker than a gate insulation layer between the gate electrode and the active layer, to adjust the distance between the control electrode and the active layer to be larger than the distance between the gate electrode and the active layer; and at least when a gate off voltage is applied to the gate electrode so that the thin film transistor is switched off, a first control voltage is applied to the control electrode to vary a voltage Vg of the thin film transistor.

Substrat für eine Flüssigkristallanzeigevorrichtung mit berührungsempfindlichem Sensor in den Zellen und Herstellungsverfahren für dasselbe

Arraysubstrat für eine Flüssigkristallanzeigevorrichtung mit berührungsempfindlichem Sensor in den Zellen, umfassend: ein Substrat (101) mit mehreren berührungsempfindlichen Blöcken, von denen jeder mehrere Pixelbereiche umfasst; eine Gateleitung (119) und eine Datenleitung (130) auf dem Substrat, wobei sich die Gateleitung (119) und die Datenleitung (130) kreuzen und eine Zwischenisolationsschicht (123) zwischen ihnen ausgebildet ist, um jeden der mehreren Pixelbereiche (P) zu definieren; einen Dünnschichtransistor (Tr), der mit der Gateleitung (119) und der Datenleitung (130) verbunden ist; eine erste Passivierungsschicht (145) auf dem Dünnschichttransistor, wobei die erste Passivierungsschicht ein erstes Drainkontaktloch (147) aufweist, das eine Drainelektrode (136) des Dünnschichttransistors freilegt; eine Elektrode (150) für ein gemeinsames Potential auf der ersten Passivierungsschicht (145) in jedem der mehreren berührungsempfindlichen Blöcke; ein Ätzverhinderungsmuster (151), das ...

Method of manufacturing a semiconductor device

THIN FILM TRANSISTOR SUBSTRATE, DISPLAY DEVICE INCLUDING SAME, METHOD TO MANUFACTURE THIN FILM TRANSISTOR SUBSTRATE, AND METHOD TO MANUFACTURE DISPLAY DEVICE

The present invention provides a thin film transistor substrate, a display device including the same, a method to manufacture the thin film transistor substrate, and a method to manufacture the display device, capable of having excellent performance such as high movability. The present invention includes: a substrate; a first gate electrode placed on the substrate, and including first and second branched electrodes separated from each other; a polysilicon layer placed in the upper part of the first gate electrode to be insulated from the first gate electrode; and a second gate electrode placed in the upper part of the polysilicon layer to be insulated from the polysilicon layer, and corresponding to the first and second branched electrodes. COPYRIGHT KIPO 2016 ...

THIN-FILM SEMICONDUCTOR DEVICE AND ITS PRODUCTION METHOD

A thin-film semiconductor device comprises a substrate having a semiconductor thin-film layer. The semiconductor thin-film layer is formed by forming a non-monocresytalline semiconductor thin film on an insulating substrate and irradiating it with an energy beam by changing the energy intensity in such a way that the maximum and minimum intensities of the energy beam are regularly arranged in the energy intensity distribution of the respective areas irradiated with the energy beam and thereby regularly arranging monocrystalline particles having a large particle diameter of 2 µm or more. Unit electrodes of the thin-film semiconductor device are fabricated on the substrate in alignment with the respective single crystals of the semiconductor thin-film layer. As a result, unit circuits having a gate electrode, a source electrode, and a drain electrode are regularly so arranged as to correspond to the respective semiconductor monocrystalline particles formed in the semiconductor thin ...

Array substrate and manufacturing method thereof, display panel and display device

The present invention provides an array substrate and a manufacturing method thereof, a display panel and a display device. The manufacturing method of an array substrate in the present invention comprises: forming light-shielding layers on the base substrate through a patterning process by using a light-shielding layer-doping multiplexing mask plate; and performing doping of CMOS transistors by using the light-shielding layer-doping multiplexing mask plate. In the invention, two mask plates used in manufacturing the light-shielding layer and the doping process in the prior art are replaced with one light-shielding layer-doping multiplexing mask plate, therefore the number of the mask plates during manufacturing is reduced and the cost is decreased. Meanwhile, providing of the light-shielding layer below the N type transistors in the driving region of the array substrate may prevent light-induced leakage current from being generated in the conductive region.

Semiconductor Device and A Method of Manufacturing the Same

A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.

Detection of motive force applied to transport box mounted on a FIMS system

A motive force detection system prevents an overpowering of the movement of a transport box-carrying slidable tray of a FIMS system past a reference location upon detection of improper mating of the transport box to the FIMS system port plate or an obstruction to the movement of the slidable tray.

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

In a method for manufacturing an array substrate, a first photoresist pattern is formed on a buffer layer of a non-display region and the buffer layer uncovered by the first photoresist pattern is removed to form a first via hole in the non-display region. A second via hole is formed on the basis of the first via hole. The second via hole is connected to the first via hole. By forming the first via hole in the non-display region and forming the second via hole on the basis of the first via hole, completeness of film layers is ensured and product yield is improved.

THIN FILM TRANSISTOR SUBSTRATE, DISPLAY APPARATUS INCLUDING THIN FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS

A thin film transistor (TFT) substrate, including a substrate; a TFT on the substrate; and an insulating layer including at least one dummy hole, the at least one dummy hole in one or more of an upper area of the TFT or a peripheral area of the TFT, a material buried in the at least one dummy hole being an insulating material different from a material of the insulating layer.

METHOD OF MANUFACTURING DISPLAY APPARATUS AND DISPLAY APPARATUS MANUFACTURED THROUGH THE METHOD

A method of manufacturing a display apparatus includes: preparing a substrate including a pixel circuit region and a driving circuit region; forming a first active layer at the pixel circuit region; forming a second active layer at the driving circuit region; forming gate electrodes that overlap the first active layer and the second active layer, respectively, with a gate insulating layer disposed therebetween; forming a first insulating layer covering the first and second active layers; forming a first contact hole that passes through the first insulating layer until a portion of the first active layer is exposed; heat-treating the substrate where the first insulating layer, in which the first contact hole is formed, is formed; and forming a second contact hole that passes through the first insulating layer disposed on the heat-treated substrate until a portion of the second active layer is exposed.

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

A display device capable of implementing the light shielding effect and process simplification, and a method of manufacturing the display device. The display device includes a transistor formed in a first region on a substrate, a pixel electrode formed in a second region on the substrate, a buffer layer formed beneath the transistor in the first region, and a light shielding layer formed between the buffer layer and the substrate in the first region. In the display device, the light shielding layer may include a semiconductor material.

Electro-optical device

An electro-optical device is disclosed. The device comprises a pair of substrates and an electro-optical modulating layer (e.g. a liquid crystal layer) having sandwiched therebetween, said pair of substrates consisting of a first substrate having provided thereon a plurality of gate wires, a plurality of source (drain) wires, and a pixel matrix comprising thin film transistors, and a second substrate facing the first substrate, wherein, among the peripheral circuits having established on the first substrate and being connected to the matrix wiring for the X direction and the Y direction, only a part of said peripheral circuits is constructed from thin film semiconductor devices fabricated by the same process utilized for an active device, and the rest of the peripheral circuits are constructed from semiconductor chips. The liquid crystal display device according to the present invention is characterized in that the peripheral circuits are not wholly fabricated into thin film transistors ...

Method for manufacturing display device

A method of manufacturing a display device is disclosed. In one embodiment, the method includes: i) forming a semiconductor layer where a plurality of crystallized areas and a plurality of noncrystallized areas are alternately arranged on a substrate, ii) aligning the substrate based on a difference in contrast ratio between the crystallized and noncrystallized areas and iii) performing a photo process or a photolithography process.

DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

A display apparatus includes a base substrate, an active pattern on the base substrate including a source region, a drain region, and a channel region that is doped between the source region and the drain region, the channel region including polycrystalline silicon, and a gate electrode overlapping the channel region of the active pattern. The channel region may include a lower portion, an upper portion, and an intermediate portion between the upper portion and the lower portion, and a dopant density of the lower portion may be 80% or more of a dopant density of the upper portion.

SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR CIRCUIT MADE FROM SEMICONDUCTOR ELEMENT AND MANUFACTURING METHOD THEREOF

In the present invention, a semiconductor film is formed through a sputtering method, and then, the semiconductor film is crystallized. After the crystallization, a patterning step is carried out to form an active layer with a desired shape. The present invention is also characterized by forming a semiconductor film through a sputtering method, subsequently forming an insulating film. Next, the semiconductor film is crystallized through the insulating film, so that a crystalline semiconductor film is formed. According this structure, it is possible to obtain a thin film transistor with a good electronic property and a high reliability in a safe processing environment. 1. (canceled)2. A light emitting device comprising:a gate wiring provided over a first substrate;a gate insulating film adjacent to the gate wiring;a semiconductor film adjacent to the gate insulating film;a first insulating film formed over the semiconductor film;a first wiring formed on and in contact with the first insulating film, the first wiring electrically connected to the semiconductor film;a second insulating film comprising a resin over the first wiring;a first electrode over the second insulating film, the first electrode electrically connected to the first wiring;a third insulating film covering an edge of the first electrode;a light emitting layer provided over the first electrode and the third insulating film;a second electrode provided over the light emitting layer and the third insulating film;a second wiring between the first insulating film and the second insulating film, wherein the second electrode is electrically connected to the second wiring through an opening of the third insulating film and an opening of the second insulating film; anda second substrate covering the gate wiring, the gate insulating film, the semiconductor film, the first wiring, the first electrode, the light emitting layer and the second electrode,wherein the second substrate is fixed to the first substrate ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device includes a substrate, a buffer layer on the substrate, a first semiconductor layer of a first transistor on the buffer layer, a first insulating layer disposed on the first semiconductor layer, a first gate electrode of the first transistor on the first insulating layer, a second insulating layer on the first gate electrode, and a second semiconductor layer of a second transistor disposed on the second insulating layer. A difference between a first distance between a lower side of the buffer layer and an upper side of the second insulating layer and a second distance between an upper side of the first semiconductor layer and an upper side of the second insulating layer is 420 to 520 angstroms.

THIN FILM TRANSISTOR PANEL, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE THIN FILM TRANSISTOR PANEL

A transistor panel may include a substrate, a transistor, a first inorganic buffer layer, and an inorganic fluorine-containing buffer layer. The transistor may overlap the substrate and may include a semiconductor layer. The first inorganic buffer layer may be disposed between the substrate and the semiconductor layer. The inorganic fluorine-containing buffer layer may be disposed between the first inorganic buffer layer and the semiconductor layer and may contain fluorine in a range of 0.5 at % to 2 at %.

THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, ARRAY SUBSTRATE AND DISPLAY DEVICE

The present disclosure provides a thin film transistor, a method of fabricating the same, an array substrate and a display device. The thin film transistor includes: source and drain electrodes in a same layer arranged on a base substrate; an active layer on the base substrate and in contact with the source and drain electrodes; a gate insulating layer at a side of the active layer away from the base substrate; a gate electrode at a side of the gate insulating layer away from the base substrate. Orthographic projections of the gate electrode, the source electrode and the drain electrode on the base substrate do not overlap with one another, and a region of the active layer not covered by the gate electrode, the source electrode and the drain electrode and at a side of the active layer away from the base substrate is subjected to conductorization.

Method for manufacturing AMOLED backplane and structure thereof

The present invention provides method for manufacturing an AMOLED backplane and a structure thereof. The method uses a drain terminal of a drive TFT to serve as an anode of AMOLED the anode, so that compared to the prior art, the steps of forming a planarization layer and an anode layer are eliminated and also, the same half-tone masking operation is used to form a pixel definition layer and photo spacers, whereby the method for manufacturing the AMOLED backplane according to the present invention requires only six masking operations and saves three masking operations compared to the prior art, thereby effectively simplifying the manufacturing process, improving manufacturing efficiency, and saving cost. The present invention provides a structure of an AMOLED backplane, which has a simple structure, is easy to manufacture, and has a low cost.

Semiconductor Device and A Method of Manufacturing the Same

A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.

Method for crystallising a non-single crystal semiconductor by heating

A semiconductor device is manufactured by the use of a glass substrate which has previously been heated. An amorphous semiconductor layer is formed on the previously heated glass substrate and then crystallized by heat. By virtue of the previous heating, shrink of the glass substrate after the crystallization process is reduced. Accordingly, internal stress is not generated in the crystallized semiconductor layer. The semiconductor device thus manufactured is superior in electrical property. ...

Display deivce and manufacturing method of the same

Semiconductor device and manufacturing method thereof

An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

Semiconductor structure, active array substrate, method for crystallizing metal oxide semiconductor layer, and indium gallium zinc oxide crystal

Active matrix device including thin film transistors

A method of fabricating silicon TFTs (thin-film transistors) is disclosed. The method comprises a crystallization step by laser irradiation effected after the completion of the device structure. First, amorphous silicon TFTs are fabricated. In each of the TFTs, the channel formation region, the source and drain regions are exposed to laser radiation illuminated from above or below the substrate. Then, the laser radiation is illuminated to crystallize and activate the channel formation region, and source and drain regions. After the completion of the device structure, various electrical characteristics of the TFTs are controlled. Also, the amorphous TFTs can be changed into polysilicon TFTs.

Hybrid polycrystalline and amorphous silicon structures on a shared substrate

Amorphous and polycrystalline silicon (hybrid) devices are formed close to one another employing laser crystallization and back side lithography processes. A mask (e.g., TiW) is used to protect the amorphous silicon device during laser crystallization. A patterned nitride layer is used to protect the amorphous silicon device during rehydrogenation of the polycrystalline silicon. An absorption film (e.g., amorphous silicon) is used to compensate for the different transparencies of amorphous and polycrystalline silicon during the back side lithography. Device spacing of between 2 and 50 micrometers may be obtained, while using materials and process steps otherwise compatible with existing hybrid device formation processes.

METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND MASK FOR USE IN THE MANUFACTURING

The present invention provides a method for manufacturing a thin film transistor including processing of irradiating an amorphous silicon film deposited on a substrate with laser light. The method comprises: a laser annealing step for forming a polysilicon film including a channel region by irradiating an area including a formation region of the region in the film with the laser light such that the area including the formation region is heated, melted, and recrystallized; and a removing step for etching off an area outside the region from the polysilicon film . Thus, the present invention can provide a method for manufacturing a thin film transistor and a mask for use in the manufacturing method that are capable of promoting the recrystallization of the film and thereby improving its electron mobility even when laser irradiation has to be performed under restricted irradiation conditions. 1. A method for manufacturing a thin film transistor including processing of irradiating an amorphous silicon film deposited on a substrate with laser light , the method comprising:a laser annealing step for forming a polysilicon film including a channel region by irradiating an area including a formation region of the channel region in the amorphous silicon film with the laser light such that the area including the formation region is heated, melted, and recrystallized; anda removing step for etching off an area outside the channel region from the polysilicon film.2. The method for manufacturing a thin film transistor according to claim 1 , wherein claim 1 , in the laser annealing step claim 1 , a reduced-size image of a mask pattern is projected onto the amorphous silicon film through a projection lens claim 1 , and the area including the formation region of the channel region and corresponding to the mask pattern is irradiated with the laser light.3. The method for manufacturing a thin film transistor according to claim 2 , wherein the projection lens includes a plurality of ...

DRIVE CIRCUIT OF ACTIVE MATRIX TYPE DISPLAY DEVICE AND MANUFACTURING METHOD THEREOR

A data holding control signal for each data line is supplied to a plurality of source followers that are connected together in parallel. The parallel-connected source followers are a combination of at least one first follower that is illuminated with laser light only once and at least one second follower that is illuminated twice. A width of the laser light illumination for crystallization is equal to a pitch of the source followers multiplied by an integer that is not less than 3.

MANUFACTURE METHOD OF AMOLED PIXEL DRIVE CIRCUIT

The present invention provides a manufacture method of an AMOLED pixel driving circuit. The method utilizes the oxide semiconductor thin film transistor to be the switch thin film transistor of the AMOLED pixel driving circuit to reduce the leakage current of the switch thin film transistor, and the P type polysilicon thin film transistor manufactured by utilizing the Solid Phase Crystallization is employed to be the drive thin film transistor of the AMOLED pixel driving circuit to promote the mobility, the equality and the reliability of the drive thin film transistor, and utilizing the P type thin film transistor to be the drive thin film transistor can form the constant current type OLED element, which is more stable than the source follower type OLED formed by the N type thin film transistor, and meanwhile, the parasitic capacitance is decreased with the top gate structure.

Method of localized annealing of semi-conducting elements using a reflective area

A method of making crystal semi-conducting material-based elements, including providing a support having amorphous semi-conducting material-based semi-conducting elements, the support being further provided with one or more components and with a reflective protective area configured so as to reflect a light radiation in a given wavelength range, exposing the element(s) to a laser radiation emitting in the given wavelength range so as to recrystallize the elements, the reflective protective area being arranged on the support relative to the elements and to the components so as to reflect the laser radiation and protect the components from this radiation.

Display device

An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.

MANUFACTURING METHOD OF LOW TEMPERATURE POLY-SILICON TFT ARRAY SUBSTRATE

A manufacturing method of an LTPS-TFT array substrate is provided. The exemplary method comprises a step of sequentially forming a poly-silicon layer and a data-line-metal layer on a base substrate, and performing a patterning process by using a third mask to simultaneously form an active layer and source and drain electrodes, the active layer being provided on the gate insulating layer and corresponding to the gate electrode, and the source and drain electrodes being provided on the active layer.

Laser mask and method of crystallization using the same

Provided is a method for crystallizing using a laser mask for selectively crystallizing active regions without a laser shot mark, including: providing an array substrate in which NxM active regions are defined; positioning a laser mask having first and second blocks over the substrate, wherein the first and second blocks have first and second mask patterns, respectively, and the second mask pattern is a reverse pattern of the first mask pattern; irradiating a first laser beam onto the active regions through the first block; and irradiating a second laser beam onto the active regions through the second block.

MANUFACTURING METHOD FOR ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE

The present disclosure provides a manufacturing method for an array substrate and a liquid crystal display device. The manufacturing method for an array substrate may include: providing a substrate; forming a thin film transistor device comprising a source and a drain on the substrate; covering a passivation layer, a blocking layer, and a photoresist layer on the thin film transistor device, sequentially; processing the photoresist layer to divide the blocking layer and the passivation layer into a first region and a second region corresponding to positions of an active area, and a third region corresponding to a position of the thin film transistor device. By the above-mentioned manufacturing method, on one hand, a number of mask processes may be reduced, and the manufacturing efficiency may be improved. On the other hand, peeling efficiency of the photoresist may be improved.

MANUFACTURING METHOD FOR LTPS TFT SUBSTRATE

The invention provides a manufacturing method for LTPS TFT substrate. After forming N+ areas on both sides of polysilicon layer, the first gate insulating layer, first gate, second gate insulating layer, and second gate are sequentially formed on polysilicon layer, and the second gate is wider than first gate to produce a low electric field region in the polysilicon layer to reduce leakage current; alternatively, forming first gate and first gate insulating layer, forming polysilicon layer and N+ areas on both sides of polysilicon layer, forming second gate insulating layer and second gate on polysilicon layer, the second gate insulating layer is thicker than first gate insulating layer and the second gate is wider than first gate, so that the second gate insulating layer sandwiched by the second gate beyond first gate and polysilicon layer is thicker and produces a smaller electric field, which simplifies process and reduce cost. 1. A manufacturing method for low temperature polysilicon (LTPS) thin film transistor (TFT) substrate , which comprises:{'b': '1', 'Step : providing a substrate, and depositing a buffer layer on the substrate;'}{'b': '2', 'Step : depositing an amorphous silicon (a-Si) layer on the buffer layer, performing dehydrogenation treatment on the a-Si layer, performing a crystallization process to turn the a-Si layer into a polysilicon layer, and patterning the polysilicon layer to obtain the island-shape polysilicon layer;'}{'b': '3', 'Step : coating a photo-resist on the island-shape polysilicon layer and performing exposure and development on the photo-resist to form a photo-resist layer; using the photo-resist layer as a masking layer to perform ion implantation on both sides of the island-shape polysilicon layer to form an N-type heavily doped (N+) area on both sides of the island-shape polysilicon layer and an undoped area between the two N+ areas, and then peeling the photo-resist layer off;'}{'b': '4', 'Step : depositing a first gate ...

Method of manufacturing display panel

A method of manufacturing a display panel having a plurality of lightly doped drain thin film transistors arranged as a matrix includes forming a semiconductor pattern with a predetermined shape on a substrate; forming a dielectric layer covering the semiconductor pattern on the substrate; forming a metal layer on the dielectric layer; forming a photoresist patterns smaller than the semiconductor pattern on the metal layer above the semiconductor pattern; etching the metal layer to form a gate electrode smaller than the photoresist pattern; doping high concentration ions by using the photoresist pattern as a mask to form a pair of highly doped regions on the semiconductor pattern not covered by the photoresist pattern; removing the photoresist pattern; and doping low concentration ions by using the gate electrode as a mask to form a pair of lightly doped regions between the highly doped regions and a part of the semiconductor pattern.

Reactor having a movable shutter

A reactor for growing epitaxial layers includes a reaction chamber having a passthrough opening for inserting and removing wafer carriers from the reaction chamber. A reactor also includes a cylindrical shutter located inside the reaction chamber for selectively closing the passthrough opening. The cylindrical shutter is movable between a first position for closing the passthrough opening and a second position for opening the passthrough opening. The cylindrical shutter includes an internal cavity adapted to receive a cooling fluid and tubing for introducing the cooling fluid into the internal cavity. The tubing is permanently secured to the shutter and moves simultaneously therewith. The cylindrical shutter substantially surrounds an outer perimeter of the wafer carrier, thereby minimizing nonuniformity in the temperature and flow field characteristics of the reactant gases.

Method of transferring semiconductors

A display panel is formed using essentially single crystal thin-film material that is transferred to substrates for display fabrication. The transfer includes the step of transferring the semiconductor regions onto a stretchable substrate. The resulting circuit panel can be incorporated into a display panel with a light emitting or liquid crystal material to provide the desired display.

Electro-optical device constructed with thin film transistors

An electro-optical device and a method for manufacturing the same are disclosed. The device comprises a pair of substrates and an electro-optical modulating layer (e.g. a liquid crystal layer having sandwiched therebetween, said pair of substrates consisting of a first substrate having provided thereon a plurality of gate wires, a plurality of source (drain) wires, and a pixel matrix comprising thin film transistors, and a second substrate facing the first substrate, wherein, among the peripheral circuits having established on the first substrate and being connected to the matrix wirings for the X direction and the Y direction, only a part of said peripheral circuits is constructed from thin film semiconductor devices fabricated by the same process utilized for an active device, and the rest of the peripheral circuits is constructed from semiconductor chips. The liquid crystal display device according to the present invention is characterized by that the peripheral circuits are not wholly ...

Method for fabrication liquid crystal display device and diffraction mask therefor

An LCD is fabricated using a diffraction mask with transmissive, semi-transmissive, and opaque regions. The semi-transmissive region permits formation of a transmission, reflection, or pixel electrode, depending on the type of LCD being fabricated, using the same masking process as that to produce contact holes in an insulating film and a conductive layer. Photoresist exposed through the semi-transmissive region is partially removed during developing that completely removes photoresist in the transmissive or opaque region. The contact holes are formed in the region in which the photoresist is completely removed, the photoresist and underlying conductive layer in the semi-transmissive region are then removed, and the remaining photoresist is stripped.

THIN FILM TRANSISTOR INCLUDING CRYSTALLIZED SEMICONDUCTOR, DISPLAY DEVICE INCLUDING THE SAME, MANUFACTURING METHOD OF THE SAME, AND METHOD FOR CRYSTALLIZING SEMICONDUCTOR

A thin film transistor according to an exemplary embodiment includes: a substrate; a semiconductor layer disposed on the substrate and including a channel region, and an input region and an output region disposed on both sides of the channel region and doped with an impurity; a buffer layer disposed between the substrate and the semiconductor layer; a control electrode overlapping the semiconductor layer; a gate insulation layer disposed between the semiconductor layer and the control electrode; and an input electrode connected to the input region and an output electrode connected to the output region, wherein the semiconductor layer includes polysilicon and is crystallized by a blue laser scan.

Polishing head, substrate processing apparatus including the same and processing method of substrate using the same

A substrate processing apparatus includes: a conveyor belt configured to have an outer surface on which a bottom surface of a substrate is seated; and a polishing head unit configured to face an upper surface of the substrate, wherein the polishing head unit includes: a polishing head connected to a driver; a polishing pad configured to face the polishing head; a polishing pad fixing ring disposed between the polishing head and the polishing pad; and a temperature sensor configured to overlap the polishing pad fixing ring and to be spaced apart from the polishing pad fixing ring.

표시 장치 제조 방법

... 본 발명의 실시예에 따른 표시 장치 제조 방법은 기판 상에 복수의 결정화 영역들과 복수의 비결정화 영역들이 각각 교호적으로 배열된 반도체층을 형성하는 단계와, 상기 복수의 결정화 영역들과 상기 복수의 비결정화 영역들 간의 대비비(contrast ratio) 차이를 이용하여 상기 기판을 정렬하는 단계, 그리고 사진 공정 또는 사진 식각 공정을 진행하는 단계를 포함한다.

Manufacturing method of semiconductor device

A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed.

Organic light emitting diode display device and method of fabricating the same

An organic light emitting diode (OLED) display device and a method of fabricating the same are disclosed. The OLED display device includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels disposed in a region in which the scan lines cross the data lines, where each pixel of the plurality of pixels includes: a switching transistor including a first gate electrode, a first semiconductor layer disposed over the first gate electrode, a first gate insulating layer interposed between the first gate electrode and the first semiconductor layer, a first source electrode and a first drain electrode, a driving transistor including a second semiconductor layer, a second gate electrode disposed over the second semiconductor layer, a second gate insulating layer interposed between the second gate electrode and the second semiconductor layer, a second source electrode and a second drain electrode, and an organic light emitting diode electrically connected with the second source and second drain electrodes of the driving transistor, where the first and second semiconductor layers are formed of the same material, and from the same processing.

METHOD OF FABRICATING THIN FILM TRANSISTOR ARRAY SUBSTRATE

A thin film transistor array substrate includes a substrate, a plurality of poly-silicon islands and a plurality of gates. The substrate has a display region, a gate driver region and a source driver region. Each poly-silicon island disposed on the substrate has a source region, a drain region and a channel region disposed therebetween. The poly-silicon islands include several first poly-silicon islands and several second poly-silicon islands. The first poly-silicon islands having main grain boundaries and sub grain boundaries are only disposed within the display region and the gate driver region. The main grain boundaries of the first poly-silicon islands are only disposed within the source regions and/or the drain regions. The second poly-silicon islands are disposed in the source driver region. Grain sizes of the first poly-silicon islands are substantially different from those of the second poly-silicon islands. Gates corresponding to the channel regions are disposed on the substrate. 1. A method of fabricating a thin film transistor array substrate , comprising:providing a substrate, the substrate comprising a display region, a gate driver region, and a source driver region;forming an amorphous silicon layer on the substrate;using a laser beam to irradiate the amorphous silicon layer to form a poly-silicon layer, wherein the poly-silicon layer comprises a plurality of main grain boundaries and a plurality of sub grain boundaries, and grain sizes of the poly-silicon layer disposed in the display region and the gate driver region are different from grain sizes of the poly-silicon layer disposed in the source driver region;patterning the poly-silicon layer to form a plurality of poly-silicon islands, wherein the poly-silicon islands disposed in the display region and the gate driver region constitute a plurality of first poly-silicon islands, and the poly-silicon islands disposed in the source driver region constitute a plurality of second poly-silicon islands; ...

METHOD OF MANUFACTURING LOW TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM AND THIN FILM TRANSISTOR, THIN FILM TRANSISTOR, DISPLAY PANEL AND DISPLAY DEVICE

A method of manufacturing a low temperature polycrystalline silicon thin film and a thin film transistor, a thin film transistor, a display panel and a display device are provided. The method includes: forming an amorphous silicon thin film () on a substrate (); forming a pattern of a silicon oxide thin film () covering the amorphous silicon thin film (), a thickness of the silicon oxide thin film () located at a preset region being larger than that of the silicon oxide thin film () located at other regions; and irradiating the silicon oxide thin film () by using excimer laser to allow the amorphous silicon thin film () forming an initial polycrystalline silicon thin film (), the initial polycrystalline silicon thin film () located at the preset region being a target low temperature polycrystalline silicon thin film (). The polycrystalline silicon thin film has more uniform crystal size. 1. A method of manufacturing a low temperature polycrystalline silicon thin film , comprising:forming an amorphous silicon thin film on a substrate;forming a pattern of a silicon oxide thin film covering the amorphous silicon thin film, wherein a thickness of the silicon oxide thin film located at a preset region is larger than that of the silicon oxide thin film located at other regions other than the preset region; andirradiating the silicon oxide thin film by using excimer laser to allow the amorphous silicon thin film forming an initial polycrystalline silicon thin film, wherein the initial polycrystalline silicon thin film located at the preset region is a target low temperature polycrystalline silicon thin film.2. The manufacturing method according to claim 1 , further comprising: after forming the initial polycrystalline silicon thin film by using the amorphous silicon thin film claim 1 ,removing the silicon oxide thin film on the initial polycrystalline silicon thin film;hydrotreating the initial polycrystalline silicon thin film; andpatterning the hydrotreated initial ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even when the insulating film provided between adjacent pixels is formed by a coating method, thin portions are problematically partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wiring and the lower wiring are arranged in a misaligned manner so as not to align the end portions. 1. A display device comprising:a first conductive layer over an insulating surface;a first insulating layer over the first conductive layer,a second conductive layer, a third conductive layer, a fourth conductive layer, and a fifth conductive layer over the first insulating layer,wherein the first conductive layer has a region electrically connected to a transistor and functioning as a gate wiring,wherein the second conductive layer has a region electrically connected to the transistor and functioning as a source wiring,wherein the third conductive layer has a region electrically connected to the transistor and functioning as a drain wiring,wherein the fourth conductive layer comprises a same material as the second conductive layer and the third conductive layer,wherein the fourth conductive layer is in a floating state,wherein the fifth conductive layer has a region electrically connected to a transistor located adjacent to the transistor and functioning as a source wiring,wherein the first conductive layer has a region overlapping an entire lower surface of the fourth conductive layer,wherein in a ...

DISPLAY SUBSTRATE AND METHOD FOR PREPARING THE SAME, AND DISPLAY DEVICE

The present disclosure provides a display substrate, a method for preparing the same, and a display device. The method for preparing the display substrate includes a step of preparing a pixel driving circuit on a substrate, the step specifically includes: preparing a first active layer of an oxide transistor on the substrate; preparing a barrier layer on a surface of the first active layer away from the substrate, an orthogonal projection of the barrier layer on the substrate covering an orthogonal projection of the first active layer on the substrate; preparing a low-temperature polysilicon transistor is on the substrate; and preparing a first gate insulating layer, a first gate electrode, a first input electrode, and a first output electrode of the oxide transistor on the substrate. 1. A method for preparing a display substrate , comprising a step of preparing a pixel driving circuit on a substrate , the pixel driving circuit comprising an oxide transistor and a low-temperature polysilicon transistor ,wherein the step of preparing the pixel driving circuit on the substrate comprises:preparing a first active layer of the oxide transistor on the substrate;preparing a barrier layer on a surface of the first active layer away from the substrate, wherein an orthogonal projection of the barrier layer on the substrate covers an orthogonal projection of the first active layer on the substrate;preparing the low-temperature polysilicon transistor on the substrate; andpreparing a first gate insulating layer, a first gate electrode, a first input electrode, and a first output electrode of the oxide transistor on the substrate.2. The method of claim 1 , wherein the barrier layer and the substrate together enclose the first active layer.3. The method of claim 1 , wherein the preparing the barrier layer on the surface of the first active layer away from the substrate comprises preparing the barrier layer using a metal material.4. The method of claim 3 , wherein the preparing the ...

BACKPLANE SUBSTRATE, MANUFACTURING METHOD FOR THE SAME, AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE USING THE SAME

Disclosed are a backplane substrate, which is devised to attain circuit characteristics for realizing sufficient gradation even in smaller pixels of a super-high-resolution structure, a manufacturing method for the same, and an organic light-emitting display device using the same, inn the backplane substrate, a driving thin-film transistor has a stack structure different from that of other thin-film transistors so that only the S-factor of the driving thin-film transistor is increased. 1. A backplane substrate of a display device , comprising:a substrate having an active area and a peripheral area where the active area has a plurality of sub-pixels;a driving thin-film transistor located in each sub-pixel and including a first gate electrode, a first active layer, a first source electrode and a first drain electrode connected to opposite sides of a first channel of the first active layer, and a first gate insulating layer between the first active layer and the first gate electrode; anda switching thin-film transistor located at each sub-pixel, connected to the driving thin-film transistor, and including a second gate electrode, a second active layer, a second source electrode and a second drain electrode connected to opposite sides of a second channel of the second active layer, and a second gate insulating layer between the second active layer and the second gate electrode,wherein the first active layer and the second active layer are located in the same layer,wherein the first gate electrode and the second gate electrode are located in different layers, andwherein a first distance between the first gate electrode and the first active layer is greater than a second distance between the second gate electrode and the second active layer.2. The backplane substrate according to claim 1 , wherein the first gate insulating layer is thicker than the second gate insulating layer.3. The backplane substrate according to claim 1 , wherein the first gate electrode and the first ...

THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY PANEL

The present disclosure provides a thin film transistor, a display panel and a method for manufacturing the thin film transistor. The thin film transistor includes an active layer and a source-drain electrode layer, the source-drain electrode layer includes a first electrode having at least one first electrode strip and a second electrode having at least one second electrode strip, the at least one first electrode strip and the at least one second electrode strip are alternately arranged at intervals, and at least an insulating part of a layer where the active layer is located is provided with an insulating material, and the insulating part is located at an orthographic projection of at least a part of a region between a free end of the first electrode strip, which is proximal to the second electrode, and the second electrode, on the layer where the active layer is located. 1. A thin film transistor , comprising an active layer and a source-drain electrode layer , wherein the active layer is made of a semiconductor material , the source-drain electrode layer comprises a first electrode and a second electrode , the first electrode comprises at least one first electrode strip , the second electrode comprises at least one second electrode strip , the at least one first electrode strip and the at least one second electrode strip are alternately arranged at intervals ,at least an insulating part of a layer where the active layer is located is provided with an insulating material, and the insulating part is located at an orthographic projection of at least a part of a region between a free end of the first electrode strip, which is proximal to the second electrode, and the second electrode, on the layer where the active layer is located; and/orat least an insulating part of a layer where the active layer is located is provided with an insulating material, and the insulating part is located at an orthographic projection of at least a part of a region between a free end of ...

SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SAME

A semiconductor device () includes a first thin film transistor () including a first semiconductor layer (A), a gate insulating layer (), a first gate electrode (A) provided on the gate insulating layer (), and first source and drain electrodes (A), (A), the first semiconductor layer (A) including a first channel region (A) and a first high-density impurity region (A), (A) containing an impurity of a first conductivity type. The first channel region (A) includes a first channel portion (A) and a second channel portion (A) located between the first channel portion and the first high-density impurity region. The first channel portion (A) contains an impurity of a second conductivity type that is different from the first conductivity type at a density higher than that in the second channel portion (A) and the impurity of the first conductivity type at a density substantially equal to that in the second channel portion (A). 1. A semiconductor device comprising:a substrate; andat least one first thin film transistor supported by the substrate, a first semiconductor layer including a first channel region and a first high-density impurity region containing an impurity of a first conductivity type, the first high-density impurity region including a first source region and a first drain region located on an opposite side of the first source region with the first channel region interposed therebetween,', 'a gate insulating layer formed on the first semiconductor layer,', 'a first gate electrode provided on the gate insulating layer to overlap with the first channel region in the first semiconductor layer,', 'a first source electrode electrically connected to the first source region, and', 'a first drain electrode electrically connected to the first drain region, and, 'wherein the at least one first thin film transistor includes'}wherein the first channel region includes a first channel portion and a second channel portion located between the first channel portion and the ...

MANUFACTURING METHOD OF LOW TEMPERATURE POLY-SILICON TFT ARRAY SUBSTRATE

A manufacturing method of an LTPS-TFT array substrate is provided. The exemplary method comprises a step of sequentially forming a poly-silicon layer and a data-line-metal layer on a base substrate, and performing a patterning process by using a third mask to simultaneously form an active layer and source and drain electrodes, the active layer being provided on the gate insulating layer and corresponding to the gate electrode, and the source and drain electrodes being provided on the active layer. 1. A manufacturing method of a low temperature poly-silicon thin film transistor (LTPS-TFT) array substrate , comprising:sequentially forming a poly-silicon layer and a data-line-metal layer on a base substrate, and performing a patterning process by using a mask to simultaneously form an active layer and source and drain electrodes, the active layer being provided on the base substrate and the source and drain electrodes being provided on the active layer,wherein the method comprises:{'b': '1', 'Step of depositing a gate-metal-layer on the base substrate, and performing a patterning process by using a first mask to form a gate electrode;'}{'b': 2', '1, 'Step of depositing a gate insulating layer on the base substrate after Step , the gate insulating layer covering the base substrate and the gate electrode;'}{'b': 3', '2, 'Step of sequentially forming the poly-silicon layer and the data-line-metal layer on the base substrate after Step , and performing the patterning process by using a third mask to simultaneously form the active layer and the source and drain electrodes, the active layer being provided on the gate insulating layer and corresponding to the gate electrode; and'}{'b': 4', '3, 'Step of depositing a transparent conductive layer on the base substrate after Step , and performing a patterning process by using a fourth mask to form a pixel electrode, the pixel electrode being provided on the source and drain electrodes and the gate insulating layer.'}2. The ...

Array Substrate and Manufacturing Method Thereof, Display Panel and Display Device

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, an active layer, and a first polarization structure. The active layer is disposed on the base substrate; the first polarization structure is disposed on a side of the active layer facing the base substrate, and an orthographic projection of the first polarization structure on the base substrate is at least partially overlapped with an orthographic projection of the active layer on the base substrate. 1. An array substrate , comprising:a base substrate;an active layer, disposed on the base substrate;a first polarization structure, disposed on a side of the active layer facing the base substrate, and an orthographic projection of the first polarization structure on the base substrate being at least partially overlapped with an orthographic projection of the active layer on the base substrate;a second polarization structure, laminated on the base substrate, and disposed on the side of the active layer facing the base substrate,wherein a polarization direction of the first polarization structure is substantially perpendicular to a polarization direction of the second polarization structure, and both of the orthographic projections of the active layer and the first polarization structure on the base substrate fall within an orthographic projection of the second polarization structure on the base substrate.2. The array substrate of claim 1 , wherein the first polarization structure is provided between the base substrate and the active layer.3. The array substrate of claim 1 , wherein the orthographic projection of the active layer on the base substrate falls within the orthographic projection of the first polarization structure on the base substrate.4. The array substrate of claim 3 , wherein the orthographic projection of the active layer on the base substrate substantially coincides with the orthographic projection of the first ...

THIN FILM TRANSISTOR SUBSTRATE, DISPLAY APPARATUS, METHOD FOR MANUFACTURING THE THIN FILM TRANSISTOR SUBSTRATE, AND METHOD FOR MANUFACTURING THE DISPLAY APPARATUS

A thin film transistor substrate includes a substrate, an anodized aluminum layer on the substrate, a polycrystalline silicon layer covering the anodized aluminum layer, and an insulating layer covering the polycrystalline silicon layer. 1. A thin film transistor substrate , comprising:a substrate;an anodized aluminum layer on the substrate, the anodized aluminum layer including a plurality of holes that extend in a direction perpendicular to the substrate and penetrate entirely through the anodized aluminum layer to expose an upper surface of a layer beneath the anodized aluminum layer;a polycrystalline silicon layer covering the anodized aluminum layer; andan insulating layer covering the polycrystalline silicon layer.2. (canceled)3. The thin film transistor substrate as claimed in claim 1 , wherein the plurality of holes of the anodized aluminum layer contain air.4. The thin film transistor substrate as claimed in claim 1 , wherein:the insulating layer includes a plurality of through holes that expose the polycrystalline silicon layer, andthe thin film transistor substrate further includes a source electrode and a drain electrode that contact the polycrystalline silicon layer via the through holes.5. The thin film transistor substrate as claimed in claim 4 , wherein the anodized aluminum layer is limited to a source region claim 4 , a drain region claim 4 , and an active region of the polycrystalline silicon layer claim 4 , the source region and the drain region contacting the source electrode and the drain electrode claim 4 , and the active region being between the source region and the drain region.6. The thin film transistor substrate as claimed in claim 4 , wherein the anodized aluminum layer is limited to an active region of the polycrystalline silicon layer between a source region and a drain region of the polycrystalline silicon layer claim 4 , the source region and the drain region contacting the source electrode and the drain electrode.7. The thin film ...

Manufacturing method of array substrate, array substrate and display device

A manufacturing method of an array substrate, an array substrate and a display device are provided. The method includes: forming a first electrode; forming a first insulation layer on the first electrode; forming a first via hole in the first insulation layer; forming an active layer on the first insulation layer, which is electrically connected with the first electrode through the first via hole; forming a gate insulation layer on the active layer; forming a first gate electrode on the gate insulation layer, which overlaps with at least part of the active layer; forming a second insulation layer on the first gate electrode and the gate insulation layer, forming a second via hole in the second insulation layer and the gate insulation layer; forming a pixel electrode on the second insulation layer, which is electrically connected with the active layer through the second via hole.

DISPLAY SUBSTRATE ASSEMBLY AND METHOD OF MANUFACTURING THE SAME, AND DISPLAY APPARATUS

In embodiments of the present disclosure, there is provided a display substrate assembly including: a base substrate; a light shielding layer on the base substrate; and an active layer of a thin film transistor, above the base substrate. An orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer includes an ion-doped amorphous silicon layer. In embodiments of the present disclosure, there is also provided a method of manufacturing a display substrate assembly and a display apparatus including the display substrate assembly. 1. A display substrate assembly , comprising:a base substrate;a light shielding layer on the base substrate; andan active layer of a thin film transistor, above the base substrate;wherein an orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer comprises an ion-doped amorphous silicon layer.2. The display substrate assembly of claim 1 , further comprising:a buffer layer on the base substrate;a first insulating layer on the buffer layer; anda second insulating layer on the light shielding layer;wherein, the light shielding layer is between the first insulating layer and the second insulating layer, and the second insulating layer is between the light shielding layer and the active layer.3. The display substrate assembly of claim 2 , wherein orthogonal projections of the active layer claim 2 , the first insulating layer claim 2 , the light shielding layer and the second insulating layer on the base substrate in the thickness direction of the base substrate are completely overlapped substantially.4. The ...

THIN FILM TRANSISTOR, DISPLAY APPARATUS INCLUDING THE SAME, AND MANUFACTURING METHODS THEREOF

A method of manufacturing a thin film transistor includes: removing an oxide film on a surface of an amorphous silicon layer by performing a surface cleaning; and forming an active layer by performing a heat treatment on the amorphous silicon layer, where the amorphous silicon layer is changed into crystalline silicon by the heat treatment. 1. A method of manufacturing a thin film transistor , the method comprising:providing an amorphous silicon layer over a substrate;removing an oxide film on a surface of the amorphous silicon layer by performing a surface cleaning; andforming an active layer by performing a heat treatment on the amorphous silicon layer, wherein the amorphous silicon layer is changed into crystalline silicon by the heat treatment.2. The method of claim 1 , wherein the removing the oxide film on the surface of the amorphous silicon layer by performing the surface cleaning comprises spraying a hydrogen fluoride solution onto the surface of the amorphous silicon layer.3. The method of claim 2 , wherein the hydrogen fluoride solution comprises about 0.5 vol % of hydrogen fluoride.4. The method of claim 2 , wherein the removing the oxide film on the surface of the amorphous silicon layer by performing the surface cleaning further comprisesperforming a first rinse cleaning including supplying hydrogen water to the surface of the amorphous silicon layer in a free fall manner.5. The method of claim 4 , wherein the removing the oxide film on the surface of the amorphous silicon layer by performing the surface cleaning further comprisesperforming a second rinse cleaning including supplying hydrogen water to the surface of the amorphous silicon layer in a free fall manner while applying vibration to the hydrogen water with megasonic waves.6. The method of claim 1 , wherein the forming the active layer comprises:radiating a laser beam onto the amorphous silicon layer arranged over the substrate, wherein the laser beam has long sides and short sides in a first ...

ACTIVE DEVICE SUBSTRATE AND MANUFACTURING METHOD THEREOF

An active device substrate includes a substrate, a first active device, and a second active device. The first active device includes a first gate, a crystallized metal oxide layer, a first insulation layer, a first source, and a first drain. The crystallized metal oxide layer is located on the first gate. The first insulation layer is sandwiched between the crystallized metal oxide layer and the first gate. An area from the top surface of the crystallized metal oxide layer to the bottom surface of the crystallized metal oxide layer is observed via a selected area diffraction mode of a transmission electron microscope, and a diffraction pattern of a crystallized phase can be observed. The second active device includes a second gate, a silicon semiconductor layer, a second source, and a second drain. A manufacturing method of an active device substrate is further provided. 1. An active device substrate , comprising: a first gate;', 'a crystallized metal oxide layer located on the first gate, and a first insulation layer is sandwiched between the crystallized metal oxide layer and the first gate, wherein an area from a top surface of the crystallized metal oxide layer to a bottom surface of the crystallized metal oxide layer is observed via a selected area diffraction mode of a transmission electron microscope, and a diffraction pattern of a crystallized phase can be observed; and', 'a first source and a first drain electrically connected to the crystallized metal oxide layer;, 'a first active device located on a substrate, the first active device comprising a second gate;', 'a silicon semiconductor layer overlapped with the second gate; and', 'a second source and a second drain electrically connected to the silicon semiconductor layer., 'a second active device located on a substrate, the second active device comprising2. The active device substrate of claim 1 , wherein a material of the first gate comprises titanium or a combination of titanium and aluminum.3. The ...

Manufacture Method Of Low Temperature Poly Silicon, Manufacturing Method Of TFT Substrate Utilizing The Method, And TFT Substrate Structure

The present invention provides a manufacture method of Low Temperature Poly Silicon, a manufacture method of a TFT substrate utilizing the method and a TFT substrate structure. The manufacture method of Low Temperature Poly Silicon comprises steps of: step 1, providing a substrate ( 1 ); step 2, depositing a buffer layer ( 2 ) on the substrate ( 1 ); step 3, patterning the buffer layer ( 2 ) to form a convex part ( 21 ) and a concave part ( 23 ) having different thicknesses; step 4, depositing an amorphous silicon layer ( 3 ) on the buffer layer ( 2 ) comprising the convex part ( 21 ) and the concave part ( 23 ); step 5, implementing a pretreatment of an excimer laser anneal to the amorphous silicon layer ( 3 ); step 6, implementing the excimer laser anneal to the amorphous silicon layer ( 3 ), and a laser beam scans an entire surface of the amorphous silicon layer ( 3 ) to melt the amorphous silicon layer ( 3 ) to recrystallize as a poly silicon layer ( 4 ). The method is capable of effectively controlling the locations and the directions of the recrystallization.

POLYSILICON THIN-FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR PREPARING THE SAME, AND DISPLAY DEVICE

The present invention provides a polysilicon thin-film transistor array substrate and a method for preparing the same, and a display device, wherein the method comprises a step of forming a gate electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode of the polysilicon thin-film transistor, and a first electrode and a second electrode of a storage capacitor, and a gate line and a data line, wherein, the semiconductor layer and the first electrode of the storage capacitor are formed via a one-time patterning process, and the gate electrode, the gate line and the second electrode of the storage capacitor are formed via a one-time patterning process. By the solution of the invention, the number of mask plates used can be lowered, so that the process can be simplified, and the production cost can be lowered.

ARRAY SUBSTRATE, MANUFACTURING METHOD FOR THE SAME AND DISPLAY PANEL

The present invention discloses an array substrate, manufacturing method for the same and display panel. The present invention adopts a vertical superposition method to connect the QLED device with the TFT. When applying a voltage, the first semiconductor pattern and the second semiconductor pattern respectively generate electron holes and electrons to move toward the QLED device. The electron holes and electrons are recombined in the light-emitting layer to emit a light such that the light can be emitted right above the QLED device in order to realize a light-emitting at a TFT region, and increase the aperture ratio of the display panel. 1. An array substrate , comprising:a substrate;a first gate electrode pattern formed on the substrate and a first insulation layer covered on the first gate electrode pattern;a first semiconductor pattern formed on the first insulation layer, wherein, the first semiconductor pattern is located right above the first gate electrode pattern for generating electron holes when applying with a voltage;a bank layer that covers the first semiconductor pattern, wherein, the bank layer is provided with a concave slot and two first contact holes located outside the concave slot, the concave slot and the two first contact holes all reveal a surface of the first semiconductor pattern;a QLED device formed in the concave slot and contacted with the first semiconductor pattern;a second semiconductor pattern formed on the bank layer for generating electrons when applying with a voltage, wherein, the second semiconductor pattern directly covers on the QLED device and the two first contact holes, and electrically connected to the first semiconductor pattern through the two first contact holes;a second insulation layer covered on the second semiconductor pattern, wherein, the second insulation layer is provided with two second contact holes that reveal a surface of the second semiconductor pattern;source electrode pattern and a drain electrode pattern ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided. 1. (canceled)2. A semiconductor device comprising:a gate electrode over a substrate;a silicon nitride layer over the gate electrode;a first silicon oxide layer over and in contact with the silicon nitride layer;an oxide semiconductor layer over and in contact with the first silicon oxide layer;a second silicon oxide layer comprising a region in contact with a channel formation region of the oxide semiconductor layer, and a region covering a periphery portion of the oxide semiconductor layer;a first conductive layer and a second conductive layer over and in contact with the second silicon oxide layer;a third silicon oxide layer comprising a region in contact with the first conductive layer, and a region in contact with the second conductive layer; anda planarizing insulating layer over the third silicon oxide layer, the planarizing insulating layer comprising an organic material,wherein each of the first conductive layer and the second conductive layer comprises a region in contact with the oxide semiconductor layer through a first opening provided in the second silicon oxide layer, andwherein the first opening ...

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF AND DISPLAY APPARATUS

An array substrate and a manufacturing method thereof, and a display apparatus comprising the array substrate are provided. The array substrate comprises a base substrate, and a thin film transistor and a storing capacitor provided on the base substrate, the thin film transistor comprises a gate, a source, a drain and a gate insulation layer provided between the source and drain and the gate, the storing capacitor comprises a first plate, a second plate and a dielectric layer provided between the first plate and the second plate, wherein, both of the first plate and the second plate are formed of metal material, and the dielectric layer is formed of the same material as the gate insulation layer. In the array substrate of the present invention, the charging speed of the storing capacitor can be improved and the display quality of the display apparatus comprising the array substrate is further improved. 1. An array substrate comprising a base substrate , and a thin film transistor and a storing capacitor provided on the base substrate , the thin film transistor comprises a gate , a source , a drain and a gate insulation layer provided between the source and drain and the gate , the storing capacitor comprises a first plate , a second plate and a dielectric layer provided between the first plate and the second plate , wherein , both of the first plate and the second plate are formed of metal material , and the dielectric layer is formed of the same material as the gate insulation layer.2. The array substrate of claim 1 , wherein the first plate is provided in the same layer as the source and the drain on the base substrate.3. The array substrate of claim 1 , further comprises a buffer layer provided above the source and the drain claim 1 , the buffer layer partially covers the source and is provided with a source via hole claim 1 , and the buffer layer also partially covers the drain and is provided with a drain via hole.4. The array substrate of claim 3 , further ...

DISPLAY DEVICE INCLUDING POLYCRYSTALLINE SILICON LAYER, METHOD OF MANUFACTURING POLYCRYSTALLINE SILICON LAYER, AND METHOD OF MANUFACTURING DISPLAY DEVICE

A display device may include a thin film transistor disposed on a substrate, and a display element electrically connected to the thin film transistor. The thin film transistor may include an active pattern including polycrystalline silicon, a gate insulation layer disposed on the active pattern, and a gate electrode disposed on the gate insulation layer. An average value of grain sizes of the active pattern may be in a range of about 400 nm to about 800 nm. An RMS value of a surface roughness of the active pattern may be about 4 nm or less. A method of manufacturing a polycrystalline silicon layer may include cleaning an amorphous silicon layer with hydrofluoric acid, rinsing the amorphous silicon layer with hydrogenated deionized water, and irradiating the amorphous silicon layer with a laser beam having an energy density of about 440 mJ/cmto about 490 mJ/cm. 1. A method of manufacturing a polycrystalline silicon layer , comprising:forming an amorphous silicon layer on a substrate;cleaning the amorphous silicon layer with hydrofluoric acid;rinsing the amorphous silicon layer with hydrogenated deionized water; and{'sup': 2', '2, 'irradiating the amorphous silicon layer with a laser beam having an energy density in a range of about 440 mJ/cmto about 490 mJ/cmto form the polycrystalline silicon layer.'}2. The method of claim 1 , wherein a thickness of the amorphous silicon layer is in a range of about 370 Å to about 500 Å.3. The method of claim 1 , wherein the hydrofluoric acid includes a hydrogen fluoride in an amount of about 0.5%.4. The method of wherein the cleaning the amorphous silicon layer is performed for a time period of about 60 seconds to about 120 seconds.5. The method of claim 1 , wherein a hydrogen concentration of the hydrogenated deionized water is about 1.0 ppm.6. The method of claim 1 , wherein a wavelength of the laser beam is about 308 nm.7. The method of claim 1 , wherein a scan pitch of the laser beam is about 10 μm or less.8. The method of ...

ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS

An electro-optical device is capable of high quality images. An electro-optical device () includes a first capacitive element (), a second capacitive element (), and a third capacitive element (). The first capacitive element () includes a first conductive film (), a first part of a second conductive film (), and a first dielectric film (). The second capacitive element () includes a third conductive film (), a second part of a fourth conductive film (), and a second dielectric film (). The third capacitive element () includes the third conductive film (), a third part of the fourth conductive film (), and the second dielectric film (). Since a capacitive element that includes a large capacitance value is formed in a narrow region, even if the pixel becomes smaller as the definition is increased, it is possible to realize an excellent electro-optical device in which display defects are suppressed. 1. An electro-optical device comprising:a first capacitive element; anda second capacitive element,wherein the first capacitive element includes a first conductive film, a first part of a second conductive film, and a first dielectric film arranged between the first conductive film and the second dielectric film,the second capacitive element includes the first conductive film, a second part of the second conductive film, and the first dielectric film,the first conductive film includes a first surface and a second surface that intersects the first face,the first part is arranged so as to face the first surface, andthe second part is arranged so as to face the second surface.2. The electro-optical device according to claim 1 , further comprising:a third capacitive element,wherein the third capacitive element includes a third conductive film, a third part of a fourth conductive film, and a second dielectric film arranged between the third conductive film and the fourth conductive film,the third conductive film includes a third surface; andthe third part is arranged so as to ...

LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE STRUCTURE AND MANUFACTURE METHOD THEREOF

The present invention provides a Low Temperature Poly-silicon TFT substrate structure and a manufacture method thereof. By providing the buffer layers in the drive TFT area and the display TFT area with different thicknesses, of which the thickness of the buffer layer in the drive TFT area is larger, and the thickness of the buffer layer in the display TFT area is smaller, different temperature grades are formed in the crystallization process of the polysilicon to achieve the control to the grain diameters of the crystals. The polysilicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of polysilicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for different TFTs can be satisfied to raise the light uniformity of the OLED. 1. A manufacture method of a Low Temperature Poly-silicon TFT substrate structure , comprising steps of:{'b': '1', 'step , providing a substrate, and the substrate comprises a drive TFT area and a display TFT area, and deposing a buffer layer on the substrate, and patterning the buffer layer to make a thickness of the buffer layer in the drive TFT area be larger than a thickness of the buffer layer in the display TFT area;'}{'b': '2', 'step , deposing an amorphous silicon layer on the buffer layer, and implementing an Excimer Laser Annealing process to the amorphous silicon layer to make the amorphous silicon layer to be crystallized and converted to be a polysilicon layer after an Excimer Laser Annealing pretreatment, and patterning the polysilicon layer to obtain a first polysilicon section in the drive TFT area and a second polysilicon section in the display TFT area;'}{'b': '3', 'step , deposing a gate isolation layer on the first polysilicon section, the second polysilicon ...

Method for manufacturing tft substrate

The present invention provides a method for manufacturing a TFT substrate, in which after induced crystallization is conducted by implanting ions into an amorphous silicon layer, there is no need to completely remove the ion induction layer formed on the surface of a poly-silicon layer so obtained and instead, a half-tone mask based operation is applied to remove only a portion of the ion induction layer corresponding to a channel zone and there is no need for re-conducting ion implantation subsequently for source/drain contact zones, thereby saving the mask necessary for re-conducting ion implantation. Further, the source/drain electrodes are also formed with the half-tone mask based operation so as to save the mask necessary for making the source/drain electrodes. Further, the source/drain electrodes are formed first so that the formation of an interlayer insulation layer can be omitted thereby saving the mask necessary for forming the interlayer insulation layer. Through the adoption of a half-tone mask base operation, the method for manufacturing a TFT substrate according to the present invention can reduce the nine masks that are involved in the prior art techniques to only six masks, thereby effectively simplifying the manufacturing process, improving manufacturing efficiency, and saving manufacturing cost.

Display device and method of manufacturing the same

A display device includes: a pixel at a display region. The pixel includes: a light-emitting element connected between a first power source and a second power source; and a first transistor connected between the first power source and the light-emitting element, the first transistor to control a driving current of the light-emitting element in response to a voltage of a first node. The first transistor includes a first driving transistor and a second driving transistor that are connected in series with each other between the first power source and the light-emitting element, and the first driving transistor and the second driving transistor have structures that are asymmetric with each other in a cross-sectional view.

THIN FILM TRANSISTOR AND PRODUCTION METHOD THEREFOR

A thin film transistor () includes: a gate electrode () supported on a substrate (); a semiconductor layer () including a crystalline silicon region (), wherein the crystalline silicon region () includes a channel region (Rc); a gate insulating layer (); a source electrode (); and a drain electrode (), wherein the channel region (Rc) includes a plurality of first crystalline regions (C) and at least one second crystalline region (C), wherein the first crystalline regions (C) are separated from each other by the second crystalline region (C); each first crystalline region (C) includes an n-type impurity at a higher concentration than the second crystalline region (C); and an average grain diameter of silicon crystal grains in each first crystalline region (C) is larger than an average grain diameter of silicon crystal grains in the second crystalline region (C). 1. A thin film transistor comprising:a substrate;a gate electrode supported on the substrate;a semiconductor layer including a crystalline silicon region, wherein the crystalline silicon region includes a first region and a second region, and includes a channel region that is located between the first region and the second region and overlaps with the gate electrode as viewed from a direction normal to the substrate;a gate insulating layer that provides insulation between the gate electrode and the semiconductor layer;a source electrode electrically connected to the first region; anda drain electrode electrically connected to the second region, wherein:the channel region includes a plurality of first crystalline regions and at least one second crystalline region, wherein the first crystalline regions are separated from each other by the at least one second crystalline region;each of the first crystalline regions includes an n-type impurity at a higher concentration than the at least one second crystalline region; andan average grain diameter of silicon crystal grains in each of the first crystalline regions ...

DISPLAY PANEL AND MANUFACTURING METHOD THEREOF

Provided is a novel display panel that is highly convenient or reliable. The display device has two display modes: a reflective display mode and a light-emitting display mode. In the light-emitting display mode, light display is performed by transmitting light from a light-emitting element overlapping with an opening in a pixel electrode of a reflective display element. A switching element of the reflective display element and a switching element electrically connected to the light-emitting element are formed over one substrate. They are each a transistor whose channel formation region is formed in a silicon-containing film, specifically a polysilicon film. 1. A display panel comprising:a driver circuit;a signal line electrically connected to the driver circuit; and a first conductive film electrically connected to a first display element;', 'a second conductive film comprising a region overlapping with the first conductive film;', 'an insulating film comprising a region between the first conductive film and the second conductive film;', 'a pixel circuit electrically connected to the second conductive film and the signal line, the pixel circuit comprising a transistor comprising silicon in a channel formation region; and', 'a second display element electrically connected to the pixel circuit,, 'a pixel electrically connected to the signal line, the pixel comprisingwherein the insulating film comprises a first opening, andwherein the second conductive film is electrically connected to the first conductive film in the first opening.2. The display panel according to claim 1 ,wherein the first display element comprises a reflective film and is configured to control an intensity of reflected light,wherein the reflective film is configured to reflect incident light,wherein the reflective film comprises a second opening,wherein the second display element is configured to emit light toward the second opening.3. The display panel according to claim 1 ,wherein the first ...

TFT SUBSTRATE MANUFACTURING METHOD AND TFT SUBSTRATE

The present invention provides a TFT substrate manufacturing method and a TFT substrate. The TFT substrate manufacturing method of the present invention applies etching to source and drain contact zones of an active layer to have heights thereof lower than a height of a channel zone in the middle and configures the source and drain contact zones in a stepwise form so that charge carriers are affected by an electric field (Vds electric field) that is deviated in a direction away from a poly-silicon/gate insulation layer interface and the migration path thereof is caused to shift away from the poly-silicon/gate insulation layer interface thereby reducing the injection of high energy carriers into the gate insulation layer. Further, due to the formation of the steps in the drain contact zone, the peak intensity of the lateral electric field (Vds electric field) around the drain contact zone and the intensity of a longitudinal electric field (Vgs electric field) of the drain contact zone are both reduced, making a pinch-off point shifted toward an edge of the drain contact zone, reducing drifting of threshold voltage, and improving TFT reliability. 1. A thin-film transistor (TFT) substrate manufacturing method , comprising the following steps:(1) providing a substrate and sequentially depositing a buffer layer and an amorphous silicon layer on the substrate;(2) subjecting the amorphous silicon layer to excimer laser annealing or solid phase crystallization to convert the amorphous silicon layer into a low temperature poly-silicon layer and applying a photolithographic process to pattern the low temperature poly-silicon layer to form a first active layer and a second active layer that are spaced from each other;(3) coating a photoresist layer on the first active layer, the second active layer, and the substrate, subjecting the photoresist layer to exposure and development to expose two end portions of the first active layer, using the photoresist layer as a shielding ...

LASER ANNEALING METHOD

A laser annealing method includes: step A of providing a substrate having an amorphous semiconductor film formed on a surface thereof; and step B of selectively irradiating a portion of the amorphous semiconductor film with laser light. The step B includes a step of simultaneously forming, in the portion, two molten regions that have elongate shapes congruent to each other and are arranged in line symmetry with each other. 14-. (canceled)5. A laser annealing method comprising:step A of preparing a substrate having an amorphous semiconductor film formed on a surface thereof; andstep B of irradiating the amorphous semiconductor film with laser light a plurality of times through a mask having a plurality of openings while moving the substrate relative to the mask,wherein step B includes a step of simultaneously forming two molten regions that have elongated shapes congruent to each other and are arranged in line symmetry with each other.6. A laser annealing method comprising:step A of preparing a substrate having an amorphous semiconductor film formed on a surface thereof; andstep B of forming a plurality of polycrystalline regions by irradiating the amorphous semiconductor film with laser light a plurality of times through a mask having a plurality of openings while moving the substrate relative to the mask so as to partially melt-crystallize the amorphous semiconductor film,wherein the plurality of polycrystalline regions include a first polycrystalline region that has a shape elongated in a first direction and symmetrical with respect to a first center line parallel to the first direction, and two second polycrystalline regions that are adjacent to the first polycrystalline region, that have congruent shapes to each other, and that are arranged symmetrically with respect to the first center line, andstep B includes a step of simultaneously forming two molten regions to be the two second polycrystalline regions.7. The laser annealing method of claim 6 , wherein step ...

Laser irradiation apparatus

A laser irradiation apparatus includes a laser beam generator that generates a first laser beam, a beam expander that expands the first laser beam and outputs the expanded first laser beam as a second laser beam, a beam splitter that splits the second laser beam into third laser beams and outputs the third laser beams, and a beam condenser that condenses the third laser beams and outputs condensed third laser beams. The beam expander includes a first lens having a first focal length and a second lens having a second focal length. The first lens is disposed between the laser beam generator and the second lens, the second lens is disposed between the first lens and the beam splitter, and the laser beam generator is spaced apart from the first lens by the first focal length.

ARRAY SUBSTRATE MANUFACTURING METHOD AND ARRAY SUBSTRATE

The present invention provides an array substrate manufacturing method and an array substrate. The array substrate manufacturing method of the present invention uses an organic photoresist material to form a passivation protection layer () for substituting the conventional passivation protection layer that is made of a silicon nitride material and applies one mask to subject the passivation protection layer () and a planarization layer () to exposure and development so as to obtain a third via () that is located above the first drain electrode () and a fourth via () that is located above the second drain electrode () and, thus, compared the prior art techniques, saves one mask and reduces one etching process so as to achieve the purposes of simplifying the manufacturing process and saving manufacturing cost. The array substrate of the present invention has a simple structure and low manufacturing cost and possesses excellent electrical performance. 1. An array substrate manufacturing method , comprising the following steps:(1) providing a base plate, depositing a first metal layer on the base plate, and subjecting the first metal layer to a patterning operation to obtain a light shielding layer;(2) forming a buffer layer on the light shielding layer and the base plate, forming an amorphous layer on the buffer layer, subjecting the amorphous layer to crystallization treatment so as to form a poly silicon layer, applying a photolithographic process to subject the poly silicon layer to a patterning operation to obtain a first poly silicon section located above and corresponding to the light shielding layer and a second poly silicon section that is spaced from the first poly silicon section;(3) using a mask to subject a middle area of the first poly silicon section to P type light doping to obtain a first channel zone, and then using a mask to subject two opposite end portions of the first poly silicon section to N type heavy doping to obtain N type heavy doping zones ...

SUBSTRATE FOR IN-CELL TYPE TOUCH SENSOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

An array substrate for an in-cell type touch sensor liquid crystal display device includes: a substrate; a gate line and a data line on the substrate; a thin film transistor connected to the gate line and the data line; a first passivation layer on the thin film transistor; a common electrode on the first passivation layer; an etching preventing pattern covering the drain contact hole; an x sensing line and a y sensing line on the common electrode; a second passivation layer on the x sensing line and the y sensing line; and a pixel electrode on the second passivation layer. 110-. (canceled)11. A method of fabricating an array substrate for an in-cell type touch sensor liquid crystal display device , the method comprising:forming a gate line, an auxiliary sensing line, a data line, and a thin film transistor on a substrate including a plurality of touch blocks each including a plurality of pixel regions, the gate line and the data line crossing each other with an interlayer insulating layer interposed therebetween to define each of the plurality of pixel regions, the auxiliary sensing line formed on the interlayer insulating layer, and the thin film transistor connected to the gate line and the data line;forming a first passivation layer on the thin film transistor, the first passivation layer having a first drain contact hole exposing a drain electrode of the thin film transistor;forming a common electrode and an etching preventing pattern on the first passivation layer, the common electrode disposed in each of the plurality of touch blocks, the etching preventing pattern spaced apart from the common electrode, and the etching preventing pattern having an area greater than the drain contact hole to completely cover the drain electrode;forming an x sensing line and a y sensing line on the common electrode, the x sensing line overlapping the gate line and the y sensing line overlapping the data line;forming a second passivation layer on the x sensing line and the y ...

MANUFACTURING METHOD OF TFT SUBSTRATE, TFT SUBSTRATE, AND OLED DISPLAY PANEL

This disclosure discloses a manufacturing method of a TFT substrate, a TFT substrate, and an OLED display panel. The manufacturing method of the TFT substrate includes sequentially forming a gate electrode, a gate insulating layer, a polysilicon layer, and a barrier layer on the substrate, the polysilicon layer including a source region, a drain region, and a channel region; the barrier layer above the source and drain regions is etched by a photomask so that the thickness of the barrier layer allows ions to pass through and is not zero; and then the polysilicon layer is ion implanted; through the method, the polysilicon layer of the source and drain regions can be ion implanted without exposing the polysilicon layer, the damage of the polysilicon layer during the process can be avoided, and the stability of the TFT substrate can be improved, thereby improving the display quality. 1. An OLED display panel , comprisinga TFT substrate, anda planarization layer,an anode layer, andan organic light emitting device layer formed on the TFT substrate;wherein the anode layer provides an anode driving signal for the organic light emitting device layer, and the anode layer is connected to a drain electrode of the TFT substrate;wherein the TFT substrate comprises a substrate and a gate electrode, a gate insulating layer, a polysilicon layer, a barrier layer, a source electrode, and the drain electrode formed on the substrate, wherein the polysilicon layer comprises a source region, a drain region, and a channel region, the polysilicon layer of the source and drain regions is ion implanted;the source and drain electrodes are respectively connected to the polysilicon layer of the source and drain regions through the barrier layer on the source and drain regions and first contact holes at the ion-implanted polysilicon layer;wherein thickness of the barrier layer on the source and drain regions is that ions can pass through and is not zero;the TFT substrate further comprises a ...

PREPARATION METHODS FOR THIN-FILM LAYER PATTERN, THIN-FILM TRANSISTOR AND ARRAY SUBSTRATE

Preparation methods for a thin-film layer pattern, thin-film transistor and array substrate. The preparation method for a thin-film layer pattern includes: providing a mask plate, the mask plate including a mask plate body and a hollowed portion arranged on same; placing the mask plate onto a substrate, and allowing a projection of the hollowed portion on the substrate to be overlapped with a projection of a thin-film layer pattern to be formed on the substrate; forming a thin film on the substrate on which the mask plate () is placed, wherein a first thin-film portion formed at the hollowed portion is disconnected from a second thin-film portion formed on the mask plate body; and stripping the mask plate, and reserving the first thin-film portion to form the thin-film layer pattern. 1. A preparation method of a thin film layer pattern , comprising:providing a mask, the mask including a mask body and a hollow-out portion arranged on the mask body;placing the mask on a substrate, and enabling a projection of the hollow-out portion on the substrate to coincide with a projection of the thin film layer pattern to be formed on the substrate;forming a thin film on the substrate where the mask is placed, wherein a first portion of the thin film formed at the hollow-out portion is disconnected from a second portion of the thin film formed on the mask body; andstripping off the mask and reserving the first portion of the thin film on the substrate so as to form the thin film layer pattern.2. The preparation method according to claim 1 , wherein the thin film is formed on the substrate provided with the mask by a sputtering method.3. The preparation method according to claim 1 , wherein the mask is a metal mask.4. The preparation method according to claim 1 , wherein a thickness of the metal mask is between 720 μm and 880 μm.5. The preparation method according to claim 1 , wherein the thin film is an amorphous silicon thin film claim 1 , and the method further comprises: ...

LOW-TEMPERATURE POLYCRYSTALLINE SILICON ARRAY SUBSTRATE AND MANUFACTURING METHOD, DISPLAY PANEL

The present disclosure provides a low-temperature polycrystalline silicon array substrate which includes a substrate, a groove disposed on the substrate, a buffer layer disposed on the substrate, and a polycrystalline silicon active layer disposed on the buffer layer, the groove is located at a channel of a thin film transistor, and the buffer layer covers the groove to form an air layer in the groove. The present disclosure further provides a manufacturing method of a low-temperature polycrystalline silicon array substrate, mainly including: manufacturing a groove at a channel of a thin film transistor on a substrate; depositing a metal sacrificial layer on the substrate, and etching the metal sacrificial layer except the groove through an etching process; sequentially forming a buffer layer and an amorphous silicon layer on the substrate; and removing the metal sacrificial layer in the groove to form an air layer in the groove. 1. A low-temperature polycrystalline silicon array substrate , comprising a substrate , a groove disposed on the substrate , a buffer layer disposed on the substrate , and a polycrystalline silicon active layer disposed on the buffer layer , wherein , the groove is located at a channel of a thin film transistor , and the buffer layer covers a surface of the groove to form an air layer in the groove.2. The low-temperature polycrystalline silicon array substrate of claim 1 , wherein a depth of the groove is equal to a thickness of the polycrystalline silicon active layer.3. A manufacturing method of a low-temperature polycrystalline silicon array substrate claim 1 , comprising:providing a substrate;manufacturing a groove at a channel of a thin film transistor on a substrate;disposing a metal sacrificial layer for filling the groove in the groove;sequentially forming a buffer layer and an amorphous silicon layer on the substrate;removing the metal sacrificial layer in the groove to form an air layer in the groove; andperforming Excimer Laser ...

ARRAY SUBSTRATE FOR DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME

An array substrate for a display device includes: a substrate; first and second gate electrodes of impurity-doped polycrystalline silicon on the substrate; a gate insulating layer on the first and second gate electrodes; first and second active layers of intrinsic polycrystalline silicon on the gate insulating layer, the first and second active layers corresponding to the first and second active layers, respectively; an interlayer insulating layer on the first and second active layers and including first to fourth active contact holes, the first and second active contact holes exposing side portions of the first active layer, the third and fourth active contact holes exposing side portions of the second active layer; first and second ohmic contact layers of impurity-doped amorphous silicon on the interlayer insulating layer, the first ohmic contact layer contacting the first active layer through the first and second active contact holes, the second ohmic contact layer contacting the second active layer through the third and fourth active contact hole; first source and drain electrodes on the first ohmic contact layer and second source and drain electrodes on the second ohmic contact layer; a data line on the interlayer insulating layer, the data line connected to the first source electrode; a first passivation layer on the first source and drain electrodes, the second source and drain electrodes and the data line; a gate line on the first passivation layer, the gate line connected to the first gate electrode and crossing the data line to define a pixel region; a second passivation layer on the gate line; and a pixel electrode on the second passivation layer, the pixel electrode connected to the second drain electrode. 16-. (canceled)7. An array substrate for a display device , comprising:a substrate;first and second gate electrodes of impurity-doped polycrystalline silicon on the substrate;a gate insulating layer on the first and second gate electrodes;first and ...

Display panel, method for driving the same, and display device

The disclosure discloses a display panel, a method for driving the same, and a display device, where a control electrode is arranged on the side of an active layer of a thin film transistor away from a gate electrode, and the thickness of a buffer layer between the control electrode and the active layer is controlled so that the buffer layer is thicker than a gate insulation layer between the gate electrode and the active layer, to adjust the distance between the control electrode and the active layer to be larger than the distance between the gate electrode and the active layer; and at least when a gate off voltage is applied to the gate electrode so that the thin film transistor is switched off, a first control voltage is applied to the control electrode to vary a voltage Vg of the thin film transistor.

Display Device with a Plurality of Separately Operable Pixels

A display device is disclosed. In an embodiment a display device having a plurality of pixels separately operable from each other includes a semiconductor layer sequence including a first semiconductor layer, an active layer and a second semiconductor layer, a first contact structure contacting the first semiconductor layer and a second contact structure contacting the second semiconductor layer and at least one separating region extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, wherein the semiconductor layer sequence and the first contact structure have at least one first recess laterally adjacent with respect to a respective pixel, the first recess extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, and wherein the second contact structure includes second contacts extending through the at least one first recess. 120-. (canceled)21. A display device having a plurality of pixels separately operable from each other , the display device comprising:a semiconductor layer sequence configured to generate electromagnetic radiation comprising a first semiconductor layer, an active layer and a second semiconductor layer;a first contact structure contacting the first semiconductor layer and a second contact structure contacting the second semiconductor layer; andat least one separating region extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer,wherein the semiconductor layer sequence and the first contact structure have at least one first recess laterally adjacent with respect to a respective pixel, the first recess extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer,wherein the second contact structure comprises second contacts extending from a ...

Thin film transistor substrate for flat panel display

The present disclosure relates to a thin film transistor substrate for flat panel display including an organic light emitting diode display. The present disclosure provides a device comprising: a substrate; a scan line extending in a first direction on the substrate; a buffer layer on the scan line; a semiconductor layer extending in a second direction and crossing the scan line on the buffer layer; a gate insulating layer on the semiconductor layer; a gate electrode connected to the scan line, and extending in the first direction and crossing the semiconductor layer on the gate insulating layer; an intermediate insulating layer on the gate electrode; a data line crossing the scan line on the intermediate insulating layer; a source electrode branching from the data line and contacting a first side of the semiconductor layer; and a drain electrode facing the source electrode and contacting a second side of the semiconductor layer.

THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND ORGANIC LIGHT-EMITTING DISPLAY

A thin film transistor array substrate comprises a substrate including a driving transistor region and a switching transistor region, an additional layer disposed in the driving transistor region on the substrate, a buffer layer disposed on the substrate to cover the additional layer, and a driving transistor and a switching transistor disposed in the driving transistor region and the switching transistor region, respectively, on the buffer layer. 1. A thin film transistor array substrate , comprising:a substrate including a driving transistor region and a switching transistor region;an additional layer disposed in the driving transistor region on the substrate;a buffer layer covering the additional layer on the substrate; anda driving transistor and a switching transistor in the driving transistor region and the switching transistor region, respectively, on the buffer layer.2. The thin film transistor array substrate of claim 1 , wherein the additional layer has a thermal conductivity in a range from about 104 W/m·° C. to about 106 W/m·° C.3. The thin film transistor array substrate of claim 1 , wherein the additional layer has a thermal conductivity higher than a thermal conductivity of the buffer layer.4. The thin film transistor array substrate of claim 1 , wherein the additional layer has a thermal conductivity higher than a thermal conductivity of at least one material selected from a group consisting of silicon oxide (SiO) claim 1 , silicon nitride (SiN) claim 1 , amorphous silicon claim 1 , and polysilicon.5. The thin film transistor array substrate of claim 1 , wherein the additional layer comprises at least one selected from a group consisting of siloxane-based materials claim 1 , graphene claim 1 , carbon nanotubes claim 1 , aluminum (Al) claim 1 , molybdenum (Mo) claim 1 , chrome (Cr) claim 1 , silver (Ag) claim 1 , and copper (Cu).6. The thin film transistor array substrate of claim 1 , wherein the buffer layer comprises at least one of silicon oxide ( ...

ARRAY SUBSTRATE AND ITS MANUFACTURING METHOD AND DISPLAY PANEL

The present disclosure discloses an array substrate and its manufacturing method and display panel, wherein, the method for fabricating the array substrate including the steps of: providing a substrate; sequentially forming a TFT functional layer, a touch signal transmission line, a first insulating layer, a first electrode, and a second insulating layer on the substrate; forming a first via and a second via on the second insulating layer by photolithography; forming a second electrode and a metal pattern on the second insulating layer; wherein the metal pattern connects the touch signal transmission line and the first electrode through the first via, and the second electrode connects the source and/or drain through the second via. By the above-described method, the present disclosure can reduce the manufacturing process of the array substrate, thereby reducing the manufacturing cost of the array substrate. 1. A display panel comprising an array substrate , a color film substrate , and a liquid crystal layer between the array substrate and the color film substrate , wherein ,the array substrate comprises a substrate, a TFT functional layer, a touch signal transmission line, a first insulating layer, a first electrode, a second insulating layer, a second electrode, and a metal pattern arranged in this order;wherein the first electrode serves both as a common electrode and also as a touch sensor;wherein the second insulating layer is arranged with a first via and a second via formed by photolithography, the first via exposing the touch signal transmission line and the first electrode, the second via exposing the source and/or drain in the TFT functional layer;wherein the second electrode and the metal pattern are fabricated using the same metal layer, the metal pattern connects the touch signal transmission line and the first electrode through the first via, the second electrode connecting the source and/or drain through the second via;wherein the first via comprises ...

Amoled Substrate and Method for Manufacturing Same

The present disclosure provides a method for manufacturing an AMOLED substrate and an AMOLED substrate. The method includes the steps of: providing a base substrate; forming a PI film on the base substrate; and sequentially forming a separation layer, a non-metallic layer, a buffer layer, and a TFT array on the PI film; wherein the non-metallic layer formed above the PI film is configured for absorbing a laser passing through the buffer layer during formation of the TFT array. 1. A method for manufacturing an active matrix organic light-emitting diode (AMOLED) substrate , comprising:{'b': '10', 'a step S of providing a base substrate;'}{'b': '20', 'a step S of forming a polyimide (PI) film on the base substrate;'}{'b': '30', 'a step S of forming a separation layer on the PI film;'}{'b': '40', 'a step S of forming a non-metallic layer on the separation layer;'}{'b': '50', 'a step S of forming a buffer layer on the non-metallic layer; and'}{'b': '60', 'a step S of forming a thin film transistor (TFT) array on the buffer layer using an excimer laser annealing process, wherein a wavelength of an excimer laser used in the excimer laser annealing process is 308 nm;'}wherein the non-metallic layer formed above the PI film is configured for absorbing a laser passing through the buffer layer during formation of the TFT array.2. The method for manufacturing an AMOLED substrate according to claim 1 , wherein the non-metallic layer includes an amorphous silicon layer and a silicon oxide layer with one stacked on the other.3. The method for manufacturing an AMOLED substrate according to claim 2 , wherein the buffer layer is a silicon nitride layer.4. The method for manufacturing an AMOLED substrate according to claim 3 , wherein the silicon oxide layer is disposed on one surface of the amorphous silicon layer adjoining to the silicon nitride layer.540. The method for manufacturing an AMOLED substrate according to claim 1 , wherein the step S includes:using a plasma enhanced ...

MANUFACTURE METHOD OF LTPS ARRAY SUBSTRATE

The present invention provides a manufacture method of a LTPS array substrate. By utilizing one halftone mask, the N type heavy doping, the channel doping of the first polysilicon layer of the NMOS region and the P type heavy doping of the second polysilicon layer of the PMOS region, the three processes which previously require three masks are integrated into one mask process, and two exposure processes are eliminated, which significantly raises the exposure capacity, and meanwhile saves the manufacture cost of two masks to effectively reduce the manufacture cost of the LTPS array substrate, and the manufactured LTPS array substrate possesses great electrical property. 1. A manufacture method of a LTPS array substrate , comprising steps of:{'b': '1', 'step , providing a substrate, and defining a NMOS region and a PMOS region on the substrate, and depositing a first metal layer on the substrate, and patterning the first metal layer to obtain a light shielding layer in the NMOS region;'}{'b': '2', 'step , forming a buffer layer on the light shielding layer and the substrate, and depositing an amorphous silicon layer on the buffer layer, and employing a low temperature crystallization process to convert the amorphous silicon layer into the polysilicon layer, and patterning the polysilicon layer to obtain a first polysilicon layer in the NMOS region and a second polysilicon layer in the PMOS region;'}{'b': '3', 'step , coating a photoresist layer on the first polysilicon layer, the second polysilicon layer and the buffer layer, and after employing a halftone mask to implement exposure, development to the photoresist layer, forming first vias corresponding to two ends of the second polysilicon layer in the photoresist layer to expose the two ends of the second polysilicon layer, and meanwhile, forming first grooves corresponding to two ends of the first polysilicon layer in the photoresist layer; employing the photoresist layer to be a mask to implement P type heavy ...

DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE

A display device and method for manufacturing same are provided. The display device including a plurality of unit pixels disposed in the matrix on a substrate, each of the unit pixels has a thin film transistor at a place other than the center of the pixel, and unit pixels in a first row and unit pixels in a second row adjacent to the first row are arranged so that they are symmetric with respect to a first virtual plane orthogonal to a main surface of the substrate. 1. A display device comprising a plurality of unit pixels provided with an organic EL element and a plurality of thin film transistors and disposed in the two-dimensional matrix on a substrate ,wherein a first unit pixel and a second unit pixel in two rows adjacent to each other are disposed in arrangement forms symmetric with respect to the boundary between the rows,in each of the two rows, the individual unit pixels are disposed in the same arrangement form in the row direction, andthe thin film transistors of the unit pixels in the two rows have channel regions formed from thin film semiconductor layers crystallized by irradiation with pulse lasers having a major axis width over the unit pixels in the two rows.2. A method for manufacturing a display device including a plurality of unit pixels provided with an organic EL element and a plurality of thin film transistors and disposed in the two-dimensional matrix on a substrate , the method comprising the steps of:forming a first unit pixel and a second unit pixel in two rows adjacent to each other into arrangement forms symmetric with respect to the boundary between the rows,forming the individual unit pixels into the same arrangement form in the row direction in each of the two rows, andforming channel regions from thin film semiconductor layers crystallized by irradiation with pulse lasers having a major axis width over the unit pixels in the two rows in the thin film transistors of the unit pixels in the two rows. The present application is a ...

METHOD OF PRODUCING DISPLAY DEVICE, DISPLAY DEVICE, METHOD OF PRODUCING THIN-FILM TRANSISTOR SUBSTRATE, AND THIN FILM TRANSISTOR SUBSTRATE

A method of producing a display device includes the steps of forming gate electrodes on a substrate so that an arrangement of a source and a drain, in a pixel row direction, of a thin-film transistor formed in each of pixels on the substrate is reversed every pixel row; forming a gate insulating film and an amorphous semiconductor thin film on the substrate in that order so as to cover the gate electrodes; crystallizing the semiconductor thin film by irradiating the semiconductor thin film with an energy beam so that a scanning direction of the energy beam is the same with respect to the arrangement of the source and the drain in the pixel row direction; and forming a light-emitting element connected to the thin-film transistor. 1. A display device comprising:a plurality of pixels, each of the pixels including at least a first sub-pixel configured to emit a first color of light, a second sub-pixel configured to emit a second color of light, and a third sub-pixel configured to emit a third color of light,wherein each of the first, second, and third sub-pixels includes a light-emitting element connected to a pixel circuit, the pixel circuit having a thin-film transistor,wherein a source of the thin-film transistor and a drain of the thin-film transistor are disposed along an arrangement direction, the arrangement direction being parallel to a row direction,wherein an arrangement of the source and the drain along the arrangement direction is reversed in only the pixel circuit of the first sub-pixel.2. The display device according to claim 1 , further comprising:first wiring lines extending along the row direction, said each of the first, second, and third sub-pixels being between one of the first wiring lines and another of the first wiring lines.3. The display device according to claim 1 , wherein the first sub-pixel is between the second sub-pixel and the third sub-pixel.4. The display device according to claim 1 , wherein a first thin-film transistor is in the first ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film. 1. A display device comprising:a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer,an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat,a first interlayer insulating film is formed on or above the oxide semiconductor layer,the Poly-Si layer is formed on or above the first interlayer insulating film.2. The display device according to claim 1 ,wherein the first interlayer insulating film is formed by plural layers including a SiO layer and a SiN layer,the SiO layer is formed on or above the oxide semiconductor layer.3. The display device according to claim 1 ,wherein a second interlayer insulating film is formed on or above the Poly-Si layer,a second through hole is formed through the second interlayer insulating film and a second gate insulating film formed on the Poly-Si layer, a second source/drain electrode connects with the second TFT through the second through hole,a first through hole is formed through the second interlayer insulating film, the second gate insulating film and the first interlayer insulating film, a first source/drain electrode connects with the first TFT through the first through hole.4. The display device according to claim 3 ,wherein the first through hole further penetrates a first gate insulating film that covers the oxide semiconductor layer,the first ...

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer. 1. A method of producing a semiconductor device which includes a substrate , a plurality of first thin film transistors supported on the substrate , an interlevel dielectric layer covering the plurality of first thin film transistors , and a plurality of terminal portions electrically connecting the plurality of first thin film transistors to corresponding external wiring lines , each of the plurality of terminal portions including an upper conductive portion provided on the interlevel dielectric layer ,the semiconductor device having an active region in which the plurality of first thin film transistors are provided, and a peripheral region being located around the active region and having the plurality of terminal portions provided therein, the method comprising:step (A) of forming gate electrodes of the plurality of first thin film transistors on the substrate;step (B) of forming a gate dielectric layer covering the gate electrodes;step (C) of forming an oxide semiconductor layer of the plurality of thin film transistors on the gate dielectric layer;step (D) of forming source electrodes and drain electrodes of the ...

MANUFACTURE METHOD OF TFT SUBSTRATE AND MANUFACTURED TFT SUBSTRATE

The present invention provides a manufacture method of a TFT substrate and a manufactured TFT substrate. In the manufacture method of the TFT substrate according to the present invention, by locating the first lightly doped offset region and the second lightly doped offset region in the TFT, the off state current of the TFT can be reduced; meanwhile, by utilizing the first gate and the second gate to compose the dual gate structure, the influence of the first lightly doped offset region and the second lightly doped offset region to the TFT on state current can be reduced, and the first gate and the second gate are connected, and controlled by the same gate voltage, and no additional voltage is required; the structure is simple and the electrical property is excellent, and the manufactured TFT substrate possesses the better electrical property. 1. A manufacture method of a TFT substrate , comprising steps of:step 1, providing a substrate, and forming an active layer on the substrate, and implementing ion implantation to the active layer and defining a channel region on the active layer;step 2, sequentially depositing an isolation layer and a first metal layer on the active layer and the substrate, and employing one mask for patterning the first metal layer and the isolation layer to obtain a first gate and a gate isolation layer, of which widths are equal to a width of the channel region of the active layer, and two ends in a width direction are aligned;employing the first gate and the gate isolation layer to be a stopper layer, and implementing ion implantation to the active layer to obtain a first ion heavily doped region and a second ion heavily doped region, which are respectively at two sides of the channel region;step 3, depositing a second metal layer on the first gate, the active layer and the substrate, and employing one mask for patterning the second metal layer to obtain a source and a drain, which are at two sides of the active layer and respectively ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided. 1. (canceled)2. A display device comprising:a substrate;a pixel portion on the substrate; a gate electrode layer;', 'a semiconductor layer, the semiconductor layer and the gate electrode layer overlapping with each other; and', 'a first conductive layer and a second conductive layer each in electrical contact with the semiconductor layer and configured to function as a source electrode layer and a drain electrode layer of the transistor;, 'a transistor on the substrate, the transistor comprisinga pixel electrode layer in the pixel portion; and a capacitor wiring layer electrically connected to the semiconductor layer via the second conductive layer; and', 'the pixel electrode layer,, 'a storage capacitor in the pixel portion, the storage capacitor comprisingwherein the first conductive layer is a metal layer made from a first material,wherein the pixel electrode layer is a first light-transmitting conductive film formed from a second material, andwherein the capacitor wiring layer is a second light-transmitting conductive film formed from a third material.3. The display device according to claim 2 , further ...

THIN FILM TRANSISTOR SUBSTRATE, DISPLAY APPARATUS COMPRISING THE SAME, METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS

A thin film transistor (TFT) substrate, a flat display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the flat display apparatus, the thin film transistor (TFT) substrate including a substrate; a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another; a polysilicon layer on the first gate electrode and insulated from the first gate electrode; and a second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes. 1. A thin film transistor (TFT) substrate , comprising:a substrate;a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another;a polysilicon layer on the first gate electrode and insulated from the first gate electrode; anda second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes.2. The TFT substrate as claimed in claim 1 , wherein the first gate electrode further includes a connector that connects the first and second branch electrodes.3. The TFT substrate as claimed in claim 1 , wherein the TFT substrate has a structure such that electric signals applied to the first and second electrodes are identical.4. The TFT substrate as claimed in claim 1 , further comprising:a first capacitor electrode on a same layer as the first gate electrode, the first capacitor electrode including a same material as the first gate electrode; anda second capacitor electrode on a same layer as the second gate electrode, the second capacitor electrode including a same material as the second gate electrode.5. The TFT substrate as claimed in claim 1 , further comprising:a first gate ...

LOW TEMPERATURE POLY-SILICON THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND ARRAY SUBSTRATE

The disclosure provides a manufacturing method of a LTPS-TFT, including: providing a substrate and sequentially forming a buffer layer, a low temperature poly-silicon layer, a source contact region, a drain contact region, a gate insulator layer, a gate layer, and a dielectric layer on the substrate, respectively forming a first and a second contact holes through the dielectric layer and the gate insulator layer by dry etching to expose the source and the drain contact regions; and on the dielectric layer, forming a source electrode to contact the source contact region through the first contact hole and a drain electrode to contact the drain contact region through the second contact hole. When the contact holes are manufactured by dry etching, His added into the etching gas to increase the selectivity ratio to the poly-silicon, thereby reducing the loss of poly-silicon. A LTPS-TFT and an array substrate are also provided. 1. A manufacturing method of a low temperature poly-silicon thin film transistor , comprising:providing a substrate and sequentially forming a buffer layer, a low temperature poly-silicon layer, a source contact region, a drain contact region, a gate insulator layer, a gate layer, and a dielectric layer on the substrate, wherein the source contact region and the drain contact region are disposed in a same layer as the low temperature poly-silicon layer and are respectively disposed at two opposite ends of the low temperature poly-silicon layer;respectively forming a first contact hole and a second contact hole through the dielectric layer and the gate insulator layer by dry etching to expose the source contact region and the drain contact region respectively; wherein an etching gas used in the dry etching comprises a fluorine-containing gas and a hydrogen gas; andforming a source electrode on the dielectric layer to contact the source contact region through the first contact hole and a drain electrode on the dielectric layer to contact the drain ...

THIN FILM TRANSISTOR ARRAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME

A display device includes: a substrate including a display area at which an image is displayed with light; and a switching element on the substrate in the display area thereof. The switching element includes: a semiconductor layer; a first gate electrode; a second gate electrode connected to the first gate electrode; a fluorine-doped first insulating layer between the first gate electrode and semiconductor layer; and a fluorine-doped second insulating layer between the second gate electrode and the semiconductor layer. 1. A thin film transistor array panel comprising:a substrate including a display area at which an image is displayed with light; and a semiconductor layer;', 'a first gate electrode;', 'a second gate electrode connected to the first gate electrode;', 'a fluorine-doped first insulating layer between the first gate electrode and semiconductor layer; and', 'a fluorine-doped second insulating layer between the second gate electrode and the semiconductor layer., 'a switching element on the substrate in the display area thereof, the switching element comprising2. The thin film transistor array panel of claim 1 , whereinthe fluorine-doped first insulating layer and the fluorine-doped second insulating layer include a gate contact hole commonly defined therein, andthe second gate electrode is connected to the first gate electrode at the gate contact hole commonly defined in the fluorine-doped first and second insulating layers.3. The thin film transistor array panel of claim 1 , whereinan upper region of the fluorine-doped first insulating layer which is adjacent to the semiconductor layer includes fluorine.4. The thin film transistor array panel of claim 3 , whereina maximum thickness of the upper region of the fluorine-doped first insulating layer which includes the fluorine is about 20% or more of an entire thickness of the fluorine-doped first insulating layer.5. The thin film transistor array panel of claim 1 , whereina lower region of the fluorine-doped ...

THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

A thin film transistor array panel includes a plurality of pixels on a substrate. Each pixel of the plurality of pixels includes a driving and a switching thin film transistor. The driving thin film transistor includes a first semiconductor including first source and drain regions, a first gate electrode overlapping the first semiconductor, a gate insulating layer between the first semiconductor and the first gate electrode, an oxide layer between the first semiconductor and the gate insulating layer, and first source and drain electrodes. The switching thin film transistor includes a second semiconductor including second source and drain regions, a second gate electrode overlapping the second semiconductor, and second source and drain electrodes. The switching thin film transistor includes the gate insulating layer between the second semiconductor and the second gate electrode. The gate insulating layer contacts an upper portion of the second semiconductor. 1. A thin film transistor array panel , comprising a substrate and [ a first semiconductor including a first source region and a first drain region,', 'a first gate electrode overlapping the first semiconductor,', 'a gate insulating layer between the first semiconductor and the first gate electrode,', 'an oxide layer between the first semiconductor and the gate insulating layer,', 'a first source electrode, and', 'a first drain electrode; and, 'a driving thin film transistor including'}, a second semiconductor including a second source region and a second drain region,', 'a second gate electrode overlapping the second semiconductor,', 'the gate insulating layer between the second semiconductor and the second gate electrode and contacting an upper portion of the second semiconductor,', 'a second source electrode, and', 'a second drain electrode., 'a switching thin film transistor including'}], 'a plurality of pixels on the substrate, each pixel including2. The thin film transistor array panel as claimed in claim ...

ELECTRO-STATIC DISCHARGE CIRCUIT, ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY APPARATUS

Disclosed are an electro-static discharge circuit, an array substrate, a display panel and a display apparatus. The electro-static discharge circuit includes a first transistor, a second transistor, a first switching device and a second switching device. A first end of the first transistor is electrically connected to a first level line, a second end of the first transistor is electrically connected to a signal line, a control end of the first transistor is electrically connected to a first end of the first switching device, a second end of the first switching device is electrically connected to the first level line, and a control end of the first switching device is electrically connected to the signal line. 1. An electro-static discharge circuit , comprising:a first transistor, a second transistor, a first switching device and a second switching device;wherein a first end of the first transistor is electrically connected to a first level line, a second end of the first transistor is electrically connected to a signal line, a control end of the first transistor is electrically connected to a first end of the first switching device, a second end of the first switching device is electrically connected to the first level line, and a control end of the first switching device is electrically connected to the signal line, wherein when the first switching device is conductive, the first transistor discharges charges accumulated on the signal line to the first level line; andwherein a first end of the second transistor is electrically connected to the signal line, a second end of the second transistor is electrically connected to a second level line, a control end of the second transistor is electrically connected to a first end of the second switching device, a second end of the second switching device is electrically connected to the signal line, and a control end of the second switching device is electrically connected to the second level line, wherein when the second ...

Method of manufacturing organic light emitting display apparatus

An organic light emitting display includes a pixel circuit to supply current to an organic light emitting device. The pixel circuit includes a switching transistor and a driving transistor. The switching transistor includes a first insulating layer between a first gate electrode and an oxide semiconductor layer. The driving transistor includes a second gate electrode on an active layer. The first insulating layer is between the active layer and the second gate electrode.

LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE STRUCTURE AND MANUFACTURE METHOD THEREOF

The present invention provides a Low Temperature Poly-silicon TFT substrate structure and a manufacture method thereof. By providing the amorphous silicon layers in the drive TFT area and the display TFT area with different thicknesses, of which the thickness of the amorphous silicon layer in the drive TFT area is smaller, and the thickness of the amorphous silicon layer in the display TFT area is larger, and thus, in the Excimer Laser Annealing process, different crystallization results are generated with the amorphous silicon layers in the drive TFT area and the display TFT area under the function of the laser with the same energy to achieve the control to the grain diameters of the crystals. The polysilicon layer with larger lattice dimension is formed in the drive TFT area in the crystallization process to raise the electron mobility. The fractured crystals of polysilicon layer in the display TFT area can be obtained in the crystallization process for ensuring the uniformity of the grain boundary and raising the uniformity of the current. Accordingly, the electrical property demands for the different TFTs can be satisfied to raise the light uniformity of the OLED. 1. A manufacture method of a Low Temperature Poly-silicon TFT substrate structure , comprising steps of:{'b': '1', 'step , providing a substrate, and the substrate comprises a drive TFT area and a display TFT area, and deposing a buffer layer on the substrate;'}{'b': '2', 'step , deposing an amorphous silicon layer on the buffer layer, and patterning the polysilicon layer so that a thickness of the amorphous silicon layer in the display TFT area is larger than a thickness of the amorphous silicon layer in the drive TFT area;'}{'b': '3', 'step , implementing an Excimer Laser Annealing process to the amorphous silicon layer to make the amorphous silicon layer to be crystallized and converted to be a polysilicon layer after an Excimer Laser Annealing pretreatment;'}{'b': '4', 'step , patterning the ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device includes a substrate, a buffer layer on the substrate, a first semiconductor layer of a first transistor on the buffer layer, a first insulating layer disposed on the first semiconductor layer, a first gate electrode of the first transistor on the first insulating layer, a second insulating layer on the first gate electrode, and a second semiconductor layer of a second transistor disposed on the second insulating layer. A difference between a first distance between a lower side of the buffer layer and an upper side of the second insulating layer and a second distance between an upper side of the first semiconductor layer and an upper side of the second insulating layer is 420 to 520 angstroms. 1. A display device comprising:a substrate;a buffer layer on the substrate;a first semiconductor layer of a first transistor on the buffer layer;a first insulating layer on the first semiconductor layer;a first gate electrode of the first transistor on the first insulating layer;a second insulating layer on the first gate electrode; anda second semiconductor layer of a second transistor on the second insulating layer,wherein a difference between a first distance between a lower side of the buffer layer and an upper side of the second insulating layer and a second distance between an upper side of the first semiconductor layer and an upper side of the second insulating layer is 420 to 520 angstroms.2. The display device as claimed in claim 1 , wherein a difference between a third distance between an upper side of the first gate electrode and an upper side of the second insulating layer and the second distance is 420 to 520 angstroms.3. The display device as claimed in claim 2 , wherein the third distance corresponds to a thickness of the second insulating layer in a region overlapping the first gate electrode.4. The display device as claimed in claim 1 , wherein the first distance corresponds to a sum of thicknesses of the buffer layer claim 1 , the first ...

MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL AND THIN FILM TRANSISTOR ARRAY PANEL

A manufacturing method of a thin film transistor array panel according to an exemplary embodiment of the present invention includes forming an amorphous silicon thin film on a substrate. A lower region of the amorphous silicon thin film is crystallized to form a polycrystalline silicon thin film by irradiating a laser beam with an energy density of from about 150 mj/cmto about 250 mj/cmto the amorphous silicon thin film. 1. A manufacturing method of a thin film transistor array panel , comprising:forming an amorphous silicon thin film on a substrate; and{'sup': 2', '2, 'crystallizing a lower region of the amorphous silicon thin film to form a polycrystalline silicon thin film by irradiating a laser beam with an energy density of from about 150 mj/cmto about 250 mj/cmto the amorphous silicon thin film.'}2. The manufacturing method of claim 1 , wherein a thickness of the amorphous silicon thin film is from about 35 nm to about 55 nm.3. The manufacturing method of claim 2 , wherein a thickness of the crystallized polycrystalline silicon thin film is from about 25 nm to about 35 nm.4. The manufacturing method of claim 3 , wherein a thickness of an uncrystallized part of the amorphous silicon thin film is from about 10 nm to about 20 nm after crystallizing the lower region of the amorphous silicon thin film to form the polycrystalline silicon thin film.5. The manufacturing method of claim 2 , wherein a ratio of the thickness of the polycrystalline silicon thin film to the thickness of the uncrystallized amorphous silicon thin film is about 2:1.6. The manufacturing method of claim 1 , wherein the laser beam is irradiated to an upper region of the amorphous silicon thin film.7. The manufacturing method of claim 1 , further comprising forming a gate insulating layer on the substrate before forming the amorphous silicon thin film on the substrate.8. The manufacturing method of claim 7 , further comprising forming source and drain electrodes on the amorphous silicon thin film ...

THIN-FILM TRANSISTOR, METHOD FOR FABRICATING THIN-FILM TRANSISTOR, AND DISPLAY DEVICE

Methods of fabricating a thin-film transistor are provided. The methods include forming a gate electrode above a substrate, a gate insulating layer above the gate electrode, a non-crystalline silicon layer above the gate insulating layer, and a channel protective layer above the non-crystalline silicon layer. The non-crystalline silicon layer and the channel protective layer are processed to form a projecting part. The projecting part has an upper layer composed of the channel protective layer and a lower layer composed of the non-crystalline silicon layer. The projecting part and portions of the non-crystalline silicon layer on sides of the projecting part are irradiated with a laser beam to crystallize at least the non-crystalline silicon layer in the projecting part. An absorptance of the non-crystalline silicon layer for the laser beam is greater in the projecting part than in the portions on the sides of the projecting part. 1. A method for fabricating a thin-film transistor , the method comprising:preparing a substrate;forming a gate electrode above the substrate;forming a gate insulating layer above the gate electrode;forming a non-crystalline silicon layer above the gate insulating layer;forming a channel protective layer above the non-crystalline silicon layer;processing the non-crystalline silicon layer and the channel protective layer to form a projecting part, the projecting part having an upper layer composed of the channel protective layer and a lower layer composed of the non-crystalline silicon layer;irradiating, with a laser beam, the projecting part and portions of the non-crystalline silicon layer on sides of the projecting part to crystallize the non-crystalline silicon layer in the projecting part into a crystalline silicon layer, the portions of the non-crystalline silicon layer on the sides of the projecting part remaining the non-crystalline silicon layer;forming a contact layer along at least a side surface of the crystalline silicon layer ...

Display Device

Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.

LASER ANNEALING APPARATUS, LASER ANNEALING METHOD, AND MASK

Provided are a laser annealing apparatus, a laser annealing method, and a mask with which scan nonuniformity can be decreased. According to the present invention, all or some openings of a plurality of openings are configured so that a partial subregion of a prescribed region is irradiated with laser light. The plurality of openings are configured so that, between prescribed regions irradiated with laser light via a group of openings in one row arranged in a row direction and prescribed regions irradiated with laser light via a group of openings in another row arranged in the row direction, the number of times of laser light radiations in subregions having the same occupying region is the same, and at least two openings of a group of openings arranged in a column direction have different positions or shapes. 1. A laser annealing apparatus comprising a mask having a plurality of openings arranged in a matrix of rows and columns , the rows extending in a row direction parallel to a scanning direction , the columns extending in a column direction perpendicular to the scanning direction , whereinthe laser annealing apparatus moves at least one of the mask and a substrate in a direction parallel to the scanning direction, and irradiates a plurality of specific regions of the substrate with laser light through the openings,all or some of the openings are arranged at parts of respective corresponding regions of the mask such that partial regions included in the specific regions are irradiated with the laser light, the corresponding regions of the mask each being a region corresponding to an opening through which an entirety of a corresponding specific region is capable of being irradiated with the laser light, and between a specific region of the specific regions irradiated with the laser light through openings of one row opening group lying in the row direction and another specific region of the specific regions irradiated with the laser light through openings of another ...

REPAIR METHOD AND APPARATUS FOR FLEXIBLE DISPLAY PANEL AND THE FLEXIBLE DISPLAY PANEL THEREOF

Provided is a repair method and apparatus for flexible display panel and flexible display panel thereof. The repair method includes: providing a substrate having a first surface and an opposite second surface; forming a flexible base having bubbles bursting along the direction facing away from substrate on the first surface; forming an active layer on the flexible base for covering bubbles; forming a gate on the surface of the active layer facing away from the flexible base and irradiating the area of gate covering bubbles with laser so as to form a straight slot penetrating the active layer, the gate, and the flexible base; dripping a metallic solution into the straight slot and curing metal solution drops into conducting bodies for connecting the active layer at both sides of the slot and being isolated from gate. The repair method can address the problem of degraded display performance due to bubbles. 1. A repair apparatus for flexible display panel for repairing a flexible display panel having bubbles , wherein the flexible display panel comprises a substrate , a flexible base , an active layer , and a gate , all of which are sequentially stacked up , the repair apparatus comprising:a laser;an image sensor; anda metallic solution burette device;wherein the laser, the image sensor, and the metallic solution burette device align with the area of the gate covering the bubbles, and wherein the laser is used to melt bubbled portions of the flexible base, the active layer, and the gate so as to form a straight slot penetrating the flexible base, and wherein the metallic solution burette device is used to drip a metallic solution into the straight slot for electrically connecting the active layer at both sides of the straight slot, and wherein the image sensor is used to inspect a thickness of dripped metallic solution drops.2. The repair apparatus for flexible display panel for repairing the flexible display panel according to claim 1 , wherein the metallic solution ...

Semiconductor device and semiconductor device production system

A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film.

Preparation Method of Poly-Silicon TFT Array Substrate and Array Substrate Thereof

A preparation method of a poly-silicon thin film transistor (TFT) array substrate and an array substrate thereof are provided. The preparation method includes: forming a photoresist layer on a poly-silicon layer, and exposing and developing the photoresist layer with a gray tone mask to form patterns of a photoresist completely-reserved region, a photoresist partially-reserved regions and a photoresist completely-removed region; removing part of the poly-silicon layer located in the photoresist completely-removed region, to form patterns of active layers; ashing the photoresist so as to expose part of the active layer located in the photoresist partially-reserved regions and inject P+ions of high concentration into the part of the active layer, to form doping regions of patterns of source-drain electrodes of a P-type TFT; and stripping off remaining photoresist. 1. A preparation method of a poly-silicon thin film transistor (TFT) array substrate , comprising:forming patterns of light-shielding layers and a poly-silicon layer on a base substrate by a first patterning process;performing a second patterning process, to form a photoresist layer on the poly-silicon layer, and exposing and developing the photoresist layer with a gray tone mask to form patterns of a photoresist completely-reserved region, a photoresist partially-reserved regions and a photoresist completely-removed region;removing part of the poly-silicon layer located in the photoresist completely-removed regions to form patterns of active layers;ashing the photoresist so as to expose part of the active layers located in the photoresist partially-reserved regions and inject P+ions of high concentrations into the part of the active layers, to form doping regions of patterns of source-drain electrodes of a P-type TFT; and stripping off remaining photoresist.2. The preparation method according to claim 1 , further comprising:forming a pattern of a gate electrode of an N-type TFT and a pattern of a gate ...

LTPS TFT Substrate Structure and Method of Forming the Same

A method of forming an LTPS TFT substrate includes: Step providing a substrate and depositing a buffer layer; Step depositing an a-Si layer; Step depositing and patterning a silicon oxide layer; Step taking the silicon oxide layer as a photomask and annealing the a-Si layer with excimer laser, so that the a-Si layer crystalizes and turns into a poly-Si layer; Step forming a first poly-Si region and a second poly-Si region; Step defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions, and forming an LDD area; Step depositing and patterning a gate insulating layer; Step forming a first gate and a second gate; Step forming via holes; and Step forming a first source/drain and a second source/drain. 1. A method of forming a low temperature poly-Si (LTPS) thin-film transistor (TFT) substrate , comprising:{'b': '1', 'Step : providing a substrate and depositing a buffer layer on the substrate;'}{'b': '2', 'Step : depositing an a-Si layer on the buffer layer;'}{'b': '3', 'Step : depositing a silicon oxide layer on the a-Si layer, and patterning the silicon oxide layer through lithography and etching process, so as to form a silicon oxide layer in the display area;'}{'b': '4', 'Step : taking the silicon oxide layer as a photomask and annealing the a-Si layer with excimer laser, so that the a-Si layer crystalizes and turns into a poly-Si layer, and removing the silicon oxide layer;'}{'b': '5', 'Step : patterning the poly-Si layer through lithography and etching process so to form a first poly-Si region in the display area, and a second poly-Si region in the drive area, with the two regions arrayed with a space in between;'}{'b': '6', 'Step : defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions respectively, and implanting different dosages of P31 into the heavily N-doped area and the lightly N-doped area, so as to form a lightly doped drain (LDD) area;'}{'b': '7', 'Step : depositing and ...

N-TYPE THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF AND MANUFACTURING METHOD OF AN OLED DISPLAY PANEL

The disclosure provides an N-type thin film transistor, including a poly-silicon layer, a gate layer, a source and a drain. The poly-silicon layer includes a channel region, a source region and a drain region at two side of the channel region. The gate layer is on the channel region, a projection of the gate layer on the poly-silicon layer partially overlaps the source region and the drain region, and a thickness of the gate layer on the source region and the drain region are smaller than a thickness of the gate layer on the channel region. The source region and the drain region both include a heavily-doping region and a lightly-doping region connected to the heavily-doping region, the source and the drain are respectively on the heavily-doping region of the source region and the drain, and respectively electrically connects to the heavily-doping region of the source region and the drain. 1. An N-type thin film transistor , from bottom to top , comprising a poly-silicon layer , a gate layer , a source , and a drain;wherein the poly-silicon layer includes a channel region, a source region and a drain region are located at two side of the channel region, the gate layer is disposed on the channel region, a projection of the gate layer on the poly-silicon layer partially overlaps the source region and the drain region, and a thickness of the gate layer on the source region and a thickness of the drain region are both smaller than a thickness of the gate layer on the channel region;wherein the source region and the drain region both include a heavily-doping region and a lightly-doping region connected to the heavily-doping region, the lightly-doping regions are disposed under the gate layer, the source is disposed on the heavily-doping region of the source region and electrically connects to the heavily-doping region of the source region, and the drain is disposed on the heavily-doping region of the drain region and electrically connects to the heavily-doping region of ...

SEMICONDUCTOR DEVICE, DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD FOR MANUFACTURING POLYSILICON FILM

A semiconductor device, comprising a base substrate, a buffer layer and a polysilicon layer film, wherein the base substrate, the buffer layer and the polysilicon layer film being laminated sequentially, and wherein regularly arranged first grooves being provided on a surface of the buffer layer contacting the polysilicon film; the polysilicon film being formed, by applying crystallization treatment, through an optical annealing process, to an amorphous silicon film on the buffer layer having regularly arranged first grooves. 19-. (canceled)10. A semiconductor device , comprising a base substrate , a buffer layer and a polysilicon layer film , wherein the base substrate , the buffer layer and the polysilicon layer film being laminated sequentially ,and wherein regularly arranged first grooves being provided on a surface of the buffer layer contacting the polysilicon film; the polysilicon film being formed, by applying crystallization treatment, through an optical annealing process, to an amorphous silicon film on the buffer layer having regularly arranged first grooves.11. A display substrate , comprising a base substrate , a buffer layer and a polysilicon film , wherein the base substrate , the buffer layer and the polysilicon layer film being laminated sequentially ,and wherein regularly arranged first grooves being provided on a surface of the buffer layer contacting the polysilicon film; the polysilicon film being formed, by applying crystallization treatment, through an optical annealing process, to the amorphous silicon film on the buffer layer having regularly arranged first grooves.12. The display substrate according to claim 11 , wherein the buffer layer comprises at least one first buffer sub-layer and at least one second buffer sub-layer claim 11 , the first buffer sub-layer and the second buffer sub-layer being laminated and arranged alternately.13. The display substrate according to claim 12 , wherein the material of the first buffer sub-layer is ...

MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE

A semiconductor device using an oxide semiconductor is provided with stable electric characteristics to improve the reliability. In a manufacturing process of a transistor including an oxide semiconductor film, an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a first crystalline oxide semiconductor film) is formed; oxygen is added to the oxide semiconductor film to amorphize at least part of the oxide semiconductor film, so that an amorphous oxide semiconductor film containing an excess of oxygen is formed; an aluminum oxide film is formed over the amorphous oxide semiconductor film; and heat treatment is performed thereon to crystallize at least part of the amorphous oxide semiconductor film, so that an oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface thereof (also called a second crystalline oxide semiconductor film) is formed. 1forming a first crystalline oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface of the first crystalline oxide semiconductor film, over an insulating film;forming a gate insulating film over the first crystalline oxide semiconductor film;adding oxygen to the first crystalline oxide semiconductor film through the gate insulating film, so that an oxide semiconductor film at least a part of which is amorphous is formed;forming a gate electrode layer over the gate insulating film;forming an aluminum oxide film over the gate electrode layer; andperforming a heat treatment on the oxide semiconductor film at least the part of which is amorphous to crystallize at least a part of the oxide semiconductor film, so that a second crystalline oxide semiconductor film containing a crystal having a c-axis which is substantially perpendicular to a top surface of the second crystalline oxide semiconductor film is formed.. A method for ...

DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE

A display device includes a substrate, a first active layer on the substrate, a first insulation layer on the first active layer, a first gate electrode on the first insulation layer, the first gate electrode overlapping the first active layer, a second insulation layer on the first gate electrode, a second active layer on the second insulation layer, a first capacitor electrode on the second insulation layer, the first capacitor electrode overlapping the first gate electrode, a third insulation layer on the second active layer and the first capacitor electrode, a second gate electrode on the third insulation layer, the second gate electrode overlapping the second active layer, and a second capacitor electrode on the third insulation layer, the second capacitor electrode overlapping the first gate electrode and electrically connected to the first capacitor electrode. 1. A display device , comprising:a substrate;a first active layer disposed on the substrate;a first insulation layer disposed on the first active layer;a first gate electrode disposed on the first insulation layer, the first gate electrode overlapping the first active layer;a second insulation layer disposed on the first gate electrode;a second active layer disposed on the second insulation layer;a first capacitor electrode disposed on the second insulation layer, the first capacitor electrode overlapping the first gate electrode;a third insulation layer disposed on the second active layer and the first capacitor electrode;a second gate electrode disposed on the third insulation layer, the second gate electrode overlapping the second active layer; anda second capacitor electrode disposed on the third insulation layer, the second capacitor electrode overlapping the first gate electrode and electrically connected to the first capacitor electrode.2. The display device of claim 1 , wherein the first capacitor electrode and the second active layer include a same material.3. The display device of claim 1 , ...

LIQUID CRYSTAL DISPLAY DEVICE

According to one embodiment, a liquid crystal display device includes a first scanning line, a third scanning line, a second scanning line, a first linear electrode, a second linear electrode and a third linear electrode. The first linear electrode is located between the first scanning line and the second scanning line, and extends in a third direction. The second linear electrode is located between the first scanning line and the second scanning line, and extends in a fourth direction. The third linear electrode is located between the second scanning line and the third scanning line, and comprises a portion extending in the fourth direction. The second linear electrode is electrically connected to the third linear electrode. 1. A liquid crystal display device comprising:a first scanning line, a second scanning line, and a third scanning line extending in a first direction;a first pixel and a second pixel between the first scanning line and a second scanning line, a third pixel and a fourth pixel between the second scanning line and the third scanning line; anda first signal line and a second signal line;whereinthe first pixel has a first sub-pixel displaying white color, the second pixel has a second sub-pixel displaying blue color, the third pixel has a third sub-pixel displaying blue color, and the fourth pixel has a fourth sub-pixel displaying white color,the first sub-pixel and the third sub-pixel are arranged along the first signal line, and the second sub-pixel and the fourth sub-pixel are arranged along the second signal line, andthe first sub-pixel has a first linear electrode extending in a second direction which is different from the first direction, the second sub-pixel has a second linear electrode extending in the second direction, the third sub-pixel has a third linear electrode extending in a third direction which is different from the second direction, and the fourth sub-pixel has a fourth linear electrode extending in the third direction.2. The ...

THIN-FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND ORGANIC LIGHT-EMITTING DIODE (OLED) DISPLAY INCLUDING THE SAME

A thin-film transistor, method of manufacturing the same, and organic light-emitting diode (OLED) display including the same are disclosed. In one aspect, the thin-film transistor includes an active layer including a channel region, a source region, and a drain region, wherein the active layer has a top surface. The transistor also includes a gate insulating layer formed over the active layer and a gate metal layer formed over the gate insulating layer and having a bottom surface. The area of the bottom surface of the gate metal layer is less than the area of the top surface of the active layer and the bottom surface of the gate metal layer overlaps the top surface of the active layer. 1. A thin-film transistor , comprising:an active layer including a channel region, a source region, and a drain region, wherein the active layer has a top surface;a gate insulating layer formed over the active layer; anda gate metal layer formed over the gate insulating layer and having a bottom surface,wherein the area of the bottom surface of the gate metal layer is less than the area of the top surface of the active layer, andwherein the bottom surface of the gate metal layer overlaps the top surface of the active layer.2. The thin-film transistor of claim 1 , further comprising a hard mask pattern formed over the gate metal layer.3. The thin-film transistor of claim 2 , wherein the area of a bottom surface of the hard mask pattern is substantially equal to the area of a top surface of the gate metal layer.4. The thin-film transistor of claim 1 , wherein the gate insulating layer is formed over the channel region and is not formed over the source region and the drain region.5. The thin-film transistor of claim 1 , further comprising an interlayer insulating layer formed over the active layer claim 1 , the gate insulating layer claim 1 , and the gate metal layer.6. The thin-film transistor of claim 5 , further comprising first and second through holes defined in the gate insulating ...

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive. 1. A method for manufacturing a semiconductor device , comprising the steps of:forming a first gate electrode over a substrate;forming a gate insulating film over the first gate electrode;forming an oxide semiconductor film over the gate insulating film;forming a pair of electrodes electrically connected to the oxide semiconductor film without performing heat treatment after the oxide semiconductor film is formed;forming a first oxide insulating film over the oxide semiconductor film by a plasma CVD,wherein a film formation temperature of the first oxide insulating film is higher than or equal to 280° C. and lower than or equal to 400° C.;forming a second oxide insulating film over the first oxide insulating film; andperforming heat treatment at a temperature higher than or equal to 150° C. and lower than or equal to 400° C.2. The method for manufacturing a semiconductor device according to claim 1 ,wherein a treatment chamber is evacuated and a pressure in the treatment chamber is set to be greater than or equal to 100 Pa and less than or equal to 250 Pa by ...

CARRIER SUBSTRATE, LAMINATE, AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE

A carrier substrate to be used, when manufacturing a member for an electronic device on a surface of a substrate, by being bonded to the substrate, includes at least a first glass substrate. The first glass substrate has a compaction described below of 80 ppm or less. Compaction is a shrinkage in a case of subjecting the first glass substrate to a temperature raising from a room temperature at 100° C./hour and to a heat treatment at 600° C. for 80 minutes, and then to a cooling to the room temperature at 100° C./hour. 1. A carrier substrate to be used , when manufacturing a member for an electronic device on a surface of a substrate , by being bonded to the substrate ,the carrier substrate comprising at least a first glass substrate,wherein the first glass substrate has a compaction described below of 80 ppm or less:compaction: a shrinkage in a case of subjecting the first glass substrate to a temperature raising from a room temperature at 100° C./hour and to a heat treatment at 600° C. for 80 minutes, and then to a cooling to the room temperature at 100° C./hour.2. The carrier substrate according to claim 1 , wherein the compaction is 70 ppm or less.3. The carrier substrate according to claim 1 , wherein the first glass substrate has a strain point of 700° C. or more.4. The carrier substrate according to claim 1 , wherein the first glass substrate comprises a glass comprising claim 1 , in terms of mass percentages based on oxides claim 1 , the following:{'sub': '2', 'SiO: 50% to 73%,'}{'sub': 2', '3, 'AlO: 10.5% to 24%,'}{'sub': 2', '3, 'BO: 0% to 5%,'}MgO: 0% to 10%,CaO: 0% to 14.5%,SrO: 0% to 24%,BaO: 0% to 13.5%, andMgO+CaO+SrO+BaO: 8% to 29.5%.5. The carrier substrate according to claim 1 , further comprising an adhesive layer arranged on the first glass substrate.6. A laminate comprising: the carrier substrate according to ; and a substrate arranged on the carrier substrate.7. The laminate according to claim 6 , wherein the substrate is a second glass ...

Method for Manufacturing Thin Film Transistor and Display Panel

In the present invention, a gate electrode is formed on a substrate surface, and an insulation film is formed on the substrate surface whereon the gate electrode has been formed. A first amorphous silicon layer is formed on the substrate surface whereon the insulation film has been formed. An energy beam is irradiated onto a plurality of required sites spaced from each other in the first amorphous silicon layer to transform each of the required sites into a polysilicon layer. Each of the required sites is situated on the upper side of the gate electrode and serves as a channel region between a source and a drain. This allows other sites, which are in the first amorphous silicon layer and related to the plurality of required sites, to also be irradiated by the energy beam and ablated so as to form at the other sites a cleared portion having a required shape. Thereafter, when a metal layer for the source electrode and the drain electrode is formed, the shape of the cleared portion, which is a recessed portion, is followed, thereby forming a depression in the metal layer. Consequently, the depression is used as an alignment mark, and the source electrode and the drain electrode are formed at appropriate positions on the upper side of the channel region. 17-. (cancelled)8. A method for manufacturing a thin film transistor , comprising the processes of:forming a gate electrode on a surface of a substrate;forming an insulation film on the surface of the substrate on which the gate electrode is formed;forming a first amorphous silicon layer on the surface of the substrate on which the insulation film is formed;annealing a required place in the first amorphous silicon layer by irradiating the required place with an energy beam to be changed to a polysilicon layer;during the annealing process, forming a removed part having a required shape at other place in association with the required place by irradiating the other place with the energy beam;forming a second amorphous ...

SEMICONDUCTOR DEVICE

A semiconductor device () includes a substrate (), a first TFT (), and a second TFT (). The first TFT includes a first semiconductor layer () that is supported by the substrate, a first gate electrode () that is formed on the first semiconductor layer and overlaps with the first semiconductor layer with a first gate insulating layer () interposed therebetween, a first insulating layer () that covers the first gate electrode, and a first source electrode () and a first drain electrode () that are formed on the first insulating layer and are connected to the first semiconductor layer. The second TFT includes a second gate electrode () that is supported by the substrate, a second semiconductor layer () that contains an oxide semiconductor and is formed overlapping with the second gate electrode with a second gate insulating layer () interposed therebetween, and a second source electrode () and a second drain electrode () that are formed between the second gate insulating layer and the second semiconductor layer. The first semiconductor layer and the second gate electrode are both formed from a same semiconductor film (). 1. A semiconductor device , comprising:a substrate;a first thin film transistor including a first semiconductor layer supported by the substrate, a first gate electrode formed on the first semiconductor layer so as to overlap the first semiconductor layer with a gate insulating layer therebetween, a first insulating layer covering the first gate electrode, and a first source electrode and a first drain electrode formed on the first insulating layer and connected to the first semiconductor layer; anda second thin film transistor including a second gate electrode supported by the substrate, a second semiconductor layer containing an oxide semiconductor and formed so as to overlap the second gate electrode with a second gate insulating layer therebetween, and a second source electrode and a second drain electrode formed between the second gate insulating ...

METHOD FOR MANUFACTURING ARRAY SUBSTRATE, ARRAY SUBSTRATE AND FINGERPRINT RECOGNITION DEVICE

A method for manufacturing an array substrate, an array substrate, and a fingerprint recognition device. The method includes: forming a plurality of polysilicon patterns on a substrate, the plurality of polysilicon patterns including a first polysilicon pattern for forming the PIN-type diode and a second polysilicon pattern for forming the transistor, each polysilicon pattern including a first sub-region, a second sub-region, and a third sub-region between the first sub-region and the second sub-region; using a first doping process to dope the first sub-region of the first polysilicon pattern and the first sub-region and the second sub-region of the second polysilicon pattern with one of P-type ions and N-type ions respectively; and using a second doping process to dope the second sub-region of the first polysilicon pattern with the other of P-type ions and N-type ions. 1. A method for manufacturing an array substrate comprising a plurality of target region groups , each target region groups comprising a PIN-type diode and a transistor , and the method for manufacturing the array substrate comprising steps of:forming a plurality of polysilicon patterns on a substrate, the plurality of polysilicon patterns comprising a first polysilicon pattern for forming the PIN-type diode and a second polysilicon pattern for forming the transistor, each polysilicon pattern comprising a first sub-region, a second sub-region, and a third sub-region between the first sub-region and the second sub-region;using a first doping process to dope the first sub-region of the first polysilicon pattern, and the first sub-region and the second sub-region of the second polysilicon pattern with one of P-type ions and N-type ions, respectively; andusing a second doping process to dope the second sub-region of the first polysilicon pattern with the other of the P-type ions and the N-type ions.2. The method according to claim 1 , wherein the transistor comprises a P-type transistor and an N-type ...

THIN-FILM TRANSISTOR DEVICE

A thin-film transistor device includes a gate electrode formed above a substrate, a gate insulating film formed on the gate electrode, a crystalline silicon thin film that is formed above the gate insulating film and has a channel region, an amorphous silicon thin film formed on the crystalline silicon thin film, and a source electrode and a drain electrode that are formed above the channel region, and the crystalline silicon thin film has a half-width of a Raman band corresponding to a phonon mode specific to the crystalline silicon thin film of 5.0 or more and less than 6.0 cm, and an average crystal grain size of about 50 nm or more and 300 nm or less. 1. A thin-film transistor device comprising:a gate electrode formed above a substrate;a gate insulating film formed on the gate electrode;a crystalline silicon thin film that is formed above the gate insulating film and has a channel region,a semiconductor film formed on the crystalline silicon thin film; anda source electrode and a drain electrode that are formed above the channel region,{'sup': −1', '−1, 'wherein the crystalline silicon thin film has a half-width of a Raman band corresponding to a phonon mode specific to the crystalline silicon thin film of 5.0 cmor more and less than 6.0 cm,'}the crystalline silicon thin film has an average crystal grain size of about 50 nm or more and 300 nm or less, andthe crystalline silicon thin film contains crystals that are predominantly oriented in (100) direction among (111) and (100) directions and have an orientation intensity in the (100) direction obtained by electron back-scatter diffraction of 5 or less.2. The thin-film transistor device according to claim 1 ,wherein a ratio of the half-width of the Raman band of the crystalline silicon thin film with respect to a half-width of a Raman band of monocrystalline silicon is 1.5 or more and 1.8 or less.3. The thin-film transistor device according to claim 1 ,{'sup': −1', '−1, 'wherein a difference between the half- ...

DISPLAY SUBSTRATE, FABRICATING METHOD THEREOF AND DISPLAY DEVICE

The present disclosure provides a display substrate, a fabricating method thereof, and a display device. The method includes forming a light shielding layer on a surface of a base substrate, and forming a plurality of thin film transistors on a side of the light shielding layer away from the base substrate. Forming a plurality of thin film transistors on a side of the light shielding layer away from the base substrate includes forming a semiconductor layer at a position where an active layer is to be formed in each of the plurality of thin film transistors, generating heat using the light shielding layer, and utilizing the heat to crystallize the semiconductor layer. 1. A method for fabricating a display substrate , comprising:forming a light shielding layer on a surface of a base substrate; andforming a plurality of thin film transistors on a side of the light shielding layer away from the base substrate,wherein forming the plurality of thin film transistors on the side of the light shielding layer away from the base substrate comprises:forming a semiconductor layer at a position where an active layer is to be formed in each of the plurality of thin film transistors;generating heat using the light shielding layer; andutilizing the heat to crystallize the semiconductor layer.2. The method according to claim 1 ,wherein a material of the light shielding layer comprises a conductive material, andwherein generating heat using the light shielding layer comprises energizing the light shielding layer.3. The method according to claim 2 ,wherein the light shielding layer comprises a plurality of sub-light shielding layers disposed at intervals,wherein the plurality of thin film transistors comprises a plurality of thin film transistor groups,wherein an orthographic projection of each of the plurality of sub-light shielding layers on the base substrate covers an orthographic projection of active layers in a corresponding thin film transistor group on the base substrate, ...

Display apparatus and method of manufacturing the same

A display apparatus and a method of manufacturing the same are provided. According to an embodiment, a display apparatus includes: a substrate; a thin-film transistor located on the substrate; and a buffer layer, a conductive layer, and an insulating layer sequentially located from the substrate between the substrate and the thin-film transistor, and a thickness of the insulating layer is less than a thickness of the buffer layer.

LOW TEMPERATURE POLY-SILICON THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND DISPLAY DEVICE

A low temperature poly-silicon thin film transistor and its manufacturing method, an array substrate and a display device are provided. The method comprises: forming a poly-silicon film on a base substrate () and patterning the poly-silicon film to form an active layer (); forming a gate insulation layer () on the active layer () and performing hydrogenation process to the gate insulation layer () and the active layer (). By this method, the diffusion distance of hydrogen is largely shortened, the time for the hydrogenation process is reduced, and thus the process cost for the thin film transistor is largely lowered down. 1. A method for manufacturing a low temperature poly-silicon thin film transistor comprising:forming a poly-silicon film on a base substrate and patterning the poly-silicon film to form an active layer; andforming a gate insulation layer on the active layer and performing hydrogenation process to the gate insulation layer and the active layer.2. The method for manufacturing a low temperature poly-silicon thin film transistor as claimed in claim 1 , wherein the hydrogenation process is performed to the gate insulation layer and the active layer by using nitrogen-hydrogen mixture plasma at a temperature condition of 260 to 400° C.3. The method for manufacturing a low temperature poly-silicon thin film transistor as claimed in claim 2 , wherein the nitrogen-hydrogen mixture plasma has a ratio of nitrogen to hydrogen of 1:1 to 1:10.4. The method for manufacturing a low temperature poly-silicon thin film transistor as claimed in claim 2 , wherein the nitrogen-hydrogen mixture plasma is ammonia plasma.5. The method for manufacturing a low temperature poly-silicon thin film transistor as claimed in claim 1 , wherein:in a plasma enhanced chemical vapor deposition apparatus, the gate insulation layer is deposited on the active layer; andthe deposited gate insulation layer is subjected from annealing process, and during the annealing process to the deposited ...

Method for manufacturing amoled backplane and structure thereof

The present invention provides method for manufacturing an AMOLED backplane and a structure thereof. The method uses a drain terminal of a drive TFT to serve as an anode of AMOLED the anode, so that compared to the prior art, the steps of forming a planarization layer and an anode layer are eliminated and also, the same half-tone masking operation is used to form a pixel definition layer and photo spacers, whereby the method for manufacturing the AMOLED backplane according to the present invention requires only six masking operations and saves three masking operations compared to the prior art, thereby effectively simplifying the manufacturing process, improving manufacturing efficiency, and saving cost. The present invention provides a structure of an AMOLED backplane, which has a simple structure, is easy to manufacture, and has a low cost.

Display device

A display device that is suitable for increasing in size is achieved. Three or more source lines are provided for each pixel column. Video signals having the same polarity are input to adjacent source lines during one frame period. Dot inversion driving is used to reduce a flicker, crosstalk, or the like.

THIN FILM TRANSISTOR AND A MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND A MANUFACTURING METHOD THEREOF, DISPLAY DEVICE

A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of the array substrate includes depositing an amorphous silicon thin film layer on a base substrate; performing a patterning process on the amorphous silicon thin film layer, so as to form a pattern with multiple small pores at a surface of the amorphous silicon thin film layer. With this method, when a laser annealing treatment of amorphous silicon is performed, the molten silicon after melting fills the space of small pores at a surface of the amorphous silicon thin film layer firstly, thereby avoiding forming a protruded grain boundary that is produced because the excess volume of polysilicon is squeezed. 1. A manufacturing method of an array substrate , comprisingdepositing an amorphous silicon thin film layer on a base substrate; andperforming a patterning process on the amorphous silicon thin film layer, so as to form a pattern with multiple small pores at a surface of the amorphous silicon thin film layer.2. The manufacturing method claimed as claim 1 , before the amorphous silicon thin film layer is deposited on the base substrate claim 1 , further comprising depositing a buffer layer on the base substrate.3. The manufacturing method claimed as claim 1 , after the patterning process is performed on the amorphous silicon thin film layer so as to form the pattern with multiple small pores at a surface of the amorphous silicon thin film layer claim 1 , further comprisingconducting a laser annealing treatment on the amorphous silicon thin film layer so as to form a polysilicon thin film layer.4. The manufacturing method claimed as claim 1 , wherein claim 1 ,a photoresist layer is coated on a surface of the amorphous silicon thin film layer, and exposure and development are conducted with respect to the photoresist layer, so that a fully-retained region and a fully-removed region that ...

METHOD OF MANUFACTURING A THIN FILM TRANSISTOR

A method of manufacturing a thin film transistor is provided, and includes: providing a substrate; depositing a buffer layer and patterning the buffer layer; sequentially depositing an insulation layer and a first metal layer, coating a photoresist on the first metal layer; metal etching the first metal layer; ashing the photoresist; metal etching the first metal layer of the lightly doped region; implanting ions to an active area; and removing the photoresist. 1. A method of manufacturing a thin film transistor , comprising:providing a substrate;depositing a buffer layer on the substrate and patterning the buffer layer, so as to form an active area of a thin film transistor;sequentially depositing an insulation layer and a first metal layer on the substrate;coating a photoresist on a gate region and a lightly doped region of the first metal layer, wherein the gate region and the lightly doped region are covered by a projection of the active area on the first metal layer;metal etching the first metal layer excluding the gate region and the lightly doped region for exposing the insulation layer;ashing the photoresist for exposing the lightly doped region of the first metal layer;metal etching the first metal layer at the lightly doped region for forming a metal half tone mask;implanting ions to the active area for forming a source region, a source lightly doped region, a channel region, a drain lightly doped region, and a drain region of the thin film transistor;removing the photoresist;depositing a media layer over the substrate, and forming a source through-hole and a drain through-hole on the media layer;depositing a second metal layer over the substrate, and patterning the second metal layer, so as to form a source and a drain of the thin film transistor through the source through-hole and the drain through-hole;depositing an organic planarization layer over the substrate, and forming a pixel electrode through-hole on the organic planarization layer; ...

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE PRODUCTION SYSTEM

A semiconductor device production system using a laser crystallization method is provided which can avoid forming grain boundaries in a channel formation region of a TFT, thereby preventing grain boundaries from lowering the mobility of the TFT greatly, from lowering ON current, and from increasing OFF current. Rectangular or stripe pattern depression and projection portions are formed on an insulating film. A semiconductor film is formed on the insulating film. The semiconductor film is irradiated with continuous wave laser light by running the laser light along the stripe pattern depression and projection portions of the insulating film or along the major or minor axis direction of the rectangle. Although continuous wave laser light is most preferred among laser light, it is also possible to use pulse oscillation laser light in irradiating the semiconductor film. 1an insulating film having a rectangular or stripe pattern depression portion and projection portion; anda thin film transistor having a channel formation region that is placed between center and edge of the depression portion of the insulating film,wherein the channel formation region extends along a longitudinal direction of the rectangular or stripe pattern depression portion and projection portion.. A semiconductor device comprising: The present invention relates to a semiconductor device constructed by a semiconductor film that has a crystal structure, and more specifically, to a semiconductor device using a thin film transistor whose active layer is formed of a crystalline semiconductor film obtained through crystal growth on an insulating surface. The present invention also relates to a semiconductor device product ion system using laser light.In recent years, techniques for forming TFTs on a substrate have made great advancements and applications of TFTs to active matrix type semiconductor display devices are being developed. In particular, TFTs formed of polycrystalline semiconductor films ( ...

POLISHING SLURRY FOR SILICON, METHOD OF POLISHING POLYSILICON AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR SUBSTRATE

A polishing slurry for silicon, a method of polishing polysilicon, and a method of manufacturing a thin film transistor substrate, the slurry including a polishing particle; a dispersing agent including an anionic polymer, a hydroxyl acid, or an amino acid; a stabilizing agent including an organic acid, the organic acid including a carboxyl group; a hydrophilic agent including a hydrophilic group and a hydrophobic group, and water, wherein the polishing particle is included in the polishing slurry in an amount of about 0.1% by weight to about 10% by weight, based on a total weight of the slurry, a weight ratio of the polishing particle and the dispersing agent is about 1:0.01 to about 1:0.2, a weight ratio of the polishing particle and the stabilizing agent is about 1:0.001 to about 1:0.1, and a weight ratio of the polishing particle and the hydrophilic agent is about 1:0.01 to about 1:3. 1. A polishing slurry for silicon , the polishing slurry comprising:a polishing particle;a dispersing agent including at least one selected from the group consisting of an anionic polymer, a hydroxyl acid, and an amino acid;a stabilizing agent including an organic acid, the organic acid including a carboxyl group;a hydrophilic agent including a hydrophilic group and a hydrophobic group, andwater, the polishing particle is included in the polishing slurry in an amount of about 0.1% by weight to about 10% by weight, based on a total weight of the polishing slurry,', 'a weight ratio of the polishing particle and the dispersing agent is about 1:0.01 to about 1:0.2,', 'a weight ratio of the polishing particle and the stabilizing agent is about 1:0.001 to about 1:0.1, and', 'a weight ratio of the polishing particle and the hydrophilic agent is about 1:0.01 to about 1:3., 'wherein2. The polishing slurry for silicon as claimed in claim 1 , wherein the polishing particle includes at least one selected from the group consisting of silica claim 1 , alumina claim 1 , ceria claim 1 , zirconia ...

TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, DISPLAY SUBSTRATE, AND DISPLAY APPARATUS

A transistor and a method for manufacturing the same, a display substrate, and a display apparatus are provided. The transistor may include: a substrate; an active region on the substrate and including a polycrystalline silicon region; an etch stop layer at a side of the polycrystalline silicon region distal to the substrate; and a first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both at a side of the etch stop layer distal to the substrate; the polycrystalline silicon region having a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; wherein an orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer. 1. A transistor , comprising:a substrate;an active region provided on the substrate and comprising a polycrystalline silicon region;an etch stop layer provided at a side of the polycrystalline silicon region distal to the substrate; anda first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both provided at a side of the etch stop layer distal to the substrate;wherein the polycrystalline silicon region has a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; andan orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer, and an orthographic projection, on the plane in which the lower surface of the etch stop layer lies, of at least one of the first side surface and the second side surface of the polycrystalline silicon region is located within the lower surface of the etch ...

THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME, DISPLAY SUBSTRATE AND METHOD OF FABRICATING THE SAME, DISPLAY DEVICE

The present application provides a thin film transistor (TFT) and a method of fabricating the same, a display substrate and a method of fabricating the same, and a display device. The TFT includes a substrate, and a source electrode, a drain electrode and an active layer on the substrate. The active layer includes first and second active layers, the first active layer has a carrier mobility greater than that of the second active layer, and the second active layer is closer to the source electrode and the drain electrode than the first active layer. An orthographic projection of the source electrode on the substrate and an orthographic projection of the drain electrode on the substrate at least partially overlap with an orthographic projection of the second active layer on the substrate, respectively, and the first active layer is separated from the source electrode and the drain electrode. 1. A thin film transistor (TFT) , comprising:a substrate; anda source electrode, a drain electrode and an active layer on the substrate,wherein the active layer comprises a first active layer and a second active layer, a carrier mobility of the first active layer is greater than a carrier mobility of the second active layer, and the second active layer is closer to the source electrode and the drain electrode than the first active layer, andan orthographic projection of the source electrode on the substrate and an orthographic projection of the drain electrode on the substrate at least partially overlap with an orthographic projection of the second active layer on the substrate, respectively, and the first active layer is separated from the source electrode and the drain electrode.2. The TFT of claim 1 , wherein the orthographic projections of the source electrode and the drain electrode on the substrate fall within the orthographic projection of the second active layer on the substrate.3. The TFT of claim 1 , further comprising an ohmic contact layer between the source electrode ...

Array substrate, liquid crystal display panel and method of manufacturing the array substrate

The present application discloses an array substrate, a liquid crystal display panel and method of manufacturing the array substrate, the array substrate includes a substrate, a gate electrode, a gate insulating layer and an active layer formed in stack subsequently; the active layer includes a source transfer portion and a drain transfer portion isolated from the source transfer portion and a channel integrally connected to the source transfer portion and the drain transfer portion, the contact resistance between the source transfer portion, the drain transfer portion and the channel is reduced, the interface defects in the channel is reduced, so that the on-state current is increased, and the off-state current is reduced through the source transfer portion and the drain transfer portion of the thin film transistor of the liquid crystal display panel, that is the on/off ratio is raised to improve the performance of the array substrate.

THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, ARRAY SUBSTRATE AND DISPLAY DEVICE

The present disclosure provides a thin film transistor, a method for manufacturing the same, an array substrate and a display device. The method for manufacturing a thin film transistor includes providing a substrate, forming a gate electrode, a gate insulating layer, an amorphous silicon material active layer and a cap layer on the substrate successively, wherein The cap layer is provided with a pattern on a side of the cap layer away from the amorphous silicon material active layer, and the pattern is composed of at least one groove along a length direction of the active layer and at least one groove along a width direction of the active layer, subjecting the amorphous silicon material active layer to laser annealing treatment to transform the amorphous silicon material active layer into a low temperature polycrystalline silicon material active layer, and removing the cap layer. 1. A method for manufacturing a thin film transistor , comprising:providing a substrate;forming a gate electrode, a gate insulating layer, an amorphous silicon material active layer and a cap layer on the substrate successively, wherein the cap layer is provided with a pattern on a side of the cap layer away from the amorphous silicon material active layer, and the pattern is composed of at least one groove along a length direction of the active layer and at least one groove along a width direction of the active layer;subjecting the amorphous silicon material active layer to laser annealing treatment to transform the amorphous silicon material active layer into a low temperature polycrystalline silicon material active layer; andremoving the cap layer.2. The method according to claim 1 , wherein the step of claim 1 , forming the gate electrode claim 1 , the gate insulating layer claim 1 , the amorphous silicon material active layer and the cap layer on the substrate successively comprises:forming the gate electrode on the substrate;forming the gate insulating layer on the gate electrode; ...

THIN-FILM DEVICE, THIN-FILM DEVICE ARRAY, AND METHOD OF MANUFACTURING THIN-FILM DEVICE

A thin-film device includes: a first device unit having a first gate electrode and a first crystalline silicon thin film located opposite to the first gate electrode; and a second device unit having a second gate electrode and a second crystalline silicon thin film located opposite to the second gate electrode. The first crystalline silicon thin film includes a strip-shaped first area and a second area smaller than the strip-shaped first area in average grain size. The first device unit has, as a channel, at least a part of the strip-shaped first area. The second silicon thin film includes a second crystalline area smaller than the strip-shaped first area in average grain size. The second device unit has the second crystalline area as a channel. The strip-shaped first area includes crystal grains in contact with the second area on each side of the strip-shaped first area. 126-. (canceled)27. A thin-film device comprising:a substrate; anda first device unit and a second device unit which are located above the substrate,the first device unit including:a first gate electrode formed above the substrate;a first gate insulating film covering the first gate electrode; anda first thin film located opposite to the first gate electrode with the first gate insulating film in between, andthe second device unit including:a second gate electrode located at a position different from a position where the first gate electrode is formed;a second gate insulating film covering the second gate electrode; anda second thin film located opposite to the second gate electrode with the second gate insulating film in between,wherein the first thin film includes a strip-shaped first area and a second area located on each widthwise side of the strip-shaped first area, the second area including crystal grains having an average grain size smaller than an average grain size of crystal grains included in the strip-shaped first area,the first device unit has a channel which is at least a part of the ...