Способ изготовления фотопреобразователя

Изобретение относится к технологии изготовления фотопреобразователя с повышенным коэффициентом полезного действия (КПД). Предложен способ изготовления фотопреобразователя путем формирования в pin-структуре i-слоя на основе арсенида индия InGaAs между слоями GaAs и AlGaAs на подложках GaAs, при давлении 4⋅10-10Па, температуре 600-800°С и скорости роста 2 Å/с. Изобретение обеспечивает повышение КПД преобразования, обеспечение технологичности, улучшение параметров, повышение качества и увеличение процента выхода годных. 1 табл.

СПОСОБ ВЫРАЩИВАНИЯ ГЕТЕРОСТРУКТУРЫ ДЛЯ ИНФРАКРАСНОГО ФОТОДЕТЕКТОРА

Изобретение относится к технологии выращивания полупроводниковых гетероструктур со множественными квантовыми ямами методом молекулярно-пучковой эпитаксии (МПЭ) и может быть использовано при изготовлении устройств на основе фотоприемных матриц с чувствительностью в глубоком инфракрасном диапазоне (8-12 мкм). Сущность изобретения: в способе выращивания гетероструктуры для инфракрасного фотодетектора, включающей подложку и вышележащие полупроводниковые слои - контактные и слои, образующие активную область, содержащую множество квантовых ям и барьеров, методом молекулярно-пучковой эпитаксии путем нагрева подложки в вакууме и попеременной подачи потоков реагентов в квантовые ямы и барьеры, а также легирующей примеси - Si в квантовые ямы, в квантовые ямы подают реагенты: Ga и As, а в квантовые барьеры - Al, Ga и As, в квантовые ямы дополнительно подают Аl в количестве, обеспечивающем его мольную долю в квантовой яме 0,02-0,10, при этом в процессе выращивания слоев, образующих активную область ...

Способ изготовления фотопреобразователя

Изобретение относится к полупроводниковой технике, а именно к способам изготовления трехкаскадных фотопреобразователей. Способ изготовления фотопреобразователя, согласно изобретению, включает формирование контактной металлизации на фронтальной и тыльной поверхностях многослойной полупроводниковой структуры Ga(In)As/GaInP/Ga(In)As/Ge, выращенной на германиевой подложке, вытравливание мезы, вжигание контактов, разделение полупроводниковой структуры на чипы дисковой резкой, удаление контактного слоя многослойной полупроводниковой структуры химико-динамическим травлением в водном растворе гидроокиси тетраметиламмония и перекиси водорода при количественном соотношении гидроокиси тетраметиламмония 0,3÷0,7 масс. %, перекиси водорода 6,5÷17,7 масс. %, воды 93,2÷81,6 масс. % и нанесение просветляющего покрытия. Изобретение обеспечивает повышение производительности операции химико-динамического травления контактного слоя за счет увеличения количества одновременно обрабатываемых полупроводниковых ...

СПОСОБ ИЗГОТОВЛЕНИЯ ДИОДОВ СРЕДНЕВОЛНОВОГО ИК ДИАПАЗОНА СПЕКТРА

Изобретение относится к оптоэлектронной технике. Способ изготовления диодов средневолнового ИК диапазона спектра включает выращивание на подложке из арсенида индия твердого раствора InAsSbPи разделенные р-n-переходом слои p- и n-типа проводимости, нанесение на поверхность гетероструктуры фоточувствительного материала, экспонирование через маску с системой темных и светлых полей, проявление, удаление по крайней мере части фоточувствительного материала, подложки и эпитаксиальной структуры при формировании мез(ы), подготовку поверхности для формирования омических контактов, напыление на поверхность слоев и/или подложки металлических композиций заданной геометрии, при этом согласно изобретению способ включает финальную стадию процесса удаления подложки или ее части при химическом травлении в водном растворе соляной кислоты. Изобретение обеспечивает увеличение эффективности работы диода средневолнового ИК диапазона спектра за счет улучшения условий для вывода/ввода излучения из полупроводникового ...

СПОСОБ ПОВЫШЕНИЯ КАЧЕСТВА ТУННЕЛЬНОГО ПЕРЕХОДА В СТРУКТУРЕ СОЛНЕЧНЫХ ЭЛЕМЕНТОВ

... 1. Способ формирования туннельного перехода (112) в структуре (100) солнечных элементов, содержащий попеременное осаждение вещества Группы III и вещества Группы V на указанной структуре (100) солнечных элементов.2. Способ по п. 1, отличающийся тем, что попеременное осаждение вещества Группы III и вещества Группы V дополнительно содержит:осаждение вещества Группы III на указанной структуре (100) солнечных элементов иосаждение вещества Группы V после осаждения указанного вещества Группы III.3. Способ по п. 1, дополнительно содержащий осаждение указанного вещества Группы III на первый солнечный элемент (108) указанной структуры (100) солнечных элементов.4. Способ по п. 3, дополнительно содержащий осаждение указанного вещества Группы V на первый солнечный элемент (108) указанной структуры (100) солнечных элементов.5. Способ по п. 1, дополнительно содержащий управление отношением при осаждении указанного вещества Группы III и указанного вещества Группы V.6. Способ по п. 1, отличающийся тем, ...

Stapelförmige Halbleiterstruktur

Stapelförmige Halbleiterstruktur (HL) aufweisend eine Anzahl N zueinander in Serie geschaltete Halbleiterdioden, wobei jede Halbleiterdiode (D1, D2, D3, D4, D5) einen p-n Übergang aufweist, und zwischen jeweils zwei aufeinanderfolgenden Halbleiterdioden (D1, D2, D3, D4, D5) eine Tunneldiode (T1, T2; T3, T4) ausgebildet ist, und die Halbleiterdioden (D1, D2, D3, D4, D5) und die Tunneldioden (T1, T2, T3, T4) zusammen monolithisch integriert sind, und gemeinsam einen Stapel (ST1) mit einer Oberseite und einer Unterseite ausbilden, und die Anzahl N der Halbleiterdiode (D1, D2, D3, D4, D5) größer gleich zwei ist, und bei einer Beleuchtung des Stapels (ST1) mit Licht (L) der Stapel (ST1) bei 300 K eine Quellenspannung (VQ1) von größer als 2 Volt aufweist, und von der Oberseite des ersten Stapels (ST1) hin zu der Unterseite des Stapels die Gesamtdicke der p und n -Absorptionsschichten einer Halbleiterdiode von der obersten Diode (D1) hin zu der untersten Diode (D3 - D5) zunimmt, und die Halbleiterdioden ...

HERSTELLUNGSVERFAHREN EINES ZUSAMMENGESETZTEN HALBLEITERS.

Cpd. semiconductor material is prepd. by (a) electrodepositing a layer of a first constituent element on a substrate; (b) electrodepositing a layer of a second constituent element on the first layer; and (c) heating in a reactive atmos. contg. another constituent element of the semiconductor material to interdiffuse and chemically react the constituent elements, producing the semiconductor material.

Mehrfachsolarzelle mit rückseitiger Germanium-Teilzelle und deren Verwendung

Die vorliegende Erfindung betrifft Mehrfachsolarzellen mit mindestens vier pn-Übergängen mit einer lichtabgewandten rückseitigen Germanium-Teilzelle und mindestens drei oberhalb der Germanium-Teilzelle angeordneten Teilzellen aus III-V Verbindungshalbleitern, wobei die Mehrfachsolarzellen mindestens eine metamorphe Pufferschicht und mindestens eine Waferbond-Verbindung aufweisen und alle Schichten, die oberhalb der Germanium-Teilzelle angeordnet sind, jeweils eine lichtabsorbierende Emitter- und/oder Basisschicht enthalten, die mindestens 20 % Indium, bezogen auf die Summe aller Atome der Gruppe III, enthalten. Weiterhin betrifft die vorliegende Erfindung die Verwendung dieser Mehrfachsolarzellen im Weltraum.

SILIZIUMWAFER MIT MONOLITHISCHEN OPTOELEKTRONISCHEN KOMPONENTEN

Laser power converter

Infrared detection device, infrared detection apparatus, and manufacturing method of infrared detection device

Nanowire-based solar cell structure

Integrated solar collectors using epitaxial lift off and cold weld bonded semiconductor solar cells

There is disclosed ultrahigh-efficiency single- and multi-junction thin-film solar cells. This disclosure is also directed to a substrate-damage-free epitaxial lift-off ("ELO") process that employs adhesive-free, reliable and lightweight cold-weld bonding to a substrate, such as bonding to plastic or metal foils shaped into compound parabolic metal foil concentrators. By combining low-cost solar cell production and ultrahigh- efficiency of solar intensity-concentrated thin-film solar cells on foil substrates shaped into an integrated collector, as described herein, both lower cost of the module as well as significant cost reductions in the infrastructure is achieved.

METHOD AND APPARATUS FOR ELECTROCHEMICAL PROCESSING

TILED SUBSTRATES FOR DEPOSITION AND EPITAXIAL LIFT OFF PROCESSES

Embodiments of the invention generally relate to epitaxial lift off (ELO) films and methods for producing such films. Embodiments provide a method to simultaneously and separately grow a plurality of ELO films or stacks on a common support substrate which is tiled with numerous epitaxial growth substrates or surfaces. Thereafter, the ELO films are removed from the epitaxial growth substrates by an etching step during an ELO process. The tiled growth substrate contains the epitaxial growth substrates disposed on the support substrate may be reused to grow further ELO films. In one embodiment, a tiled growth substrate is provided which includes two or more gallium arsenide growth substrates separately disposed on a support substrate having a coefficient of thermal expansion within a range from about 5 10-6 C-1 to about 9 10-6 C-1.

COMPOUND SEMICONDUCTOR WAFER AND PROCESS FOR PRODUCING THE SAME

A compound semiconductor wafer producing a crystalline InGaAs light receiving layer suitable for a near infrared sensor, comprising sandwiched between the InP substrate (11) and the InGaAs layer, an In~xAs~1-xP graded buffer layer (12a, 12b, 12c, 12d, 12e) consisting of a plurality of layers located above an InP substrate (11), and an In~yAs~1-yP buffer layer (13) located above the graded buffer layer, wherein the maximum PL emission intensity on the interfaces of respective graded buffer layers and the buffer layer is less than 3/10 of the maximum PL emission intensity of the buffer layer.

PREPARATION OF PHOTODIODES

METHOD OF PROCESSING AN EPITAXIAL WAFER OF INP

A method is provided herein for the fine processing of InP epitaxial wafers including As, In and P for producing laser diodes, light-emitting diodes or photodiodes. The InP epitaxial wafer is selectively covered with striped protection mask films. The parts of the wafer which are uncovered by the protection mask films are first etched by an etchant which forms normal-mesas or mountain-shaped stripes under the masks, to provide a first-etched wafer. Then, the first-etched wafer is again etched by a gas of thermally-dissolved AsCl3 until the stripes have rectangle sections with erect surfaces. Buried layers of InP then are grown on the eliminated parts of the wafer.

NANOWIRE-BASED SOLAR CELL STRUCTURE

Multijunction solar cells and forming method

A method of forming a multijunction solar cell comprising an upper subcell, a middle subcell, and a lower subcell comprising providing first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on said substrate having a first band gap; forming a second solar subcell over said first subcell having a second band gap smaller than said first band gap; and forming a grading interlayer over said second subcell having a third band gap larger than said second band gap forming a third solar subcell having a fourth band gap smaller than said second band gap such that said third subcell is lattice mis-matched with respect to said second subcell.

A metal back having a specific structure of reflectors

INSTALLATION AND METHOD FOR THE PRODUCTION OF SOLAR CELLS.

Multispectral with stacking of cells, and method photovoltaic component for realization

Selon ce procédé: (a) on produit une première cellule (1) comprenant un premier substrat (4), une première couche optiquement active (5) et, entre ce substrat et cette couche active, une couche mince soluble (12), (b) on produit une seconde cellule (2) comprenant un second substrat (8) et une seconde couche optiquement active (9), de nature différente de la première, (c) on dispose en vis-à-vis ces deux cellules de manière que les couches actives soient tournées l'une vers l'autre, (d) on réunit les deux cellules élémentaires par leurs couches actives au moyen d'une colle transparente (3), et (e) on dissout par voie chimique ou électrochimique le matériau de la couche soluble en laissant intacts les autres matériaux, de manière à séparer, sans le dissoudre, le premier substrat d'avec le reste de la structure.

다중접합 태양 전지 소자들의 제조

... 본 발명은, 제1 설계된 기판을 제공하는 단계; 제2 기판을 제공하는 단계; 제1 웨이퍼 구조를 얻기 위해 상기 제1 설계된 기판 상에 적어도 하나의 제1 태양전지층을 형성하는 단계; 제2 웨이퍼 구조를 얻기 위해 상기 제2 기판 상에 적어도 하나의 제2 태양전지층을 형성하는 단계; 상기 제1 웨이퍼 구조를 상기 제2 웨이퍼 구조에 결합시키는 단계; 상기 제1 설계된 기판을 분리하는 단계; 상기 제2 기판을 제거하는 단계; 및 제3 기판을 상기 적어도 하나의 제1 태양전지층에 결합시키는 단계;를 포함하는 다중접합 태양전지 소자를 제조하는 방법에 관한 것이다.

MULTIPLE STACK DEPOSITION FOR EPITAXIAL LIFT OFF

Photoreceptor element and method for producing same

Provided is a photoreceptor element with which fluctuations in photoreception sensitivity are controlled over the near infrared region from the short wavelength side including a wavelength of 1.3 m to the long wavelength side, and also provided is a method for producing the photoreceptor element. The photoreceptor element comprises a type-II multiquantum-well photoreception layer formed by repeatedly forming GaAsSb and InGaAs layers on an InP substrate, and has photoreception sensitivity in the near infrared region that includes wavelengths of 1.3 m and 2.0 m. The ratio of photoreception sensitivity at a wavelength of 1.3 m and the photoreception sensitivity at a wavelength of 2.0 m is 0.5 to 1.6.

RADIATION RECEPTOR, AND METHOD FOR THE PRODUCTION THEREOF

Disclosed is a radiation receptor (1) comprising a semiconductor body (2) that has a first active region (210) and a second active region (220) which are used for detecting radiation. The first active region (210) and the second active region (220) are located at a distance from each other in a vertical direction. A tunnel region (24) is arranged between the first active region (210) and the second active region (220). The tunnel region (24) is connected in an electrically conducting manner to a connecting surface (31) which is used for externally contacting the semiconductor body (2) in an electrical manner between the first active region (210) and the second active region (220). A method for producing a radiation receptor is also disclosed.

SOLAR CELL AND METHOD OF FABRICATION THEREOF

A solar cell and a method of fabricating solar cells The method includes a step of separating neighbor solar cells formed on a semiconductor wafer by scribing the wafer to form scribe lines on the wafer and applying a force at, or adjacent to, the scribed lines to separate the solar cells The scribing is effected on a cap layer covering a window layer of solar cells, thereby minimizing damage to the window layer and mitigating propagation of defects into p-n junctions formed in the solar cells ...

LAMINATED BODY FOR MANUFACTURING COMPOUND SEMICONDUCTOR SOLAR CELL, COMPOUND SEMICONDUCTOR SOLAR CELL, AND METHOD FOR MANUFACTURING COMPOUND SEMICONDUCTOR SOLAR CELL

In this laminated body for manufacturing a compound semiconductor solar cell, a first etching stop layer (103) and a semiconductor laminated body (10) including at least one pn junction are disposed in this order on a semiconductor substrate (100), the semiconductor laminated body (10) has a contact layer (104) at a position in contact with the first etching stop layer, and the first etching stop layer (103) and the contact layer (104) contain a same kind of group V element.

A METHOD OF AND APPARATUS FOR HARVESTING MAMMALIAN CELLS

A technique for harvesting mammalian cells from an artificial substrate using ultrasonic energy in the range of 5 to 20 joules/sq. cm., at an intensity in the range of 30 to 150 mW/sq. cm, and at a frequency in the range of 20 to 60 kHz.

Method of manufacturing photoreceiver

Disclosed is a method of manufacturing a photoreceiver, including sequentially laminating a buffer layer, a channel layer, a barrier layer, and a cap layer on a substrate; forming a mesa for HEMT and MSM PD by removing the buffer layer, the channel layer, the barrier layer, and the cap layer with the exception of a region corresponding to HEMT and MSM PD; forming a source electrode and a drain electrode of HEMT; removing the cap layer from a region corresponding to a gate electrode of HEMT and a Schottky electrode of MSM PD; forming the gate electrode of HEMT and the Schottky electrode of HEMT on the cap layer-removed region; and removing the cap layer, the barrier layer and the channel layer from a region corresponding to an optical waveguide, to expose the optical waveguide.

Method of making compound semiconductor photodetector

InGaAs photodiodes are produced on an epitaxial InP wafer having an InP substrate, epitaxially grown layers and an InGaAs light sensing layer. An insulating protection film of SixNy or SiOx with openings is selectively deposited on the epitaxial wafer. Compound semiconductor undercoats of a compound semiconductor with a narrower band gap than InP are grown on the InP window layers at the openings by utilizing the protection film as a mask. A p-type impurity from a solid source or a gas source is diffused through the undercoats and the epitaxial InP layer into the InGaAs sensing layer. Then, either p-electrodes are formed on the undercoats and the undercoats are etched by utilizing the p-electrodes as a mask, or the undercoats are shaped by selective etching in a form of p-electrodes and the p-electrodes are formed on the undercoats.

METHOD OF FABRICATING AN AVALANCHE PHOTODIODE EMPLOYING SINGLE DIFFUSION

An avalanche photodiode with a diffused junction and the method for its fabrication are disclosed. The method comprising forming, on a substrate, a first high-doped region and a low-doped region; performing selective area growth (SAG) with in-situ etchant on the low-doped region to grow a SAG structure; and diffusing through the SAG structure to form a second high-doped region in the low-doped region. 1. A method for fabricating an avalanche photodiode comprising:forming, on a substrate, a first high-doped region and a low-doped region;performing selective area growth (SAG) with in-situ etchant on the low-doped region to grow a SAG structure; anddiffusing through the SAG structure to form a second high-doped region in the low-doped region.248.-. (canceled)49. The method of claim 1 , wherein the in-situ etchant is selected from CBrCl claim 1 , CBr claim 1 , CCl claim 1 , CHI claim 1 , HCl claim 1 , CHCl claim 1 , PCl claim 1 , AsCl claim 1 , CHCl claim 1 , or CHCl;wherein the SAG epitaxy is performed in an MOCVD reactor at a growth temperature range of about 550° C. to about 600° C.;wherein the SAG is performed to grow SAG structures using materials that match a lattice of the substrate;{'sub': 2', '2, 'wherein the SAG structure has a thickness of about 150 nm to about 250 nm; and/or wherein the substrate is selected from Si, InP, GaAs, Ge, GaP, GaSb, InAs, SiC, AlO, GaN, or InGaAs.'}50. The method of claim 49 , wherein when the substrate is InP claim 49 , the materials used to perform SAG are selected from InP claim 49 , InGaAs claim 49 , or InGaAsP;wherein when the substrate is Si, the material used to perform SAG is Si; orwherein when the substrate is GaAs, the material used to perform SAG is GaAs.51. The method of claim 1 , wherein when the substrate is InP claim 1 , the absorption layer is formed from InGaAs or InGaAsP; optionally claim 1 , when the substrate is InP claim 1 , the absorption layer has a thickness of about 0.2 μm to about 3.0 μm.52. The method of ...

Light detecting device

A light detecting device includes a first conductivity type semiconductor substrate; an insulating semiconductor window layer disposed on the substrate; a concavity in a region of the window layer and penetrating through the window layer; successively disposed in the concavity, a first conductivity type lower cladding layer, a first conductivity type guide layer of a semiconductor material having a band gap energy smaller that the band gap energies of the lower cladding layer and the window layer, an undoped light absorption layer having a band gap energy smaller than that of the first conductivity type guide layer, and a second conductivity type guide layer having a composition approximately identical to that of the first conductivity type guide layer, edges of the first conductivity type guide layer, the light absorption layer, and the second conductivity type guide layer being exposed at a surface of the window layer; and a layer of an insulating material, covering the edges. The interface ...

Transparent GaAs photoelectric layer

Disclosed is a new type of transparent GaAs photo electric layer formed on an optical window made of a GaP single crystal substrate via an AlxGa(1-x)As buffer layer, in which a gradual-lattice-constant layer of quadruple AlxGa(1-x)PyAs(1-y) compound crystal is formed between the GaP single crystal substrate and the AlxGa(1-x)As buffer layer. The y content in the gradual-lattice-constant layer of quadruple AlxGa(1-x)PyAs(1-y) compound crystal changes from 1 to 0 as deposition of the gradual-lattice-constant layer of quadruple AlxGa(1-x)PyAs(1-y) compound crystal goes on while the x content can arbitrarily be selected in the range of 0 to 1.

Multijunction solar cell employing extended heterojunction and step graded antireflection structures and methods for constructing the same

Material and antireflection structure designs and methods of manufacturing are provided that produce efficient photovoltaic power conversion from single- and multijunction devices. Materials of different energy gap are combined in the depletion region of at least one of the semiconductor junctions. Higher energy gap layers are positioned to reduce the diode dark current and enhance the operating voltage by suppressing both carrier injections across the junction and recombination rates within the junction. Step-graded antireflection structures are placed above the active region of the device in order to increase the photocurrent.

Compound semiconductor solar cell and method of manufacturing the same

A compound semiconductor solar cell and a method of manufacturing the same are disclosed. The method for fabricating a compound semiconductor solar cell comprises forming a first mask layer on a front surface of a compound semiconductor layer of a second region which is a region other than a first region where the front electrode is to be formed; forming a seed metal layer on the front surface of the compound semiconductor layer of the first region and on the first mask layer of the second region; removing the seed metal layer over the first mask layer and the first mask layer; removing a part of the compound semiconductor layer of the second region from the front surface of the compound semiconductor layer by using the seed metal layer of the first region as a mask; forming a second mask layer on the compound semiconductor layer of the second region; forming an electrode metal layer on the seed metal layer not covered by the second mask layer; and removing the second mask layer.

METHOD FOR FABRICATING A HETEROJUNCTION SCHOTTKY GATE BIPOLAR TRANSISTOR

Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region. 1. A method for fabricating a transistor structure , the method comprising:performing a photolithography process to transfer a device pattern onto a semiconductor substrate, wherein the semiconductor substrate comprises a drift region and a lightly-doped/undoped region, and the lightly-doped/undoped region is lightly-doped and/or undoped;doping a collector region of the substrate;doping an emitter region of the substrate;forming a heterostructure, wherein the heterostructure forms a heterojunction with the lightly-doped/undoped region;forming a collector terminal, wherein the collector terminal is in contact with the collector region;forming a gate terminal, wherein the gate terminal is in contact with the heterostructure; andforming an emitter terminal, wherein the emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.2. The method according to claim 1 , wherein the drift region comprises an N− doped region.3. The method according to claim 1 , wherein the doping the collector region comprises performing P+ doping.4. The method according to ...

METHOD FOR MANUFACTURING MSM PHOTODETECTOR USING A HEMT STRUCTURE INCORPORATING A LOW-TEMPERATURE GROWN SEMICONDUCTOR

The present invention relates to the method for manufacturing an MSM photodetector using a HEMT structure incorporating a low-temperature grown semiconductor. The object of the present invention is to improve the speed characteristic of an MSM photodetector by using a HEMT structure incorporating a low-temperature grown semiconductor. The use of a HEMT structure incorporating a low-temperature grown semiconductor can reduce the number of holes reaching the metal electrode of MSM detectors, resulting in reduced hole current. As a result, the photocurrent response of the MSM detector using a HEMT structure incorporating a low-temperature grown semiconductor is dominated by electron current, resulting in a significant improvement in speed performance.

Multi-junction solar cell with dilute nitride sub-cell having graded doping

A lattice-matched solar cell having a dilute nitride-based sub-cell has exponential doping to thereby control current-carrying capacity of the solar cell. Specifically a solar cell with at least one dilute nitride sub-cell that has a variably doped base or emitter is disclosed. In one embodiment, a lattice matched multi junction solar cell has an upper sub-cell, a middle sub-cell and a lower dilute nitride sub-cell, the lower dilute nitride sub-cell having doping in the base and/or the emitter that is at least partially exponentially doped so as to improve its solar cell performance characteristics. In construction, the dilute nitride sub-cell may have the lowest bandgap and be lattice matched to a substrate, the middle cell typically has a higher bandgap than the dilute nitride sub-cell while it is lattice matched to the dilute nitride sub-cell. The upper sub-cell typically has the highest bandgap and is lattice matched to the adjacent sub-cell. In further embodiments, a multi junction ...

PHOTOVOLTAIC DEVICE

INTEGRATED SOLAR COLLECTORS USING EPITAXIAL LIFT OFF AND COLD WELD BONDED SEMICONDUCTOR SOLAR CELLS

Compound semiconductor photodetector and method of making same

Compound semiconductor photodetector and method of making same

InGaAs photodiodes are produced on an epitaxial InP wafer having an InP substrate (11), epitaxially grown layers and an InGaAs light sensing layer (13) by depositing a insulating protection film of SixNy or SiOx (15) with openings selectively on the epitaxial wafer, growing compound semiconductor undercoats (16) of a compound semiconductor with a narrower band gap than InP on the InP window layers (14) at the openings by utilizing the protection film as a mask diffusing a p-type impurity from a solid source or a gas source through the undercoats and the epitaxial InP layer (14) into the InGaAs sensing layer (13), either forming p-electrodes (19) on the undercoats and etching the undercoats by utilizing the p-electrodes as a mask or shaping the undercoats by selective etching in a form of p-electrodes and forming the p-electrodes on the undercoats. ...

MULTIJUNCTION SOLAR CELL AND ITS CURRENT MATCHING METHOD

PROBLEM TO BE SOLVED: To increase efficiency in a multijunction solar cell by adjusting the Al composition ratio of an (Al)InGaP cell in three multijunction solar cells of InGaP/InGaAs/Ge. SOLUTION: By the current matching method of the multijunction solar cell, the Al composition ratio of the AlInGaP material of a top cell should be adjusted when a photocurrent generated in the top cell and a middle cell is matched in the multijunction solar cell using a solar cell that is formed by the AlInGaP material and has pn junction; a solar cell that is lattice-matched to the top cell, is formed by an (In)GaAs(N) material, and has the pn junction; and a solar cell that is lattice-matched to the middle cell, is formed by a Ge material, and has the pn junction as the top cell, the middle cell, and a bottom cell, respectively. COPYRIGHT: (C)2005,JPO&NCIPI ...

СПОСОБ ПОВЫШЕНИЯ КАЧЕСТВА ТУННЕЛЬНОГО ПЕРЕХОДА В СТРУКТУРЕ СОЛНЕЧНЫХ ЭЛЕМЕНТОВ

Способ формирования туннельного перехода (112) в структуре (100) солнечных элементов, предусматривающий попеременное осаждение вещества Группы III и вещества Группы V на структуре (100) солнечных элементов и управление отношением при осаждении указанного вещества Группы III и указанного вещества Группы V. Также предложено фотоэлектрическое устройство, включающее подложку (102); первый солнечный элемент (108), расположенный над подложкой (102); контакт (116), расположенный над первым солнечным элементом (108); туннельный переход (112), образованный между первым солнечным элементом (108) и контактом (116), и в котором туннельный переход (112) изготовлен методом эпитаксии со стимулированной миграцией (МЕЕ); буферный слой (106), расположенный между указанной подложкой (102) и указанным первым солнечным элементом (108); и слой (104) зарождения, расположенный между указанным буферным слоем (106) и указанной подложкой (102). Изобретение обеспечивает улучшение качества материала туннельного перехода ...

ПРЕОБРАЗОВАТЕЛЬ МОЩНОСТИ ЛАЗЕРНОГО ИЗЛУЧЕНИЯ

Изобретение относится к устройствам для преобразования электромагнитной энергии в электрическую энергию Устройство преобразователя мощности лазерного излучения «ПМЛИ» для приема падающего электромагнитного излучения на длине волны примерно 1550 нм, содержащее подложку, содержащую InP; и активную область, содержащую n-легированный слой и p-легированный слой, причем эти n-легированный и p-легированный слои образованы из InGaAsP, согласованного по параметрам решетки с подложкой и выполненного с возможностью поглощать фотоны электромагнитного излучения с соответствующей длиной волны примерно 1550 нм, где x=0,948, 0,957, 0,965, 0,968, 0,972 или 0,976, а y=0,557, 0,553, 0,549, 0,547, 0,545 или 0,544 соответственно. Устройство ПМЛИ согласно изобретению может иметь увеличенный КПД для преобразования излучения на длине волны 1550 нм в электрическую энергию по сравнению с известными ПМЛИ. 6 н. и 17 з.п. ф-лы, 6 ил.

СПОСОБ ИЗГОТОВЛЕНИЯ ФОТОПРЕОБРАЗОВАТЕЛЯ С НАНОСТРУКТУРНЫМ ПРОСВЕТЛЯЮЩИМ ПОКРЫТИЕМ

Изобретение относится к солнечной энергетике, а именно к способам изготовления фотопреобразователей на трехкаскадных эпитаксиальных структурах GaInP/Ga(In)As/Ge, выращенных на германиевой подложке. Способ изготовления фотопреобразователя с наноструктурным просветляющим покрытием включает создание на германиевой подложке с выращенными эпитаксиальными слоями трехкаскадной структуры лицевого и тыльного контактов на основе серебра; выполнение меза-изоляции; отжиг контактов; вскрытие оптического окна травлением; нанесение просветляющего покрытия, содержащего слои ТiOи AlO, методом электронно-лучевого напыления; выполнение дисковой резки эпитаксиальной структуры; выпрямление фотопреобразователя посредством охлаждения в парах азота; после отжига контактов выпрямление посредством охлаждения в парах азота металлизированной подложки; выполнение дисковой резки эпитаксиальной структуры; далее осуществляют вскрытие оптического окна травлением; наносят просветляющее покрытие последовательным напылением ...

СПОСОБ ПОЛУЧЕНИЯ СВЕТОПОГЛОЩАЮЩЕГО СЛОЯ ТОНКОПЛЕНОЧНЫХ СОЛНЕЧНЫХ ЭЛЕМЕНТОВ ИЗ МЕДИ-ИНДИЯ-ГАЛЛИЯ-СЕРЫ-СЕЛЕНА

Способ получения светопоглощающего слоя тонкопленочного солнечного элемента из меди-индия-галлия-серы-селена (МИГСС) путем использования безвакуумного жидкофазного метода, включающего следующие стадии: (1) формирование устойчивых исходных растворов меди, индия, галлия, серы и селена путем растворения халькогенидов или галогенидов меди, индия, галлия и составляющих серы и селена в растворителе с сильными координационными группами, с последующим добавлением в раствор кондиционирующей добавки; при этом вышеупомянутые составляющие серы и селена выбираются из группы, состоящей из элементарной серы, элементарного селена, аминных или гидразиновых солей серы и селена; (2) получение смешанного раствора меди, индия, галлия, серы и селена путем смешивания исходных растворов, полученных на стадии (1), в соответствии со стехиометрическими соотношениями меди, индия и галлия в формуле Cu1-xIn1-yGaySe2-zSz в светопоглощающем слое тонкопленочного солнечного элемента на базе МИГСС вместе с избыточной серой ...

ПРЕОБРАЗОВАТЕЛЬ МОЩНОСТИ ЛАЗЕРНОГО ИЗЛУЧЕНИЯ

... 1. Устройство преобразователя мощности лазерного излучения "ПМЛИ" для приема падающего электромагнитного излучения на длине волны примерно 1550 нм, содержащее:подложку; иактивную область, содержащую n-легированный слой и p-легированный слой, причем эти n-легированный и p-легированный слои образованы из InGaAsP, упомянутая активная область выполнена с возможностью поглощать фотоны электромагнитного излучения с соответствующей длиной волны примерно 1550 нм;при этом InGaAsP по параметрам решетки согласован с подложкой.2. Устройство по п. 1, причем InGaAsP представляет собой InGaAsP, где x=0,948, 0,957, 0,965, 0,968, 0,972 или 0,976, и y=0,557, 0,553, 0,549, 0,547, 0,545 или 0,544 соответственно.3. Устройство по п. 1, причем подложка представляет собой InP.4. Устройство по п. 1, дополнительно содержащее отражающий элемент, настроенный отражать электромагнитное излучение на длине волны примерно 1550 нм.5. Устройство по п. 4, причем отражающий элемент является распределенным брэгговским отражателем ...

Schneller Photoleiter

Ein Photoleiter mit einem Schichtstapel mit einer für einen vorbestimmten Wellenlängenbereich photoleitenden Halbleiterschicht zwischen zwei Halbleitergrenzschichten mit einem größeren Bandabstand als die photoleitende Halbleiterschicht auf einem Substrat, wobei die Halbleitergrenzschichten tiefe Störstellen zum Einfangen und zur Rekombination von freien Ladungsträgers aus der photoleitenden Halbleiterschicht aufweisen, und zwei Elektroden, die mit der photoleitenden Halbleiterschicht verbunden sind, für einen lateralen Stromfluss zwischen den Elektroden durch die photoleitende Halbleiterschicht, wobei der Schichtstapel als Mesa-Struktur ausgebildet ist mit seitlicher Kontaktierung der photoleitenden Halbleiterschicht durch die Elektroden.

Laser Power Converter

A laser power converter (LPC) device for receiving incident electromagnetic radiation at a wavelength of about 1550nm, the device comprising: a substrate 60; and an active region 30 comprising an n-doped layer of Indium-Gallium-Arsenide-Phosphide (InGaAsP) 32 and a p-doped layer of InGaAsP 31, the active region being arranged to absorb photons of said incident electromagnetic radiation, there the InGaAsP is lattice matched to the substrate 60. The substrate 60 may comprise Indium Phosphide (InP). The LPC device may also comprise a Distributed Bragg Reflector (DBR) 50 which comprises alternating layers of a first and second material, wherein the first material may be the same material as the active region 30, InGaAsP and the second material may be the same as the substrate 60, InP. Also disclosed is an array of LPC devices, comprising a plurality of LPC devices as above and a plurality of connection means connecting said device together within the array. Also disclosed is a system comprising ...

PHOTO DETECTOR INTEGRATED CIRCUIT

A quantum well detector and its method of production

A quantum well detector in which the active detection region (2) occupies only a limited region of the device and in which a diffraction grating (5) with surface area greater than this region makes it possible to couple a greater luminous flux to it than that corresponding to the surface area of the region. Thus the sensitivity of the device is increased.

Radial P-N junction nanowire solar cells

A photovoltaic device comprising at least one nanowire structure fixed to a substrate, wherein each of the at least one nanowire structures comprise: a heavily doped p-type core 120 having a proximal end fixed to the substrate 110 and a distal end extending away from the substrate 110; and a n-type shell 130 around the p-type core 120. Also disclosed is a method of forming the above photovoltaic device comprising growing the above core 120 and shell 130 on the substrate 110. The p-type core 120 may be formed of GaAs and the n-type shell 130 may comprise AlxGa(1-x)As where x is less than or equal to 0.2. The n-type shell 130 may have a thickness of between 20nm and 50nm, preferably 30nm. The p-type core 120 may have a diameter greater than 300nm. The length of the at least one nanowire structure may be between 5µm and 7µm, preferably 6µm. The substrate 110 may comprise silicon, it may comprise a graphitic layer.

OPTICAL WAVEGUIDE INTEGRATED LIGHT RECEIVING ELEMENT AND METHOD FOR MANUFACTURING SAME

An optical waveguide integrated light receiving element is provided with an optical waveguide (105) which is disposed on the side of a second contact layer (102) opposite from the side on which a light absorption layer (103) is disposed, and which is optically coupled with the second contact layer (102) with the waveguide direction being parallel with the plane of the light absorption layer (103). The second contact layer (102) has a smaller area in plan view than the light absorption layer (103), and is disposed on the inside of the light absorption layer (103).

INTEGRATED SOLAR COLLECTORS USING EPITAXIAL LIFT OFF AND COLD WELD BONDED SEMICONDUCTOR SOLAR CELLS

There is disclosed ultrahigh-efficiency single- and multi-junction thin-film solar cells. This disclosure is also directed to a substrate-damage-free epitaxial lift-off ("ELO") process that employs adhesive-free, reliable and lightweight cold-weld bonding to a substrate, such as bonding to plastic or metal foils shaped into compound parabolic metal foil concentrators. By combining low-cost solar cell production and ultrahigh- efficiency of solar intensity-concentrated thin-film solar cells on foil substrates shaped into an integrated collector, as described herein, both lower cost of the module as well as significant cost reductions in the infrastructure is achieved.

METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT-RECEIVING ELEMENTS

A method for manufacturing semiconductor light-receiving elements comprising forming an epitaxial layer including a light-receiving layer composed of at least In, Ga, and As on an n-InP substrate by supplying at least In gas, Ga gas, and As gas to a surface of the n-InP substrate from one side of a container accommodating the n-InP substrate. A p-type layer is formed in the configuration of a floating island by thermally diffusing a p-type impurity into the light-receiving layer. Finally, the n-InP substrate on which the p-type layer has been formed is separated into semiconductor lightreceiving elements.

NANOPROVOLOChNYESOLNEChNYE ELEMENTS C RADIALNYMI p-n-PEREKhODAMI

Epitaxial wafer, light-receiving element, optical sensor device, and method for manufacturing epitaxial wafer and light-receiving element

Provided is an epitaxial wafer within which is a layer containing antimony, and which can be manufactured efficiently with reduced yield-decreasing surface defects, and with which the inclusion of impurities that cause a deterioration in performance can be prevented; also provided are a light-receiving element and the like. The manufacturing method is characterized in that it has a step wherein a layer containing antimony (Sb) is grown on a substrate (1) using an all-organometallic vapor deposition method, and steps wherein layers up to and including a window layer (5) which do not contain antimony are grown on the antimony-containing layer, and the growth that occurs subsequent to growth of the antimony-containing layer and until growth of the window layer is completed occurs at a temperature of 425-525 DEG C.

Monitoring photodetector for integrated photonic devices

A laser and detector integrated on corresponding epitaxial layers of a single chip cooperate with on-chip and/or external optics to couple light of a first wavelength emitted by the laser to a single external device such as an optical fiber and to simultaneously couple light of a different wavelength received from the external device to the detector to provide bidirectional photonic operation. Multiple lasers and detectors may be integrated on the chip to provide multiple bidirectional channels. A monitoring photodetector is fabricated in the detector epitaxy adjacent one end of the laser.

DETECTOR HAS WELL QUANTUM AND METHOD FOR REALIZATION

MANUFACTORING PROCESS OF PHOTODIODES WITH the INDIUM ANTIMONIDE

AUTOMATED ASSEMBLY AND MOUNTING SOLAR CELLS ON SPATIAL PANELS

METHOD FOR FORMING A PHOTODIODE LOW NOISE

Method for fabricating compound semiconductor solar cell

METHOD OF MANUFACTURING STRUCTURES OF LEDS OR SOLAR CELLS

TILED SUBSTRATES FOR DEPOSITION AND EPITAXIAL LIFT OFF PROCESSES

EPITAXIAL WAFER, LIGHT-RECEIVING ELEMENT, OPTICAL SENSOR DEVICE, AND METHOD FOR MANUFACTURING EPITAXIAL WAFER AND LIGHT-RECEIVING ELEMENT

PHOTODETECTOR AND METHOD FOR MANUFACTURING PHOTODETECTOR

A photodetector (1) is provided with an n-type InAs substrate (12); an n-type InAs buffer layer (14) formed on the n-type InAs substrate (12); an n-type InAs light absorbing layer (16) formed on the n-type InAs buffer layer (14); an InAsXPYSb1-X-Y cap layer (18) (X≥0, Y>0) formed on the n-type InAs light absorbing layer (16); a first inorganic insulating film (20) which is formed on the cap layer (18) and has an opening section (20h) in a deposition direction; a p-type impurity semiconductor layer (24) which is formed by diffusing a p-type impurity from the opening section (20h) of the first inorganic insulating film (20) and reaches an upper layer of the n-type InAs light absorbing layer (16) from the cap layer (18); and a second inorganic insulating film (22) formed on the first inorganic insulating film (20) and the p-type impurity semiconductor layer (24).

SILICON WAFER WITH EMBEDDED OPTOELECTRONIC MATERIAL FOR MONOLITHIC OEIC

A structure with an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the optoelectronic layer is completely surrounded by Si, the wafer is fully compatible with standard Si CMOS manufacturing. For wavelengths of light longer than the bandgap of Si (1.1 μm), Si is completely transparent and therefore optical signals can be transmitted between the embedded optoelectronic layer and an external waveguide using either normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling).

MULTIJUNCTION COMPOUND SEMICONDUCTOR SOLAR CELL

Disclosed is a multijunction compound semiconductor solar cell having a buffer layer between a first cell and a second cell. In the buffer layer, a plurality of semiconductor layers is arranged such that lattice constants thereof have larger values in order from the first cell side to the second cell side. Of the plurality of semiconductor layers, two layers having the largest difference in lattice constant among each two adjacent layers are disposed closer to the first cell than the center in the thickness direction of the buffer layer.

Heterojunction subcells in inverted metamorphic multijunction solar cells

Inverted metamorphic multijunction solar cells having a heterojunction middle subcell and a graded interlayer, and methods of making same, are disclosed herein. The present disclosure provides a method of manufacturing a solar cell using an MOCVD process, wherein the graded interlayer is composed of (InxGa1-x)y Al1-yAs, and is formed in the MOCVD reactor so that it is compositionally graded to lattice match the middle second subcell on one side and the lower third subcell on the other side, with the values for x and y computed and the composition of the graded interlayer determined so that as the layer is grown in the MOCVD reactor, the band gap of the graded interlayer remains constant at 1.5 eV throughout the thickness of the graded interlayer.

Manufacturing method for a planar photodiode with hetero-structure

In a method for manufacturing an avalanche photodiode with an epitaxial layer sequence on a carrier body, the carrier body is not the substrate for an epitaxy of the photodiode. One of the epitaxial layers is employed as a selectively etchable mask for generating a pn junction of the diode.

Process for forming HgCoTe alloys selectively by IR illumination

A HgCdTe film is produced on a CdTe substrate, by depositing HgTe on a CdTe substrate, and then illuminating the substrate from the underside with infrared light at a wavelength longer than the desired operating wavelength (band-gap-equivalent wavelength) of the device. Since CdTe is transparent in the infrared, the light will reach the HgTe/CdTe interface. Since HgTe is an absorber in the infrared, most of the infrared radiation will be absorbed near the interface, which will cause intense localized heating and thus accelerate the interdiffusion of HgTe and CdTe. This interdiffusion will have the effect of moving the interface away from the original location, and toward the film/air interface. Since the desired end-product HgCdTe composition will be transparent to the infrared radiation applied, the process is inherently self-limiting. By appropriately selecting the infrared wavelength applied, variously proportioned HgCdTe compositions may be obtained, so that the effective band gap of ...

Tandem solar cell with indium phosphide tunnel junction

A monolithic, tandem photovoltaic device is provided having an indium phosphide tunnel junction lattice-matched to adjoining subcells and having high peak current densities and low electrical resistance. A method is provided for relatively low-temperature epitaxial growth of a tunnel junction and a subcell over the tunnel junction at temperatures which leave intact the desirable characteristics of the tunnel junction.

Extreme Ultraviolet (EUV) Detectors Based Upon Aluminum Nitride (ALN) Wide Bandgap Semiconductors

Disclosed are detector devices and related methods. In an Al EUV detector a low temperature AlN layer is deposed above an AlN buffer layer. In one embodiment, the low temperature AlN layer is deposed at about 800° C. Pulsed NH3 is used when growing an AlN epilayer above the low temperature layer. Numerous embodiments are disclosed.

Semiconductor light receiving device in which optical and electric signal are propagated at matched velocities

A plurality of semiconductor devices are disposed in a line on the surface of a supporting substrate. Each semiconductor device is adapted to generate an electric signal depending on the intensity of incident light. Adjacent semiconductor devices are optically coupled by an interconnecting optical waveguide so that light can pass through the semiconductor device one by one in a direction from a first stage closest to an input end to a last stage. An electric signal transmission line is formed of a pair of conductors connected to the semiconductor devices so that the electric signal generated by the semiconductor devices can propagate. One conductor of the pair of conductors of the electric signal transmission line is formed so as to extend in the air above the supporting substrate between adjacent semiconductor devices.

Semiconductor laser device, and a method for producing a compound semiconductor device including the semiconductor laser device

Nitride semiconductor device with reduced polarization fields

A method for fabricating a light-emitting semiconductor device including a III-Nitride quantum well layer includes selecting a facet orientation of the quantum well layer to control a field strength of a piezoelectric field and/or a field strength of a spontaneous electric field in the quantum well layer, and growing the quantum well layer with the selected facet orientation. The facet orientation may be selected to reduce the magnitude of a piezoelectric field and/or the magnitude of a spontaneous electric field, for example. The facet orientation may also be selected to control or reduce the magnitude of the combined piezoelectric and spontaneous electric field strength.

COMPOUND-SEMICONDUCTOR PHOTOVOLTAIC CELL AND MANUFACTURING METHOD OF COMPOUND-SEMICONDUCTOR PHOTOVOLTAIC CELL

A compound-semiconductor photovoltaic cell includes a first photoelectric conversion cell, which includes an absorption layer made of a first compound-semiconductor material which lattice matches with gallium arsenide (GaAs) or germanium (Ge); and a window layer made of aluminum indium phosphide (AlInP (0 Подробнее

Multijunction solar cell and current-matching method

In an InGaP/InGaAs/Ge triple-junction solar cell, efficiency of a multijunction solar cell is improved by adjusting a ratio of an Al composition in an (Al)InGaP cell. According to a current-matching method in a multijunction solar cell, the ratio of the Al composition in an AlInGaP material for a top cell is adjusted in order to achieve matching between photocurrents generated in the top cell and a middle cell in the multijunction solar cell. Here, the multijunction solar cell uses as the top cell a solar cell-formed with the AlInGaP material and having a PN junction, uses as a middle cell a solar cell lattice-matched to the top cell, formed with an (In)GaAs(N) material and having a PN junction, and uses as a bottom cell a solar cell lattice-matched to the middle cell, formed with a Ge material and having a PN junction.

ACTIVE PHOTONIC DEVICE HAVING A DARLINGTON CONFIGURATION

An active photonic device having a Darlington configuration is disclosed. The active photonic device includes a substrate with a collector layer over the substrate. The collector layer includes an inner collector region and an outer collector region that substantially surrounds the inner collector region. A base layer resides over the collector layer. The base layer includes an inner base region and an outer base region that substantially surrounds and is spaced apart from the inner base region. An emitter layer resides over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. The emitter layer further includes an outer emitter region that is ring-shaped and resides over and extends substantially around the outer base region. A connector structure electrically couples the inner emitter region with the outer base region.

METHOD FOR FORMING MULTIJUNCTION METAMORPHIC SOLAR CELLS FOR SPACE APPLICATIONS

A method of manufacturing a multijunction solar cell including growing interconnected first and second discrete semiconductor regions disposed adjacent and parallel to each other in a single semiconductor body, including first top subcell, second (and possibly third) lattice matched middle subcells; a graded interlayer adjacent to the last middle solar subcell; and a bottom solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the last middle solar subcell; wherein the interconnected regions form at least a four junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor region and the bottom solar subcell in the second semiconductor region. 1. A method of fabricating a multijunction solar cell having a terminal of first polarity and a terminal of second polarity comprising: an upper first solar subcell composed of a semiconductor material having a first band gap, and including a top contact region on the top surface thereof;', 'a second solar subcell adjacent to said first solar subcell and composed of a semiconductor material having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell;', 'a third solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a third band gap smaller than the second band gap and being lattice matched with the second solar subcell;', 'a graded interlayer adjacent to said third solar subcell, said graded interlayer having a fourth band gap greater than said third band gap; and', 'a fourth solar subcell adjacent to said graded interlayer and composed of a semiconductor material having a fifth band gap smaller than the fourth band gap and being lattice mismatched with the third solar subcell, and including a first electrode on the top surface thereof, and a second electrode on the bottom surface thereof; wherein the graded interlayer is compositionally ...

PHOTODETECTOR AND METHOD FOR MANUFACTURING PHOTODETECTOR

A photodetector 1 according to an embodiment of the present invention includes: an n-type InAs substrate 12; an n-type InAs buffer layer 14 formed on the n-type InAs substrate 12; an n-type InAs light absorbing layer 16 formed on the n-type InAs buffer layer 14; an InAsxPYSb1-X-Y cap layer 18 (X≥0, Y>0) formed on the n-type InAs light absorbing layer 16; a first inorganic insulating film 20 formed on the cap layer 18, and having an opening portion 20h in a deposition direction; a p-type impurity semiconductor region 24 formed by diffusing a p-type impurity from the opening portion 20h of the first inorganic insulating film 20, and reaching from the cap layer 18 to an upper layer of the n-type InAs light absorbing layer 16; and a second inorganic insulating film 22 formed on the first inorganic insulating film 20 and on the p-type impurity semiconductor region 24.

RAPID PHOTOCONDUCTOR

An optoelectronic device doped to augment an optical power threshold for bandwidth collapse and a method of manufacturing therefor

An improved optoelectronic device and a method of manufacture therefor. The optoelectronic device includes a doped buffer layer (320) located over a substrate (310) having an optical window (315) formed therein and an absorber layer (330) located over the doped buffer layer (320). The optoelectronic device further includes a doped region (350) located over the absorber layer (330) and having a dopant tail (355) that extends substantially through the absorber layer (330), and the doped buffer layer (320) and the dopant tail (355) are doped to augment an optical power threshold for bandwidth collapse of the optoelectronic device.

MULTISPECTRAL PHOTOVOLTAIC COMPONENT WITH STACKED CELLS AND PROCESS FOR ITS PRODUCTION

The process consists in (a) producing a first cell (1) which comprises a first substrate (4), a first optically active layer (5) and, between said substrate and active layer, a soluble thin film (12); (b) producing a second cell (2) which comprises a second substrate (8) and an optically active second layer (9), different from the first; (c) disposing said two cells facing each other so that the active layers are turned towards one another; (d) joining the two elementary cells by their active layers by means of a transparent glue (3), and (e) chemically or electrochemically dissolving the soluble film material, leaving intact the other materials, so as to separate, without dissolving, the first substrate from the rest of the structure.

放射受光器およびその製造方法

... 放射の検出に使用される第1の活性領域210および第2の活性領域220を有する半導体ボディ2を備えている放射受光器1を開示する。第1の活性領域210および第2の活性領域220は、垂直方向に互いに隔置されている。第1の活性領域210と第2の活性領域220との間にはトンネル領域24が配置されている。トンネル領域24は接続面31に導電接続されており、接続面31は、第1の活性領域210と第2の活性領域220との間で半導体ボディ2に外部から電気的に接触する目的で使用される。さらに、放射受光器を製造する方法も開示する。 ...

受光素子アレイ及びエピタキシャルウェハ

СПОСОБ ИЗГОТОВЛЕНИЯ ДИОДОВ СРЕДНЕВОЛНОВОГО ИК ДИАПАЗОНА СПЕКТРА

Изобретение относится к оптоэлектронной технике, а именно к полупроводниковым приборам, предназначенным для детектирования и испускания инфракрасного (ИК) излучения при комнатной температуре. Способ изготовления диодов средневолнового ИК диапазона спектра согласно изобретению включает изготовление многослойной эпитаксиальной гетероструктуры, содержащей подложку из полупроводникового материала ABи разделенные p-n переходом p- и n-области, по крайней мере, одна из которых выполнена из полупроводникового материала с суммарным содержанием атомов индия и мышьяка не менее 40% и является оптически активной в рабочем диапазоне длин волн, подготовку поверхности для формирования омических контактов, нанесение на поверхность фоточувствительного материала, экспонирование через маску с системой темных и светлых полей, проявление, удаление, по крайней мере, части фоточувствительного материала, эпитаксиальной структуры и подложки, напыление в вакууме металлической композиции заданной геометрии, содержащей ...

СОЛНЕЧНЫЙ ЭЛЕМЕНТ С ЧЕТЫРЬМЯ ПЕРЕХОДАМИ ДЛЯ КОСМИЧЕСКИХ ПРИМЕНЕНИЙ

Многопереходный солнечный элемент, содержащий: подложку для выращивания; первый солнечный подэлемент, сформированный поверх или в подложке для выращивания; изменяющийся промежуточный слой, осажденный на первый солнечный подэлемент; и ряд слоев полупроводникового материала, осажденных поверх изменяющегося промежуточного слоя, содержащего множество солнечных подэлементов, включая второй солнечный подэлемент, расположенный поверх и рассогласованный по параметру решетки по отношению к подложке для выращивания и имеющий ширину запрещенной зоны в диапазоне 0,9-1,8 эВ, и по меньшей мере верхний солнечный подэлемент, расположенный поверх второго подэлемента и имеющий содержание алюминия более 30% мольной доли и ширину запрещенной зоны в диапазоне 2,0-2,20 эВ. Изобретение обеспечивает повышенную эффективность фотопреобразования в течение эксплуатационного срока службы фотоэлектрической системы электропитания, максимизацию КПД солнечного элемента в рабочих условиях. 2 н. и 8 з.п. ф-лы, 8 ил.

СПОСОБ ЭПИТАКСИАЛЬНОГО ВЫРАЩИВАНИЯ ГРАНИЦЫ РАЗДЕЛА МЕЖДУ МАТЕРИАЛАМИ ИЗ III-V ГРУПП КРЕМНИЕВОЙ ПЛАСТИНОЙ, ОБЕСПЕЧИВАЮЩЕЙ НЕЙТРАЛИЗАЦИЮ ОСТАТОЧНЫХ ДЕФОРМАЦИЙ

СОЛНЕЧНЫЙ ЭЛЕМЕНТ С ЧЕТЫРЬМЯ ПЕРЕХОДАМИ ДЛЯ КОСМИЧЕСКИХ ПРИМЕНЕНИЙ

ЛАВИННЫЙ ФОТОДИОД И СПОСОБ ЕГО ИЗГОТОВЛЕНИЯ

Изобретение может быть использовано в оптических системах связи, в системах измерения в качестве оптоэлектронного датчика, в том числе при регистрации одиночных фотонов в системах квантовой криптографии, в интегральной оптоэлектронике и системах тестирования интегральных схем, а также в других областях, предполагающих регистрацию оптического сигнала. Согласно изобретению предложена полупроводниковая гетероструктура для лавинного фотодиода, содержащая расположенные на подложке эпитаксиальные слои, включая верхний слой в составе по меньшей мере двух слоев-частей - с первой частью, предназначенной для формирования области лавинного умножения, и второй частью, предназначенной для формирования локальной области легирования цинком, выполненной из InP, при этом первая часть выполнена из InP и отделена от второй части промежуточной частью в виде эпитаксиального стоп-слоя, выполненного из кристаллического кремния (Si) с возможностью обеспечения электрической неактивности данного стоп-слоя в материале ...

METHOD OF MAKING GAINASP LAYERS FOR PHOTODETECTORS

FLUX FREE PHOTO-DETECTOR SOLDERING

Novel semiconductor and optoelectronic devices

A method for fabricating a light-emitting integrated device, comprises overlying three layers, wherein each of the three layers emits light at a different wavelength, and wherein the overlying comprises one of: performing an atomic species implantation, performing a laser lift-off, performing an etch-back, or chemical-mechanical polishing (CMP).

Solar cell

A solar cell of the present invention comprises a p-type semiconductor layer, an n-type semiconductor layer, and a superlattice semiconductor layer interposed between the p-type semiconductor layer and the n-type semiconductor layer, wherein the superlattice semiconductor layer has a superlattice structure in which barrier layers and quantum dot layers comprising quantum dots are stacked alternately and repeatedly, and is formed so that the bandgaps of the quantum dots are gradually widened with increasing distance from a side of the p-type semiconductor layer and decreasing distance to a side of the n-type semiconductor layer.

Method of Manufacturing a Printable Composition of a Liquid or Gel Suspension of Diodes

An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary method of making a liquid or gel suspension of diodes comprises: adding a viscosity modifier to a plurality of diodes in a first solvent; and mixing the plurality of diodes, the first solvent and the viscosity modifier to form the liquid or gel suspension of the plurality of diodes. Various exemplary diodes have a lateral dimension between about 10 to 50 microns and about 5 to 25 microns in height. Other embodiments may also include a plurality of substantially chemically inert particles having a range of sizes between about 10 to about 50 microns.

Inverted metamorphic multijunction solar cell with two metamorphic layers and homojunction top cell

A multijunction solar cell including an upper first solar subcell, and the base-emitter junction of the upper first solar subcell being a homojunction; a second solar subcell adjacent to said first solar subcell; a third solar subcell adjacent to said second solar subcell. A first graded interlayer is provided adjacent to said third solar subcell. A fourth solar subcell is provided adjacent to said first graded interlayer, said fourth subcell is lattice mismatched with respect to said third subcell. A second graded interlayer is provided adjacent to said fourth solar subcell; and a lower fifth solar subcell is provided adjacent to said second graded interlayer, said lower fifth subcell is lattice mismatched with respect to said fourth subcell.

Method of Forming Epitaxial Film

A method of growing an epitaxial film and transferring it to an assembly substrate is disclosed. The film growth and transfer are made using an epitaxy lateral overgrowth technique. The formed epitaxial film on an assembly substrate can be further processed to form devices such as solar cell, light emitting diode, and other devices and assembled into higher integration of desired applications.

Epitaxial lift off in inverted metamorphic multijunction solar cells

The present disclosure provides a process for manufacturing a solar cell by selectively freeing an epitaxial layer from a single crystal substrate upon which it was grown. In some embodiments the process includes, among other things, providing a first substrate; depositing a separation layer on said first substrate; depositing on said separation layer a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a flexible support on top of the sequence of layers; etching said separation layer while applying an agitating action to the etchant solution so as to remove said flexible support with said epitaxial layer from said first substrate.

Light-receiving device, light receiver using same, and method of fabricating light-receiving device

An apparatus includes a flip-chip semiconductor substrate, a light detection element configured to be formed over the flip-chip semiconductor substrate and to have a laminate structure including a first semiconductor layer of a first-conductive-type, a light-absorption layer formed over the first semiconductor layer, and a second semiconductor layer of a second-conductive-type formed over the light-absorption layer, an inductor configured to be connected to the light detection element over the flip-chip semiconductor substrate, an output electrode for bump connection configured to output a current generated by the light detection element through the inductor, a bias electrode for bump connection configured to apply a bias voltage to the light detection element through a bias electrode, and a line configured to cause a metal line of the inductor and the light detection element to be connected to the output electrode or the bias electrode.

Use of freestanding nitride veneers in semiconductor devices

Thin freestanding nitride veneers can be used for the fabrication of semiconductor devices. These veneers are typically less than 100 microns thick. The use of thin veneers also eliminates the need for subsequent wafer thinning for improved thermal performance and 3D packaging.

Gallium arsenide solar cell with germanium/palladium contact

A method of forming a solar cell including: providing a semiconductor body including at least one photoactive junction; forming a semiconductor contact layer composed of GaAs deposited over the semiconductor body; and depositing a metal contact layer including a germanium layer and a palladium layer over the semiconductor contact layer so that the specific contact resistance is less than 5×10 −4 ohms-cm 2 .

Inverted metamorphic multijunction solar cell with gradation in doping in the window layer

A multijunction solar cell including a window layer with a gradation in doping; an upper first solar subcell having a first band gap adjacent to the window layer; a second solar subcell adjacent to said first solar subcell; a first graded interlayer adjacent to said second solar subcell, said first graded interlayer having a third band gap greater than said second band gap; a third solar subcell adjacent to said first graded interlayer; a second interlayer adjacent to said third solar subcell, said second graded interlayer having a fifth band gap greater than said fourth band gap; a fourth solar subcell adjacent to said second graded interlayer, such that said fourth subcell is lattice mismatched with respect to said third subcell.

NANONEEDLE PLASMONIC PHOTODETECTORS AND SOLAR CELLS

The present disclosure provides a method for a catalyst-free growth mode of defect-free Gallium Arsenide (GaAs)-based nanoneedles on silicon (Si) substrates with a complementary metal-oxide-semiconductor (CMOS)-compatible growth temperature of around 400° C. Each nanoneedle has a sharp 2 to 5 nanometer (nm) tip, a 600 nm wide base and a 4 micrometer (μm) length. Thus, the disclosed nanoneedles are substantially hexagonal needle-like crystal structures that assume a 6° to 9° tapered shape. The 600 nm wide base allows the typical micro-fabrication processes, such as optical lithography, to be applied. Therefore, nanoneedles are an ideal platform for the integration of optoelectronic devices on Si substrates. A nanoneedle avalanche photodiode (APD) grown on silicon is presented in this disclosure as a device application example. The APD attains a high current gain of 265 with only 8V bias. 1. A method of making a photodetector device comprising:providing a wafer having a substrate onto which a nanostructure is to be grown;cleaning contaminates from the wafer;annealing the wafer;growing a nanostructure core onto the substrate of the wafer;growing a shell over the nanostructure core;depositing a metal film onto a side of a top portion of the shell;etching away a portion of the shell not having the metal film;applying an insulating layer over the nanostructure core;depositing a top metal contact over the metal film and the insulating layer; anddepositing a bottom metal contact on the substrate.2. The method of wherein the substrate is made of gallium arsenide (GaAs).3. The method of further including a deoxidizing step.4. The method of wherein the substrate is either gallium arsenide (GaAs) or silicon (Si).5. The method of claim 4 , further including a step of mechanically treating the substrate to initiate surface roughness in order to catalyze a three-dimensional island growth.6. The method of wherein the annealing of the wafer takes place within a temperature range of ...

Photodetector, epitaxial wafer and method for producing the same

Provided are a photodetector in which, in a III-V semiconductor having sensitivity in the near-infrared region to the far-infrared region, the carrier concentration can be controlled with high accuracy; an epitaxial wafer serving as a material of the photodetector; and a method for producing the epitaxial wafer. Included are a substrate formed of a III-V compound semiconductor; an absorption layer configured to absorb light; a window layer having a larger bandgap energy than the absorption layer; and a p-n junction positioned at least in the absorption layer, wherein the window layer has a surface having a root-mean-square surface roughness of 10 nm or more and 40 nm or less.

Photovoltaic cell and manufacturing method thereof

A photovoltaic cell comprises a top subcell having a first band gap; a middle subcell comprising a substrate and having a second band gap, wherein the substrate comprises a first side and a second side opposite to the first side; and a bottom subcell having a third band gap, wherein the top subcell is grown on the first side of the substrate and the bottom subcell is grown on the second side of the substrate, wherein the first band gap is larger than the second band gap and the second band gap is larger than the third band gap.

PHOTOVOLTAIC DEVICE

A multijunction photovoltaic device () is provided. The multijunction photovoltaic device () includes a substrate () and one or more intermediate sub-cells (-) coupled to the substrate (). The multijunction photovoltaic device () further includes a top sub-cell () comprising an AlInP alloy coupled to the one or more intermediate sub-cells (-) and lattice mismatched to the substrate (). 1. A multijunction photovoltaic device , comprising:a substrate;one or more intermediate sub-cells coupled to the substrate; and{'sub': x', '1-x, 'a top sub-cell comprising an AlInP alloy coupled to the one or more intermediate sub-cells and lattice mismatched to the substrate.'}2. The multijunction photovoltaic device of claim 1 , wherein the one or more intermediate sub-cells are lattice-mismatched to the substrate and the top sub-cell is lattice matched to the one or more intermediate sub-cells.3. The multijunction photovoltaic device of claim 1 , further comprising a transitional buffer layer positioned between the substrate and the one or more intermediate sub-cells.4. The multijunction photovoltaic device of claim 1 , wherein each of the one or more intermediate sub-cells comprises a bandgap lower than the bandgap of the AlInP top sub-cell.5. The multijunction photovoltaic device of claim 3 , wherein the AlInP top sub-cell has a bandgap greater than 1.75 eV.6. The multijunction photovoltaic device of claim 1 , further comprising a bottom sub-cell comprising an alloy including germanium or gallium arsenide positioned between the substrate and the one or more intermediate sub-cells.7. The multijunction photovoltaic device of claim 6 , further comprising a transitional buffer layer positioned between the bottom sub-cell and the one or more intermediate sub-cells and wherein the bottom sub-cell is lattice-matched to the substrate and lattice mismatched to the one or more intermediate sub-cells.8. A single junction photovoltaic device claim 6 , comprising:a substrate;a transitional ...

TRITIUM DIRECT CONVERSION SEMICONDUCTOR DEVICE HAVING INCREASED ACTIVE AREA

A betavoltaic power source. The betavoltaic power source comprises a source of beta particles, a substrate with shaped features defined therein and a InGaP betavoltaic junction disposed between the source of beta particles and the substrate, and also having shaped features therein responsive to the shaped features in the substrate, the InGaP betavoltaic junction device for collecting the beta particles and for generating electron hole pairs responsive thereto. 1. A betavoltaic power source comprisinga source of beta particles;a substrate with shaped features defined therein;a InGaP betavoltaic junction disposed between the source of beta particles and the substrate, and also having shaped features therein responsive to the shaped features in the substrate, the InGaP betavoltaic junction device for collecting the beta particles and for generating electron hole pairs responsive thereto.2. The power source of wherein the shaped features comprise an array of one or more of trenches and pillars.3. The power source of wherein the substrate comprises a GaAs substrate having an orientation of (100) and surfaces of the shaped features having an orientation of (100) claim 1 , (010) claim 1 , or (001).4. The power source of wherein the substrate comprises a gallium-arsenide substrate claim 1 , a geranium substrate or a silicon substrate.5. The power source of wherein the shaped features in the substrate expose crystallographically identical planes on which the InGaP betavoltaic junction is formed.6. The power source of wherein the InGaP betavoltaic junction comprises a GaAs cap layer claim 1 , a InAlP window layer claim 1 , an InGaP emitter layer claim 1 , an intrinsic layer claim 1 , a base layer claim 1 , and a minority carrier reflector layer.7. The power source of wherein trenches are formed in the GaAs cap layer claim 6 , the InAlP window layer claim 6 , the InGaP emitter layer claim 6 , the intrinsic layer claim 6 , the base layer claim 6 , and the minority carrier ...

LIGHT RECEIVING DEVICE, METHOD FOR FABRICATING LIGHT RECEIVING DEVICE

A method for fabricating a light receiving device includes: preparing a first substrate product which includes a semiconductor region having a common semiconductor layer, a first semiconductor laminate for a photodiode, a second semiconductor laminate for a waveguide, and a butt-joint between the first semiconductor laminate and the second semiconductor laminate, the first laminate and the second semiconductor laminate being disposed on the common semiconductor layer; etching the first substrate product with a first mask to form a second substrate product having a photodiode mesa structure produced from the first semiconductor laminate and a preliminary mesa structure produced from the second semiconductor laminate; etching the second substrate product with the first mask and a second mask, formed on the photodiode mesa structure; to produce a waveguide mesa structure from the preliminary mesa structure, and the waveguide mesa structure having a height larger than that of the preliminary mesa structure. 1. A method for fabricating a light receiving device comprising:preparing a first substrate product including a semiconductor base and a semiconductor region on the semiconductor base, the semiconductor region having a common semiconductor layer, a first semiconductor laminate for a photodiode structure, a second semiconductor laminate for a waveguide structure, and a butt-joint between the first semiconductor laminate and the second semiconductor laminate, and the first semiconductor laminate and the second semiconductor laminate being disposed on the common semiconductor layer;forming a first mask on the first substrate product, the first mask having a pattern on the first semiconductor laminate and the second semiconductor laminate, and the pattern of the first mask extending across the butt-joint;etching the first substrate product with the first mask and an etching gas to form a second substrate product, the second substrate product having a photodiode mesa ...

SYNAPTIC ELECTRONIC DEVICES WITH ELECTROCHROMIC DEVICE

A synaptic electronic device includes a substrate including a one or more of a semiconductor and an insulator; a photosensitive layer disposed on a surface of the substrate; an electrochromic stack disposed on the photosensitive layer, the electrochromic stack including a first transparent electrode layer, a cathodic electrochromic layer, a solid electrolyte layer, an anodic electrochromic layer, and a second transparent electrode layer; and a pair of electrodes disposed on the photosensitive layer and on opposing sides of the electrochromic stack. 1. A synaptic electronic device , comprising:a substrate comprising one or more of a semiconductor and an insulator;an electrochromic stack disposed on a surface of the substrate, the electrochromic stack comprises a first transparent electrode layer, a cathodic electrochromic layer, a solid electrolyte layer, an anodic electrochromic layer, and a second transparent electrode layer;a photosensitive layer disposed on the electrochromic stack; anda pair of electrodes disposed on and at opposing end of the photosensitive layer.2. The synaptic electronic device of claim 1 , further comprising a passivation layer on the photosensitive layer.3. The synaptic electronic device of claim 2 , wherein the passivation layer is arranged between electrodes of the pair of electrodes.4. The synaptic electronic device of claim 1 , wherein the first transparent electrode layer comprises indium tin oxide.5. The synaptic electronic device of claim 1 , wherein the second transparent electrode layer comprises indium tin oxide.6. The synaptic electronic device of claim 1 , wherein the first transparent electrode layer comprises graphene.7. The synaptic electronic device of claim 1 , wherein the second transparent electrode layer comprises graphene.8. The synaptic electronic device of claim 1 , wherein the solid electrolyte layer comprises zirconium oxide.9. The synaptic electronic device of claim 1 , wherein the anodic electrochromic layer ...

HIGHLY DOPED LAYER FOR TUNNEL JUNCTIONS IN SOLAR CELLS

A highly doped layer for interconnecting tunnel junctions in multijunction solar cells is presented. The highly doped layer is a delta-doped layer in one or both layers of a tunnel diode junction used to connect two or more p-on-n or n-on-p solar cells in a multijunction solar cell. A delta-doped layer is made by interrupting the epitaxial growth of one of the layers of the tunnel diode, depositing a delta dopant at a concentration substantially greater than the concentration used in growing the layer of the tunnel diode, and then continuing to epitaxially grow the remaining tunnel diode. 1. A multijunction solar cell , comprising: a first layer of a highly doped p or n type semiconductor material directly adjacent the first solar cell;', 'a second layer of a complementary highly doped p or n type semiconductor material to that of the first layer; and', 'a delta-doped layer having a similar p or n type doping to that of the first layer positioned between and directly adjacent to the first layer and the second layer opposite of the first solar cell and the first solar cell, or displaced within the first layer more proximate the second layer than the first solar cell, or displaced within the second layer more proximate the first layer than the second solar cell;, 'an interconnecting tunnel junction positioned between a first solar cell and a second solar cell, the interconnecting tunnel junction comprisingwherein the first layer and the second layer adjoin to form a reversed biased junction;{'sup': 17', '−3', '19', '−3, 'wherein the delta-doped layer is thinner than the first layer and thinner than the second layer, and has a dopant concentration higher than the highly doped, dopant concentration of the first layer and the second layer, the highly doped, dopant concentration being in a range greater than 1×10cmto less than 1×10cm.'}2. The multijunction solar cell of claim 1 , further comprising a substrate directly adjacent the first solar cell or the second solar ...

MULTIJUNCTION SOLAR CELL ASSEMBLY FOR SPACE APPLICATIONS

A multijunction solar cell assembly and its method of manufacture including first and second discrete and different semiconductor solar cells which are electrically interconnected to form a four or five junction solar cell assembly. 1. A solar cell assembly including a terminal of first polarity and a terminal of second polarity comprising:a first discrete solar cell including a top contact connected to the terminal of first polarity, and a bottom contact;a second discrete solar cell disposed spaced apart from, mounted adjacent to, and with respect to the incoming illumination parallel to the first solar cell, the second discrete solar cell including a tandem vertical stack of at least a first upper solar subcell, a second solar subcell, and a third bottom solar subcell;wherein the first upper subcell of the second solar cell having a top contact connected to the terminal of first polarity;wherein the third bottom subcell of the second solar cell having a top contact and a bottom contact, the bottom contact being connected to the terminal of second polarity; andwherein the bottom contact of the first solar cell is connected in a series electrical circuit with the top contact of the third solar subcell of the second discrete solar cell so that the electrical interconnection of the first and second discrete solar cells forms the solar cell assembly with said terminals of first polarity and second polarity.2. A solar cell assembly as defined in claim 1 , wherein the upper first solar subcell of the second solar cell is composed of aluminium indium gallium phosphide (AlInGaP); the second solar subcell is disposed adjacent to and lattice matched to said upper first solar subcell claim 1 , and is composed of aluminum gallium arsenide (AlGaAs) or gallium arsenide (GaAs) claim 1 , and the third bottom solar subcell is lattice matched to said second solar subcell and is composed of germanium (Ge).3. An assembly as defined in claim 1 , wherein the second solar cell further ...

Photoconductive antenna, terahertz wave generating device, camera, imaging device, and measuring device

A photoconductive antenna includes a semiconductor layer, and first and second electrodes. The semiconductor layer includes a first conductive region and a second conductive region constituting portions of a surface of the semiconductor layer disposed on a side to which the pulsed light is irradiated, and a third conductive region disposed between the first and second conductive regions. The first conductive region contains a first conductive type impurity and the second conductive region contains a second conductive type impurity. The third conductive region has a carrier density lower than a carrier density of the first conductive region or a carrier density of the second conductive region. The first electrode and the second electrode are disposed on the side to which the pulsed light is irradiated. The third conductive region is configured and arranged to be irradiated by the pulsed light.

Inverted metamorphic multijunction solar cell with metamorphic layers

A multijunction solar cell having at least four solar subcells includes a first solar subcell having a first band gap, and a first graded interlayer adjacent to the first solar subcell, wherein the first graded interlayer has a second band gap greater than the first band gap and that is constant at 1.5 eV throughout the thickness of the first graded interlayer. A second solar subcell is adjacent to the first graded interlayer, wherein the second solar subcell has a third band gap smaller than the first band gap of the first solar subcell and wherein said second solar subcell is lattice mismatched with respect to the first solar subcell. A second graded interlayer is adjacent to the second solar subcell, wherein the second graded interlayer has a fourth band gap greater than the third band gap of the second solar subcell and that is constant at 1.1 eV throughout the thickness of the second graded interlayer. A third solar subcell is adjacent to the second graded interlayer, wherein the third solar subcell has a fifth band gap smaller than the third band gap of the second solar subcell and wherein the third solar subcell is lattice mismatched with respect to the second solar subcell. Each of the first and second graded interlayers is composed, respectively, of a compositionally step-graded series of (In x Ga 1-x ) y Al 1-y As layers with monotonically changing lattice constant, with x and y having respective values such that the band gap of each interlayer remains constant throughout its thickness, and wherein 0<x<1 and 0<y<1.

SOLAR CELL WITH DELTA DOPING LAYER

A solar cell including a base region, a back surface field layer and a delta doping layer positioned between the base region and the back surface field layer. 1. A method for forming a solar cell comprising the steps of:growing a back surface field layer on a substrate;delta doping said back surface field layer to form a delta doping layer; andgrowing an additional layer over said delta doping layer.2. The method of wherein said step of growing said back surface field layer comprise growing by epitaxy.3. The method of wherein said epitaxy comprises at least one of molecular beam epitaxy claim 1 , metalorganic vapor-phase epitaxy and chemical vapor-phase epitaxy.4. The method of wherein said back surface field layer comprises AlGaAs or AlGaInP.5. The method of wherein said delta doping layer comprises at least one of carbon claim 4 , silicon claim 4 , germanium claim 4 , tin and lead.6. The method of wherein said delta doping layer has an average layer thickness of at least 1 nanometer.7. The method of wherein said delta doping layer has an average layer thickness raging from about 5 nanometers to about 15 nanometers.8. The method of wherein said delta doping layer comprises dopant at a concentration of at least 1×10atoms per cm.9. The method of wherein said delta doping layer comprises dopant at a concentration of at least 1×10atoms per cm.10. The method of wherein said delta doping layer comprises dopant at a concentration of at least 1×10atoms per cm.11. The method of further comprising the step of applying a buffer to said substrate prior to said step of growing said back surface field layer.12. The method of wherein said additional layer is a second back surface field layer.13. The method of wherein said second back surface field layer is grown in direct contact with said delta doping layer.14. The method of wherein said additional layer is a base region.15. The method of wherein said step of growing said additional layer comprise growing by epitaxy.16. The ...

AVALANCHE PHOTODIODE TYPE STRUCTURE AND METHOD OF FABRICATING SUCH A STRUCTURE

A structure of the avalanche photodiode type includes a first P doped semiconducting zone, a second multiplication semiconducting zone adapted to supply a multiplication that is preponderant for electrons, a fourth P doped semiconducting “collection” zone. One of the first and second semiconducting zones forms the absorption zone. The structure also includes a third semiconducting zone formed between the second semiconducting zone and the fourth semiconducting zone. The third semiconducting zone has an electric field in operation capable of supplying an acceleration of electrons between the second semiconducting zone and the fourth semiconducting zone without multiplication of carriers by impact ionisation. 1. An avalanche photodiode type structure designed to receive an electromagnetic radiation within a first range of wave lengths , the structure comprising:a first semiconducting zone of a first type of conductivity for which the majority carriers are holes, and with a first face intended to receive the electromagnetic radiation and a second face opposite the first face,a second semiconducting zone, called the multiplication zone, in contact with the second face of the first semiconducting zone and with a lower concentration of majority carriers than the first semiconducting zone, the second semiconducting zone being conformed to supply a multiplication of carriers by impact ionisation that is preponderant for electrons,a fourth semiconducting zone called the collection zone, the fourth semiconducting zone being of a second type of conductivity for which the majority carriers are electrons, the fourth semiconducting zone having a higher concentration of majority carriers than the second semiconducting zone,wherein at least one of the first and second semiconducting zones being formed from a semiconducting material with a suitable band gap width to promote absorption of the electromagnetic radiation,wherein the structure comprises a third and a fifth semiconducting ...

TRANSDERMAL MICRONEEDLE CONTINUOUS MONITORING SYSTEM

Transdermal microneedles continuous monitoring system is provided. The continuous system monitoring includes a substrate, a microneedle unit, a signal processing unit and a power supply unit. The microneedle unit at least comprises a first microneedle set used as a working electrode and a second microneedle set used as a reference electrode, the first and second microneedle sets arranging on the substrate. Each microneedle set comprises at least a microneedle. The first microneedle set comprises at least a sheet having a through hole on which a barbule forms at the edge. One of the sheets provides the through hole from which the barbules at the edge of the other sheets go through, and the barbules are disposed separately. 1. A transdermal microneedles continuous monitoring system , comprising:a substrate;a microneedle unit comprising at least a first microneedle set used as a working electrode and a second microneedle set used as a reference electrode, each of the microneedle sets comprising at least a microneedle, the first microneedle set comprising at least two sheets, each of the sheets having a through hole defined thereon and a barbule arranged at the peripheral of the through hole, the through hole on one sheet allowing the corresponding barbules of an other sheet to pass and the barbules being disposed separately;a signal processing unit arranged on the substrate and electrically connecting to the first microneedle set and the second microneedle set; anda power supply unit providing working power to the transdermal microneedles continuous monitoring system,wherein the at least two sheets comprise a first sheet, a second sheet and a third sheet stacked with each other, the first sheet having at least one first through hole defined thereon and a first barbule at the peripheral of the first through hole, the second sheet having at least one second through hole defined thereon and a second barbule at the peripheral of the second through hole, the third sheet ...

OPTOELECTRONIC DEVICES INCLUDING DILUTE NITRIDE

Compound semiconductor alloys comprising dilute nitride materials, are materials used in absorbing layers for photodetectors, power converters, solar cells, and in particular to high efficiency, electronic and optoelectronic devices, including multijunction solar cells, photodetectors, power converters, and the like, formed primarily of III-V semiconductor alloys. The absorbing (or active) layers achieve improved characteristics including band gap optimization and minimization of defects. 1. A semiconductor , comprising:a substrate with a lattice parameter matching or nearly matching GaAs;a first doped III-V layer over the substrate; [{'sub': x', '1-x', 'y', '1-y-z', 'z, 'a dilute nitride comprising InGaNAsSb(0.1232≤x≤0.1568; 0.0318≤y≤0.0352; 0.0067≤z≤0.0126),'}, 'an In/Sb ratio of at least approximately 10,', 'a band gap between approximately 0.935 eV and 0.963 eV, and', {'sup': 15', '−3', '17', '−3, 'a carrier concentration between approximately 8×10cmand approximately 1×10cmat room temperature; and'}], 'an absorber layer over the first doped III-V layer, the absorber layer havinga second doped III-V layer over the absorber layer.2. The semiconductor of claim 1 , wherein the dilute nitride comprises InGaNAsSb(0.1232≤x≤0.1568; 0.0318≤y≤0.0352; 0.0067≤z≤0.0080).3. The semiconductor of claim 1 , wherein the carrier concentration of the absorber layer is approximately 2×10cm.4. The semiconductor of claim 1 , wherein the carrier concentration of the absorber layer is approximately 7.5×10cm.5. The semiconductor of claim 1 , wherein a thickness of the absorber layer is approximately 2 micrometers.6. The semiconductor of claim 1 , wherein a thickness of the absorber layer is between approximately 3 micrometers and approximately 5 micrometers.7. The semiconductor of claim 1 , wherein the substrate comprises GaAs.8. The semiconductor of claim 1 , wherein the absorber layer is p-type.9. A method of forming a semiconductor claim 1 , comprising:forming a first doped III-V ...

Photodiode

In an example, an avalanche photodiode comprises a substrate and a structure comprising a first layer and a second layer, the first and second layers over and parallel to the substrate, wherein the first layer is between the substrate and the second layer. The first layer is an Aluminium Arsenide Antimonide multiplication layer, and wherein the cross-sectional area parallel to the substrate of the first layer is smaller than that of the second layer, thereby forming a recess in a sidewall of the structure.

INFRARED DETECTION DEVICE, INFRARED DETECTION APPARATUS, AND MANUFACTURING METHOD OF INFRARED DETECTION DEVICE

An infrared detection device includes a semiconductor substrate; a first metamorphic buffer layer that is formed on the semiconductor substrate; a first contact layer that is formed on the first metamorphic buffer layer; a first infrared absorption layer that is formed on the first contact layer; a second contact layer that is formed on the first infrared absorption layer; a second metamorphic buffer layer that is formed on the second contact layer; a third contact layer that is formed on the second metamorphic buffer layer; a second infrared absorption layer that is formed on the third contact layer; a fourth contact layer that is formed on the second infrared absorption layer; a lower electrode that is connected with the first contact layer; an upper electrode that is connected with the fourth contact layer; and an intermediate electrode that is connected with the second contact layer and the third contact layer. 1. An infrared detection device comprising:a semiconductor crystal substrate;a first metamorphic buffer layer that is formed on the semiconductor crystal substrate;a first contact layer that is formed on the first metamorphic buffer layer;a first infrared absorption layer that is formed on the first contact layer;a second contact layer that is formed on the first infrared absorption layer;a second metamorphic buffer layer that is formed on the second contact layer;a third contact layer that is formed on the second metamorphic buffer layer;a second infrared absorption layer that is formed on the third contact layer;a fourth contact layer that is formed on the second infrared absorption layer;a lower electrode that is connected with the first contact layer;an upper electrode that is connected with the fourth contact layer; andan intermediate electrode that is connected with the second contact layer and the third contact layer.2. The infrared detection device according to claim 1 , whereinthe first contact layer, the second contact layer, the third contact ...

High Performance, High Bandgap, Lattice-Mismatched, GaInP Solar Cells

High performance, high bandgap, lattice-mismatched, photovoltaic cells ( 10 ), both transparent and non-transparent to sub-bandgap light, are provided as devices for use alone or in combination with other cells in split spectrum apparatus or other applications.

COMPACT ELECTRO-OPTICAL DEVICES WITH LATERALLY GROWN CONTACT LAYERS

Embodiments of the invention are directed to a method of fabrication of an electro-optical device. A non-limiting example of the method relies on a waveguide. A trench is opened in the waveguide and a stack of optically active semiconductor materials is directly grown from a bottom wall of the trench and are stacked along a stacking direction that is perpendicular to a main plane of the waveguide. The stack is partly encapsulated in the waveguide, whereby a bottom layer of the stack is in direct contact with a waveguide core material, whereas upper portions of opposite, lateral sides of the stack are exposed. An insulating layer of material is deposited to cover exposed surfaces of the waveguide and structured to form a lateral growth template. Contact layers are laterally grown due to the lateral growth template formed. The contact layers can include an n-doped and p-doped contact layers. 1. A method of fabrication of an electro-optical device , the method comprising:providing a waveguiding structure by:opening a trench in the waveguiding structure;directly growing, from a bottom wall of the trench, a stack of optically active semiconductor materials, the latter stacked along a stacking direction z perpendicular to a main plane of the waveguiding structure, so as for the stack to be partly encapsulated in the waveguiding structure, whereby a bottom layer of the stack is in direct contact with a waveguide core material of the waveguiding structure, whereas upper portions of opposite, lateral sides of the stack are exposed;depositing an insulating layer of material for it to cover one or more exposed surfaces of the waveguiding structure and structuring this insulating layer to form a lateral growth template;laterally growing contact layers, due to the lateral growth template formed, wherein the contact layers comprise an n-doped contact layer and a p-doped contact layer of material, each extending from a respective one of the upper portions of opposite lateral sides ...

Manufacture of multijunction solar cell devices

The present disclosure relates to a method for manufacturing a multi-junction solar cell device comprising the steps of: providing a first substrate, providing a second substrate having a lower surface and an upper surface, forming at least one first solar cell layer on the first substrate to obtain a first wafer structure, forming at least one second solar cell layer on the upper surface of the second substrate to obtain a second wafer structure, and bonding the first wafer structure to the second wafer structure, wherein the at least one first solar cell layer is bonded to the lower surface of the second substrate and removing the first substrate.

LOW REFLECTION ELECTRODE FOR PHOTOVOLTAIC DEVICES

A method for forming a photovoltaic device includes forming a photovoltaic absorption stack on a substrate including one or more of I-III-VIand I-II-IV-VIsemiconductor material. A transparent conductive contact layer is deposited on the photovoltaic absorption stack at a temperature less than 200 degrees Celsius. The transparent conductive contact layer has a thickness of about one micron and is formed on a front light-receiving surface. The surface includes pyramidal structures due to an as deposited thickness. The transparent conductive contact layer is wet etched to further roughen the front light-receiving surface to reduce reflectance. 1. A method for forming a photovoltaic device , comprising:{'sub': 2', '2', '4, 'forming a photovoltaic absorption stack on a substrate including one of more of III-VIand I-II-IV-VIsemiconductor material;'}depositing a transparent conductive contact layer on the photovoltaic absorption stack at a temperature less than 200 degrees Celsius, the transparent conductive contact layer having a thickness of about one micron and being formed on a front light-receiving surface, the surface including pyramidal structures due to an as deposited thickness; andwet etching the transparent conductive contact layer to further roughen the front light-receiving surface to reduce reflectance.2. The method as recited in claim 1 , wherein depositing the transparent conductive contact layer includes depositing an aluminum doped zinc oxide (AZO) layer.3. The method as recited in claim 1 , wherein depositing the transparent conductive contact layer includes depositing the transparent conductive contact layer to a thickness of between about 1 micron to about 5 microns.4. The method as recited in claim 1 , wherein wet etching includes an acid etchant.5. The method as recited in claim 4 , wherein the acid etchant includes diluted HCl having a dilution ratio of water to acid of between 990:10 and 999:1.6. The method as recited in claim 5 , wherein wet ...

Methods Of Low-Temperature Fabrication Of Crystalline Semiconductor Alloy On Amorphous Substrate

Methods are discussed for producing single-crystal shapes on amorphous materials. A first method deposits a layer of Germanium-Tin (GeSn) alloy comprising between three and sixteen atomic-percent tin on material incapable of seeding crystal formation, the layer is photolithographically defined into a shape having a point having radius less than 100 nanometers; and the shape is annealed by heating to a temperature below 450 degrees Celsius. A second method also photolithographically defines a shape on a layer of GeSn, then uses a laser to heat and crystalize seed spot on the shape; and anneals the shape by heating and thereby crystalizing additional GeSn alloy of the shape. In embodiments, the crystalized GeSn serves to seed InGaP and/or InGaAs layers that may serve together with the GeSn as layers of a tandem photovoltaic cell. 1. A method for producing a single-crystal shape on amorphous materials on an integrated circuit or solar cell structure comprising:depositing a first semiconductor layer comprising a first material comprising Germanium-Tin (GeSn) alloy comprising between three and sixteen atomic percent tin, the GeSn alloy deposited on a second material, the second material incapable of seeding crystal formation in the GeSn alloy;forming the shape, the shape having a point having radius less than 100 nanometers; andannealing the shape by heating the integrated circuit to a temperature below 450 degrees Celsius.2. The method of wherein the GeSn alloy comprises between ten and eleven and a half percent tin.3. The method of wherein forming the shape is performed by photolithography.4. The method of wherein forming the shape is performed by laser scribing.5. The method of wherein the GeSn layer is between one and one thousand nanometers thick.6. The method of further comprising forming a waveguide adjacent to the shape.7. The method of wherein the second material is electrically conductive and further comprising depositing a third electrically conductive ...

LIGHT-RECEIVING ELEMENT, MANUFACTURING METHOD OF THE SAME, IMAGING DEVICE, AND ELECTRONIC APPARATUS

This light-receiving element includes a plurality of photoelectric conversion layers, each of which includes a compound semiconductor, and absorbs a wavelength in an infrared region to generate an electric charge, and an insulating film that is provided to surround each of the plurality of photoelectric conversion layers. 1. A light-receiving element , comprising:a plurality of photoelectric conversion layers each of which includes a compound semiconductor, and absorbs a wavelength in an infrared region to generate an electric charge; andan insulating film that is provided to surround each of the plurality of photoelectric conversion layers.2. The light-receiving element according to claim 1 , further comprising a passivation film that is provided to cover a corresponding one of side faces of the photoelectric conversion layers.3. The light-receiving element according to claim 2 , wherein the insulating film is provided to fill a gap between the photoelectric conversion layers each covered with the passivation film.4. The light-receiving element according to claim 2 , further comprising an electrode electrically coupled to a corresponding one of the photoelectric conversion layers claim 2 ,wherein the plurality of photoelectric conversion layers are each provided on one face of a substrate, andthe passivation film is provided to cover, of a surface of the corresponding photoelectric conversion layer, a portion excluding a portion coupled to the electrode and a portion facing the substrate.5. The light-receiving element according to claim 2 , further comprising an electrode electrically coupled to a corresponding one of the photoelectric conversion layers claim 2 ,wherein the passivation film is provided to cover, of a surface of the corresponding photoelectric conversion layer, a portion excluding a portion coupled to the electrode.6. The light-receiving element according to claim 2 , wherein the passivation film includes an insulator or a semiconductor.7. The light ...

Optoelectronic Component and Method for Producing an Optoelectronic Component

An optoelectronic component and a method for producing an optoelectronic component are disclosed. In an embodiment a component includes a semiconductor layer sequence having a first semiconductor layer, an active layer, a second semiconductor layer and a top side stacked in the recited order, a first contact layer arranged at the first semiconductor layer, a mirror layer arranged on the top side and a recess in the semiconductor layer sequence which extends from the top side through the entire second semiconductor layer and the active layer, wherein the recess has a bottom surface in a region of the first semiconductor layer, wherein the mirror layer covers a portion of the recess in plan view, wherein the first contact layer is in direct electrical and mechanical contact with a contact pin, and wherein the contact pin extends from the first contact layer to the top side of the semiconductor layer sequence. 117-. (canceled)18. An optoelectronic component comprising:a semiconductor layer sequence having a first semiconductor layer, an active layer configured to emit or absorb electromagnetic radiation during operation, a second semiconductor layer and a top side stacked in the recited order;a first contact layer arranged at the first semiconductor layer, via which the first semiconductor layer is configured to be electrically contacted during operation;a mirror layer arranged on the top side, via which the second semiconductor layer is configured to be electrically contacted during operation; anda recess in the semiconductor layer sequence which extends from the top side through the entire second semiconductor layer and the active layer and which opens into the first semiconductor layer,wherein the recess has a bottom surface in a region of the first semiconductor layer, the bottom surface being delimited in a lateral direction, parallel to the active layer, by at least one side wall running transversely to the active layer,wherein the bottom surface and the side ...

High-Efficiency Four-Junction Solar Cells and Fabrication Methods Thereof

A high-efficiency four-junction solar cell includes: an InP growth substrate; a first subcell formed over the growth substrate, with a first band gap, and a lattice constant matched with that of the growth substrate; a second subcell formed over the first subcell, with a second band gap larger than the first band gap, and a lattice constant matched with that of the growth substrate; a third subcell formed over the second subcell, with a third band gap larger than the second band gap, and a lattice constant matched with that of the substrate lattice; a composition gradient layer formed over the third subcell, with a fourth band gap larger than the third band gap; and a fourth subcell formed over the composition gradient layer, with a fifth band gap larger than the third band gap, and a lattice constant mismatched with that of the substrate. 1. A high-efficiency four-junction solar cell , comprising:an InP growth substrate;a first subcell formed over the growth substrate, wherein the first subcell has a first band gap, and a lattice constant matched with that of the growth substrate;a second subcell formed over the first subcell, wherein the second subcell has a second band gap larger than the first band gap, and a lattice constant matched with that of the growth substrate;a third subcell formed over the second subcell, wherein the third subcell has a third band gap larger than the second band gap and a lattice constant matched with that of the substrate lattice;a composition gradient layer formed over the third subcell, wherein the composition gradient layer has a fourth band gap larger than the third band gap; anda fourth subcell formed over the composition gradient layer, wherein the fourth subcell has a fifth band gap larger than the third band gap, and a lattice constant mismatched with that of the substrate.2. The solar cell according to claim 1 , wherein:the first subcell comprises an InGaAs emitter layer and a base layer;{'sub': x', '1-x', 'y', '1-y, 'the ...

Compound photovoltaic cell

A compound photovoltaic cell includes a substrate, a first cell made of a first semiconductor material and formed on the substrate, a tunnel layer, and a second cell made of a second semiconductor material lattice mismatched with a material of the substrate, connected to the first cell via the tunnel layer, and disposed on an incident side with respect to the first cell, wherein band gaps of the first and the second cells become smaller from an incident side to a back side, and wherein the tunnel layer includes a p-type layer disposed on the incident side and a n-type layer disposed on the back side, the p-type layer being a p + -type (Al)GaInAs layer, the n-type layer being an n + -type InP layer, an n + -type GaInP layer having a tensile strain with respect to InP or n + -type Ga(In)PSb layer having a tensile strain with respect to InP.

RESONANT CAVITY STRAINED III-V PHOTODETECTOR AND LED ON SILICON SUBSTRATE

An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer. 1. A photodetector comprising:a germanium including buffer layer atop a silicon including substrate;a first distributed Bragg reflector stack of III-V semiconductor material layers present on the germanium including buffer layer;an absorption layer of III-V semiconductor material present on the first distributed Bragg reflector stack of III-V semiconductor material, wherein a difference in lattice dimension between the absorption layer and the first distributed Bragg reflector stack of III-V semiconductor material layers induces a strain in the absorption layer; anda second distributed Bragg reflector stack of III-V semiconductor material layers present on the absorption layer, wherein the strain induced on the absorption layer provides that the photodetector detects light wavelengths greater than 800 nm.2. The photodetector of claim 1 , wherein the first distributed Bragg reflector stack is doped to a first conductivity type claim 1 , and the second distributed Bragg reflector stack is doped to a second conductivity type.3. The photodetector of claim 1 , wherein absorption layer is intrinsic claim 1 , a first conductivity type doped region is present between the absorption layer and the first distributed Bragg reflector stack claim 1 , and a second conductivity type doped region is present between the absorption layer and the second ...

LOW NOISE HYBRIDIZED DETECTOR USING CHARGE TRANSFER

A low noise infrared photodetector has an epitaxial heterostructure that includes a photodiode and a transistor. The photodiode includes a high sensitivity narrow bandgap photodetector layer of first conductivity type, and a collection well of second conductivity type in contact with the photodetector layer. The transistor includes the collection well, a transfer well of second conductivity type that is spaced from the collection well and the photodetector layer, and a region of first conductivity type between the collection and transfer wells. The collection well and the transfer well are of different depths, and are formed by a single diffusion. 1. An infrared photodetector comprising:a small bandgap layer of first conductivity type;a large bandgap layer of first conductivity type overlying the small bandgap layer;a standoff layer on a portion of the large bandgap layer;a collection well of second conductivity type in the large bandgap layer and in contact with the small bandgap layer so that the small bandgap layer and the collection well form an infrared photodiode;a transfer well of second conductivity type in the standoff layer and the large bandgap layer and spaced from the collection well and the small bandgap layer; anda transistor that includes the collection well, the transfer well and a region between the collection well and the transfer well.2. The infrared photodetector of claim 1 , wherein the transistor further includes:a drain electrode coupled to the transfer well; anda gate electrode coupled to the region between the collection well and the transfer well.3. The infrared photodetector of claim 2 , wherein the gate and drain electrodes comprise Ti claim 2 , Pt claim 2 , Au claim 2 , Ni claim 2 , Cu claim 2 , or combinations thereof.4. The infrared photodetector of claim 2 , and further comprising:an insulator layer between the gate electrode and the large bandgap layer.5. The infrared photodetector of wherein the transfer well extends to a top ...

Method of fabricating a superlattice structure

A method of fabricating a superlattice structure requires that atoms of a first III-V semiconductor compound be introduced into a vacuum chamber such that the atoms are deposited uniformly on a substrate. Atoms of at least one additional III-V compound are also introduced such that the atoms of the two III-V compounds form a repeating superlattice structure of alternating thin layers. Atoms of a surfactant are also introduced into the vacuum chamber while the III-V semiconductor compounds are being introduced, or immediately thereafter, such that the surfactant atoms act to improve the quality of the resulting SL structure. The surfactant is preferably bismuth, and the III-V semiconductor compounds are preferably GaSb along with either InAs or InAsSb; atoms of each material are preferably introduced using molecular beam epitaxy. The resulting superlattice structure is suitably used to form at least a portion of an IR photodetector.

Reduced dark current photodetector with charge compensated barrier layer

A photodetector comprising a photoabsorber, comprising a doped semiconductor, a contact layer comprising a doped semiconductor and a barrier layer comprising a charge carrier compensated semiconductor, the barrier layer compensated by doping impurities such that it exhibits a valence band energy level substantially equal to the valence band energy level of the photo absorbing layer and a conduction band energy level exhibiting a significant band gap in relation to the conduction band of the photo absorbing layer, the barrier layer disposed between the photoabsorber and contact layers. The relationship between the photo absorbing layer and contact layer valence and conduction band energies and the barrier layer conduction and valance band energies is selected to facilitate minority carrier current flow while inhibiting majority carrier current flow between the contact and photo absorbing layers.

FABRICATION METHOD OF INVERTED SOLAR CELLS

A fabrication method for an inverted solar cell includes: (1) providing a growth substrate; (2) depositing a SiOmask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate, wherein the sacrificial layer encompasses the entire SiOmask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiOmask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate. 1. A fabrication method for an inverted solar cell , comprising: (1) providing a growth substrate; (2) depositing a SiOmask layer over the surface of the growth substrate to form a patterned substrate; (3) forming a sacrificial layer with epitaxial growth over the patterned substrate , wherein the sacrificial layer encompasses the entire SiOmask pattern; (4) forming a buffer layer over the sacrificial layer via epitaxial growth; (5) forming a semiconductor material layer sequence of the inverted solar cell over the buffer layer with epitaxial growth; (6) bonding the semiconductor material layer sequence of the inverted solar cell with a supporting substrate; (7) selectively etching the SiOmask layer by wet etching; and (8) selectively etching the sacrificial layer by wet etching to lift off the growth substrate.2. The fabrication method according to claim 1 , wherein the material of the growth substrate in step (1) is Ge or GaAs.3. The fabrication method according to claim 1 , wherein the pattern of the SiOmask layer in step (2) comprises at least one of a single-direction parallel pattern claim 1 , a crisscrossing pattern claim 1 , or inter-crossing pattern.4. The ...

SEMICONDUCTOR STACKED BODY, LIGHT-RECEIVING ELEMENT, AND METHOD FOR PRODUCING SEMICONDUCTOR STACKED BODY

A semiconductor stacked body includes: a first semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a first conductivity type; a quantum-well light-receiving layer containing a group III-V compound semiconductor; a second semiconductor layer containing a group III-V compound semiconductor; and a third semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a second conductivity type. The first semiconductor layer, the quantum-well light-receiving layer, the second semiconductor layer, and the third semiconductor layer are stacked in this order. The concentration of an impurity that generates a carrier of the second conductivity type is 1×10cmor more and 1×10cmor less in the second semiconductor layer. 1. A semiconductor stacked body comprising:a first semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a first conductivity type;a quantum-well light-receiving layer containing a group III-V compound semiconductor;a second semiconductor layer containing a group III-V compound semiconductor; anda third semiconductor layer containing a group III-V compound semiconductor and being a layer whose conductivity type is a second conductivity type different from the first conductivity type,whereinthe first semiconductor layer, the quantum-well light-receiving layer, the second semiconductor layer, and the third semiconductor layer are stacked in this order, and{'sup': 14', '−3', '17', '−3, 'a concentration of an impurity that generates a carrier of the second conductivity type is 1×10cmor more and 1×10cmor less in the second semiconductor layer.'}2. The semiconductor stacked body according to claim 1 , wherein an interface region claim 1 , which is a region including an interface between the quantum-well light-receiving layer and the second semiconductor layer claim 1 , has a higher concentration of the ...

Group iii-v compound semiconductor solar cell, method of manufacturing group iii-v compound semiconductor solar cell, and artificial satellite

A Group III-V compound semiconductor solar cell includes a buffer layer (108) and a first cell (131) both between a first electrode (121) and a second electrode (102). The buffer layer (108) has a portion in which first segments (141a, 142a, 143a, 144a) and second segments (141b, 142b, 143b, 144b) are alternately provided. Each of the first segments has a Group III element composition that continuously changes with an increasing thickness of the buffer layer (108) as traced from a side located opposite where the first cell (131) is disposed toward a side where the first cell (131) is disposed. Each of the second segments has a Group III element composition that changes without an increase in the thickness of the buffer layer (108).

METHODS AND APPARATUSES FOR IMPROVED BARRIER AND CONTACT LAYERS IN INFRARED DETECTORS

An infrared detector and a method for forming it are provided. The detector includes absorber, barrier, and contact regions. The absorber region includes a first semiconductor material, with a first lattice constant, that produces charge carriers in response to infrared light. The barrier region is disposed on the absorber region and comprises a superlatice that includes (i) first barrier region layers comprising the first semiconductor material, and (ii) second barrier region layers comprising a second semiconductor material, different from, but lattice matched to, the first semiconductor material. The first and second barrier region layers are alternatingly arranged. The contact region is disposed on the barrier region and comprises a superlattice that includes (i) first contact region layers comprising the first semiconductor material, and (ii) second contact region layers comprising the second semiconductor material layer. The first and second contact region layers are alternatingly arranged. 1. An infrared detector , comprising:an absorber region that comprises a first semiconductor material with a first lattice constant, wherein the first semiconductor material produces charge carriers in response to infrared light;a barrier region disposed on the absorber region, wherein the barrier region is a superlattice comprising: (i) a plurality of first barrier region layers comprising the first semiconductor material, and (ii) a plurality of second barrier region layers comprising a second semiconductor material that is different from the first semiconductor, wherein the plurality of first barrier region layers are alternatingly arranged with the plurality of second barrier region layers; anda contact region disposed on the barrier region, wherein the contact region is another superlattice comprising: (i) a plurality of first contact region layers comprising the first semiconductor material, and (ii) a plurality of second contact region layers comprising the second ...

SEMICONDUCTOR LAYERED STRUCTURE AND PHOTODIODE

A semiconductor layered structure according to the present invention includes a substrate formed of a III-V compound semiconductor; and semiconductor layers disposed on the substrate and formed of III-V compound semiconductors. The substrate has a majority-carrier-generating impurity concentration of 1×10cmor more and 2×10cmor less, and the impurity has an activation ratio of 30% or more. 1. A semiconductor layered structure comprising:a substrate formed of a III-V compound semiconductor; anda semiconductor layer disposed on the substrate and formed of a III-V compound semiconductor,{'sup': 17', '−3', '20', '−3, 'wherein the substrate has a majority-carrier-generating impurity concentration of 1×10cmor more and 2×10cmor less, and the impurity has an activation ratio of 30% or more.'}2. The semiconductor layered structure according to claim 1 , wherein the substrate has an n-type conductivity.3. The semiconductor layered structure according to claim 1 , wherein the semiconductor layer includes a quantum well layer.4. The semiconductor layered structure according to claim 3 , wherein the quantum well layer has a thickness of 1 μm or more.5. The semiconductor layered structure according to claim 3 , wherein the quantum well layer has a structure in which an InGaAs (0.38≦x≦1) layer and a GaAsSb(0.36≦y≦1) layer are alternately stacked claim 3 , or has a structure in which a GaInNAs(0.4≦u≦0.8 claim 3 , 0 Подробнее

SEMICONDUCTOR LAMINATE AND LIGHT-RECEIVING ELEMENT

A semiconductor layer includes a first semiconductor layer containing a III-V group compound semiconductor and having a first conductivity type, a quantum-well structure containing a III-V group compound semiconductor, a second semiconductor layer containing a III-V group compound semiconductor, a third semiconductor layer containing a III-V group compound semiconductor, and a fourth semiconductor layer containing a III-V group compound semiconductor and having a second conductivity type different from the first conductivity type. The first semiconductor layer, the quantum-well structure, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer are stacked in this order. The concentration of an impurity that generates carriers of the second conductivity type is lower in the third semiconductor layer than in the fourth semiconductor layer. The concentration of an impurity that generates majority carriers in the second semiconductor layer is lower in the third semiconductor layer than in the second semiconductor layer. 1. A semiconductor laminate comprising:a first semiconductor layer containing a III-V group compound semiconductor and having a first conductivity type;a quantum-well absorption layer containing a III-V group compound semiconductor;a second semiconductor layer containing a III-V group compound semiconductor;a third semiconductor layer containing a III-V group compound semiconductor; anda fourth semiconductor layer containing a III-V group compound semiconductor and having a second conductivity type different from the first conductivity type,wherein the first semiconductor layer, the quantum-well absorption layer, the second semiconductor layer, the third semiconductor layer, and the fourth semiconductor layer are stacked in this order,a concentration of an impurity that generates carriers of the second conductivity type is lower in the third semiconductor layer than in the fourth semiconductor layer, anda ...

INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL WITH A SINGLE METAMORPHIC LAYER

The present disclosure provides a multijunction solar cell that includes: a first sequence of layers of semiconductor material forming a first set of one or more solar subcells; a graded interlayer adjacent to said first sequence of layers; a second sequence of layers of semiconductor material forming a second set of one or more solar subcells; and a high band gap contact layer adjacent said second sequence of layers, wherein the high band gap contact layer is composed of p++ type InGaAlAs or InGaAs. 1. A multijunction solar cell comprising:a first sequence of layers of semiconductor material forming a first set of one or more solar subcells;{'sub': x', '1-x', 'y', '1-y, 'a graded interlayer adjacent to said first sequence of layers, said graded interlayer being composed of (InGa)AlAs, wherein 0 Подробнее

Multi-junction solar cell and use thereof

The present invention relates to a multi junction solar cell having at least four p-n junctions. The individual subcells thereby have band gaps of 1.9 eV, 1.4 eV, 1.0 eV and 0.7 eV. The multi junction solar cells according to the invention are used in space and also in terrestrial concentrator systems.

METAMORPHIC TWO-JUNCTION PHOTOVOLTAIC DEVICES WITH REMOVABLE GRADED BUFFERS

The present disclosure relates to a method for manufacturing a device, where the device includes, in order, a metamorphic contact layer, a first metamorphic junction, a metamorphic tunnel junction, and a second metamorphic junction. To produce the device, the manufacturing includes, in order, a first depositing of a buffer layer onto a substrate, a second depositing of the metamorphic contact layer, a third depositing of the first metamorphic junction, a fourth depositing of the metamorphic tunnel junction, a fifth depositing of the second metamorphic junction, and the removing of the buffer layer and the substrate.

Passivating window and capping layer for photoelectrochemical cells

An aspect of the present disclosure is a photoelectrochemical device that includes a first cell that includes a first semiconductor alloy, a capping layer that includes a second semiconductor alloy, and a passivating layer that includes a third semiconductor alloy, where the passivating layer is positioned between the first cell and the capping layer, and at least a portion of the capping layer is configured to be in direct contact with an electrolyte.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor device and the like having high quantum efficiency or high sensitivity in a near-infrared to infrared region is provided. The semiconductor device includes: a substrate; a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a layer a and a layer b; and a crystal-adjusting layer disposed between the substrate and the multiple quantum well structure. The crystal-adjusting layer includes a first adjusting layer which is made of the same material as the substrate and is in contact with the substrate, and a second adjusting layer which is made of the same material as the layer a or the layer b of the multiple quantum well structure and is in contact with the multiple quantum well structure. 1. A semiconductor device , comprising:a III-V semiconductor substrate;a multiple quantum well structure disposed on the substrate, and including a plurality of pairs of a layer a and a layer b; anda crystal-adjusting layer disposed between the substrate and the multiple quantum well structure, whereinthe crystal-adjusting layer includes a first adjusting layer which is made of the same material as the substrate and is in contact with the substrate, and a second adjusting layer which is made of the same material as the layer a or the layer b of the multiple quantum well structure.2. The semiconductor device according to claim 1 , whereina first conductivity type dopant concentration in the first adjusting layer is higher than a first conductivity type dopant concentration in the second adjusting layer.3. The semiconductor device according to claim 2 , whereinthe first conductivity type dopant concentration in the first adjusting layer is 5 times or more of the first conductivity type dopant concentration in the second adjusting layer.4. The semiconductor device according to claim 1 , whereina thickness of the first adjusting layer is ⅕ or less of a thickness of the second adjusting layer.5. The semiconductor device according ...

ACTIVE PHOTONIC DEVICE HAVING A DARLINGTON CONFIGURATION WITH FEEDBACK

Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other. 1. A method of manufacturing an active photonic device having a Darlington configuration comprising:providing a substrate; an inner collector region; and', 'an outer collector region that substantially surrounds the inner collector region and is spaced apart from the inner collector region;, 'disposing a collector layer over the substrate and comprising an inner base region;', 'a first outer base region; and', 'a second outer base region, wherein the first outer base region and the second outer base region are spaced apart from the inner base region and each other while substantially surrounding the inner base region;, 'disposing a base layer over the collector layer comprising an inner emitter region that is ring-shaped and extends substantially around an outer periphery of the inner base region;', 'a first outer emitter region; and', 'a second outer emitter region, wherein the first outer emitter region and the second outer emitter region are spaced apart from the inner base region and each other while substantially surrounding the inner emitter region;, ' ...

PHOTOCONDUCTIVE SEMICONDUCTOR SWITCH AND METHOD FOR MANUFACTURING THE SAME

There is provided a photoconductive semiconductor switch device comprising: a semiconductor substrate configured to generate electrons and holes using incident light thereto; at least one pair of conductive layers disposed on the semiconductor substrate, wherein one pair of the conductive layers consists of first and second conductive layers spaced apart from each other, wherein each of the first and second conductive layers contains abundant electrical carriers to have a low resistance; and first and second electrodes disposed on at least partially on the first and second conductive layers respectively. In this way, the application of the photoconductive semiconductor switch device may be widened. 1. A photoconductive semiconductor switch device comprising:a semiconductor substrate configured to generate electrons and holes using incident light thereto;at least one pair of conductive layers disposed on the semiconductor substrate, wherein one pair of the conductive layers consists of first and second conductive layers spaced apart from each other, wherein each of the first and second conductive layers contains a plurality of electrical carriers; andfirst and second electrodes disposed on at least partially on the first and second conductive layers respectively,wherein each of the first and second electrode has surface continuity at a boundary portion between intersecting planes.2. The device of claim 1 , wherein the first and/or second conductive layers include first and/or second ledge portions respectively claim 1 , wherein each of the first and/or second ledge portions further extends inwardly from each of positions of the first and/or second conductive layers vertically overlapping each of inner ends of the first and/or second electrodes claim 1 , wherein the first and/or second ledge portions respectively act to lower electrical resistances in regions of the semiconductor substrate vertically overlapping the first and/or second ledge portions.3. The device of ...

DILUTE NITRIDE DEVICES WITH ACTIVE GROUP IV SUBSTRATE AND CONTROLLED DOPANT DIFFUSION AT THE NUCLEATION LAYER-SUBSTRATE INTERFACE

Semiconductor devices having an antimony-containing nucleation layer between a dilute nitride material and an underlying substrate are disclosed. Dilute nitride-containing multijunction solar cells incorporating (Al)InGaPSb/Bi nucleation layers exhibit high efficiency. 1. A semiconductor device , comprising:a substrate, wherein the substrate comprises GaAs, (Si,Sn)Ge or Si; anda nucleation layer overlying the substrate, wherein the nucleation layer comprises a III-V alloy, wherein the group V element comprises Sb, Bi, or a combination thereof.2. The semiconductor device of claim 1 , wherein the substrate comprises Ga-doped Ge.3. The semiconductor device of claim 1 , wherein the III-V alloy comprises (Al)InGaPSb/Bi.4. The semiconductor device of claim 1 , wherein the nucleation layer is lattice matched to the substrate.5. The semiconductor device of claim 1 , wherein the nucleation layer is n-doped and the substrate is p-doped.6. The semiconductor device of claim 1 , wherein the III-V alloy comprises from 0.2% to 10% Sb claim 1 , Bi claim 1 , or a combination thereof claim 1 , where % is based on elemental content.7. The semiconductor device of claim 1 , wherein a region of the substrate within a range from 10 nm to 50 nm adjacent the nucleation layer comprises Sb or Bi.8. The semiconductor device of claim 1 , further comprising at least one dilute nitride semiconductor layer overlying the nucleation layer claim 1 , wherein the at least one dilute nitride semiconductor layer comprises:at least one group III element comprising Al, Ga, In, or a combination of any of the foregoing; andat least one group V element comprising N, P, As, Sb, Bi, or a combination of any of the foregoing.9. The semiconductor device of claim 8 , wherein the at least one dilute nitride semiconductor layer comprises GaInNAs claim 8 , GaInNAsSb claim 8 , GaInNAsBi claim 8 , GaInNAsSbBi claim 8 , GaNAs claim 8 , GaNAsSb claim 8 , GaNAsBi claim 8 , or GaNAsSbBi.10. The semiconductor device of claim ...

MANUFACTURE OF MULTIJUNCTION SOLAR CELL DEVICES

The present disclosure relates to a method for manufacturing a multi-junction solar cell device comprising the steps of: providing a final base substrate; providing a first engineered substrate comprising a first zipper layer and a first seed layer; providing a second substrate; transferring the first seed layer to the final base substrate; forming at least one first solar cell layer on the first seed layer after transferring the first seed layer to the final base substrate, thereby obtaining a first wafer structure; forming at least one second solar cell layer on the second substrate, thereby obtaining a second wafer structure; and bonding the first and the second wafer structure to each other. 1. A method for manufacturing a multi-junction solar cell device comprising the steps of:providing a final base substrate;providing a second substrate;transferring a first seed layer to the final base substrate;forming at least one first solar cell layer on the first seed layer after transferring the first seed layer to the final base substrate, thereby obtaining a first wafer structure;forming at least one second solar cell layer on the second substrate, thereby obtaining a second wafer structure; andbonding the at least one second solar cell to the first wafer structure.2. The method according to claim 1 , wherein the step of bonding the at least one second solar cell to the first wafer structure comprises bonding the at least one second solar cell layer with the second substrate thereon to the at least one first solar cell layer.3. The method according to claim 1 , wherein the step of bonding the at least one second solar cell to the first wafer structure comprises directly bonding the at least one second solar cell layer to the at least one first solar cell layer.4. The method according to claim 1 , wherein the step of transferring the first seed layer to the final base substrate comprises a step of bonding a first substrate to the final base substrate and detaching a ...

SOLAR CELL WITH PASSIVATION ON THE CONTACT LAYER

A multijunction solar cell including a contact layer with sulfur passivation on the surface of the contact layer adjacent to the window layer overlying the top subcell of the solar cell. The passivation is performed by application of a solution of ammonium sulphide. 1. A solar cell comprising:at least one solar subcell having an emitter layer, a base layer, and a window layer adjacent to the emitter layer, wherein the surface of the contact layer is passivated with sulfur.2. A solar cell as defined in claim 1 , wherein the contact layer is composed of InGaAs.3. A multijunction solar cell comprising:an upper first solar subcell composed of a semiconductor material having a first band gap, and the first solar subcell having a base region and an emitter region;a window layer disposed directly over the emitter region of the upper first solar subcell and below the surface layer;a contact layer disposed directly over the window of the upper first solar subcell and below the surface layer, the contact layer having a surface passivation; anda second solar subcell adjacent to said first solar subcell and having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell.4. The multijunction solar cell of claim 3 , wherein the base of the upper first solar subcell is composed of InGaP and the emitter of the upper first solar subcell is composed of InGaP and the band gap of the base of the upper first solar subcell is equal to or greater than 1.87 eV.5. The multijunction solar cell of claim 3 , wherein the emitter of the upper first solar subcell has a thickness of 80 nm claim 3 , and the window layer has a thickness of less than 220 Angstroms claim 3 , and the upper surface of the window layer is passivated with sulfur.6. The multijunction solar cell as defined in claim 5 , further comprising a surface layer composed of an antireflection coating material disposed over the upper first solar subcell.7. The multijunction solar ...

SPUTTERING SYSTEMS FOR LIQUID TARGET MATERIALS

A sputtering system comprises a magnetron assembly for depositing liquid metal films on a substrate. The magnetron assembly comprises a horizontal planar magnetron with a liquid metal target, a cylindrical rotatable magnetron with a metal target and a set of one or more shields forming a chamber between the planar and the rotatable magnetron. 1. A sputtering system for depositing a film on a substrate , comprising: a rotatable magnetron adjacent to a horizontal magnetron; and', 'one or more shields forming a chamber between said rotatable magnetron and said horizontal magnetron,', 'wherein said horizontal magnetron is configured to contain a liquid target having a first material and provide a material flux having said first material directed towards said rotatable magnetron, and', 'wherein said rotatable magnetron is configured to rotate a solid target having a second material in relation to said horizontal magnetron and provide a material flux having said first and second materials directed towards a substrate in view of said rotatable magnetron., 'a magnetron assembly comprising2. The sputtering system of claim 1 , wherein said first material has a first melting point and said second material has a second melting point claim 1 , and wherein said first melting point is lower than said second melting point.3. The sputtering system of claim 1 , wherein said first material is gallium and said second material is indium.4. The sputtering system of claim 1 , wherein said rotatable magnetron is at least partly cylindrical in shape.5. The sputtering system of claim 1 , wherein said horizontal magnetron comprises a backing plate adjacent to a magnetron body claim 1 , and wherein said magnetron body includes one or more magnets and said backing plate is adapted to hold said liquid target.6. The sputtering system of claim 1 , wherein said rotatable magnetron comprises a support member adapted to rotate said solid target in relation to said horizontal magnetron.7. The ...

METHOD FOR MANUFACTURING A SEMICONDUCTOR METHOD DEVICE BASED ON EPITAXIAL GROWTH

This invention relates to a method for manufacturing a semiconductor device and semiconductor manufactured thereby, including growing, from a seed island mesa, an abrupt hetero-junction comprising a semiconductor crystal with few crystal defects on a dissimilar substrate that can be used as light emitting and photovoltaic device. 1. A method for manufacturing a semiconductor device having a hetero-structure , the method comprising the steps of:forming a buffer layer and a seed layer on a front side of a dissimilar semiconductor substrate,processing to provide at least one seed island mesa of the buffer layer and the seed layer,forming an insulating mask layer on the at least one seed island mesa, the insulating mask layer having an opening provided on top of the seed island mesa, characterized ingrowing a semiconductor growth layer having consecutive semiconductor regions grown onto each other from the opening, epitaxially, vertically and laterally, wherein a first region having high defect density is only grown vertically from the opening, while the other regions are grown until at least one semiconductor region having low defect density coalesces with the front side of the semiconductor substrate or the insulating mask layer.2. The method according to claim 1 , comprising processing to provide the seed island mesa having a particular orientation (α) on the substrate.36060ab. The method according to claim 1 , wherein the insulating mask layer is formed to cover a top surface and sidewalls ( claim 1 , ) of the seed island mesa.4. The method according to claim 1 , where the semiconductor growth layer is grown in gaseous phase.5. The method according to claim 2 , wherein the orientation (α) is selected based on a crystalline plane of the substrate and growth parameters claim 2 , for instance within a range of 0 to ±45° from <110> direction on the surface of the substrate.68011. The method according to claim 1 , wherein the first region and a second region () of the ...

Transparent conductive structure, device comprising the same, and the manufacturing method thereof

An optical electrical device comprises a base and a transparent conductive structure on the base is disclosed. The base further comprises a light-emitting device and the transparent conductive structure comprises a transparent conductive oxide layer and a passivation layer on the transparent conductive oxide layer. The material of the transparent conductive oxide layer comprises transparent conductive metal oxide, such as ZnO. Furthermore, the transparent conductive metal oxide also comprises impurities, such as a carrier e.g. gallium.

MULTIJUNCTION METAMORPHIC SOLAR CELL FOR SPACE APPLICATIONS

A multijunction solar cell assembly and its method of manufacture including first and second discrete semiconductor body subassemblies, each semiconductor body subassembly including first, second and third lattice matched subcells; a graded interlayer adjacent to the third solar subcell and functioning as a lateral conduction layer; and a fourth solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the third solar subcell; wherein the average band gap of all four cells is greater than 1.44 eV. 1. A multijunction solar cell assembly including a terminal of first polarity and a terminal of second polarity comprising:a first semiconductor body including a tandem vertical stack of at least a first upper solar subcell, a second solar subcell, and a bottom solar subcell, the first upper subcell having a top contact connected to the terminal of first polarity, and the bottom solar subcell having a top contact and a bottom contact;a second semiconductor body disposed adjacent to the first semiconductor body and including a tandem vertical stack of at least a first upper, a second and a bottom solar subcells, the first upper subcell of the second semiconductor body having a top contact connected to the terminal of first polarity, and the bottom subcell of the second semiconductor body having a top contact and a bottom contact with its bottom contact connected to the terminal of second polarity;wherein the first and second semiconductor body each comprises a first highly doped lateral conduction layer electrically connected to each other and disposed adjacent to and beneath the second solar subcell of each respective body;and wherein the first and second semiconductor body each comprises a blocking p-n diode or insulating layer disposed adjacent to and beneath the first highly doped lateral conduction layer; and a second highly doped lateral conduction layer disposed adjacent to and beneath the respective blocking p-n diode or insulating ...

Unknown

A method of producing optoelectronic semiconductor components includes A) providing a semiconductor layer sequence on a carrier top of a carrier, B) patterning the semiconductor layer sequence such that at least one mesa structure is formed with side faces, C) applying at least a portion of a cladding to the semiconductor layer sequence with the mesa structure by a conformal coating method such that all free surfaces are covered by the cladding), and D) anisotropically etching the cladding such that a flank coating is created from the cladding, which coating is limited with a tolerance of at most 200% of a mean thickness of the flank coating to the side faces of the mesa structure and completely encloses the mesa structure, wherein step D) takes place without an additional etching mask for the anisotropic etching. 114-. (canceled)16. The method according to claim 15 , whereinan active zone of the semiconductor layer sequence for the production of light is located in the mesa structure and the active zone is enclosed by the flank coating,the finished semiconductor components are light-emitting diodes,the carrier top is exposed in places in step B), andin step D), the carrier top and a mesa top of the mesa structure remote from the carrier are freed from the cladding and the flank coating is retained as far as the carrier top and as far as the mesa top, respectively, with a tolerance of at most 100% of the mean thickness of the flank coating.17. The method according to claim 16 , whereinthe mesa structure following step D) projects above the flank coating in a direction away from the carrier by at least 20 nm and at most 0.5 μm,the active zone reaches as far as the side faces and on the side faces is covered completely by the flank coating, andthe active zone inside the associated mesa structure is a continuous, coherent and unbroken layer.18. The method according to claim 15 , wherein{'b': 10', '1, 'the mean thickness of the flank coating is nm to μm,'}a mean angle ...

INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL

A multijunction solar cell which includes: an upper first solar subcell having a first band gap; a second solar subcell adjacent to said upper first solar subcell and having a second band gap smaller than said first band gap; a third solar subcell adjacent to said second solar subcell and having a third band gap smaller than said second band gap; a graded interlayer adjacent to said third solar subcell, said graded interlayer having a fourth band gap greater than said third band gap; and at least a fourth solar subcell adjacent to said graded interlayer, said fourth solar subcell having a fifth band gap smaller than said third band gap such that said lower fourth solar subcell is lattice mismatched with respect to said third solar subcell. 1. A multijunction solar cell comprising:an upper first solar subcell having a first band gap in the range of 1.92 to 2.2 eV;a second solar subcell adjacent to said first solar subcell and having a second band gap in the range of 1.65 to 1.78 eV;a third solar subcell adjacent to said second solar subcell and having a third band gap in the range of 1.40 to 1.50 eV;a first graded interlayer adjacent to said third solar subcell; said first graded interlayer having a fourth band gap greater than said third band gap; anda fourth solar subcell adjacent to said first graded interlayer, said fourth subcell having a fifth band gap in the range of 1.05 to 1.15 eV such that said fourth subcell is lattice mismatched with respect to said third subcell;a second graded interlayer adjacent to said fourth solar subcell; said second graded interlayer having a sixth band gap greater than said fifth band gap; anda lower fifth solar subcell adjacent to said second graded interlayer, said lower fifth subcell having a seventh band gap in the range of 0.8 to 0.9 eV such that said fourth subcell is lattice mismatched with respect to said fourth subcell;{'sub': x', '1-x', 'y', '1-y, 'wherein the first graded interlayer is compositionally graded to lattice ...

Fabrication Method for Multi-junction Solar Cells

A fabrication method for high-efficiency multi junction solar cells, including: providing a Ge substrate for semiconductor epitaxial growth; growing an emitter region over the Ge substrate (as the base) to form a first subcell with a first band gap; forming a second subcell with a second band gap larger than the first band gap and lattice matched with the first subcell over the first subcell via MBE; forming a third subcell with a third band gap larger than the second band gap and lattice matched with the first and second subcells over the second subcell via MOCVD; and forming a fourth subcell with a fourth band gap larger than the third band gap and lattice matched with the first, second and third subcells over the third subcell via MOCVD.

COMPLIANT SILICON SUBSTRATES FOR HETEROEPITAXIAL GROWTH BY HYDROGEN-INDUCED EXFOLIATION

A method of fabricating a semiconductor device includes implanting dopants into a silicon substrate, and performing a thermal anneal process that activates the implanted dopants. In response to activating the implanted dopants, a layer of ultra-thin single-crystal silicon is formed in a portion of the silicon substrate. The method further includes performing a heteroepitaxy process to grow a semiconductor material from the layer of ultra-thin single-crystal silicon. 1. A method of fabricating a semiconductor device , the method comprising:implanting dopants into a silicon substrate;performing a thermal anneal process that activates the implanted dopants, and in response to activating the implanted dopants forming a layer of ultra-thin single-crystal silicon in a portion of the silicon substrate; andperforming a heteroepitaxy process to grow a semiconductor material from the layer of ultra-thin single-crystal silicon.2. The method of claim 1 , wherein the semiconductor material is different from silicon material included in the silicon substrate.3. The method of claim 1 , wherein the dopants comprise hydrogen (H).4. The method of claim 1 , wherein the layer of ultra-thin single-crystal silicon is contained between a first interfaced defined by direct contact between an underlying portion of the silicon substrate and the layer of ultra-thin single-crystal silicon and a second interface defined by direct contact between the semiconductor material and the layer of ultra-thin single-crystal silicon.5. The method of claim 4 , wherein a distance between the first interface and the second interface defines a thickness of the layer of ultra-thin single-crystal silicon that is less than 100 nm.6. The method of claim 1 , wherein the layer of ultra-thin single-crystal silicon accommodates stress and strain into itself claim 1 , while held on top of the silicon substrate.7. The method of claim 6 , wherein the strain and thickness of the ultra-thin single-crystal silicon ...

Four-Junction Solar Cell and Fabrication Method

A method of fabricating a four-junction solar cell includes: forming a first epitaxial structure comprising first and second subcells and a cover layer over a first substrate through a forward epitaxial growth, and forming a second epitaxial structure comprising third and fourth subcells over the second substrate; forming a groove and a metal bonding layer; forming a groove on the cover layer surface of the first epitaxial structure and the substrate back surface of the second epitaxial structure, and depositing a metal bonding layer in the groove; and bonding the first epitaxial structure and the second epitaxial structure; bonding the cover layer surface of the first epitaxial structure and the substrate back surface of the second epitaxial structure, ensuring that the metal bonding layers are aligned to each other to realize dual bonding between the metal bonding layers and between the semiconductors through high temperature and high pressure treatment. 1. A four-junction solar cell , comprising:a first epitaxial structure; anda second epitaxial structure over the first epitaxial structure, wherein: a first substrate, a first subcell, a second subcell and a cover layer stacked from bottom up, and', 'the second epitaxial structure comprises:', 'a second substrate, a third subcell and a fourth subcell stacked from bottom up;', 'the cover layer surface of the first epitaxial structure and the second substrate back surface of the second epitaxial structure each have a groove deposited with a metal bonding layer;', 'the cover layer surface of the first epitaxial structure and the second substrate back surface of the second epitaxial structure are bonded, and the bonding surface is divided into a groove region and another region, wherein the groove region is where the groove is located and a bonding interface between the metal bonding layers, and the other region is a bonding interface between the cover layer and the second substrate., 'the first epitaxial structure ...

PHOTODIODE AND METHOD FOR MANUFACTURING THE SAME

A photodiode includes a substrate having a lateral side having an inclined light incidence surface that forms an angle of 45 or 60 degrees with respect to a normal of the substrate; and an epitaxial layer disposed on the substrate. A method for manufacturing a photodiode is provided, including: providing a substrate; forming an epitaxial layer on the substrate; and making a lateral side of the substrate an inclined light incidence surface that forms an angle of 45 or 60 degrees with respect to a normal of the substrate. Another method is also provided, including: providing a substrate; forming an etch stop layer on the substrate; forming an epitaxial layer on the etch stop layer; and applying an agent to etch a lateral side of the substrate to form an inclined light incidence surface having an angle of 45 or 60 degrees with respect to a normal of the substrate. 1. A photodiode , comprising:a substrate, which has a lateral side that forms an inclined light incidence surface, the light incidence surface forming an angle of 45 degrees or 60 degrees with respect to a normal of the substrate; andan epitaxial layer, which is disposed on the substrate.2. The photodiode according to claim 1 , further comprising an etch stop layer claim 1 , which is disposed between the substrate and the epitaxial layer.3. The photodiode according to claim 1 , further comprising an anti-reflection layer claim 1 , which is disposed atop the epitaxial layer claim 1 , the anti-reflection layer comprising a metallic alloy.4. The photodiode according to claim 2 , further comprising an anti-reflection layer claim 2 , which is disposed on the epitaxial layer claim 2 , the anti-reflection layer comprising a metallic alloy.5. The photodiode according to claim 3 , wherein the metallic alloy comprises Ti claim 3 , Pt claim 3 , Au and AuGeNi.6. The photodiode according to claim 4 , wherein the metallic alloy comprises Ti claim 4 , Pt claim 4 , Au and AuGeNi.7. A method for manufacturing a photodiode ...

RESONANT CAVITY STRAINED III-V PHOTODETECTOR AND LED ON SILICON SUBSTRATE

An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer. 1. A light emitting diode comprising:a first reflector stack of III-V semiconductor material present on a germanium including buffer layer;{'sup': '2', 'a light emission layer of III-V semiconductor material present on the first reflector stack of III-V semiconductor material, wherein a difference in lattice dimension between the light emission layer and the first distributed brag reflector stack of III-V semiconductor material induces a strain in the light emission layer, and having a strain in the light emission layer is without a defect density less than 1,000 defects/cm; and'}a second reflector stack of III-V semiconductor material present on the light emission layer, wherein at least one of the first and second reflector stacks is comprised of an aluminum, gallium and arsenic containing layer, and the light emission layer is comprised of an indium, gallium and arsenic containing layer.2. The light emitting diode of claim 1 , wherein the first reflector stack is doped to a first conductivity type claim 1 , and the second reflector stack is doped to a second conductivity type.3. The light emitting diode of claim 1 , wherein the light emission layer is intrinsic.4. The light emitting diode of claim 3 , wherein a first conductivity type doped region is present between the light emission layer and the first reflector stack.5. The ...

PHOTOELECTRIC CONVERSION ELEMENT, METHOD FOR MANUFACTURING SAME, AND IMAGING APPARATUS

A photoelectric conversion element includes: a first compound semiconductor layer made of a first compound semiconductor material having a first conductivity type; a photoelectric conversion layer formed on the first compound semiconductor layer a second compound semiconductor layer covering the photoelectric conversion layer and made of a second compound semiconductor material having the first conductivity type; a second conductivity type region formed at least in a part of the second compound semiconductor layer having a second conductivity type different from the first conductivity type, and reaching the photoelectric conversion layer; an element isolation layer surrounding a lateral surface of the photoelectric conversion layer; a first electrode formed on the second conductivity type region; and a second electrode electrically connected to the first compound semiconductor layer 1. A photoelectric conversion element comprising:a first compound semiconductor layer made of a first compound semiconductor material having a first conductivity type;a photoelectric conversion layer formed on the first compound semiconductor layer;a second compound semiconductor layer covering the photoelectric conversion layer and made of a second compound semiconductor material having the first conductivity type;a second conductivity type region formed at least in a part of the second compound semiconductor layer, having a second conductivity type different from the first conductivity type, and reaching the photoelectric conversion layer;an element isolation layer surrounding a lateral surface of the photoelectric conversion layer;a first electrode formed on the second conductivity type region; anda second electrode electrically connected to the first compound semiconductor layer.2. The photoelectric conversion element according to claim 1 , wherein the second electrode is formed on a same side as the first electrode.3. The photoelectric conversion element according to claim 1 , ...

ANTIMONIDE-BASED HIGH BANDGAP TUNNEL JUNCTION FOR SEMICONDUCTOR DEVICES

A tunnel junction for a semiconductor device is disclosed. The tunnel junction includes a n-doped tunnel layer and a p-doped tunnel layer. The p-doped tunnel layer is constructed of aluminum gallium arsenide antimonide (AlGaAsSb). A semiconductor device including the tunnel junction with the p-doped tunnel layer constructed of AlGaAsSb is also disclosed. 1. A tunnel junction for a semiconductor device , comprising:a n-doped tunnel layer; anda p-doped tunnel layer, wherein the p-doped tunnel layer is constructed of aluminum gallium arsenide antimonide (AlGaAsSb).2. The tunnel junction of claim 1 , wherein the p-doped tunnel layer is doped with carbon.3. The tunnel junction of claim 2 , wherein the p-doped tunnel layer includes a carbon concentration ranging from about 10/cmto 2×10/cm.4. The tunnel junction of claim 1 , wherein the p-doped tunnel layer includes bandgap ranging from about 0.7 to about 1.4 eV.5. The tunnel junction of claim 1 , wherein the n-doped tunnel layer is a n-doped material selected from the group consisting of: indium phosphide (InP) claim 1 , aluminium indium phosphide arsenic (AlInPAs) claim 1 , aluminum arsenide antimonide (AlAsSb) claim 1 , and AlGaAsSb.6. The tunnel junction of claim 1 , wherein the n-doped tunnel layer is doped with a material selected from a group consisting of: silicon and tellurium.7. The tunnel junction of claim 6 , wherein the n-doped tunnel layer includes a silicon concentration or a tellurium concentration of at least about 10/cm.8. The tunnel junction of claim 1 , wherein the n-doped tunnel layer is constructed of aluminum gallium indium arsenide (AlGaInAs).9. The tunnel junction of claim 8 , wherein the n-doped tunnel layer is doped with at least one of silicon and tellurium.10. A semiconductor device claim 8 , comprising:a first subcell;a second subcell; anda tunnel junction for electrically connecting the first subcell and the second subcell together in electrical series, wherein the tunnel junction includes a ...

INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELLS WITH DOPED ALPHA LAYER

A method of forming a multijunction solar cell comprising at least an upper subcell, a middle subcell, and a lower subcell, the method including forming a first alpha layer over said middle solar subcell using a surfactant and dopant including selenium, the first alpha layer configured to prevent threading dislocations from propagating; forming a metamorphic grading interlayer over and directly adjacent to said first alpha layer; forming a second alpha layer using a surfactant and dopant including selenium over and directly adjacent to said grading interlayer to prevent threading dislocations from propagating; and forming a lower solar subcell over said grading interlayer such that said lower solar subcell is lattice mismatched with respect to said middle solar subcell. 1. A method of forming a multijunction solar cell comprising at least an upper subcell , a middle subcell , and a lower subcell , the method comprising:providing a first substrate for the epitaxial growth of semiconductor material;forming a first solar subcell on said substrate having a first band gap;forming a second solar subcell over said first solar subcell having a second band gap smaller than said first band gap;forming a first alpha layer over said second solar subcell using a surfactant including selenium, the first alpha layer configured to prevent threading dislocations from propagating;forming a metamorphic grading interlayer over and directly adjacent to said first barrier layer, said grading interlayer having a third band gap greater than said second band gap, and the grading interlayer having a different composition than the first barrier layer;forming a second alpha layer using a surfactant including selenium over and directly adjacent to said grading interlayer to prevent threading dislocations from propagating, the second alpha layer having a different composition than the grading interlayer; andforming a third solar subcell over said grading interlayer having a fourth band gap ...

Microstructure enhanced absorption photosensitive devices

Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

FOUR JUNCTION METAMORPHIC MULTIJUNCTION SOLAR CELLS FOR SPACE APPLICATIONS

A method of fabricating four junction solar cell wherein the selection of the composition of the subcells and their band gaps maximizes the efficiency at high temperature (in the range of 50 to 100 degrees Centigrade) in deployment in space at a specific predetermined time after initial deployment (referred to as the beginning of life or BOL), such predetermined time being referred to as the end-of-life (EOL), and being at least five years after the BOL, such selection being designed not to maximize the efficiency at BOL but to increase the solar cell efficiency at the EOL while disregarding the soar cell efficiency achieved at the BOL, such that the solar cell efficiency designed at the BOL is less than the solar cell efficiency at the BOL that would be achieved if the selection were designed to maximize the solar cell efficiency at the BOL. 1. A multifunction solar cell comprising:a germanium growth substrate;a first solar subcell formed over or in the growth substrate;a graded interlayer formed over the growth substrate;a first middle solar subcell disposed over a lattice mismatched with respect to the growth substrate and having a band gap in the range of 1.2 to 1.35 eV;a second middle solar subcell disposed over the first middle solar subcell and having a band gap in the range of approximately 1.61 to 1.8 eV;an upper solar subcell disposed over the second middle subcell, and having a band gap in the range of 1.95 to 2.20 eV;wherein the graded interlayer is compositionally graded to lattice match the growth substrate on one side and the first middle solar subcell on the other side, and is composed of the As, P, N, Sb based III-V compound semiconductors subject to the constraints of having the in-plane lattice parameter throughout its thickness being greater than or equal to that of the growth substrate; andwherein the selection of the composition of the subcells and their band gaps maximizes the efficiency at high temperature (in the range of 50 to 100 degrees ...

DISTRIBUTED BRAGG REFLECTOR STRUCTURES IN MULTIJUNCTION SOLAR CELLS

A multijunction solar cell and its method of fabrication, including an upper and a lower solar subcell each having an emitter layer and a base layer forming a photoelectric junction; a near infrared (NIR) wideband reflector layer disposed below the upper subcell and above the lower subcell for reflecting light in the spectral range of 900 to 1050 nm which represents unused and undesired solar energy and thereby reducing the overall solar energy absorptance in the solar cell and providing thermodynamic radiative cooling of the solar cell when deployed in space outside the atmosphere. 1. A method of forming a multijunction solar cell comprising:forming an upper and a lower solar subcell each having an emitter and a base layer forming a photoelectric junction; andforming a near infrared (NIR) wideband reflector layer disposed below the upper subcell and above the lower subcell for reflecting light in the spectral range of 900 to 1050 nm which represents unused and undesired solar energy and thereby reducing the overall solar energy absorptance in the solar cell and providing thermodynamic radiative cooling of the solar cell when deployed in space outside the atmosphere;wherein the wideband reflector layers includes a first distributed Bragg reflector (DBR) structure disposed between a buffer layer and a tunnel diode layer, wherein the buffer layer is a nucleation layer, and wherein the DBR structure, the tunnel diode layer, and the buffer layer are disposed between the same pair of solar subcells of the multijunction solar cell, the pair of solar subcells having no other solar subcell disposed between them, wherein the DBR structure is composed of a plurality of alternating layers of different semiconductor materials with discontinuities in their respective indices of refraction and arranged so that light can enter and pass through the upper solar subcell and at least a first portion of said light a first spectral wavelength range can be reflected back into the upper ...

DEVICE ARCHITECTURES HAVING ENGINEERED STRESSES

The present disclosure relates to a method that includes depositing a spalling layer onto a surface that includes a substrate, depositing a device comprising a III-V material onto the spalling layer, resulting in the forming of a stack, and dividing the stack substantially at a plane positioned within the spalling layer to form a first portion that includes the substrate and a second portion that includes the PV device, where the spalling layer includes a first layer configured to provide a compressive stress and a second layer configured to provide a tensile stress, the first layer and the second layer form an interface, the dividing occurs as result of the interface, and the compressive stress and the tensile stress are strain-balanced so that a total strain within the spalling layer is approximately zero. 1. A method comprising:depositing a spalling layer onto a surface comprising a substrate;depositing a device comprising a III-V material onto the spalling layer, resulting in the forming of a stack; anddividing the stack substantially at a plane positioned within the spalling layer to form a first portion comprising the substrate and a second portion comprising the PV device, wherein:the spalling layer comprises a first layer configured to provide a compressive stress and a second layer configured to provide a tensile stress,the first layer and the second layer form an interface,the dividing occurs as result of the interface, andthe compressive stress and the tensile stress are strain-balanced so that a total strain within the spalling layer is approximately zero.2. The method of claim 1 , wherein the dividing is performed by exposing the full stack to a method comprising at least one of a stress or a force.3. The method of claim 2 , wherein the force comprises a mechanical force.4. The method of claim 2 , wherein the stress is induced by depositing a strained material on the stack.5. The method of claim 1 , wherein the compressive stress is between about zero ...

OPTOELECTRIC DEVICES COMPRISING HYBRID METAMORPHIC BUFFER LAYERS

In one aspect, semiconductor structures are described herein. A semiconductor structure, in some implementations, comprises a first semiconductor layer having a first bandgap and a first lattice constant and a second semiconductor layer having a second bandgap and a second lattice constant. The second lattice constant is lower than the first lattice constant. Additionally, a transparent metamorphic buffer layer is disposed between the first semiconductor layer and the second semiconductor layer. The buffer layer has a constant or substantially constant bandgap and a varying lattice constant. The varying lattice constant is matched to the first lattice constant adjacent the first semiconductor layer and matched to the second lattice constant adjacent the second semiconductor layer. The buffer layer comprises a first portion comprising AlGaInAs and a second portion comprising GaInP. The first portion is adjacent the first semiconductor layer and the second portion is adjacent the second semiconductor layer. 1. A semiconductor structure comprising:a first semiconductor layer having a first bandgap and a first lattice constant;a second semiconductor layer having a second bandgap and a second lattice constant, the second lattice constant being lower than the first lattice constant; anda transparent metamorphic buffer layer disposed between the first semiconductor layer and the second semiconductor layer, the transparent metamorphic buffer layer having a constant or substantially constant bandgap and a varying lattice constant, the varying lattice constant being matched to the first lattice constant adjacent the first semiconductor layer and matched to the second lattice constant adjacent the second semiconductor layer,{'sub': y', 'z', '(1-y-z)', 'x', '(1-x), 'wherein the transparent metamorphic buffer layer comprises a first portion comprising AlGaInAs and a second portion comprising GaInP, the first portion being adjacent the first semiconductor layer and forming ...

FOUR JUNCTION INVERTED METAMORPHIC SOLAR CELL

A multijunction solar cell which includes: an upper first solar subcell having a first band gap; a second solar subcell adjacent to said upper first solar subcell and having a second band gap smaller than said first band gap; a third solar subcell adjacent to said second solar subcell and having a third band gap smaller than said second band gap; a graded interlayer adjacent to said third solar subcell, said graded interlayer having a fourth band gap greater than said third band gap; and a lower fourth solar subcell adjacent to said graded interlayer, said lower fourth solar subcell having a fifth band gap smaller than said third band gap such that said lower fourth solar subcell is lattice mismatched with respect to said third solar subcell. 1. A multijunction solar cell comprising:an upper first solar subcell having a first band gap in a range of 2.10 to 2.20 eV;a second solar subcell adjacent to said upper first solar subcell and having a second band gap of approximately 1.73 eV;a third solar subcell adjacent to said second solar subcell and having a third band gap in the range of 1.40 to 1.42 eV;a graded interlayer adjacent to said third solar subcell, said graded interlayer having a fourth band gap greater than said third band gap; anda lower fourth solar subcell adjacent to said graded interlayer, said lower fourth solar subcell having a fifth band gap of approximately 1.10 eV such that said lower fourth solar subcell is lattice mismatched with respect to said third solar subcell,wherein at least one of the upper first solar subcell or the second solar subcell comprises aluminum as a constituent in excess of 25% by mole fraction, andwherein selection of the composition of the subcells and their band gaps maximizes the efficiency of the solar cell at a predetermined high temperature value in the range of 50 to 70 degrees Centigrade in deployment in space at AM0 at a predetermined time after the initial deployment in space, or the “beginning of life (BOL),” such ...

BIFACIAL TANDEM SOLAR CELLS

A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap on one side of the substrate and with subcells having a higher bandgap than the substrate on the other including, first, growing a lower bandgap subcell on one substrate side that uses only the same periodic table group V material in the dislocation-reducing grading layers and bottom subcells as is present in the substrate and after the initial growth is complete and then flipping the substrate and growing the higher bandgap subcells on the opposite substrate side which can be of different group V material. 120-. (canceled)21. A semiconductor device comprising:a substrate having a first side and a second side opposite from the first side;a lower bandgap subcell on the first side of the substrate, the lower bandgap subcell comprising a bottom subcell and grading layers, the bottom subcell and the grading layers comprising non-phosphorous materials and a first periodic table group V material; anda plurality of higher bandgap subcells on the second side of the substrate, the plurality of higher bandgap subcells comprising a second periodic table group V material,wherein the lower bandgap subcell has a lower bandgap than a bandgap of the substrate, and the plurality of higher bandgap subcells have higher bandgaps than the bandgap of the substrate.22. The semiconductor device of claim 21 , wherein the substrate comprises a doped N-type GaAs substrate having a doping impurity concentration of less than 5×10cm.23. The semiconductor device of claim 21 , wherein the grading layers comprise In(AlGa)As.24. The semiconductor device of claim 21 , wherein the bottom subcell comprises InGaAs.25. The semiconductor device of claim 21 , wherein the plurality of higher bandgap subcells comprise a first higher bandgap subcell claim 21 , the first higher bandgap subcell comprising a N-on-P cell claim 21 , the N-on-P cell ...

LIGHT SCATTERING STRUCTURES FOR THIN-FILM SOLAR CELLS AND METHODS OF MAKING THE SAME

The present disclosure relates to a method that includes contacting a surface of a first layer that includes a Group III element and a Group V element with a gas that includes HCl, where the first layer is positioned in thermal contact with a wafer positioned in a chamber of a reactor, and the contacting results in a roughening of the surface. 1. A method comprising:contacting a surface of a first layer comprising a Group III element and a Group V element with a gas comprising HCl, wherein:the first layer is positioned in thermal contact with a wafer positioned in a chamber of a reactor, andthe contacting results in a roughening of the surface.2. The method of claim 1 , wherein the roughening results in the surface having a roughness between 20 nm and 200 nm.3. The method of claim 2 , wherein the roughness is between 20 nm and 30 nm.4. The method of claim 1 , wherein the first layer comprises phosphorus.5. The method of claim 4 , wherein the first layer further comprises at least one of gallium claim 4 , indium claim 4 , arsenic claim 4 , or aluminum.6. The method of claim 5 , wherein the first layer comprises at least one of GaInP claim 5 , GaInAsP claim 5 , AlGaInP claim 5 , or AlGaInAsP.7. The method of claim 1 , wherein the wafer is maintained at a temperature between 650° C. and 800° C.8. The method of claim 1 , wherein a partial pressure of the HCl is maintained at between 0.001 Torr and 1.0 Torr.9. The method of claim 1 , wherein the contacting is maintained for a period of time between 10 seconds and 10 minutes.10. The method of claim 1 , further comprising:contacting HCL with a first liquid positioned in a first boat, resulting in the forming of a first intermediate gas; andcontacting HCl with a second liquid positioned in a second boat, resulting in the forming of a second intermediate gas, wherein:the first intermediate gas and the second intermediate interact, resulting in the depositing of the first layer on the wafer.11. The method of claim 10 , ...

METAMORPHIC LAYERS IN MULTIJUNCTION SOLAR CELLS

A method of forming a multijunction solar cell comprising an upper subcell, a middle subcell, and a lower subcell comprising providing first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on said substrate having a first band gap; forming a second solar subcell over said first subcell having a second band gap smaller than said first band gap; and forming a grading interlayer over said second sub cell having a third band gap larger than said second band gap forming a third solar subcell having a fourth band gap smaller than said second band gap such that said third subcell is lattice mis-matched with respect to said second subcell. 1. (canceled)2. A multijunction solar cell comprising:a first solar subcell having a first band gap;a second solar subcell disposed below the first solar subcell and having a second band gap smaller than the first band gap;an InGaAlAs grading interlayer disposed below the second solar subcell, wherein the InGaAlAs grading interlayer includes a compositionally step-graded InGaAlAs series of layers, and wherein the InGaAlAs grading interlayer has a constant third band gap throughout its thickness greater than the second band gap; anda third solar subcell disposed below the InGaAlAs interlayer that is lattice mismatched with respect to the second solar subcell and having a fourth band gap smaller than the third band gap,wherein the InGaAlAs grading interlayer achieves a transition in lattice constant from the second subcell to the third subcell.3. A multijunction solar cell as defined in claim 1 , wherein the constant band gap of the InGaAlAs grading interlayer is 1.5 eV.4. A multijunction solar cell as defined in further including an InGaAs buffer layer disposed below the second solar subcell and above the InGaAlAs grading interlayer.5. A multijunction solar cell as defined in wherein the InGaAlAs grading interlayer is disposed adjacent to the InGaAs buffer layer.6. A multijunction solar cell as ...

METHOD FOR MANUFACTURING INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELLS

A method of fabricating both a multijunction solar cell and an inverted metamorphic multijunction solar cell in a single process using a MOCVD reactor by forming a first multijunction solar cell on a semiconductor substrate; forming a release layer over the first solar cell; forming an inverted metamorphic second solar cell over the release layer; and etching the release layer so as to separate the multijunction first solar cell and the inverted metamorphic second solar cell. 1. A method of fabricating both a multijunction solar cell and an inverted metamorphic multijunction solar cell in a single process using a MOCVD reactor comprising:providing a semiconductor substrate;forming a first multijunction solar cell on said semiconductor substrate;forming a release layer over the first solar cell;forming an inverted metamorphic second solar cell including: (i) growing a first solar subcell having a first band gap on said release layer; (ii) growing a second solar subcell over said first subcell having a second band gap smaller than said first band gap; growing a first grading interlayer over said second solar subcell; (iii) growing a third solar subcell over said grading interlayer having a fourth band gap smaller than said second band gap such that said third solar subcell is lattice mismatched with respect to said second solar subcell; andetching the release layer so as to separate the multijunction first solar cell and the inverted metamorphic second solar cell.2. A method as defined in claim 1 , wherein the substrate is a germanium substrate claim 1 , and forming a first multijunction solar cell further comprises forming a first photoactive junction in said substrate to form a bottom solar subcell;forming a gallium arsenide middle cell disposed on said substrate; andforming an indium gallium phosphide top cell disposed over said middle cell.3. A method as defined in claim 1 , further comprising:forming a second graded interlayer adjacent to said third solar subcell ...

MULTIJUNCTION SOLAR CELL ASSEMBLY

A multijunction solar cell assembly and its method of manufacture including interconnected first and second discreate semiconductor body subassemblies disposed adjacent and parallel to each other, in the sense of the incoming illumination, each semiconductor body subassembly including first top subcell, and possibly third middle subcells and a bottom solar subcell; wherein the interconnected subassemblies form at least a Three junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor body with its at least least two junctions and the bottom solar subcell in the second semiconductor body representing the additional junction. 1. A multijunction solar cell assembly comprising:a first semiconductor body, including a first tandem vertical stack of semiconductor layers forming at least an upper solar subcell having a top surface facing the incoming illumination, and a bottom solar subcell having an emitter region and a base region disposed below the emitter region, and a back metal layer disposed below the base region,a first cut-out in the first semiconductor body on a first edge of the first semiconductor body, the first cut-out extending through the thickness of the semiconductor body from the top surface of the upper solar subcell in the first semiconductor body to at least one of the layers in the first semiconductor body and terminating at and forming a first ledge on the one layer in the first semiconductor body;a second semiconductor body mounted adjacent to and, with respect to the incoming illumination, parallel to, the first semiconductor body, including a second tandem vertical stack of semiconductor layers forming at least an upper solar subcell and a bottom solar subcell having an emitter region and a base region disposed below the emitter region; anda second cut-out in the second semiconductor body extending through the thickness of the semiconductor body from the top surface of the upper solar ...

Four Junction Inverted Metamorphic Multijunction Solar Cell with Two Metamorphic Layers

A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a first graded interlayer adjacent to the second solar subcell; the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the first graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A second graded interlayer is provided adjacent to the third solar subcell; the second graded interlayer having a fifth band gap greater than the fourth band gap; and a lower fourth solar subcell is provided adjacent to the second graded interlayer, the lower fourth subcell having a sixth band gap smaller than the fourth band gap such that the fourth subcell is lattice mismatched with respect to the third subcell. 120-. (canceled)21. A multijunction solar cell comprising:an upper first solar subcell having a first band gap;a second solar subcell below the first solar subcell and having a second band gap smaller than the first band gap, the base and the emitter of the second solar subcell forming a heterojunction;a first upper barrier layer below the second solar subcell;a first graded interlayer, composed of InGaAlAs, below the first upper barrier layer, wherein the first graded interlayer has a third band gap greater than the second band gap, and wherein the band gap of the first graded interlayer remains constant at about 1.5 eV throughout its thickness;a third solar subcell below the first graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell, the base and the emitter of the third solar subcell forming a heterojunction;a second graded interlayer, composed of ...

INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL WITH MULTIPLE METAMORPHIC LAYERS

The disclosure describes multi-junction solar cell structures that include two or more graded interlayers. 1. A multijunction solar cell comprising:an upper portion including at least one solar subcell;{'sub': x', '1-x', 'y', '1-y, 'a first graded interlayer composed of (InGa)AlAs with a step graded changing lattice constant, wherein 0 Подробнее

VISIBLE-SWIR HYPER SPECTRAL PHOTODETECTORS WITH REDUCED DARK CURRENT

A method includes forming an assembly of layers including an InP cap layer on an InGaAs absorption region layer, wherein the InGaAs layer is on an n-InP layer, and wherein an underlying substrate layer underlies the n-InP layer. The method includes removing a portion of the InP cap and n-InP layer by dry etching. 1. A method comprising:forming an assembly of layers including an InP cap layer on an InGaAs absorption region layer, wherein the InGaAs layer is on an n-InP layer, and wherein an underlying substrate layer underlies the n-InP layer; andremoving a portion of the InP cap layer by dry etching.2. The method as recited in claim 1 , further comprising:growing the InP cap layer epitaxially on the InGaAs absorption region layer; andremoving a portion of the InP cap layer by dry etching, leaving on the order of 10s of nm of the InP cap layer, wherein dry etching includes removing only on the order of nanometers of the InP cap layer.3. The method as recited in claim 2 , further comprising forming a dielectric passivation layer on the InP cap layer after removal of the portion of the InP cap layer by dry etching.4. The method as recited in claim 3 , further comprising forming a diffusion area in the InP cap layer and InGaAs absorption region layer to form a photodiode.5. The method as recited in claim 2 , wherein dry etching is performed either a front illuminated detector or a backside illuminated detector.6. The method as recited in claim 1 , wherein dry etching includes inductive coupled plasma (ICP) etching.7. The method as recited in claim 6 , wherein the ICP is a chlorine free process.8. The method as recited in claim 1 , wherein the n-InP layer is a contact layer for a back side illuminated detector claim 1 , and further comprising:removing the substrate layer by chemical/mechanical polishing, selective wet etching of the substrate layer and sacrificial layers; anddry etching a portion of the n-InP layer away.9. The method as recited in claim 8 , wherein dry ...

OPTOELECTRONIC SEMICONDUCTOR COMPONENT HAVING A CONTACT STRUCTURE, AND METHOD FOR PRODUCING A CONTACT STRUCTURE FOR AN OPTOELECTRONIC SEMICONDUCTOR COMPONENT

A method for producing a contact structure for an optoelectronic semiconductor component is given, comprising the steps: 1. Method for producing a contact structure for an optoelectronic semiconductor component , comprising the steps:a) providing a growth substrate with a semiconductor body which is grown thereon and comprises a first region, a second region and an active region suitable for generating or detecting electromagnetic radiation, wherein the first region is arranged between the growth substrate and the active region, and wherein the active region is arranged between the first region and the second region,b) creating a first recess which, starting from the second region, extends completely through the active region into the first region and does not completely penetrate the first region, wherein the first recess has the shape of a cone, truncated cone, pyramid or truncated pyramid,c) inserting a first electrically conductive contact material into the first recess,d) fixing the semiconductor body with the side of the semiconductor body facing away from the growth substrate on a support substrate, and detaching the growth substrate from the semiconductor body,e) creating a second recess which has the shape of a cone, a truncated cone, a pyramid or a truncated pyramid and which extends from the first region to the first recess so that the first recess and the second recess form a passage through the semiconductor body,f) introducing a second electrically conductive contact material into the second recess such that the first contact material and the second contact material form an electrically conductive contact structure through the semiconductor body.2. Method for producing a contact structure for an optoelectronic semiconductor component according to claim 1 , in whichin method step e) the second recess is formed up to at least one marking layer arranged in the first region.3. Method for producing a contact structure for an optoelectronic semiconductor ...

AVALANCHE PHOTODIODE WITH SPECIAL LATERAL DOPING CONCENTRATION

Avalanche photodiodes having special lateral doping concentration that reduces dark current without causing any loss of optical signals and method for the fabrication thereof are described. In one aspect, an avalanche photodiode comprises: a substrate, a first contact layer coupled to at least one metal contract of a first electrical polarity, an absorption layer, a doped electric control layer having a central region and a circumferential region surrounding the central region, a multiplication layer having a partially doped central region, and a second contract layer coupled to at least one metal contract of a second electrical polarity. Doping concentration in the central section of the electric control layer is lower than that of the circumferential region. The absorption layer can be formed by selective epitaxial growth. 1. A method of fabricating an avalanche photodiode (APD) , comprising:heavily doping a substrate with dopants of a second electrical polarity;depositing a first intrinsic Si layer on the substrate;forming a current confinement layer by implanting the first intrinsic Si layer with dopants of the second electrical polarity;depositing a second intrinsic Si layer on the current confinement layer to form a multiplication layer;implanting a top portion of the multiplication layer with dopants of a first electrical polarity to form an electric field control layer;depositing an intrinsic Ge layer on the electric field control layer to form an absorption layer;depositing an intrinsic amorphous Si layer on the absorption layer;implanting the intrinsic amorphous Si layer with dopants of the first electrical polarity to form a contact layer; andperforming silicide formation and metallization.2. The method of claim 1 , wherein the dopants of the first electrical polarity comprise p-type dopants claim 1 , and wherein the dopants of the second electrical polarity comprise n-type dopants.3. The method of claim 2 , wherein heavily doping the substrate with ...

Compound-semiconductor photovoltaic cell and manufacturing method of compound-semiconductor photovoltaic cell

A compound-semiconductor photovoltaic cell includes a compound-semiconductor substrate; a first photoelectric conversion cell formed on the compound-semiconductor substrate; a first junction layer formed on the first photoelectric conversion cell; a second junction layer joined to the first junction layer directly or indirectly; and a second photoelectric conversion cell joined to the first photoelectric conversion cell via the first and second junction layers, and arranged on a light incident side of the first photoelectric conversion cell in a light incident direction. Band gaps of the first and second photoelectric conversion cells are made smaller from the incident side toward a deep side in the light incident direction in order. A band gap of the second junction layer is greater than or equal to a band gap of the second photoelectric conversion cell. The second photoelectric conversion cell is a GaAs-based photovoltaic cell, and the second junction layer is a GaPAs layer.

METHOD OF MANUFACTURING A LOW NOISE PHOTODIODE

A method of manufacturing a photodiode including a useful layer made of a semi-conductor alloy. The useful layer has a band gap value which decreases from its upper face to its lower face. A step of producing a first doped region forming a PN junction with a second doped region of the useful layer, said production of a first doped region including a first doping step, so as to produce a base portion; and a second doping step, so as to produce at least one protuberance protruding from the base portion and in the direction of the lower face. 1. A method of manufacturing a photodiode comprising a useful layer made of a semi-conductor alloy , the useful layer having a band gap value which decreases from a first so-called upper face to an opposite so-called lower face , wherein a step of producing a first doped region situated in the useful layer and forming a PN junction with a second doped region of the useful layer , said production of a first doped region comprising:a first doping step, so as to produce a base portion of the first doped region; anda second doping step, so as to produce at least one protuberance of the first doped region, said protuberance protruding from the base portion and in the direction of the lower face of the useful layer, such that the average band gap value in the protuberance is less than the average band gap value in the base portion.2. The method according to claim 1 , wherein:the first doping step comprises a first ion implantation implementing a first implantation energy and a first implantation surface; andthe second doping step comprises a second ion implantation, implementing a second implantation energy and a second implantation surface, the second implantation energy being greater than the first implantation energy, and the second implantation surface being at least two times smaller than the first implantation surface.3. The method according to claim 1 , wherein:the first doping step comprises a diffusion of dopant, implementing a ...

METHOD FOR PRODUCING ELECTRONIC DEVICE

The present invention is a method for producing an electronic device having a drive circuit including a solar cell structure, the method including the steps of: obtaining a bonded wafer by bonding a first wafer having a plurality of independent solar cell structures including a compound semiconductor, the solar cell structures being formed on a starting substrate by epitaxial growth, and a second wafer having a plurality of independent drive circuits formed, so that the plurality of solar cell structures and the plurality of drive circuits are respectively superimposed; wiring the bonded wafer so that electric power can be supplied from the plurality of solar cell structures to the plurality of drive circuits respectively; and producing an electronic device having the drive circuit including the solar cell structure by dicing the bonded wafer. This provides a method for producing an electronic device including a drive circuit and a solar cell structure in one chip and having a suppressed production cost. 15-. (canceled)6. A method for producing an electronic device having a drive circuit comprising a solar cell structure , the method comprising the steps of:obtaining a bonded wafer by bonding a first wafer having a plurality of independent solar cell structures comprising a compound semiconductor, the solar cell structures being formed on a starting substrate by epitaxial growth, and a second wafer having a plurality of independent drive circuits formed, so that the plurality of solar cell structures and the plurality of drive circuits are respectively superimposed;wiring the bonded wafer so that electric power can be supplied from the plurality of solar cell structures to the plurality of drive circuits respectively; andproducing an electronic device having the drive circuit comprising the solar cell structure by dicing the bonded wafer.7. The method for producing an electronic device according to claim 6 , wherein the bonding is carried out using a thermosetting ...

METHOD OF MANUFACTURING STRUCTURES OF LEDS OR SOLAR CELLS

The invention disclosure relates to a manufacturing method comprising the formation of elemental LED or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate. 1. A manufacturing method , comprising:a) forming a plurality of LED or photovoltaic elemental structures on a first substrate, each of the LED or photovoltaic elemental structures comprising at least one p-type layer, an active zone and an n-type layer;b) forming a planar first metal layer on the elemental structures;c) providing a transfer substrate comprising a planar second metal layer on a surface of the transfer substrate;d) assembling the elemental structures with the transfer substrate by bonding of the first metal layer and the second metal layer, the bonding being carried out by molecular adhesion at room temperature; ande) removing the first substrate.2. The manufacturing method of claim 1 , wherein the elemental structures on the first substrate are spaced apart from each other by trenches.3. The manufacturing method of claim 2 , wherein the manufacturing method further comprises depositing an insulating material in the trenches present between the elemental structures between step a) and step b).4. The manufacturing method of claim 3 , wherein step a) further comprises forming each of the elemental structures on an island of relaxed or partially relaxed material.5. The manufacturing method of claim 4 , wherein the relaxed or partially relaxed material is InGaN.6. The manufacturing method of claim 5 , further comprising claim 5 , before step b) claim 5 , forming a p- or n-type electrical contact pad ...

SEMICONDUCTOR DEVICE FOR DIRECTLY CONVERTING RADIOISOTOPE EMISSIONS INTO ELECTRICAL POWER

A device for producing electricity. In one embodiment, the device comprises a doped germanium or a doped GaAs substrate and a plurality of stacked material layers (some of which are doped) above the substrate. These stacked material layers, which capture the beta particles and generate electrical current, may include, in various embodiments, GaAs, InAlP, InGaP, InAlGaP, AlGaAs, and other semiconductor materials. A beta particle source generates beta particles that impinge the stack, create electron-hole pairs, and thereby generate electrical current. In another embodiment the device comprises a plurality of epi-liftoff layers and a backing support material. 1. A device for producing electricity , comprising:a support material;a first plurality of stacked semiconductor material layers each doped a first dopant type and overlying the support material;a second plurality of stacked semiconductor material layers each doped a second dopant type and overlying the first plurality of semiconductor material layers;a first contact in electrical contact with one of the first plurality of semiconductor material layers or in electrical contact with the support material;a radioisotope source proximate or in contact with an uppermost layer of the second plurality of semiconductor material layers, the radioisotope source generating radioisotope particles or gamma rays;a second contact in electrical contact with one of the second plurality of semiconductor material layers; andelectricity produced between the first and second contacts by action of the radioisotope particles or the gamma rays within the device.2. The device of wherein an uppermost layer of the second plurality of stacked semiconductor material layers comprises a cap layer and the support material comprises a conductive material or a doped material claim 1 , wherein the first contact is in electrical contact with the conductive material or the doped material claim 1 , and the second contact is in electrical contact with ...

LATTICE MATCHABLE ALLOY FOR SOLAR CELLS

An alloy composition for a subcell of a solar cell is provided that has a bandgap of at least 0.9 eV, namely, GaInNAsSbwith a low antimony (Sb) content and with enhanced indium (In) content and enhanced nitrogen (N) content, achieving substantial lattice matching to GaAs and Ge substrates and providing both high short circuit currents and high open circuit voltages in GaInNAsSb subcells for multijunction solar cells. The composition ranges for GaInNAsSbare 0.07≦x≦0.18, 0.025≦y≦0.04 and 0.001≦z≦0.03. 1. An electron generating junction comprising a semiconductor alloy composition , wherein the semiconductor alloy composition is GaInNAsSb , wherein ,the content values for x, y, and z are within composition ranges as follows: 0.07≦x≦0.18, 0.025≦y≦0.04 and 0.001≦z≦0.03;{'sup': '2', 'the content levels are selected such that the semiconductor alloy composition exhibits a bandgap from 0.9 eV to 1.1 eV; and a short circuit current density Jsc greater than 13 mA/cmand an open circuit voltage Voc greater than 0.3 V when illuminated with a filtered 1 sun AM1.5D spectrum in which all light having an energy greater than the bandgap of GaAs is blocked.'}2. The electron generating junction of claim 1 , wherein the semiconductor alloy composition is characterized by a thickness from 1 μm to 2 μm.3. The electron generating junction of claim 1 , wherein the semiconductor alloy composition is characterized by a thickness greater than 1 μm.4. The electron generating junction of claim 1 , wherein the semiconductor alloy composition is substantially lattice matched to GaAs.5. The electron generating junction of claim 1 , wherein the semiconductor alloy composition is substantially lattice matched to Ge.6. The electron generating junction of claim 1 , wherein the semiconductor alloy composition is n-doped.7. The electron generating junction of claim 1 , wherein the semiconductor alloy composition is p-doped.8. The electron generating junction of claim 1 , wherein the semiconductor alloy ...

MULTIPLE-JUNCTION PHOTOVOLTAIC CELL BASED ON ANTIMONIDE MATERIALS

A photovoltaic cell is provided that can be used under high levels of solar concentration (≧1000 suns). The present cell includes at least one junction produced on a substrate based on gallium antimonide, the at least one junction having two alloys based on an antimonide material (GaAlAsSb) lattice-matched on the substrate GaSb. If there are several junctions, two neighbouring junctions are separated by a tunnel junction. 1. A photovoltaic cell that can be used under a high solar concentration , comprising: a cell comprising at least one junction produced on a substrate based on gallium antimonide GaSb , said at least one junction being produced on the substrate based on lattice-matched antimonide alloy.2. The photovoltaic cell according to claim 1 , characterized in that in the case of several junctions claim 1 , two adjacent junctions are separated by a tunnel junction claim 1 , and in that the junctions are constituted by alloys of the same nature and of different compositions claim 1 , all lattice-matched claim 1 , on the GaSb substrate.3. The photovoltaic cell according to claim 1 , characterized in that said at least one junction has a band gap energy gradient.4. The photovoltaic cell according to claim 1 , characterized in that the antimonide alloy is a quaternary material.5. The photovoltaic cell according to claim 4 , characterized in that the quaternary alloy is a GaAlAsSbmaterial.6. The photovoltaic cell according to claim 5 , characterized in that the GaAlAsSbmaterial is such that x is comprised between 0 and 1 claim 5 , and y=(0.0396·x)/(0.0446+0.0315·x).7. The photovoltaic according to claim 1 , characterized in that it comprises three junctions:a first junction based on two materials, each composed of gallium antimonide and respectively n-doped and p-doped;a second junction based on two materials, respectively n-doped and p-doped, each being a quaternary alloy comprising antimony; anda third junction based on two materials, respectively n-doped and p- ...

INVERTED METAMORPHIC MULTIJUNCTION SOLAR CELL WITH MULTIPLE METAMORPHIC LAYERS

The disclosure describes multi-junction solar cell structures that include two or more graded interlayers. 1. A multijunction solar cell comprising:an upper first solar subcell having a first band gap of 1.9 eV;a second solar subcell adjacent to said upper first solar subcell and having a second band gap of 1.41 eV;a first graded interlayer adjacent to said second solar subcell, said first graded interlayer having a third band gap greater than said second band gap and that is constant at 1.6 eV±3% throughout the thickness of the first graded interlayer; anda third solar subcell adjacent to said first graded interlayer, said third solar subcell having a fourth band gap of 1.02 eV, wherein said third solar subcell is lattice mismatched with respect to said second solar subcell;a second graded interlayer adjacent to said third solar subcell, said second graded interlayer having a fifth band gap greater than said fourth band gap and that is constant at approximately 1.1 eV throughout the thickness of the second graded interlayer; anda lower fourth solar subcell adjacent to said second graded interlayer, said lower fourth solar subcell having a sixth band gap of 0.67 eV wherein said fourth solar subcell is lattice mismatched with respect to said third solar subcell;{'sub': x', '1-x', 'y', '1-y, 'wherein each of the first and second graded interlayers is composed, respectively, of a compositionally step-graded series of (InGa)AlAs layers with monotonically changing lattice constant, with x and y selected such that the band gap of each interlayer remains constant throughout its thickness, and wherein 0 Подробнее

MULTIJUNCTION METAMORPHIC SOLAR CELL ASSEMBLY FOR SPACE APPLICATIONS

A multijunction solar cell and its method of manufacture including interconnected first and second discrete semiconductor regions disposed adjacent and parallel to each other in a single semiconductor body, including first top subcell, second (and possibly third) lattice matched middle subcells; a graded interlayer adjacent to the last middle solar subcell; and a bottom solar subcell adjacent to said graded interlayer being lattice mismatched with respect to the last middle solar subcell; wherein the interconnected regions form at least a four junction solar cell by a series connection being formed between the bottom solar subcell in the first semiconductor region and the bottom solar subcell in the second semiconductor region. 1. A multijunction solar cell having a terminal of a first polarity and a terminal of a second polarity comprising a semiconductor body including: an upper first solar subcell composed of a semiconductor material having a first band gap, and including a top contact on the top surface thereof;', 'a second solar subcell adjacent to said first solar subcell and composed of a semiconductor material having a second band gap smaller than the first band gap and being lattice matched with the upper first solar subcell;', 'a third solar subcell adjacent to said second solar subcell and composed of a semiconductor material having a third band gap smaller than the second band gap and being lattice matched with the second solar subcell;', 'an interlayer adjacent to said third solar subcell, said interlayer having a fourth band gap or band gaps greater than said third band gap; and', 'a fourth solar subcell adjacent to said interlayer and composed of a semiconductor material having a fifth band gap smaller than the fourth band gap and being lattice mismatched with the third solar subcell, and including a first contact on the top surface thereof, and a second contact on the bottom surface thereof;, '(a) a first semiconductor region including an upper first ...

MULTIJUNCTION SOLAR CELL ASSEMBLY FOR SPACE APPLICATIONS

A multijunction solar cell assembly and its method of manufacture including first and second discrete and different semiconductor body subassemblies which are electrically interconnected to form a five junction solar cell, each semiconductor body subassembly including first, second, third and fourth lattice matched subcells; wherein the average band gap of all four cells in each subassembly is greater than 1.44 eV. 1. A solar cell module including a terminal of first polarity and a terminal of second polarity comprising:a first semiconductor body including a tandem vertical stack of at least a first upper, a second and a bottom solar subcells; anda second semiconductor body disposed adjacent and parallel to the first semiconductor body and including a tandem vertical stack of at least a first upper, a second and a bottom solar subcells substantially identical to that of the first semiconductor body, the first upper subcell of the first and second semiconductor bodies having a top contact connected to the terminal of first polarity, the third bottom subcell of the second semiconductor body having a bottom contact connected to the terminal of second polarity;wherein the third subcell of the first semiconductor body is connected in a series electrical circuit with the third subcell of the second semiconductor body so that the interconnection of subcells of the first and second semiconductor bodies forms at least a four junction solar cell; andwherein the sequence of layers in the first and the second semiconductor bodies are different.2. A module as defined in claim 1 , wherein the upper first subcell of the first and second semiconductor bodies is composed of indium gallium phosphide (InGaP); the second solar subcell of the first and second semiconductor bodies disposed adjacent to and lattice matched to said upper first subcell claim 1 , the second solar subcell composed of aluminum gallium arsenide (AlGaAs) or indium gallium arsenide phosphide (InGaAsP) claim 1 , ...