СВЕТОДИОД ВЫСОКОЙ ЯРКОСТИ С ШЕРОХОВАТЫМ АКТИВНЫМ СЛОЕМ И СООТВЕТСТВУЮЩИМ ПО ФОРМЕ ПОКРЫТИЕМ

В изобретении раскрыты светоизлучающее устройство и способ его изготовления. Светоизлучающее устройство содержит первый слой, имеющий верхнюю и нижнюю поверхности, при этом упомянутая верхняя поверхность содержит первый материал с первым типом проводимости и имеет множество углублений в по существу плоской поверхности, причем упомянутые верхняя и нижняя поверхности характеризуются расстоянием между ними, являющимся меньшим в упомянутых углублениях, чем в областях вне упомянутых углублений; активный слой, лежащий над упомянутой верхней поверхностью упомянутого первого слоя, при этом упомянутый активный слой способен генерировать свет, характеризуемый длиной волны, когда в нем рекомбинируют дырки и электроны; второй слой, содержащий второй материал с вторым типом проводимости, причем упомянутый второй слой содержит слой покрытия, имеющий верхнюю поверхность и нижнюю поверхность, при этом упомянутая нижняя поверхность лежит над упомянутым активным слоем и соответствует по форме упомянутому ...

СВЕТОИЗЛУЧАЮЩЕЕ УСТРОЙСТВО, ВЫРАЩЕННОЕ НА КРЕМНИЕВОЙ ПОДЛОЖКЕ

Использование: для создания светоизлучающего устройства. Сущность изобретения заключается в том, что способ включает в себя выращивание полупроводниковой структуры на подложке, которая включает в себя алюминийсодержащий слой в непосредственном контакте с подложкой и III-нитридный светоизлучающий слой, расположенный между областью n-типа и областью p-типа. Способ дополнительно включает в себя удаление подложки и прозрачный материал в непосредственном контакте с алюминийсодержащим слоем. Технический результат: обеспечение возможности создания светоизлучающего устройства с улучшенным извлечением света. 1 н. и 11 з.п. ф-лы, 8 ил.

ОСНОВАНИЕ, НИТРИДНЫЙ ПОЛУПРОВОДНИКОВЫЙ ИЗЛУЧАЮЩИЙ УЛЬТРАФИОЛЕТОВОЕ ИЗЛУЧЕНИЕ ЭЛЕМЕНТ И СПОСОБ ПРОИЗВОДСТВА ОСНОВАНИЯ

Основание нитридного полупроводникового излучающего ультрафиолетовое излучение элемента, содержащее сапфировую подложку с одной из плоскости (0001) и плоскости, наклоненной на заданный угол относительно плоскости (0001), в качестве главной поверхности и слой AlN, сформированный непосредственно на главной поверхности сапфировой подложки и составленный из кристаллов AlN, имеющих ориентационную взаимосвязь эпитаксиальных кристаллов с главной поверхностью, причем средний диаметр частиц кристаллов AlN слоя AlN толщиной 20 нм от главной поверхности составляет 100 нм или менее. Изобретение обеспечивает возможность формирования основания нитридного полупроводникового излучающего ультрафиолетовое излучение элемента c улучшенной кристалличностью слоя AlN, за счет изменения режима выращивания кристаллов AlN относительно обычного режима. 4 н. и 11 з.п. ф-лы, 17 ил.

НИТРИДНОЕ ПОЛУПРОВОДНИКОВОЕ УСТРОЙСТВО И СПОСОБ ЕГО ИЗГОТОВЛЕНИЯ

... 1. Нитридное полупроводниковое устройство, включающее подложку из стабилизированного оксидом иттрия оксида циркония, ниже обозначаемого YSZ, и нитридный полупроводниковый слой, включающий кристалл InN гексагональной системы, причем указанный кристалл InN ориентирован своей с-осью приблизительно вертикально по отношению к плоскости (111) подложки YSZ. 2. Нитридное полупроводниковое устройство по п.1, у которого на плоскости (111) подложки YSZ образована атомная ступенька. 3. Нитридное полупроводниковое устройство, включающее подложку из ZnO, и нитридный полупроводниковый слой, включающий кристалл GaN гексагональной системы, причем указанный кристалл GaN ориентирован своей с-осью приблизительно вертикально по отношению к плоскости (000-1) или плоскости (0001) указанной ZnO подложки. 4. Нитридное полупроводниковое устройство по п.3, в котором на плоскости (000-1) или на плоскости (0001) указанной ZnO подложки образована атомная ступенька. 5. Нитридное полупроводниковое устройство, включающее ...

СПОСОБ ИЗГОТОВЛЕНИЯ НИТРИДНОГО ПОЛУПРОВОДНИКОВОГО ИЗЛУЧАЮЩЕГО УЛЬТРАФИОЛЕТОВОЕ ИЗЛУЧЕНИЕ ЭЛЕМЕНТА И НИТРИДНЫЙ ПОЛУПРОВОДНИКОВЫЙ ИЗЛУЧАЮЩИЙ УЛЬТРАФИОЛЕТОВОЕ ИЗЛУЧЕНИЕ ЭЛЕМЕНТ

Способ изготовления нитридного полупроводникового излучающего ультрафиолетовое излучение элемента, имеющего пиковую длину волны излучения 285 нм или более короткую, содержит первый этап, на котором формируют слой полупроводника n-типа, состоящий из полупроводника n-типа на основе AlGaN (1≥X≥0,5), на верхней поверхности нижележащей части, включающей сапфировую подложку, второй этап, на котором над слоем полупроводника n-типа формируют активный слой, который включает в себя светоизлучающий слой, состоящий из полупроводника на основе AlGaN (X>Y>0), и который в целом состоит из полупроводника на основе AlGaN, и третий этап, на котором формируют слой полупроводника p-типа, состоящего из полупроводника p-типа на основе AlGaN (1≥Z>Y), над активным слоем. В способе изготовления температура выращивания на втором этапе выше 1200°С и равна температуре выращивания на первом этапе или выше нее. 2 н. и 13 з.п. ф-лы, 6 ил.

СВЕТОИЗЛУЧАЮЩЕЕ ПОЛУПРОВОДНИКОВОЕ УСТРОЙСТВО

... 1. Светоизлучающее полупроводниковое устройство, содержащее: ! - подложку; ! - первый слой из полупроводника с проводимостью n-типа, сформированный на подложке; ! - второй слой из полупроводника с проводимостью р-типа; ! - активный слой, расположенный между первым и вторым слоями; ! - проводящий слой, расположенный на втором слое, ! - первый контакт, нанесенный на подложку, ! - второй контакт, нанесенный на проводящий слой, причем подложка содержит, по меньшей мере, одно сквозное отверстие, выполненное в форме усеченной инвертированной пирамиды, при этом первый, второй, активный и проводящий слои нанесены как на горизонтальные участки подложки, так и на внутренние грани отверстий. ! 2. Светоизлучающее полупроводниковое устройство по п.1, в котором количество граней упомянутых пирамид лежит в пределах от 3 до 24, длина боковой стороны основания пирамид лежит в пределах от 10 мкм до 1 мм, угол наклона боковых граней упомянутых пирамид по отношению к поверхности подложки лежит в пределах от ...

СПОСОБ СНИЖЕНИЯ ВНУТРЕННИХ МЕХАНИЧЕСКИХ РАПРЯЖЕНИЙ В ПОЛУПРОВОДНИКОВОЙ СТРУКТУРЕ И ПОЛУПРОВОДНИКОВАЯ СТРУКТУРА С НИЗКИМИ МЕХАНИЧЕСКИМИ НАПРЯЖЕНИЯМИ

... 1. Способ снижения внутренних механических напряжений в полупроводниковой структуре, образованной нитридами металлов группы III на (0001) ориентированной инородной подложке (1), отличающийся тем, что указанный способ включает стадии:- выращивания нитрида на инородной подложке (1) с образованием первого нитридного слоя (2);- формирования рельефа на первом нитридном слое (2) путем селективного удаления объемов из него до заданной глубины от верхней поверхности (5) первого нитридного слоя (2), для обеспечения релаксации внутренних механических напряжений в оставшихся частях слоя между удаленными объемами, и- выращивания на первом нитридном слое (2) дополнительного нитрида, начиная с оставшихся частей верхней поверхности (5) первого нитридного слоя (2) до формирования непрерывного второго нитридного слоя (8), с получением замкнутых пустот (7) из удаленных объемов под вторым нитридным слоем (8) внутри полупроводниковой структуры; при этом указанное выращивание включает выращивание дополнительного ...

ПОДЛОЖКА ДЛЯ ОПТИЧЕСКОЙ СИСТЕМЫ И ПОЛУПРОВОДНИКОВОЕ СВЕТОИЗЛУЧАЮЩЕЕ УСТРОЙСТВО

... 1. Подложка для оптической системы, содержащая тонкоструктурный слой, включающий в себя точки, состоящие из множества выпуклых участков или вогнутых участков, проходящих в направлении от главной поверхности подложки наружу поверхности,при этом тонкоструктурный слой образует множество точечных линий, в которых множество точек размещено с шагом Py в первом направлении на главной поверхности подложки, тогда как множество точечных линий образует множество точечных линий, размещенных с шагом Px во втором направлении, ортогональном первому направлению, на главной поверхности подложки, иодин из шага Py и шага Px является постоянным интервалом нанометрового диапазона, тогда как другой является непостоянным интервалом нанометрового диапазона, или оба они являются непостоянными интервалами нанометрового диапазона.2. Подложка для оптической системы по п. 1, в которой непостоянный интервал нанометрового диапазона имеет переменную ширину δ.3. Подложка для оптической системы по п. 1, в которой шаг Py ...

III-НИТРИДНЫЕ СВЕТОИЗЛУЧАЮЩИЕ УСТРОЙСТВА, ВЫРАЩЕННЫЕ НА ШАБЛОНЕ ДЛЯ УМЕНЬШЕНИЯ ДЕФОРМАЦИИ

... 1. Способ, в котором выращивают III-нитридную структуру на подложке, причем данная III-нитридная структура содержит: шаблон, содержащий: первый слой 22, выращенный непосредственно на подложке, причем первый слой, по существу, свободен от индия; первый, по существу, монокристаллический слой 24, выращенный над данным первым слоем; второй слой 26, выращенный над данным первым, по существу, монокристаллическим слоем, где второй слой является не монокристаллическим слоем, содержащим индий; и слои устройства, выращенные над шаблоном, причем слои устройства содержат III-нитридный светоизлучающий слой, расположенный между областью n-типа и областью р-типа. ! 2. Способ по п.1, в котором шаблон дополнительно содержит второй, по существу, монокристаллический слой 28, выращенный над вторым слоем 26. ! 3. Способ по п.2, в котором первый, по существу, монокристаллический слой 24 представляет собой GaN слой, а второй, по существу, монокристаллический слой 28 представляет собой InGaN слой с содержанием ...

СВЕТОИЗЛУЧАЮЩЕЕ УСТРОЙСТВО, ВЫРАЩЕННОЕ НА КРЕМНИЕВОЙ ПОДЛОЖКЕ

... 1. Устройство, содержащее:полупроводниковую структуру, включающую в себя:III-нитридный светоизлучающий слой, размещенный между областью n-типа и областью p-типа; иалюминийсодержащие слои, AlGaN-слой, расположенный на области n-типа, и AlN-слой, расположенный на AlGaN-слое;прозрачный материал, расположенный на AlN-слое.2. Устройство по п. 1, в котором поверхность прозрачного материала снабжена рисунком.3. Устройство по п. 1, в котором поверхность прозрачного материала структурирована.4. Устройство по п. 1, в котором поверхность пропускающего свет материала выполнена шероховатой.5. Устройство по п. 1, в котором граница раздела, расположенная между алюминийсодержащими слоями и светоизлучающей областью, неплоская.6. Устройство по п. 5, в котором неплоская граница раздела является границей раздела между AlGaN-слоем и областью n-типа.7. Устройство по п. 1, дополнительно включающее в себя пористый полупроводниковый слой, расположенный между алюминийсодержащими слоями и III-нитридным светоизлучающим ...

СВЕТОИЗЛУЧАЮЩИЙ ПРИБОР НА ОСНОВЕ НИТРИДА ЭЛЕМЕНТА III ГРУППЫ СО СВЕТОИЗЛУЧАЮЩИМ СЛОЕМ С УМЕНЬШЕННЫМИ НАПРЯЖЕНИЯМИ

... 1. Прибор, содержащий полупроводниковую структуру на основе нитрида элемента III группы, содержащий ! светоизлучающий слой 12, расположенный между областью 11 n-типа и областью 13 p-типа; и текстурированную поверхность, расположенную внутри 1000 Е светоизлучающего слоя. ! 2. Прибор по п.1, в котором светоизлучающий слой 12 является смежным с текстурированной поверхностью. ! 3. Прибор по п.1, в котором текстурированная поверхность расположена внутри области 11 n-типа. ! 4. Прибор по п.1, в котором текстурированная поверхность содержит элементы литографически сформированные на слое нитрида элемента III группы так, что элементы имеют в сечении профиль напоминающий выступы, разделенные углублениями. ! 5. Прибор по п.4, в котором наибольшее горизонтальное расстояние между двумя соседними выступами составляет менее чем 200 нм. ! 6. Прибор по п.1, в котором текстурированный слой содержит слой изоляционного материала 15, расположенный внутри полупроводниковой структуры, причем множество отверстий ...

GALLIUM NITRIDE MATERIALEN AND PROCEEDING FOR THE PRODUCTION OF LAYERS THESE MATERIALEN

PROCEDURE FOR THE BREED OF GAN SINGLE CRYSTALS

LICHTEMITTIERENDES SEMICONDUCTOR ELEMENT

LIGHT EMITTING INGAN DIODE WITH VERTICAL GEOMETRY

LICHTEMITTIERENDES SEMICONDUCTOR ELEMENT AND ASSOCIATED PRODUCTION PROCEDURE

LIGHT EMITTING DIODE WITH SILICON CARBIDE SUBSTRATE

PROCEDURE FOR THE PRODUCTION OF AN ELEMENT ON GANBASIS

GROWTH METHOD FOR A NITRIDE SEMICONDUCTOR

PROCEDURE FOR THE PRODUCTION OF AN INDIUM GALLIUM ALUMINUM NITRIDE THIN FILM ON A SILICON SUBSTRATE

IMPROVED BUFFER TO THE GROWTH OF GAN ON SAPPHIRE

Device and method for epitaxially growing gallium nitride layers

Highly efficient gallium nitride based light emitting diodes via surface roughening

Substrate with buffer layer for oriented nanowire growth

The present invention provides a substrate (1) with a bulk layer (3) and a buffer layer (4) having a thickness of less than 2 m arranged on the bulk layer (3) for growth of a multitude of nanowires (2) oriented in the same direction on a surface (5) of the buffer layer (4). A nanowire structure, a nanowire light emitting diode comprising the substrate (1) and a production method for fabricating the nanowire structure is also provided. The production method utilizes non-epitaxial methods for forming the buffer layer (4).

Nitride nanowires and method of producing such

LIGHT-EMITTING DIODE WITH SILICON CARBIDE SUBSTRATE

ELECTROLUMINESCENT SEMICONDUCTOR DEVICE

Buried activated p-(Al,In)GaN layers

Methods for fabricating semiconductor devices incorporating an activated p-(Al,In)GaN layer include exposing a p-(Al,In)GaN layer to a gaseous composition of H2 and/or NH 3 under conditions that would otherwise passivate the p-(Al,In)GaN layer. The methods do not include subjecting the p (Al,In)GaN layer to a separate activation step in a low hydrogen or hydrogen-free environment. The methods can be used to fabricate buried activated n/p-(Al,In)GaN tunnel junctions, which can be incorporated into electronic devices.

Iii-nitride quantum well structures with indium-rich clusters and methods of making the same

VERTICAL GEOMETRY INGAN LED

A vertical geometry light emitting diode is disclosed that is capable of emitting light in the red, green, blue, violet and ultraviolet portions of the electromagnetic spectrum. The light emitting diode includes a conductive silicon carbide substrate, an InGaN quantum well, a conductive buffer layer between the substrate and the quantum well, a respective undoped gallium nitride layer on each surface of the quantum well, and ohmic contacts in a vertical geometry orientation.

N-TYPE CONDUCTIVE ALUMINUM NITRIDE SEMICONDUCTOR CRYSTAL ANDMANUFACTURING METHOD THEREOF

After forming an AlN crystal layer on a single crystal substrate such as a sapphire substrate by HVPE, the substrate temperature is raised to 1,200~C or higher and a layer composed of an n-type conductive aluminum nitride sem iconductor crystal is rapidly formed thereon by HVPE, thereby obtaining a la minate. The n-type conductive aluminum nitride semiconductor crystal layer c ontains from 1 ~ 1018 to 5 ~ 1020 cm-3 of Siatoms, while containing substant ially no halogen atoms, and does not substantially absorb light having an en ergy of not more than 5.9 eV. Then, the n-type conductive aluminum nitride s emiconductor crystal layer is separated from the thus-obtained laminate, the reby obtaining a self-supporting substrate. Consequently, there is produced a self-supporting substrate composed of an n-type conductive aluminum nitrid e semiconductor crystal, which is useful for manufacturing a vertical conduc tion AlN semiconductor device.

Nitride Based Semiconductor Device and Manufacture Thereof

Buffer Structure Between Silicon Carbide and Gallium Nitride and Resulting Semiconductor Devices

NITRIDE SEMICONDUCTOR GROWTH METHOD, NITRIDE SEMICONDUCTOR SUBSTRATE, AND NITRIDE SEMICONDUCTOR DEVICE

A method of growing a nitride semiconductor crystal having very few crystal defects and capable of being used as a substrate, comprising the step of forming a first selective growth mask equipped with a plurality of first windows for selectively exposing the surface of a support on the support having a main plane and including different kinds of substrates made of materials different from those of a nitride semiconductor, and the step of growing the nitride semiconductor, by using a gaseous Group III element source and a gaseous nitrogen source, until portions of the nitride semiconductor crystal growing in adjacent windows from the surface of the support exposed from the window join with one another on the upper surface of the selective growth mask.

SEMICONDUCTOR LIGHT EMISSION EQUIPMENT ON GALLIUM NITRIDE BASIS AND PROCEDURE FOR THE PRODUCTION OF THE SAME.

Light Emitting Diode, Method Of Manufacturing The Same, And Method Of Manufacturing Light Emitting Diode Module

ENGINEERED SUBSTRATE STRUCTURE FOR POWER AND RF APPLICATIONS

Photonic device and manufacturing method thereof

The invention provides a photonic device and a manufacturing method thereof. The photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between thetop and bottom diode materials. Aspects of the present disclosure include a reduction in the costs of solar cells, light-emitting diodes, and other compound semiconductor devices by creating them on high-quality, large-area, low-cost silicon wafers.

Method for producing an optoelectronic semiconductor chip and optoelectronic semiconductor chip

TEMPLATE FOR EPITAXIAL GROWTH AND METHOD OF PREPARING SAME, AND NITRIDE SEMICONDUCTOR DEVICE

Semiconductor light emitting device and method for manufacturing the same

According to one embodiment, a semiconductor light emitting device includes first and second conductive layers, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting part. The second semiconductor layer is provided between the first conductive layer and the first semiconductor layer. The light emitting part is provided between the first and second semiconductor layers. The second conductive layer is in contact with the second semiconductor layer and the first conductive layer between the second semiconductor layer and the first conductive layer. The first and second conductive layers are transmittable to light emitted from the light emitting part. The first conductive layer includes a polycrystal having a first average grain diameter. The second conductive layer includes a polycrystal having a second average grain diameter of 150 nanometers or less and smaller than the first average grain diameter.

Manufacturing method of LED base plate, LED base plate and white light LED structure

Light-emitting diode chip and manufacturing method thereof and light-emitting diode with chip

The invention provides a light-emitting diode (LED) chip, a manufacturing method for the LED chip and an LED with the chip. The manufacturing method for the LED chip comprises the following steps of: firstly, providing a substrate, and forming a rough surface of raised micro structure on the front of the substrate; secondly, performing polishing treatment so that the rough surface forms a single crystal surface; and finally, growing epitaxial layers in turn on the front of the polished substrate by using lateral epitaxial growth technology or transverse epitaxial technology and forming electrodes. The substrate of the LED chip has the raised micro structure of the single crystal surface, so the lattice defects of the epitaxial layers can be reduced, the internal quantum efficiency is improved, meanwhile, the probability of full reflection of light in the LED chip can be reduced, and the external quantum efficiency is improved; therefore, the LED chip has high light extraction efficiency ...

A light emit diode epitaxial wafer and a preparation method thereof

Gallium nitride compound semiconductor light emitting element and light source provided with said light emitting element

In this gallium nitride compound semiconductor light emitting element, which is provided with an active layer, the active layer contains a well layer (104) and a wall layer (103). The well layer (104) and wall layer (103) are each semiconductor layers with an m-plane for the growth surface. The well layer (104) has a lower surface and an upper surface and has an In composition distribution in which the In composition changes according to the distance from the lower surface in the direction of the layer thickness of this well layer (104). The In composition of the well layer (104) exhibits a local minimum at a position a fixed distance from the lower surface, and the part of the well layer (104) exhibiting the local minimum in the In composition extends parallel to the lower surface.

For producing the at least one opto-electronic semiconductor chip method

Method of making a device

Light-emitting diode device and manufacturing method thereof

Light emitting diode and manufacturing method thereof

Vertical geometry light emitting diode with group III nitride active layer and extended lifetime

METHODS OF FORMING III/IV SEMICONDUCTOR MATERIALS AND SEMICONDUCTOR STRUCTURES FORMED USING THE SAME

METHOD FOR GROWING AT LEAST ONE NANOWIRE FROM A LAYER OF A TRANSITION METAL NITRIDE OBTAINED TWO-STAGE

Le procédé de croissance d'au moins un nanofil (3) semi-conducteur, ledit procédé de croissance comporte une étape de formation, au niveau d'un substrat (1), d'une couche de nucléation (2) pour la croissance du nanofil (3) et une étape de croissance du nanofil (3). L'étape de formation de la couche de nucléation (2) comporte les étapes suivantes : le dépôt sur le substrat (1) d'une couche d'un métal de transition (4) choisi parmi Ti, V, Cr, Zr, Nb, Mo, Hf, Ta ; la nitruration d'au moins une partie (2) de la couche de métal de transition de sorte à former une couche de métal de transition nitruré présentant une surface destinée à la croissance du nanofil (3).

Semiconductor structures with active regions comprising [...]

OPTOELECTRONIC DEVICE WITH THREE-DIMENSIONAL DIODE ARRAY

LIGHT TILE AND METHOD OF MANUFACTURING SUCH A LIGHT TILE

Dalle lumineuse comportant : - un substrat (68) comportant des connexions électriques ; - une matrice de micro-puces (16) solidarisées au substrat (68) et connectées aux connexions électriques pour leur pilotage, chaque micro-puce comportant un empilement : ○ d'un circuit de commande (20) à base de transistors formés dans un volume de silicium, ledit circuit étant connecté aux connexions du substrat ; ○ et d'une micro-LEDs (18) solidarisée sur le circuit de commande et connectée à ce dernier pour sa commande.

MEDIUM MANUFACTURING SEMICONDUCTOR-NITRIDES III

L'invention concerne un procédé de fabrication d'un support pour la fabrication d'une structure semi-conductrice à base de nitrures d'éléments III caractérisé en ce que le procédé comprend les étapes de : - formation (100) d'une couche tampon (20) sur un substrat (10), ladite couche tampon comprenant une couche de surface supérieure à base de nitrures d'éléments III, - dépôt (200) d'une couche cristalline (30) sur la couche tampon, ladite couche cristalline étant déposée à partir d'atomes de silicium de sorte à recouvrir la totalité de la surface de la couche supérieure à base de nitrures d'éléments III. L'invention concerne également un support obtenu par le procédé et une structure semi-conductrice basée sur le support et son procédé de fabrication.

On On PROCEDE INTEGRATION UN COMPOSANT DE TYPE III-N, TEL THAT DU GaN, SUR UN SUBSTRAT NOMINAL DE SILICIUM (001)

On On PROCEDE INTEGRATION UN COMPOSANT DE TYPE III-N, TEL THAT DU GaN, SUR UN SUBSTRAT NOMINAL DE SILICIUM (001)

On On PROCEDE INTEGRATION UN COMPOSANT DE TYPE III-N, TEL THAT DU GaN, SUR UN SUBSTRAT NOMINAL DE SILICIUM (001)

On On PROCEDE INTEGRATION UN COMPOSANT DE TYPE III-N, TEL THAT DU GaN, SUR UN SUBSTRAT NOMINAL DE SILICIUM (001)

On On PROCEDE INTEGRATION UN COMPOSANT DE TYPE III-N, TEL THAT DU GaN, SUR UN SUBSTRAT NOMINAL DE SILICIUM (001)

On On PROCEDE INTEGRATION UN COMPOSANT DE TYPE III-N, TEL THAT DU GaN, SUR UN SUBSTRAT NOMINAL DE SILICIUM (001)

COMPOSITE SUBSTRATE, AND METHOD FOR THE PRODUCTION OF A COMPOSITE SUBSTRATE

P-TYPE DOPING LAYERS FOR USE WITH LIGHT EMITTING DEVICES

... 발광 다이오드(LED)는 n-형 III-V족 반도체층, n-형 III-V족 반도체층에 인접한 활성층, 및 활성층에 인접한 p-형 III-V족 반도체층을 포함한다. 활성층은 1개 이상의 V-피트를 포함한다. p-형 III-V족 반도체층의 일부는 V-피트 내에 있다. p-형 III-V족 반도체층의 형성 중에 제공된 p-형 도펀트 주입층은 V-피트 내의 p-형 도펀트의 소정의 농도, 분포 및/또는 균일성을 제공하는 데 도움이 된다.

GROUP ? NITRIDE COMPOUND SEMICONDUCTOR DEVICE

METHODS AND DEVICES FOR FABRICATING AND ASSEMBLING PRINTABLE SEMICONDUCTOR ELEMENTS

NITRIDE SEMICONDUCTOR MULTILAYER STRUCTURE, METHOD FOR PRODUCING SAME, AND NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT

P-TYPE ALGAN LAYERM, METHOD FOR PRODUCING SAME AND GROUP Ⅲ NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT

COMPOUND SEMICONDUCTOR ELEMENT BASED ON GROUP ? ELEMENT NITRIDE

METHOD OF PRODUCING TEMPLATE FOR EPITAXIAL GROWTH AND NITRIDE SEMICONDUCTOR DEVICE

Method of manufacturing Light Emitting Diode using Heat Treatment and Light Emitting Diode of formed by using the same

METHOD FOR PRODUCING A GALLIUM NITRIDE EPITAXIAL LAYER

발광 소자

... 실시예에 따른 발광 소자는 제1 도전형의 불순물을 포함하는 제1 도전형의 GaN 기반 반도체층; 제2 도전형의 불순물을 포함하는 제2 도전형의 반도체층; 상기 제1 도전형의 GaN 기반 반도체층과 상기 제2 도전형의 반도체층 사이에 활성층; 상기 제1 도전형의 GaN 기반 반도체층과 상기 활성층 사이에 InxGa1-xN (0.3≤x≤1)의 조성식을 갖는 인듐을 포함하는 제1 질화물층; 및 상기 활성층과 상기 제2 도전형의 반도체층 사이에 상기 제1 질화물층 보다 인듐 조성이 낮은 인듐을 포함하는 제2 질화물층을 포함한다.

METHOD FOR FABRICATING A GROUP III NITRIDE SEMICONDUCTOR LIGHT-EMITTING DEVICE

The present disclosure relates to a method for fabricating a group III nitride semiconductor light-emitting device, comprising the steps of: providing a substrate; forming a first buffer layer on the substrate; forming a defect curing metal layer on the first buffer layer; and melting the defect curing metal layer, and enabling the molten defect curing metal layer to flow to the defects of the first buffer layer.

And semiconductor light-emitting device manufacturing method of semiconductor

METHOD FOR PRODUCING AN OPTOELECTRONIC SEMICONDUCTOR CHIP AND OPTOELECTRONIC SEMICONDUCTOR CHIP

OPTOELECTRONIC SEMICONDUCTOR CHIP AND USE OF AN INTERMEDIATE LAYER BASED ON AlGaN

COMPOUND SEMICONDUCTOR DEVICE WHICH USES OXIDE GRAPHENE AS A MASK AND A MANUFACTURING METHOD THEREOF

PURPOSE: A compound semiconductor device and a manufacturing method thereof are provided to control stress due to lattice constant difference by arranging oxide graphene between a substrate and a compound semiconductor layer. CONSTITUTION: An oxide graphene layer(110) is formed on a substrate(100). A first compound semiconductor layer(120) is formed on the oxide graphene layer. The oxide graphene layer comprises oxide graphene sheets. A part of the surface of the substrate is exposed between the oxide graphene sheets. The first compound semiconductor layer is touched with the exposed surface of the substrate between the oxide graphene sheets. COPYRIGHT KIPO 2012 ...

METHOD FOR MANUFACTURING A SUBSTRATE FOR A LIGHT EMITTING DIODE, A SUBSTRATE FOR THE LIGHT EMITTING DIODE MANUFACTURED BY THE METHOD AND A METHOD FOR MANUFACTURING THE LIGHT EMITTING DIODE WITH THE SUBSTRATE CAPABLE OF IMPROVING OPTICAL EXTRACTION EFFICIENCY

PURPOSE: A method for manufacturing a substrate for a light emitting diode, a substrate for the light emitting diode manufactured by the method and a method for manufacturing the light emitting diode with the substrate are provided to reduce total reflection by using an upper and a lower concavo-convex part. CONSTITUTION: A nanostructure is coated in the upper surface of a substrate member(s100). The nanostructure is spherical shape. An upper concavo-convex part is formed in the upper surface of the substrate member(s200). The nanostructure is coated in the lower surface of the substrate member(s500). A lower concavo-convex part is formed in the lower surface of the substrate member(s600). COPYRIGHT KIPO 2013 [Reference numerals] (AA) Start; (BB) End; (s100) Coating an upper surface of a substrate member as a nano structure; (s200) Forming a concavo-convex part on an upper surface of a substrate member by using a dry etching process; (s300) Forming a buffer layer on a concavo-convex part ...

GROUP III NITRIDE SEMICONDUCTOR VERTICAL CONFIGURATION LED CHIP AND METHOD OF MANUFACTURING SAME

SEMICONDUCTOR LIGHT EMITTING DEVICE CONFIGURED TO EMIT MULTIPLE WAVELENGTHS OF LIGHT

In accordance with embodiments of the invention, a Ill-nitride structure includes a plurality of posts of semiconductor material corresponding to openings in a mask layer (24). Each post includes a light emitting layer (28). Each light emitting layer is disposed between an n-type region (26) and a p-type region (30). A first light emitting layer (28) disposed in a first post is configured to emit light at a different wavelength than a second light emitting layer (28) disposed in a second post. In some embodiments, the wavelength emitted by each light emitting layer (28) is controlled by controlling the diameter of the posts, such that a device that emits white light without phosphor conversion may be formed. COPYRIGHT KIPO & WIPO 2010 ...

METHOD FOR MANUFACTURING SAPPHIRE SUBSTRATE, AND SEMICONDUCTOR DEVICE

MANUFACTURING METHOD OF A LIGHT EMITTING DEVICE CAPABLE OF BROADENING A COATING AREA OF A FLUORESCENT SUBSTANCE AND THE LIGHT EMITTING DEVICE MANUFACTURED THEREBY

PURPOSE: A manufacturing method of a light emitting device and the light emitting device manufactured thereby are provided to improve light emitting efficiency by arranging a coating area of a fluorescent substance to be close to an active layer(SQW or MQW). CONSTITUTION: An n-type gallium nitride semiconductor layer(n-GaN) is formed on a sapphire substrate(S1-1). An etching protection film on which a pattern is formed is formed(S1-2). An uneven portion serving as a template of a pillar shape or a hole shape is formed on an n-GaN layer(S1-3). The shape of the uneven portion on the n-GaN layer is maintained by epitaxially growing an active layer(MQW) through an MOCVD(Metalorganic Chemical Vapor Deposition) method or an MBE(Molecular Beam Epitaxy) method(S1-4). A PN junction light emitting diode substrate is manufactured on the top of the active layer while The shape of the uneven portion is to be maintained by epitaxially growing p-type Gallium Nitride(p-GaN) layer(S1-5). COPYRIGHT KIPO ...

METHOD FOR MANUFACTURING GALLIUM NITRIDE BASED COMPOUND SEMICONDUCTOR DEVICE HAVING COMPLIANT SUBSTRATE, WHICH EXCLUDES GROWING PROCESS OF BUFFER LAYER ON SAPPHIRE WAFER

PURPOSE: A method for manufacturing a gallium nitride based compound semiconductor device having a compliant substrate is provided to reduce manufacturing time of the semiconductor device by directly arranging a GaN based device on an AlGaInN compliant substrate. CONSTITUTION: A gallium nitride based compound semiconductor device includes a compliant substrate, a GaN based semiconductor layer(130), a first electrode(180), an activation layer(140), a second GaN layer(150), and a second electrode(170). The compliant substrate includes a GaN based thin film, which is grown on a sapphire wafer(110). The GaN based semiconductor layer is formed on a first region of the compliant substrate by a first height and on a second region by a second height, which is greater than the first height. The first electrode is formed on the GaN semiconductor layer, which is formed by the second height. The activation layer is formed on a first GaN layer, which is formed by the first height. The second GaN layer ...

SAPPHIRE SUBSTRATE WITH A PERIODIC STRUCTURE, WHICH INCLUDES A PLURALITY OF MICRO CAVITIES

PURPOSE: A sapphire substrate with a periodic structure is provided to obtain the periodic structure on a surface by being etched using a cladding layer as an etching template. CONSTITUTION: A sapphire substrate(21) and a plurality of nano-size balls are prepared. A cladding layer is deposited in gaps between a part of the surface of the sapphire substrate and the balls through a chemical vapor deposition. A plurality of micro cavities(202) is formed on the surface of the sapphire substrate by eliminating the balls and the cladding layer. The micro cavities are arranged in an array. Planes(201) are formed between two adjacent micro cavities. COPYRIGHT KIPO 2011 ...

NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND A METHOD OF MANUFACTURING THE SAME BY FORMING A NANO-SIZED STRUCTURE ON A SURFACE OF A SUBSTRATE

PURPOSE: A nitride semiconductor light emitting device and a manufacturing method thereof are provided to emit effectively the photon generated in the light emitting device outwardly by forming a nano-sized structure on a surface of a substrate. CONSTITUTION: A light emitting device includes a nano-sized structure(113) formed on a substrate(111) and having an uneven surface, and a nitride junction element formed on the substrate. The nano-sized structure has a size of 100nm or more, a diameter of 100 to 1000nm, and a height of 100 to 600nm. The nitride junction element has a first nitride layer(117) formed on the substrate, an active layer(119) formed on the first nitride layer, and a second nitride layer(121) formed on the active layer. © KIPO 2008 ...

SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING SAME

A semiconductor light emitting device according to the embodiment of the present invention includes a base layer made of a first conductivity type semiconductor, a mask layer which is arranged on the base layer and has opening parts for exposing part of the base layer, and nano-light emitting structures which are arranged on the opening part and include a first conductivity type semiconductor core, an active layer and a second conductivity type semiconductor core, respectively. The nano-light emitting structures include a body part of a pillar shape on the mask layer and an upper end part of a cone shape arranged on the body part. In the nano-light emitting structures, the rate of arranging the apex of the upper end part within a distance of 1.5% of the width of the body from the central vertical axis of the body part is 60% or more. COPYRIGHT KIPO 2016 ...

Semiconductor Light Emitting Diode Comprising Uneven Substrate

REDUCING OR ELIMINATING NANOPIPE DEFECTS IN III-NITRIDE STRUCTURES

NITRIDE LIGHT EMITTING DEVICE HAVING HIGH LUMINANCE AND METHOD FOR MANUFACTURING OF THE SAME

반도체 소자

... 실시 예는 기판; 상기 기판 상에 배치되는 버퍼층; 상기 버퍼층 상에 배치되는 필터층; 상기 필터층 상에 배치되는 제1 도전형 제1 반도체층; 상기 제1 도전형 제1 반도체층 상에 배치되는 광흡수층; 상기 광흡수층 상에 배치되는 제1 도전형 제2 반도체층; 상기 제1 도전형 제2 반도체층 상에 배치되는 증폭층; 및 상기 증폭층 상에 배치되는 제2 도전형 반도체층을 포함하고, 상기 버퍼층은 AlGaN을 포함하는 제1 층을 포함하고, 상기 제1 층은 상기 기판에 가장 인접하게 배치된 제1 면과 상기 필터층과 가장 인접하게 배치된 제2 면을 포함하고, 상기 제1 면은 상기 제2 면보다 Al 조성이 큰 반도체 소자를 개시한다.

SEMICONDUCTOR LIGHT EMITTING DIODE FOR IMPROVING A STRUCTURE OF AN INTERNAL LAYER AND A LATERAL EMITTING CHARACTERISTIC OF AN ACTIVE LAYER

PURPOSE: A semiconductor light emitting diode is provided to enhance light emitting characteristics by improving lateral emitting characteristics of a buffer layer. CONSTITUTION: A buffer layer(120) is grown on an upper surface of a substrate(110). An N-type semiconductor layer(130) is formed with a chemical compound semiconductor and is grown on the buffer layer. The N-type semiconductor layer includes an N electrode pad. An active layer(140) is grown on the N-type semiconductor layer. A P-type semiconductor layer(150) is formed with a chemical compound semiconductor. The P-type semiconductor layer is grown on the active layer and includes a P electrode pad. The buffer layer is grown and has the thickness of 5-15 micrometers. © KIPO 2008 ...

RELAXATION AND TRANSFER OF STRAINED LAYERS

METHOD OF GROWING SEMICONDUCTOR HETERO-STRUCTURES BASED ON GALLIUM NITRIDE, CAPABLE OF EXTENDING QUANTUM EFFICIENCY AND A LIFETIME

PURPOSE: A method of growing semiconductor hetero-structures based on a gallium nitride is provided to reduce a defect density and a mechanical stress by performing the weather deposition step of one or multiple hetero-structure layers. CONSTITUTION: A gallium nitride group semiconductor hetero-structure growth process comprises a weather deposition step of one expressed as the general equation AlxGa1-xN(0 Подробнее

NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING DEVICE

The present invention relates to a nitride-based semiconductor light-emitting device, comprising: a substrate; a void inducing groove formed at the substrate; a void inducing pattern embossed on the substrate to form the void inducing groove; a nitride-based semiconductor layer formed on the void inducing pattern; and a three-dimensional void defined by the void inducing groove and the nitride-based semiconductor layer.

이온빔을 활용한 LED발광소자의 전극층을 형성하는 방법

... 본 발명은 이온빔을 활용한 LED발광소자의 전극층을 형성하는 방법으로서, 더욱 상세하게는 P형반도체층에서의 N-결손으로 인한 결함을 제거하여 LED발광소자의 액티베이션 효율을 향상시키는, 이온빔을 활용한 LED발광소자의 전극층을 형성하는 방법에 관한 것이다.

Chemical vapor deposition apparatus and method of forming semiconductor epitaxial thin film using the same

A chemical vapor deposition apparatus includes: a reaction chamber including an inner tube having a predetermined volume of an inner space, and an outer tube tightly sealing the inner tube; a wafer holder disposed within the inner tube and on which a plurality of wafers are stacked at predetermined intervals; and a gas supply unit including at least one gas line supplying an external reaction gas to the reaction chamber, and a plurality of spray nozzles communicating with the gas line to spray the reaction gas to the wafers, whereby semiconductor epitaxial thin films are grown on the surfaces of the wafers, wherein the semiconductor epitaxial thin film grown on the surface of the wafer includes a light emitting structure in which a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer are sequentially formed.

Techniques of Forming Ohmic Contacts on GaN Light Emitting Diodes

A method of forming ohmic contacts on a light emitting diode that features a surface treatment of a substrate includes exposing a surface of a p-type gallium nitride layer to an acid-containing solution and a buffered oxide etch process. A quantum well is formed in a gallium nitride substrate and a layer of p-type gallium nitride is deposited over the quantum well. The surface of the p-type gallium nitride is exposed to an acid-containing solution and then a buffered oxide etch process is performed to provide an etched surface. A metal stack including a layer of silver disposed between layers of platinum is then deposited.

Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing

Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.

Method for fabricating group iii-nitride semiconductor

A method of fabricating a group III-nitride semiconductor includes the following steps of forming a first patterned mask layer with a plurality of first openings deposited on an epitaxial substrate; epitaxially growing a group III-nitride semiconductor layer over the epitaxial substrate and covering at least part of the first patterned mask layer; etching the group III-nitride semiconductor layer to form a plurality of second openings, which are substantially at least partially aligned with the first openings; and epitaxially growing the group III-nitride semiconductor layer again.

High-reflectivity and low-defect density LED structure

The present invention discloses a high-reflectivity and low-defect density LED structure. A patterned dielectric layer is embedded in a sapphire substrate via semiconductor processes, such as etching and deposition. The dielectric layer is formed of two materials which are alternately stacked and have different refractive indexes. An N-type semiconductor layer, an activation layer and a light emitting layer which is a P-type semiconductor layer are sequentially formed on the sapphire substrate. An N-type electrode and a P-type electrode are respectively coated on the N-type semiconductor layer and the P-type semiconductor layer. The dielectric layer can lower the defect density of the light emitting layer during the epitaxial growth process. Further, the dielectric layer can function as a high-reflectivity area to reflect light generated by the light emitting layer and the light is projected downward to be emitted from the top or the lateral. Thereby is greatly increased the light-extraction efficiency.

Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device

A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 μm-10 μm thick edge process-induced degradation layer.

Method for fabricating wafer product and method for fabricating gallium nitride based semiconductor optical device

Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S 105 , a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11 a of a gallium oxide substrate 11 . After the growth of the buffer layer 13 , while supplying a gas G 2 , which contains hydrogen and nitrogen, into a growth reactor 10 , the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.

Heterogeneous substrate, nitride-based semiconductor device using same, and manufacturing method thereof

Provided are a heterogeneous substrate, a nitride-based semiconductor device using the same, and a manufacturing method thereof to form a high-quality non-polar or semi-polar nitride layer on a non-polar or semi-polar plane of the heterogeneous substrate by adjusting a crystal growth mode. A base substrate having one of a non-polar plane and a semi-polar plane is prepared, and a nitride-based nucleation layer is formed on the plane of the base substrate. A first buffer layer is grown faster in the vertical direction than in the lateral direction on the nucleation layer. A lateral growth layer is grown faster in the lateral direction than in the vertical direction on the first buffer layer. A second buffer layer is formed on the lateral growth layer. A silicon nitride layer having a plurality of holes may be formed between the lateral growth layer on the first buffer layer and the second buffer layer.

Method for Fabricating a Vertical Light-Emitting Diode with High Brightness

A method for fabricating a vertical light-emitting diode comprises forming a stack including a plurality of epitaxial layers on a patterned first substrate, placing a second substrate on the stack, removing the first substrate to expose the first surface, planarizing a first surface of the stack that was in contact with the patterned first substrate and has a pattern corresponding to a pattern provided on the first substrate to form a planarized second surface, and forming a first electrode in contact with a side of the second substrate that is opposite to the stack, and a second electrode in contact with the second surface of the stack. A roughening step can be performed to form uneven surface portions on a region of the second surface for improving light emission through the second surface of the stack.

IN-SITU DEFECT REDUCTION TECHNIQUES FOR NONPOLAR AND SEMIPOLAR (Al, Ga, In)N

A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiN x ) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiN x nanomask layer.

Limiting strain relaxation in iii-nitride hetero-structures by substrate and epitaxial layer patterning

A method of fabricating a substrate for a semipolar III-nitride device, comprising patterning and forming one or more mesas on a surface of a semipolar III-nitride substrate or epilayer, thereby forming a patterned surface of the semipolar III-nitride substrate or epilayer including each of the mesas with a dimension/along a direction of a threading dislocation glide, wherein the threading dislocation glide results from a III-nitride layer deposited heteroepitaxially and coherently on a non-patterned surface of the substrate or epilayer.

Method for manufacturing semiconductor light emitting device

One embodiment provides a method for manufacturing a semiconductor light emitting device, including: forming a semiconductor light emitting device wafer, by: forming a plurality of semiconductor layers on a principal surface of a substrate; and forming a P-type semiconductor layer on the semiconductor layers as an uppermost layer; and forming a plurality of surface irregularities on the P-type semiconductor layer, by putting the semiconductor light emitting device wafer into a heat treating furnace; and performing a heat treatment on the semiconductor light emitting device wafer with (i) a mixed gas of hydrogen and ammonia or (ii) a mixed gas of nitrogen and ammonia.

High power, high efficiency and low efficiency droop iii-nitride light-emitting diodes on semipolar substrates

A III-nitride light emitting diode grown on a semipolar {20-2-1} plane of a substrate and characterized by high power, high efficiency and low efficiency droop.

Light emitting diode and method for fabricating the same

The disclosed light emitting diode includes a substrate provided, at a surface thereof, with protrusions, a buffer layer formed over the entirety of the surface of the substrate, a first semiconductor layer formed over the buffer layer, an active layer formed on a portion of the first semiconductor layer, a second semiconductor layer formed over the active layer, a first electrode pad formed on another portion of the first semiconductor layer, except for the portion where the active layer is formed, and a second electrode pad formed on the second semiconductor layer. Each protrusion has a side surface inclined from the surface of the substrate at a first angle, and another side surface inclined from the surface of the substrate at a second angle different from the first angle.

Epitaxial Structure With An Epitaxial Defect Barrier Layer And Methods Making The Same

An epitaxial structure for an LED is provided. The epitaxial structure includes a patterned epitaxial defect barrier layer disposed over a first portion of a substantially flat substrate to expose a second portion of the substrate. The epitaxial structure also includes a patterned buffer layer over the second portion of the substrate. The epitaxial structure further includes a first semiconductor layer over the patterned buffer layer and the patterned epitaxial defect barrier layer, an active layer over the first semiconductor layer, and a second semiconductor layer over the active layer.

High-quality non-polar/semi-polar semiconductor element on tilt substrate and fabrication method thereof

Provided are a high-quality non-polar/semi-polar semiconductor device and a manufacturing method thereof. A template layer is formed on a corresponding off-axis of the sapphire crystal plane tilted in a predetermined direction to reduce the defect density of the semiconductor device and improve the internal quantum efficiency and light extraction efficiency thereof. In the method for manufacturing the semiconductor device, a template layer and a semiconductor device structure are formed on a sapphire substrate having a crystal plane for growing a non-polar or semi-polar nitride semiconductor layer. The crystal plane of the sapphire substrate is tilted in a predetermined direction, and the template layer includes a nitride semiconductor layer and a GaN layer on the tilted sapphire substrate.

Light emitting diode chip and method for manufacturing the same

A method for manufacturing a light emitting diode chip, comprising steps: providing a substrate with a first patterned blocking layer formed thereon; growing a first n-type semiconductor layer on the substrate between the constituting parts of first patterned blocking layer, and stopping the growth of the first n-type semiconductor layer before the first n-type semiconductor layer completely covers the first patterned blocking layer; removing the first patterned blocking layer, whereby a plurality of first holes are formed at position where the first patterned blocking layer is originally existed; continuing the growth of the first n-type semiconductor layer until the first holes are completely covered by the first n-type semiconductor layer; and forming an active layer and a p-type current blocking layer on the first n-type semiconductor layer successively.

Nitride-type semiconductor element and process for production thereof

A nitride-based semiconductor device includes a p-type Al d Ga e N layer 25 whose growing plane is an m-plane and an electrode 30 provided on the p-type Al d Ga e N layer 25 . The Al d Ga e N layer 25 includes a p-Al d Ga e N contact layer 26 that is made of an Al x Ga y In z N (x+y+z=1, x≧0, y>0, z≧0) semiconductor, which has a thickness of not less than 26 nm and not more than 60 nm. The p-Al d Ga e N contact layer 26 includes a body region 26 A which contains Mg of not less than 4×10 19 cm −3 and not more than 2×10 20 cm −3 and a high concentration region 26 B which is in contact with the electrode 30 and which has a Mg concentration of not less than 1×10 21 cm −3 .

Method for lift-off of light-emitting diode substrate

The present invention discloses a method for lift-off of an LED substrate. By eroding the sidewall of a GaN epitaxial layer, cavity structures are formed, which may act in cooperation with a non-fully filled patterned sapphire substrate from epitaxial growth to cause the GaN epitaxial layer to separate from the sapphire substrate. The method according to an embodiment of the present invention can effectively reduce the dislocation density in the growth of a GaN-based epitaxial layer; improve lattice quality, and realize rapid lift-off of an LED substrate, and has the advantages including low cost, no internal damage to the GaN film, elevated performance of the photoelectric device and improved luminous efficiency.

Defect-controlling structure for epitaxial growth, light emitting device containing defect-controlling structure, and method of forming the same

A method for reducing dislocations or other defects in a light emitting device, such as light emitting diode (LED), by in-situ introducing nanoparticles into at least one of a defect-controlling layer, an n-type layer, a p-type layer, and a quantum well of the light emitting device. A light emitting device is provided, and nanoparticles are dispensed in-situ in at least one of a defect-controlling layer, an n-type layer, a p-type layer, and a quantum well of the light emitting device.

High-quality non-polar/semi-polar semiconductor device on porous nitride semiconductor and manufacturing method thereof

Provided are a high-quality non-polar/semi-polar semiconductor device having reduced defect density of a nitride semiconductor layer and improved internal quantum efficiency and light extraction efficiency, and a manufacturing method thereof. The method for manufacturing a semiconductor device is to form a template layer and a semiconductor device structure on a sapphire, SiC or Si substrate having a crystal plane for a growth of a non-polar or semi-polar nitride semiconductor layer. The manufacturing method includes: forming a nitride semiconductor layer on the substrate; performing a porous surface modification such that the nitride semiconductor layer has pores; forming the template layer by re-growing a nitride semiconductor layer on the surface-modified nitride semiconductor layer; and forming the semiconductor device structure on the template layer.

Nitride based light emitting device with excellent crystallinity and brightness and method of manufacturing the same

Disclosed is a nitride-based light emitting device having an inverse p-n structure in which a p-type nitride layer is first formed on a growth substrate. The light emitting device includes a growth substrate, a powder type seed layer for nitride growth formed on the growth substrate, a p-type nitride layer formed on the seed layer for nitride growth, a light emitting active layer formed on the p-type nitride layer, and an n-type ZnO layer formed on the light emitting active layer. The p-type nitride layer is first formed on the growth layer and the n-type ZnO layer having a relatively low growth temperature is then formed thereon instead of an n-type nitride layer, thereby providing excellent crystallinity and high brightness. A method of manufacturing the same is also disclosed.

Nitride based light emitting device using silicon substrate and method of manufacturing the same

Disclosed is a nitride-based light emitting device using a silicon substrate. The nitride-based light emitting device includes a silicon (Si) substrate, a seed layer for nitride growth formed on the silicon substrate, and a light emitting structure formed on the seed layer and having a plurality of nitride layers stacked therein. The seed layer for nitride growth is comprised of GaN powders, thereby minimizing occurrence of dislocations caused by a difference in lattice constant between a nitride layer and the silicon substrate. A method of manufacturing the same is also disclosed.

Nitride based light emitting device with excellent crystallinity and brightness and method of manufacturing the same

Disclosed is a nitride-based light emitting device capable of improving crystallinity and brightness. The nitride-based light emitting device includes a growth substrate, a lattice buffer layer formed on the growth substrate, a p-type nitride layer formed on the lattice buffer layer, a light emitting active layer formed on the p-type nitride layer, and an n-type ZnO layer formed on the light emitting active layer. The lattice buffer layer is formed of powders of a material having a Wurtzite lattice structure. The lattice buffer layer is formed of ZnO powders, thereby minimizing generation of dislocations during nitride growth. A method of manufacturing the same is also disclosed.

Semiconductor device and method for manufacturing same

According to an embodiment, a semiconductor device includes a substrate, a nitride layer and a nitride semiconductor layer. The substrate includes an indented structure provided at a major surface. The nitride layer provided entirely on the major surface is at least one of polycrystalline and amorphous, and includes at least one of p-type impurity and n-type impurity. The nitride semiconductor layer is provided on the nitride layer.

method for reducing internal mechanical stresses in a semiconductor structure and a low mechanical stress semiconductor structure

A semiconductor structure with low mechanical stresses, formed of nitrides of group III metals on a (0001) oriented foreign substrate ( 1 ) and a method for reducing internal mechanical stresses in a semiconductor structure formed of nitrides of group III metals on a (0001) oriented foreign substrate ( 1 ). The method comprises the steps of; growing nitride on the foreign substrate ( 1 ) to form a first nitride layer ( 2 ); patterning the first nitride layer ( 2 ) by selectively removing volumes of it to a predetermined depth from the upper surface of the first nitride layer ( 2 ), for providing relaxation of mechanical stress σ in the remaining portions of the layer between the removed volumes; and growing, on the first nitride layer ( 2 ), additional nitride until a continuous second nitride layer ( 8 ) is formed, the second nitride layer ( 8 ) enclosing voids ( 7 ) from the removed volumes under the second nitride layer ( 8 ) inside the semiconductor structure.

Light emitting device and method for manufacturing the same

Disclosed are a light emitting device, a method for manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer, an active layer comprising a well layer and a barrier layer on the first conductive layer, and a second conductive semiconductor layer on the active layer. The well layer includes a first well layer closest to the first conductive semiconductor layer and having a first energy bandgap, a third well layer closest to the second conductive semiconductor layer and having a third energy bandgap, and a second well layer interposed between the first and third well layers and having a second energy bandgap. The third energy bandgap of the third well layer is greater than the second energy bandgap of the second well layer.

Heterostructure for electronic power components, optoelectronic or photovoltaic components

A heterostructure that includes, successively, a support substrate of a material having an electrical resistivity of less than 10 −3 ohm·cm and a thermal conductivity of greater than 100 W·m −1 ·K −1 , a bonding layer, a first seed layer of a monocrystalline material of composition Al x In y Ga (1-x-y) N, a second seed layer of a monocrystalline material of composition Al x In y Ga (1-x-y) N, and an active layer of a monocrystalline material of composition Al x In y Ga (1-x-y) N, and being present in a thickness of between 3 and 100 micrometers. The materials of the support substrate, the bonding layer and the first seed layer are refractory at a temperature of greater than 750° C., the active layer and second seed layer have a difference in lattice parameter of less than 0.005 Å, the active layer is crack-free, and the heterostructure has a specific contact resistance between the bonding layer and the first seed layer that is less than or equal to 0.1 ohm·cm 2 .

Gallium-nitride light emitting diode and manufacturing method thereof

The present disclosure relates to a gallium-nitride light emitting diode and a manufacturing method thereof and the gallium-nitride light emitting diode includes an n-type nitride semiconductor layer formed on a substrate; an active layer formed on the n-type nitride semiconductor layer; a p-type doped intermediate layer formed on the active layer; and a p-type nitride semiconductor layer formed on the intermediate layer.

Group iii nitride semiconductor multilayer structure and production method thereof

According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer.

Epitaxial growth method and devices

Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Method of Selective Photo-Enhanced Wet Oxidation for Nitride Layer Regrowth on Substrates

Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a method may comprise: forming a first III-nitride layer with a first low bandgap energy on a first surface of a substrate; forming a second III-nitride layer with a first high bandgap energy on the first III-nitride layer; transforming portions of the first III-nitride layer into a plurality of III-oxide stripes by photo-enhanced wet oxidation; forming a plurality of III-nitride nanowires with a second low bandgap energy on the second III-nitride layer between the III-oxide stripes; and selectively transforming at least some of the III-nitride nanowires into III-oxide nanowires by selective photo-enhanced oxidation.

GaN FILM STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

A method of fabricating a gallium nitride (GaN) thin layer structure includes forming a sacrificial layer on a substrate, forming a first buffer layer on the sacrificial layer, forming an electrode layer on the first buffer layer, forming a second buffer layer on the electrode layer, partially etching the sacrificial layer to form at least two support members configured to support the first buffer layer and define at least one air cavity between the substrate and the first buffer layer, and forming a GaN thin layer on the second buffer layer.

Semiconductor light emitting device with light extraction structures

Structures are incorporated into a semiconductor light emitting device which may increase the extraction of light emitted at glancing incidence angles. In some embodiments, the device includes a low index material that directs light away from the metal contacts by total internal reflection. In some embodiments, the device includes extraction features such as cavities in the semiconductor structure which may extract glancing angle light directly, or direct the glancing angle light into smaller incidence angles which are more easily extracted from the device.

Lateral-epitaxial-overgrowth thin-film led with nanoscale-roughened structure and method for fabricating the same

The present invention discloses a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure and a method for fabricating the same. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure comprises a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode with a lateral-epitaxial-growth technology, and a second electrode formed on the semiconductor structure, wherein a nanoscale-roughened structure is formed on the semiconductor structure except the region covered by the second electrode. The present invention uses lateral epitaxial growth to effectively inhibit the stacking faults and reduce the thread dislocation density in the semiconductor structure to improve the crystallization quality of the light-emitting layer and reduce leakage current. Meanwhile, the surface roughened structure on the semiconductor structure can promote the external quantum efficiency.

Light emitting diode and method for manufacturing the same

A light emitting diode and a light emitting diode (LED) manufacturing method are disclosed. The LED comprises a substrate; a first n-type GaN layer; a second n-type GaN layer; an active layer; and a p-type GaN layer formed on the substrate in sequence; the second n-type GaN layers has a bottom surface interfacing with the first n-type GaN layer, a rim of the bottom surface has a roughened exposed portion, and Ga—N bonds on the bottom surface has an N-face polarity.

Method for making light emitting diode

A method of making a LED includes following steps. A substrate is provided, and the substrate includes an epitaxial growth surface. A carbon nanotube layer is placed on the epitaxial growth surface. A first semiconductor layer, an active layer, and a second semiconductor layer are grown in that order on the substrate. A reflector and a first electrode are deposited on the second semiconductor layer in that order. The substrate is removed. A second electrode is deposited on the first semiconductor layer.

Nitride Light-Emitting Diode with a Current Spreading Layer

A nitride light-emitting diode is provided including a current spreading layer. The current spreading layer includes a first layer having a plurality of distributed insulating portions configured to have electrical current flow therebetween; and a second layer including interlaced at least one substantially undoped nitride semiconductor layer and at least one n-type nitride semiconductor layer configured to spread laterally the electrical current from the first layer

Nitride semiconductor light emitting element and method for manufacturing the same

A nitride semiconductor light emitting element has: a substrate for growth; an n-type nitride semiconductor layer formed on the substrate for growth; a light emitting layer formed on the n-type nitride semiconductor layer; and a p-type nitride semiconductor layer formed on the light emitting layer, wherein pipe holes are formed at a density of 5000 pipe holes/cm 2 or less, each of which extends substantially vertically from a surface of the n-type nitride semiconductor layer on the light emitting layer side toward the substrate and has a diameter of 2 to 200 nm.

Method for Reducing Stress in Epitaxial Growth

A device and method for making the same are disclosed. The device includes a substrate having a first TEC, a stress relief layer overlying the substrate, and crystalline cap layer. The crystalline cap layer overlies the stress relief layer. The cap layer has a second TEC different from the first TEC. The stress relief layer includes an amorphous material that relieves stress between the crystalline substrate and the cap layer arising from differences in the first and second TECs at a growth temperature at which layers are grown epitaxially on the cap layer. The device can be used to construct various semiconductor devices including GaN LEDs that are fabricated on silicon or SiC wafers. The stress relief layer is generated by converting a layer of precursor material on the substrate after the cap layer has been grown to a stress-relief layer.

Method for manufacturing nitride semiconductor device, nitride semiconductor light-emitting device, and light-emitting apparatus

Provided is a method for manufacturing a nitride semiconductor device, including the steps of: forming an AlNO buffer layer containing at least aluminum, nitrogen, and oxygen on a substrate; and forming a nitride semiconductor layer on the AlNO buffer layer, wherein, in the step of forming the AlNO buffer layer, the AlNO buffer layer is formed by a reactive sputtering method using aluminum as a target in an atmosphere to and from which nitrogen gas and oxygen gas are continuously introduced and exhausted, and the atmosphere is an atmosphere in which a ratio of a flow rate of the oxygen gas to a sum of a flow rate of the nitrogen gas and the flow rate of the oxygen gas is not more than 0.5%.

Solid state lighting devices with reduced crystal lattice dislocations and associated methods of manufacturing

Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state lighting device includes a substrate material having a substrate surface and a plurality of hemispherical grained silicon (“HSG”) structures on the substrate surface of the substrate material. The solid state lighting device also includes a semiconductor material on the substrate material, at least a portion of which is between the plurality of HSG structures.

Semiconductor light-emitting device

To improve light extraction efficiency. A semiconductor light-emitting device wherein each layer is formed of a Group III nitride-based compound semiconductor. The light-emitting device comprises a sapphire substrate having a plurality of stripe-patterned grooves 11 arranged in parallel to a first direction (x axis) on a surface of the substrate 10 , a dielectric 15 discontinuously formed at least in the first direction on the surface 10 a of the sapphire substrate and in the grooves 11 , a base layer being grown on side surfaces of the grooves and made of a Group III nitride-based compound semiconductor covering the surface 10 a of the sapphire substrate and the top surfaces 15 a of the dielectrics 15 , and a device layer constituting a light-emitting device formed on the base layer.

Method for producing a group iii nitride semiconductor light-emitting device

The present invention is a method for producing a light- emitting device whose p contact layer has a p-type conduction and a reduced contact resistance with an electrode. On a p cladding layer, by MOCVD, a first p contact layer of GaN doped with Mg is formed. Subsequently, after lowering the temperature to a growth temperature of a second p contact layer being formed in the subsequent process, which is 700° C., the supply of ammonia is stopped and the carrier gas is switched from hydrogen to nitrogen. Thereby, Mg is activated in the first p contact layer, and the first p contact layer has a p-type conduction. Next, the second p contact layer of InGaN doped with Mg is formed on the first p contact layer by MOCVD using nitrogen as a carrier gas while maintaining the temperature at 700° C. which is the temperature of the previous process.

Use of freestanding nitride veneers in semiconductor devices

Thin freestanding nitride veneers can be used for the fabrication of semiconductor devices. These veneers are typically less than 100 microns thick. The use of thin veneers also eliminates the need for subsequent wafer thinning for improved thermal performance and 3D packaging.

GaN BONDED SUBSTRATE AND METHOD OF MANUFACTURING GaN BONDED SUBSTRATE

A gallium nitride (GaN) bonded substrate and a method of manufacturing a GaN bonded substrate in which a polycrystalline nitride-based substrate is used. The method includes loading a single crystalline GaN substrate and a polycrystalline nitride substrate into a bonder; raising the temperature in the bonder; bonding the single crystalline GaN substrate and the polycrystalline nitride substrate together by pressing the single crystalline GaN substrate and the polycrystalline nitride substrate against each other after the step of raising the temperature; and cooling the resultant bonded substrate.

Nitride-based semiconductor device and method for fabricating the same

A method includes the step of preparing a GaN-based substrate 10, the step of forming on the substrate a nitride-based semiconductor multilayer structure including a p-type Al d Ga e N layer (p-type semiconductor region) 26, the p-type Al d Ga e N layer 26 being made of an Al x In y Ga z N semiconductor (x+y+z=1, x≧0, y≧0, z≧0), and a principal surface of the p-type Al d Ga e N layer 26 being an m-plane, the step of forming a metal layer 28 which contains at least one of Mg and Zn on the principal surface of the p-type Al d Ga e N layer 26 and performing a heat treatment, the step of removing the metal layer 28, and the step of forming a p-type electrode on the principal surface of the p-type Al d Ga e N layer 26, wherein the heat treatment causes a N concentration to be higher than a Ga concentration in the p-type Al d Ga e N layer 26.

Nitride semiconductor light emitting device and manufacturing method thereof

A nitride semiconductor light emitting device and a manufacturing method thereof are provided. The nitride semiconductor light emitting device includes: forming a first conductivity-type nitride semiconductor layer on a substrate; forming an active layer on the first conductivity-type nitride semiconductor layer; and forming a second conductivity-type nitride semiconductor layer on the active layer. High output can be obtained by increasing doping efficiency in growing the conductivity type nitride semiconductor layer.

Group iii nitride semiconductor light-emitting device and production method therefor

On a light-emitting layer, a p cladding layer of AlGaInN doped with Mg is formed at a temperature of 800° C. to 950° C. Subsequently, on the p cladding layer, a capping layer of undoped GaN having a thickness of 5 Å to 100 Å is formed at the same temperature as employed for a p cladding layer. Next, the temperature is increased to the growth temperature contact layer in the subsequent process. Since the capping layer is formed, and the surface of the p cladding layer is not exposed during heating, excessive doping of Mg or mixture of impurities into the p cladding layer is suppressed. The deterioration of characteristics of the p cladding layer is prevented. Then, on the capping layer, a p contact layer is formed at a temperature of 950° C. to 1100° C.

Method and System for Epitaxy Processes on Miscut Bulk Substrates

A method for providing (Al,Ga,In)N thin films on Ga-face c-plane (Al,Ga,In)N substrates using c-plane surfaces with a miscut greater than at least 0.35 degrees toward the m-direction. Light emitting devices are formed on the smooth (Al,Ga,In)N thin films. Devices fabricated on the smooth surfaces exhibit improved performance. 1. A method for fabricating a device , the method comprising:providing a gallium and nitrogen containing substrate having a surface region, the surface region being characterized by a c-plane, a miscut angle of at least 0.35 degrees from the c-plane toward the m-direction, and a projection of the surface normal coincides with the m-axis;forming a gallium and nitrogen containing thin film; andforming an electrical contact region overlying the thin film.2. The method of claim 1 , wherein the substrate comprises a surface characterized by a miscut angle greater than −1 degrees claim 1 , and less than 1 degrees toward the [11-20] direction; whereinthe device is selected from an optical device and an electrical device; andthe thin film comprises a layer comprises an aluminum bearing species and an indium bearing species.3. The method of claim 1 , wherein the substrate has a miscut away from a low index crystal orientation.4. The method of claim 1 , wherein the thin film material comprises (Al claim 1 ,Ga claim 1 ,In)N.5. The method of claim 4 , wherein:the (Al,Ga,In)N thin film is grown directly on a Ga-face of the (Al,Ga,In)N substrate which is a miscut c-plane substrate; wherein the substrate is a Ga-face c-plane substrate and the miscut angle toward the [1-100] direction is at least 0.35 degrees.6. The method of claim 2 , wherein{'sup': '2', 'the thin film is characterized by a surface morphology having a root mean square roughness of less than 0.5 nm over at least a 2,500 μmsurface area; and'}further comprising causing formation of a resulting substrate characterized by an emission wavelength that is substantially uniform across the surface.7. ...

P-type doping layers for use with light emitting devices

A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.

Nitride semiconductor wafer, nitride semiconductor device, and method for growing nitride semiconductor crystal

According to one embodiment, a nitride semiconductor wafer includes a silicon substrate, a lower strain relaxation layer provided on the silicon substrate, an intermediate layer provided on the lower strain relaxation layer, an upper strain relaxation layer provided on the intermediate layer, and a functional layer provided on the upper strain relaxation layer. The intermediate layer includes a first lower layer, a first doped layer provided on the first lower layer, and a first upper layer provided on the first doped layer. The first doped layer has a lattice constant larger than or equal to that of the first lower layer and contains an impurity of 1×10 18 cm −3 or more and less than 1×10 21 cm −3 . The first upper layer has a lattice constant larger than or equal to that of the first doped layer and larger than that of the first lower layer.

Bonded substrate and method of manufacturing the same

A bonded substrate having a plurality of grooves and a method of manufacturing the same. The method includes the following steps of implanting ions into a first substrate, thereby forming an ion implantation layer, bonding the first substrate to a second substrate having a plurality of grooves in one surface thereof such that the first substrate is bonded to the one surface, and cleaving the first substrate along the ion implantation layer.

Manufacturing method of solid state light emitting element

A manufacturing method of a solid state light emitting element is provided. A plurality of protrusion structures separated to each other are formed on a first substrate. A buffer layer is formed on the protrusion structures and fills the gaps between protrusion structures. An epitaxial growth layer is formed on the buffer layer to form a first semiconductor stacking structure. The first semiconductor stacking structure is inverted to a second substrate, so that the first semiconductor epitaxial layer and the second substrate are connected to form a second semiconductor stacking structure. The buffer layer is etched by a first etchant solution to form a third semiconductor stacking structure. A second etchant solution is used to permeate through the gaps between the protrusion structures, so that the protrusion structures are etched completely. The first substrate is removed from the third semiconductor stacking structure to form a fourth semiconductor stacking structure.

ULTRAVIOLET LIGHT EMITTING DEVICE INCORPORTING OPTICALLY ABSORBING LAYERS

A light emitting device includes a p-side, an n-side, and an active layer between the p-side and the n-side. The p-side includes a p-side contact, an electron blocking layer, a p-side separate confinement heterostructure (p-SCH), and a p-cladding/current spreading region disposed between the p-SCH and the p-side contact. The n-side includes an n-side contact, and an n-side separate confinement heterostructure (n-SCH). The active layer is configured to emit light in a wavelength range, wherein the p-side and the n-side have asymmetrical optical transmission properties with respect to the wavelength range emitted by the active layer. 1. A light emitting device , comprising:an active layer configured to emit light having a wavelength range;a p-contact;a p-cladding/current spreading region disposed between the active layer and the p-contact; anda p-side separate confinement heterostructure (p-SCH) disposed between the active layer and the p-cladding/current spreading region, the p-SCH being substantially optically absorbing at the wavelength range emitted by the active layer.2. The device of claim 1 , wherein the active layer comprises a light emitting layer of a double heterostructure or a quantum well.3. The device of claim 1 , wherein a majority of the p-cladding/current spreading region is substantially optically absorbing at the wavelength range emitted by the active layer.4. The device of claim 1 , wherein turn on and operating voltages for the device are less than turn on and operating voltages for a substantially similar device that includes a p-SCH which is substantially optically transmissive at the wavelength range emitted by the active layer.5. The device of claim 1 , wherein the active layer comprises AlGaN and the wavelength range has a peak value less than about 300 nm.615. The device of claim 5 , wherein the p-SCH comprises AlGaN and an Al concentration of the p-SCH is less than an Al concentration of the active layer. Page7. The device of claim 1 , ...

SUBSTRATE FOR EPITAXIAL GROWTH

A surface of the substrate consists in plurality of neighbouring stripe shaped flat surfaces of a width from 1 to 2000 μm. Longer edges of the flat surfaces are parallel one to another and planes of these surfaces are disoriented relatively to the crystallographic plane of gallium nitride crystal defined by Miller-Bravais indices (0001), (11-22) or (11-20). Disorientation angle of each of the flat surfaces is between 0 and 3 degree and is different for each pair of neighbouring flat surfaces. Substrate according to the invention allows epitaxial growth of a layered AlInGaN structure by MOCVD or MBE method which permits for realization of a non-absorbing mirrors laser diode emitting a light of the wavelength from 380 to 550 nm and a laser diodes array which may emit simultaneously light of various wavelengths in the range of 380 to 550 nm. 1. A substrate for epitaxial growth made of gallium nitride crystal , and having epi-ready growth surface , characterized in that the growth surface consists of set of neighbouring flat surfaces in form of stripes of a width from 1 to 2000 μm , longer edges of the stripes are parallel on to another , planes of the stripes are disoriented relatively to the crystallographic plane defined by Miller-Bravais indices (0001) , (10-10) , (11-22) or (11-20) and disorientation angle of each of the flat surfaces is from 0 to 3 degree and it is different for each of two neighbouring surfaces.2. The substrate according to claim 1 , characterized in that all the flat surfaces are disoriented relatively to the crystallographic plane defined by the Miller-Bravais indices (0001).3. The substrate according to claim 2 , characterized in that the longer edges of all the flat surfaces are parallel to a given crystallographic direction of gallium nitride crystal while the flat surfaces are delimited by said longer edges and form over the whole crystal an array of repeating sequences.4. The substrate according to claim 3 , characterized in that the ...

Method of fabricating semiconductor substrate and method of fabricating light emitting device

The present invention provides a method of fabricating a semiconductor substrate and a method of fabricating a light emitting device. The method includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer, and separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution. 1. A method of fabricating a light emitting device , the method comprising:a preparing a plurality of substrate growth chambers;second preparing a substrate to grow a nitride semiconductor layer;growing a first nitride semiconductor layer in a first growth chamber; andgrowing a second nitride semiconductor layer in a second growth chamber,wherein solution the second nitride semiconductor layer is disposed on the first nitride layer.2. The method of claim 1 , wherein the first chamber is connected to the second chamber via a communication path.3. The method of claim 2 , wherein a shutter is disposed between the communication path and the first chamber or the second chamber.4. The method of claim 3 , wherein the substrate is transferred from the first chamber to the second chamber while remaining under vacuum.5. The method of claim 4 , wherein the growth of the second nitride semiconductor layer further comprises growing an active layer.6. The method of claim 5 , wherein the second nitride semiconductor layer comprises a different material than the first nitride semiconductor layer.7. The method of claim 6 , wherein the growth of the first nitride semiconductor layer produces reaction by-products different from the growth of the second nitride semiconductor layer.8. The method of ...

Gallium nitride compound semiconductor light emitting element and light source provided with said light emitting element

In a gallium nitride based compound semiconductor light-emitting element including an active layer, the active layer includes a well layer 104 and a barrier layer 103 , each of which is a semiconductor layer of which the growing plane is an m plane. The well layer 104 has a lower surface and an upper surface and has an In composition distribution in which the composition of In changes according to a distance from the lower surface in a thickness direction of the well layer 104 . The In composition of the well layer 104 becomes a local minimum at a level that is defined by a certain distance from the lower surface and that portion of the well layer 104 where the In composition becomes the local minimum runs parallel to the lower surface.

Polishing agent and polishing method

The present invention relates to a polishing agent for polishing a surface to be polished of an object to be polished, the polishing agent including: first silicon oxide fine particles having an average primary particle size of 5 to 20 nm; second silicon oxide fine particles having an average primary particle size of 40 to 110 nm; and water, in which a ratio of the first silicon oxide fine particles to a total amount of the first silicon oxide fine particles and the second silicon oxide fine particles is from 0.7 to 30% by mass.

NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT

To provide a nitride semiconductor light-emitting element in which a buffer layer provided between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer has a first buffer layer expressed by an equation of InGaN (0 Подробнее

GAN-BASED LEDS ON SILICON SUBSTRATES WITH MONOLITHICALLY INTEGRATED ZENER DIODES

GaN LEDs monolithically integrated with silicon-based ESD protection diodes. Hybrid MOCVD or HVPE epitaxial systems may be utilized for in-situ epitaxially growth of doped silicon containing films to form both the silicon-based ESD protection diode material stacks as well as a silicon containing transition layer prior to growth of a GaN-based LED material stack. The silicon-based ESD protection diodes may be interconnected with layers of a GaN LED material stack to form Zener diodes connected with the GaN LEDs. 1. A monolithic ESD protected GaN-based LED , comprising:a semiconductor protection diode stack comprising a pair of semiconductor layers containing silicon doped to a first conductivity type with a third semiconductor layer containing silicon doped to a second conductivity type, opposite the first;a semiconductor LED stack disposed over the protection diode stack to form a monolithic semiconductor material stack including both the protection diode stack and the LED stack, wherein the LED stack comprises a p-type GaN layer, an n-type GaN layer, and a quantum well structure disposed there between;a first electrical interconnect connecting one of the p-type and n-type GaN layers to a first of the pair of semiconductor layers containing silicon doped to a first conductivity type; anda second electrical interconnect connecting the other of the p-type and n-type GaN layers to a second of the pair of semiconductor layers containing silicon doped to a first conductivity type.2. The monolithic ESD protected GaN-based LED of claim 1 , wherein the first conductivity type is n-type and wherein the protection diode stack forms a series pair of diodes claim 1 , each having an anode connected to a contact metal of the LED stack to place the series pair of diodes in electrical parallel with the LED to shunt ESD from the LED.3. The monolithic ESD protected GaN-based LED of claim 1 , wherein the first conductivity type is p-type and wherein the protection diode stack forms a ...

Light Emitting Diode (LED) Using Three-Dimensional Gallium Nitride (GaN) Pillar Structures with Planar Surfaces

A method is provided for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces. The method forms a plurality of GaN pillar structures, each with an n-doped GaN (n-GaN) pillar and planar sidewalls perpendicular to the c-plane, formed in either an m-plane or a-plane family. A multiple quantum well (MQW) layer is formed overlying the n-GaN pillar sidewalls, and a layer of p-doped GaN (p-GaN) is formed overlying the MQW layer. The plurality of GaN pillar structures are deposited on a first substrate, with the n-doped GaN pillar sidewalls aligned parallel to a top surface of the first substrate. A first end of each GaN pillar structure is connected to a first metal layer. The second end of each GaN pillar structure is etched to expose the n-GaN pillar second end and connected to a second metal layer.

Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods

Embodiments relate to semiconductor structures and methods of forming semiconductor structures. The semiconductor structures include a substrate layer having a CTE that closely matches a CTE of one or more layers of semiconductor material formed over the substrate layer. In some embodiments, the substrate layers may comprise a composite substrate material including two or more elements. The substrate layers may comprise a metal material and/or a ceramic material in some embodiments.

Nitride-Based Light-Emitting Device

A nitride-based light-emitting device includes a substrate and a plurality of layers formed over the substrate in the following sequence: a nitride-based buffer layer formed by nitrogen, a first group III element, and optionally, a second group III element, a first nitride-based semiconductor layer, a light-emitting layer, and a second nitride-based semiconductor layer. 1. A manufacturing method of a light-emitting device , comprising:providing a reaction chamber;providing a substrate in the reaction chamber;heating the reaction chamber to a pre-determined temperature;nitridating the substrate by introducing a carrier gas into the reaction chamber at the pre-determined temperature;forming a buffer layer over the substrate by introducing a first reaction source comprising a first group III element into the reaction chamber at a first temperature, and a second reaction source comprising nitrogen into the chamber at a second temperature, wherein the first temperature is lower than the pre-determined temperature; andforming a first semiconductor layer over the buffer layer.2. The manufacturing method of the light-emitting device according to claim 1 , wherein the buffer layer comprises an atomic concentration of the first group III element larger than an atomic concentration of nitrogen claim 1 , and a first portion of the buffer layer adjacent to the substrate comprises an atomic concentration of nitrogen lower than an atomic concentration of nitrogen of a second portion located on the first portion of the buffer layer.3. The manufacturing method of the light-emitting device according to claim 1 , wherein the substrate comprises a material selected from the group consisting of sapphire claim 1 , GaN claim 1 , AlN claim 1 , SiC claim 1 , GaAs claim 1 , GaP claim 1 , Si claim 1 , ZnO claim 1 , MgO claim 1 , MgAlO claim 1 , and glass.4. The manufacturing method of the light-emitting device according to claim 1 , wherein the first semiconductor layer is of a single crystal ...

NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING ELEMENT

A nitride-based semiconductor light-emitting element includes a substrate and a nitride semiconductor multilayer structure. The nitride semiconductor multilayer structure includes a nitride semiconductor active layer which emits polarized light. Angle θ, which is formed by at least one of the plurality of lateral surfaces of the substrate with respect to the principal surface of the substrate, is greater than 90°. Angle θ (mod 180°), which is an absolute value of an angle which is formed by an intersecting line of at least one of the plurality of lateral surfaces of the substrate and the principal surface of the substrate with respect to a polarization direction in the principal surface of the polarized light, is an angle which does not include 0° or 90°. 1. A nitride-based semiconductor light-emitting element comprising:a substrate which has a principal surface, a rear surface that is a light extraction surface, and a plurality of lateral surfaces; anda nitride semiconductor multilayer structure formed on the principal surface of the substrate, whereinthe nitride semiconductor multilayer structure includes an active layer which emits polarized light,angle θ is greater than 90°, and{'b': '2', 'angle θ (mod 180°) is an angle which does not include 0° or 90°,'}where the angle θ is an angle which is formed by at least one of the plurality of lateral surfaces of the substrate with respect to the principal surface of the substrate, and{'b': '2', 'the angle θ is an absolute value of an angle which is formed by an intersecting line of at least one of the plurality of lateral surfaces of the substrate and the principal surface of the substrate with respect to a polarization direction in the principal surface of the polarized light.'}2. The nitride-based semiconductor light-emitting element of claim 1 , wherein the substrate is an off-cut substrate of not more than 5°.31. The nitride-based semiconductor light-emitting element of claim 1 , wherein a value of (θ−90°) is not ...

METHOD FOR MANUFACTURING LIGHT EMITTING CHIP HAVING BUFFER LAYER WITH NITRIDE SEMICONDUCOR IN CARBON NANO TUBE STRUCTURE

A method for manufacturing a light emitting chip comprises: providing a substrate with a catalyst layer formed thereon, the catalyst layer being etched to form a number of patterns which are spaced from each other by multiple gaps; forming a buffer layer in the multiple gaps of the patterned catalyst layer, the buffer layer comprising a patterned carbon nano tube structure formed along an extending direction of the substrate, the carbon nano tube structure being comprised of nitride semiconductor; removing the catalyst layer from the substrate; growing a cap layer from the substrate to cover the buffer layer; and growing a light emitting structure from a top of the cap layer, the light emitting structure sequentially comprising a first cladding layer, a light emitting layer, and a second cladding layer. 1. A method for manufacturing a light emitting chip , comprisingproviding a substrate with a catalyst layer formed thereon, the catalyst layer being etched to form a number of patterns which are spaced from each other by multiple gaps;forming a buffer layer in the multiple gaps of the patterned catalyst layer, the buffer layer comprising a patterned carbon nano tube structure formed along an extending direction of the substrate, the carbon nano tube structure being comprised of nitride semiconductor;removing the catalyst layer from the substrate;growing a cap layer from the substrate to cover the buffer layer; andgrowing a light emitting structure from a top of the cap layer, the light emitting structure sequentially comprising a first cladding layer, a light emitting layer, and a second cladding layer.2. The method as claimed in claim 1 , wherein each part of the patterned carbon nano tube structure is extended from a lateral side of a corresponding pattern to an opposite side of an adjacent pattern of the catalyst layer.3. The method as claimed in claim 1 , wherein the nitride semiconductor is (AlGaInN claim 1 , in which 0≦x≦1 claim 1 , 0≦y≦1 claim 1 , and 0≦(1−x−y ...

GALLIUM-NITRIDE-BASED LIGHT EMITTING DIODES WITH MULTIPLE POTENTIAL BARRIERS

A light emitting diode (LED) includes an active layer having one or more multilayer potential barriers and at least one well layer. Each multilayer potential barrier includes interlacing first and second InAlGaN thin layers. The first and second InAlGaN thin layers have compositions selected with respect to the well layer such that a polarization effect is substantially reduced. 1. A light-emitting diode (LED) comprising: one or more multilayer potential barriers; and', 'at least one well layer;', 'interlacing first and second InAlGaN thin layers,', 'wherein each multilayer potential barrier comprises, 'wherein the first and second InAlGaN thin layers have compositions selected with respect to the well layer such that a polarization effect is substantially reduced., 'an active layer comprising2. The LED of claim 1 , further comprising:a substrate;a GaN-based n-layer disposed over the substrate; anda GaN-based p-layer disposed over the substrate.3. The LED of claim 1 , wherein first and second InAlGaN thin layers form a superlattice structure with a period of at least two.4111122221212. The LED of claim 3 , wherein first thin layers are AlInGaN layers with 0 Подробнее

Light-emitting element and method for manufacturing same

The present invention provides a light-emitting element comprising: a carbon layer comprising a graphene; a plurality of fine structures having grown toward the upper side of the carbon layer; a thin film layer for coating the fine structures; and a light-emitting structure layer formed on the thin film layer.

METHOD FOR PRODUCING ALUMINUM NITRIDE CRYSTALS

Provided is a method for producing inexpensive and high-quality aluminum nitride crystals. Gas containing N atoms is introduced into a melt of a Ga—Al alloy, whereby aluminum nitride crystals are made to epitaxially grow on a seed crystal substrate in the melt of the Ga—Al alloy. A growth temperature of aluminum nitride crystals is set at not less than 1000 degrees C. and not more than 1500 degrees C., thereby allowing GaN to be decomposed into Ga metal and nitrogen gas. 1. A method for producing aluminum nitride crystals , the method comprising:introducing gas containing N atoms into a melt of a Ga—Al alloy; andepitaxially growing aluminum nitride crystals on a seed crystal substrate in said melt of the Ga—Al alloy.2. The method for producing aluminum nitride crystals according to claim 1 , wherein the above-mentioned seed crystal substrate is a nitrided sapphire substrate.3. The method for producing aluminum nitride crystals according to claim 2 , wherein the above-mentioned nitrided sapphire substrate is annealed at a temperature of not less than 900 degrees C. and not more than 1500 degrees C.4. The method for producing aluminum nitride crystals according to claim 2 , wherein aluminum nitride crystals having aluminum polarity are made to epitaxially grow on a aluminum nitride film having nitrogen polarity and being formed on the above-mentioned nitrided sapphire substrate claim 2 ,5. The method for producing aluminum nitride crystals according to claim 1 , wherein claim 1 , with introducing Ngas into the above-mentioned melt of the Ga—Al alloy claim 1 , aluminum nitride crystals are made to epitaxially grow.6. The method for producing aluminum nitride crystals according to claim 1 , wherein claim 1 , a temperature of the above-mentioned melt of the Ga—Al alloy is set at not less than 1000 degrees C. and not more than 1500 degrees C. to epitaxially grow aluminum nitride crystals.7. The method for producing aluminum nitride crystals according to claim 1 , wherein ...

LIGHT EMITTING DIODE AND FABRICATION METHOD THEREOF

The present invention discloses an LED and its fabrication method. The LED comprises: a sapphire substrate; an epitaxial layer, an active layer and a capping layer arranged on the sapphire substrate in sequence; wherein a plurality of cone-shaped structures are formed on the surface of the sapphire substrate close to the epitaxial layer. The cone-shaped structures can increase the light reflected by the sapphire substrate, raising the external quantum efficiency of the LED, thus increasing the light utilization rate of the LED. Furthermore, the formation of a plurality of cone-shaped structures can improve the lattice matching between the sapphire substrate and other films, reducing the crystal defects in the film formed on the sapphire substrate, increasing the internal quantum efficiency of the LED. 1. A light emitting diode , comprising:a sapphire substrate;an epitaxial layer, an active layer and a capping layer arranged on the sapphire substrate in sequence;wherein, a plurality of cone-shaped structures are formed on the surface of the sapphire substrate close to the epitaxial layer.2. The light emitting diode as claimed in claim 1 , characterized in that claim 1 , the cone-shaped structures are rectangular pyramid structures.3. The light emitting diode as claimed in claim 2 , characterized in that claim 2 , the rectangular pyramid structure has a square base and four isosceles triangular faces having the same dimension claim 2 , adjacent rectangular pyramid structures sharing one edge claim 2 , the included angle between adjacent rectangular pyramid structures being 60˜120 degrees.4. The light emitting diode as claimed in claim 1 , characterized in that claim 1 , the cone-shaped structures are triangular pyramid structures claim 1 , hexagonal pyramid structures claim 1 , octagonal pyramid structures or circular cone structures.5. The light emitting diode as claimed in claim 1 , characterized in that claim 1 , the light emitting diode further comprises a buffer ...

SEMICONDUCTOR DEVICE

A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type. 118-. (canceled)19. A method of producing a semiconductor device , comprising:forming an n-type semiconductor layer;forming an active layer on the n-type semiconductor layer;{'sub': 1-x-y1', 'x', 'y1', '1-x-y1', 'x', 'y1', '1-x-y1', 'x', 'y1', 'y2', '1-y2, 'forming a first semiconductor layer which comprises p-type GaN-based compound semiconductor, a p-type InGaAlN layer (0≦x<1, 0 Подробнее

METHOD FOR FABRICATING GROUP III NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE, AND GROUP III NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE

A group III nitride semiconductor light emitting device with a satisfactory ohmic contact is provided. The group III nitride semiconductor light emitting device includes a junction JC which tilts with respect to the reference plane that is orthogonal to a c-axis of a gallium nitride based semiconductor layer. An electrode forms the junction with the semipolar surface of the gallium nitride based semiconductor layer. The oxygen concentration of the grown gallium nitride based semiconductor layer that will form the junction JC is reduced. Since the electrode is in contact with the semipolar surface of the gallium nitride based semiconductor layer so as to form the junction, the metal-semiconductor junction has satisfactory ohmic characteristics. 1. A method for fabricating a group III nitride semiconductor light emitting device comprising the steps of:placing an epitaxial substrate in a gallium atmosphere in a vacuum chamber at a substrate temperature of 300 degrees Celsius or higher without growing a group III nitride semiconductor; andgrowing a conductive film for an electrode on a primary surface of the epitaxial substrate in the vacuum chamber to form a substrate product,the primary surface of the epitaxial substrate having semi-polarity of a gallium nitride based semiconductor, andthe epitaxial substrate including an active layer, the active layer comprising a group III nitride semiconductor.2. The method for fabricating a group III nitride semiconductor light emitting device according to claim 1 , the method further comprising the step of growing a semiconductor region on the primary surface of the substrate to form the epitaxial substrate claim 1 ,the primary surface of the substrate comprising a group III nitride semiconductor,the semiconductor region including a first conductivity type group III nitride semiconductor layer, the active layer, and a second conductivity type group III nitride semiconductor layer,the epitaxial substrate including the substrate, ...

LIGHT EMITTING DIODES

A method of producing a light emitting device comprises providing a wafer structure including a light emitting layer of III-nitride semiconductor material; dry etching the wafer at least part way through the light emitting layer so as to leave exposed surfaces of the emitting layer; and treating the exposed surfaces of the emitting layer with a plasma. The treatment may be using hot nitric acid or a hydrogen plasma.

Method for the reuse of gallium nitride epitaxial substrates

A method for the reuse of gallium nitride (GaN) epitaxial substrates uses band-gap-selective photoelectrochemical (PEC) etching to remove one or more epitaxial layers from bulk or free-standing GaN substrates without damaging the substrate, allowing the substrate to be reused for further growth of additional epitaxial layers. The method facilitates a significant cost reduction in device production by permitting the reuse of expensive bulk or free-standing GaN substrates.

Light emitting diode and manufacturing method thereof, light emitting device

The present invention provides an LED and the manufacturing method thereof, and a light emitting device. The LED includes a first electrode, for connecting the LED to a negative terminal of a power supply; a substrate, located on the first electrode; and an LED chip, located on the substrate; in which a plurality of contact holes are formed through the substrate, the contact holes are evenly distributed and filled with electrode plugs connecting the first electrode to the LED chip. The light emitting device includes the LED, and further includes a base and an LED mounted on the base. The manufacturing method includes: providing a substrate; forming on the substrate an LED chip and a second electrode successively; forming a plurality of evenly distributed contact holes on a backface of the substrate, the contact holes extending through the substrate and to the LED chip; and filling the contact holes with conducting material till the backface of the substrate is covered by the conducting material. The LED has a high luminous efficiency and the manufacturing method is easy to implement.

Method for Manufacturing Optical Element

A method for manufacturing an optical element includes a step wherein an aluminum nitride single crystal layer is formed on an aluminum nitride seed substrate having an aluminum nitride single crystal surface as the topmost surface. A laminated body for an optical element is manufactured by forming an optical element layer on the aluminum nitride single crystal layer, and the aluminum nitride seed substrate is removed from the laminated body. An optical element having, as a substrate, an aluminum nitride single crystal layer having a high ultraviolet transmittance and a low dislocation density is provided.

Light emitting element manufacturing method

A light emitting element manufacturing method includes a wafer preparing process of preparing the semiconductor wafer, and a wafer dividing process of dividing the semiconductor wafer. In the wafer dividing process, in a vertical dividing region, a line position shifted by a predetermined distance from a center line of the vertical dividing region in a width direction to one side in the width direction is taken as the cutting start point to divide the semiconductor wafer.

METHOD OF SEPARATING NITRIDE FILMS FROM GROWTH SUBSTRATES BY SELECTIVE PHOTO-ENHANCED WET OXIDATION AND ASSOCIATED SEMICONDUCTOR STRUCTURE

Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a semiconductor structure may comprise: a first substrate structure; a III-nitride structure bonded with the first substrate structure; a plurality of air gaps formed between the first substrate structure and the III-nitride structure; and a III-oxide layer formed on surfaces around the air gaps, wherein a portion of the III-nitride structure including surfaces around the air gaps is transformed into the III-oxide layer by a selective photo-enhanced wet oxidation, and the III-oxide layer is formed between an untransformed portion of the III-nitride structure and the first substrate structure. 1. A semiconductor structure comprising:a first substrate structure;a III-nitride structure bonded with the first substrate structure;a plurality of air gaps formed between the first substrate structure and the III-nitride structure; anda III-oxide layer formed on surfaces around the air gaps, wherein a portion of the III-nitride structure including surfaces around the air gaps is transformed into the III-oxide layer by a selective photo-enhanced wet oxidation, and the III-oxide layer is formed between an untransformed portion of the III-nitride structure and the first substrate structure.2. The semiconductor structure as recited in claim 1 , wherein the first substrate structure comprises a substrate and at least a first III-nitride layer having a first high bandgap energy on the substrate claim 1 , and wherein the III-nitride structure comprises at least a second III-nitride layer having a first low bandgap energy that bonds with the first III-nitride layer.3. The semiconductor structure as recited in claim 2 , wherein the selective photo-enhanced wet oxidation comprises photo-enhanced wet oxidation with a photonic energy between the first high bandgap energy and the first low bandgap energy.4. The semiconductor structure as ...

SEMICONDUCTOR LIGHT EMITTING DEVICE, ITS MANUFACTURING METHOD, SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD

A semiconductor light emitting device made of nitride III-V compound semiconductors including an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact. 122-. (canceled)23. A semiconductor light emitting device including:an active layer made of a first nitride III-V compound semiconductor containing In and Ga;an intermediate layer in contact with the active layer and made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor;a cap layer in contact with the intermediate layer and made of a third nitride III-V compound semiconductor containing Al and Ga;an optical guide layer in contact with the cap layer and made of a sixth nitride III-V compound semiconductor containing Ga; anda p-type clad layer in contact with the cap layer and made of a seventh nitride III-V compound semiconductor containing Al and Ga and different from the third nitride III-V compound semiconductor,wherein,the active layer, the intermediate layer, the cap layer and the optical guide layer are grown in a carrier gas atmosphere containing substantially no hydrogen and containing nitrogen as the major component thereof; andthe p-type clad layer are grown in a carrier gas atmosphere containing nitrogen and hydrogen as major components thereof.24. The semiconductor light emitting device of claim 23 , wherein the carrier gas atmosphere containing substantially no hydrogen and containing nitrogen as the major component thereof is a Ngas atmosphere.25. The semiconductor light emitting device of claim 23 , wherein the carrier gas atmosphere ...

NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND FABRICATION METHOD THEREOF

The present invention relates to a GaN based nitride based light emitting device improved in Electrostatic Discharge (ESD) tolerance (withstanding property) and a method for fabricating the same including a substrate and a V-shaped distortion structure made of an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate and formed with reference to the n-type nitride semiconductor layer. 120-. (canceled)21. A manufacturing method of nitride semiconductor light emitting device comprising:forming an n-type nitride semiconductor layer having on a substrate;forming an active layer on the n-type nitride semiconductor layer; andforming a p-type nitride semiconductor layer on the active layer, the p-type semiconductor layer comprising a p-type cladding layer formed on the active layer and a p-type contact layer formed on the p-type cladding layer,wherein a V-shaped distortion structure is formed at the n-type semiconductor layer and the active layer and the p-type semiconductor layer, andthe growth temperature of the p-type contact layer is higher than that of the n-type nitride semiconductor layer.22. The method according to claim 21 , wherein the growth temperature of the n-type nitride semiconductor layer is below 950° C.23. The method according to claim 21 , wherein the growth temperature of the p-type contact layer is above 1000° C.24. The method according to claim 21 , wherein the V-shaped distortion structure is filled in an area between the p-type contact layer and the active layer claim 21 , so that the lower surface of the p-type contact layer is flat.25. The method according to claim 21 , wherein the upper and lower surfaces of the active layer in the V-shaped distortion are bent toward the n-type semiconductor layer claim 21 , respectively.26. The method according to claim 21 , wherein the V-shaped distortion structure becomes smooth in shape claim 21 , i.e. claim 21 , a valley shape claim 21 , as approaching ...

Method for manufacturing nitride semiconductor layer

According to one embodiment, a method for manufacturing a nitride semiconductor layer is disclosed. The method can include forming a first lower layer on a major surface of a substrate and forming a first upper layer on the first lower layer. The first lower layer has a first lattice spacing along a first axis parallel to the major surface. The first upper layer has a second lattice spacing along the first axis larger than the first lattice spacing. At least a part of the first upper layer has compressive strain. A ratio of a difference between the first and second lattice spacing to the first lattice spacing is not less than 0.005 and not more than 0.019. A growth rate of the first upper layer in a direction parallel to the major surface is larger than that in a direction perpendicular to the major surface.

GROUP III NITRIDE SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND METHOD FOR PRODUCING THE SAME

A method for producing a group III nitride semiconductor light-emitting device, by which a non-light-emitting region is easily formed, is disclosed. Mg is activated to convert a p-type layer into p-type, and a p-electrode is then formed on the p-type layer. An Ag paste is applied to a region on the p-electrode and overlapping an n-electrode formed in a subsequent step. Heat treatment is conducted to solidify the Ag paste, thereby forming an Ag paste solidified body. By this, a region overlapping the Ag paste solidified body in a planar view, of the p-type layer converts into a region having high resistance, and a high resistance region is formed. As a result, a region overlapping the high resistance region in a planar view, of a light-emitting layer becomes a non-light-emitting region. 1. A method for producing a group III nitride semiconductor light-emitting device having a part of a region of a light-emitting layer as a non-light-emitting region , the method comprising:a first step of sequentially laminating an n-type layer, a light-emitting layer and a p-type layer comprising a group III nitride semiconductor on a growth substrate;a second step of activating the p-type layer to p-type activation by heat treatment and then forming a p-contact electrode on the p-type layer;a third step of applying a metal paste comprising conductive metal particles dispersed in a solvent comprising a material containing hydrogen as a constituent element, to a desired region on the p-contact electrode; anda fourth step of solidifying the metal paste by heat treatment to form a part of a region of the p-type layer into a high resistance region, thereby forming a region overlapping a region having the metal paste applied thereto in a planar view, of the light-emitting layer into a non-light-emitting region.2. The method for producing a group III nitride semiconductor light-emitting device according to claim 1 ,wherein the p-contact electrode comprises Ag or an Ag alloy, andthe method ...

METHOD OF FORMING A COMPOSITE SUBSTRATE

In a method according to embodiments of the invention, a III-nitride layer is grown on a growth substrate. The III-nitride layer is connected to a host substrate. The growth substrate is removed. The growth substrate is a non-III-nitride material. The growth substrate has an in-plane lattice constant a substrate. The III-nitride layer has a bulk lattice constant a layer. In some embodiments, [(|substrate−a layer|)/substrate]*100% is no more than 1%. 1. A method comprising: the growth substrate is a non-III-nitride material;', {'sub': 'substrate', 'the growth substrate has an in-plane lattice constant a;'}, {'sub': 'layer', 'the III-nitride layer has a bulk lattice constant a; and'}, {'sub': substrate', 'layer', 'substrate, '[(|a−a|)/a]*100% is no more than 1%;'}], 'growing a III-nitride layer on a growth substrate; wherein'}connecting the III-nitride layer to a host substrate; andremoving the growth substrate,wherein a group V face of the III-nitride layer is proximate the host substrate and a group III face of the III-nitride layer is opposite the host substrate.2. The method of wherein the growth substrate is ScAlMgOand the III-nitride layer is InGaN.3. The method of wherein the growth substrate is RAO(MO) claim 1 , where R is selected from Sc claim 1 , In claim 1 , Y claim 1 , and the lanthanides; A is selected from Fe (III) claim 1 , Ga claim 1 , and Al; M is selected from Mg claim 1 , Mn claim 1 , Fe (II) claim 1 , Co claim 1 , Cu claim 1 , Zn and Cd; and n is an integer 1.4. The method of wherein the III-nitride layer is one of InGaN and AlInGaN.5. The method of wherein the III-nitride layer is InGaN claim 1 , where 0.06≦x≦0.48.6. The method of wherein connecting comprises bonding through a bonding layer disposed between the III-nitride layer and the host substrate.7. The method of wherein the bonding layer is one of a non-III-nitride material claim 6 , SiO claim 6 , and SiN.8. The method of wherein:the III-nitride layer is InGaN;{'sub': 'x', 'the bonding ...

Group iii nitride compound semiconductor light emitting element and method for producing the same

A group III nitride compound semiconductor light emitting device that inhibits occurrence of dislocation in a strain relaxation layer in forming a group III nitride compound semiconductor layer on a thin GaN substrate, and a method for producing the same are provided. A light emitting device 100 comprises a support substrate 10, a GaN substrate 20, an n-type contact layer 30, a strain relaxation layer 40 (n-type InGaN layer), a light emitting layer 50, a p-type clad layer 60, and a p-type contact layer 70. The GaN substrate 20 has a thickness in a range of from 10 nm to 10 μm. The strain relaxation layer 40 (n-type InGaN layer) has an In composition ratio X in a range of from larger than 0 to 3%.

Light emitting diodes

An LED is provided. The LED includes at least two light emitting units located on a same plane. Each light emitting unit includes a first semiconductor layer, an active layer and a second semiconductor layer stacked in that order. Each light emitting unit further includes a first electrode and a second electrode electrically connected with the first semiconductor layer and the second semiconductor layer respectively. The active layer of each light emitting unit is spaced from the active layers of other light emitting units. A distance between adjacent active layer ranges from 1 micron to 1 millimeter.

Vertical nitride semiconductor device and method for manufacturing same

Disclosed is a vertical nitride semiconductor device including a conductive substrate; a semiconductor layer bonded to the conductive substrate via a second electrode; a metal layer formed on the conductive substrate; a first electrode formed on the semiconductor layer; and a bonding layer formed between the conductive substrate and the second electrode. The conductive substrate has a flange part, which extends from a side surface of the conductive substrate, on a side of the other front surface thereof. The flange part is formed in a manner in which the conductive substrate and the semiconductor layer are bonded together and then a remaining part of the conductive substrate is divided, the remaining part being formed by cutting off the semiconductor layer and part of the conductive substrate in a thickness direction so as to expose a side surface of the semiconductor layer and the side surface of the conductive substrate.

LIGHT EMITTING DEVICES AND METHODS OF MANUFACTURING THE SAME

Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned dispersion Bragg reflection (DBR) layer on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR layer and regions between patterns of the DBR layer. 1. A method of manufacturing a light emitting device , the method comprising:forming a reflection buffer layer structure including a metal buffer layer and a DBR layer on a silicon substrate; andforming a GaN-based light emitting layer structure.2. The method of claim 1 , wherein the forming of the reflection buffer layer structure includes:forming the metal buffer layer on the silicon substrate,forming the DBR layer on the metal buffer layer, andpatterning the DBR layer to form a plurality of holes in the DBR layer.3. The method of claim 2 , wherein the forming of the DBR layer includes alternately stacking layers including a SiOlayer and a material layer claim 2 , the material layer including at least one of SiC claim 2 , AlN claim 2 , GaN claim 2 , BN claim 2 , BP claim 2 , AlInGaN claim 2 , and AlBGaN.4. The method of claim 3 , wherein the forming of the DBR layer includes alternately stacking layers including a SiC layer and a SiOlayer.5. The method of claim 1 , wherein the forming of the metal buffer layer includes forming the metal buffer layer to have a single-layered structure including an XY material claim 1 ,X is at least one of Ti, Cr, Zr, Hf, Nb, and Ta, and{'sub': '2', 'Y is at least one of N, B, and B.'}6. The method of claim 2 , wherein the forming of the metal buffer layer includes patterning the metal buffer layer at a same time as the patterning of the DBR layer.7. The method of claim 2 , further comprising:forming an XY material layer on the DBR layer,wherein X is at least one of Ti, Cr, Zr, Hf, Nb, and Ta, and{'sub': '2', 'Y is at least one of N, B, and B.'}8. The method of claim ...

PHOTOACTIVE DEVICES WITH IMPROVED DISTRIBUTION OF CHARGE CARRIERS, AND METHODS OF FORMING SAME

Radiation-emitting semiconductor devices include a first base region comprising an n-type III-V semiconductor material, a second base region comprising a p-type III-V semiconductor material, and a multi-quantum well structure disposed between the first base region and the second base region. The multi-quantum well structure includes at least three quantum well regions and at least two barrier regions. An electron hole energy barrier between a third of the quantum well regions and a second of the quantum well regions is less than an electron hole energy barrier between the second of the quantum well regions and a first of the quantum well regions. Methods of forming such devices include sequentially epitaxially depositing layers of such a multi-quantum well structure, and selecting a composition and configuration of the layers such that the electron hole energy barriers vary across the multi-quantum well structure. 1. A photoactive device , comprising:a volume of strain relaxed indium gallium nitride semiconductor material;a first base region comprising a III-nitride semiconductor material disposed over the volume of strain relaxed indium gallium nitride semiconductor material;a second base region comprising a III-nitride semiconductor material; anda multi-quantum well structure disposed between the first base region and the second base region, the multi-quantum well structure comprising at least three quantum well regions and at least two barrier regions, a first barrier region of the at least two barrier regions disposed between a first quantum well region and a second quantum well region of the at least three quantum well regions, a second barrier region of the at least two barrier regions disposed between the second quantum well region and a third quantum well region of the at least three quantum well regions, the first quantum well region located closer to the first base region than the third quantum well region, and the third quantum well region located closer ...

Method for forming a buried metal layer structure

The invention relates to a method for fabricating a structure including a semiconductor material comprising: a) implanting one or more ion species to form a weakened region delimiting at least one seed layer in a substrate of semiconductor material, b) forming, before or after step a), at least one metallic layer on the substrate in semiconductor material, c) assembling the at least one metallic layer with a transfer substrate, then fracturing the implanted substrate at the weakened region, d) forming at least one layer in semiconductor material on the at least one seed layer, for example, by epitaxy.

LUMINESCENT DEVICE AND MANUFACTURING METHOD FOR LUMINESCENT DEVICE AND SEMICONDUCTOR DEVICE

A luminescent device and a manufacturing method for the luminescent device and a semiconductor device which are free from occurrence of cracks in a compound semiconductor layer due to the internal stress in the compound semiconductor layer at the time of chemical lift-off. The luminescent device manufacturing method includes forming a device region on part of an epitaxial substrate through a lift-off layer; forming a sacrificing portion, being not removed in a chemical lift-off step, around device region on epitaxial substrate; covering epitaxial substrate and semiconductor layer and forming a covering layer such that level of surface thereof in the region away from device region is lower than luminescent layer surface; removing covering layer on semiconductor layer, and that on sacrificing portion surface; forming a reflection layer on covering layer surface and semiconductor layer surface; and forming a supporting substrate by providing plating on reflection layer. 1. A manufacturing method for a semiconductor device , comprising:a device region formation step of forming a device region constituted by a semiconductor layer on part of an epitaxial substrate through a lift-off layer;a sacrificing portion formation step of forming a sacrificing portion, being not removed in a later-mentioned chemical lift-off step, around the device region on the epitaxial substrate;a covering step of forming a covering layer, covering the epitaxial substrate except part on the semiconductor and on the sacrificing layer;a foundation layer formation step of forming a foundation layer on a surface on the epitaxial substrate including part on the semiconductor and on the sacrificing layer and a covering layer surface;a plating step of forming a supporting substrate by providing plating on the foundation layer;a covering layer removing step of dissolution removing of the covering layer;a chemical lift-off step of separating between the semiconductor layer and the epitaxial substrate by ...

SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS OF MANUFACTURING

Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light emitting diode with an N-type gallium nitride (GaN) material, a P-type GaN material spaced apart from the N-type GaN material, and an indium gallium nitride (InGaN) material directly between the N-type GaN material and the P-type GaN material. At least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface. 1. A method for processing a silicon substrate , comprising:forming a solid state lighting (SSL) structure on a substrate, the substrate having a substrate material with a Si(1,0,0) lattice orientation, wherein the SSL structure includes an N-type gallium nitride (GaN) material, an indium gallium nitride (InGaN) material, and a P-type GaN material, and wherein at least one of the N-type GaN, InGaN, and P-type GaN materials has a non-planar surface with a plurality of symmetric protrusions extending along a Si(1,1,1) plane, and wherein the symmetric protrusions are formed with tips, and wherein the symmetric protrusions at least partially reduce a total tensile stress among the N-type GaN, InGaN, and P-type GaN materials by at least partially canceling opposite tensile stresses at the tips along the non-planar surface;forming a first contact electrically coupled to the P-type GaN; andforming a second contact electrically coupled to the N-type GaN.2. The method of wherein the non-planar surface has a zigzag pattern.3. The method of wherein the individual protrusions include a first sidewall and a second sidewall joined together at a junction.4. The method of wherein the individual protrusions include a first sidewall and a second sidewall joined together at a junction claim 1 , the first and second sidewalls forming an angle of about 72°.5. The method of wherein the individual protrusions include a first sidewall claim 1 , a second sidewall claim 1 , and a third sidewall extending between ...

HIGH OUTPUT POWER, HIGH EFFICIENCY BLUE LIGHT-EMITTING DIODES

A III-nitride based semipolar LED with a light output power of at least 100 milliwatts (mW), or with an External Quantum Efficiency (EQE) of at least 50%, for a current density of at least 100 Amps per centimeter square (A/cm). 1. A III-nitride based Light Emitting Diode (LED) , comprising:{'sup': '2', 'a III-nitride based semipolar LED with a light output power of at least 100 milliwatts (mW), or with an External Quantum Efficiency (EQE) of at least 50%, at a current density of at least 100 Amps per centimeter square (A/cm).'}2. The LED of claim 1 , wherein the LED is a semipolar LED grown on a bulk Gallium Nitride substrate or semipolar Gallium Nitride (GaN).3. The LED of claim 2 , further comprising an active region for emitting the light claim 2 , wherein the active region comprises one or more quantum wells having a thickness of at least 4 nanometers.4. The LED of claim 3 , wherein the LED is grown on a semipolar plane of the GaN and the semipolar plane is (20-2-1).5. The LED of claim 3 , wherein the active region comprises one quantum well or a single quantum well (SQW).6. The LED of claim 1 , wherein a peak wavelength of the light is in a blue spectrum or wavelength range.7. The LED of claim 6 , wherein a wavelength shift of the peak wavelength is less than 4 nm up to a current density of 400 A/cm.8. The LED of claim 1 , wherein a top surface area of the LED claim 1 , or a top surface of the light emitting active region of the LED claim 1 , is less than 0.2 mm.9. The LED of claim 8 , wherein the output power is more than 140 mW at the current density of 100 A/cmor more than 460 mW at the current density of 400 A/cm.10. The LED of claim 1 , wherein the EQE drop is less than 9% when the current density is changed from 100 to 400 A/cm.11. The LED of claim 1 , wherein the III-nitride based semipolar Light Emitting Diode (LED) the LED has a crystal quality claim 1 , active region thickness claim 1 , semipolar orientation claim 1 , and structure such that the light ...

LIGHT-EMITTING DIODES WITH LOW TEMPERATURE DEPENDENCE

A III-nitride based LED with an External Quantum Efficiency (EQE) droop of less than 10% when a junction temperature of the LED is increased from 20 ° C. to at least 100 ° C. at a current density of the LED of at least 20 Amps per centimeter square. 1. A Light Emitting Diode (LED) , comprising:{'sup': '2', 'a III-nitride based LED with an External Quantum Efficiency (EQE) droop of less than 10% when a junction temperature of the LED is increased from 20° C. to at least 100° C. at a current density of the LED of 20 Amps per centimeter square (A/cm).'}2. The LED of claim 1 , wherein the LED is grown on semipolar Gallium Nitride (GaN) or a semipolar plane of GaN substrate.3. The LED of claim 2 , further comprising an active region for emitting light claim 2 , wherein the active region comprises one or more quantum wells having a thickness greater than 4 nanometers.4. The LED of claim 3 , wherein the semipolar plane is a (20-2-1) plane.5. The LED of claim 3 , wherein the active region comprises one quantum well or a single quantum well (SQW).6. The LED In the claim 1 , wherein the current density is between 20 and 100 A/cm.7. The LED of claim 1 , wherein the LED is a semipolar III-nitride LED.8. The LED of claim 1 , wherein the LED has a characteristic temperature of at least 800 Kelvin.9. The LED of claim 1 , wherein the III-nitride based LED is grown on a semipolar plane of a III-nitride substrate and the LED has a crystal quality claim 1 , active region thickness claim 1 , semipolar orientation claim 1 , and structure such that the EQE droop is obtained.10. The LED of claim 9 , wherein the active region thickness reduces the carrier density and the semipolar orientation of the LED increases the crystal quality such that the LOP or the EQE is obtained.11. The LED of claim 9 , wherein the structure includes a number of quantum wells in the active region.12. The LED of claim 9 , wherein the structure includes a superlattice between the substrate and an active region of ...

METHOD OF MANUFACTURING GALLIUM NITRIDE-BASED SEMICONDUCTOR LIGHT EMITTING DEVICE

A method of manufacturing a gallium nitride (GaN)-based semiconductor light emitting device is provided. A light emitting structure is formed and includes an n-type semiconductor layer, an active layer and a p-type semiconductor layer formed of a nitride semiconductor containing gallium (Ga) on a substrate. A metal layer is disposed on the p-type semiconductor layer, and a heat treatment is performed to form a gallium(Ga)-metal compound. The gallium(Ga)-metal compound formed on the p-type semiconductor layer is removed. An electrode is disposed on an upper surface of the p-type semiconductor layer from which the gallium(Ga)-metal compound has been removed. The forming of the gallium(Ga)-metal compound includes forming a gallium vacancy in a surface of the p-type semiconductor layer. 1. A method of manufacturing a gallium nitride (GaN)-based semiconductor light emitting device , the method comprising step of:forming a light emitting structure including an n-type semiconductor layer, an active layer and a p-type semiconductor layer formed of a nitride semiconductor containing gallium (Ga) on a substrate;forming a metal layer on the p-type semiconductor layer;performing a heat treatment on the metal layer to form a gallium (Ga)-metal compound;removing the gallium (Ga)-metal compound formed on the p-type semiconductor layer; andforming an electrode on an upper surface of the p-type semiconductor layer from which the gallium (Ga)-metal compound has been removed, whereinthe step of forming the gallium (Ga)-metal compound includes forming a gallium vacancy in a surface of the p-type semiconductor layer by a reaction between gallium of the p-type semiconductor layer and the metal layer.2. The method of claim 1 , wherein the metal layer is formed of a metal initially reacted with the gallium (Ga) rather than nitrogen of the p-type semiconductor layer.3. The method of claim 1 , wherein the metal layer is an element selected from a group consisting of titanium (Ti) claim 1 , ...

Light emitting device and method of manufacturing the same

A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.

Laminate substrate and method of fabricating the same

Embodiments of the invention provide a crystalline aluminum carbide layer, a laminate substrate having the crystalline aluminum carbide layer formed thereon, and a method of fabricating the same. The laminate substrate has a GaN layer including a GaN crystal and an AlC layer including an AlC crystal. Further, the method of fabricating the laminate substrate, which has the AlN layer including the AlN crystal and the AlC layer including the AlC crystal, includes supplying a carbon containing gas and an aluminum containing gas to grow the AlC layer.

Method for manufacturing semiconductor light emitting device

A method for manufacturing a semiconductor light emitting device is provided. The method includes forming a light emitting structure by sequentially growing a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a semiconductor growth substrate A support unit is disposed on the second conductivity-type semiconductor layer, so as to be combined with the light emitting structure. The semiconductor growth substrate is separated from the light emitting structure. An interface between the semiconductor growth substrate and a remaining light emitting structure is wet-etched such that the light emitting structure remaining on the separated semiconductor growth substrate is separated therefrom. The semiconductor growth substrate is cleaned.

Sapphire substrate configured to form light emitting diode chip providing light in multi-directions, light emitting diode chip, and illumination device

A sapphire substrate configured to form a light emitting diode (LED) chip providing light in multi-directions, a LED chip and an illumination device are provided in the present invention. The sapphire substrate includes a growth surface and a second main surface opposite to each other. A thickness of the sapphire substrate is thicker than or equal to 200 micrometers. The LED chip includes the sapphire substrate and at least one LED structure. The LED structure is disposed on the growth surface and forms a first main surface where light emitted from with a part of the growth surface without the LED structures. At least a part of light beams emitted from the LED structure pass through the sapphire substrate and emerge from the second main surface. The illumination device includes at least one LED chip and a supporting base. The LED chip is disposed on the supporting base.

Gallium nitride to silicon direct wafer bonding

A direct wafer bonding process for joining GaN and silicon substrates involves pre-treating each of the wafers in an ammonia plasma in order to render the respective contact surfaces ammophilic. The GaN substrate and the silicon substrate may each comprise single crystal wafers. The resulting hybrid semiconductor structure can be used to form high quality, low cost LEDs.

LIGHT EMITTING DIODE AND METHOD OF FABRICATING THE SAME

Disclosed herein is a light emitting diode, the structure of the light emitting diode comprises a substrate, a first-type semiconductor layer, a structural layer, a light emitting layer, a second-type semiconductor layer, a transparent conductive layer, a first contact pad and a second contact pad in regular turn. The structural layer comprises a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement. Also, a method for fabricating the light emitting diode is disclosed. 1. A light emitting diode comprising:a substrate having a surface with a cushion layer thereon with a first area and a second area;a first-type semiconductor layer comprising a first portion and a second portion located in the first area and the second area, respectively;a structural layer disposed on the second area of the cushion layer, comprising:the second portion of the first-type semiconductor layer;a light emitting layer disposed on the second portion of the first-type semiconductor layer; anda second-type semiconductor layer disposed on the light emitting layer, wherein the structural layer is composed of a stacked structure having a trapezoid sidewall and nano columns extending from the trapezoid sidewall in regular arrangement;a transparent conductive layer disposed on the stacked structure of the structural layer in the second area of the cushion layer;a first contact pad disposed on the first portion of the first-type semiconductor layer in the first area of the cushion layer; anda second contact pad disposed on the transparent conductive layer.2. The light emitting diode of claim 1 , wherein the ratio of the diameter of the nano columns and the thickness of the structural layer is in a range of 0.01 to 1.3. The light emitting diode of claim 2 , wherein the space between the respective nano columns is in a range of 1 to 500 nm.4. The light emitting diode of claim 1 , wherein the substrate is made of a sapphire substrate ...