ОПТОЭЛЕКТРОННЫЕ УСТРОЙСТВА

Изобретение относится к интегральным оптоэлектронным устройствам, содержащим светоизлучающие полевые транзисторы. Описано оптоэлектронное устройство, содержащее светоизлучающий полевой транзистор (LEFET) с активным слоем из органического полупроводника и волноводом, сформированным в канале светоизлучающего полевого транзистора. Активный слой находится поверх волновода и истокового и стокового электродов. Гребень волновода содержит материал, имеющий более высокий показатель преломления, чем органический полупроводник. На светоизлучающий полевой транзистор подается смещение для управления положением рекомбинации носителей заряда противоположной полярности в канале, гребень выравнивается с положением рекомбинации, так что свет управляемо вводится в гребень волновода. Технический результат заключается в повышении эффективности ввода света в волновод. 5 н. и 25 з.п. ф-лы, 14 ил.

ДИЭЛЕКТРИЧЕСКИЙ СЛОЙ ЗАТВОРА ДЛЯ ЭЛЕКТРОННЫХ УСТРОЙСТВ

... 1. Диэлектрический слой затвора, находящийся в контакте с полупроводниковым слоем в электронном устройстве, где указанный диэлектрический слой затвора включает полициклоолефиновый полимер или полимерную композицию, содержащую полициклоолефиновый полимер.2. Диэлектрический слой затвора по п. 1, в котором полициклоолефиновый полимер является полимером норборненового типа.3. Диэлектрический слой затвора по п. 1, в котором полициклоолефиновый полимер содержит первый тип повторяющейся единицы, имеющей боковую, способную к сшиванию группу.4. Диэлектрический слой затвора по п. 3, в котором боковая, способная к сшиванию группа является латентной, способной к сшиванию группой.5. Диэлектрический слой затвора по п. 3, в котором боковая, способная к сшиванию группа является малеимидной, 3-моноалкилмалеимидной, 3,4-диалкилмалеимидной, эпоксидной, винильной, ацетильной, инденильной, циннаматной или кумариновой группой, или боковая способная к сшиванию группа содержит замещенный или незамещенный малеимидный ...

СОЕДИНЕНИЕ ЗАМЕЩЕННОГО БЕНЗОХАЛЬКОГЕНАЦЕНА, ТОНКАЯ ПЛЕНКА, ВКЛЮЧАЮЩАЯ ТАКОЕ СОЕДИНЕНИЕ, И ОРГАНИЧЕСКОЕ ПОЛУПРОВОДНИКОВОЕ УСТРОЙСТВО, ВКЛЮЧАЮЩЕЕ ТАКУЮ ТОНКУЮ ПЛЕНКУ

... 1. Соединение замещенного бензохалькогенацена, представленное формулой (1)где каждый из Е независимо представляет собой атом серы или селена и каждый из Rи Rнезависимо представляет собой атом водорода, необязательно замещенную Cалкильную группу, необязательно замещенную Cалкоксильную группу, необязательно замещенную Cарильную группу, необязательно замещенную Cаралкильную группу, необязательно замещенную Cгетероарильную группу, необязательно замещенную Cгетероаралкильную группу или необязательно фторированную Cтриалкилсилильную группу, где Rи Rне являются одновременно атомами водорода.2. Соединение по п.1, где все Е в формуле (1) являются атомами серы.3. Соединение по п.1 или 2, где каждый из Rи Rв формуле (1) независимо представляет собой атом водорода, необязательно фторированную Cалкильную группу, необязательно фторированную Cалкоксильную группу, необязательно алкилированную или алкоксилированную Cарильную группу, которая является необязательно фторированной, необязательно фторированную ...

Elektronische Vorrichtungen

Vorrichtung, enthaltend eine Transistoranordnung, die enthält: gemusterte Leiterschichten, die auf unteren und oberen Ebenen in einem Schichtenstapel auf einem Substrat angeordnet sind, wobei die gemusterten Leiterschichten Gate-Leiter und Source-Drain-Elektroden der Transistoranordnung definieren; wobei der Schichtstapel ferner eine dielektrische Schicht unterhalb des unteren Niveaus und eine weitere gemusterte Leiterschicht unterhalb der dielektrischen Schicht enthält; und wobei die weitere gemusterte Leiterschicht sowohl eine elektrische Funktion in der Transistoranordnung über die dielektrische Schicht bereitstellt als auch Öffnungen, durch die die dielektrische Schicht dazu dient, die Adhäsionsstärke zwischen dem Vorrichtungssubstrat und der gemusterten Leiterschicht auf dem unteren Niveau zu vergrößern, definiert.

Verfahren zum Herstellen eines Nanoelement-Feldeffektransistors, Nanoelement-Feldeffekttransistor und Nanoelement-Anordnung

Die Erfindung betrifft ein Verfahren zum Herstellen eines Nanoelement-Feldeffekttransistors, einen Nanoelement-Feldeffekttransistor und eine Nanoelement-Anordnung. Gemäß dem Verfahren zum Herstellung eines Nanoelement-Feldeffekttransistors wird ein Nanoelement gebildet, ein erster und ein zweiter Source-/Drain-Bereich mit dem Nanoelement gekoppelt, ein Oberflächenbereich eines Substrats derart entfernt, dass ein Bereich des Nanoelements freigelegt wird, und eine Gate-isolierende Struktur und eine Gate-Struktur das Nanoelement vollumfänglich bedeckend gebildet.

Electronic component i.e. organic FET, for electrical circuit, has auxiliary layer arranged in direct contact with semiconductor layer and including islands that are electrically insulated from each other

The component i.e. organic FET (1), has an organic semiconductor layer (4) with two electrically conductive layer areas (2a, 2b) arranged in direct contact with the layer. The conductive layer areas are arranged at a distance from each other by a channel (7). An auxiliary layer (3) is arranged in direct contact with the layer, and has islands (3a) that are electrically insulated from each other and are made of electrically conductive material. The auxiliary layer is embedded into the semiconductor layer. An independent claim is also included for a method of manufacturing an electronic component.

Ultradünne Dielektrika und deren Anwendung in organischen Feldeffekt-Transistoren

Der Gegenstand der vorliegenden Anmeldung ist ein organischer Feldeffekt-Transistor, aufweisend ein Substrat, eine Source-, eine Drain- und eine Gate-Elektrode und ein organisches Halbleitermaterial, wobei zwischen der Gate-Elektrode und dem organischen Halbleitermaterial eine Dielektrikumsschicht (Gate-Dielektrikum) angeordnet ist, die aus einer selbstorganisierten Monolage einer organischen Verbindung erhalten wird, die eine Ankergruppe, eine Linkergruppe, eine Kopfgruppe und eine aliphatische Orientierungsgruppe aufweist, wobei die Ankergruppe, die Linkergruppe, die Kopfgruppe und die aliphatische Orientierungsgruppe in der oben genannten Reihenfolge miteinander verknüpft sind.

Mikroelektronisches Bauelement

Polymergemische für gedruckte Polymerelektronik-Schaltungen

Um die Viskosität halbleitender Polymere in Lösung zu erhöhen, werden diese mit nicht-halbleitenden Polymeren gemischt.

ORGANISCHER DÜNNFILMTRANSISTOR MIT SILOXANPOLYMERGRENZFLÄCHE

Low contact resistance organic thin film transistors

Organic semiconductor compositions

A self-aligning patterning method

Polymeric compound, thin polymer film, and thin polymer film element including the same

Semiconductor blend

Continuous process for preparing nanodispersions using an ultrasonic flow-through heat exchanger

Benzodithiophene based materials compositions

Pentathienyl-fluorene copolymer

Method for fabricating a thin film pattern

A method of fabricating a thin film pattern according to an embodiment of the present invention comprises forming an organic material pattern (115) on a substrate (102), forming a metal material (118a) of liquid phase on a substrate (102) provided with the organic material pattern (115), hardening the metal material (118a) of liquid phase, and removing the metal material (118a) located on the organic material pattern (115), allowing some metal material (118a) to be left at an area non-overlapped with the organic material pattern (115).

Method of fabricating organic thin film transistor using surface energy control

Electronic devices and methods of making the same using solution processing techniques

OTFT gate dielectrics

The gate dielectric comprises a cross-linked polymer and a fluorine containing polymer. The gate dielectric may comprise separate layers or a blended layer of cross-linked polymer and fluorine containing polymer material. The gate dielectric constant is in the range of 1.9 to 2.3.

Fabricating OTFTs using the LITI method

The source/drain electrode materials are deposited using a Laser Induced Thermal Imaging LITI) method to transfer patterned source/drain electrode layers from a donor substrate onto organic TFT device substrates or TFT device layers. Source and drain charge neutral dopant materials such as substituted TCNQ and F4TCNQ may also be deposited by LITI. Top and bottom gate device structures are disclosed. The OTFT device may be used for controlling active matrix OLED displays.

Organic semiconductor compounds and devices

A semiconducting compound comprises the structure: where X1and X2are independently S, Se, Si, R1R2, O, CR3, N, NR4, where R1to R4independently comprise hydrogen, straight, branched or cyclic alkyl, akenyl or alkynyl groups, preferably having 1 to 20 carbons, alkoxy, aryl, silyl or amino; where each of Ar1to Ar4is optional and independently comprises, if present, an aryl or heteroaryl group; and where Y1to Y4independently comprise hydrogen, reactive groups, optionally substituted straight, branched or cyclic alkyl, alkoxy, akenyl, alkynyl, amido or amino groups, preferably having 1 to 20 carbon atoms, optionally substantial aryl or heteroaryl where at least one of Y1to Y4does not comprise hydrogen. Also shown is an electronic device having an organic semiconductor portion e.g. a thin film transistor, and method of manufacturing an electronic device by applying a solution of semiconducting compound.

Organic Transistor Arrays

A device comprising an array of transistors, including: patterned conductive layers located at lower 18 and upper levels 20 in a stack of layers on a substrate 14, which patterned conductive layers define gate conductors 12 and source-drain electrodes 2,4,6 of the array of transistors; wherein the stack of layers further comprises a dielectric layer 16 below said lower level 18, and a further patterned conductive layer 8 below said dielectric layer 16; and wherein said further patterned conductive layer 8 both provides an electrical function in said array of transistors via said dielectric layer 16 , and defines openings via which the dielectric layer 16 serves to increase the strength of adhesion between the device substrate 14 and the patterned conductive layer 2,4,6 at said lower level. The further patterned conductive layer 8 may define an array of conductive elements for capacitive coupling via said dielectric layer 16 with overlying conductive elements 6 at said lower level 18. The ...

A field-effect transistor comprising a layer of an organic semiconductor

Organic thin film transistors, active matrix organic optical devices and methods of making the same

A method of manufacturing an organic thin film transistor, comprising: providing a substrate comprising source and drain electrodes defining a channel region; forming a patterned layer of insulting material defining a well surrounding the channel region; depositing a protective layer in the well; subjecting exposed portions of the patterned layer of insulating material to a de-wetting treatment to lower the wettability of the exposed portions; removing the protective layer; and depositing organic semiconductive material from solution into the well.

N-channel transistor

Electrode surface modification layer for electronic devices

There is disclosed a method for preparing a modified electrode for an organic electronic device, wherein said modified electrode comprises a surface modification layer, comprising: (i) depositing a solution comprising M(tfd)3, wherein M is Mo, Cr or W, and at least one solvent onto at least a part of at least one surface of said electrode; and (ii) removing at least some of said solvent to form said surface modification layer on said electrode.

Method of horizontally growing carbon nanotubes and field effect transistor using the carbon nanotubes grown by the method

Organic then film transistors and methods of making the same

Method of fabricating organic thin film transistor using surface energy control

Organic thin film transistors, active matrix organic optical devices and methods of making the same

Organic thin film transistor

Organic semiconductor compositions

An organic semiconductor composition comprising a polyacene and an organic binder, which is a semiconducting binder having a permittivity at 1000Hz of 3.4 to 8.0. The polyacene may be an optionally substituted anthracene, tetracene (naphthacene), pentacene, hexacene or heptacene, wherein said substituents may form carbocyclic/heterocyclic rings fused with the polyacene. Preferred polyacenes include compounds doubly substituted by branched alkylsiliylethynyl groups and methoxy groups and polyacenes further condensed with thiophene rings at each end of the polyacene molecule, said compounds also being doubly substituted by branched alkylsiliylethynyl groups and also substituted at each thiophene ring by ethyl groups. Preferred binders include poly(triarylamines) wherein at least one of the aryl groups is substituted by a polarising group, preferably selected from cyanoalkyl, alkoxy and nitrile groups. The composition can be used in organic semiconductor layers and devices, particularly in ...

Transistors and methods of making them

Carbon nanotube transistor having extended contacts

AMBIPOLARE, LIGHT WITH ANIMAL END OF FIELD-EFFECT TRANSISTORS

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

PRODUCTION OF ELECTRONIC ELEMENTS

STRUCTURE OF A SEMICONDUCTOR ARRANGEMENT AND A METHOD FOR THE PRODUCTION OF A SEMICONDUCTOR ARRANGEMENT

PROCEDURE FOR THE PRODUCTION OF REGIOREGULÄREN POLYMERS

PROCEDURE FOR THE EDUCATION OF AN ORGANIC SEMICONDUCTOR COMPONENT BY A FUSION TECHNOLOGY

PROCEDURE FOR MANUFACTURING ORGANIC FIELD-EFFECT TRANSISTORS

ORGANIC ELECTRONIC ARRANGEMENTS AND PROCEDURES FOR YOUR PRODUCTION USING SOLUTION PROCESSING TECHNIQUES

ELECTRONIC ELEMENT

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

EMITTING POLYMERS AND DEVICES THESE POLYMERS CONTAINING

Liquid crystalline rylene tetracarboxylic acid derivatives and use thereof

POLYMER THIN FILM AND POLYMER THIN FILM DEVICE USING SAME

METHOD OF MAKING TRANSISTORS

Self-aligned nanotube field effect transistor and method of fabricating same

CARBONYL-FUNCTIONALIZED THIOPHENE COMPOUNDS AND RELATED DEVICE

Carbonyl-functionalized oligo/polythiophene compounds, and related semiconductor components and related device structures.

ALIGNED POLYMERS FOR AN ORGANIC TFT

A method for forming an electronic device having a semiconducting active layer comprising a polymer, the method comprising aligning the chains of the polymer parallel to each other by bringing the polymer into a liquid-crystalline phase.

SOLUTION PROCESSING

... ²²²A method for forming on a substrate an electronic device including an ²electrically conductive or semiconductive material in a plurality of regions, ²the operation of the device utilising current flow from a first region to a ²second region, the method comprising: forming a mixture by mixing the material ²with a liquid; forming on the substrate a confinement structure including a ²first zone in a first area of the substrate and a second zone in a second area ²of the substrate, the first zone having a greater repellence for the mixture ²than the second zone, and a third zone in a third area of the substrate spaced ²from the second area by the first area, the first zone having a greater ²repellence for the mixture than the third zone, and depositing the material on ²the substrate by applying the mixture over the substrate whereby the deposited ²material may be confined by the relative repellence of the first zone to ²spaced apart regions defining the said first and second regions of the ...

PERYLENE N-TYPE SEMICONDUCTORS AND RELATED DEVICES

Mono- and diimide perylene and naphthalene compounds, N- and core substituted with electron-withdrawing groups, for use in the fabrication of various device structures.

SOLUTION PROCESSING

A method for forming on a substrate an electronic device including an electrically conductive or semiconductive material in a plurality of regions, the operation of the device utilising current flow from a first region to a second region, the method comprising: forming a mixture by mixing the material with a liquid; forming on the substrate a confinement structure including a first zone in a first area of the substrate and a second zone in a second area of the substrate, the first zone having a greater repellence for the mixture than the second zone, and a third zone in a third area of the substrate spaced from the second area by the first area, the first zone having a greater repellence for the mixture than the third zone, and depositing the material on the substrate by applying the mixture over the substrate whereby the deposited material may be confined by the relative repellence of the first zone to spaced apart regions defining the said first and second regions of the device and being ...

SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME

A self-aligned carbon-nanotube field effect transistor semiconductor device comprises a carbon-nanotube [104] deposited on a substrate [102], a source and a drain [106-107] formed at a first end and a second end of the carbon- nanotube [104], respectively, and a gate [112] formed substantially over a portion of the carbon-nanotube [104], separated from 10 the carbon-nanotube by a dielectric film [111].

CELLULOSES AND DEVICES THEREOF

... ²²²² An electronic device including a dielectric layer including a cellulose ²derivative is disclosed.² ...

ELECTRONIC DEVICE COMPRISING SEMICONDUCTING POLYMERS

An electronic device comprises a semiconducting polymer of Formula (I): (see formula I) wherein X is independently selected from S, Se, O, and NR, wherein R is independently selected from hydrogen, alkyl, substituted alkyl, aryl, substituted aryl, heteroaryl, and -CN; Ar is independently a conjugated divalent moiety; a is an integer from 1 to about 10; and n is an integer from 2 to about 5,000. The electronic device may be an organic thin film transistor.

DEVICE AND PROCESS INVOLVING PINHOLE UNDERCUT AREA

An electronic device fabrication method including: (a) providing a dielectric region and a lower electrically conductive region, wherein the dielectric region includes a plurality of pinholes each with an entry and an exit; and (b) depositing an etchant for the lower electrically conductive region into the pinholes that undercuts the pinholes to create for a number of the pinholes an overhanging surface of the dielectric region around the exit facing an undercut area of the lower electrically conductive region wider than the exit.

DIELECTRIC COMPOSITION FOR THIN-FILM TRANSISTORS

An electronic device, such as a thin-film transistor, includes a substrate and a dielectric layer formed from a dielectric composition. The dielectric composition includes a dielectric material, a crosslinking agent, and an infrared absorbing agent. In particular embodiments, the dielectric material comprises a lower-k dielectric material and a higher-k dielectric polymer. When deposited, the lower-k dielectric material and the higher-k dielectric material form separate phases. The infrared absorbing agent allows the dielectric composition to attain a temperature that is significantly greater than the temperature attained by the substrate during curing. This difference in temperature allows the dielectric layer to be cured at relatively high temperatures and/or shorter time periods, permitting the selection of lower- cost substrate materials that would otherwise be deformed by the curing of the dielectric layer.

Conductive organic compound and its electronic device

The organic EL display device and electronic apparatus

Integrated circuit

An integrated circuit, comprising a first insulating layer; a semiconductor layer; a first layer of conductors in near-ohmic or ohmic contact with the semiconductor layer and a second layer of conductors separated from the semiconductor layer by the first insulating layer, the first and second layers of conductors being patterned to form a plurality of functional blocks comprising a plurality of transistors, the first layer conductors serving as source/drain electrodes and the second layer conductors serving as gate electrodes; wherein each functional block comprises a corresponding island of the semiconductor layer isolated from that of another functional block by portions of a second insulating layer, the functional blocks being arranged such that (i) source/drain electrodes that are from different transistors and neighbour one another are arranged to be at the same potential and (ii) no conductors are present between said neighbouring electrodes.

Self-aligned nanotube field effect transistor and method of fabricating same

Polymer having unit obtained by condensation of difluorocyclopentanedione ring and aromatic ring, organic thin film using the same, and organic thin film device

Disclosed is a polymer having a repeating unit represented by the general formula (I) below and a reduction potential based on ferrocene as measured by cyclic voltammetry of from -1.5 V to -0.5 V. Inthe formula, Ar<1> represents a divalent aromatic hydrocarbon group or a divalent heterocyclic group. (These groups may be substituted by a substituent).

Ketopyrroles as organic semiconductors

Composition for forming gate dielectric film of thin film transistor

Semiconductor device and process for producing same

The invention provides a process for producing a semiconductor device including a first embossing step of pressing a stamp having a relief pattern onto a surface of a substrate to form a depression pattern on the surface of the substrate; a second step of feeding an application material composed of a semiconductor material or a conductive material into the depression pattern by printing; and a third step of curing the application material fed by printing.

Organic thin film transistor and manufacture method thereof and plate displayer

Manufacturing method of display device

N-type semiconductor materials for thin film transistors

A thin film transistor comprises a layer of organic semiconductor material comprising a tetracarboxylic diimide 3,4,9,10-perylene-based compound having, attached to each of the imide nitrogen atoms a substituted or unsubsitituted phenylalkyl group. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating an organic thin-film transistor device, preferably by sublimation or solution-phase deposition onto a substrate, wherein the substrate temperature is no more than 100 DEG C.

Semiconductor materials prepared from dithienylvinylene copolymers

Phthalocyanine nano-size structure, and the use of the nano-size of the structure of the electronic element

Insulating layer, electronic device, field effect transistor, and polyvinylthiophenol

The invention provides an insulting layer which enables to improve device characteristics when used in an electronic device. A polymer insulator containing a repeating unit represented by the formula below is contained in the insulating layer. In the formula, R represents a direct bond or an arbitrary linking group; Ar represents an optionally substituted divalent aromatic group; and R represents a hydrogen atom, a fluorine atom or a monovalent organic group.

REDUCTION IN the EFFECTS OF CAPS DUE TO the LASER ABLATION Of a METAL LEVEL PER USE Of a LAYER OF POLYMER PHOTOOU THERMO-RETICULABLE NOT RETICLE

NEW MESOMORPHIC ORGANIC SEMICONDUCTOR MATERIALS MACROMOLECULAR

MICROELECTRONIC DEVICE HAS DISJOINED PORTIONS OF SEMICONDUCTOR AND METHOD FOR REALIZATION Of SUCH a DEVICE

Organic thin film transistor as switching element for display device, has gate electrode, gate insulation layer, source and drain electrode, organic semiconductor layer, hydrophilic adhesive layer and hydrophobic adhesive layer

Le transistor à couches minces organiques comprenant une électrode de grille (112) formée sur un substrat (110); une couche d'isolation (114) de grille; des électrodes de source et de drain (116A/116B) chevauchées par les deux bords de l'électrode de grille ; une couche semi-conductrice organique (120) formée sur la couche d'isolation de grille ; une première couche adhésive présentant les propriétés hydrophiles (114a) formée entre la couche d'isolation (114) de grille et les électrodes de source/de drain ; et une seconde couche adhésive présentant les propriétés hydrophobes (114b) formée entre la couche semi-conductrice organique et la couche d'isolation de grille. Transistor à couches minces organiques utilisé comme élément de commutation pour un dispositif d'affichage et son procédé de fabrication qui permettent de diminuer la résistance de contact dans une zone de contact entre la couche semi-conductrice organique et les électrodes de source/de drain.

ORGANIC LIGHT EMITTING TRANSISTOR ELEMENT AND METHOD FOR MANUFACTURING SAME

Fabricating Method of Thin Film Transistor, and Manufacturing Method of Liquid Crystal Display Device

전기 소자의 제조 방법과 이를 위한 전기 소자 어레이 및 그 제조 방법

... 전기 소자 어레이의 제조 방법을 제시한다. 미세 채널 구조를 포함하는 플랫폼을 기판에 부착하고, 조성이 서로 다른 제1 용액과 제2 용액을 미세 채널 구조에 주입하고 용매를 증발시켜 박막열을 기판에 형성한다. 박막열의 길이 방향을 따라 서로 다른 조건으로 박막열을 처리한다.

Organic thin film transistor and flat display apparatus comprising the same

적어도 1개의 벤조[C][1,2,5]티아디아졸-5,6-디카르보니트릴-단위를 포함하는 중합체의 제조

... 본 발명은 화학식 5의 화합물 (여기서, Y2는 I, Br, Cl 또는 O-S(O)2CF3임)을 S-공여자로 처리하여 화학식 4의 화합물 (여기서, Y2는 화학식 5의 화합물에 대하여 정의된 바와 같음)을 수득하는 단계 (v)를 포함하는, 화학식 1의 적어도 1개의 단위를 포함하는 중합체의 제조 방법, 화학식 4의 화합물의 제조 방법 및 화학식 4의 화합물을 제공한다.

SEMICONDUCTORS BASED ON DIKETOPYRROLOPYRROLES

전자 소자용 물질

... 본 출원은 화학식 (I) 또는 (II) 의 치환 벤즈안트라센 화합물에 관한 것이다. 본 출원은 또한 상기 벤즈안트라센 화합물을 포함하는 전자 소자에 관한 것이다.

INTERLAYER FOR ELECTRONIC DEVICES

ORGANIC SEMICONDUCTOR METERIAL, FIELD-EFFECT TRANSISTOR, AND MANUFACTURING METHOD THEREOF

ORGANIC THIN FILMS, METHODS FOR FORMING THE SAME, AND ORGANIC THIN FILM TRANSISTORS INCLUDING THE SAME

Provided is a method of forming an organic thin film including forming a first layer containing a first organic material on a substrate, performing a first imprint process on the first layer using a pattern mold, forming a second layer containing a second organic material on the first layer after the first imprint process, and performing a second imprint process on the second layer using a blanket mold. 1. A method of forming an organic thin film , comprising:forming a first layer containing a first organic material, on a substrate;performing a first imprint process on the first layer using a pattern mold;forming a second layer containing a second organic material on the first layer, after the first imprint process; andperforming a second imprint process on the second layer using a blanket mold.2. The method of claim 1 , wherein the performing of the first imprint process comprises:pressing the first layer with the pattern mold to form recess regions in the first layer; andcuring the first layer provided with the recess region.3. The method of claim 2 , wherein the second layer is formed to fill the recess regions.4. The method of claim 2 , wherein the pattern mold comprises a plurality of patterned portions protruding from a surface of the pattern mold claim 2 , andeach of the patterned portions has the same height as that of the corresponding one of the recess regions.5. The method of claim 2 , wherein the curing of the first layer is performed by irradiating an ultraviolet light onto the first layer or applying a thermal treatment to the first layer.6. The method of claim 1 , wherein the first and second organic materials are the same material.7. The method of claim 1 , wherein the second imprint process comprises:pressing the second layer with the blanket mold to planarize a surface of the second layer; andcuring the planarized second layer.8. The method of claim 7 , wherein the curing of the second layer is performed by irradiating an ultraviolet light onto the ...

TRIAZINE DERIVATIVES FOR ELECTRONIC APPLICATIONS

There is provided a compound having at least one unit of Formula I 2. The compound of claim 1 , wherein at least one c>0 and Q is an N claim 1 ,O claim 1 ,S-heterocycle.3. The compound of claim 2 , wherein Q is pyridine claim 2 , pyrimidine claim 2 , triazine claim 2 , carbazolyl claim 2 , dibenzopyran claim 2 , dibenzofuran claim 2 , dibenzothiophene claim 2 , or a deuterated analog thereof.4. The compound of claim 1 , wherein Q is phenyl claim 1 , naphthyl claim 1 , carbazolyl claim 1 , diphenylcarbazolyl claim 1 , triphenylsilyl claim 1 , pyridyl claim 1 , or a deuterated analog thereof.8. The device of claim 6 , wherein the device comprises at least one electroactive layer positioned between two electrical contact layers claim 6 , wherein the at least one electroactive layer of the device includes a compound having at least one unit of Formula I.9. The device of claim 8 , comprising an anode claim 8 , a hole injection layer claim 8 , a photoactive layer claim 8 , an electron transport layer claim 8 , and a cathode claim 8 , wherein at least one of the photoactive layer and the electron transport layer comprises a compound having at least one unit of Formula I.10. The device of claim 9 , wherein the photoactive layer comprises (a) a host material having at least one unit of Formula I and (b) an organometallic electroluminescent dopant.11. The device of claim 9 , wherein the hole injection layer comprises at least one electrically conductive polymer and at least one fluorinated acid polymer.12. The device of claim 9 , wherein the electron transport layer comprises a compound having at least one unit of Formula I. This application claims priority under 35 U.S.C. §119(e) from U.S. Provisional Application No. 61/424,971, filed on Dec. 20, 2010, which is incorporated by reference herein in its entirety.1. Field of the DisclosureThis disclosure relates in general to triazine compounds. It also relates to organic electronic devices including at least one layer having a ...

Bank structures for organic electronic devices

Embodiments in accordance with the present invention relate generally to the use of polycycloolefinic polymers as a structure defining material in organic electronic devices, and more specifically to separators, insulating structures or bank structures of such devices and to organic electronic devices comprising such structures, to processes for preparing such structures and to organic electronic devices encompassing such structures.

ORGANIC THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING ORGANIC THIN-FILM TRANSISTOR

A transistor manufacturing method includes: forming a gate electrode above a substrate; forming a gate insulator above the gate electrode; forming source and drain electrodes above the gate insulator; forming a sacrificial layer above the source and drain electrodes; forming a partition wall layer above the sacrificial layer; forming an opening by patterning the partition wall layer to partly expose the sacrificial layer; removing the sacrificial layer to expose the source and drain electrodes; and forming an organic semiconductor layer to cover the source and drain electrodes and the gate insulator, wherein the source and drain electrodes occupy 50% or more of a surface area of the opening, and the source and drain electrodes are spaced apart at an interval smaller than an average granular diameter of crystals each of which is at least partly positioned above the source or drain electrode. 128-. (canceled)29. An organic thin-film transistor manufacturing method , comprising:forming a gate electrode above a substrate;forming a gate insulator above the gate electrode;forming a source electrode and a drain electrode spaced apart above the gate insulator;forming a sacrificial layer above the source electrode and the drain electrode;forming a partition wall layer above the sacrificial layer;forming an opening by patterning the partition wall layer to expose the gate insulator between the source electrode and the drain electrode and expose a part of the sacrificial layer above the source electrode and the drain electrode;removing the exposed part of the sacrificial layer to expose the source electrode and the drain electrode; andforming, in the opening, an organic semiconductor layer to cover exposed top surfaces of the source electrode and the drain electrode and a top surface of the gate insulator,wherein the exposed top surfaces of the source electrode and the drain electrode in the opening occupy 50% or more of a surface area of the opening,the source electrode and ...

SILK TRANSISTOR DEVICES

The invention relates to ecosustainable and biocompatible, low cost, ambient friendly electronic and optoelectronic devices, such as transistors and light-emitting transistors, made with silk fibroin or blended with other biopolymers, methods for fabrication and methods of using the silk-based electronics and optoelectronics. The silk-based electronics and optoelectronics can be implanted in vivo and in vitro for biomedical applications, such as for drug discovery or drug screening assays and devices. The silk-based devices may be used in the food industry and embedded in packaging for tracking and sensing, for security purposes or exploited as disposable not harmful for the environment efficient general electronic and optoelectronic devices. 1. A silk-based transistor comprising:a substrate including a gate contact;a silk dielectric layer positioned over the substrate;at least one active layer comprising an organic semiconducting material positioned over the silk dielectric layer; andsource and drain contacts positioned over the active layer.2. The silk-based transistor of claim 1 , wherein the source claim 1 , drain and gate contacts claim 1 , substrate claim 1 , active layer and silk dielectric layer are biocompatible.3. The silk-based transistor of claim 1 , wherein the source claim 1 , drain claim 1 , or gate contact is a metal or metal oxide selected from the group consisting of gold claim 1 , copper claim 1 , iron claim 1 , aluminum claim 1 , indium-tin-oxide claim 1 , and combination thereof.4. The silk-based transistor of claim 1 , wherein the active layer is p-type claim 1 , n-type or p-n junction type.5. The silk-based transistor of claim 1 , wherein the active layer is a combination of multiple layers which present charge transport and/or light emitting properties.6. The silk-based transistor of claim 1 , wherein the organic semiconducting material is selected from a group consisting of: thiophene derivatives claim 1 , perylene derivatives claim 1 , ...

SELF-HEALING COMPOSITE AND DEVICE INCLUDING SELF-HEALING FILM

A self-healing composite includes a matrix including an elastomer and conductive nanostructures embedded in the matrix, wherein the elastomer includes a polymer main chain, a —HN—C(═O)—NH— containing first structural unit capable of forming a strong hydrogen bond, and a —HN—C(═O)—NH— containing second structural unit capable of forming a weak hydrogen bond. 1. A self-healing composite comprisinga matrix including an elastomer, andconductive nanostructures embedded in the matrixwherein the elastomer comprises a polymer main chain,a —HN—C(═O)—NH— containing first structural unit capable of forming a strong hydrogen bond, anda —HN—C(═O)—NH— containing second structural unit capable of forming a weak hydrogen bond.2. The self-healing composite of claim 1 , wherein the polymer main chain comprises at least one of polysiloxane claim 1 , polydialkylsiloxane wherein claim 1 , the alkyl is a C1 to C6 alkyl claim 1 , for example polydimethylsiloxane claim 1 , polyethylene oxide (PEO) claim 1 , polypropylene oxide (PPO) claim 1 , polybutylene oxide (PBO) claim 1 , perfluoropolyether (PFPE) claim 1 , polyolefin claim 1 , poly(ethylene-co-1-butylene) claim 1 , polybutadiene claim 1 , hydrogenated poly(butadiene) claim 1 , a (poly(ethylene oxide)-poly(propylene oxide) copolymer claim 1 , poly(hydroxyalkanoate) claim 1 , a styrene-butadiene copolymer (SB) claim 1 , a styrene-butadiene-styrene copolymer (SBS) claim 1 , a styrene-ethylene-butylene-styrene copolymer (SEBS) claim 1 , an ethylene propylene diene rubber (EPDR) claim 1 , an acrylic rubber claim 1 , a polychloroprene rubber claim 1 , polyurethane claim 1 , a fluoro-rubber claim 1 , a butyl rubber claim 1 , or a silicone rubber.3. The self-healing composite of claim 2 , wherein the polyolefin is one of polyethylene (PE) claim 2 , polypropylene (PP) claim 2 , polybutylene (PB) claim 2 , a copolymer thereof claim 2 , or a mixture thereof.5. The self-healing composite of claim 4 , wherein the arylene group is a single ...

SEMICONDUCTOR ELEMENT AND INSULATING LAYER-FORMING COMPOSITION

Provided is a semiconductor element having a semiconductor layer and an insulating layer adjacent to the semiconductor layer, in which the insulating layer is formed of a crosslinked product of a polymer compound having a repeating unit (IA) represented by the following General Formula (IA) and a repeating unit (IB) represented by the following General Formula (IB). 2. The semiconductor element according to claim 1 , wherein Lis represented by the following Formula (1a) claim 1 ,{'br': None, 'sup': 1a', '3a, '*-Ar-L** \u2003\u2003Formula (1a)'}{'sup': 3a', '1a', '1a', '2a, 'in Formula (1a), Lrepresents a single bond or a linking group, Arrepresents an aromatic ring, * indicates the bonding position of the carbon atom to which Rin the repeating unit (IA) is bonded, and ** indicates the bonding position of Lin the repeating unit (IA).'}3. The semiconductor element according to claim 2 , wherein Aris a benzene ring.6. The semiconductor element according to claim 1 , wherein the crosslinkable group X is an epoxy group claim 1 , an oxetanyl group claim 1 , a hydroxymethyl group claim 1 , an alkoxymethyl group claim 1 , a (meth)acryloyloxy group claim 1 , a styryl group claim 1 , or a vinyl group.7. The semiconductor element according to claim 1 , wherein the crosslinkable group X is a hydroxymethyl group or an alkoxymethyl group.8. The semiconductor element according to claim 1 , wherein the crosslinked product is a crosslinked product by a crosslinking reaction between the crosslinkable group X of the repeating unit (IA) and the repeating unit (IB).9. The semiconductor element according to claim 8 , wherein the crosslinked product has a crosslinked portion where a hydroxymethyl group or an alkoxymethyl group as a crosslinkable group is formed by a reaction.10. The semiconductor element according to claim 1 , wherein the semiconductor layer contains an organic semiconductor. This application is a Continuation of PCT International Application No. PCT/JP2015/058775 filed ...

ORGANIC SEMICONDUCTOR ELEMENT, MANUFACTURING METHOD THEREOF, COMPOUND, ORGANIC SEMICONDUCTOR COMPOSITION, ORGANIC SEMICONDUCTOR FILM, AND MANUFACTURING METHOD THEREOF

Objects of the present invention are to provide an organic semiconductor element in which carrier mobility is high, variation of mobility is suppressed, and temporal stability under high temperature and high humidity is excellent, and a manufacturing method thereof, to provide a novel compound suitable for an organic semiconductor, and to provide an organic semiconductor film in which mobility is high, variation of mobility is suppressed, and temporal stability under high temperature and high humidity is excellent, a manufacturing method thereof, and an organic semiconductor composition that can suitably form the organic semiconductor film. 5. The organic semiconductor element according to claim 4 , further comprising:{'sup': '−1', 'a gate insulating film having a surface energy of 50 to 75 mNm.'}6. The organic semiconductor element according to claim 1 , that is an organic thin film transistor.10. The compound according to claim 7 , that is an organic semiconductor compound.11. An organic semiconductor composition comprising:{'claim-ref': {'@idref': 'CLM-00007', 'claim 7'}, 'the compound according to , and'}a solvent.13. An organic semiconductor film comprising the compound according to .15. A method of manufacturing an organic semiconductor film claim 7 , comprising:{'claim-ref': {'@idref': 'CLM-00011', 'claim 11'}, 'a coating step of coating a substrate with the organic semiconductor composition according to .'}16. A method of manufacturing an organic semiconductor film claim 7 , comprising:{'sup': '−1', 'claim-ref': {'@idref': 'CLM-00012', 'claim 12'}, 'a coating step of coating a gate insulating film having a surface energy of 50 to 75 mNmwith the organic semiconductor composition according to .'}17. A method of manufacturing an organic semiconductor element claim 7 , comprising:{'claim-ref': {'@idref': 'CLM-00011', 'claim 11'}, 'a coating step of coating a substrate with the organic semiconductor composition according to .'}18. A method of manufacturing an ...

Proazaphosphatranes As N-Dopants In Organic Electronics

An organic n-dopant for doping organic electron transport materials. The n-dopant comprising at least one proazaphosphatrane compound having a triple N-substituted phosphorus atom of the formula 23-. (canceled)4. The n-dopant as claimed in claim 1 , wherein at least one of the X-Xis a substituted or unsubstituted C2 alkyl group.5. The n-dopant as claimed in claim 1 , wherein each of the X-Xis a substituted or unsubstituted C2 alkyl group.6. The n-dopant as claimed in claim 1 , wherein at least two of the R-Rare joined to one another via a bridge.7. The n-dopant as claimed in claim 1 , wherein the n-dopant has only one proazaphosphatrane group (PN).10. The method as claimed in claim 9 , wherein the matrix material is an electron-conducting matrix material selected from the group consisting of 2 claim 9 ,2′ claim 9 ,2″-(1 claim 9 ,3 claim 9 ,5-benzinetriyl)tris(1-phenyl-1-H-benzimidazole) claim 9 , 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1 claim 9 ,3 claim 9 ,4-oxadiazole; 2 claim 9 ,9-dimethyl-4 claim 9 ,7-diphenyl-1 claim 9 ,10-phenanthroline (BCP) claim 9 , 8-hydroxyquinolinolatolithium; 4-(naphthalen-1-yl)-3 claim 9 ,5-diphenyl-4H-1 claim 9 ,2 claim 9 ,4-triazole; 1 claim 9 ,3-bis[2-(2 claim 9 ,2′-bipyridine-6-yl)-1 claim 9 ,3 claim 9 ,4-oxadiazo-5-yl]benzene; 4 claim 9 ,7-diphenyl-1 claim 9 ,10-phenanthroline (BPhen); 3-(4-biphenylyl)-4-phenyl-5-tert-butylphenyl-1 claim 9 ,2 claim 9 ,4-triazole; bis(2-methyl-8-quinolinolate)-4-(phenylphenolato)aluminum; 6 claim 9 ,6′-bis[5-(biphenyl-4-yl)-1 claim 9 ,3 claim 9 ,4-oxadiazo-2-yl]-2 claim 9 ,2′-bipyridyl; 2-phenyl-9 claim 9 ,10-di(naphthalen-2-yl)anthracene; 2 claim 9 ,7-bis[2-(2 claim 9 ,2′-bipyridine-6-yl)-1 claim 9 ,3 claim 9 ,4-oxadiazo-5-yl]-9 claim 9 ,9-dimethylfluorene; 1 claim 9 ,3-bis[2-(4-tert-butylphenyl)-1 claim 9 ,3 claim 9 ,4-oxadiazo-5-yl]benzene; 2-(naphthalen-2-yl)-4 claim 9 ,7-diphenyl-1 claim 9 ,10-phenanthroline; 2 claim 9 ,9-bis(naphthalen-2-yl)-4 claim 9 ,7-diphenyl-1 claim 9 ,10-phenanthroline; ...

ELECTRONIC DEVICE INSULATING LAYER, AND METHOD FOR PRODUCING ELECTRONIC DEVICE INSULATING LAYER

An object of the present invention is to provide an electronic device insulating layer which may improve characteristics of an electronic device. The means for solving the object is an electronic device insulating layer comprising a first insulating layer formed from a first insulating layer material and a second insulating layer formed on the first insulating layer from a second insulating layer material, the first insulating layer material being an insulating layer material comprising a photosensitive resin material (A), a tungsten (V) alkoxide (B) and a basic compound (C), the second insulating layer material being an insulating layer material comprising a polymer compound (D) which contains a repeating unit containing a cyclic ether structure and a repeating unit having an organic group capable of producing a phenolic hydroxyl group by the action of an acid. 2. The electronic device insulating layer according to claim 1 , wherein said first insulating layer material further comprises a basic compound (C).3. The electronic device insulating layer according to claim 1 , wherein said photosensitive resin material (A) is a positive photosensitive resin material (A-1) or a negative photosensitive resin material (A-2).5. The electronic device insulating layer according to claim 4 , wherein said first functional group is at least one group selected from the group consisting of an isocyanato group blocked with a blocking agent and an isothiocyanato group blocked with a blocking agent.10. The electronic device insulating layer according to claim 8 , wherein said polymer compound (G) contains at least one repeating unit selected from the group consisting of repeating units containing a first functional group defined below.first functional group: a functional group capable of affording, by the action of electromagnetic waves or heat, a second functional group capable of reacting with active hydrogen.11. The electronic device insulating layer according to claim 1 , wherein ...

THIN FILM TRANSISTOR WITH A CURRENT-INDUCED CHANNEL

A thin film transistor (TFT) includes a hole transport layer having a first side and a second side and an electron transport layer having a first side and a second side. The first side of the electron transport layer is directly interfaced to the second side of the hole transport layer. The electron transport layer includes a material having greater ionization potential and greater electron affinity than the hole transport layer, thereby forming a hole barrier and an electron barrier at the junction between the electron transport layer and the hole transport layer. A channel in the TFT is created by current injected into the electron transport layer from a gate electrode rather than by an electrostatic field generated by voltage applied to the gate electrode. The accumulated charge density in the channel of the TFT can be significantly larger than what can be generated through field effect principle, therefore a much lower gate voltage is needed than in a conventional TFT. 1. A semiconductor device , comprising:a hole transport layer having a first side and a second side, the hole transport layer comprising a material in which hole mobility is greater than the electron mobility and having a first ionization potential and a first electron affinity;an electron transport layer having a first side and a second side, the electron transport layer comprising a material in which electron mobility is greater than hole mobility and having a second ionization potential and a second electron affinity, the second ionization potential being greater than the first ionization potential and the second electron affinity being greater than the first electron affinity, wherein the first side of the electron transport layer is directly interfaced to the second side of the hole transport layer;a first electrode directly interfaced to the first side of the hole transport layer;a second electrode directly interfaced to the first side of the hole transport layer and physically separated ...

ORGANIC SEMICONDUCTOR COMPOSITION, METHOD OF MANUFACTURING ORGANIC THIN FILM TRANSISTOR, AND ORGANIC THIN FILM TRANSISTOR

There is provided an organic semiconductor composition containing the following (a) to (c), a method of manufacturing an organic thin film transistor using this composition, and an organic thin film transistor including (a) and (b) in an organic semiconductor layer: 6. The organic semiconductor composition according to claim 4 ,{'sup': '1/2', 'wherein an absolute value of a difference between a solubility parameter of the structural unit represented by Formula (1) and a solubility parameter of a structural unit represented by Formula (I-1) is 5.0 MPaor less.'}7. The organic semiconductor composition according to claim 1 ,{'sup': '1/2', 'wherein a solubility parameter of the solvent in the organic semiconductor composition is 15.0 to 30.0 MPa.'}8. The organic semiconductor composition according to claim 1 ,wherein in a case where a viscosity of the organic semiconductor composition is set as p1, a viscosity of the composition having the composition excluding the insulating polymer from the organic semiconductor composition is set as p2, p1/p2<5 is satisfied.9. A method of manufacturing an organic thin film transistor claim 1 , comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'forming an organic semiconductor layer by using the organic semiconductor composition according to .'}10. The method of manufacturing an organic thin film transistor according to claim 9 ,wherein the organic semiconductor layer is formed on a gate insulating layer having a surface energy of 50 mN/m to 75 mN/m.11. The method of manufacturing an organic thin film transistor according to claim 9 , comprising:exposing a film formed by using the organic semiconductor composition to a temperature higher than a glass transition temperature of the insulating polymer in the composition so as to form the organic semiconductor layer.17. The bottom gate-type organic thin film transistor according to claim 15 ,{'sup': '1/2', 'wherein an absolute value of a difference between a solubility ...

ACTIVE DEVICE AND MANUFACTURING METHOD THEREOF

An active device is disposed on a substrate and includes a gate, an organic active layer, a gate insulation layer, a plurality of crystal induced structures, a source and a drain. The gate insulation layer is disposed between the gate and the organic active layer. The crystal induced structures distribute in the organic active layer and directly contact with the substrate or the gate insulation layer. The source and the drain are disposed on two opposite sides of the organic active layer, wherein a portion of the organic active layer is exposed between the source and the drain. 1. An active device , disposed on a substrate and comprising:a gate;an organic active layer;a gate insulation layer, disposed between the gate and the organic active layer;a plurality of crystal induced structures, distributing in the organic active layer, wherein the crystal induced structures directly contact with the substrate or the gate insulation layer; anda source and a drain, disposed on two opposite sides of the organic active layer.2. The active device as recited in claim 1 , wherein the crystal induced structures separate from each other and comprise a plurality of point-shaped protrusions or a plurality of strip-shaped protrusions.3. The active device as recited in claim 1 , wherein the crystal induced structures are arranged in array or arranged dispersedly.4. The active device as recited in claim 1 , wherein shapes or sizes of the crystal induced structures are the same or different.5. The active device as recited in claim 1 , wherein the crystal induced structures are a plurality of nano-metal structures separated from each other or a plurality of silver-oxide nanowires partially overlapped with each other.6. The active device as recited in claim 1 , wherein two adjacent structures of the crystal induced structures are separated by a distance claim 1 , and the distance is from 100 nanometers to 10 micrometers.7. The active device as recited in claim 1 , further comprising:a ...

ELECTRONIC DEVICE, MANUFACTURING METHOD OF THE SAME, AND NETWORK SYSTEM

An electronic device includes: a substrate; a first all-solid-state secondary cell provided on the substrate, the first all-solid-state secondary cell including a first electrode layer, a solid electrolyte layer, and a second electrode layer; a first transistor including a first source drain, a second source drain electrically connected to the second electrode layer, and a first gate electrode; a first terminal electrically connected to the first electrode layer; a second terminal to control a potential of the first gate electrode; a third terminal electrically connected to the first source drain; and a sealing layer covering the first all-solid-state secondary cell and the first transistor, wherein the first terminal, the second terminal, and the third terminal are exposed on an upper surface of the sealing layer. 1. An electronic device comprising:a substrate;a first all-solid-state secondary cell provided on the substrate, the first all-solid-state secondary cell including a first electrode layer, a solid electrolyte layer, and a second electrode layer;a first transistor including a first source drain, a second source drain electrically connected to the second electrode layer, and a first gate electrode;a first terminal electrically connected to the first electrode layer;a second terminal to control a potential of the first gate electrode;a third terminal electrically connected to the first source drain; anda sealing layer covering the first all-solid-state secondary cell and the first transistor, whereinthe first terminal, the second terminal, and the third terminal are exposed on an upper surface of the sealing layer.2. The electronic device according to claim 1 , whereinthe first electrode layer is a negative electrode,the second electrode layer is a positive electrode, andthe first transistor is of an n type.3. The electronic device according to claim 1 , further comprising an n type second transistor covered with the sealing layer claim 1 , the second ...

METHOD OF MANUFACTURING MULTI-LAYERED THIN FILMS, MULTI-LAYERED THIN FILMS FORMED BY THE SAME, METHOD OF MANUFACTURING ORGANIC THIN FILM TRANSISTOR INCLUDING THE SAME, AND ORGANIC THIN FILM TRANSISTOR MANUFACTURED BY THE SAME

Provided are a method of manufacturing multi-layered thin films, multi-layered thin films formed by the same, a method of manufacturing an organic thin film transistor including the same, and an organic thin film transistor manufactured by the same. The method of manufacturing multi-layered thin films includes: preparing a substrate; printing a blend solution including an organic semiconductor, an insulating polymer, and a solvent on the substrate; and simultaneously forming an insulating polymer thin film and an organic semiconductor thin film on the insulating polymer thin film by using a vertical phase separation phenomenon of the organic semiconductor and the insulating polymer, in which according to contents of the organic semiconductor and the insulating polymer in the blend solution and a printing speed of the blend solution, a width of the organic semiconductor thin film, and a thickness of the insulating polymer thin film are controlled. 1. A method of manufacturing multi-layered thin films , comprising:preparing a substrate;printing a blend solution including an organic semiconductor, an insulating polymer, and a solvent on the substrate; andsimultaneously forming an insulating polymer thin film and an organic semiconductor thin film on the insulating polymer thin film by using a vertical phase separation phenomenon of the organic semiconductor and the insulating polymer,wherein according to contents of the organic semiconductor and the insulating polymer in the blend solution and/or a printing speed of the blend solution, a width of the multi-layered thin film pattern, a width of the organic semiconductor thin film, and a thickness of the insulating polymer thin film are controlled.2. The method of claim 1 , whereinthe insulating polymer is an amorphous polymer.3. The method of claim 1 , whereinthe insulating polymer is a polyacrylate-based polymer, a polyimide-based polymer, a polyphenol-based polymer, a polyvinyl alcohol-based polymer, or a combination ...

ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF

A electronic device includes: a control electrode formed on a base substrate ; an insulation layer adapted to cover the control electrode and formed of an organic insulation material; an active layer formed on the insulation layer , formed of an organic semiconductor material, and subjected to patterning; and a first electrode A and a second electrode B formed on the active layer , in which a chemical composition of a surface of a region A (A) that is a region of the insulation layer not formed with the active layer differs from a chemical composition of a region B (B) that is a region of the insulation layer located under the active layer 1. An electronic device comprising:a control electrode formed on a base substrate;an insulation layer configured to cover the control electrode and formed of an organic insulation material;an active layer formed on the insulation layer, formed of an organic semiconductor material, and subjected to patterning; anda first electrode and a second electrode formed on the active layer,wherein a chemical composition of a surface of a region A that is a region of the insulation layer not formed with the active layer differs from a chemical composition of a region B that is a region of the insulation layer located under the active layer.2. An electronic device comprising:a control electrode formed on a base substrate;an insulation layer configured to cover the control electrode and formed of an organic insulation material;a first electrode and a second electrode formed on the insulation layer; andan active layer formed on at least a portion of the insulation layer located between the first electrode and the second electrode, formed of an organic semiconductor material, and subjected to patterning,wherein a chemical composition of a surface of a region A that is a region of the insulation layer not formed with the first electrode, the second electrode, and the active layer differs from a chemical composition of a region B that is a region ...

N-TYPE END-BONDED METAL CONTACTS FOR CARBON NANOTUBE TRANSISTORS

A method for manufacturing a semiconductor device includes forming a first dielectric layer on a substrate, forming a carbon nanotube (CNT) layer on the first dielectric layer, forming a second dielectric layer on the carbon nanotube (CNT) layer, patterning a plurality of trenches in the second dielectric layer exposing corresponding portions of the carbon nanotube (CNT) layer, forming a plurality of contacts respectively in the plurality of trenches on the exposed portions of the carbon nanotube (CNT) layer, performing a thermal annealing process to create end-bonds between the plurality of the contacts and the carbon nanotube (CNT) layer, and depositing a passivation layer on the plurality of the contacts and the second dielectric layer. 1. A method for manufacturing a semiconductor device , comprising:forming a first dielectric layer on a substrate;forming a carbon nanotube (CNT) layer on the first dielectric layer;forming a second dielectric layer on the carbon nanotube (CNT) layer;patterning a plurality of trenches in the second dielectric layer exposing corresponding first portions of the carbon nanotube (CNT) layer;forming a plurality of contacts respectively in the plurality of trenches on the exposed first portions of the carbon nanotube (CNT) layer;performing a thermal annealing process to create end-bonds between the plurality of contacts and the carbon nanotube (CNT) layer;wherein the first portions of the carbon nanotube layer beneath the plurality of contacts are entirely dissolved into the plurality of contacts to remove the first portions of the carbon nanotube layer from beneath the plurality of contacts;wherein second portions of the carbon nanotube (CNT) layer under the second dielectric layer remain after the thermal annealing process;wherein the end-bonds are formed between ends of the remaining second portions of the carbon nanotube (CNT) layer and ends of bottom portions of the plurality of contacts directly on the first dielectric layer in ...

Flexible electronic device having adhesive function and method for manufacturing same

Disclosed is a flexible electronic device having an adhesive function, including an adhesive tape that includes a flexible film and an adhesive layer formed on one side of the flexible film, and an electronic device formed on a remaining side of the flexible film of the adhesive tape. Accordingly, the flexible electronic device of the present invention is transferred on a surface of various flexible materials or materials having a curved surface so as to freely adhere and minimize breakage of the electronic device and maintain performance over a long period of time, even if the substrate is modified or repeatedly bent. 1. A flexible electronic device having an adhesive function , comprising:an adhesive tape including a flexible film and an adhesive layer formed on one side of the flexible film; andan electronic device formed on a remaining side of the flexible film of the adhesive tape.2. The flexible electronic device of claim 1 , wherein the electronic device includes the flexible film as a substrate.3. The flexible electronic device of claim 1 , wherein the flexible electronic device is one or more selected from a field-effect transistor claim 1 , a solar cell claim 1 , an organic light emitting diode claim 1 , a tactile sensor claim 1 , a radio frequency identification tag claim 1 , an electronic paper claim 1 , and a bio sensor.4. The flexible electronic device of claim 3 , wherein the flexible electronic device is the field-effect transistor claim 3 , andthe field-effect transistor includesan adhesive tape including a flexible film and an adhesive layer formed on one side of the flexible film;a gate electrode positioned on a remaining side of the flexible film of the adhesive tape;a gate insulating layer positioned on the gate electrode;a source electrode and a drain electrode positioned on the gate insulating layer and disposed so as to be spaced apart from each other; andan active layer positioned on the gate insulating layer to electrically connect the ...

Organic Electronic Compositions and Device Thereof

The present invention relates to organic electronic devices, and more specifically to organic field effect transistors, comprising a dielectric layer that comprises a polycycloolefinic polymer with an olefinic side chain. 24.-. (canceled)6. The OE device according to claim 1 , wherein the polycycloolefinic polymer is a copolymer comprising two or more repeating units claim 1 , each repeating unit comprising a different isomeric form of the same pendant alkenyl group.8. The OE device according to claim 1 , wherein the polycycloolefinic polymer comprises units P with a terminal pendant alkenyl group and units Pi with an isomerized pendant alkenyl group claim 1 , wherein the ratio of units P to units Pi is from 1:6 to 20:1.10. A dielectric layer in an OE device claim 1 , said dielectric layer comprising claim 1 , or being obtained through the use of claim 1 , a polycycloolefinic polymer as defined in .11. The OE device according to claim 1 , which is an Organic Field Effect Transistor (OFET) claim 1 , Organic Thin Film Transistor (OTFT) claim 1 , Organic Light Emitting Diode (OLED) or Organic Photovoltaic (OPV) device or Organic Photodetector (OPD).12. The OE device according to claim 11 , which is a top gate OFET or bottom gate OFET.13122345ab. The top gate OFET according to claim 11 , which comprises a substrate () claim 11 , source and drain electrodes ( claim 11 , ) claim 11 , an organic semiconductor (OSC) layer () claim 11 , a dielectric layer () comprising a polycycloolefinic polymer as defined in one or more of to and serving as gate insulator claim 11 , and gate electrode ().14. A process for preparing an OFET according to claim 13 , which comprises:{'b': 2', '2', '1, 'i': a', 'b, 'A) forming source and drain electrodes (, ) on a substrate (),'}{'b': 3', '2', '2, 'i': a', 'b, 'B) forming an OSC layer () by deposition of an OSC material on the source and drain electrodes (, ),'}{'b': 4', '3, 'claim-ref': [{'@idref': 'CLM-00001', 'claims 1'}, {'@idref': 'CLM- ...

Carbon nanotube thin film transistor and manufacturing method thereof

A carbon nanotube thin film transistor and a manufacturing method thereof are provided in the embodiments of the present disclosure. The carbon nanotube thin film transistor includes: a base substrate; a gate electrode, a semiconductor layer, a source electrode and a drain electrode, which are disposed on the base substrate, the semiconductor layer includes a poly(3-hexylthiophene) layer and a mixing layer of semiconducting carbon nanotube and poly(3-hexylthiophene) which are stacked. The semiconducting carbon nanotube thin film transistor has a high purity, thus the metallic carbon nanotubes are substantially cleared out and the electrical property of the thin film transistor is ensured, so that the manufactured carbon nanotube thin film transistor has good electrical properties.

COMPOSITION

An object of the present invention is to provide a composition capable of manufacturing an organic thin film transistor having excellent carrier mobility even under low temperature conditions. The composition of the present invention contains a compound represented by Formula (1) and an alcohol represented by Formula (S1). 2. The composition according to claim 1 ,{'sup': 11', '12', '13', '14', '15', '16', '17', '18, 'wherein at least one of B, B, B, B, B, B, B, or Bis —N═.'}3. The composition according to claim 1 , further comprising:an organic solvent other than the alcohol represented by Formula (S1).4. The composition according to claim 3 ,wherein the organic solvent consists of only one or more atoms selected from the group consisting of a carbon atom, a hydrogen atom, and a halogen atom.5. The composition according to claim 3 ,wherein, in the composition, a content of the alcohol represented by Formula (S1) is 10% by volume or more with respect to a total content of the alcohol represented by Formula (S1) and the organic solvent.8. The composition according to claim 1 ,wherein the composition is a composition for forming an organic semiconductor layer.9. The composition according to claim 1 ,wherein the composition is a composition for forming an organic semiconductor layer for an organic thin film transistor.10. The composition according to claim 2 , further comprising:an organic solvent other than the alcohol represented by Formula (S1).11. The composition according to claim 10 ,wherein the organic solvent consists of only one or more atoms selected from the group consisting of a carbon atom, a hydrogen atom, and a halogen atom.12. The composition according to claim 10 ,wherein, in the composition, a content of the alcohol represented by Formula (S1) is 10% by volume or more with respect to a total content of the alcohol represented by Formula (S1) and the organic solvent.15. The composition according to claim 2 ,wherein the composition is a composition for ...

ORGANIC SEMICONDUCTOR ELEMENT, POLYMER, ORGANIC SEMICONDUCTOR COMPOSITION, AND ORGANIC SEMICONDUCTOR FILM

Provided are an organic semiconductor element including an organic semiconductor film that includes a polymer having a repeating unit represented by the following Formula (1), the polymer, and an organic semiconductor composition and an organic semiconductor film including the polymer. 3. The organic semiconductor element according to claim 2 ,{'sup': '12', 'wherein mrepresents an integer of 1 to 4.'}5. The organic semiconductor element according to claim 4 ,{'sup': d', 'd', 'D2, "wherein Xrepresents a sulfur atom, and all the Z's represent CR."}6. The organic semiconductor element according to claim 1 ,wherein the organic semiconductor element is an organic thin film transistor element.9. The polymer according to claim 8 ,{'sup': '12', 'wherein mrepresents an integer of 1 to 4.'}11. The polymer according to claim 10 ,{'sup': 'd', 'wherein Xrepresents a sulfur atom, and'}{'sup': d', 'D2, "all the Z's represent CR."}12. An organic semiconductor composition comprising:{'claim-ref': {'@idref': 'CLM-00007', 'claim 7'}, 'the polymer according to ; and'}a solvent.13. An organic semiconductor film comprising:{'claim-ref': {'@idref': 'CLM-00007', 'claim 7'}, 'the polymer according to .'} This application is a Continuation of PCT International Application No. PCT/JP2017/012174 filed on Mar. 24, 2017, which claims priorities under 35 § 119 (a) to Japanese Patent Application No, 1P2016-074079 filed on Apr. 1, 2016. Each of the above applications is hereby expressly incorporated by reference, in its entirety, into the present application.The present invention relates to an organic semiconductor element, and a polymer, an organic semiconductor composition, and an organic semiconductor film used in the organic semiconductor element.In a display such as a liquid crystal display or an organic electroluminescence display, a device using a logical circuit such as a radio frequency identifier (RFID) or a memory, a solar cell, or the like, a semiconductor element is used. In particular ...

ORGANIC TRANSISTOR AND GAS SENSOR

The present specification relates to an organic transistor including an organic semiconductor layer including a compound, and a gas sensor to which the organic transistor is applied. 2. The organic transistor of claim 1 , wherein R1 to R16 claim 1 , R101 to R116 claim 1 , and R201 to R204 are the same as or different from each other claim 1 , and are each independently hydrogen claim 1 , a halogen group claim 1 , a substituted or unsubstituted alkyl group claim 1 , a substituted or unsubstituted cycloalkyl group claim 1 , a substituted or unsubstituted alkoxy group claim 1 , a substituted or unsubstituted silyl group claim 1 , a substituted or unsubstituted siloxane group claim 1 , a substituted or unsubstituted amine group claim 1 , a substituted or unsubstituted aryl group claim 1 , or a substituted or unsubstituted heterocyclic group claim 1 , andat least one of R1 to R16 and R101 to R116 includes a substituted or unsubstituted silyl group or a substituted or unsubstituted siloxane group.3. The organic transistor of claim 1 , wherein R1 to R16 claim 1 , R101 to R116 claim 1 , and R201 to R204 are the same as or different from each other claim 1 , and are each independently hydrogen claim 1 , a substituted or unsubstituted alkyl group claim 1 , a substituted or unsubstituted silyl group claim 1 , or a substituted or unsubstituted siloxane group claim 1 , andat least one of R1 to R16 and R101 to R116 is a substituted or unsubstituted silyl group or a substituted or unsubstituted siloxane group.4. The organic transistor of claim 1 , wherein X1 to X6 are the same as or different from each other claim 1 , and are each independently O claim 1 , SiRR′ claim 1 , or S.5. The organic transistor of claim 1 , wherein Y1 to Y4 are the same as or different from each other claim 1 , and are each independently CR″ claim 1 , N claim 1 , or SiR″.6. The organic transistor of claim 1 , wherein X11 to X28 are the same as or different from each other claim 1 , and are each ...

SENSOR FOR DETECTION OF A TARGET SPECIES AND METHOD OF FORMING THE SAME

A sensor for detection of a target species is provided. The sensor includes a capture layer on an organic semi-conductor to which biomolecules may be bound. The capture layer polymer is deposited from a non-aqueous solution and the polymer is insoluble in water and has reactive groups for interaction with the analyte directly or via a conjugated species. Organic electronic devices, for example organic thin-film transistors having the capture layer are also provided. Use of a capture layer provides a low cost high quality biosensor which may be reliably produced in large quantities. 1. A method of making a layered structure for binding a biomolecule comprising:forming an organic semi-conductor layer by a solution deposition method;forming a capture layer on and in contact with the organic semiconductor layer comprising the step of depositing a solution comprising a polar, non-aqueous solvent and a dissolved capture polymer onto the organic semi-conductor layer wherein the capture polymer comprises moieties adapted to bind to a biomolecule.2. A method according to wherein the capture polymer is substantially insoluble in water.3. A method according to in which the capture polymer is deposited onto the first layer by a printing process or a coating process.4. A method according to wherein the polar nonaqueous solvent has a dielectric constant from 18 to 50.5. A method according to wherein the polar non-aqueous solvent is a protic solvent.6. A method according to wherein the organic semiconductor layer is formed from a formulation comprising a non-polar solvent and an organic semiconductor.7. A method according to wherein the non-polar solvent has a dielectric constant of less than 8.8. A method according to wherein the moieties are selected from amine groups; carboxyl groups; and salts thereof.9. A method according to wherein the capture polymer is a copolymer comprising repeat units that are substituted with at least one moiety adapted to bind to a biomolecule and ...

Thin film transistor and method of manufacturing the same

Disclosed are a thin film transistor including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. The semiconductor layer overlaps the gate electrode. The source electrode and the drain electrode are electrically connected to the semiconductor layer. The semiconductor layer includes a first semiconductor layer including a first organic semiconductor material and a second semiconductor layer including a second organic semiconductor material. The second semiconductor layer is farther spaced apart from the gate electrode than the first semiconductor layer. A HOMO energy level of the second organic semiconductor material is different from a HOMO energy level of the first organic semiconductor material. A method of manufacturing the thin film transistor is disclosed.

ORGANIC COMPOUND, ORGANIC THIN FILM, AND ELECTRONIC DEVICE

Disclosed are an organic compound selected from a compound represented by Chemical Formula 1A, a compound represented by Chemical Formula 1B, and a combination thereof, an organic thin film including the organic compound, an organic thin film transistor, and an electronic device. The organic compound has liquid crystal properties and exhibits an ordered liquid crystal phase when being heated in a liquid crystal period due to asymmetric substituents and thereby charge mobility may be further improved. 2. The organic compound of claim 1 , whereinn1 is 0 and n2=n3, orn1 is 1, n2=0, and n3=0.3. The organic compound of claim 1 , wherein{'sup': 1', '2, 'one of Rand Ris one of a substituted or unsubstituted linear C1 to C30 alkyl group, a substituted or unsubstituted linear C2 to C30 alkenyl group, a substituted or unsubstituted linear C2 to C30 alkynyl group, or a combination thereof,'}{'sup': 1', '2, 'an other of Rand Ris one of a substituted or unsubstituted C6 to C30 aryl group, a substituted or unsubstituted C2 to C30 heteroaryl group, a substituted or unsubstituted C7 to C30 alkylaryl group, a substituted or unsubstituted C2 to C30 alkylheteroaryl group, a substituted or unsubstituted C7 to C30 arylheteroalkyl group, a substituted or unsubstituted C5 to C30 cycloalkyl group, a substituted or unsubstituted C2 to C30 heterocycloalkyl group, or a combination thereof, and'}{'sup': 3', '4, 'Rand Rare independently one of hydrogen or a halogen atom; or'}{'sup': 3', '4, 'one of Rand Ris one of a substituted or unsubstituted linear C1 to C30 alkyl group, a substituted or unsubstituted linear C2 to C30 alkenyl group, a substituted or unsubstituted linear C2 to C30 alkynyl group, or a combination thereof,'}{'sup': 3', '4, 'another of Rand Ris one of a substituted or unsubstituted C6 to C30 aryl group, a substituted or unsubstituted C2 to C30 heteroaryl group, a substituted or unsubstituted C7 to C30 alkylaryl group, a substituted or unsubstituted C2 to C30 alkylheteroaryl ...

AMBIPOLAR SYNAPTIC DEVICES

Device architectures based on trapping and de-trapping holes or electrons and/or recombination of both types of carriers are obtained by carrier trapping either in near-interface deep ambipolar states or in quantum wells/dots, either serving as ambipolar traps in semiconductor layers or in gate dielectric/barrier layers. In either case, the potential barrier for trapping is small and retention is provided by carrier confinement in the deep trap states and/or quantum wells/dots. The device architectures are usable as three terminal or two terminal devices. 1. A method comprising:providing a synaptic device including a first structure configured for injecting both electrons and holes into a semiconductor layer and traps for trapping both electrons and holes;receiving an electrical signal at the synaptic device, thereby causing the first structure to inject one of electrons and holes into the semiconductor layer, andeffecting net negative charge trapping or net positive charge trapping within the traps upon injection of the one of electrons and holes into the semiconductor layer.2. The method of claim 1 , wherein the traps comprise quantum structures in the semiconductor layer.3. The method of claim 1 , wherein the first structure includes a source/drain region adjoining the semiconductor layer claim 1 , the source/drain region containing n+ and p+ regions claim 1 , the source/drain region injecting one of the electrons and holes into the semiconductor layer.4. The method of claim 1 , further including the steps of receiving a second electrical signal at the synaptic device and de-trapping the electrons or holes from the traps and/or recombining the electrons and holes in the traps in response to the second signal.5. (canceled)6. The method of claim 3 , wherein the synaptic device further includes a gate electrically coupled to the semiconductor layer through a gate dielectric layer claim 3 , further including causing a change in gate voltage upon receipt of the signal ...

THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE AND ORGANIC LIGHT EMITTING DISPLAY PANEL

A thin film transistor, a method for manufacturing the thin film transistor, an array substrate comprising the thin film transistor and an organic light emitting display panel comprising the thin film transistor are provided. The thin film transistor at least comprising an active layer made of carbon nanotube material with semiconductor properties or graphene with semiconductor properties; further comprising a first conductive layer and a second conductive layer respectively located on upper and lower sides of the active layer and in contact with the active layer, the first conductive layer and the second conductive layer formed a secondary electron emitting layer with electron multiplication function. The thin film transistor is advantageous in its simple structure and simple manufacturing process. 1. A thin film transistor , at least comprising an active layer made of carbon nanotube material with semiconductor properties or graphene with semiconductor properties; further comprising a first conductive layer and a second conductive layer formed of a secondary electron emitting layer with electron multiplication function , the first conductive layer and the second conductive layer being located on upper and lower sides of the active layer and in contact with the active layer , respectively.2. The thin film transistor according to claim 1 , wherein the secondary electron emitting layer with electronic multiplication function is made of a metal oxide or a metal organic compound.3. The thin film transistor according to claim 1 , wherein the first conductive layer has a thickness of 40 to 50 nm claim 1 , the second conductive layer has a thickness of 40 to 50 nm.4. The thin film transistor according to claim 1 , wherein the carbon nanotube with semiconductor properties is oxidized carbon nanotube claim 1 , the graphene with semiconductor properties is hydrogenised graphene.5. The thin film transistor according to claim 1 , further comprising source/drain electrodes made ...

ORGANIC THIN FILM TRANSISTORS AND METHODS FOR THEIR MANUFACTURING AND USE

Methods of forming an organic thin film transistor are provided. The methods include providing a substrate and depositing and patterning a gate electrode on a first surface of the substrate. The methods include dispensing a first droplet of an insulating material on the gate electrode on the substrate and dispensing a second droplet of a semiconductor material on a first surface of the first droplet. The second droplet forms a hydrophobic structure having a central cavity. The methods also include dispensing a third droplet of a conductor material on a first surface of the second droplet such that the conductor material substantially fills the central cavity of the hydrophobic structure and forms a conductor material layer around the central cavity to define a source electrode and a drain electrode of the organic thin film transistor. 1. A method of forming an organic thin film transistor , the method comprising:providing a substrate;depositing and patterning a gate electrode on a first surface of the substrate;dispensing a first droplet of an insulating material on the first surface of the substrate;dispensing a second droplet of a semiconductor material on a first surface of the first droplet, wherein the second droplet forms a hydrophobic structure having a central cavity; anddispensing a third droplet of a conductor material on a first surface of the second droplet, wherein the conductor material substantially fills the central cavity of the hydrophobic structure and forms a conductor material layer around the central cavity to define a source electrode and a drain electrode of the organic thin film transistor.2. The method of claim 1 , wherein the substrate comprises a rigid substrate claim 1 , or a flexible substrate.3. The method of claim 2 , wherein the substrate comprises glass claim 2 , silicon claim 2 , polyethylene terephthalate (PET) claim 2 , polyethylene naphthalate (PEN) claim 2 , or combinations thereof.4. The method of claim 1 , wherein the gate ...

Electronic device, image display device and sensor, and method for manufacturing electronic device

An electronic device includes a control electrode 11 formed on a substrate 10 , an insulating layer 12 covering the control electrode 11 , an active layer 13 including an organic semiconductor material, which is formed on the insulating layer 12 , and a first electrode 14 A and a second electrode 14 B formed on the active layer 13 , and portions 15 of the first electrode and second electrode in contact with the active layer 13 are modified with an electrode modification material.

COMPOSITION AND ORGANIC FILM TRANSISTOR USING THE SAME

A composition comprising a polymer compound (A) containing a repeating unit having a group represented by the formula (1), a compound (B) decomposing to generate an acid by irradiation with an electromagnetic wave or an electronic beam or by heating, and a compound (C) reacting with a hydroxyl group in the presence of an acid: 3. The composition according to claim 1 , wherein the compound (B) is a sulfonic acid ester compound claim 1 , a triazine compound claim 1 , a sulfonium salt or an iodonium salt.4. The composition according to claim 1 , wherein the compound (C) is a melamine compound or a urea compound.5. The composition according to claim 1 , further comprising a solvent.6. A method of producing a film claim 5 , comprising a step of applying the composition according to on a substrate claim 5 , to form a film claim 5 , a step of irradiating a part or several parts of the film with an electromagnetic wave or an electronic beam claim 5 , a step of developing the part or several parts of the film irradiated with an electromagnetic wave or an electronic beam claim 5 , thereby patterning the film claim 5 , and a step of heating the patterned film claim 5 , thereby cross-linking a compound contained in the film.7. A method of producing a film claim 5 , comprising a step of applying the composition according to on a substrate claim 5 , to form a film claim 5 , a step of irradiating a part or several parts of the film with an electromagnetic wave or an electronic beam claim 5 , a step of developing the part or several parts of the film irradiated with an electromagnetic wave or an electronic beam claim 5 , thereby patterning the film claim 5 , and a step of irradiating the patterned film with an electromagnetic wave or an electronic beam claim 5 , then claim 5 , heating the film claim 5 , thereby cross-linking a compound contained in the film.8. The method of producing a film according to claim 6 , wherein the electromagnetic wave is ultraviolet radiation.9. A film ...

RADIATION CURABLE POLYMER FORMULATION AND METHODS FOR THE PREPARATION THEREOF

Disclosed is a radiation curable polymer formulation and methods of producing a dielectric film having such a formulation. The radiation curable polymer formulation includes an acrylic monomer; a cross linking agent; and a photoinitiator. The polymer formulation is insoluble with an organic solvent, which is preferable in low cost high volume manufacturing of thin film transistors for flexible electronics. 1. A radiation curable polymer formulation comprising:an acrylic monomer;a cross linking agent; anda photoinitiator,wherein the cured polymer is insoluble in an organic solvent.2. The radiation curable polymer formulation of claim 1 , wherein the organic solvent is isopropanol claim 1 , acetone claim 1 , ethanol claim 1 , methanol claim 1 , other alcohols claim 1 , ketones claim 1 , polar and non-polar organic solvents or combinations thereof.3. The radiation curable polymer formulation of claim 1 , wherein the cured polymer is insoluble in an aqueous solvent.4. The radiation curable polymer formulation of claim 1 , wherein the cured polymer has a dielectric constant greater than 3.8.5. The radiation curable polymer formulation of claim 1 , wherein the acrylic monomer is isobutyl acrylate claim 1 , tert-butyl acrylate claim 1 , butyl acrylate claim 1 , butyl methacrylate claim 1 , isobornyl acrylate claim 1 , hexyl acrylate claim 1 , 2-ethylhexyl acrylate or 2-hydroxyethyl acrylate.6. The radiation curable polymer formulation of claim 1 , wherein the cross linking agent is glycerol 1 claim 1 ,3-diglycerolate diacrylate claim 1 , 1 claim 1 ,6-hexanediol diacrylate claim 1 , 1 claim 1 ,6-hexanediol dimethacrylate claim 1 , trimethylolpropane triacrylate claim 1 , pentaerythritol triacrylate claim 1 , pentaerythritol tetraacrylate claim 1 , di(trimethylolpropane) tetraacrylate or trimethylolpropane propoxylate triacrylate.7. The radiation curable polymer formulation of claim 1 , wherein the photoinitiator is 4 claim 1 ,4′-bis(dimethylamino)benzophenone or 9 claim 1 , ...

ORGANIC THIN FILM TRANSISTOR

An organic thin film transistor containing a compound represented by the formula (1) in a semiconductor active layer has a high carrier mobility, a small change in the threshold voltage after repeated driving and a high solubility in an organic solvent. Aand Arepresent S, O or Se; at least one of Rto Rrepresents a substituent represented by *-L-R wherein L represents a divalent linking group and R represents a hydrogen atom, an alkyl group, an oligooxyethylene group, an oligosiloxane group or a trialkylsilyl group. 2. The organic thin film transistor according to claim 1 , wherein at least one of Rand Rin the formula (1) represents a substituent represented by the formula (W).5. The organic thin film transistor according to claim 1 , wherein Rto Rin the formula (1) each independently represent a hydrogen atom claim 1 , a fluorine atom claim 1 , a substituted or unsubstituted alkyl group having from 1 to 3 carbon atoms claim 1 , a substituted or unsubstituted alkynyl group having from 2 to 3 carbon atoms claim 1 , a substituted or unsubstituted alkenyl group having from 2 to 3 carbon atoms claim 1 , a substituted or unsubstituted alkoxy group having from 1 to 2 carbon atoms claim 1 , or a substituted or unsubstituted methylthio group.6. The organic thin film transistor according to claim 3 , wherein all of Lain the formula (2) each represent a divalent linking group represented by any one of the formulae (L-1) to (L-3) claim 3 , (L-8) claim 3 , (L-9) or (L-10).7. The organic thin film transistor according to claim 3 , wherein all of Lin the formula (2) each represent a divalent linking group represented by any one of the formula (L-1) or (L-8).8. The organic thin film transistor according to claim 3 , wherein all of Rin the formula (2) each represent a substituted or unsubstituted alkyl group.9. The organic thin film transistor according to claim 3 , wherein all of Rin the formula (2) each represent a linear alkyl group.13. The compound according to claim 12 , ...

METHOD FOR MANUFACTURING AN ORGANIC ELECTRONIC DEVICE AND ORGANIC ELECTRONIC DEVICE

Organic electronic devices and methods for making organic electronic devices are provided. The organic electronic devices may include a gate electrode, a gate insulator, an organic semiconducting layer, a contact improving layer, a source electrode, and a drain electrode. The source electrode and the drain electrode may be arranged on the contact improving layer, and the contact improving layer may include an organic dopant material which is soluble in Hydrofluorether. 1. A method of manufacturing an organic electronic device having providing an organic semiconducting layer;', 'applying a contact improving layer to the organic semiconducting layer by depositing an organic dopant material, wherein the organic dopant material is soluble in Hydrofluorether;, 'a layered device structure comprising a plurality of electrodes and an electronically active region that is in electrical contact with at least one of the plurality of electrodes, the method comprisingdepositing a layer material on the contact improving layer; andstructuring the contact improving layer.2. The method of claim 1 , wherein a solubility of the organic dopant material in Hydrofluorether is greater than 0.5 mg/ml.3. The method of claim 2 , wherein the solubility of the organic dopant material in Hydrofluorether is greater than 10 mg/ml.4. The method of claim 1 , wherein the Hydrofluorether is selected from the group consisting of HFE 7100 claim 1 , HFE 7200 claim 1 , HFE 7300 claim 1 , HFE 7400 claim 1 , HFE 7500 claim 1 , and HFE 7600.5. The method of claim 1 , wherein the organic dopant material is a fluorinated Buckminster fullerene.6. The method of claim 5 , wherein the organic dopant material is CFor CF.7. The method of claim 1 , further comprising a step of dipping the layered device structure in Hydroflourether.8. The method of claim 1 , further comprising a step of rinsing the layered device structure with Hydroflourether.9. The method of claim 1 , further comprisingapplying a structuring layer ...

BISCARBAZOLE DERIVATIVES AND ORGANIC ELECTROLUMINESCENCE DEVICE EMPLOYING THE SAME

Provided are an organic electroluminescence device having high current efficiency and a long lifetime, and a biscarbazole derivative for realizing the device. The biscarbazole derivative has a specific substituent. The organic EL device has a plurality of organic thin-film layers including a light emitting layer between a cathode and an anode, and at least one layer of the organic thin-film layers contains the biscarbazole derivative. 222-. (canceled) The present invention relates to a biscarbazole derivative and an organic electroluminescence device using the derivative, in particular, an organic electroluminescence device having high current efficiency and a long lifetime, and a biscarbazole derivative for realizing the device.In recent years, research has been vigorously conducted on an organic thin-film light emitting device that emits light upon recombination of an electron injected from a cathode and a hole injected from an anode in an organic light emitting body interposed between both the electrodes. The light emitting device has been attracting attention because of the following features. The device is thin and emits light having high luminance under a low driving voltage, and the selection of its light emitting material allows the device to emit light beams of various colors.When a voltage is applied to an organic electroluminescence device (hereinafter referred to as “organic EL device”), a hole and an electron are injected into a light emitting layer from an anode and a cathode, respectively. Then, the hole and the electron thus injected recombine in the light emitting layer to form an exciton. At this time, singlet excitons and triplet excitons are produced at a ratio of 25%:75% according to the statistical law of electron spins. When the organic EL devices are classified in accordance with their light emission principles, the internal quantum efficiency of a fluorescence-type organic EL device is said to be at most 25% because the device uses light ...

ELECTRONIC DEVICE

An electronic device, such as a thin-film transistor, includes a semiconducting layer formed from a semiconductor composition. The semiconductor composition comprises a polymer binder and a small molecule semiconductor. The semiconducting layer has been deposited on an alignment layer that has been aligned in the direction between the source and drain electrodes. The resulting device has increased charge carrier mobility. 16-. (canceled)920-. (canceled) This application is a divisional application of U.S. application Ser. No. 13/158,584 filed on Jun. 13, 2011 the entire contents of which is hereby incorporated herein by reference.The present disclosure relates to thin-film transistors (TFTs) and/or other electronic devices comprising a semiconducting layer and an alignment layer. The alignment layer is used to increase the charge carrier mobility of the transistor and/or electronic device. High mobility and excellent stability may be achieved.TFTs are generally composed of, on a substrate, an electrically conductive gate electrode, source and drain electrodes, an electrically insulating gate dielectric layer which separate the gate electrode from the source and drain electrodes, and a semiconducting layer which is in contact with the gate dielectric layer and bridges the source and drain electrodes. Their performance can be determined by the field effect mobility (also referred to as the charge carrier mobility) and the current on/off ratio of the overall transistor. High mobility and high on/off ratio are desired.Organic thin-film transistors (OTFTs) can be used in applications such as radio frequency identification (RFID) tags and backplane switching circuits for displays, such as signage, readers, and liquid crystal displays, where high switching speeds and/or high density are not essential. They also have attractive mechanical properties such as being physically compact, lightweight, and flexible.Organic thin-film transistors can be fabricated using low-cost ...

Pentacene organic field-effect transistor with n-type semiconductor interlayer and its application

A method for enhancing the performance of pentacene organic field-effect transistor (OFET) using n-type semiconductor interlayer: an n-type semiconductor thin film was set between the insulating layer and the polymer electret in the OFET with the structure of gate-electrode/insulating layer/polymer/pentacene/source (drain) electrode. The thickness of n-type semiconductor layer is 1˜200 nm. The induced electrons at the interface of n-type semiconductor and polymer electret lead to the reduction of the height of the hole-barrier formed at the interface of polymer and pentacene, thus effectively reducing the programming/erasing (P/E) gate voltages of pentacene OFET, adjusting the height of hole barrier at the interface of polymer and pentacene to a reasonable scope by controlling the quantity of induced electrons in n-type semiconductor layer, thus improving the performance of pentacene OFET, such as the P/E speeds, P/E endurance and retention characteristics.

NANOPOROUS SEMICONDUCTOR THIN FILMS

The present disclosure provides a method of fabricating a nanoporous thin film device comprising depositing a template on a substrate to form a nanoporous insulating layer, the template comprising one or more polymers capable of forming pores when polymerized and at least one cross-linking agent, and depositing a second layer (e.g. organic semiconductor, semiconductor, insulator) on the nanopourous insulating layer to form a thin film having a plurality of isolated nanopores on the surface. Nanoporous semiconductor thin films made by these methods is provided. Sensors and devices comprising the nanoporous thin film is also disclosed. 1. A nanoporous semiconducting device comprising:a) a substrate having a dielectric layer;b) a nanoporous insulating layer comprising one or more insulating polymers that are crosslinked with a cross-linking agent;c) a layer comprising an organic semiconductor having a conjugated core, wherein the nanoporous insulating layer and the organic semiconductor comprise a plurality of nanopore channels that have an average pore diameter ranging from greater than 0 nm to about 1500 nm, and the conjugated core of the organic semiconductor is oriented parallel to the perimeter of a nanopore channel such that a charge-transfer with an analyte entering the nanopore channel can be facilitated; andd) an optional coating at the surface of the organic semiconductor comprising a dopant;wherein the plurality of nanopore channels extend from the surface of the organic semiconductor layer, through the nanoporous insulating layer and to the dielectric layer.2. An organic field-effect transistor (OFET) comprising the nanoporous semiconducting device of claim 1 , a source electrode claim 1 , and a drain electrode claim 1 , wherein the substrate comprises a bottom-gate electrode.3. The device of wherein the insulating polymer comprises poly(4-vinylphenol) (PVP) claim 1 , polystyrene (PS) claim 1 , poly(vinylpyrrolidone) claim 1 , benzocyclobutene claim 1 , ...

THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAME

A thin film transistor includes a substrate, a semiconductor layer, a first insulating layer, and a gate electrode. The gate electrode overlaps the semiconductor layer. The thin film transistor includes a second insulating layer on the gate electrode, and an electrode structure on the second insulating layer. The electrode structure is connected to the gate electrode through a via hole. The thin film transistor includes a source electrode and a drain electrode passing through the first insulating layer and the second insulating layer to be connected to the semiconductor layer. The semiconductor layer includes a channel area overlapping the gate electrode, a source area connected to the source electrode, a drain area connected to the drain electrode, a lightly doped source area, and a lightly doped drain area. The electrode structure overlaps at least one of the lightly doped source area or the lightly doped drain area. 1. A thin film transistor comprising:a substrate;a semiconductor layer on the substrate;a first insulating layer on the semiconductor layer;a gate electrode on the first insulating layer, the gate electrode overlapping the semiconductor layer;a second insulating layer on the gate electrode;an electrode structure on the second insulating layer, the electrode structure connected to the gate electrode through at least one via hole; anda source electrode and a drain electrode passing through the first insulating layer and the second insulating layer to be connected to the semiconductor layer,wherein the semiconductor layer comprises:a channel area overlapping the gate electrode;a source area connected to the source electrode;a drain area connected to the drain electrode;a lightly doped source (LDS) area between the source area and the channel area; anda lightly doped drain (LDD) area between the drain area and the channel area, andthe electrode structure overlaps at least one of the lightly doped source (LDS) area or the lightly doped drain (LDD) area.2. ...

ORGANIC LIGHT-EMITTING DISPLAY APPARATUS

An organic light-emitting display apparatus, including a substrate; a first electrode on the substrate; a second electrode on the first electrode; a first organic emissive layer between the first electrode and the second electrode, the first organic emissive layer to emit a first light; a second organic emissive layer between the first electrode and the second electrode, the second organic emissive layer to emit a second light having a different color from the first light; an auxiliary layer on the second electrode, the auxiliary layer having a refractive index equal to or higher than about 2.2; and a charging layer on the auxiliary layer. 120-. (canceled)21. An organic light-emitting display apparatus comprising:a substrate;a first electrode on the substrate;a second electrode on the first electrode;a first organic emissive layer between the first electrode and the second electrode, the first organic emissive layer configured to emit a first light; andan auxiliary layer on the second electrode and having a refractive index equal to or higher than about 2.2.22. The organic light-emitting display apparatus of claim 21 , wherein a thickness of the auxiliary layer is about 280 Å to about 400 Å.23. The organic light-emitting display apparatus of claim 22 , wherein the auxiliary layer includes a transmissive or semi-transmissive material.24. The organic light-emitting display apparatus of claim 22 , wherein the auxiliary layer includes copper iodide (CuI).25. The organic light-emitting display apparatus of claim 21 , wherein the second electrode has about 50% or more Ag content.26. The organic light-emitting display apparatus of claim 25 , wherein a thickness of the second electrode is smaller than or equal to about 100 Å.27. The organic light-emitting display apparatus of claim 21 , further comprising:a charging layer on the auxiliary layer; andan encapsulation layer on the charging layer, wherein the encapsulation layer is configured to cover the first electrode, the ...

BENZOBIS(THIADIAZOLE) DERIVATIVE AND ORGANIC ELECTRONICS DEVICE COMPRISING SAME

A benzobis(thiadiazole) derivative represented by the formula (1): 6. The benzobis(thiadiazole) derivative according to claim 2 , wherein the Rgroup is hydrogen atom claim 2 , fluorine atom claim 2 , linear or branched alkyl group containing 1 to 30 carbon atoms claim 2 , or linear or branched alkyl group containing 1 to 30 carbon atoms and substituted with at least one fluorine atom.7. The benzobis(thiadiazole) derivative according to claim 6 , wherein the Rgroup is hydrogen atom claim 6 , fluorine atom claim 6 , linear or branched alkyl group containing 1 to 10 carbon atoms claim 6 , or linear or branched alkyl group containing 1 to 10 carbon atoms and substituted with at least one fluorine atom.8. The benzobis(thiadiazole) derivative according to claim 2 , wherein the Rgroup is hydrogen atom claim 2 , fluorine atom claim 2 , alkyl group claim 2 , 1-fluoroalkyl group claim 2 , 1 claim 2 ,1-difluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2-trifluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2-tetrafluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3-hexafluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3 claim 2 ,4 claim 2 ,4-octafluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3 claim 2 ,4 claim 2 ,4 claim 2 ,5 claim 2 ,5-decafluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3 claim 2 ,4 claim 2 ,4 claim 2 ,5 claim 2 ,5 claim 2 ,6 claim 2 ,6-dodecafluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3 claim 2 ,4 claim 2 ,4 claim 2 ,5 claim 2 ,5 claim 2 ,6 claim 2 ,6 claim 2 ,7 claim 2 ,7-tetradecafluoro alkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3 claim 2 ,4 claim 2 ,4 claim 2 ,5 claim 2 ,5 claim 2 ,6 claim 2 ,6 claim 2 ,7 claim 2 ,7 claim 2 ,8 claim 2 ,8-hexadecafluoroalkyl group claim 2 , 1 claim 2 ,1 claim 2 ,2 claim 2 ,2 claim 2 ,3 claim 2 ,3 claim 2 , ...

ORGANIC THIN FILM TRANSISTOR, PREPARING METHOD THEREOF, AND PREPARATION EQUIPMENT

An organic thin film transistor, a preparing method thereof, and a preparation equipment. The preparation equipment of an organic thin film transistor comprises: forming a gate electrode, a gate insulating layer, an organic semiconductor layer, and source-drain electrodes on a substrate; the step of forming the organic semiconductor layer comprises: blade-coating a solution in which an organic semiconductor material used to forming the organic semiconductor layer is dissolved to form the organic semiconductor layer. The preparing method can avoid the difference between the edge and the center of the substrate caused by the impact of centripetal force when a spin-coating method is applied, so that the yield of the organic thin film transistor devices is improved. 1. A preparing method of an organic thin film transistor , comprising:forming a gate electrode, a gate insulating layer, an organic semiconductor layer, and source-drain electrodes on a substrate;wherein the step of forming the organic semiconductor layer comprises:blade-coating a solution in which the organic semiconductor material used to form the organic semiconductor layer is dissolved to form the organic semiconductor layer.2. The preparing method of an organic thin film transistor according to claim 1 , wherein claim 1 , during the process of blade-coating the solution in which the organic semiconductor material used to form the organic semiconductor layer is dissolved to form the organic semiconductor layer claim 1 , all contact points between the blade and the substrate have a same linear velocity.3. The preparing method of an organic thin film transistor according to claim 2 , wherein the linear velocity is any velocity selected from 0.5 mm/s˜5 cm/s.4. The preparing method of an organic thin film transistor according to claim 3 , wherein the linear velocity is 5 mm/s.5. The preparing method of an organic thin film transistor according to claim 1 , before forming the organic semiconductor layer claim ...

ELECTRONIC DEVICE, MANUFACTURING METHOD THEREOF, AND IMAGE DISPLAY DEVICE

There is provided an electronic device including an electrode structure, an insulating layer, and an active layer. The active layer is formed from an organic semiconductor material. The insulating layer, which is in contact with the active layer, is formed from a cyclic cycloolefin polymer or a cyclic cycloolefin copolymer. 18-. (canceled)9. An electronic device comprising:an electrode structure;an insulating layer; andan active layer,wherein the active layer is formed from an organic semiconductor material, andwherein the insulating layer, which is in contact with the active layer, is formed from a cyclic cycloolefin polymer or a cyclic cycloolefin copolymer.10. The electronic device according to claim 9 ,wherein a first insulating layer and a second insulating layer are laminated to form the insulating layer, andwherein the second insulating layer is formed from a cyclic cycloolefin polymer or a cyclic cycloolefin copolymer.11. The electronic device according to claim 9 ,wherein the electronic device is configured from a three-terminal type semiconductor device,wherein the electrode structure is configured from a gate electrode and source/drain electrodes,wherein the active layer configures a channel formation region and a channel formation region extending portion, andwherein the insulating layer configures a gate insulating layer.12. The electronic device according to claim 11 ,wherein the gate electrode, the gate insulating layer, and the channel formation region are laminated in that order from the bottom, andwherein the source/drain electrodes are formed on the channel formation region extending portion.13. A method for manufacturing an electronic device claim 11 , the method comprising at least the steps of:(A) forming on a base a control electrode and a first insulating layer covering the control electrode;(B) then forming on the first insulating layer a second insulating layer formed from an organic insulating material; and(C) then forming on the second ...

ORGANIC SEMICONDUCTOR MATERIAL

A compound represented by the formula (1). A polymer compound comprising the compound. An organic semiconductor material comprising the compound or the polymer compound. An organic semiconductor device comprising an organic layer comprising the organic semiconductor material. An organic transistor comprising a source electrode, a drain electrode, a gate electrode and an active layer, wherein the active layer comprises the organic semiconductor material. 5. The compound or polymer compound according to claim 1 , wherein Xand Xare a sulfur atom.6. The compound or polymer compound according to claim 1 , wherein Yand Yare a group represented by —CH═.7. The compound or polymer compound according to claim 1 , wherein Zand Zare a group represented by the formula (Z-1).10. The polymer compound according to claim 9 , wherein the polymer compound is a copolymer of the structural unit represented by the formula (3) and the structural unit represented by the formula (6).11. An organic semiconductor material claim 1 , comprising the compound or polymer compound according to .12. An organic semiconductor device claim 11 , having an organic layer comprising the organic semiconductor material according to .13. An organic transistor having a source electrode claim 11 , a drain electrode claim 11 , a gate electrode and an active layer claim 11 , wherein the active layer comprises the organic semiconductor material according to . The present invention relates to a compound and a polymer compound, and, an organic semiconductor material, an organic semiconductor device and an organic transistor containing the compound or the polymer compound.Organic transistors are low in cost, and have properties such as flexibility, foldability and the like. Therefore, organic transistors are suitable for applications such as electronic paper, flexible displays and the like, and paid to attention recently.Organic transistors have a layer having charge (denoting hole and electron, the same shall apply ...

THIN FILM TRANSISTOR ARRAY FORMED SUBSTRATE, IMAGE DISPLAY DEVICE SUBSTRATE AND MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY FORMED SUBSTRATE

A thin film transistor array formed substrate including a gate electrode, a gate insulation layer, a source wiring structure including a source wiring and a source electrode, a drain electrode, a pixel electrode connected to the drain electrode, a semiconductor layer formed in a stripe shape having a longitudinal side extending in a direction that the source wiring extends, and a protection layer formed to cover an entire portion of the semiconductor layer. The source wiring structure has notch portions positioned in the direction that the source wiring extends such that the notch portions overlap with the gate electrode, the source wiring has a first portion having a first width where the notch portions are formed and a second portion having a second width larger than the first width where no notch portions are formed, and the source wiring has an opening in the second portion. 1. A thin film transistor array formed substrate , comprising:a gate electrode formed on a substrate;a gate insulation layer formed on the gate electrode;a source wiring structure including a source wiring and a source electrode formed on the gate insulation layer;a drain electrode formed on the gate insulation layer;a pixel electrode connected to the drain electrode;a semiconductor layer formed on the source electrode and the drain electrode in a stripe shape having a longitudinal side extending in a direction that the source wiring extends, anda protection layer formed on the semiconductor layer such that the protection layer covers an entire portion of the semiconductor layer,wherein the source wiring structure has a plurality of notch portions positioned in the direction that the source wiring extends such that the notch portions overlap with the gate electrode, the source wiring has a first portion having a first width where the notch portions are formed and a second portion having a second width larger than the first width where no notch portions are formed, and the source wiring has ...

ORGANIC SEMICONDUCTOR COMPOSITIONS

The present invention relates to organic copolymers and organic semiconducting compositions comprising these materials, including layers and devices comprising such organic semiconductor compositions. The invention is also concerned with methods of preparing such organic semiconductor compositions and layers and uses thereof. The invention has application in the field of printed electronics and is particularly useful as the semiconducting material for use in formulations for organic thin film transistor (OFET) backplanes for displays, integrated circuits, organic light emitting diodes (OLEDs), photodetectors, organic photovoltaic (OPV) cells, sensors, memory elements and logic circuits. 2. A PAHC according to claim 1 , comprising at least 20 to 40% of monomer (A) and at least 60 to 80% of monomer (B) claim 1 , based on the total of all monomer units (A) and (B) in the copolymer.3. A PAHC according to or claim 1 , wherein k=1=0 or 1.45-. (canceled)6. A PAHC according to claim 1 , wherein the copolymers are semiconducting copolymers having a permittivity at 1000 Hz of greater than 1.5.74. A PAHC according to claim claim 1 , wherein the copolymers are semiconducting copolymers having a permittivity at 1000 Hz of between 3.4 and 8.0.8. A PAHC according to claim 1 , wherein at least one; of groups R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , R claim 1 , Rand Rare (tri-Chydrocarbylsilyl)Calkynyl- groups.9. A PAHC according to claim 1 , wherein R claim 1 , R claim 1 , Rand Rare hydrogen.10. A PAHC according to claim 1 , wherein —Si(R)(R)(R)is selected from the group consisting of trimethylsilyl claim 1 , triethylsilyl claim 1 , tripropylsilyl claim 1 , dimethylethylsilyl claim 1 , diethylmethylsilyl claim 1 , dimethylpropylsilyl claim 1 , dimethylisopropylsilyl claim 1 , dipropylmethylsilyl claim 1 , diisopropylmethylsilyl claim 1 , dipropylethylsilyl claim 1 , diisopropylethyl silyl ...

Organic Compound, Organic Semiconductor Material, Organic Thin Film And Method For Producing The Same, Organic Semiconductor Composition, And Organic Semiconductor Device

An object is to provide: an organic compound which has excellent solubility in an organic solvent at room temperature, excellent storage stability in a solution state, and excellent heat resistance; an organic semiconductor material containing the organic compound; an organic thin film obtained by a printing process at room temperature using the organic semiconductor material; and an organic semiconductor device containing the organic thin film and having high mobility and high heat resistance. The organic compound is represented by Formula (A) below, and the organic semiconductor material contains this organic compound, 2. The organic compound according to claim 1 ,{'sub': 1', '2, 'wherein one of Rand Ris an aromatic hydrocarbon group which has an alkyl group having 2 to 16 carbon atoms, or a heterocyclic group which has an alkyl group having 2 to 16 carbon atoms.'}3. The organic compound according to claim 2 ,{'sub': 1', '2', '1', '2, 'wherein one of Rand Ris an aromatic hydrocarbon group which has an alkyl group having 4 to 12 carbon atoms or a heterocyclic group which has an alkyl group having 4 to 12 carbon atoms, and another of Rand Ris an aromatic hydrocarbon group or a heterocyclic group.'}4. The organic compound according to claim 1 ,{'sub': 1', '2', '1', '2, 'wherein one of Rand Ris a straight-chain alkyl group having 4 to 10 carbon atoms, and another of Rand Ris an aromatic hydrocarbon group or a heterocyclic group.'}5. The organic compound according to claim 1 ,{'sub': 1', '2', '1', '2, 'wherein one of Rand Ris a branched-chain alkyl group having 6 to 12 carbon atoms, and another of Rand Ris an aromatic hydrocarbon group or a heterocyclic group.'}6. The organic compound according to claim 1 ,wherein no peak indicating a phase transition is observed below 150° C. in differential scanning calorimetry of the organic compound.7. The organic compound according to claim 1 , having solubility in an organic solvent at 25° C. is 0.1 mass % or higher.8. The ...

SUB-PIXEL ARRANGEMENT, METHOD FOR REPAIRING THE SAME, DISPLAY PANEL AND DISPLAY DEVICE

The present disclosure provides a sub-pixel arrangement including: a first sub-pixel region, a second sub-pixel region, and a connection region. Each electrode arranged in the sub-pixel and configured to implement display control may be connected to a source/drain electrode of the TFT through a via hole within the connection region, so as to cut an electrode material within the via hole to disconnect the electrode from the source/drain electrode when a pixel is to be repaired. The sub-pixel arrangement may facilitate to improve the success rate of repairing the display panels and improve the yield rate of the display panels. 1. A sub-pixel arrangement , comprising:at least one thin film transistor (TFT);a first sub-pixel region and a second sub-pixel region; anda connection region,wherein each electrode arranged in the sub-pixel and configured to implement display control is connected to a source/drain electrode of the TFT through a via hole within the connection region, so as to cut an electrode material within the via hole to disconnect the electrode configured to implement the display control from the source/drain electrode when a pixel is to be repaired.2. The sub-pixel arrangement according to claim 1 , wherein in each of the first sub-pixel region and the second sub-pixel region claim 1 , the sub-pixel arrangement further comprises:an anode layer;an electroluminescent layer formed on the anode layer; anda cathode layer formed on the electroluminescent layer,wherein the anode layer is connected to the source/drain electrode through the via hole.3. The sub-pixel arrangement according to claim 1 , further comprising:a pixel definition layer configured to define the first sub-pixel region and the second sub-pixel region.4. The sub-pixel arrangement according to claim 3 , further comprising:a gate electrode layer formed on a base substrate;a gate insulation layer formed on the gate electrode layer;an organic semiconductor layer formed on the gate insulation layer;a ...

Carbon Nanotube Vacuum Transistors

Vacuum transistors with carbon nanotube as the collector and/or emitter electrodes are provided. In one aspect, a method for forming a vacuum transistor includes the steps of: covering a substrate with an insulating layer; forming a back gate(s) in the insulating layer; depositing a gate dielectric over the back gate; forming a carbon nanotube layer on the gate dielectric; patterning the carbon nanotube layer to provide first/second portions thereof over first/second sides of the back gate, separated from one another by a gap G, which serve as emitter and collector electrodes; forming a vacuum channel in the gate dielectric; and forming metal contacts to the emitter and collector electrodes. Vacuum transistors are also provided. 1. A method for forming a vacuum transistor , the method comprising the steps of:covering a substrate with an insulating layer;forming at least one back gate in the insulating layer;depositing a gate dielectric on the insulating layer over the back gate;forming a carbon nanotube layer on the gate dielectric over the back gate;patterning the carbon nanotube layer to provide a first portion of the carbon nanotube layer over a first side of the back gate and a second portion of the carbon nanotube layer over a second side of the back gate, wherein the first portion the carbon nanotube layer and the second portion of the carbon nanotube layer are separated from one another by a gap G, and wherein the first portion of the carbon nanotube layer serves as an emitter electrode of the vacuum transistor and the second portion of the carbon nanotube layer serves as a collector electrode of the vacuum transistor;forming a vacuum channel in the gate dielectric over the back gate; andforming metal contacts to the emitter electrode and to the collector electrode.2. The method of claim 1 , wherein the at least one back gate comprises a metal back gate.3. The method of claim 1 , wherein a top surface of the at least one back gate is coplanar with a top ...

Method of manufacturing thin film transistor, thin film transistor, and transistor array

Provided is a method of manufacturing a thin film transistor satisfying the relation of L<5 μm. The method includes a process of forming a streak portion by performing transfer printing on a support using a member to be transferred which is provided with an ink streak portion for forming source and drain electrodes and has mold releasability, and baking the streak portion to thereby form the source electrode constituted by a conductor and the drain electrode constituted by a conductor. In the method manufacturing a thin film transistor in which the source and drain electrodes obtained above, a semiconductor layer, an insulator layer, and a gate electrode constituted by a conductor are laminated, after the baking, in a laminated cross section of the thin film transistor to be manufactured is set to A and a channel length thereof is set to L, the ink streak portion is provided so as to satisfy the condition of L/A≧0.05.

Organic-Inorganic Hybrid Multilayer Gate Dielectrics for Thin Film Transistors

Disclosed are organic-inorganic hybrid self-assembled multilayers that can be used as electrically insulating (or dielectric) materials. These multilayers generally include an inorganic primer layer and one or more bilayers deposited thereon. Each bilayer includes a chromophore or “π-polarizable” layer and an inorganic capping layer composed of zirconia. Because of the regularity of the bilayer structure and the aligned orientation of the chromophore resulting from the self-assembly process, the present multilayers have applications in electronic devices such as thin film transistors, as well as in nonlinear optics and nonvolatile memories. 1. A method of fabricating a thin film transistor comprising an organic-inorganic hybrid multilayer dielectric material , a gate electrode in contact with the organic-inorganic hybrid multilayer dielectric material , a thin film semiconductor , and source and drain electrodes in contact with the thin film semiconductor , wherein the organic-inorganic hybrid multilayer dielectric material comprises an inorganic primer layer and one or more bilayers deposited thereon , each bilayer comprising a π-polarizable layer and an inorganic oxide capping layer , wherein the inorganic oxide capping layer in each bilayer is coupled to the π-polarizable layer via bonds other than phosphonate bonds , the method comprising:assembling the organic-inorganic hybrid multilayer dielectric material by performing one or more times the steps of (a) coupling a π-polarizable layer to either an existing inorganic primer layer or an existing inorganic oxide capping layer; and (b) coupling a new inorganic oxide capping layer to the π-polarizable layer via bonds other than phosphonate bonds;depositing a thin film semiconductor either directly adjacent to the organic-inorganic hybrid multilayer dielectric material or indirectly adjacent to the organic-inorganic hybrid multilayer dielectric material via an interlayer;forming source and drain electrodes in ...

Quantum dot optical devices with enhanced gain and sensitivity and methods of making same

Various embodiment include optical and optoelectronic devices and methods of making same. Under one aspect, an optical device includes an integrated circuit having an array of conductive regions, and an optically sensitive material over at least a portion of the integrated circuit and in electrical communication with at least one conductive region of the array of conductive regions. Under another aspect, a film includes a network of fused nanocrystals, the nanocrystals having a core and an outer surface, wherein the core of at least a portion of the fused nanocrystals is in direct physical contact and electrical communication with the core of at least one adjacent fused nanocrystal, and wherein the film has substantially no defect states in the regions where the cores of the nanocrystals are fused. Additional devices and methods are described. 1. (canceled)2. An imaging device , comprising:an integrated circuit comprising an array of pixel electrodes;an optically-sensitive material overlying the array of pixel electrodes; anda counter-electrode overlying the optically-sensitive material and the array of pixel electrodes,wherein the integrated circuit is configured to apply a bias to and collect current from the optically-sensitive material via the array of pixel electrodes3. The device according to claim 2 , wherein the optically-sensitive material is configured to generate the current in response to absorption of one or more wavelengths of light in the optically-sensitive material.4. The device according to claim 3 , wherein the counter-electrode is at least partially transparent at the one or more wavelengths.5. The device according to claim 4 , wherein the counter-electrode comprises indium tin oxide (ITO).6. The device according to claim 2 , wherein the optically-sensitive material comprises islands of the optically-sensitive material claim 2 , which respectively overlie the pixel electrodes.7. The device according to claim 2 , wherein the optically-sensitive ...

ORGANIC ELECTRO-LUMINESCENT DISPLAY DEVICE

An organic electroluminescent display device according to an embodiment of the present invention includes a lower electrode, an upper electrode, an organic EL layer positioned between the lower electrode and the upper electrode and a light emitting material containing layer that contains a light emitting material and is arranged on an opposite side of the upper electrode from the organic EL layer. 1. An organic electroluminescent display device comprising:a lower electrode;an upper electrode;an organic EL layer positioned between the lower electrode and the upper electrode; anda light emitting material containing layer that contains a light emitting material and is arranged on an opposite side of the upper electrode from the organic EL layer.2. The organic electroluminescent display device according to claim 1 , wherein the light emitting material is configured to emit light when the light emitting material is irradiate light that the organic EL layer emits.3. The organic electroluminescent display device according to claim 1 , wherein the light emitting material containing layer is arranged in direct contact with the upper electrode.4. The organic electroluminescent display device according to claim 1 , wherein the light emitting material containing layer contains a capping layer formation material having a refractive index equal to or larger than 1.75 for light with a wavelength in a wavelength range of 380 nm to 780 nm.5. The organic electroluminescent display device according to claim 1 , wherein a refractive index of the light emitting material containing layer is equal to or larger than 1.75.6. The organic electroluminescent display device according to claim 1 , wherein the light emitting material containing layer includes a lamination structure where capping layers with different refractive indices are laminated.7. The organic electroluminescent display device according to claim 6 ,wherein the lamination structure includes a first capping layer and a second ...

SEMICONDUCTOR THIN-FILM AND MANUFACTURING METHOD THEREOF, THIN-FILM TRANSISTOR, AND DISPLAY APPARATUS

A method for manufacturing a semiconductor thin film includes sequentially forming a first semiconductor layer, an intermediate layer, and a second semiconductor layer over a substrate. The first semiconductor layer and the second semiconductor layer can be one and another of an n-type semiconductor layer and a p-type semiconductor layer. At least one of the first semiconductor layer, the intermediate layer, or the second semiconductor layer is formed via a solution process. The n-type semiconductor layer can include indium oxide. The intermediate layer can include a self-assembly material. The p-type semiconductor layer can include a p-type organic semiconductor material, and can be pentacene. On the basis, a semiconductor thin film manufactured thereby, a semiconductor thin film transistor, and a display apparatus, are also disclosed. 1. A method for manufacturing a semiconductor thin film , comprising:forming a first semiconductor layer over a substrate;forming an intermediate layer over the first semiconductor layer; andforming a second semiconductor layer over the intermediate layer; one of the forming a first semiconductor layer over a substrate and the forming a second semiconductor layer over the intermediate layer comprises: forming an n-type semiconductor layer;', 'another of the forming a first semiconductor layer over a substrate and the forming a second semiconductor layer over the intermediate layer comprises: forming a p-type semiconductor layer; and', 'at least one of the forming a first semiconductor layer over a substrate, the forming an intermediate layer over the first semiconductor layer, or the forming a second semiconductor layer over the intermediate layer is via a solution process., 'wherein2. The method of claim 1 , wherein each of the forming a first semiconductor layer over a substrate claim 1 , the forming an intermediate layer over the first semiconductor layer claim 1 , and the forming a second semiconductor layer over the intermediate ...

DOPING-INDUCED CARRIER DENSITY MODULATION IN POLYMER FIELD-EFFECT TRANSISTORS

A method of fabricating an organic field effect transistor (OFET), including forming a source contact, a drain contact, and a gate connection to a channel comprising semiconducting polymers, wherein the gate connection applies a field to the semiconductor polymers across a dielectric layer to modulate conduction along the semiconducting polymers between the source contact and the drain contact; and treating the semiconducting polymers, wherein the treating includes a chemical treatment that controls a carrier density, carrier mobility, threshold voltage, and/or contact resistance of the OFET. 1. A method of fabricating an organic field effect transistor (OFET) , comprising:forming a source contact and a drain contact to a channel comprising semiconducting polymers;providing a dielectric between the semiconducting polymers and a gate;doping the semiconducting polymers that interface with the source contact;doping the semiconducting polymers that interface with the drain contact; andwherein the doping dopes the semiconducting polymers with one or more doping concentrations that:increase linearity of the OFET's current-voltage (IV) curve, for voltages applied between the source contact and the drain contact in a range of 0 and +/−5 V, and{'sub': 'S', "do not change the channel's resistance, defined as R/W, to within 4% as compared to before the doping, where Rs is the channel's series resistance and W is the channel's width."}2. The method of claim 1 , further comprising charge compensating the semiconducting polymers.3. The method of claim 1 , wherein the doping concentrations are such that 1% or less than 1% of monomers in the semiconducting polymers are doped.4. The method of claim 1 , wherein the doping concentrations are such that:the OFET has a threshold voltage within +/−2 Volts of 0 Volts,the OFET's on/off ratio remains the same or is increased as compared to without the doping,the OFET's off current remains the same or is decreased as compared to without the ...

ELECTRONIC DEVICE AND ELECTRONIC DEVICE MANUFACTURING METHOD

An electronic device including: a substrate; a bank formed on an upper surface of the substrate, surrounding an area of the upper surface of the substrate, and defining an aperture from which the area is exposed; a liquid-philic layer formed on a peripheral portion of the area, and not overlapping a central portion of the area; a semiconductor layer formed within the aperture, and attaching to at least a portion of the central portion and to an upper surface of the liquid-philic layer; and a pair of electrodes that are in contact with an area of the semiconductor layer, the area of the semiconductor layer not overlapping the liquid-philic layer in plan view. The bank has a liquid-phobic lateral surface surrounding the aperture, and the upper surface of the liquid-philic layer has a higher degree of liquid-philicity than the upper surface of the substrate. 1. An electronic device comprising:a substrate;a bank formed on an upper surface of the substrate, surrounding an area of the upper surface of the substrate, and defining an aperture from which the area of the upper surface is exposed;a liquid-philic layer formed on a peripheral portion of the area of the upper surface of the substrate, and not overlapping a central portion of the area of the upper surface of the substrate, the peripheral portion surrounding the central portion;a semiconductor layer formed within the aperture, and attaching to at least a portion of the central portion and to an upper surface of the liquid-philic layer; anda pair of electrodes that are in contact with an area of the semiconductor layer, the area of the semiconductor layer not overlapping the liquid-philic layer in plan view, whereinthe bank has a liquid-phobic lateral surface surrounding the aperture, andthe upper surface of the liquid-philic layer has a higher degree of liquid-philicity than the upper surface of the substrate.2. The electronic device of claim 1 , whereinat least one of the pair of electrodes is formed on the upper ...

POLYMER COMPOUND AND ORGANIC TRANSISTOR USING SAME

A polymer compound comprising a structural unit represented by the formula: 2. The polymer compound according to claim 1 , wherein E is —S—.3. The polymer compound according to claim 1 , wherein Ris a hydrogen atom.4. The polymer compound according to claim 1 , wherein Ris a hydrogen atom.6. The polymer compound according to claim 1 , wherein the polymer compound is a conjugated polymer compound.7. An organic semiconductor material comprising the polymer compound according to .8. An organic semiconductor device comprising an organic layer including the organic semiconductor material according to .9. An organic transistor comprising a source electrode claim 7 , a drain electrode claim 7 , a gate electrode and an active layer claim 7 , and including the organic semiconductor material according to in the active layer. The present invention relates to a polymer compound and an organic transistor using the same.Organic semiconductor materials are extensively researched and developed because when they are used as constituent materials of organic transistors, weight reduction of devices, reduction of production costs and lowering of production temperature are expected in comparison with inorganic transistors using conventional inorganic semiconductor materials.Among organic semiconductor materials, those excellent in chemical stability and soluble in a solvent can be easily and inexpensively formed into a thin film by a coating method, thus contributing in particular to reduction of production costs and lowering of production temperature of organic transistors. Therefore, particularly polymer compounds, with which materials that have a high degree of freedom in molecular design and are soluble in a solvent are easily provided, are attracting attention.However, organic transistors have the problem that electric field effect mobility is low in comparison with inorganic transistors. Electric field effect mobility of the organic transistor depends on electric field effect ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased. 1. A semiconductor device comprising:a substrate;a gate electrode over the substrate;a gate insulating layer over the gate electrode;a first semiconductor layer over and in direct contact with the gate insulating layer; anda source electrode and a drain electrode each over the gate insulating layer and electrically connected to the first semiconductor layer;wherein a first angle formed between an upper surface of the substrate and an upper end portion of a side surface of the source electrode is greater than a second angle formed between the upper surface of the substrate and a lower end portion of the side surface of the source electrode, andwherein a third angle formed between the upper surface of the substrate and an upper end portion of a side surface of the drain electrode is greater than a fourth angle formed between the upper surface of the substrate and a lower end portion of the side surface of the drain electrode.2. The semiconductor device according to claim 1 , wherein the first semiconductor layer is a first oxide semiconductor layer comprising indium claim 1 , gallium claim 1 , and zinc.3. The semiconductor device according to claim 1 , wherein the source ...

NEGATIVE DIFFERENTIAL RESISTANCE DEVICE

A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer. 1. A negative differential resistance device , comprising:a dielectric layer comprising a first surface and a second surface opposing the first surface;a first semiconductor layer comprising a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity;a second semiconductor layer comprising a second degenerated layer that comprises a region that overlaps the first semiconductor layer and has a second polarity;a first electrode electrically connected to the first semiconductor layer;a second electrode electrically connected to the second semiconductor layer; anda third electrode on the second surface of the dielectric layer and comprising a region that overlaps at least one of the first semiconductor layer or the second semiconductor layer.2. The negative differential resistance device of claim 1 ,wherein the first semiconductor layer comprises a p-type semiconductor layer and the second semiconductor layer comprises an n-type semiconductor layer, or the first semiconductor layer comprises an n-type semiconductor layer and the second semiconductor layer comprises a p-type semiconductor layer.3. The negative differential resistance device of claim 2 , ...

ORGANIC SINGLE-CRYSTALLINE SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREOF

An organic single-crystalline semiconductor structure is provided. The organic single-crystalline semiconductor structure composes substrate, growth-assisted layer, electrodes, organic single-crystalline semiconductor layer. The growth-assisted layer deposited on the substrate from bottom to top. The organic single-crystalline semiconductor layer is defined as the organic semiconductor single-crystal thin film which basically maintained its original morphology after crossing the electrodes. The organic single-crystalline semiconductor thin film could realize full-covering over the arbitrary-shaped or arbitrary-sized bottom-contacted substrates, and the nearly ideal morphology on industrialized scale could be achieved. This organic single-crystalline semiconductor structure could be applied as key part in organic field-effect transistor, in order to realized fast transportation of charge carriers. A facially manufactured and high performance organic field-effect transistor device is also provided, with good potential in the fields of organic electronics and optoelectronics. 1. An organic single-crystalline semiconductor structure , comprising a substrate , a growth-assistant layer , electrodes and an organic single-crystalline semiconductor layer; wherein the last three are deposited sequentially from bottom to top on the substrate;{'b': 100', '101', '103', '102', '104, 'the organic single crystal semiconductor layer is grown on the growth-assistant layer and the electrodes, the organic semiconductor layer is composed of organic single-crystalline semiconductor thin film, and the organic single-crystalline semiconductor thin film is constructed by organic semiconductor single crystal arrays; the morphology of organic semiconductor single crystal array keeps basically unchanged before crossing the electrode (), at the electrode edges ( and ), on the electrode (), and after crossing the electrode ().'}2. The organic single-crystalline semiconductor structure of claim 1 ...

THIN-FILM TRANSISTOR, DISPLAY PANEL, AND METHOD FOR PRODUCING A THIN-FILM TRANSISTOR

A thin-film transistor including: a gate electrode that is located above a substrate; a gate insulating layer that faces the gate electrode; a partition that defines an opening and has higher liquid repellency than liquid repellency of the gate insulating layer, the opening having a surface of the gate insulating layer therewithin; a semiconductor layer that faces the gate electrode with the gate insulating layer interposed therebetween and is formed within the opening by an application method; a source electrode and a drain electrode that are electrically connected to the semiconductor layer; and an intermediate layer that is made of the same material as a material of the partition and is located between the gate insulating layer and the semiconductor layer, wherein the intermediate layer is discretely present above the gate insulating layer. 1. A thin-film transistor comprising:a gate electrode that is located above a substrate;a gate insulating layer that faces the gate electrode;a partition that defines an opening and has higher liquid repellency than liquid repellency of the gate insulating layer, a surface of the gate insulating layer being located in the opening;a semiconductor layer that faces the gate electrode with the gate insulating layer interposed therebetween, and is formed within the opening by an application method;a source electrode and a drain electrode that are electrically connected to the semiconductor layer; andan intermediate layer that is made of the same material as a material of the partition and is located between the gate insulating layer and the semiconductor layer,wherein the intermediate layer is discretely present above the gate insulating layer.2. The thin-film transistor according to claim 1 ,wherein the gate insulating layer on which the intermediate layer is formed has a contact angle against water that is smaller than a contact angle against water of the partition.3. The thin-film transistor according to claim 1 ,wherein the ...

NOVEL COMPOUND AND SEMICONDUCTOR MATERIAL CONTAINING SAME

There is provided a compound which provides a semiconductor material. The compound is represented by General Formula (1) 2. A semiconductor material comprising the compound according to .3. An ink comprising the compound according to .4. A semiconductor film comprising the compound according to .5. A semiconductor device comprising a semiconductor layer comprising the compound according to .6. A transistor comprising a semiconductor layer comprising the compound according to . The present invention relates to a novel compound and a semiconductor material including the same.A transistor in which amorphous silicon or polycrystalline silicon is used as a semiconductor material has been widely used as a switching element for a liquid crystal display device, an organic EL display device and other display devices. However, a transistor using the silicon materials requires a high-temperature heat treatment process in the manufacturing thereof, and therefore, due to a problem of heat resistance, the transistor cannot be applied to a next generation flexible display device in which a plastic substrate is supposed to be used. In order to solve this problem, an organic transistor in which an organic compound is used as a semiconductor material instead of silicon has been proposed. Hereinafter, a semiconductor material using an organic compound may be referred to as an organic semiconductor material.The organic semiconductor material can be applied to a plastic substrate with poor heat resistance and has been expected to be applied to a flexible display device and further expected to be applied to a flexible electronic device such as a light-weight flexible electronic tag or sensor, since the use of the organic semiconductor material as an ink makes it possible to forma film at low temperature by a coating method (which may hereinafter be referred to as a wet film forming method) or a printing method (which may hereinafter be referred to as a wet film forming method). Meanwhile ...

Field effect-transistor, method for manufacturing same, wireless communication device using same, and product tag

A field-effect transistor including at least: a substrate; a source electrode; a drain electrode; a gate electrode; a semiconductor layer in contact with the source electrode and with the drain electrode; and a gate insulating layer insulating between the semiconductor layer and the gate electrode, wherein the semiconductor layer contains a carbon nanotube, and the gate insulating layer contains a polymer having inorganic particles bound thereto. Provided is a field-effect transistor and a method for producing the field-effect transistor, wherein the field-effect transistor causes decreased leak current and furthermore enables a semiconductor solution to be uniformly applied.

Solution process for fabricating high-performance organic thin-film transistors

The present invention relates to a solution or ink composition for fabricating high-performance thin-film transistors. The solution or ink comprises an organic semiconductor and a mediating polymer such as polyacrylonitrile, polystyrene, or the like or mixture thereof, in an organic solvent such as chlorobenzene or dichlorobenzene. The percentage ratio by weight of semiconductor:mediating polymer ranges from 5:95 to 95:5, and preferably from 20:80 to 80:20. The solution or ink is used to fabricate via solution coating or printing a semiconductor film, followed by drying and thermal annealing if necessary to provide a channel semiconductor for organic thin-film transistors (OTFTs). The resulting OTFT device with said channel semiconductor has afforded OTFT performance, particularly field-effect mobility and current on/off ratio that are superior to those OTFTs with channel semiconductors fabricated without a mediating polymer.

SEMICONDUCTOR DEVICE WITH BALLISTIC GATE LENGTH STRUCTURE

Embodiments of the invention include a method of fabrication of a semiconductor structure. The method of fabrication includes: Forming a trench in a first dielectric material down to a first conductive material of a bottom gate. A sidewall of the trench contacts a top surface of the first conductive material. Depositing a second conductive material on the sidewall of the trench, which forms an electrical connection with the first conductive material. Depositing a second dielectric material a in the trench, and on the second conductive material. Depositing a gate dielectric material on the second conductive material and the dielectric materials. Forming a channel material on the gate dielectric material. Depositing another conductive material on the channel material and portions of the gate dielectric material to form a source terminal and a drain terminal. 1. A method of fabricating a semiconductor structure , the method comprising:forming a trench in a first dielectric material down to a first conductive material of a bottom gate, wherein a sidewall of the trench contacts a top surface of the first conductive material;depositing a second conductive material on the sidewall of the trench to form an electrical connection between the first conductive material and the second conductive material;depositing a second dielectric material in the trench and on the second conductive material;depositing a gate dielectric material on the i) second conductive material, ii) the first dielectric material, and iii) the second dielectric material;forming a channel material on the gate dielectric material; anddepositing a third conductive material on the channel material and portions of the gate dielectric material to form a source terminal and a drain terminal.2. The method of claim 1 , the method further comprising:depositing a third dielectric material on a substrate;forming a first opening in the third dielectric material;forming the bottom gate by filling the first opening in ...

PHTHALOCYANINE NANO-SIZE STRUCTURES, AND ELECTRONIC ELEMENTS USING SAID NANO-SIZE STRUCTURES

There is provided an organic semiconductor material with which it is possible to manufacture an electronic element by a wet process which is low cost. Furthermore, the object is to provide an organic semiconductor electronic element which is hardly broken, light in weight and inexpensive, and has high characteristic. According to the present invention, it has been found that it is possible to provide an organic semiconductor material in which performance is improved and which is suitable for a wet process by optimizing a phthalocyanine derivative which configures a phthalocyanine nano-sized substance and the completion of the present invention has been reached. Furthermore, it is possible to provide an electronic element which has high durability, is hardly broken, light in weight, inexpensive and has high characteristic by using the organic semiconductor material in an electronic element active part (a semiconductor layer). 3. The phthalocyanine nano-sized substance according to claim 2 ,wherein the acyclic or a cyclic alkyl group having 1 to 22 carbon atoms is a methyl group, an ethyl group, a propyl group, an isopropyl group, an n-butyl group, an isobutyl group, a sec-butyl group, a tert-butyl group, a 1-pentyl group, an n-hexyl group, an n-heptyl group, an n-octyl group, an n-nonyl group, an n-decyl group, an n-undecyl group, an n-dodecyl group, an n-tridecyl group, an n-tetradecyl group, an n-pentadecyl group, an n-hexadecyl group, an n-heptadecyl group, an n-octadecyl group, an n-nonadecyl group, an n-docosyl group and a cyclohexyl group.4. An ink composition claim 2 , comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the phthalocyanine nano-sized substance according to ; and'}an organic solvent, as essential components.5. An electronic element claim 2 , comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the phthalocyanine nano-sized substance according to .'}6. A transistor claim 2 , comprising:{'claim-ref': {'@idref': 'CLM-00001', ' ...

Electronic Vapor Device With Film Assembly

Disclosed are methods, systems, and apparatuses for fabricating a film based processor and using the processor in an electronic vaping device. An example apparatus can comprise an air intake, a vapor output, a container for storing a vaporizable material, a mixing chamber coupled to the air intake for receiving air, the container for receiving the vaporizable material, and a heating element configured for heating the vaporizable material and the received air to generate a heated vapor. The apparatus can comprise a processor comprising a plurality of circuit elements supported on a flexible film substrate. 1. An apparatus comprising:an air intake;a vapor output;a container for storing a vaporizable material;a mixing chamber coupled to the air intake for receiving air, the container for receiving the vaporizable material, and a heating element configured for heating the vaporizable material and the received air to generate a heated vapor; anda processor comprising a plurality of circuit elements supported on a flexible film substrate.2. The apparatus of claim 1 , further comprising a housing enclosing the container claim 1 , the mixing chamber claim 1 , and the processor claim 1 , wherein the processor conforms to a shape of the housing.3. The apparatus of claim 1 , wherein the flexible film substrate comprises a wherein the film comprises one or more of a plastic foil substrate claim 1 , paper claim 1 , resin coated paper claim 1 , glossy photo paper claim 1 , a polyimide film (e.g. claim 1 , Kapton claim 1 , Pyralux) claim 1 , a polyethylene terephthalate (PET) film claim 1 , a BoPET (Biaxially-oriented polyethylene terephthalate) film claim 1 , a Polyether ether ketone (PEEK) film claim 1 , a transparent conductive polyester film claim 1 , combinations thereof claim 1 , and the like.4. The apparatus of claim 1 , wherein the plurality of circuit elements are affixed to corresponding conductive paths deposited to the flexible film substrate.5. The apparatus of claim ...

Tft device for measuring contact resistance and measurement method for contact resistance

TFT device for measuring a contact resistance and measurement method for a contact resistance are disclosed. The TFT includes an active layer, a gate electrode and a gate insulation layer. The active layer includes a channel and at least three doping regions, wherein, two of the at least three doping regions is connected through a channel, when measuring the contact resistance, using two of the at least three doping regions as testing points for measuring. The gate electrode disposed correspondingly to the channel The gate insulation layer for insulating the active layer from the gate electrode. The uniformity of the present invention is well, the manufacturing process, the film forming quality and the interface property are similar in a maximum degree. Accordingly, a measurement accuracy is increased, saving the distribution region at the same time, increasing the utilization of the experimental region.

Heterostructure Comprising A Carbon Nanomembrane

A heterostructure comprising at least one carbon nanomembrane on top of at least one carbon layer, a method of manufacture of the heterostructure, and an electronic device, a sensor and a diagnostic device comprising the heterostructure. The heterostructure comprises at least one carbon nanomembrane on top of at least one carbon layer, wherein the at least one carbon nanomembrane has a thickness of 0.5 to 5 nm and the heterostructure has a thickness of 1 to 10 nm. 1. A heterostructure comprising at least one carbon nanomembrane on top of at least one carbon layer , wherein the at least one carbon nanomembrane has a thickness of 0.5 to 5 nm and the heterostructure has a thickness of 1 to 10 nm.2. The heterostructure according to claim 1 , wherein the carbon layer is a single layer of graphene or a single layer of fullerene.3. The heterostructure according to claim 1 , wherein the carbon nanomembrane comprises two surfaces and wherein at least one surface is terminated with at least one functional group.4. The heterostructure according to claim 3 , wherein the at least one functional group is selected from the group consisting of halogen atoms and carboxy claim 3 , trifluoromethyl claim 3 , amino claim 3 , nitro claim 3 , cyano claim 3 , thiol claim 3 , hydroxy or carbonyl groups.5. The heterostructure according to claim 3 , wherein the at least one functional group is an amino group.6. The heterostructure according to claim 3 , wherein the at least one surface of the carbon nanomembrane claim 3 , which is terminated with at least one functional group claim 3 , is further functionalized.7. The heterostructure according to claim 3 , wherein the at least one surface of the carbon nanomembrane claim 3 , which is terminated with at least one functional group claim 3 , is further functionalized by at least one of a fluorescent dye claim 3 , a chelator claim 3 , a protein claim 3 , an antibody claim 3 , an oligonucleotide or a metallic nanoparticle.8. The heterostructure ...

FRINGING FIELD ASSISTED DIELECTROPHORESIS ASSEMBLY OF CARBON NANOTUBES

A method of arranging at least one carbon nanotube on a semiconductor substrate includes depositing the at least one carbon nanotube on a dielectric layer of the semiconductor device. The method further includes arranging the at least one carbon nanotube on the dielectric layer in response to applying a voltage potential to an electrically conductive electrode of the semiconductor device, and applying a ground potential to an electrically conductive semiconductor layer of the semiconductor device. 1. A method of arranging at least one carbon nanotube on a semiconductor substrate , the method comprising:depositing the at least one carbon nanotube on a dielectric layer of the semiconductor device; andarranging the at least one carbon nanotube on the dielectric layer in response to applying a voltage potential to an electrically conductive electrode of the semiconductor device, and applying a ground potential to an electrically conductive semiconductor layer of the semiconductor device.2. The method of claim 1 , wherein the applying a voltage potential includes using only a single contiguous metal electrode to receive the voltage potential.3. The method of claim 2 , wherein the depositing the at least one carbon nanotube includes depositing a solution containing a plurality of single-walled nanotubes on the dielectric layer.4. The method of claim 3 , further comprising depositing the solution on a portion of the electrode covered by a dielectric film.5. The method of claim 4 , wherein the arranging the at least one carbon nanotube includes self-aligning the single-walled nanotubes in monolayer aligned arrays.6. The method of claim 5 , further comprising self-aligning the single-walled nanotubes according to a uniform pitch.7. The method of claim 6 , wherein the self-aligning the single-walled nanotubes further comprises defining an average pitch ranging from about 20 nanometers with respect to each single-walled nanotube.8. The method of claim 7 , further comprising ...

PATTERNING DEVICES USING FLUORINATED COMPOUNDS

A method for producing a spatially patterned structure includes forming a layer of a material on at least a portion of a substructure of the spatially patterned structure, forming a barrier layer of a flourinated material on the layer of material to provide an intermediate structure, and exposing the intermediate structure to at least one of a second material or radiation to cause at least one of a chemical change or a structural change to at least a portion of the intermediate structure. The barrier layer substantially protects the layer of the material from chemical and structural changes during the exposing. Substructures are produced according to this method. 127.-. (canceled)28. A method for producing a spatially patterned structure , comprising:forming a layer of a material on at least a portion of a substructure of the spatially patterned structure;forming a barrier layer of a fluorinated material on said layer of material;forming a layer of a photoresist on said barrier layer;exposing said photoresist to spatially patterned radiation;developing said photoresist to substantially remove one of exposed or unexposed regions of said photoresist to provide a pattern of uncovered regions of barrier material between regions covered by photoresist; andremoving portions of said uncovered regions of barrier material using a plasma etch.29. The method of wherein said material comprises at least one of an organic material claim 28 , a polymeric material claim 28 , an organometallic material or a biological material.30. The method of wherein said plasma etch further removes said layer of material beneath the uncovered regions of barrier material thereby forming uncovered regions of substructure.31. The method of further comprising forming a layer of a second material over said regions covered by the photoresist and over said uncovered regions of substructure.32. The method of further comprising forming a second barrier layer of a fluorinated material over said layer of ...

METHOD FOR MAKING THREE DIMENSIONAL COMPLEMENTARY METAL OXIDE SEMICONDUCTOR CARBON NANOTUBE THIN FILM TRANSISTOR CIRCUIT

A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit. A p-type carbon nanotube thin film transistor and a n-type carbon nanotube thin film transistor are formed on an insulating substrate and stacked with each other. The p-type carbon nanotube thin film transistor includes a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode. The n-type carbon nanotube thin film transistor includes a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode. The first drain electrode and the second drain electrode are electrically connected with each other. The first gate electrode and the second gate electrode are electrically connected with each other. 1. A method for making a metal oxide semiconductor carbon nanotube thin film transistor circuit , the method comprises:providing an insulating substrate;applying a p-type carbon nanotube thin film transistor on the insulating substrate, wherein the p-type carbon nanotube thin film transistor comprises a first semiconductor carbon nanotube layer, a first drain electrode, a first source electrode, a functional dielectric layer, and a first gate electrode; andforming a n-type carbon nanotube thin film transistor on the insulating substrate, wherein the n-type carbon nanotube thin film transistor comprises a second semiconductor carbon nanotube layer, a second drain electrode, a second source electrode, a first insulating layer, and a second gate electrode; the p-type carbon nanotube thin film transistor and the n-type carbon nanotube thin film transistor are stacked with each other; andelectrically connecting the first drain electrode and the second drain electrode.2. The method of claim 1 , wherein the p-type carbon nanotube thin film transistor is top gate type and the n-type carbon nanotube thin film ...

SEMICONDUCTOR DEVICE, DISPLAY, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

A semiconductor device includes: a gate electrode layer; a gate insulating film provided on the gate electrode layer; a semiconductor layer provided, in opposition to the gate electrode layer, on the gate insulating film; and a source-drain electrode layer provided on the semiconductor layer and on the gate insulating film. A face, in opposition to the gate insulating film, of the semiconductor layer is located above a face of a section, located on the gate insulating film, of the source-drain electrode layer. 1. A semiconductor device , comprising:a gate electrode layer;a gate insulating film provided on the gate electrode layer;a semiconductor layer provided, in opposition to the gate electrode layer, on the gate insulating film; anda source-drain electrode layer provided on the semiconductor layer and on the gate insulating film,wherein a face, in opposition to the gate insulating film, of the semiconductor layer is located above a face of a section, located on the gate insulating film, of the source-drain electrode layer.2. The semiconductor device according to claim 1 , further comprising a raised section where the semiconductor layer is provided claim 1 , the raised section being provided in a region claim 1 , in opposition to the gate electrode layer claim 1 , on the gate insulating film.3. The semiconductor device according to claim 2 , wherein the raised section includes a stepped section that is dug-down and provided at a drain-side section or at both of a source-side section and the drain-side section of the gate insulating film claim 2 , the source-side section and the drain-side section being adjacent to the region claim 2 , of the gate insulating film claim 2 , in which the semiconductor layer is provided.4. The semiconductor device according to claim 1 , further comprising an insulating film provided on the gate insulating film claim 1 ,wherein the semiconductor layer is provided in a region, in opposition to the gate electrode layer, of the ...

DISPLAY DEVICE AND ELECTRONIC APPARATUS

A display device in which variations in luminance due to variations in characteristics of transistors are reduced, and image quality degradation due to variations in resistance values is prevented. The invention comprises a transistor whose channel portion is formed of an amorphous semiconductor or an organic semiconductor, a connecting wiring connected to a source electrode or a drain electrode of the transistor, a light emitting element having a laminated structure which includes a pixel electrode, an electro luminescent layer, and a counter electrode, an insulating layer surrounding an end portion of the pixel electrode, and an auxiliary wiring formed in the same layer as a gate electrode of the transistor, a connecting wiring, or the pixel electrode. Further, the connecting wiring is connected to the pixel electrode, and the auxiliary wiring is connected to the counter electrode via an opening portion provided in the insulating layer. 1. (canceled)2. A display device comprising:a first light emitting element;a second light emitting element; anda groove between the first light emitting element and the second light emitting element,wherein: a first electrode;', 'a first light emitting layer over the first electrode; and', 'a second electrode over the first light emitting layer;, 'the first light emitting element comprising a third electrode; and', 'a second light emitting layer over the third electrode;, 'the second light emitting element comprising a first side surface;', 'a first bottom surface; and', 'a second side surface;, 'the groove comprisingthe second electrode extends along the first side surface, the first bottom surface and the second side surface;the second electrode extends beyond the first side surface, the first bottom surface and the second side surface; anda height of the first bottom surface is lower than a height of a bottom surface of the first light emitting layer.3. The display device according to claim 2 , further comprising:a first channel ...

METHOD OF MAKING AN ORGANIC THIN FILM TRANSISTOR

In one aspect, organic thin film transistors are described herein. In some embodiments, an organic thin film transistor comprises a source terminal, a drain terminal and a gate terminal; a dielectric layer positioned between the gate terminal and the source and drain terminals; and a vibrationally-assisted drop-cast organic film comprising small molecule semiconductor in electrical communication with the source terminal and drain terminal, wherein the transistor has a carrier mobility (μ) of at least about 1 cm/V·s. 1. A method of making a photovoltaic device comprising:providing a first electrode;drop-casting a photosensitive organic film over the first electrode from a solution comprising a donor small molecule phase, wherein the deposited solution is vibrated during evaporation of solution solvent; anddepositing a second electrode over the photosensitive organic film.2. The method of claim 1 , wherein the at least one of the first electrode and second electrode is radiation transmissive.3. The method of claim 1 , wherein the solution further comprises a nanoparticle acceptor phase.4. The method of claim 3 , wherein the nanoparticle acceptor phase is at least one selected from the group consisting of fullerenes claim 3 , fullerene derivatives claim 3 , carbon nanotubes and graphene.5. The method of claim 1 , wherein the solution is drop-cast directly on a surface of the first electrode.6. The method of claim 1 , wherein the solution is drop-cast on a charge transfer layer or exciton blocking layer covering the first electrode.7. The method of claim 1 , wherein the deposited solution is vibrated at a frequency ranging from 1 Hz to 5000 Hz.8. The method of claim 1 , wherein the deposited solution is vibrated at a frequency ranging from 1 Hz to 1000 Hz.9. The method of claim 1 , wherein evaporation of the solution solvent occurs at a rate ranging from 5 μL/hr to 50 μL/hr.10. The method of claim 1 , wherein evaporation of the solution solvent occurs at a rate ranging ...

N-TYPE ORGANIC SEMICONDUCTOR FORMULATIONS AND DEVICES

The present invention discloses an organic semiconductor formulation comprising an organic semiconductor (OSC) and an organic nitrogen-containing additive (ONA) capable of enhancing the n-type performance of the organic semiconductor. The semiconductor formulation disclosed herein is suitable for producing n-type semiconductor thin films for use in a variety of electronic applications and devices. 1. An organic semiconductor formulation comprising:an organic semiconductor (OSC); andan organic nitrogen-containing additive (ONA) capable of enhancing n-type performance of the organic semiconductor.2. The formulation according to claim 1 , wherein the ONA is a linear polyethylenimine claim 1 , branched polyethylenimine claim 1 , at least partially ethoxylated polyethylenimine claim 1 , a modified polyethylenimine claim 1 , or a copolymer of polyethylenimine with a second polymer.4. The formulation according to claim 3 , wherein R3 is aryl claim 3 , substituted aryl claim 3 , heteroaryl or substituted heteroaryl.8. The formulation according to claim 1 , wherein the ONA is an amino acid having a positively charged side chain at pH 7.4.12. The organic semiconductor formulation of wherein the where the organic semiconductor has a LUMO energy level of −3 eV or lower.14. A method of enhancing n-type performance of an organic semiconductor claim 1 , comprising mixing the OSC with an organic nitrogen-containing additive (ONA) capable of enhancing the n-type performance of the organic semiconductor to thereby form an n-type semiconductor formulation claim 1 , whereby the n-type performance of the organic semiconductor is enhanced.15. An electronic device claim 1 , comprising a semiconductor layer comprising:an organic semiconductor; andan organic nitrogen-containing additive (ONA) capable of enhancing the n-type performance of the organic semiconductor.16. The electronic device of claim 1 , wherein the semiconductor layer comprises an organic semiconductor formulation as defined ...

SYSTEM AND METHOD FOR ANTI-AMBIPOLAR HETEROJUNCTIONS FROM SOLUTION-PROCESSED SEMICONDUCTORS

Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies. 116-. (canceled)17. A method , comprising:defining an n-type oxide over a dielectric layer covering a doped silicon wafer;defining a source electrode connected with the n-type oxide;defining a p-type nanomaterial;defining a drain electrode connected with the p-type nanomaterial; anddefining a gate-tunable p-n heterojunction by overlapping the n-type oxide and the p-type nanomaterial, where the gate-tunable p-n heterojunction provides an anti-ambipolar transfer characteristic;providing a binary frequency shift keying circuit where the anti-ambipolar transfer characteristic requires only one p-n heterojunction in series with a resistor.18. The method of claim 17 , further comprising configuring the binary frequency shift keying circuit for telecommunication or wireless data transmission.1920-. (canceled) This application is a divisional of U.S. patent application Ser. No. 14/981,245, filed Dec. 28, 2015, and claims the benefit of U.S. Provisional Application Ser. No. 62/101,676, filed Jan. 9, 2015, which are both incorporated in their entirety herein.This invention was made with government support under grant numbers DMR1006391 and DMR1121262 awarded by the National Science Foundation; grant number N00014-11-1-0690 awarded by the Office of Naval Research; and 70NANB14H012 awarded by the National Institute of Standards of Technology (NIST). The government has certain rights in the invention.The emergence of semiconducting ...

PIXEL STRUCTURE, ARRAY SUBSTRATE, LIQUID CRYSTAL DISPLAY PANEL AND PIXEL STRUCTURE MANUFACTURE METHOD

The present invention provides a pixel structure, an array substrate, a liquid crystal display panel and a pixel structure manufacture method. The pixel structure includes a pixel electrode layer and a thin film transistor. The thin film transistor includes a gate, a source and a drain which are isolated with the gate and an organic semiconductor layer. The pixel structure further includes an Indium Tin Oxide layer and a metal layer, and the metal layer is located on a portion of the ITO layer. The source, the drain are formed on the ITO layer. A pattern formed by the organic semiconductor layer is electrically coupled to the ITO layer and the metal layer, and the pixel electrode layer is electrically coupled to the metal layer and the ITO layer. 1. A pixel structure , comprising a pixel electrode layer and a thin film transistor , and the thin film transistor comprises a gate , a source and a drain which are isolated with the gate and an organic semiconductor layer , wherein the pixel structure further comprises an Indium Tin Oxide layer and a metal layer , and the metal layer is located on a portion of the Indium Tin Oxide layer , and the source , the drain are formed on the Indium Tin Oxide layer , and a pattern formed by the organic semiconductor layer is electrically coupled to the Indium Tin Oxide layer and the metal layer , and the pixel electrode layer is electrically coupled to the metal layer and the Indium Tin Oxide layer.2. The pixel structure according to claim 1 , wherein the pixel electrode layer is electrically coupled to the metal layer and the Indium Tin Oxide layer with a via.3. The pixel structure according to claim 1 , wherein the metal layer comprises a first metal sub layer and a second metal sub layer located on the first metal sub layer.46.-. (canceled)7. A liquid crystal display panel claim 1 , comprising an array substrate claim 1 , and the array substrate comprises a plurality of pixel structure claim 1 , and each pixel structure ...

MANUFACTURING METHOD OF THIN FILM TRANSISTOR

Disclosed is a manufacturing method of a thin film transistor, comprising: sequentially preparing a gate, a gate insulation layer and an active layer on the substrate; preparing an etching stopper layer on the active layer; depositing an ohmic contact layer film on the etching stopper layer and the active layer, and depositing a source drain conductive film on the ohmic contact layer film; processing the source drain conductive film to form a source and a drain, which are patterned, and processing the ohmic contact layer film by a dry etching process to form an ohmic contact layer, which is patterned; removing the etching stopper layer after preparing the ohmic contact layer. Since the etching stopper layer is disposed above the channel of the transistor before preparing the ohmic contact layer, the damage to the active layer by dry etching can be effectively avoided to improve the performance of the transistor. 1. A manufacturing method of a thin film transistor , comprising:providing a substrate;sequentially preparing a gate, a gate insulation layer and an active layer on the substrate;preparing an etching stopper layer on the active layer, which is same as a pattern of the gate and right opposite to the pattern of the gate;depositing an ohmic contact layer film on the etching stopper layer and the active layer, and depositing a source drain conductive film on the ohmic contact layer film;processing the source drain conductive film by a wet etching process to form a source and a drain, which are patterned;processing the ohmic contact layer film by a dry etching process to form an ohmic contact layer, which is patterned to remove the ohmic contact layer film in a channel region between the source and the drain;removing the etching stopper layer by a wet etching process.2. The manufacturing method of the thin film transistor according to claim 1 , wherein preparing the gate on the substrate comprises:depositing a conductive film covering an entire surface on the ...

THIN FILM TRANSISTOR SUBSTRATE, DISPLAY APPARATUS INCLUDING THIN FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE, AND METHOD OF MANUFACTURING DISPLAY APPARATUS

A thin film transistor (TFT) substrate in which properties of a TFT may be modified according to a function of the TFT, a display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the display apparatus. The thin film transistor (TFT) substrate includes a substrate; a first TFT disposed on the substrate and comprising a first active pattern and a first gate electrode at least partially overlapping with the first active pattern and disposed between the substrate and the first active pattern; and a second TFT disposed on the substrate and comprising a second active pattern and a second gate electrode at least partially overlapping with the second active pattern. 1. A thin film transistor (TFT) substrate comprising:a substrate;a first TFT disposed on the substrate and comprising a first active pattern and a first gate electrode at least partially overlapping with the first active pattern and disposed between the substrate and the first active pattern; anda second TFT disposed on the substrate and comprising a second active pattern and a second gate electrode at least partially overlapping with the second active pattern.2. The TFT substrate of claim 1 , wherein a first insulating layer is disposed between the first gate electrode and the first active pattern.3. The TFT substrate of claim 1 , wherein the first active pattern and the second active pattern are disposed on the same layer and the first gate electrode and the second gate electrode are disposed on different layers.4. The TFT substrate of claim 1 , wherein the first active pattern and the second active pattern are disposed on the first insulating layer.5. The TFT substrate of claim 1 , wherein a second insulating layer is disposed between the second active pattern and the second gate electrode.6. The TFT substrate of claim 1 , wherein the second gate electrode is disposed on the second insulating layer.7. The TFT substrate of claim 1 , wherein the ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased. 1. (canceled)2. A display device comprising:a first driver circuit over a substrate, the first driver circuit comprising a first transistor and a second transistor;a second driver circuit over the substrate; anda pixel portion over the substrate, the pixel portion comprising a third transistor, a fourth transistor, and a light-emitting element, a first gate electrode and a second gate electrode over the substrate;', 'a first wiring over the first gate electrode, the first wiring functioning as one of a source electrode and a drain electrode of the first transistor;', 'a second wiring over the first gate electrode and the second gate electrode, the second wiring functioning as the other of the source electrode and the drain electrode of the first transistor and one of a source electrode and a drain electrode of the second transistor;', 'a third wiring over the second gate electrode, the third wiring functioning as the other of the source electrode and the drain electrode of the second transistor;', 'a first oxide semiconductor layer over the first wiring and the second wiring, the first oxide semiconductor layer in contact with a side surface and a top surface of the first ...

SEMICONDUCTING POLYMER BLENDS FOR HIGH TEMPERATURE ORGANIC ELECTRONICS

A composition for use as an electronic material. The composition contains at least one organic semiconducting material, and at least one electrically insulating polymer forming a semiconducting blend wherein the insulating polymer acts as a matrix for the organic semiconducting material resulting in an interpenetrating morphology of the polymer and the semiconductor material. The variation of charge carrier mobility with temperature in the semiconducting blend is less than 20 percent in a temperature range. A method of making a film of an electronic material. The method includes dissolving at least one organic semiconducting material and at least one insulating polymer into an organic solvent in a pre-determined ratio resulting in a semiconducting blend, depositing the blend onto a substrate to form a film comprising an interpenetrating morphology of the at least one insulating polymer and the at least one organic semiconductor material. 1. A method of making a film of an electronic material , the method comprising:dissolving at least one organic semiconducting material and at least one insulating polymer with a glass transition temperature in the range of 120-140° C. into an organic solvent in a pre-determined ratio resulting in a semiconducting blend;depositing the blend onto a substrate to form a film,evaporating the organic solvent, resulting in a semiconducting film, wherein the at least one insulating polymer acts as a matrix for the at least one organic semiconducting material and the at least one insulating polymer and the at least one organic semiconducting material together form an interpenetrating morphology of the at least one insulating polymer and the at least one organic semiconductor material, and wherein a variation of charge carrier mobility in the semiconducting blend with temperature is less than 20 percent in a temperature range of 25 to t° C., where t° C. is 100° C. or greater and less than the glass transition temperature of the at least one ...

Carbon nanotube composition, semiconductor element and wireless communication device

A carbon nanotube composition capable of producing an FET having improved mobility is provided. The carbon nanotube composition of the present invention is a halogen-free carbon nanotube composition comprising a carbon nanotube having the following features (1) and (2). (1) A dispersion liquid obtained by dispersing the carbon nanotube in a solution containing a cholic acid derivative and water has, in the absorption spectrum in the wavelength range of 300 nm to 1100 nm measured by an ultraviolet/visible/near-infrared spectroscopy, the minimum absorbance in the range of 600 nm to 700 nm and the maximum absorbance in the range of 900 nm to 1050 nm; wherein the ratio of the minimum absorbance and the maximum absorbance is 2.5 or more and 4.5 or less; and (2) the dispersion liquid has the height ratio of the G-band and the D-band (value of (D/G)×100) of 3.33 or less, as measured by a Raman spectrophotometer, using light having a wavelength of 532 nm as excitation light.

METHOD FOR MANUFACTURING TRANSISTOR AND TRANSISTOR

A method for manufacturing a transistor includes: forming a base film for supporting a catalyst for electroless plating; forming a resist layer having an opening portion corresponding to source and drain electrodes onto the base film; causing the base film within the opening portion to support the catalyst for electroless plating and performing a first electroless plating; removing the resist layer; performing a second electroless plating on a surface of an electrode which is formed by the first electroless plating and forming the source and drain electrodes; and forming a semiconductor layer in contact with surfaces of the source and drain electrodes, the surfaces facing each other, wherein an energy level difference between a work function of a material which is used for the second electroless plating and an energy level of a molecular orbital which is used for electron transfer in a material of the semiconductor layer is less than an energy level difference between a work function of a material which is used for the first electroless plating and the energy level of the molecular orbital. 1. A method for manufacturing a transistor , the method comprising:forming a base film for supporting a catalyst for electroless plating;forming a resist layer having an opening portion corresponding to a source electrode and a drain electrode onto the base film;causing the base film within the opening portion to support the catalyst for electroless plating and performing a first electroless plating;removing the resist layer;performing a second electroless plating on a surface of an electrode which is formed by the first electroless plating and forming a source electrode and a drain electrode; andforming a semiconductor layer in contact with a surface of the source electrode and a surface of the drain electrode, the surfaces facing each other, whereinan energy level difference between a work function of a metal material which is used for the second electroless plating and an ...

Organic transistor and method for manufacturing same

An organic transistor is provided with: an insulating substrate; a pair of insulating pedestals ( 2, 3 ) that are arranged spaced apart from each other on the substrate and that form respectively raised flat surfaces; a source electrode ( 4 ) provided on the raised flat surface formed on one of the pedestals; a drain electrode ( 5 ) provided on the raised flat surface formed on the other pedestal; a gate electrode ( 6 ) provided on the substrate between the pair of pedestals; and an organic semiconductor layer ( 7 ) arranged in contact with the upper surfaces of the source electrode and the drain electrode. The gate electrode and the lower surface of the organic semiconductor layer vertically oppose each other across a gap region ( 8 ), and the side surfaces of the pedestals facing the gap region are shaped such that the lower side edges recede apart from the gate electrode with respect to the upper side edges. A contact resistance between the source and drain electrodes and the organic semiconductor layer is reduced, high-speed response performance is enhanced by shortening the channel, and short-circuits between the source and drain electrodes and the gate electrode, which accompany shortening of the channel, can be avoided.

SENSOR, METHOD OF FORMING A SENSOR AND USE THEREOF

A sensor for detection of a biological analyte comprises: a bottom gate thin film transistor comprising a gate electrode (); source and drain electrodes (); a dielectric layer () between the gate electrode and the source and drain electrodes; and a semiconductor layer () comprising an organic semiconducting material extending between the source and drain electrodes; a binding layer comprising an amphiphilic polymer comprising a binding group () adjacent to and in direct contact with the semiconductor layer; and a receptor () bound to the binding group. 1. A sensor comprising:a bottom gate thin film transistor comprising a gate electrode; source and drain electrodes;a dielectric layer between the gate electrode and the source and drain electrodes; and a semiconductor layer comprising an organic semiconducting material extending between the source and drain electrodes;a binding layer comprising an amphiphilic polymer comprising a binding group adjacent to and in direct contact with the semiconductor layer; anda receptor bound to the binding group.2. A sensor according to wherein the receptor is bound directly to the binding group.3. A sensor according to wherein the receptor is indirectly bound to the binding group.4. A sensor according to wherein the receptor and the binding group are bound to a linking group.5. A sensor according to wherein the linking group is streptavidin.6. A sensor according to wherein the amphiphilic polymer comprising the binding group is a protein comprising the binding group.7. A sensor according to wherein the protein is bovine serum albumin.8. A sensor according to wherein the binding group is selected from biotin and maleimide.9. A sensor according to wherein the receptor is selected from peptides claim 1 , carbohydrates claim 1 , antibodies claim 1 , antigens claim 1 , enzymes claim 1 , proteins claim 1 , cell receptors claim 1 , DNA claim 1 , RNA claim 1 , PNA and aptamers.10. A method of forming a sensor according claim 1 , the method ...

Semiconducting Compounds and Related Devices

The present teachings relate to new semiconducting compounds including one or more moieties represented by formula (I): 3. The compound of claim 1 , wherein X is selected from the group consisting of O claim 1 , S claim 1 , and Se.9. The compound of claim 8 , wherein R claim 8 , at each occurrence claim 8 , independently is selected from the group consisting of H claim 8 , F claim 8 , Cl claim 8 , —CN claim 8 , —NO claim 8 , R claim 8 , OR claim 8 , and SR claim 8 , wherein Ris selected from the group consisting of a linear or branched Calkyl group claim 8 , a linear or branched Calkenyl group claim 8 , and a linear or branched Chaloalkyl group.10. The compound of claim 9 , wherein R′ claim 9 , at each occurrence claim 9 , independently is selected from the group consisting of H claim 9 , F claim 9 , Cl claim 9 , —CN claim 9 , a Calkyl group claim 9 , a Calkoxy group claim 9 , and a Chaloalkyl group.13. The compound of claim 12 , wherein pi-2 in the first repeating unit Mand any additional repeating unit Mis an optionally substituted Caryl group or 8-26 membered heteroaryl group.2019. The compound of claim 12 , wherein X is S. This application claims priority to and the benefit of U.S. Provisional Patent Application Ser. No. 62/243,141 filed on Oct. 19, 2015, the disclosure of which is incorporated by reference herein in its entirety.A new generation of optoelectronic devices such as organic thin film transistors (OTFTs), organic light emitting transistors (OLETs), organic light emitting diodes (OLEDs), printable circuits, organic photovoltaic (OPV) devices, electrochemical capacitors, and sensors are built upon organic semiconductors as their active components. To enable high device efficiencies such as large charge carrier mobilities (μ) needed for transistor and circuit operations, or efficient exciton formation and splitting necessary for OLED and OPV operations, it is desirable that both p-type and n-type organic semiconductor materials are available. ...

DUAL-GATE CHEMICAL FIELD EFFECT TRANSISTOR SENSOR

A chemical sensing field effect transistor device is disclosed. The device can include a control gate structure interfacing a control side of a semiconductor channel region, a source region, and a drain region. The control gate structure can comprise a control gate dielectric and a control gate electrode. The device can include a sensing gate structure interfacing the semiconductor channel region, the source region, and the drain region at a sensing side of the semiconductor channel region opposite the control gate structure. The sensing gate structure can comprise a sensing gate dielectric, and a sensing gate electrode. The device can include a functional layer interfacing the sensing gate electrode opposite the sensing gate dielectric. The functional layer can have an exposed interface surface. The functional layer can be capable of binding with a target analyte material sufficient to create a measurable change in conductivity across the semiconductor channel region. 1. A chemical sensing field effect transistor device comprising:a semiconductor channel region interfacing a drain region and a source region;a control gate structure interfacing a control side of the semiconductor channel region, the source region, and the drain region, the control gate structure comprising a control gate dielectric and a control gate electrode;a sensing gate structure interfacing the semiconductor channel region, the source region, and the drain region at a sensing side of the semiconductor channel region opposite the control gate structure, the sensing gate structure comprising a sensing gate dielectric, and a sensing gate electrode; anda functional layer interfacing the sensing gate electrode opposite the sensing gate dielectric, the functional layer having an exposed interface surface, the functional layer capable of binding with a target analyte material sufficient to create a measurable change in conductivity across the semiconductor channel region.2. The device of claim 1 , ...

HIGH DIELECTRIC CONSTANT COMPOSITE MATERIAL AND APPLICATION THEREOF

A high dielectric constant composite material and method for preparing organic thin film transistor using the material as dielectric. The method includes: using sol-gel method, hydrolyzing terminal group-containing silane coupling agent to form functional terminal group-containing silica sol, cross-linked with organic polymer to form composite sol as material of dielectric of organic thin film transistor; forming film by solution method such as spin coating, dip coating, inkjet printing, 3D printing, etc., forming dielectric after curing; preparing semiconductor and electrode respectively to prepare organic thin film transistor device, which, based on composite dielectric material, has mobility of 5 cm2/V·s, exceeding that of using SiO2, having low threshold voltage and no hysteresis effect. Compared with traditional processes like SiO2 thermal oxidation, above method has advantages of simple process, low cost, suitable for large-area preparation, with great market application value. 110-. (canceled)11. A method for preparing a dielectric material , comprising a sol-gel method , a silane coupling agent containing terminal group is co-hydrolyzed under an action of a catalyst to form a silica sol containing functional terminal group , then mixed with an organic polymer to form an organic-inorganic composite sol after a cross-linking reaction , the organic-inorganic composite sol is applied as a material of a dielectric in an organic thin film transistor.12. The method according to claim 11 , wherein the silane coupling agent containing terminal group is selected from a group consisting of: γ-aminopropyltrimethoxysilane claim 11 , aminopropyltriethoxysilane claim 11 , 3-glycidoxypropyltrimethoxysilane claim 11 , γ-methacryloxypropyltrimethoxysilane (KH570) claim 11 , vinyltriethoxysilane claim 11 , vinyltrimethoxysilane claim 11 , N-β-aminoethyl)-γ-aminopropyltriethoxysilane claim 11 , N-β-aminoethyl)-γ-aminopropyltrimethoxysilane claim 11 , γ- ...

DIKETOPYRROLOPYRROLE POLYMER AND ORGANIC ELECTRONIC DEVICE CONTAINING SAME

The present invention relates to a diketopyrrolopyrrole polymer, which is an organic semiconductor compound for an organic electronic device, and a use thereof. The diketopyrrolopyrrole polymer according to the present invention is a novel organic semiconductor compound having high π-electron stacking by introducing an electron donor compound, and an organic electronic device employing the same has excellent charge mobility and on/off ratio. 5. The diketopyrrolopyrrole polymer of claim 4 , wherein Rand Rare each independently (C2-C50)alkyl.8. An organic electronic device comprising the diketopyrrolopyrrole polymer of . The present invention relates to a novel diketopyrrolopyrrole polymer and an organic electronic device containing the same, and more particularly, to a diketopyrrolopyrrole polymer, which is an organic semiconductor compound for an organic electronic device such as an organic thin film transistor (OTFT), or the like, and a use thereof.In accordance with the development of 21C information and communication technologies and a desire for a personal portable communication device, a micromachining process enabling an information and communication device having a small size, a light weight, and a thin thickness, and capable of being easily used, a high-performance electric and electronic material capable of manufacturing an ultra high density integrated circuit, and a novel information and communication material capable of implementing a new concept display have been required. Among them, since an organic thin film transistor (OTFT) may be used as an important component of display drivers of portable computers, organic electro luminescence devices, smart cards, electric tags, pagers, mobile phones, or the like, and plastic circuit parts of memory devices such as automated teller machines, identification tags, or the like, etc., the organic thin film transistor (OTFT) has been the subject of various studies.The organic thin film transistor using an organic ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased. 1. (canceled)2. A semiconductor device comprising: a source electrode layer and a drain electrode layer; and', 'a first oxide semiconductor layer over the source electrode layer and the drain electrode layer,, 'a transistor over a first substrate, the transistor comprisingwherein:part of the first oxide semiconductor layer is positioned between a side surface of the source electrode layer and a side surface of the drain electrode layer facing each other;an angle between a surface of the first substrate and the side surface of the source electrode layer is greater than or equal to 20° and less than or equal to 90°; andan angle between the surface of the first substrate and the side surface of the drain electrode layer is greater than or equal to 20° and less than or equal to 90°.3. The semiconductor device according to claim 2 , wherein the first oxide semiconductor layer comprises indium claim 2 , zinc claim 2 , and oxygen.4. The semiconductor device according to claim 3 , wherein the first oxide semiconductor layer comprises gallium.5. The semiconductor device according to claim 2 ,wherein the transistor comprises a gate electrode layer and a gate insulating layer over the gate ...

Thin Film Transistor Sensor and Manufacturing Method Thereof

Provided are a thin film transistor sensor and a manufacturing method thereof. The thin film transistor sensor includes a first substrate and a second substrate opposite to each other, the first substrate includes a first flexible base substrate and a first gate electrode disposed on the first flexible base substrate, and the second substrate includes a second flexible base substrate and a second gate electrode 4 disposed on the second flexible base substrate; the second gate electrode is at least partially overlapped with and separated from the first gate electrode and configured to be electrically connected to the first gate electrode after the thin film transistor sensor is applied with a voltage, such that the thin film transistor sensor is turned on. 1. A thin film transistor sensor , comprising a first substrate and a second substrate opposite to each other , whereinthe first substrate comprises a first flexible base substrate and a first gate electrode on the first flexible base substrate;the second substrate comprises a second flexible base substrate and a second gate electrode on the second flexible base substrate;the first flexible base substrate further comprises an active layer, a source electrode and a drain electrode; andthe second gate electrode and the first gate electrode at least partially overlap and are separated from each other, and configured to be electrically connected after the thin film transistor sensor is applied with a voltage, to allow the thin film transistor sensor to be turned on.2. The thin film transistor sensor according to claim 1 , further comprising a spacer disposed between the first substrate and the second substrate claim 1 , to separate the first gate electrode from the second gate electrode.3. The thin film transistor sensor according to claim 2 , wherein the spacer is disposed around an edge of the first gate electrode.4. The thin film transistor sensor according to claim 3 , wherein when the thin film transistor sensor ...

FUSED POLYCYCLIC HETEROAROMATIC COMPOUND AND ORGANIC THIN FILM AND ELECTRONIC DEVICE

A fused polycyclic heteroaromatic compound represented by Chemical Formula 1, and an organic thin film, an organic thin film transistor, and an electronic device including the fused polycyclic heteroaromatic compound are provided. The fused polycyclic heteroaromatic compound may have a conjugation structure but reinforce planarity among adjacent rings and have further dense packing and thus much increase charge mobility. 3. The fused polycyclic heteroaromatic compound of claim 2 , wherein the condensed polycyclic ring and the heterocyclic group represented by Chemical Formula 2-1 or Chemical Formula 2-2 are substantially present in the same plane.4. The fused polycyclic heteroaromatic compound of claim 2 , wherein Rto Rare independently hydrogen.5. The fused polycyclic heteroaromatic compound of claim 2 , wherein at least one of Rand Ris a halogen atom.6. The fused polycyclic heteroaromatic compound of claim 5 , wherein Ris a halogen atom claim 5 , and{'sub': 1', '2, 'at least one of Rand Ris a halogen atom.'}7. The fused polycyclic heteroaromatic compound of claim 1 , wherein Ar has four to eight rings.9. The fused polycyclic heteroaromatic compound of claim 1 , wherein Rand Rhave the same heterocyclic groups.16. An organic thin film comprising the fused polycyclic heteroaromatic compound of .17. A thin film transistor comprising a gate electrode claim 1 ,a semiconductor overlapping with the gate electrode, anda source electrode and a drain electrode electrically connected to the organic semiconductor,{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'wherein the semiconductor includes the fused polycyclic heteroaromatic compound of .'}18. An electronic device comprising the organic thin film transistor of .19. The electronic device of claim 18 , wherein the electronic device includes a solar cell claim 18 , a liquid crystal display (LCD) claim 18 , an organic light emitting diode device claim 18 , an eletrophoretic device claim 18 , an organic photoelectric device ...

THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE THIN FILM TRANSISTOR

A thin film transistor includes a gate electrode and an organic semiconductor overlapping the gate electrode. A gate insulating layer is disposed between the gate electrode and the organic semiconductor. A source electrode and a drain electrode are disposed on and electrically connected to the organic semiconductor. A solvent selective photosensitive pattern is disposed on the organic semiconductor and between the source electrode and the drain electrode. An electronic device may include the thin film transistor. 1. A thin film transistor comprising:a gate electrode;an organic semiconductor overlapping the gate electrode;a gate insulating layer between the gate electrode and the organic semiconductor;a source electrode and a drain electrode disposed on and electrically connected to the organic semiconductor; anda solvent selective photosensitive pattern on the organic semiconductor and between the source electrode and the drain electrode.2. The thin film transistor of claim 1 , wherein the solvent selective photosensitive pattern is formed from a composition that is substantially non-reactive with the organic semiconductor.3. The thin film transistor of claim 2 , wherein the composition comprises a fluorine compound claim 2 , a photosensitive material claim 2 , and a fluorine-containing solvent claim 2 , the fluorine compound including a fluorine-containing low molecular weight compound claim 2 , a fluorine-containing oligomer claim 2 , a fluorine-containing polymer claim 2 , or a combination thereof.4. The thin film transistor of claim 1 , wherein the solvent selective photosensitive pattern has a smaller width than the organic semiconductor.5. The thin film transistor of claim 1 , wherein a width of the solvent selective photosensitive pattern and a channel length of the thin film transistor are substantially the same.6. The thin film transistor of claim 5 , wherein the channel length of the thin film transistor is less than or equal to about 10 μm.7. The thin ...

Off-center spin-coating and spin-coated apparatuses

Various aspects of the instant disclosure are directed to methods and to apparatuses involving spin-coating and spin-coated materials. As may be implemented in connection with one or more embodiments, a solution having objects dispersed therein is applied to a substrate and the substrate is spun about an axis that is off-center relative to a center of the substrate. The objects are thus aligned along a predominantly unidirectional orientation. The solution is solidified with the objects aligned to one another along the predominantly unidirectional orientation.

THIN FILM TRANSISTORS FORMED BY ORGANIC SEMICONDUCTORS USING A HYBRID PATTERNING REGIME

The present disclosure describes a process strategy for forming bottom gate/bottom contact organic TFTs in CMOS technology by using a hybrid deposition/patterning regime. To this end, gate electrodes, gate dielectric materials and drain and source electrodes are formed on the basis of lithography processes, while the organic semiconductor materials are provided as the last layers by using a spatially selective printing process. 1. A method comprising: using lithography techniques, forming a gate electrode, a gate dielectric, and source and drain electrodes above a substrate; and', 'using a printing process, forming a patterned organic semiconductor material above the substrate., 'forming a thin-film transistor, wherein forming the thin-film transistor includes2. The method of claim 1 , wherein forming the patterned organic semiconductor material comprises forming a p-type organic semiconductor material above said source and drain electrodes and said gate dielectric.3. The method of claim 2 , wherein the gate dielectric is a first gate dielectric and the source and drain electrodes are first source and drain electrodes claim 2 , the method further comprising forming a second gate dielectric over the first gate dielectric claim 2 , wherein forming the patterned organic semiconductor material comprises forming an n-type organic semiconductor material above second source and drain electrodes and the second gate dielectric.4. The method of claim 1 , wherein forming the gate electrode comprises patterning a conductive layer formed above said substrate prior to forming said gate dielectric claim 1 , wherein patterning the conductive layer further includes forming a contact structure.5. The method of claim 4 , wherein patterning said conductive layer comprises forming a first resist mask above said conductive layer and defining a lateral size and shape of said gate electrode and said contact structure and removing non-covered areas of said conductive layer.6. The method of ...

SCALABLE PROCESS FOR THE FORMATION OF SELF ALIGNED, PLANAR ELECTRODES FOR DEVICES EMPLOYING ONE OR TWO DIMENSIONAL LATTICE STRUCTURES

A method of forming an electrical device that includes forming a gate dielectric layer over a gate electrode, forming source and drain electrodes on opposing sides of the gate electrode, wherein one end of the source and drain electrodes provides a coplanar surface with the gate dielectric, and positioning a D or D nanoscale material on the coplanar surface to provide the channel region of the electrical device. 1. A method of forming an electrical device comprising:forming a gate dielectric layer over a gate electrode;forming source and drain electrodes on opposing sides of the gate electrode after said forming the gate dielectric layer, wherein one end of the source and drain electrodes provides a coplanar surface with the gate dielectric; andpositioning a one dimensional (1D) or two dimensional (2D) nanoscale material on the coplanar surface to provide the channel region of the electrical device.2. The method of claim 1 , wherein forming the gate electrode comprises;forming a photoresist layer on an insulating substrate;patterning the photoresist layer to provide an opening;depositing a first electrically conductive material in the opening; andremoving a remaining portion of the photoresist layer.3. The method of claim 1 , wherein said forming the gate dielectric comprises depositing a dielectric material on an upper surface and sidewall surface of the gate electrode.4. The method of claim 3 , wherien the dielectric material that provides the gate dielectric is conformally deposited.5. The method of claim 3 , wherein said forming the source and drain electrodes on opposing sides of the gate electrode comprises depositing a second electrically conductive material on the gate dielectric layer that is present over the gate electrode; and planarizing the second electrically conductive material to provide the source and drain electrodes having said coplanar surface with the gate dielectric layer.6. The method of claim 1 , wherein the 1D or 2D nanoscale material ...

SCALABLE PROCESS FOR THE FORMATION OF SELF ALIGNED, PLANAR ELECTRODES FOR DEVICES EMPLOYING ONE OR TWO DIMENSIONAL LATTICE STRUCTURES

A method of forming an electrical device that includes forming a gate dielectric layer over a gate electrode, forming source and drain electrodes on opposing sides of the gate electrode, wherein one end of the source and drain electrodes provides a coplanar surface with the gate dielectric, and positioning a 1D or 2D nanoscale material on the coplanar surface to provide the channel region of the electrical device. 1. An electrical device comprising:a planar interface provided by a gate dielectric, a source electrode and a drain electrode that are arranged in coplanar relationship;a 1D or 2D nanoscale material providing the channel region of the electrical device that is present on the planar interface and is in direct contact with a first face of the gate dielectric; anda gate electrode present on a second face of the gate dielectric that is opposite the first face of the gate dielectric.2. The electrical device of claim 1 , wherein the 1D or 2D nanoscale material is selected from the group consisting of carbon nanotubes claim 1 , graphene claim 1 , transition metal dichalcogenides claim 1 , black phosphorus and a combination thereof.3. The electrical device of claim 1 , wherein the source electrode and the drain electrode are adjacent to the gate electrode.4. The electrical device of claim 1 , wherein the source electrode is in direct contact with a first sidewall portion of the gate dielectric that is present on a first sidewall of the gate electrode.5. The electrical device of claim 4 , wherein the drain electrode is in direct contact with a second sidewall portion of the gate dielectric that is present on a second sidewall of the gate electrode.6. The electrical device of claim 3 , wherein the gate electrode is comprised of tungsten (W) claim 3 , titanium (Ti) claim 3 , palladium (Pd) claim 3 , gold (Au) claim 3 , chromium (Cr) claim 3 , or a combinations thereof.7. The electrical device of claim 3 , wherein at least one of the source contact and the drain ...

TFT DEVICE FOR MEASURING CONTACT RESISTANCE AND MEASUREMENT METHOD FOR CONTACT RESISTANCE

A TFT device for measuring a contact resistance and a measurement method for a contact resistance are disclosed. The TFT includes an active layer, a gate electrode and a gate insulation layer. The active layer includes a channel and at least three doping regions. Two of the at least three doping regions is connected through a channel. To measure the contact resistance, two of the at least three doping regions are selected and used as testing points for measuring. The gate electrode is disposed to correspond to the channel. The gate insulation layer insulatively isolates the active layer from the gate electrode. Excellent uniformity can be achieved so that manufacturing, film forming quality, and interface property show similarity to the maximum degree. Accordingly, measurement accuracy is increased, and distribution region can be saved to thereby increase utilization of an experimental region. 1. A thin-film-transistor (TFT) for measurement of contact resistance , comprising:an active layer including a channel and multiple doping regions arranged in the channel in a manner of being spaced from each other so that the multiple doping regions divide the channel into multiple portions that are separated from each other by the doping regions and at least one of the multiple doping regions has two opposite sides that respectively comprise two of the portions of the channel to have the doping region sandwiched between the two portions of the channel, wherein every two of the multiple doping regions are connected through one of the portions of the channel located therebetween to allow two of the multiple doping regions to be selected as testing points for conducting the measurement, wherein the active layer is made of an organic semiconductor material and each of the doping regions is a N-type doping region or a P-type doping region formed through ion implantation;a gate electrode disposed to correspond to the channel; anda gate insulation layer arranged between the active ...

ORGANIC FILM TRANSISTOR, ORGANIC SEMICONDUCTOR FILM, ORGANIC SEMICONDUCTOR MATERIAL AND APPLICATION OF THESE

An organic film transistor containing a compound, which is composed of n repeating units represented by Formula (1-1), (1-2), or (101), in a semiconductor active layer is an organic film transistor using a compound that results in high carrier mobility when being used in the semiconductor active layer of the organic film transistor and exhibits high solubility in an organic solvent. 5. The organic film transistor according to claim 4 ,{'sup': 1', '2, 'wherein in Formulae (1-1) and (1-2), each of Vand Vis a divalent linking group represented by any of Formulae (V-1) to (V-8) and (V-11) to (V-15).'}7. The organic film transistor according to claim 6 ,{'sup': 1', '4, 'wherein in Formulae (1-1) and (1-2), each of Arto Aris independently a divalent linking group represented by Formula (4-1) or (4-2).'}10. The organic film transistor according to claim 9 ,wherein in Formula (W), L is a divalent linking group represented by any of Formulae (L-1), (L-4), and (L-8) or a divalent linking group formed by bonding of two or more divalent linking groups described above.11. The organic film transistor according to claim 1 ,wherein in Formulae (1-1) and (1-2), n is equal to or greater than 10.16. The organic film transistor according to claim 15 ,{'sup': '101', 'wherein in Formulae (101-1) to (101-3), Vrepresents a divalent linking group represented by any of Formulae (V-101) to (V-108) and (V-111) to (V-115).'}18. The organic film transistor according to claim 17 ,{'sup': 101', '102', '101, 'wherein in Formula (101-1), each of Arand Aris a divalent linking group represented by Formula (102-1), and Vis a divalent linking group represented by any of Formulae (V-102) to (V-107).'}19. The organic film transistor according to claim 17 ,{'sup': 101', '102, 'wherein in Formulae (101-1) to (101-3), each of Arand Aris independently a divalent linking group represented by Formula (102-1) or (102-2).'}22. The organic film transistor according to claim 21 ,{'sup': 101', '101, 'wherein in ...