Verfahren und Vorrichtung zum Bereitstellen einer Vorspannung in Sendeempfängern

Es werden Vorrichtungen und Verfahren zum Erzeugen einer Vorspannung für einen im Zeitmultiplexbetrieb arbeitenden Sendeempfänger sowie entsprechende Sendeempfänger bereitgestellt. Dabei erfolgt eine Regelung der Vorspannung in Schutzintervallen zwischen dem Senden und Empfangen von Signalen durch den Sendeempfänger.

VERSTAERKERSCHALTUNG MIT EINEM STROMSPIEGELVERSTAERKER

Amplifier offset cancellation using amplifier supply voltage

ADC circuitry

Multiple-path analogue to digital converters are known. The present invention relates to a multi-path ADC circuitry in which the paths may operate as independent converters. An ADC circuit 200 has first and second conversion paths 201a, 201b for converting analogue signals to digital and is operable in first and second modes. In the first mode, the first and second conversion paths are connected to respective first and second input nodes 202a, 202b to receive and convert full scale first and second analogue input signals Ain1, Ain2 to separate digital outputs Dout1, Dout2. In the second mode, the first and second conversion paths are both connected to the first input node 202a, to convert the first analogue input signal Ain1 to respective first and second digital signals, and the first and second conversion paths are configured for processing different signal levels of the first analogue input signal. A selector 207 selects the first digital signal or the second digital to be output as ...

Circuit arrangements utilising thermal feedback

... 1,021,206. Transistor amplifier circuits. TEXAS INSTRUMENTS Inc. Dec. 31, 1962 [Sept. 7, 1962], No. 49030/62. Heading H3T. [Also in Division H1] An electrical circuit utilizing thermal coupling comprises a plurality of electrically isolated circuit elements in a semi-conductor wafer which are externally coupled together, one of the elements generating heat in response to an electrical signal, the heat being transmitted through the wafer to another circuit element which is heat-responsive. Fig. 1 shows a highgain amplifier on which input signals are applied to the base of transistor 11, the collector of which is coupled through Zener diode 17 to the base of transistor 18. The output is taken from the collector of transistor 18 and a resistor 19 carrying the collector current is thermally coupled to transistor 11 to provide low-frequency or D.C. negative feed-back. Another transistor 21 acts as a reference by being differentially connected with transistor 18 by means of common emitter resistor ...

Amplifier offset cancellation using amplifier supply voltage

System and method for implementing power supply rejection and offset correction of an amplifier 9A (e.g audio amplifier) comprising generating a correction signal CORR by multiplying a quantity indicative of a power supply voltage VSUPPLY of the amplifier by a transfer function F(z) defining a response from the power supply voltage of the amplifier to an output signal of the amplifier VOUT and subtracting the correction signal (combiner 24) from a signal within a signal path of a circuit comprising the amplifier. The system/amplifier may also comprise a digital-to-analogue converter DAC (14 fig 3). The correction signal may be an analogue (figures 4, 5, 7-9) or a digital correction signal (figs 2-3 and 6) operating in the analogue or digital domain of the signal path respectively. An analogue correction signal may be applied via a multiplying digital-to-analogue converter (multiplying DAC fig 5). The quantity indicative of the power supply may also be a predicted estimate of the supply ...

Audio differential bus receiver for audio/video interconnection

Differentialgleichstromverstärker mit steuerbarem Verstärkungsgrad

Voltage detection device

The invention discloses a voltage detection device. Accordingto an embodiment of the invention, a voltage detection circuit (12) includes operational amplifiers (120a, 121a), a battery (122), and a voltage circuit (123). The voltage circuit (123) offsets the inverting input terminals and non-inverting input terminals of the operational amplifiers (120a, 121a) to the positive side with reference to a ground GND.

LINEARIZATION OF A TRANSMISSION CHAIN OF RADIO FREQUENCY SIGNALS

Le dispositif de chaîne de transmission comporte un premier étage de modulation (MD1) configuré pour effectuer une première transposition de fréquence à une première puissance (P1) et dans une première largeur de bande (BW1), des moyens de génération de signal de pré-distorsion (MGEN) configurés pour générer un signal de prédistorsion (PDist), et un deuxième étage de modulation (MD2) configuré pour effectuer une deuxième transposition de fréquence à une deuxième puissance (P2) inférieure à la première puissance (P1) et dans une deuxième largeur de bande (BW2) supérieure à la première largeur de bande (BW1). The transmission chain device comprises a first modulation stage (MD1) configured to perform a first frequency transposition at a first power (P1) and in a first bandwidth (BW1), pre-signal generation means distortion (MGEN) configured to generate a predistortion signal (PDist), and a second modulation stage (MD2) configured to perform a second frequency transposition at a second power (P2) lower than the first power (P1) and in a second bandwidth (BW2) greater than the first bandwidth (BW1).

DRIVE CIRCUIT FOR A SOLVER

Circuit d'excitation (14) pour un résolveur, comprenant deux amplificateurs inverseurs (30-A, 30-B) montés en série, chacun des deux amplificateurs inverseurs comprenant une sortie (32-A, 32-B) destinée chacune à être reliée à une des deux extrémités (16-A, 16-B) d'un enroulement primaire (16) du résolveur.

MULTICHANNEL DETECTOR HAVING A REDUCED NUMBER OF OUTPUT CHANNELS

The present invention relates to a multichannel detector having a reduced number of output channels, and including: a linear amplifier for linearly amplifying an input signal; an offset correction unit including a circuit separated from the linear amplifier and an operational amplifier therein, and configured to correct the offset level which varies according to the amplification rate of the operational amplifier; a uniformity correction unit for reducing the irregularity of an input signal by minutely adjusting the gain of an output signal from the linear amplifier; a signal delayer for delaying the output signal of the uniformity correction unit until an output signal is generated from a comparison unit and a signal determination unit, and a switch circuit receives a trigger from the signal determination unit; the comparison unit, which compares the output signal of the uniformity correction unit with a signal of a predetermined level; the signal determination unit, which determines the ...

High linearity mixer with programmable gain and associated transconductor

A high linearity mixer with a programmable gain and an associated transconductor are provided to combine the functions of a programmable gain amplifier and a mixer, thereby reducing the power consumption and die size. The high linearity mixer includes a load circuit, a switch quad and a transconductor. The switch quad includes a first current path and a second current path, and the coupled point of the switch quad and the load circuit is the output end of the mixer. The transconductor includes a first resistor, a second resistor, a differential amplifier, a first feedback circuit, a second feedback circuit, a first transistor and a second transistor. A differential voltage signal is input to a first input end and a second input end of the differential amplifier via the first and second resistors respectively. The first feedback circuit is coupled between the first input end and a first output end of the differential amplifier. The second feedback circuit is coupled between the second input ...

Balanced differential transimpedance amplifier with single ended input and balancing method

A balanced differential transimpedance amplifier with a single-ended input operational over a wide variation in the dynamic range of input signals. A threshold circuit is employed to either or a combination of (1) generate a varying decision threshold to ensure a proper slicing over a wide range of input current signal levels; and (2) generate a bias current and voltage applied to an input of a transimpedance stage to cancel out a dependence of the transimpedance stage voltage input on input current signal levels.

System and method for a programmable gain amplifier

Provided is system for an improved programmable gain amplifier (PGA). The system includes an amplifier and a first gain control mechanism. The first gain control mechanism includes a circuit input port and is positioned along a feedback path of the amplifier. The first gain control mechanism is configured to (i) receive an input signal and (ii) moderate gains applied to the received input signal, the applied gains including gain values of greater than or equal to one. A second gain control mechanism is coupled to the first gain control mechanism and is integrated with a function of the amplifier. The second gain control mechanism (i) provides gain values of less than one and (ii) decreases a feedback factor of the amplifier when the gain values are provided having values of less than one.

Power transistor feedback circuit with noise and offset compensation

A circuit comprises a first amplifier portion and a second amplifier portion. The first amplifier portion includes first and second transistors coupled together in a common-base configuration. A current mirror is coupled to the first and second transistors. A first filter is coupled between a first input and the first and second transistors. The second amplifier portion includes third and fourth transistors coupled together in a common-base configuration. First and second current sources are coupled to the third and fourth transistors. A second filter is coupled between a second input and the control electrodes of the third and fourth transistors, wherein the first and second filters are coupled together.

Sigma-delta analog-to-digital converter including loop filter having components for feedback digital-to-analog converter correction

Some embodiments include apparatus and methods using an integrator in a loop filter of a sigma-delta analog-to-digital converter (ADC), a digital-to-analog converter (DAC) located on a feedback path of the ADC, the DAC including output nodes coupled to input nodes of the integrator, and a comparator including input nodes to receive signals from output nodes of the integrator, and an output node to provide information during calibration of the DAC.

Drive circuit for a transistor component

A drive circuit for a transistor component is described. The drive circuit comprises: an output, which is designed to be connected to a drive input of a transistor component and which has a first output node and a second output node; an input, which is designed to receive an input signal, which is referred to a reference potential, and which has a first input node and a second input node; a differential amplifier arrangement, which is connected to the first input node, the second input node, and the second output node, and which is designed to generate a drive signal based on the input signal; and a driver circuit, which is designed to receive the drive signal and to generate a drive voltage between the first and second output node based on the drive signal.

Programmable-gain instrumentation amplifier

A device comprises a first amplifier, a first resistive element that comprises a first resistor and a first dummy switch, a second amplifier, a second resistive element that comprises a second resistor and a second dummy switch, and a programmable resistive gain element operable to receive control input, wherein a resistance value of the programmable resistive gain element is based at least in part on the received control input, wherein a first end of the programmable resistive gain element is connected to both the first inverting input of the first amplifier and to a second end of the first dummy switch, and wherein a second end of the programmable resistive gain element is connected to both the second inverting input of the second amplifier and to a second end of the second dummy switch.

Method and device for providing a bias voltage in transceivers operating in time division multiplexing operation

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

Differential integrated input circuit

An apparatus, system, and method are provided for a differential integrated input circuit. The apparatus includes n-type semiconductor devices and p-type semiconductor devices. The p-type semiconductor devices are cross-coupled with the n-type semiconductor devices. Each of the p-type semiconductor devices biases a corresponding n-type semiconductor device.

Thermal compensation of an exponential pair

To compensate for changes in temperature, a pair of bipolar transistors is connected to a voltage divider and receives a differential voltage that varies with temperature. The voltage divider includes a set of resistors placed in parallel. The set of resistors has a resistance that changes with temperature. As the resistance changes with temperature, the differential voltage provided by the voltage divider changes in proportion to a change in thermal voltage.

AMPLIFIER AND SIGNAL PROCESSING DEVICE

When a switch (SW1) is set to off, and a switch (SW2) is set to on, the voltage of a SigOut terminal (205) is stabilized with a reference voltage, and a bias voltage is applied to a capacitor (C1). Changing the switch (SW2) from on to off, with the bias voltage retained in the capacitor (C1), a detection signal which is input via a SigIn terminal (201) is amplified with the reference voltage as a reference, and an amplified signal is output from the SigOut terminal (205).

SCHALTUNGSANORDNUNG MIT TRANSISTOREN

Phasen-Reserven-Veränderung bei Transkonduktanzoperations-Verstärkern

Die vorliegende Erfindung betrifft eine Phasenreservenveränderung bei Transkonduktanzoperationsverstärkern (216; 300; 400).

Schaltung mit hoher Impedanz

A method of and apparatus for detecting open circuit conditions at an input to a signal chain and for detecting channel imbalance in a differential signal

Radio frequency integrated circuit

Radio frequency integrated circuit

Linear capacitance measurement and touchless switch

DIFFERENTIAL AMPLIFIER

DYNAMICALLY CONTROLLED HORIZONTAL PEAKING SYSTEM

In a system for enhancing horizontal detail of a luminance signal, a horizontal peaking signal to be added to the luminance signal is cored with the depth of coring varied in accordance with a coring control potential. To develop the coring control potential, the input luminance signal is capacitively coupled to the input of a signal translator comprising an inverting amplifier with a frequency selective negative feedback path providing the translator with a low pass characteristic and a signal delay substantially equal to the delay of a delay line employed in peaking signal formation. An additional feedback path is provided by the emitter-collector path of a clamping transistor that conducts in response to sync pulse appearances to readjust the charge on the input capacitor, clamping the sync pulse peaks to a potential selected to establish a desired coring depth for black scene regions. Amplifier gain is set to provide translator output swing establishing a desired minimum coring depth ...

LINEAR CAPACITANCE MEASUREMENT AND TOUCHLESS SWITCH

CIRCUIT AND METHOD FOR DRIVING AN AUDIO AMPLIFIER

L'invention concerne un circuit amplificateur audio comprenant : un amplificateur audio (308) adapté à fonctionner à un niveau de tension de mode commun (VCM) et comportant un noeud d'entrée pour recevoir un signal audio (y[n], VIN) et une sortie (310) pouvant être couplée à une charge (104) par l'intermédiaire d'un condensateur de couplage (112) ; et un circuit d'entrée (301) adapté à détecter des niveaux d'amplitude d'un signal audio d'entrée (x[n], x(t)) et à générer un signal de compensation de mode commun variable (CM_COMP[n], VCM COMP) sur la base des niveaux d'amplitude détectés, et à ajouter le signal de compensation de mode commun variable (CM_COMP[n], VCM_COMP) à une version retardée (x'[n], x'(t)) du signal audio d'entrée (x[n]) pour générer le signal audio (y[n], VIN) avec un niveau de mode commun variable. An audio amplifier circuit comprising: an audio amplifier (308) adapted to operate at a common mode voltage level (VCM) and having an input node for receiving an audio signal (y [n], VIN). and an output (310) couplable to a load (104) through a coupling capacitor (112); and an input circuit (301) adapted to detect amplitude levels of an input audio signal (x [n], x (t)) and generate a variable common mode compensation signal (CM_COMP [ n], VCM COMP) based on the detected amplitude levels, and adding the variable common mode compensation signal (CM_COMP [n], VCM_COMP) to a delayed version (x '[n], x' (t )) of the input audio signal (x [n]) to generate the audio signal (y [n], VIN) with a variable common mode level.

Circuits with thermal negative feedback

CIRCUIT WITH ADJUSTABLE GAIN CURRENT MIRROR AMPLIFIER

CIRCUIT WITH ADJUSTABLE GAIN CURRENT MIRROR AMPLIFIER

METHOD AND APPARATUS FOR ACCURATELY MEASURING CURRENTS USING ON-CHIP SENSE RESISTORS CAPABLE OF COMPENSATING ERRORS

PURPOSE: A method and an apparatus for accurately measuring currents are provided to compensate errors due to the resistance change caused by the temperature change of a process. CONSTITUTION: An IC(100) comprises a control block(102), a measurement block(104), and a compensation block(106). The control block receives a voltage display signal and a current display signal of the measurement block. The control block flows the current of the measurement block through a replica resistor. The measurement block comprises an on-chip sense resistor. The measurement block actually receives load current from an output terminal. COPYRIGHT KIPO 2011 ...

Auto calibration driver device and itsapplication wireless charger driver system

A driver device with auto calibration function is provided, the driver device utilizes a sense resistor to detect the changes in an op-amplifier. By the auto calibration circuit generates the signal feedback to the op-amplifier. So that letting the op-amplifier input offset voltage correction to zero. Therefore, the op-amplifier can maintain the best performance. And the driver device used in wireless charging can enhance the current value accurately. Moreover, can be achieved good performance of the motor rotation and better system stability.

LINEAR CAPACITANCE MEASUREMENT AND TOUCHLESS SWITCH

Capacitance measurement apparatus that enhances the sensitivity and accuracy of capacitive transducers, proximity sensors, and touchless switches. Each of two capacitors (C1, C2) under measurement has one end connected to ground and is kept at substantially the same voltage potential by operational amplifier (A1) or amplifiers (A0, A1) using negative feedback. The apparatus is driven by a periodic e.g. sinusoidal signal source (G1) or sources (G1, G2) and includes a difference amplifier (A2) operative to produce an electrical signal having a linear relationship with a specified arithmetic function of the capacitances of the two capacitors (C1, C2). A touchless switch is implemented using the capacitance measurement apparatus. The touchless switch includes two sensor electrodes (E1, E2) that correspond to the two capacitors (C1, C2) under measurement and in one embodiment has a front surface in the form of a container.

Operational amplifier

An operational amplifier for canceling an offset and continuously generating an output signal. The operational amplifier includes a first operational amplification unit and a second operational amplification unit each having at least one electrical characteristic that is substantially the same as one another. One of the operational amplification units performs a canceling operation (holding operation and compensation operation) of the offset voltage while the other operational amplification unit performs a non-canceling operation and generates the output voltage by amplifying an input voltage. Both operational amplification units alternately perform the canceling operation and the non-canceling operation.

CURRENT MIRROR AMPLIFIERS

A current mirror amplifier for combining the output currents of an MOS source-coupled differential amplifier comprises first and second bipolar transistors having parallelled base-emitter circuits including emitter degenerative resistors. A similar resistor judicially placed in the collector circuit of one of these bipolar transistors ensures that the differential amplifier will not exhibit an offset potential between its input terminals caused by its component devices being subjected to different conditions of quiescent drain biasing when the differential amplifier supplies its combined output currents by direct coupling to a subsequent grounded-emitter amplifier stage.

Semiconductor device and offset voltage correcting method

A semiconductor device includes: an amplifier circuit that has an inverting input terminal, a non-inverting input terminal, and an output terminal; a first variable voltage source that generates a first bias voltage having a voltage value corresponding to a first set value; a second variable voltage source that generates a second bias voltage having a voltage value corresponding to a second set value; a first resistor whose one end is connected to the inverting input terminal; a second resistor that is connected between the output terminal and the inverting input terminal; a third resistor whose one end is connected to the non-inverting input terminal; and a fourth resistor that is connected between the second variable voltage source and the non-inverting input terminal. The first bias voltage is provided to the other end of the first resistor. An input signal is provided to the other end of the third resistor.

Pseudo-envelope following feedback delay compensation

A switch mode power supply converter and a feedback delay compensation circuit are disclosed. The switch mode power supply converter has a switching voltage output and provides a switching voltage at the switching voltage output, such that a target voltage for a power amplifier supply voltage at a power amplifier supply output is based on the switching voltage. Further, the switching voltage is based on an early indication of a change of the target voltage. The feedback delay compensation circuit provides the early indication of the change of the target voltage.

Transimpedance amplifier circuit

In a transimpedance amplifier circuit, a control current circuit generates a control current based on a voltage signal and a reference voltage signal and includes an integrating circuit that generates a differential integral signal based on the voltage signal and the reference voltage signal, and a transconductance amplifying circuit that includes a first transconductance circuit that generates a first output current in accordance with the differential integral signal, a second transconductance circuit that generates a second output current in accordance with the differential integral signal, and a current source that supplies a third output current, and a control circuit has an input electrically connected to an output of the first transconductance circuit, an output of the second transconductance circuit, and an output of the current source.

System and method for a programmable gain amplifier

差動増幅装置

ДИФФЕРЕНЦИАЛЬНОЕ УСИЛИТЕЛЬНОЕ УСТРОЙСТВО

FIELD: radio engineering, communication. SUBSTANCE: differential amplifier amplifies the difference between a signal fed to the non-inverting lead through a capacitor and a signal fed to the inverting lead. A switch switches input/non-input of a signal to the non-inverting lead through a capacitor. A resistor is connected between the non-inverting lead and the inverting lead. A bias voltage corrector corrects bias voltage of the differential amplifier based on the output signal of the differential amplifier during the correction period, wherein the switch is controlled such that a signal is not fed to the non-inverting lead through a capacitor. EFFECT: suppressing output bias voltage. 9 cl, 7 dwg РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) 2 487 468 (13) C1 (51) МПК H03F 3/45 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ОПИСАНИЕ ИЗОБРЕТЕНИЯ К ПАТЕНТУ (21)(22) Заявка: 2012105349/08, 15.02.2012 (24) Дата начала отсчета срока действия патента: 15.02.2012 (73) Патентообладатель(и): КЭНОН КАБУСИКА КАЙСЯ (JP) R U Приоритет(ы): (30) Конвенционный приоритет: 16.02.2011 JP 2011-031265 (72) Автор(ы): ЯМАЗАКИ Йосиказу (JP) (45) Опубликовано: 10.07.2013 Бюл. № 19 2 4 8 7 4 6 8 (56) Список документов, цитированных в отчете о поиске: RU 2222828 С1, 27.01.2004. US 2003/0132803 А1, 17.07.2003. US 2010/0052785 A1, 04.03.2010. US 2005/0052234 A1, 10.03.2005. (57) Реферат: Изобретение относится к дифференциальному усилительному устройству и, более конкретно, к коррекции напряжения смещения дифференциального усилительного устройства. Технический результат заключается в подавлении выходного напряжения смещения. Дифференциальный усилитель усиливает разность между сигналом, вводимым на неинвертирующий вывод через конденсатор, и сигналом, вводимым на инвертирующий вывод. Переключатель переключает ввод/не ввод сигнала на неинвертирующий вывод через конденсатор. Сопротивление соединено между неинвертирующим выводом и инвертирующим выводом. Корректор напряжения смещения ...

Scanning and holding circuit with storage capacitor

The circuit has a capacitor (C2) with terminal receiving preset potential, and an operational amplifier (OP3) with output and inverting input terminal. The latter is coupled to the other terminal of the storage capacitor. The amplifier has a non-inverting input terminal, to which is applied an input signal. The amplifier contains a phase compensating capacitor and a push-pull circuit with NPN and PNP output transistors, the latter for charging the storage capacitor in response to the input signal. There is an output release circuit for separating the NPN and PNP transistors and for determining the potential in the phase compensation capacitor as a response to a holding signal (S/H).

A transresistance amplifier for a charged particle detector, possessing a photo-controlled continuously variable input resistance

A charged particle detector in an electron microscope comprises a preamplifier with a continuously variable current-to-voltage converting input resistance formed by a CdS or CdSe photoconductor, a photodiode, a phototransistor or a photoFET IC3. Optical control of the input resistance allows the use of a fixed gain buffer amplifier IC1 and eliminates step changes in bandwidth. The photo-FET opto-coupler may be cascaded after a photo-BJT to improve isolation of the particle detector (figure 2). The control circuit may possess a logarithmic response (IC6, figure 3) to overcome the exponential response of the photo-FET.

CURRENT MIRROR AMPLIFIERS

... 1453732 Transistor amplifying circuits RCA CORPORATION 18 Dec 1973 [26 Dec 1972] 58557/73 Heading H3T A current mirror, i.e. a current amplifier with a current gain determined by the transconductances of equally biased devices such as transistors 23, 24, has a first input terminal 21, Fig. 1, a common terminal 29, and an output terminal 221 first and second transistors 23, 24 respectively having similar connections to the first input terminal 21 and having connections of their collector electrodes respectively to the first input terminal 21 and output terminal 221, first and second resistive elements 25, 26 connecting the respective emitter electrodes of the first and second transistors 23, 24 to the common terminal 29 and a third resistive element 28 of substantially the same resistance as the first resistive element connected between a second input terminal 22 and the output terminal 221. In the embodiment, the arrangement is driven by and provides load circuits ...

MATRIX POWER AMPLIFIER

A power amplifier includes a two-dimensional matrix of NxM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NxM the output power of each of the active cells.

CIRCUIT WITH ADJUSTABLE GAIN CURRENT MIRROR AMPLIFIER

LINEAR CAPACITANCE MEASUREMENT AND TOUCHLESS SWITCH

Capacitance measurement apparatus that enhances the sensitivity and accuracy of capacitive transducers, proximity sensors, and touchless switches. Each of two capacitors (C1, C2) under measurement has one end connected to ground and is kept at substantially the same voltage potential by operational amplifier (A1) or amplifiers (A0, A1) using negative feedback . The apparatus is driven by a periodic e.g. sinusoidal signal source (G1) or sources (G1, G2) and includes a difference amplifier (A2) operative to produce an electrical signal having a linear relationship with a specified arithmetic function of the capacitances of the two capacitors (C1, C2). A touchless switch is implemented using the capacitance measurement apparatus. The touchless switch includes two sensor electrodes (E1, E2) that correspond to the two capacitors (C1, C2) under measurement and in one embodiment has a front surface in the form of a container.

Signal processing circuit

A signal processing circuit includes a waveform shaping section that applies a first gain to an input signal and generates a first signal when an absolute value of a level of the input signal falls within a first input range from a first level to a second level, a variable gain section that adjusts an amplitude of the first signal and amplifies the first signal by a gain to generate an output signal, and a control section that reduces the gain of the variable gain section so that the output signal is prevented from occurrence of clipping when the amplitude of the first signal falls within a second input range. The second input range includes a range of the level of the first signal output from the waveform shaping section corresponding to the first input range of the input signal.

Seismic hydrophone signal processor - has charge coupled amplifier which suppresses stray signal pick up and stray capacity fluctuations

AMPLIFIER AND SIGNAL PROCESSING DEVICE

OPERATIONAL AMPLIFIER

The present invention relates generally to an operational amplifier. In one embodiment, the present invention is an operational amplifier including a transimpedance input stage, the transimpedance input stage including a first stage connected to a first resistor and a second resistor, and an output stage connected to the transimpedance input stage.

Dynamically adjustable low noise, low power instrumentation amplifier

A circuit in accordance with an embodiment of the present invention includes an instrumentation amplifier, a dynamically adjustable low pass filter, at least one monitor and a controller. The instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the pair of input signals. The dynamically adjustable low pass filter is configured to provide band limiting of the output signal at frequencies greater than a cutoff frequency. The monitor, or monitors, is/are configured to monitor a signal upstream of the instrumentation amplifier and/or a signal downstream of the instrumentation amplifier and output a monitor signal. The controller is configured to receive the monitor signal, or signals, and to dynamically adjust output voltage noise at frequencies greater than the crossover frequency of the multipath amplifiers and/or the cutoff ...

Instrumentation absolute value differential amplifier circuit and applications

An instrumentation absolute value differential amplifier is used as part of an electroencephalogram, electromyogram or electrocardiogram to quantify the excitation state of a user, processing and transmitting this information as a control signal for a user feedback device. In one possible arrangement, this feedback device includes a wireless sex toy which responds to the sent control information, acting as a mind controlled sex toy. This provides a simple, intuitive, aesthetically appealing interface for creating a unique sexual experience. The use of an instrumentation absolute value differential amplifier is sufficient to monitor the desired signals while reducing the number of parts required and allowing for less precise tolerances than traditional biological monitoring circuits, thus decreasing the cost of production.

PROGRAMMABLE AMPLIFIER CIRCUIT CAPABLE OF PROVIDING LARGE OR LARGER RESISTANCE FOR FEEDBACK PATH OF ITS AMPLIFIER

A programmable amplifier circuit includes an amplifier, an input capacitor coupled to an input of the amplifier, a feedback capacitor coupled to the input of the amplifier and an output of the amplifier, and a switched-capacitor resistor circuit. The switched-capacitor resistor circuit is coupled between the input of the amplifier and the output of the amplifier, and configured for simulating a feedback resistor element to provide a resistance for a feedback path of the amplifier by using at least one capacitor placed between the input of the amplifier and the output of the amplifier to avoid leakage current(s) flowing back to an input of the amplifier.

Stacked modulator and automatic gain control amplifier

A circuit arrangement that stacks a modulator and automatic gain control (AGC) amplifier so as to re-use the modulator output current to drive the AGC amplifier, thereby saving power consumption and avoiding an unnecessary signal transformation between the two stages. A balanced circuit topology is used. The modulation signal can be selected over a wide range (100 MHz to 5.4 GHz) and the circuit arrangement is therefore particularly suitable for wireless applications (e.g. GSM-EDGE) and for integrated circuit fabrication.

Phasen-Reserven-Veränderung bei Transkonduktanzoperations-Verstärkern

Transkonduktanzoperationsverstärker (OTA) (216; 300), umfassend: einen ersten Schaltkreis (218; 302) mit einer Anordnung mit gefalteter Kaskode; und einen zweiten Schaltkreis (220; 304), welcher mit dem ersten Schaltkreis (218; 302) gekoppelt ist, wobei der zweite Schaltkreis (220; 304) eine erste Schalter-Kapazitäts-Anordnung (336), welche einen ersten Schalter (340) aufweist, der mit einer ersten Impedanzvorrichtung (342) und einer ersten Kapazität (344) gekoppelt ist, und eine zweite Schalter Kapazitäts-Anordnung (338), welche einen zweiten Schalter (346) aufweist, der mit einer zweiten Impedanzvorrichtung (348) und einer zweiten Kapazität (350) gekoppelt ist, umfasst, um eine erste Phasenreserve des Transkonduktanzoperationsverstärkers (216; 300) zu verändern, um eine zweite Phasenreserve zu erzeugen, indem ein nicht-dominanter Pol zu dem Transkonduktanzoperationsverstärker (216; 300) hinzugefügt wird.

Preamplifier for charged particle detection

A preamplifier 1 is provided for correction of overshoot or undershoot effects present in a signal received from a charged particle detection electrode 10 referenced to ground 11. The preamplifier is ground-isolated by transformer 20 from the charged particle detection electrode 10 and comprises: a main amplification stage 30, configured to receive and amplify the isolated signal; a feed-forward stage comprising an integrator stage 40 and an inverting amplifier stage 50, configured to generate a compensation signal from the amplified ground-isolated signal, the compensation signal being generated to mirror the overshoot or undershoot effects; and an output stage 60, arranged to provide an output signal that is a combination of the amplified ground-isolated signal and the compensation signal. A charged particle detection arrangement comprising the preamplifier is also provided.

Linear capacitance measurement and touchless switch

Radio frequency integrated circuit

CIRCUIT WITH ADJUSTABLE GAIN CURRENT MIRROR AMPLIFIER

ANALOGUE AMPLIFICATION DEVICE INTENDED IN PARTICULAR FOR A LASER ANEMOMETER

Ce dispositif d'amplification analogique comporte - un premier étage (28) à transistor (36) base commune recevant le courant modulé d'entrée sur son émetteur, et le signal de sortie de ce premier étage correspond au signal du collecteur, - un deuxième étage (30) est formé par un amplificateur suiveur comportant un transistor (38) à montage collecteur ou drain commun, - un troisième étage (32) comporte un transistor (40) à montage émetteur commun, et - un quatrième étage (34) est un étage amplificateur avec des moyens permettant de réaliser, d'une part, une amplification et, d'autre part, une adaptation d'impédance. Application à un anémomètre laser à rétro-injection optique.

Differential amplifier

A differential amplifier includes: a constant current source; first and second field effect transistors whose respective gates are imparted with positive-phase and negative-phase input signals and whose sources commonly connected to each other, the constant current source being connected to a common node of the sources; first and second loads serving as current paths for respective drain currents of the first and second field effect transistors; an amplifying unit which outputs positive-phase and negative-phase output signals which are amplified in response to the respective drain voltages of the first and second field effect transistors; and a current path generator which generates first and second current paths parallel to the respective first and second field effect transistors for a predetermined period of time at the time of start-up of the differential amplifier.

Differential amplifyer

COMMON ATTENUATION MODE INPUT AMPLIFIERS

MONTAGE A TRANSISTORS, NOTAMMENT UTILISABLE COMME COMPARATEUR ELECTRONIQUE.

L'invention concerne un montage à transistors, notamment utilisable comme comparateur électronique. Ce montage contient un amplificateur différentiel comportant les transistors Q1 , Q2 et un transistor à effet de champ Q3 ainsi que des organes RC R1 C 1 ; K2 C2 réalisant une réaction positive dans le circuit, et peut être commuté entre un état stable et un état instable en fournissant un signal de sortie dont la polarité dépend de la différence existant à l'instant considéré à l'entrée du montage. Application notamment aux comparateurs de tension.

Linear class B transconductance power amplifier

This application discloses a linear class B transconductance power amplifier suited for use in driving an inductive load, such as a convergence control coil for a color television receiver or video monitor. A preferred form of the amplifier includes a first pair of transistors having their emitters connected together and to a reference potential, their collectors being connected together and to a voltage source; and a second pair of transistors connected to the bases of the first pair of transistors and connected together in the form of a differential amplifier. The amplifier circuit operates as a noninverting operational amplifier when an input voltage has a positive polarity, and it operates as an inverting operational amplifier when the input voltage has a negative polarity. The amplifier circuit may also include an emitter follower stage for decreasing the source impedance of the driving circuit for the output amplifier transistors, an anti-saturation circuit for clamping the collector ...

Transformerless current balanced amplifier

A current balanced linear amplifier which does not contain a transformer. A differential transistor pair (22, 32) forms the amplifying element, with at least one transistor (22 or 32) having an input signal (71, 72) applied to its base. A current sink (52) sinking a fixed value of current (I) is coupled to the commonly-coupled emitters of the transistor pair (22, 32). Coupled to the collector of each amplifying transistor (22, 32) is a self-biasing constant current source (2, 12) which produces a fixed amount of current (I/2) equal to one half the current (I) sunk by the current sink (52). Each self-biasing constant current source (2, 12) comprises a field effect transistor (2, 12) having a capacitor (6, 16) connected between the gate G and source S of the FET (2, 12) in a positive feedback arrangement. The balanced current output (61, 62) is taken from the collectors of each of the two amplifying transistors (22, 32).

Read-head preamplifier having internal offset compensation

A circuit includes a differential amplifier that generates a differential offset signal on its output terminals. The circuit also includes an offset compensator that has input terminals respectively coupled to the amplifier output terminals and a compensation terminal coupled to the differential amplifier. The compensator maintains the differential offset signal at a predetermined value, for example 0 V. When used in an integrated read-head preamplifier, such a circuit compensates for the nonzero head bias voltage, i.e., the preamplifier input offset voltage, without using a component that is external to the integrated preamplifier circuit.

Method of and apparatus for detecting open circuit conditions at an input to a signal chain and for detecting channel imbalance in a differential signal chain

It is often desirable to distinguish between an open circuit condition and a no signal condition. In both cases an input signal may be absent, but only one of these events represents a failure of the equipment. The present disclosure provides a way to use a difference amplifier to check for open circuit events, without requiring additional circuitry at the input of the amplifier.

DIFFERENTIAL AMPLIFIER, SAMPLE-AND-HOLD CIRCUIT, AND AMPLIFIER CIRCUIT

To provide a common-mode feedback circuit that feeds back signal corresponding to common-mode components of output terminal voltage of first and second amplifiers to input terminals of the first and second amplifiers via first and second passive elements connected to a common terminal, respectively.

CLASS-D AUDIO AMPLIFIER

The present disclosure relates to a class-D audio amplifier. When the system is powered on, an auxiliary power amplifier and an auxiliary feedback circuit constitute an auxiliary close loop so that a control loop is established in advance. The auxiliary close loop is disconnected after various circuit modules reach their steady operation points, and the system operates at a normal state. A soft start circuit is provided for suppressing noise which occurs when the system is powered on. Thus, the class-D audio amplifier suppresses POP noise at an output terminal when the system is powered on.

Operational amplifier in which the idle current of its output push-pull transistors is substantially zero

A high slew rate operational amplifier circuit of which the through current of its push-pull transistors is substantially zero is disclosed. The operational amplifier circuit preferably comprises an amplifier portion and a push-pull output amplifier including NPN and PNP output transistors. The output of the amplifier portion is transferred to the NPN output transistors base through a PNP driving transistor and to the PNP output transistors base through an NPN driving transistor. The emitters of the driving transistors are connected to respective power supply conductors through respective current sources. The through current reduction is achieved by resistors inserted between the current sources and the corresponding power supply conductors, an NPN transistor so connected with the NPN output transistor as to constitute a current mirror and a PNP transistor so connected with the PNP output transistor as to constitute another current mirror.

Variable gain amplifier

An apparatus and method are provided. Generally, an input signal is applied across a main path (through an input network) and across a cancellation path (through a cancellation circuit). The cancellation circuit subtracts a cancellation current from the main path as part of the control mechanism, where the magnitude of the cancellation current is based on a gain control signal (that has been linearized to follow a control voltage).

Operational amplifier

An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2π·fc·C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.

Differential integrated input circuit

An apparatus, system, and method are provided for a differential integrated input circuit. The apparatus includes n-type semiconductor devices and p-type semiconductor devices. The p-type semiconductor devices are cross-coupled with the n-type semiconductor devices. Each of the p-type semiconductor devices biases a corresponding n-type semiconductor device.

Stacked modulator and automatic gain control amplifier

A circuit arrangement that stacks a modulator and automatic gain control (AGC) amplifier so as to re-use the modulator output current to drive the AGC amplifier, thereby saving power consumption and avoiding an unnecessary signal transformation between the two stages. A balanced circuit topology is used. The modulation signal can be selected over a wide range (100 MHz to 5.4 GHz) and the circuit arrangement is therefore particularly suitable for wireless applications (e.g. GSM-EDGE) and for integrated circuit fabrication.

УСТРОЙСТВО СВЯЗИ, УСТРОЙСТВО ОТСЛЕЖИВАНИЯ МОЩНОСТИ ПРИЕМА И СИСТЕМА УСТРОЙСТВА СВЯЗИ

РОССИЙСКАЯ ФЕДЕРАЦИЯ (19) RU (11) (13) 2015 140 615 A (51) МПК H04B 1/16 (2006.01) ФЕДЕРАЛЬНАЯ СЛУЖБА ПО ИНТЕЛЛЕКТУАЛЬНОЙ СОБСТВЕННОСТИ (12) ЗАЯВКА НА ИЗОБРЕТЕНИЕ (21)(22) Заявка: 2015140615, 06.02.2014 (71) Заявитель(и): НЕК КОРПОРЕЙШН (JP) Приоритет(ы): (30) Конвенционный приоритет: (72) Автор(ы): ИИНО Сатоси (JP) 11.03.2013 JP 2013-048045 (85) Дата начала рассмотрения заявки PCT на национальной фазе: 12.10.2015 R U (43) Дата публикации заявки: 18.04.2017 Бюл. № 11 (86) Заявка PCT: (87) Публикация заявки PCT: WO 2014/141583 (18.09.2014) R U (54) УСТРОЙСТВО СВЯЗИ, УСТРОЙСТВО ОТСЛЕЖИВАНИЯ МОЩНОСТИ ПРИЕМА И СИСТЕМА УСТРОЙСТВА СВЯЗИ (57) Формула изобретения 1. Устройство связи, содержащее блок обработки приема, который выдает напряжение интенсивности сигнала в соответствии с уровнем принятого сигнала; и схему генератора сигнала вывода отслеживания, которая создает сигнал вывода отслеживания путем усиления по току напряжения смещения уровня, созданного путем смещения уровня напряжения интенсивности сигнала на напряжение сдвига, соответствующее значению напряжения питания внешнего устройства. 2. Устройство связи по п. 1, в котором схема генератора сигнала вывода отслеживания содержит блок суммирования напряжений, который создает напряжение смещения уровня путем суммирования напряжения сдвига и напряжения интенсивности сигнала; и блок усиления, который усиливает напряжение смещения уровня путем усиления по току. 3. Устройство связи по п. 1 или 2, в котором сигнал вывода отслеживания передается на внешнее устройство через одну сигнальную линию. 4. Устройство отслеживания мощности приема, содержащее схему генератора постоянного напряжения, которая выдает постоянное напряжение на основе сигнала вывода отслеживания, выдаваемого устройством связи, подлежащим отслеживанию, в соответствии с уровнем принятого сигнала; и Стр.: 1 A 2 0 1 5 1 4 0 6 1 5 A Адрес для переписки: 129090, Москва, ул. Б. Спасская, 25, стр. 3, ООО "Юридическая фирма Городисский и Партнеры" 2 0 1 5 1 4 0 6 ...

УСИЛИТЕЛЬ И УСТРОЙСТВО ОБРАБОТКИ СИГНАЛОВ

Группа изобретений относится к усилителю устройства обработки сигналов. Технический результат заключается в обеспечении возможности усиления входного сигнала, содержащего низкочастотный компонент. Когда переключатель (SW1) задается выключенным, а переключатель (SW2) задается включенным, напряжение контактного вывода (205) SigOut стабилизируется с помощью опорного напряжения, и напряжение смещения прикладывается к конденсатору (C1). Изменяя переключатель (SW2) из включенного состояния в выключенное при напряжении смещения, сохраненном в конденсаторе (C1), сигнал обнаружения, который вводится через контактный вывод (201) SigIn, усиливается с помощью опорного напряжения в качестве опорного уровня, и усиленный сигнал выводится из контактного вывода (205) SigOut. 2 н. и 10 з.п. ф-лы, 27 ил.

Schaltung mit hoher Impedanz

Amplifier circuit with variable output voltage - has two outputs of first differential amplifier coupled each to negative feedback circuit

The max. positive or min. negative output voltage of the amplifier circuit are variable. The circuit contains a first differential amplifier (1), whose control input is coupled to an adjustable current source (5). Both outputs of the differential amplifier are each coupled via a negative feedback circuit (7, 10) to each input of the differential amplifier. Pref. each negative feedback circuit contains a first resistor (12, 15), coupled to amplifier output and input respectively, and a second resistor (13, 16), linked to the first resistor. Each negative feedback circuit may have also a negative feedback transistor, between the amplifier output and the first resistor. ADVANTAGE - Independent amplification during max. positive and min. negative output voltage.

Differentialgleichstromverstaerker mit steuerbarem Verstaerkungsgrad

Linear capacitance measurement and touchless switch

AMPLIFIER AND SIGNAL PROCESSING DEVICE

When a switch (SW1) is set to off, and a switch (SW2) is set to on, the voltage of a SigOut terminal (205) is stabilized with a reference voltage, and a bias voltage is applied to a capacitor (C1). Changing the switch (SW2) from on to off, with the bias voltage retained in the capacitor (C1), a detection signal which is inputted via a SigIn terminal (201) is amplified with the reference voltage as a reference, and an amplified signal is outputted from the SigOut terminal (205).

ANALOG AMPLIFICATION DEVICE PARTICULARLY FOR A LASER ANEMOMETER

AMPLIFIER MIRROR OF SYMMETRICAL CURRENTS

Voltage detection circuit

MULTICHANNEL DETECTOR HAVING A REDUCED NUMBER OF OUTPUT CHANNELS

The present invention relates to a multichannel detector having a reduced number of output channels, and including: a linear amplifier for linearly amplifying an input signal; an offset correction unit including a circuit separated from the linear amplifier and an operational amplifier therein, and configured to correct the offset level which varies according to the amplification rate of the operational amplifier; a uniformity correction unit for reducing the irregularity of an input signal by minutely adjusting the gain of an output signal from the linear amplifier; a signal delayer for delaying the output signal of the uniformity correction unit until an output signal is generated from a comparison unit and a signal determination unit, and a switch circuit receives a trigger from the signal determination unit; the comparison unit, which compares the output signal of the uniformity correction unit with a signal of a predetermined level; the signal determination unit, which determines the ...

METHOD FOR CONTROLLING THE GAIN OF A SIGNAL IN A TRANSMITTER

The present invention relates to a method a circuit for power amplification of an IF signal by means of a Gilbert mixer which is coupled to a power amplifier. The Gilbert mixer is directly coupled to a local oscillator which causes conversion gain variations of the Gilbert mixer. The conversion gain variations are compensated by controlling of the gain of the power amplifier correspondingly.

Differential amplifier balancing system

Complementary outputs of a differential amplifier are individually peak detected and the resulting signals are applied to the amplifier differential input in a manner to cause the output peak excursions to have substantially the same direct current levels. This causes the crossover of the two outputs to occur at the midpoint of the signal swing regardless of the input signal peak-to-peak swing, at whatever level.

SEMICONDUCTOR INTEGRATED CIRCUIT AND RADIO COMMUNICATION TERMINAL INCLUDING THE SAME

A semiconductor integrated circuit includes an operational amplifier that amplifies a voltage difference between an input voltage supplied to an inverting input terminal and a reference voltage supplied to a non-inverting input terminal and outputs an amplified signal, a feedback resistor that performs negative feedback of the amplified signal to the inverting input terminal of the operational amplifier, and a variable resistor unit that sets a current path with a first resistance value in accordance with a control signal between an external input terminal and the inverting input terminal of the operational amplifier, and sets a first alternative path with a second resistance value in accordance with the control signal between a node on the current path and a reference voltage terminal to which the reference voltage is supplied.

CURRENT SENSE AMPLIFER WITH EXTENDED COMMON MODE INPUT VOLTAGE RANGE

Current sense amplifiers with extended input common mode (CM) voltage range, including an extended CM input voltage amplifier that includes a low voltage (LV) p-type metal oxide semiconductor (PMOS) input module coupled to a positive supply rail, wherein said supply rail provides a voltage that is the maximum between a positive input signal (IN+) applied to the amplifier and an internal power supply voltage. The amplifier further includes a voltage regulator coupled to the supply rail that generates a decreased voltage level relative to the supply rail voltage that is provided to the LV PMOS input module via a high voltage ground (HV_GND) line. At least part of the LV PMOS input module is powered by a voltage difference between the positive supply rail and the HV_GND line. The voltage regulator maintains said voltage difference within an operating range of LV devices within the LV PMOS input module.

System and method for ovenized device temperature control

The present invention generally relates to a system and method for high accuracy temperature control of an oven used to operate an electronic device, sensor or resonator (“device”) at a fixed temperature. The fixed temperature operation may result in high stability and operation accuracy of the devices across varying environment temperature conditions. Specifically, the present invention relates to systems and methods that enable realizing, sensing, and controlling the temperature of an ovenized device with high temperature control, accuracy, relaxed temperature sense, and control electronics requirements.

Signal level conversion circuit, physical quantity detection device and electronic apparatus

A signal level conversion circuit 1 includes a first differential amplifier circuit 10 and a second differential amplifier circuit 20 . The first differential amplifier circuit 10 multiplies a potential difference between a first input signal and a second input signal by G 1 thereby providing an output signal. The second differential amplifier circuit 20 multiplies a potential difference between the output signal of the first differential amplifier circuit 10 and the second input signal by G 2 thereby providing an output, where the two gains satisfy the relation of G 1 ×G 2 <0 and 0<−(G 1 +1)×G 2 <2.

Reference buffer amplifier

A reference buffer amplifier within an integrated circuit includes a first output terminal connected to a first bond pad, the first bond pad being connected to a first external pin of the integrated circuit chip, the first external pin to allow an external capacitance to be connected to the output terminal. The reference buffer further includes a variable, settable resistance sub-circuit connected to a second bond pad, the second bond pad also being connected to the first external pin. The resistance sub-circuit is configured to be set to exhibit a resistance value to critically dampen a response of the reference buffer amplifier.

De-noise circuit and de-noise method for differential signals and chip for receiving differential signals

A de-noise circuit and a de-noise method for differential signals and a chip for receiving differential signals are provided. The de-noise circuit includes a filter and a register. Both the filter and the register are disposed in the chip. The chip receives a differential signal through a first input terminal and a second input terminal. The filter is coupled between the first input terminal and the second input terminal of the chip. The filter filters out noises in the differential signal. The filter includes at least one filter unit. Each filter unit has at least one resistance value or at least one capacitance value. The register is coupled to the filter. The register receives and stores a control value. The register controls the resistance value or the capacitance value of at least one of the filter units based on the control value.

Output impedance compensation of a pseudo-envelope follower power management system

A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a compensated V RAMP signal. The parallel amplifier output impedance compensation circuit provides the compensated V RAMP signal based on a combination of a V RAMP signal and a high frequency ripple compensation signal. The high frequency ripple compensation signal is based on a difference between the V RAMP signal and the estimated switching voltage output.

Multichannel detector having a reduced number of output channels

The present disclosure relates to a multi-channel detector having a reduced number of output channels and including: a linear amplifier linearly amplifying an input signal; an offset correcting unit configured by a circuit that is independent from the linear amplifier, including an operational amplifier inside, and correcting an offset level that changes in accordance with an amplification rate of the operational amplifier; a uniformity correcting unit reducing a non-uniform characteristic of the input signal by finely adjusting a gain of an output signal of the linear amplifier; a signal delay unit delaying an output signal of the uniformity correcting unit until a time point when output signals are generated from a comparison unit and a signal determining unit, and a switch circuit receives a trigger from the signal determining unit; a comparison unit comparing the output signal of the uniformity correcting unit with a signal of a predetermined level with each other; a signal determining unit receiving a trigger signal from the comparison unit, determining channel position information of a channel in which an event occurs, transmitting a trigger signal to a switch circuit located at the determined channel position, and outputting the determined position information; and a channel information processing unit receiving energy information, time information, or the channel position information of a channel in which an event occurs as input when a trigger signal is input from the signal determining unit to the switch circuit located at the determined channel position.

Pop/Click Noise Reduction Circuitry For Power-Up And Power-Down of Audio Output Circuitry

Pop/clock noise reduction circuitry is disclosed for audio output circuitry. After audio output circuitry is enabled, reference voltage generator circuitry is then enabled to produce a reference voltage that ramps from a first voltage level to a second voltage level at a smooth rate. The ramping reference voltage is applied to the input of the audio output circuitry to reduce or prevent pop/click noise for the audio output circuitry. Further, negative offset control circuitry can also be used to provide a negative offset input to the audio output circuitry to remove initial step-up voltage levels that may exist at operational power-up for the audio output circuitry. Still further, current control circuitry can also be used that limits the available current flowing to the output node for the audio output circuitry, thereby further reducing and/or preventing potential pop/click noise in the audio output signals.

Tunable Filter for RF Circuits

A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system. 17-. (canceled)8. A communication system , comprising:at least one tunable filter circuit capable of dynamic adjustment of a center frequency, bandwidth, or transmission loss characteristics;a processor;a lookup table (LUT) resident in the process or other memory cell;wherein frequency channel information is provided by the processor and the look-up table is accessed to determine a tuning component state to alter the tunable filter circuit center frequency, bandwidth, or transmission loss.910-. (canceled)11. The communication system of claim 8 , further comprising an antenna.12. The communication system of claim 11 , wherein the antenna comprises an isolated magnetic dipole antenna.13. The communication system of claim 11 , wherein the processor is configured to adjust a bandwidth of the tunable filter such that the tunable filter and the antenna provide a frequency response characteristic for the communication system.14. The communication system of claim 8 , wherein the at least one tunable filter circuit comprises a first tunable filter circuit in a transmit path and a second tunable filter circuit in a receive path.15. The communication system of claim 8 , wherein the first tunable filter circuit is coupled to an output of a power amplifier.16. The communication system of claim 8 , wherein the second tunable filter circuit is coupled to an input of a low noise amplifier.18. ...

AMPLIFIER SPEAKER DRIVE CURRENT SENSE

A class-D amplifier includes measurement of speaker current via the low-side drive transistors of the amplifier. In one embodiment, a class-D amplifier includes two high-side transistors, two low-side transistors, a first sense resistor, a second sense resistor, and a sigma delta analog to digital converter (σΔ ADC). The two high-side transistors and two low-side transistors are connected as a bridge to drive a bridge tied speaker. The first sense resistor is connected between a first of the low-side transistors and a low-side reference voltage. The second sense resistor is connected between a second of the low-side transistors and the low-side reference voltage. The ΣΔ ADC is coupled to the bridge to measure voltage across the first sense resistor and the second sense resistor. 1. A class-D amplifier , comprising:two high-side transistors and two low-side transistors connected as a bridge to drive a bridge tied speaker;a first sense resistor connected between a first of the low-side transistors and a low-side reference voltage;a second sense resistor connected between a second of the low-side transistors and the low-side reference voltage; anda sigma delta analog to digital converter (ΣΔ ADC) coupled to the bridge to measure voltage across the first sense resistor and the second sense resistor.2. The class-D amplifier of claim 1 , wherein the ΣΔ ADC comprises:a first digital to analog converter (DAC) dedicated to measurement of voltage across the first sense resistor; anda second DAC dedicated to measurement of voltage across the second sense resistor.3. The class-D amplifier of claim 2 , wherein the first DAC and the second DAC are trimmed to compensate for a difference between the first sense resistor and the second sense resistor.4. The class-D amplifier of claim 2 , wherein the first DAC and the second DAC are continually active while operating the class-D amplifier.5. The class-D amplifier of claim 1 , wherein the ΣΔ ADC comprises:a differential amplifier;a ...

CIRCUIT SUBSTRATE

On a circuit board, a metal thin film is formed on a surface of a board body. A linear slit is formed in a metal thin film, so that the metal thin film is separated into a first region and a second region with the slit interposed therebetween. The circuit board includes a heat generation source (for example, an IC) arranged in the first region and an element arranged in the second region. A current flows through the element in a direction parallel to the slit. 1. A circuit board where a metal thin film is formed on a surface or an inner layer of a board body ,wherein a linear slit is formed in the metal thin film so that the metal thin film is separated into a first region and a second region with the slit interposed therebetween, andwherein the circuit board comprises:a heat generation source which is arranged in the first region; andan element which is arranged in the second region and through which a current flows in a direction parallel to the slit.2. The circuit board according to claim 1 ,wherein the element has a pair of connection portions for electrical connection, andwherein the pair of connection portions are aligned in the direction parallel to the slit.320. The circuit board according to claim 1 , wherein the element handles a minute voltage of nV or less.4. The circuit board according to claim 1 , further comprising an amplifier amplifying a signal input through the element.5. The circuit board according to claim 1 , wherein the heat generation source is an IC.6. The circuit board according to claim 1 , wherein the element is an electric resistor.7. The circuit board according to claim 1 , wherein the first region and the second region are grounded. The present invention relates to a circuit board having a metal thin film formed on a surface of a board body.An analyzing apparatus, for example, a thermal analyzing apparatus or the like measuring and analyzing a minute signal output from a detector is provided with a circuit board on which an amplifier ...

TRANSIMPEDANCE AMPLIFIER CIRCUIT

A transimpedance amplifier circuit includes a single-input amplifier that converts a current signal into a voltage signal, a control current circuit that generates a control current based on the voltage signal and a reference voltage signal, and a bypass circuit. The bypass circuit includes a control circuit configured to receive the control current, a feedback current source configured to generate a direct current (DC) bypass current, and a variable resistance circuit configured to generate an alternating current (AC) bypass current, and the control circuit includes a first current mirror circuit that varies the DC bypass current via the feedback current source in accordance with the control current, and a second current mirror circuit varies the AC bypass current via the variable resistance circuit in accordance with the control current and an offset current. 1. A transimpedance amplifier circuit configured to generate a differential voltage signal in accordance with an input current signal generated by a photodetector , the transimpedance amplifier circuit comprising:an input terminal configured to receive the input current signal;a single-input amplifier configured to convert a current signal into a voltage signal;a differential amplifier circuit configured to generate the differential voltage signal based on the voltage signal and a reference voltage signal;a control current circuit configured to generate a control current based on the voltage signal and the reference voltage signal; anda bypass circuit configured to generate a direct current (DC) bypass current and an alternating current (AC) bypass current based on the control current, the bypass circuit being electrically connected to the input terminal,wherein the bypass circuit includes a control circuit configured to receive the control current, a feedback current source configured to generate the DC bypass current, and a variable resistance circuit configured to generate the AC bypass current, andthe ...

TRANSIMPEDANCE AMPLIFIER CIRCUIT

In a transimpedance amplifier circuit, a control current circuit generates a control current based on a voltage signal and a reference voltage signal and includes an integrating circuit that generates a differential integral signal based on the voltage signal and the reference voltage signal, the transconductance amplifying circuit includes a first transconductance circuit that generates a first output current in accordance with a differential integral signal, a second transconductance circuit that generates a second output current in accordance with the differential integral signal, and a current source that supplies a third output current, and the control circuit has an input electrically connected to an output of the first transconductance circuit, an output of the second transconductance circuit, and an output of the current source. 1. A transimpedance amplifier circuit configured to generate a differential voltage signal in accordance with an input current signal generated by a photodetector , the transimpedance amplifier circuit comprising:an input terminal configured to receive the input current signal;a single-input amplifier configured to convert a current signal into a voltage signal;a differential amplifier circuit configured to generate the differential voltage signal based on the voltage signal and a reference voltage signal;a control current circuit configured to generate a control current based on the voltage signal and the reference voltage signal; anda bypass circuit configured to generate a direct current (DC) bypass current and an alternating current (AC) bypass current based on the control current, the bypass circuit being electrically connected to the input terminal,wherein the bypass circuit includes a control circuit configured to receive the control current, a feedback current source configured to generate the DC bypass current, and a variable resistance circuit configured to generate the AC bypass current,the control current circuit includes ...

POWER AMPLIFIER HAVING STACK STRUCTURE

A power amplifier having a stack structure comprises a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage. 1. A power amplifier having a stack structure , comprising:a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal;a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; anda power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage.2. The power amplifier of 1 , the driver stage or the power stage is implemented in a differential amplification structure or a single-ended amplification structure. This application is a Division of U.S. patent application Ser. No. 14/407,965 filed Dec. 15, 2014, which is a National Stage Patent Application of PCT International Patent Application No. PCT/KR2012/008598 filed Oct. 19, 2012, which claims priority to Korean Patent Application No. 10-2012-0082535 filed Jul. 27, ...

Switching circuit

A switching circuit generates a switching pulse that is pulse modulated according to an input signal. An error amplifier includes a phase compensating filter that generates a feedback signal corresponding to the switching pulse. The error amplifier generates an error signal corresponding to a difference between the input signal and the feedback signal. A pulse modulator includes an oscillator that generates a carrier signal having a variable frequency. The pulse modulator pulse-modulates the carrier signal according to the error signal, so as to generate a pulse modulated signal. The phase compensating filter is configured such that its frequency characteristics can be adjusted according to the frequency of the carrier signal.

ISOLATION AMPLIFICATION CIRCUIT WITH IMPROVED COMMON MODE REJECTION

An isolation amplification circuit having an input stage circuitry and a control circuitry stage interconnected through a galvanic isolation barrier. The input stage circuitry includes a first filter network and a second filter network for supplying first and second output signals in response to the application of first and second electrical input signals. The input stage circuitry includes a first feedback path configured for applying a first feedback signal to a common node of the first filter network to close a first feedback loop around the first filter network and a second feedback path configured for applying a second feedback signal to a common node of the second filter network to close a second feedback loop around the second filter network. 1. An isolation amplification circuit comprising:an input stage circuitry and a control circuitry stage inter-connected through a galvanic isolation barrier; said input stage circuitry being referenced to a first ground potential and configured to receive at least a first electrical signal and a second electrical signal generated by a signal source;said input stage circuitry comprising:a first filter network comprising a first input node, a first output node and first common node wherein the first output node is configured to supply a first output signal in response to application of the first electrical signal at the first input node; anda second filter network comprising a second input node, a second output node and a second common node, wherein the second output node is configured to supply a second output signal in response to application of the second electrical signal at the second input node; anda first feedback path configured for lowpass filtering the first output signal and supplying a first lowpass filtered output signal to the first common node; anda second feedback path configured for lowpass filtering the second output signal and supplying a second lowpass filtered output signal to the second common node.2. ...

MATRIX POWER AMPLIFIER

A power amplifier includes a two-dimensional matrix of N×M active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately N×M the output power of each of the active cells. 1. (canceled)2. A power amplifier comprising:a two-dimensional matrix of N×M active cells formed by stacking main terminals of multiple active cells in series, where the stacks are coupled in parallel to form the two-dimensional matrix, wherein the power amplifier further comprises a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately N×M the output power of each of the active cells.3. The power amplifier of claim 2 , further comprising a bias tee that has a high frequency port coupled to a load driven by the two-dimensional matrix claim 2 , a combined port coupled to stacks of the two-dimensional matrix claim 2 , and a low frequency port coupled to a DC source.4. The power amplifier of claim 2 , further comprising a second two-dimensional matrix of active cells formed by stacking main terminals of multiple active cells in series claim 2 , wherein the stacks are coupled in parallel to form the second two-dimensional matrix claim 2 , wherein the two-dimensional matrix and the second two-dimensional matrix are coupled to form a complementary or quasi-complementary stage.5. The power amplifier of claim 4 , wherein the power amplifier further comprises a second driver structure to coordinate the driving of the active cells of the second two-dimensional matrix in anti-phase with the driving of the active cells in the two-dimensional matrix.6. The power amplifier of claim 5 , further comprising a control loop including an error amplifier to output an ...

Analog amplifier for recovering abnormal operation of common mode feedback

An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.

Method and Device for Providing a Bias Voltage in Transceivers

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver. 1. A device for generating a bias voltage for a transceiver operating in time division multiplexing operation , the device comprising:a bias voltage control loop configured to control the bias voltage; anda loop controller configured to deactivate the bias voltage control loop during transmission and reception of signals by the transceiver and to activate the bias voltage control loop at least in a portion of at least some guard intervals between transmission and reception of signals of the transceiver.2. The device of claim 1 , wherein the loop controller is configured to activate the bias voltage control loop in at least some guard intervals upon transition from reception of data to transmission of data.3. The device of claim 2 , wherein the loop controller is configured to activate the bias voltage control loop in a delayed manner after the beginning of the at least some guard intervals.4. The device of claim 1 , wherein the bias voltage is a control voltage for a transistor of the transceiver claim 1 , and wherein the bias voltage control loop is configured to control the bias voltage based on a load current of the transistor and a reference current.5. The device of claim 4 , wherein the control voltage is a gate voltage and the load current is a drain current.6. The device of claim 5 , wherein the loop controller is configured to activate the bias voltage control loop outside reception of signals of the transceiver and to deactivate the bias voltage control loop during reception of signals and claim 5 , during reception of data claim 5 , to output a clamping voltage as the control voltage to the transistor and that puts the transistor into an off state.7. The device of ...

AMPLIFIER OFFSET CANCELLATION USING AMPLIFIER SUPPLY VOLTAGE

In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier. 116.-. (canceled)17. A method for power supply offset rejection for an amplifier , comprising:converting a power supply voltage of the amplifier into a quantity indicative of the power supply voltage, wherein the quantity is a digital signal;generating a correction signal by multiplying the quantity by a transfer function defining a response from the power supply voltage to an output signal of the amplifier; andsubtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.18. The method of claim 17 , wherein the amplifier comprises an audio amplifier.19. The method of claim 17 , wherein subtracting the correction signal from the signal comprises subtracting the correction signal from an analog signal within an analog domain of the signal path.20. The method of claim 19 , wherein the correction signal is applied through a multiplying digital-to-analog converter.21. The method of claim 17 , wherein subtracting the correction signal from the signal comprises subtracting the correction signal from a digital signal within a digital domain of the signal path.22. The method of claim 21 , wherein the quantity indicative of the power supply voltage is a predicted estimate of the power supply voltage based on an input signal of the signal path.23. The method of claim 21 , wherein subtracting the correction signal comprises subtracting the correction signal from an input signal of the amplifier.24. The method of claim 21 , wherein subtracting the correction signal ...

High frequency amplifier

There is provided a polyphase filter ( 5 ) that generates first differential signals from first signals amplified by a first transistor ( 2 - 1 ), outputs the first differential signals from a first output terminal ( 5 - 1 ) and a third output terminal ( 5 - 3 ), generates second differential signals from second signals amplified by a second transistor ( 2 - 2 ), and outputs the second differential signals from the first output terminal ( 5 - 1 ) and the third output terminal ( 5 - 3 ).

AMPLIFIER CIRCUIT, CORRESPONDING SYSTEM AND DEVICE

A circuit for amplifying signals from a Micro Electro-Mechanical System (MEMS) capacitive sensor is provided. First and second input nodes receive a sensing signal applied differentially between the input nodes. A first amplifier stage and a second amplifier stage, respectively, produce a differential output signal between first and second output nodes. A common mode signal is detected at the output nodes. A voltage divider having an intermediate tap node is coupled between the first output node and the second output node. A feedback stage is coupled between the tap node of the voltage divider and the inputs of the first amplifier stage and the second amplifier stage, where the feedback line is sensitive to the common mode signal at the output nodes. 1. A circuit , including:a first input node and a second input node that are configured to differentially receive a sensing signal,a first output node and a second output node,a first amplifier stage having a first input coupled to the first input node, an output coupled to the first output node, and a second input,a second amplifier stage having a first input coupled to the second input node, a second input, and an output coupled to the second output node, the first and second amplifiers being configured to produce a differential output signal between the first output node and the second output node and a common mode signal at both the first and second output nodes,a voltage divider set between the first output node and the second output node, and having an intermediate tap node, anda feedback stage coupled to the tap node of the voltage divider, the second input of the first amplifier stage, and the second input of the second amplifier stage, wherein the feedback stage is sensitive to the common mode signal at the output nodes.2. The circuit of claim 1 , wherein the feedback stage is coupled to the tap point of the voltage divider and a common node that is respectively capacitively coupled to the second input of the ...

SEMICONDUCTOR DEVICE, IN-VEHICLE VALVE SYSTEM AND SOLENOID DRIVER

A semiconductor device includes an output driving circuit configured to output an output current to an output terminal; a detection resistor connected between the output terminal and the output driving circuit; an amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor; a current generation circuit configured to output a reference current; a reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current; an A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference; and a control circuit configured to control the output current output from the output driving circuit according to the digital detection signal. The detection resistor has a same temperature characteristics as the reference resistor. 1. A semiconductor device comprising:an output driving circuit configured to output an output current to an output terminal;a detection resistor connected between the output terminal and the output driving circuit;an amplification unit configured to output an analog detection signal generated by amplifying a voltage between both ends of the detection resistor;a current generation circuit configured to output a reference current;a reference resistor connected between the current generation circuit and a ground and configured to output a reference voltage according to the reference current;an A/D converter configured to convert the analog detection signal into a digital detection signal using the reference voltage as a reference; anda control circuit configured to control the output current output from the output driving circuit according to the digital detection signal,wherein the detection resistor has a same temperature characteristics as the reference resistor.2. The semiconductor device according to claim 1 , ...

Amplifier with common mode detection

An analog discrete current mode negative feedback amplifier circuit for use with a micro-fused strain gauge is disclosed. The amplifier circuit includes a Wheatstone bridge coupled to a first power supply and a second power supply. The first power supply and the second power supply can be configured such that the periodically alternate between two voltage levels. The Wheatstone bridge can be coupled to a negative feedback amplifier circuit with common mode detection. The amplifier circuit can comprise a differential amplifier with a negative feedback configuration coupled to a common mode amplifier. In addition, the output of each of the amplifiers can be coupled to a common-mode amplifier. In a pressure sensing application, the output of the common mode amplifier serves to output the temperature while the differential amplifiers serve to output the pressure.

High Linearly WiGig Baseband Amplifier with Channel Select Filter

A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations. 1. A WiGig baseband signal-processing circuit comprising:a Sallen-Key filter comprising a source follower that implements a unity-gain amplifier; anda programmable-gain amplifier coupled to the Sallen-Key filter, the circuit configured to provide programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier to decouple bandwidth of the circuit from its gain settings.2. The WiGig baseband signal-processing circuit recited in claim 1 , wherein the programmable-gain amplifier comprises a differential voltage-to-current converter claim 1 , a current mirror pair claim 1 , and programmable output gain stages.3. The WiGig baseband signal-processing circuit recited in claim 1 , configured to function as at least one of a low-pass filter claim 1 , a high-pass filter claim 1 , and a band-pass filter.4. The WiGig baseband signal-processing circuit recited in claim 1 , wherein the source follower comprises a first plurality of transistors arranged in a first circuit configuration claim 1 , and at least one branch within the programmable-gain amplifier comprises at least a second plurality of transistors arranged in at least a second circuit configuration claim 1 , the at least second circuit configuration identical to the first circuit configuration.5. The WiGig baseband ...

AMPLIFIER WITH ADJUSTABLE GAIN

An amplifier with adjustable gain including a plurality of differential amplifiers and an output stage circuit is provided. Each of the differential amplifiers has at least one differential pair, two current terminals of each of the differential pairs are coupled by a connection structure, and the connection structure provides a negative feedback resistance. The differential amplifiers commonly receive a differential input signal pair, and output terminals of the differential amplifiers are coupled together. The output stage circuit inverts a voltage on the output terminals of the differential amplifiers to generate an output voltage. A direct current gain of the amplifier with adjustable gain is determined by adjusting at least one of working numbers of the differential amplifiers and the differential pairs. 1. An amplifier with adjustable gain , comprising:a plurality of differential amplifiers, each of the differential amplifiers having at least one differential pair and two transistor strings, wherein two current terminals of each of the at least one differential pair are coupled by a connection structure, and the connection structure provides a negative feedback resistance, the differential amplifiers commonly receive a differential input signal pair, output terminals of the differential amplifiers are coupled to each other, the two transistor strings are respectively coupled between two load terminals and the two current terminals of each of the at least one differential pair, and the two transistor strings are turned on or turned off according to a control signal and a reference voltage; andan output stage circuit, coupled to the output terminals of the differential amplifiers, and inverting a voltage on the output terminals of the differential amplifiers to generate an output voltage,wherein a direct current gain of the amplifier with adjustable gain is determined by adjusting at least one of working numbers of the differential amplifiers and the ...

SOURCE MEASURE UNIT WITH GUARD DRIVE CIRCUIT

A test and measurement device including a source configured to output a source signal, a source output configured to output the source signal to a connected cable, a guard drive circuit electrically coupled to the source and configured to receive the source signal and generated a guard drive signal, the guard drive circuit having a gain less than one, and a guard drive circuit output configured to output the guard drive signal to a connected guard. 1. A test and measurement device , comprising:a source configured to output a source signal;a source output configured to output the source signal to a connected cable;a guard drive circuit electrically coupled to the source and configured to receive the source signal and generate a guard drive signal, the guard drive circuit having a gain less than one; anda guard drive circuit output configured to output the guard drive signal to a connected guard.2. The test and measurement device according to claim 1 , wherein the guard drive circuit includes:a first operational amplifier electrically coupled to the source and configured to receive the source signal and output a signal based on the source signal;an attenuator circuit electrically coupled to the first operational amplifier and configured to receive the signal from the first operational amplifier and reduce a gain of the signal received from the first operational amplifier; anda second operational amplifier electrically coupled to the attenuator circuit and configured to receive a signal from the attenuator circuit and output the guard drive signal.3. The test and measurement device according to claim 2 , wherein the attenuation circuit comprises a resistor divider.4. The test and measurement device according to claim 3 , wherein the resistor divider includes:a first resistor electrically coupled between the first operational amplifier and the second operational amplifier; anda second resistor electrically coupled between the second operational amplifier and ground.5. ...

System and method for ovenized device temperature control

The present invention generally relates to a system and method for high accuracy temperature control of an oven used to operate an electronic device, sensor or resonator (“device”) at a fixed temperature. The fixed temperature operation may result in high stability and operation accuracy of the devices across varying environment temperature conditions. Specifically, the present invention relates to systems and methods that enable realizing, sensing, and controlling the temperature of an ovenized device with high temperature control, accuracy, relaxed temperature sense, and control electronics requirements.

AMPLIFYING CIRCUIT AND RECTIFYING ANTENNA

An amplifying circuit and a rectifying antenna are provided. The amplifying circuit includes: a first rectifying circuit (), configured to output a first direct current signal according to an alternating current signal; a second rectifying circuit (), configured to output a second direct current signal according to the alternating current signal; a differential amplifying circuit (), configured to receive the first direct current signal and the second direct current signal, amplify a difference between the first direct current signal and the second direct current signal, and output an amplified difference between the first direction current signal and the second direct current, the first direct current signal and the second direct current signal have directions opposite to each other. The amplifying circuit can improve sensitivity of an antenna with relatively low costs. 1. An amplifying circuit , comprising:a first rectifying circuit, configured to output a first direct current signal according to a first alternating current signal;a second rectifying circuit, configured to output a second direct current signal according to a second alternating current signal;a differential amplifying circuit, configured to receive the first direct current signal and the second direct current signal, amplify a difference between the first direct current signal and the second direct current signal, and output an amplified difference between the first direction current signal and the second direct current signal,wherein the first direct current signal and the second direct current signal have directions opposite to each other, the first rectifying circuit comprises at least one of a first band-pass filter and a first low-pass filter.2. The amplifying circuit according to claim 1 , wherein the second rectifying circuit comprises at least one of a second band-pass filter and a second low-pass filter.3. The amplifying circuit according to claim 1 , wherein the first rectifying circuit ...

DRIVE CIRCUIT FOR A TRANSISTOR COMPONENT

A drive circuit for a transistor component is described. The drive circuit comprises: an output, which is designed to be connected to a drive input of a transistor component and which has a first output node and a second output node; an input, which is designed to receive an input signal, which is referred to a reference potential (GND), and which has a first input node and a second input node; a differential amplifier arrangement which is connected to the first input node, the second input node, and the second output node, and which is designed to generate a drive signal based on the input signal; and a driver circuit, which is designed to receive the drive signal and to generate a drive voltage between the first and second output node based on the drive signal. 1. A drive circuit comprising:an output, which is designed to be connected to a drive input of a transistor component and which has a first output node and a second output node;an input, which is designed to receive an input signal, which is referred to a reference potential, and which has a first input node and a second input node;a differential amplifier arrangement, which is connected to the first input node, the second input node, and the second output node, and which is designed to generate a drive signal based on the input signal; anda driver circuit, which is designed to receive the drive signal and to generate a drive voltage between the first and second output node based on the drive signal.2. The drive circuit according to claim 1 , in which the differential amplifier arrangement includes:an input stage, which is connected to the first input node, the second input node, and the second output node;a differential amplifier including an input, which is connected to the input stage, and an output, which is designed to provide the drive signal.3. The drive circuit according to claim 2 , in which the input stage includes:a first voltage divider, which is connected between the first input node and the ...

ENHANCING SPEAKER PROTECTION ACCURACY

Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier. 1. An amplifier comprising:a plurality of amplifier stages configured to receive an input signal and output an amplified signal to a speaker;a first stage of the plurality of amplifier stages comprising at least two intermediate amplifiers; and a circuit to reduce a common-mode voltage component of the output of the first stage;', 'a summing stage coupled to the circuit; and', 'a final amplifier coupled to the summing stage and configured to output the amplified signal to the speaker., 'a second stage of the plurality of amplifier stages comprising2. The amplifier of claim 1 , wherein the amplifier forms one of a class-D amplifier claim 1 , a class-G amplifier claim 1 , or a class-H amplifier.3. The amplifier of claim 1 , wherein the first stage is configured to receive a variable supply voltage.4. The amplifier of claim 1 , wherein the at least two intermediate amplifiers and the final amplifier are differential amplifiers.5. The amplifier of claim 4 , wherein outputs of the at least two intermediate amplifiers in the first stage are cross-coupled to the final amplifier through the circuit and the summing stage.6. The amplifier of claim 5 , wherein the circuit comprises a double sampling ...

Power amplifier having stack structure

A power amplifier having a stack structure, including: a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that has a power input terminal connected with a ground terminal of the first driver stage and receiving a virtual power voltage and an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the second driver stage, and receives and amplifies an output signal from the second driver stage.

PHYSICAL LAYER CIRCUITRY FOR MULTI-WIRE INTERFACE

A physical layer circuitry (PHY) includes: N signal pads, a four-signal physical medium attachment sublayer (PMA) and M shielding pads. The N signal pads include at least four signal pads. The four-signal PMA is coupled to the four signal pads. The M shielding pads include at least one first shielding pad that is coupled to the four-signal PMA. Additionally, the first shielding pin is located between a second signal pad of the four signal pads and a third signal pad of the four signal pads; and M and N are positive integers. 1. A physical layer circuitry (PHY) , comprising:N signal pads including at least four signal pads;a four-signal physical medium attachment sublayer (PMA) coupled to the four signal pads; andM shielding pads including at least one first shielding pad that is coupled to the four-signal PMA;wherein the first shielding pin is located between a second signal pad of the four signal pads and a third signal pad of the four signal pads; and M and N are positive integers.2. The PHY of claim 1 , wherein each two signal pads of the N signal pads of the PHY are configured in a same lane when the four-signal PMA is operated in a first PHY mode; and each three signal pads of the N signal pads of the PHY are configured in a same lane when the four-signal PMA is operated in a second PHY mode.3. A physical layer circuitry (PHY) claim 1 , comprising:N signal pads including at least six signal pads;a six-signal physical medium attachment sublayer (PMA) coupled to the six signal pads; andM shielding pads including at least at least a first shielding pad, a second shielding pad and a third shielding pad that are coupled to the six-signal PMA;wherein the first shielding pad is located between a second signal pad and a third signal pad of the six signal pads; the second shielding pad is located between the third signal pad and a fourth signal pad of the six signal pads; the third shielding pad is located between the fourth signal pad and a fifth signal pad of the six ...

Power amplifier

A power amplifier may include: an amplification unit amplifying a power level of an input signal, a negative feedback circuit unit connected between an input terminal and an output terminal of the amplification unit and a linearization circuit unit connected between the negative feedback circuit unit and the input terminal of the amplification unit to predistort and linearize a signal from the negative feedback circuit unit, and to provide the signal to the input terminal of the amplification unit.

Non-Inverting Amplifier Circuits

Amplifier circuits comprising an input transistor, a load transistor, and a feedback resistor. In one example, one embodiment is directed to an amplifier circuit comprising an input transistor, a load transistor having a control terminal and a reference terminal, and a feedback transistor. The input transistor receives an input signal, the input transistor is electrically coupled to the load transistor and the feedback transistor, the control terminal of the load transistor is electrically coupled to a bias voltage, the feedback transistor is electrically coupled to the load transistor providing negative feedback, and the reference terminal of the load transistor serves as an output of the amplifier circuit. 2. The circuit of claim 1 , wherein the input transistor is a MOS transistor.3. The circuit of claim 2 , wherein the load transistor is a MOS transistor having a gate and a source claim 2 , the gate corresponding to the control terminal and the source corresponding to the reference terminal.4. The circuit of claim 3 , wherein the feedback transistor has a higher threshold voltage than the load transistor.5. The circuit of claim 1 , wherein the input transistor is a bipolar transistor.6. The circuit of claim 2 , wherein the load transistor is a bipolar transistor having a base and an emitter claim 2 , the base corresponding to the control terminal and the emitter corresponding to the reference terminal.7. The circuit of claim 1 , further including a current source electrically coupled to the input transistor claim 1 , the current source increasing the current through the input transistor.8. The circuit of claim 7 , wherein the input transistor is a MOS transistor.9. The circuit of claim 8 , wherein the load transistor is a MOS transistor having a gate and a source claim 8 , the gate corresponding to the control terminal and the source corresponding to the reference terminal.10. The circuit of claim 9 , wherein the feedback transistor has a higher threshold ...

Differential sensing circuit of a floating voltage source

An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.

CIRCUIT WITH VOLTAGE DROP ELEMENT

A circuit comprises: a circuit input; a circuit output; at least one passive feedback loop coupled between the circuit output and the circuit input; an active element, coupled in a feed-forward path of the circuit between the circuit input and the circuit output and configured to drive the at least one feedback loop in order to establish a function of the circuit, wherein the feed-forward path of the circuit comprises a second node (Vx) and a first node which are internal nodes of the active element and which are coupled between the circuit input and the circuit output, wherein the first node is configured to have a first voltage, the first voltage being a function of the circuit output, wherein the active element comprises a first voltage drop element coupled between the second node (Vx) and the first node. 1. A circuit , comprising:a circuit input;a circuit output;at least one passive feedback loop coupled between the circuit output and the circuit input; andan active element, coupled in a feed-forward path of the circuit between the circuit input and the circuit output and configured to drive the at least one feedback loop in order to establish a function of the circuit,wherein the feed-forward path of the circuit comprises a second node and a first node which are internal nodes of the active element and which are coupled between the circuit input and the circuit output, wherein the first node is configured to have a first voltage, the first voltage being a function of the circuit output,wherein the active element comprises a first voltage drop element coupled between the second node and the first node, andwherein the first voltage drop element is configured to decouple a DC level at the first node from a DC level at the second node and configured to provide the DC level at the first node independently from the DC level at the second node.2. The circuit of claim 1 ,wherein the first voltage drop element is adjustable and configured to provide an adjustable ...

CIRCUIT FOR DETECTING CURRENT FLOWING TO LOAD, USING SHUNT RESISTOR

A shunt resistor is connected in series to a load. A differential amplifier circuit are inputted a first voltage that is generated at one end of the shunt resistor and a second voltage that is generated at the other end of the shunt resistor. The differential amplifier circuit outputs a third voltage equivalent to a sum of a reference voltage and a voltage obtained by performing differential amplification on the first voltage and the second voltage. A conversion circuit outputs the voltage obtained by performing differential amplification on the first voltage and the second voltage by removing the reference voltage from the third voltage. The voltage is proportional to a load current. 1. A current detection apparatus comprising:a shunt resistor that is connected in series to a load;a differential amplifier circuit to which a first voltage that is generated at one end of the shunt resistor and a second voltage that is generated at the other end of the shunt resistor are input, and that performs differential amplification on the first voltage and the second voltage, and outputs a voltage correlated with a load current flowing to the load;a reference voltage source that generates a reference voltage; anda conversion circuit that is connected downstream of the differential amplifier circuit, and converts a level of a voltage that is output from the differential amplifier circuit,wherein the differential amplifier circuit includes a first operational amplifier that includes a negative power supply terminal to which the reference voltage is applied from the reference voltage source, and the differential amplifier circuit is configured to output a third voltage equivalent to a sum of the reference voltage and a voltage obtained by performing differential amplification on the first voltage and the second voltage, andthe conversion circuit is configured to output the voltage obtained by performing differential amplification on the first voltage and the second voltage, the ...

Apparatus for current measurement

A voltage to current converter is provided for use with a current measuring device, said current measuring device being operable to provide an output voltage which is an analogue of a current to be measured. The converter is arranged to provide an output current which is an analogue of the current to be measured. The converter comprises an electronic controller, a switching amplifier and means for measuring the output current as an analogue voltage and providing a measure of said analogue voltage to the electronic controller.

HIGH LINEARLY WIGIG BASEBAND AMPLIFIER WITH CHANNEL SELECT FILTER

A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations. 1. A circuit comprising:a Sallen-Key filter comprising a source follower that implements a unity-gain amplifier; anda programmable-gain amplifier coupled to the Sallen-Key filter, the circuit configured to provide programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier to decouple bandwidth of the circuit from its gain settings.2. The circuit recited in claim 1 , wherein the programmable-gain amplifier comprises a differential voltage-to-current converter claim 1 , a current mirror pair claim 1 , and programmable output gain stages.3. The circuit recited in claim 1 , configured to function as at least one of a low-pass filter claim 1 , a high-pass filter claim 1 , and a band-pass filter.4. The circuit recited in claim 1 , wherein the source follower comprises a first plurality of transistors arranged in a first circuit configuration claim 1 , and at least one branch within the programmable-gain amplifier comprises at least a second plurality of transistors arranged in at least a second circuit configuration claim 1 , the at least second circuit configuration identical to the first circuit configuration.5. The circuit recited in claim 4 , wherein the first and the at least second plurality of transistors have the same unit device sizes and current densities.6 ...

ENHANCING SPEAKER PROTECTION ACCURACY

Certain aspects of the present disclosure are generally directed to circuitry and techniques for current sensing. For example, certain aspects provide a circuit for signal amplification including a first amplifier, a second amplifier, and a third amplifier. The circuit also includes a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier, a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier, a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier, and a fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier. 1. A circuit for signal amplification , comprising:a first amplifier;a second amplifier;a third amplifier;a first capacitive element coupled between a first output of the first amplifier and a first input of the third amplifier;a second capacitive element coupled between a second output of the first amplifier and a second input of the third amplifier;a third capacitive element coupled between a first output of the second amplifier and the first input of the third amplifier; anda fourth capacitive element coupled between a second output of the second amplifier and the second input of the third amplifier.2. The circuit of claim 1 , further comprising:a first switch coupled between the first output of the first amplifier and the first capacitive element;a second switch coupled between the second output of the first amplifier and the second capacitive element;a third switch coupled between the first output of the second amplifier and the third capacitive element; anda fourth switch coupled between the second output of the second amplifier and the fourth capacitive element.3. The circuit of claim 2 , further comprising:a fifth switch coupled between the second output of the first amplifier and ...

CIRCUIT SYSTEM

A circuit system including an operational amplification circuit is disclosed. The operational amplification circuit includes N stages of operational amplification units that are cascaded, an input terminal of the 1stage of operational amplification unit is an input terminal of the operational amplification circuit, and an output terminal of the Nstage of operational amplification unit is an output terminal of the operational amplification circuit; an output terminal of the istage of operational amplification unit is connected to an input terminal of the (i+1)stage of operational amplification unit, so as to provide an input signal for the (i+1)stage of operational amplification unit; and there is a feedback channel from the output terminal of the Nstage of operational amplification unit to an input terminal of each of the 1stage of operational amplification unit to the Nstage of operational amplification unit. 1. A circuit system , comprising an operational amplification circuit , wherein{'sup': st', 'th, 'the operational amplification circuit comprises N stages of operational amplification units that are cascaded, each stage of operational amplification unit comprising an input terminal and an output terminal, the input terminal of a 1stage of operational amplification unit being an input terminal of the operational amplification circuit and being configured to receive an initial input signal, the output terminal of a Nstage of operational amplification unit being an output terminal of the operational amplification circuit, and N being greater than or equal to 2;'}{'sup': th', 'th', 'th, 'the output terminal of a istage of operational amplification unit is connected to the input terminal of the (i+1)stage of operational amplification unit, so as to provide an input signal for the (i+1)stage of operational amplification unit, wherein i is 1, 2, . . . , or N−1; and'}{'sup': th', 'st', 'th', 'th, 'there is a feedback channel from the output terminal of the Nstage of ...

Method of and Apparatus for Detecting Open Circuit Conditions at an Input to a Signal Chain and for Detecting Channel Imbalance in a Differential Signal Chain

It is often desirable to distinguish between an open circuit condition and a no signal condition. In both cases an input signal may be absent, but only one of these events represents a failure of the equipment. The present disclosure provides a way to use a difference amplifier to check for open circuit events, without requiring additional circuitry at the input of the amplifier. 1. A method of detecting channel imbalance in a circuit that comprises a differential signal processing circuit , the method comprises modulating a common mode voltage at signal nodes of the signal processing circuit that are distinct from input nodes of the differential signal processing circuit , and monitoring a differential voltage at the signal nodes for changes that are correlated with changes in the common mode voltage at the output.2. A method as claimed in claim 1 , further comprising using a relative change in magnitudes of the modulation of the common mode voltage at the output and the magnitude of the changes in the differential output to estimate the channel imbalance.3. A method as claimed in claim 1 , further comprising trimming or adjustment of components within the differential signal processing circuit to reduce the imbalance.4. A method as claimed in claim 1 , wherein the signal processing circuit comprises a difference amplifier and the signal nodes are differential outputs of the difference amplifier.5. A method of detecting degradation or failure of a signal path from a sensor to a differential amplifier claim 1 , the method comprising using the method of to identify channel imbalance above an acceptable threshold.6. A method as claimed in claim 5 , comprising providing secondary paths to a common node claim 5 , the secondary paths having deliberately different impedances claim 5 , such that in the event of disconnection of the sensor from sensor from one or both differential signal input nodes claim 5 , secondary paths introduce a common mode gain.7. A method as ...

Apparatus for Pole Frequency Tracking in Amplifiers and Associated Methods

An apparatus includes an amplifier. The amplifier has two inputs, and an output. The amplifier has a pole in its transfer function. The frequency of the pole depends on the output current of the amplifier. The amplifier further includes a pole frequency tracking (PFT) circuit. The PFT circuit includes a source follower circuit. 1. An apparatus , comprising an amplifier having first and second inputs and an output , the amplifier having a pole in a transfer function of the amplifier , wherein a frequency of the pole depends on an output current of the amplifier , the amplifier comprising a pole frequency tracking circuit comprising a source follower circuit.2. The apparatus according to claim 1 , wherein the pole comprises a dominant pole.3. The apparatus according to claim 1 , wherein the frequency of the pole depends on a load coupled to the output of the amplifier.4. The apparatus according to claim 1 , wherein the amplifier comprises a differential pair with an asymmetrical current mirror load.5. The apparatus according to claim 1 , wherein an output circuit of the amplifier comprises a first transistor claim 1 , and wherein the source follower comprises a second transistor to sense a gate voltage of the first transistor and to provide a feedback signal that depends on the output current of the amplifier.6. The apparatus according to claim 1 , wherein the amplifier comprises a first stage to receive signals applied to the first and second input of the amplifier claim 1 , a second stage to receive an output of the first stage and to provide an output signal to the third stage claim 1 , wherein the third stage provides the output signal of the amplifier.7. The apparatus according to claim 6 , wherein the second stage comprises the PFT circuit.8. The apparatus according to claim 1 , wherein the PFT circuit comprises a feedback circuit that causes a pole frequency at an internal node of the amplifier to follow the frequency of the pole whose frequency depends the ...

Amplifier circuit

An amplifier circuit is provided, which includes an input stage circuit, at least one impedance component and a current supply circuit, where the input stage circuit is coupled between at least one input terminal of the amplifier circuit and at least one output terminal of the amplifier circuit, the impedance component is coupled between a first reference voltage and the output terminal, and the current supply circuit is coupled between a second reference voltage and the output terminal. The input stage circuit is arranged to generate a signal current in response to an input signal on the input terminal, and the current supply circuit is arranged to provide at least one adjustment current. In addition, a common mode voltage level of an output signal on the output terminal is controlled by the adjustment current, to allow the amplifier circuit to perform low voltage operations.

TRANS IMPEDANCE AMPLIFIER CAPACITANCE ISOLATION STAGE

An electronic circuit for a micro-electro-mechanical systems gyroscope is disclosed. The electronic circuit includes a current buffer, a transimpedance amplifier coupled with the current buffer, and a plurality of transistors. An inverting input terminal of the current buffer and a non-inverting input terminal of the current buffer are connected with a plurality of first resistors. The inverting input terminal of the current buffer is connected with a source of one of the plurality of transistors, and the non-inverting input terminal of the current buffer is connected with a source of another one of the plurality of transistors. The plurality of first resistors are connected to a ground. The current buffer is configured to isolate a load in the micro-electro-mechanical systems gyroscope from the transimpedance amplifier. 1. An electronic circuit for a micro-electro-mechanical systems gyroscope comprising:a current buffer;a transimpedance amplifier coupled with the current buffer; anda plurality of transistors,wherein an inverting input terminal of the current buffer and a non-inverting input terminal of the current buffer are connected with a plurality of first resistors;wherein the inverting input terminal of the current buffer is connected with a source of one of the plurality of transistors, and the non-inverting input terminal of the current buffer is connected with a source of another one of the plurality of transistors,wherein the plurality of first resistors are connected to a ground,wherein the current buffer is configured to isolate a load in the micro-electro-mechanical systems gyroscope from the transimpedance amplifier.2. The electronic circuit according to claim 1 , wherein the inverting input terminal of the current buffer and the non-inverting input terminal of the current buffer are connected with a plurality of second resistors.3. The electronic circuit according to claim 1 , wherein an inverting input terminal of the transimpedance amplifier and a ...

Method and Device for Providing a Bias Voltage in Transceivers Operating in Time Division Multiplexing Operation

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver. 1. A device for generating a bias voltage for a transceiver operating in time division multiplexing operation , the device comprising:a bias voltage control loop configured to control the bias voltage; anda loop controller configured to deactivate the bias voltage control loop during transmission and reception of signals by the transceiver and to activate the bias voltage control loop in a delayed manner after a beginning of at least some guard intervals upon transition from reception of data to transmission of data and/or upon transition from transmission of data to reception of data.2. The device of claim 1 , wherein the bias voltage is a control voltage for a transistor of the transceiver claim 1 , and wherein the bias voltage control loop is configured to control the bias voltage based on a load current of the transistor and a reference current.3. The device of claim 2 , wherein the control voltage is a gate voltage and the load current is a drain current.4. The device of claim 2 , wherein the loop controller is configured to activate the bias voltage control loop outside reception of signals of the transceiver and to deactivate the bias voltage control loop during reception of signals and claim 2 , during reception of data claim 2 , to output a clamping voltage as the control voltage to the transistor and that puts the transistor into an off state.5. The device of claim 2 , wherein the bias voltage control loop comprises an analog-to-digital converter configured to digitize the load current claim 2 , a controller configured to set a digital value for the bias voltage claim 2 , and a digital-to-analog converter configured to convert the digital value of the bias voltage ...

Physical layer circuitry for multi-wire interface

The present invention provides pad arrangements, termination circuits, clock/data recovery circuits, and deserialization architecture for a physical layer circuitry including a four-signal or six-signal physical medium attachment sublayer (PMA).

Signal processing circuit and motor drive system

A signal processing circuit amplifies a signal of a magnetic sensor that changes according to the magnitude of a magnetic force. The signal of the magnetic sensor is a pair of signals inverted from each other with respect to a reference voltage. The signal processing circuit includes: a high-pass filter that performs a high-pass filtering process on the complementary signals from the magnetic sensor; a differential amplifier that receives the complementary signals having been subjected to the high-pass filtering process by the high-pass filter as a differential input signal and amplifies the differential input signal at a predetermined amplification factor based on the reference voltage; and a comparator that outputs a binary signal indicating a comparison result between an output signal of the differential amplifier and the reference voltage.

Tunable Filter for RF Circuits

A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system. 112-. (canceled)13. A tunable filter comprising:a first operational amplifier comprising a non-inverting input and an output thereof, anda second operational amplifier comprising a non-inverting input and an output thereof,the output of the first operational amplifier connected to the non-inverting input of the second operational amplifier at an output of the tunable filter;the output of the second operational amplifier connected to the non-inverting input of the first operational amplifier at an input of the tunable filter;wherein the output of the second operational amplifier is connected to a variable resistor circuit, the variable resistor circuit connected to the non-inverting input of the first operational amplifier.14. The tunable filter of claim 13 , wherein a change in resistance of the variable resistor is operable to result in an inverse change in frequency of a filter response of the tunable filter.15. The tunable filter of claim 13 , wherein the variable resistor circuit comprises a plurality of resistors coupled to a multi-port switch.16. The tunable filter of claim 13 , further comprising a tunable capacitor coupled in between the non-inverting input of the first operational amplifier and ground.17. The tunable filter of claim 16 , wherein the variable resistor circuit is connected in a series configuration with the non-inverting input of the first operational ...

Multistage amplifier

Provided is a multistage amplifier that can achieve both utilizing in a broad bandwidth and suppressing gain reduction. The multistage amplifier includes a plurality of differential amplifiers which are connected in series; and a direct-current component limiter that cuts off a direct-current component of input signals, in which the direct-current component limiter is disposed between the plurality of differential amplifiers, and in which a transistor size of a first differential amplifier which is disposed immediately after the direct-current component limiter is equal to or greater than a transistor size of a second differential amplifier which is disposed two stages before the direct-current component limiter.

Virtual resistive load in feedback loop driving a piezoelectric actuator

A virtual resistive load feedback circuit for driving a piezoelectric actuator is provided that accounts for a hysteresis error and drift within the movement of the actuator. The circuit may include a voltage divider and charge divider. A voltage monitor signal corresponding to a voltage of a driver signal and a current monitor signal corresponding to a current provided to the amplifier are combined by an operational amplifier and include electrical characteristics of the actuator such that the circuit approximates a virtual load across the actuator. A feedback portion of the operational amplifier may include a resistor and capacitor connected in parallel to provide the voltage and charge divide functions. The use of the virtual resistive circuit allows for the piezoelectric actuator to be ground referenced, with no external components connected directly to the actuator while gaining the feedback effect to counter the hysteresis and drifts errors of the actuator.

OPERATIONAL AMPLIFIER

An operational amplifier comprises transistors Q and Q forming an input stage, and input resistors R and R which form a filter together with parasitic capacitors C and C accompanying the transistors Q and Q. Resistance values R of the resistors R and R may be set to R=1/(2π·fc·C), where C is the capacitance value of each of the parasitic capacitors C and C, and fc is the target cutoff frequency of the filter. The operational amplifier may also include a power supply resistor R which forms a filter together with a parasitic capacitor C accompanying a power supply line. 1. An operational amplifier comprising:a transistor forming an input stage; andan input resistor forming a filter together with a parasitic capacitor of the transistor.2. The operational amplifier according to claim 1 , wherein a resistance value R of the input resistor is set based on a capacitance value C of the parasitic capacitor and a target cutoff frequency fc of the filter such that R=1/(2π·fc·C).3. The operational amplifier according to claim 2 , further comprising a power supply resistor which forms a filter together with a parasitic capacitor of a power supply line.4. A semiconductor device comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the operational amplifier according to ;'}a reference current setting portion configured to set a reference current of the operational amplifier;a power supply line laid between a power supply terminal and each of the operational amplifier and the reference current setting portion;a ground line laid between a ground terminal and each of the operational amplifier and the reference current setting portion; anda reference current setting line laid between the operational amplifier and the reference current setting portion.5. The semiconductor device according to claim 4 , further comprising a capacitor connected between the power supply line and the reference current setting line.6. The semiconductor device according to claim 5 , wherein the ...

Magnetic coupler device and magnetically coupled isolator

Low-current amplifier

This invention discloses a low noise, high-gain, low-current amplifier suitable for an integrated circuit. Transistors such as FETs are used as amplifier components. In a basic amplifier using the transistors, a differential pair are constituted of first and second transistors, first and second resistors connected to the collectors of the first and second transistors, respectively, and a constant current source connected to a common emitter of the first and second transistors. The amplifier further includes a third transistor having the emitter thereof connected to the junction of the first and second resistors, a capacitor connected between the junction of the first transistor and the first resistor of the junction of the second transistor and the second resistor and the base of the third transistor, and a power supply connected to the collector of the third transistor. The amplifier produces the output from the emitter of the third transistor.

頻率鍵移讀取電路

Mixer having high linearity and programmable gain and related transconductor

本发明公开了一种具有高线性度与可程序增益的混频器及其相关转导电路，可以减少功耗与芯片面积。该混频器包含负载电路、开关电路及转导电路。开关电路具有第一、二电流路径且其与负载电路的耦接处为该混频器的输出端。转导电路包含第一及第二电阻、差动放大器、第一及第二回授电路以及第一、二晶体管。差动电压信号分别经由第一、二电阻输入到差动放大器的第一、二输入端。第一、二回授电路分别设置于差动放大器的第一、二输入端之间。第一、二晶体管的漏极分别耦接于第一、二电流路径，栅极分别耦接差动放大器的第一、二输出端，该第一、二端输出的信号分别用以控制流经第一、二晶体管的第一、二电流，该第一、二电流决定一差动电流。

Magnetic resonance wireless power transmitting apparatus for tuning resonance frequency

공진 주파수 조정이 가능한 자기공명 무선 전력 전송장치가 개시된다. 본 발명의 일 실시 예에 따른 무선 전력 전송장치는 구동 주파수 신호를 이용하여 무선 전력신호를 증폭하는 전력 증폭기와, 공진 탱크를 구성하고 공진 탱크의 공진 주파수를 이용하여 전력 증폭기에서 출력된 무선 전력신호를 자기공명을 통해 무선 송신하는 공진기와, 공진기에 인가된 주파수 또는 공진기에서 발생한 주파수 신호를 이용하여 듀티 비를 제어하여 공진기의 공진 주파수를 조정하는 공진 제어부를 포함한다. Disclosed is a magnetic resonance wireless power transmission apparatus capable of adjusting a resonance frequency. A wireless power transmission apparatus according to an exemplary embodiment of the present invention includes a power amplifier for amplifying a wireless power signal using a driving frequency signal and a power amplifier for generating a wireless power signal output from the power amplifier using the resonance frequency of the resonance tank, And a resonance control unit for controlling a duty ratio of the resonance frequency by using a frequency signal generated by a resonator or a frequency signal applied to the resonator, thereby adjusting a resonance frequency of the resonator.

matrix power amplifier

一种功率放大器包括通过将多个有源单元的主端子串联堆叠而形成的N×M个有源单元的二维矩阵。堆叠体被并联耦合以形成所述二维矩阵。所述功率放大器包括一个驱动器结构，用以协调所述有源单元的驱动，以使得所述二维矩阵的有效输出功率约是所述有源单元中的每个的输出功率的N×M倍。

Magnetic coupler element and magnetic coupling type isolator

一种磁耦合元件以及磁耦合型隔离器。磁耦合元件(2)具有：磁场产生电路，其具有根据输入电流而产生磁场的励磁线圈(7a、7b)；具有两个输出(12a、12b)的检测桥式电路，其具有通过施加由磁场产生电路产生的磁场而使电阻值变化的至少一对磁阻效应元件(9a、9b)，所述两个输出生成对应于磁场产生电路产生的磁场强度的电压差，通过将所述磁耦合元件(2)的磁场产生电路以及检测桥式电路的几何形状分别线对称或点对称地形成，在高频也可得到高的S/N比。

Control circuit, power conditioner provided with the control circuit, and solar generation system

[과제] 태양광 발전 시스템의 파워 컨디셔너를 보다 고정밀도로 동작 가능하게 한다. [해결 수단] 초퍼 회로(5)와, 초퍼 회로에 병렬 접속된 콘덴서(18)와, 초퍼 회로 내의 스위치 소자(10, 11)의 ON/OFF를 제어하여 상기 콘덴서의 충방전을 제어하는 제어 회로(9)를 포함하고, 제어 회로(9)는, 콘덴서(18)의 양단 사이 전압을 계측하는 계측 회로부(9a)와, 계측 회로부(9a)의 계측 출력으로부터 소정의 제어 동작을 행하는 제어 회로부(9b)를 포함하고, 계측 회로부(9a)는, 콘덴서(18)의 양단 사이 전압을 차동 증폭하는 차동 증폭 회로(9a2)를 포함하고, 제어 회로부(9b)는, 차동 증폭 회로(9a2) 출력중의 동상 성분을 동상 오차로서 교정함과 함께, 교정한 차동 증폭 회로(9a2) 출력에 의해 제어를 행한다. [assignment] It enables the power conditioner of the photovoltaic system to operate with higher precision. [Solution] A chopper circuit 5, a capacitor 18 connected in parallel to the chopper circuit, and a control circuit 9 for controlling the charge / discharge of the capacitor by controlling ON / OFF of the switch elements 10, 11 in the chopper circuit. The control circuit 9 includes a measurement circuit section 9a for measuring the voltage between both ends of the capacitor 18 and a control circuit section 9b for performing a predetermined control operation from the measurement output of the measurement circuit section 9a. In addition, the measurement circuit unit 9a includes a differential amplifier circuit 9a2 for differentially amplifying the voltage between the both ends of the capacitor 18, and the control circuit unit 9b controls the in-phase component in the output of the differential amplifier circuit 9a2. While correcting as an in-phase error, control is performed by the corrected differential amplifier circuit 9a2 output.

Amplifier circuit for recovering common mode feedback failure

공통 모드 피드백의 비정상 동작을 회복시키기 위한 아날로그 증폭기에 있어서, 아날로그 가변 증폭기는, 제1 입력전압 및 제2 입력전압 크기에 따라 제1 바이어스 전류를 증폭하는 제1 입력 트랜지터 및 상기 제2 입력 트랜지스터와, 상기 증폭된 제1 바이어스 전류를 출력하는 제1 출력 트랜지스터 및 제2 출력 트랜지스터와, 상기 제1 출력 트랜지스터의 출력전압을 입력으로 하여 증폭하는 제3 트랜지스터와 제4 트랜지스터와, 상기 제1 출력 트랜지스터와 상기 제3 트랜지스터 사이 소정의 전류를 제공하는 제1 전류원과, 상기 제2 출력 트랜지스터의 출력전압을 입력으로 하여 증폭하는 제5 트랜지스터와 제6 트랜지스터와, 상기 제2 출력 트랜지스터와 상기 제5 트랜지스터 사이 소정의 전류를 제공하는 제2 전류원을 포함한다. An analog amplifier for recovering from abnormal operation of common mode feedback, the analog variable amplifier comprising: a first input transistor for amplifying a first bias current according to a first input voltage and a second input voltage magnitude; A first transistor having a first output transistor and a second output transistor for outputting the amplified first bias current, a third transistor and a fourth transistor for amplifying the output voltage of the first output transistor as an input, A first current source for providing a predetermined current between the transistor and the third transistor, a fifth transistor and a sixth transistor for receiving and amplifying an output voltage of the second output transistor, And a second current source providing a predetermined current between the transistors.

A configurable LNA with inductive degeneration or with an impedance-matching stage in parallel with the principal gain stage

A configurable LNA with inductive degeneration or with an impedance-matching stage in parallel with the principal gain stage A low noise amplifier may be configured with inductive degeneration (figure 8) or with an impedance-matching amplifier stage XMATCH coupled in parallel with the input of the principal LNA gain stage M2 (figure 6). The matching stage is compensated against process, aging, and temperature variations by feedback amplifier X1 acting on M3 to stabilize the voltage on the node between M1 and M3. A common bias voltage for devices M1 and M2 is provided internally through Rfb. No input coupling capacitor or bias resistor is required, which reduces the circuit size and noise factor. The output of the matching stage, coupled through M4, may augment the output of the main input transistor M2. The LNA may possess a single-ended or differential structure. The LNA is compact, inexpensive, consumes little power, has no external bias components, is suitable for high volume manufacture, and requires no external matching components Lextp, Lextm when the impedance-matching stage XMATCH is used.

High dynamic range probe using polar null cancellation

一种使用极零相消的高动态范围探头。本申请涉及一种示波器探头，所述示波器探头包括尖端网络、低损耗信号线缆(202)和端接组件。

Seismic hydrophone signal processor - has charge coupled amplifier which suppresses stray signal pick up and stray capacity fluctuations

The seismic signal system is used for the detection of signals in the form of acoustic pressure waves, which are sensed by a capacitive sensor and fed via an unearthed twisted pair cable to a signal processing unit. The output is connected to a differential amplifier of charge coupled type by which the variable electrical charge at the transducer output is converted to an output voltage. The amplifier includes a stage in the form of an operational amplifier with the output fed back to the inverting input through a feedback chain containing a resistance and condenser in parallel so that the output signal is independent of variations in the stray shunt capacity across the input.

Power amplification device and method

本公开的各种实施例涉及一种功率放大设备和方法，其中所述功率放大设备可以包括：功率放大器；开关模式转换器，用于控制所述功率放大器的偏置电压；比较器，用于根据包络信号向所述开关模式转换器提供开关信号；以及控制单元，用于确定在特定频带内是否包括开关模式转换器的开关频率，并且如果在所述特定频带内包括所述开关模式转换器的开关频率，则向所述开关频率施加偏移以偏离所述特定频带。可以执行各种其他实施例。

CIRCUIT AND METHOD FOR CONTROLLING AN AUDIO AMPLIFIER

L'invention concerne un circuit amplificateur audio comprenant : un amplificateur audio (308) adapté à fonctionner à un niveau de tension de mode commun (VCM) et comportant un noeud d'entrée pour recevoir un signal audio (y[n], VIN) et une sortie (310) pouvant être couplée à une charge (104) par l'intermédiaire d'un condensateur de couplage (112) ; et un circuit d'entrée (301) adapté à détecter des niveaux d'amplitude d'un signal audio d'entrée (x[n], x(t)) et à générer un signal de compensation de mode commun variable (CM_COMP[n], VCM COMP) sur la base des niveaux d'amplitude détectés, et à ajouter le signal de compensation de mode commun variable (CM_COMP[n], VCM_COMP) à une version retardée (x'[n], x'(t)) du signal audio d'entrée (x[n]) pour générer le signal audio (y[n], VIN) avec un niveau de mode commun variable.

ANALOGUE AMPLIFICATION DEVICE, IN PARTICULAR FOR A LASER ANEMOMETER

Ce dispositif d'amplification analogique comporte - un premier étage (28) à transistor (36) base commune recevant le courant modulé d'entrée sur son émetteur, et le signal de sortie de ce premier étage correspond au signal du collecteur, - un deuxième étage (30) est formé par un amplificateur suiveur comportant un transistor (38) à montage collecteur ou drain commun, - un troisième étage (32) comporte un transistor (40) à montage émetteur commun, et - un quatrième étage (34) est un étage amplificateur avec des moyens permettant de réaliser, d'une part, une amplification et, d'autre part, une adaptation d'impédance. Application à un anémomètre laser à rétro-injection optique This analog amplification device comprises: a first common transistor stage (36) receiving the input modulated current on its emitter, and the output signal of this first stage corresponds to the collector signal; stage (30) is formed by a follower amplifier having a common collector or drain transistor (38), - a third stage (32) has a common emitter transistor (40), and - a fourth stage (34) is an amplifier stage with means for performing, on the one hand, an amplification and, on the other hand, an impedance matching. Application to an optical feedback laser anemometer

Matched integrated electronic components

一种可切换集成电子装置包括：在第一端口(22，24)和第二端口(16，18)之间串联耦接为一条链的至少三个元件(r 1 ...r 14 ，s 1 ...s 14 )，并且包括在所述链的连续元件(r 1 ...r 14 ，s 1 ...s 14 )之间的节点。存在开关装置(30，50)，用于将所述节点中可选择的一个节点耦接到第三端口(12，14)。如果所述链中的连续元件(r 1 ...r 14 ，s 1 ...s 14 )被表示为r i ，i＝1至N，并且如果由元件占据的相邻位置被连续编号为1至N，则元件r i 对于i＝1至公式(BB)占据位置为公式(AA)，并且对于从公式(DD)至N占据位置为公式(CC)。

Fully integrated broadband RF voltage amplifier with enhanced voltage gain and method

RF voltage amplifier circuits which have high voltage amplifier gain and input signal frequency range, and a method for boosting the voltage amplifier gain and input signal frequency range in such circuits is provided. A method includes the steps of providing a voltage amplifier having a transistor with the grounded source and the drain connected to a power supply via a resistive load, and providing an integrated inductor for biasing the transistor, having an inductor connecting an input signal terminal to the gate of the transistor and a capacitor connecting the gate and the source of the transistor. The next step includes selecting a resonant frequency of the integrated inductor at a frequency where the voltage amplifier gain is starting to roll-off, for boosting the voltage amplifier gain and the input signal frequency range. The integrated inductor preferably operates at a resonant frequency approximately matching the roll-off frequency of the voltage amplifier. In another embodiment the voltage amplifier has a common emitter (CE) gain stage, a common base (CB) cascade stage directly-coupled to the CE gain stage, and a constant current mirror source. The integrated inductor has two inductors, each connected to one input of the amplifier input signal pair and a capacitor connecting the inductors. This circuit can be adapted for fully differential operation mode or for single ended operation mode.

Linear capacitance measurement and touchless switch

Capacitance measurement apparatus that enhances the sensitivity and accuracy of capacitive transducers, proximity sensors, and touchless switches. Each of two capacitors (C1, C2) under measurement has one end connected to ground and is kept at substantially the same voltage potential by operational amplifier (A1) or amplifiers (A0, A1) using negative feedback . The apparatus is driven by a periodic e.g. sinusoidal signal source (G1) or sources (G1, G2) and includes a difference amplifier (A2) operative to produce an electrical signal having a linear relationship with a specified arithmetic function of the capacitances of the two capacitors (C1, C2). A touchless switch is implemented using the capacitance measurement apparatus. The touchless switch includes two sensor electrodes (E1, E2) that correspond to the two capacitors (C1, C2) under measurement and in one embodiment has a front surface in the form of a container.

High-linearity signal-processing amplifier

A clamp-point active circuit is provided. The clamp-point active circuit includes a rate amplifier configured to receive an output from a device transitioning between at least two levels. The clamp-point active circuit has at least one switching device configured to receive an output from the rate amplifier. The at least one switching device is in at least one respective feedback loop of the rate amplifier. A switching of the at least one switching device causes the rate amplifier to amplify with high linearity in a desired operating range and to clamp outputs received from the transitioning device that are outside the desired operating range to a fixed level.

High dynamic range probe using pole-zero cancellation

An oscilloscope probe includes a tip network, a low-loss signal cable, and a terminating assembly. The tip network is connected to the signal cable and is configured to electrically connect to a device under test via a tip network node. The terminating assembly includes an amplifier, a feedback network and a terminating attenuator. The amplifier has an inverting input, a non-inverting input connected to ground, and an amplifier output configured to connect to an oscilloscope input. The feedback network is connected between the inverting input and the amplifier output. The terminating attenuator includes a first loop circuit and a second loop circuit. The first loop circuit is provided between the signal cable and the inverting input of the amplifier. The second loop circuit is provided between the signal cable, and ground. Resistance of terminating resistors in the loop circuits are selected to match characteristic impedance of the signal cable.

Apparatus for Current Measurement

피측정 전류의 아날로그인 출력 전압을 제공하도록 작동할 수 있는 전류 계측 장치에 사용하기 적합한 전압-전류 컨버터가 제공된다. 이 컨버터는 피측정 전류의 아날로그인 출력 전류를 제공하도록 구성된다. 컨버터는 전자 제어기, 스위칭 증폭기 및 출력 전류를 아날로그 전압으로서 측정하고 전자 제어기에 상기 아날로그 전압의 측정값을 제공하는 수단을 갖추고 있다. A voltage-to-current converter suitable for use in a current measuring apparatus capable of operating to provide an output voltage that is analog of the measured current is provided. The converter is configured to provide an output current that is analog of the measured current. The converter is equipped with an electronic controller, a switching amplifier and means for measuring the output current as an analog voltage and providing the electronic controller with a measurement of the analog voltage.

Amplitude control circuit, polar modulation transmission circuit, and polar modulation method

A reference voltage adjustment unit ( 212 ) calculates gain from a DA converter ( 121 ) to an offset calculating unit ( 123 ) by detecting the output of the offset calculating unit ( 123 ), adjusts the reference voltage (V 3 ) from a reference voltage generation unit ( 211 ) so that the value becomes a predetermined value, and feeds the post-adjustment reference voltage (V 4 ) to the DA converter ( 121 ) and offset calculating unit ( 123 ). Due to this, the gain from the DA converter ( 121 ) to the offset calculating unit ( 123 ) can be corrected. Fluctuation in the lower limit level of the output of a differential-to-single conversion unit ( 124 ) can be minimized as a result, so, the addition of unnecessary offset to the amplitude data at the amplifier unit ( 140 ) can be minimized. Thus, deterioration in modulation characteristics when the amplitude control unit ( 210 ) takes a differential circuit configuration can be minimized.

Amplifier circuit

An amplifier circuit whose frequency response has almost no soft knee characteristic or no peak when inverting input capacitance Csin varies and when feedback capacitance Cf is a fixed value of small capacitance is provided. The amplifier circuit includes a plurality of amplifiers (U1, U2, U3) each of which negative feedback is provided to and which are connected in series, and a feedback circuit (4, 6, 8, 10, 12) which is connected to an output side of an amplifier near output (U2, U3) of the amplifier circuit and an input side of an amplifier near input (U1, Q1) of the amplifier circuit. These amplifiers are ones in the plurality of amplifiers. One or odd numbers of amplifiers in the plurality of amplifiers are inverting amplifiers.

A micro cmos power amplifier

The present invention relates to a micro CMOS power amplifier in which an output transformer is provided on a multi-layered substrate and overlaps with an amplification circuit module. The micro CMOS power amplifier comprises: an amplification circuit module chip configured to modularize a circuit for amplifying power; and an output transformer configured to output the output of the amplification circuit module chip to outside through transformer circuitry, wherein the output transformer is provided on a multi-layered substrate, and the amplification circuit module chip and the output transformer overlap with each other. By the micro CMOS power amplifier, a conventional output transformer occupying much room in the power amplifier is provided on the multi-layered substrate, thereby reducing the size of the chip to less than 50% without lowering the output of the power amplifier.

Preamplifier circuit and method for a disk drive device

An amplifying circuit and method are disclosed for amplifying electrical signals, such as electrical signals generated by the read head of a disk drive. The circuit includes a pair of cross-coupled differential amplifier circuits. Each differential amplifier circuit is asymmetric, including two input transistors of different transistor types. For instance, a first of the two input transistors of each differential amplifier circuit may be a bipolar transistor and a second of the two input transistors may be a field effect transistor. By utilizing asymmetric differential amplifier circuits, a relatively wider operating frequency range is obtained.

Correcting for non-linearity in an amplifier providing a differential output

A fully differential amplifier includes a first feedback resistance, a second feedback resistance, a first input resistance and a second input resistance. A first ratio of the first feedback resistance to the first input resistance is equalized with that of a reference ratio of a pair of reference resistances. Similarly a second ratio of the second feedback resistance to the second input resistance is also equalized with that of the reference ratio. Such equalization operations may be performed during a calibration phase prior to normal operation of the fully differential amplifier. Accordingly, when a common mode voltage present on each of the first output terminal and the second output terminal varies during normal operation, contribution of an erroneous differential signal component across the pair of differential output terminals is prevented.

Mixer having high linearity and programmable gain and related transconductor

本发明公开了一种具有高线性度与可程序增益的混频器及其相关转导电路，可以减少功耗与芯片面积。该混频器包含负载电路、开关电路及转导电路。开关电路具有第一、二电流路径且其与负载电路的耦接处为该混频器的输出端。转导电路包含第一及第二电阻、差动放大器、第一及第二回授电路以及第一、二晶体管。差动电压信号分别经由第一、二电阻输入到差动放大器的第一、二输入端。第一、二回授电路分别设置于差动放大器的第一、二输入端之间。第一、二晶体管的漏极分别耦接于第一、二电流路径，栅极分别耦接差动放大器的第一、二输出端，该第一、二端输出的信号分别用以控制流经第一、二晶体管的第一、二电流，该第一、二电流决定一差动电流。

Variable gain amplifier and wireless communication apparatus including the same

Disclosed is a variable gain amplifier. The variable gain amplifier includes a gain control unit to transmit input differential signals as they are when it operates in a high gain mode, and to transmit the signals by way of predetermined impedances when operating in a low gain mode, and an amplification unit to amplify the input differential signals output from the gain control unit.

Programmable amplifier circuit

本发明公开了可编程的放大器电路，其中一种可编程的放大器电路，可包括：放大器；输入电容器，耦接于所述放大器的输入端，用于接收输入信号；反馈电容器，耦接于所述放大器的输入端和所述放大器的输出端；电压缩放电路，耦接于所述放大器的输入端和所述放大器的输出端之间，用于模拟反馈电阻器元件来减小所述放大器的所述输出端产生的信号的电压幅度，以产生反馈信号至所述放大器的所述输入端。本发明实施例可提供大的或者较大的反馈电阻。

Signal processing circuit and motor drive system

本发明涉及信号处理电路、电动机的驱动系统。本发明将除去因外部磁场而产生的磁传感器的输出电压的偏移。所公开的实施方式的信号处理电路是放大根据磁力的大小而变化的磁传感器的信号的电路。磁传感器的信号是相对于基准电压相互反转的一对信号即互补信号。该信号处理电路具备：对来自磁传感器的互补信号实施高通滤波处理的高通滤波器、将通过高通滤波器实施了高通滤波处理的互补信号作为差动输入信号并以基准电压为基准通过预定的放大率放大差动输入信号的差动放大器、以及输出表示差动放大器的输出信号与基准电压的比较结果的二值的信号的比较器。

Signal level shift circuit, measuring physical and electronics

信号电平转换电路、物理量检测装置以及电子设备。本发明提供可转换第1输入信号的信号电平而不会放大叠加在第2输入信号中的噪声的信号电平转换电路、使用该信号电平转换电路的物理量检测装置以及电子设备。信号电平转换电路(1)包括：第1差动放大电路(10)和第2差动放大电路(20)。第1差动放大电路(10)将第1输入信号与第2输入信号间的电位差变为G1倍并输出。第2差动放大电路(20)将第1差动放大电路(10)的输出信号与第2输入信号间的电位差变为G2倍并输出。这两个增益G1和G2满足G1×G2＜0且0＜-(G1+1)×G2＜2的关系。

Differential amplifier

Improvements in amplifier circuits

1,144,808. Transistor amplifying circuits. INTERNATIONAL BUSINESS MACHINES CORP. 22 Sept., 1966 [6 Oct., 1965], No. 42279/66. Heading H3T. A transistor amplifier comprises a first differential stage, - as shown comprising transistors T 1 with common emitter circuit resistor R 1 , the input being applied to one transistor over resistor RIN. The output is taken from the collector circuit of the other transistor and applied to the base of a second stage, transistor T 2 which has negative feedback between collector and base, provided by resistor R 2 and a rolloff network C 2 , Ra. The collector of transistor T 2 is coupled to the emitter of a third stage, comprising transistor T 3 in common base connection, which in turn drives an emitter follower output stage : this comprises transistor T 4 with the base and collector of transistor T 5 connected to its collector and emitter respectively. Overall negative feedback is provided by resistor RF. A second roll-off circuit is also provided; this may comprise a series R, C circuit across resistor R 4 (Fig. 1, not shown), or inductances L 1 , L 2 in the emitter circuits of the stage T 1 , together with resistor R 8 . Series connected inductors L 1 , La and L 2 , Lb of respectively large and small value are used to increase the effective resonance frequency. The arrangement is more particularly intended to provide an amplifier which is insensitive to changes in power supply, and the Specification gives a relationship between the resistors which should hold if this is to occur.

CIRCUIT OF EXCITATION FOR A RESOLVEUR

Circuit d'excitation (14) pour un résolveur, comprenant deux amplificateurs inverseurs (30-A, 30-B) montés en série, chacun des deux amplificateurs inverseurs comprenant une sortie (32-A, 32-B) destinée chacune à être reliée à une des deux extrémités (16-A, 16-B) d'un enroulement primaire (16) du résolveur. An excitation circuit (14) for a resolver, comprising two inverter amplifiers (30-A, 30-B) connected in series, each of the two inverting amplifiers comprising an output (32-A, 32-B) each intended to be connected at one of the two ends (16-A, 16-B) of a primary winding (16) of the resolver.

Method and apparatus for accurately measuring currents using on-chip sense resistors

本发明涉及使用单片检测电阻器准确地测量电流的方法和装置。揭示了用于管理单片检测电阻器的工艺和温度变化的系统和方法。该系统包括一种可以利用线性gm电路提供线性增益(正的增益和/或负的增益)的电路。这种电路的线性度能够补偿整个电流范围内(从正的到负的)的温度和工艺变化。通过使用线性gm放大器和复制电阻器，产生控制信号，复制电阻器大致相似于单片电阻器。控制信号被用于控制补偿电路内的全异线性gm放大器的增益，该补偿电路提供偏移电压以补偿单片电阻器的电阻变化。

AMPLIFIER CIRCUIT, SYSTEM AND CORRESPONDING EQUIPMENT

Operational amplifier in which the idle current of its output push-pull transistors is substantially zero

A high slew rate operational amplifier circuit of which the through current of its push-pull transistors is substantially zero is disclosed. The operational amplifier circuit preferably comprises an amplifier portion and a push-pull output amplifier including NPN and PNP output transistors. The output of the amplifier portion is transferred to the NPN output transistors base through a PNP driving transistor and to the PNP output transistors base through an NPN driving transistor. The emitters of the driving transistors are connected to respective power supply conductors through respective current sources. The through current reduction is achieved by resistors inserted between the current sources and the corresponding power supply conductors, an NPN transistor so connected with the NPN output transistor as to constitute a current mirror and a PNP transistor so connected with the PNP output transistor as to constitute another current mirror.

Zero drift, limitless and adjustable reference voltage generation

A circuit for generation of a reference voltage for an electronic system, which circuit comprises at least one digital buffer (U 21 , U 31 , U 32 , U 41 , U 51 ), a low pass filter (R 21 , C 21 ; R 31 , C 31 ; R 41 , C 41 ; R 51 , C 51 ) and an operational amplifier (OA 21 , OA 31 , OA 41 , OA 51 )), which circuit is adapted to revive an input in the form of a bandgap reference voltage into the digital buffer, which digital buffer is adapted to receive a digital input from a Pulse Width Modulated (PWM) signal, which digital buffer is adapted to generate an output signal adapted to be fed to the low pass filter, which output signal after filtration is adapted to be fed to a positive input terminal of the operational amplifier, which operational amplifier comprises a feedback circuit, which feedback circuit comprises at least one capacitor (C 22 , C 32 , C 44 , C 54 ) adapted to be connected from an output terminal of the operational amplifier towards a negative input terminal of the operational amplifier so as to form an integrator, wherein the feedback circuit further comprises at least one chopped signal path (R 22 , S 21 ; R 33 , R 34 , S 32 ; R 33 , R 35 , C 35 , S 31 ), which chopped signal is adapted to be modulated by the output signal of the digital buffer.

Amplifier

Differential amplifier, sample-and-hold circuit, and amplifier circuit

To provide a common-mode feedback circuit that feeds back signal corresponding to common-mode components of output terminal voltage of first and second amplifiers to input terminals of the first and second amplifiers via first and second passive elements connected to a common terminal, respectively.