ТВЕРДОТЕЛЬНОЕ УСТРОЙСТВО ЗАХВАТА ИЗОБРАЖЕНИЯ

Изобретение относится к твердотельному устройству захвата изображения (ТУЗИ) для использования в сканере, видеокамере, цифровом фотоаппарате и т.п. ТУЗИ содержит совокупность пиксельных модулей, каждый из которых включает в себя элемент фотоэлектрического преобразования, сигнальную линию, в которую считываются электрические сигналы из упомянутого множества пиксельных элементов, первый конденсаторный элемент, первый электрод которого подсоединен к сигнальной линии, усилитель, входной вывод которого подсоединен ко второму электроду первого конденсаторного элемента, и второй конденсаторный элемент, подсоединенный между входным выводом и выходным выводом усилителя. При этом значение емкости первого конденсаторного элемента меньше во время выполнения режима сложения, чем во время выполнения режима несложения, что позволяет делать коэффициент усиления усилителя меньше во время выполнения режима сложения, чем во время выполнения режима несложения. 5 з.п. ф-лы, 8 ил.

УСТРОЙСТВО СЪЕМКИ ИЗОБРАЖЕНИЙ И СИСТЕМА СЪЕМКИ ИЗОБРАЖЕНИЙ

Устройство съемки изображений выполняет операцию кадрового электронного затвора, в которой периоды экспонирования множества пикселов совпадают друг с другом. В первый период, в который элемент фотоэлектрического преобразования сохраняет заряд, по меньшей мере, одного из пикселов, сигналы на основе зарядов, сохраненных в элементах удерживания пикселов, последовательно выводятся в выходные линии. Во второй период после того, как завершается вывод сигналов из пикселов, элементы удерживания пикселов удерживают заряд. Технический результат – устранение искажений изображения. 6 н. и 24 з.п. ф-лы, 14 ил.

СПОСОБ И УСТРОЙСТВО ДЛЯ ФОРМИРОВАНИЯ ДАННЫХ, ПРЕДСТАВЛЯЮЩИХ СВЕТОВОЕ ПОЛЕ

Изобретение относится к формированию данных, представляющих световое поле. Технический результат - форматирование данных светового поля для обеспечения их компактного хранения и эффективной обработки. Способ для формирования данных, представляющих объем в объектном пространстве системы оптического обнаружения, занимаемом посредством набора лучей света, которые, по меньшей мере, один пиксел датчика упомянутой системы оптического обнаружения может считывать через зрачок упомянутой системы оптического обнаружения, причем упомянутый объем называется пиксельным пучком, содержит этапы: получение, из данных светового поля, захваченных посредством устройства оптического обнаружения, данных пересечения, задающих пересечения луча светового поля, представляющего пиксельный пучок с множеством данных опорных плоскостей, причем упомянутые опорные плоскости соответствуют различным глубинам в объектном пространстве; получение параметров диаграммы лучей, задающих графическое представление данных пересечения ...

СПОСОБ ВОЗБУЖДЕНИЯ ДЛЯ УСТРОЙСТВА ФИКСАЦИИ ИЗОБРАЖЕНИЙ И УСТРОЙСТВО ФИКСАЦИИ ИЗОБРАЖЕНИЙ

Группа изобретений относится к области фиксации изображений с помощью пиксельной матрицы с фотоэлектрическим преобразованием. Раскрыты устройство фиксации изображений и способы возбуждения для устройства фиксации изображений. Пиксельная часть устройства включает в себя множество строк первых пикселов и множество строк вторых пикселов, каждая из которых размещается таким образом, что она является смежной со строкой первых пикселов. Из строки первых пикселов и строки вторых пикселов, размещенных таким образом, что они являются смежными друг с другом, в течение по меньшей мере части периода от конца периода накопления электрического заряда в строке вторых пикселов до конца периода вывода, в котором выводятся сигналы из пикселов в строке первых пикселов, сбрасываются электрические заряды, накопленные в узлах фотоэлектрического преобразования пикселов в строке вторых пикселов. Строка первых пикселов включает в себя пиксел фиксации изображений, а строка вторых пикселов включает в себя пиксел ...

УСТРОЙСТВО ФОРМИРОВАНИЯ ИЗОБРАЖЕНИЯ И СИСТЕМА КАМЕРЫ

Изобретение относится к изобретение относится к устройствам формирования изображения. Техническим результатом является исключение обработки аналоговых сигналов, чтобы устранить шум в схеме, возникающий в AD преобразователе и при обработке аналоговых сигналов, без уменьшения числа диафрагмы пикселей. Результат достигается тем, что устройство формирования изображения включает в себя: блок матрицы пикселей, имеющий массив пикселей, каждый из которых имеет устройство фотоэлектрического преобразования и выводит электрический сигнал в соответствии с входным фотоном; блок чувствительной схемы, имеющий множество схем датчика, каждая из которых выполняет двоичный выбор, поступил ли входной фотон в пиксель в заданный период после приема электрического сигнала от него; и блок IC результата решения, который интегрирует результаты решения, полученные из чувствительных схем, пиксель за пикселем или для каждой группы пикселей, множество раз для генерирования отображаемых данных с градацией, причем блок ...

УСТРОЙСТВО СЪЕМКИ ИЗОБРАЖЕНИЙ И СИСТЕМА СЪЕМКИ ИЗОБРАЖЕНИЙ

... 1. Устройство съемки изображений, содержащее:множество пикселов, причем каждый пиксел включает в себя элемент фотоэлектрического преобразования, выполненный с возможностью формировать заряд в ответ на падающий свет и накапливать заряд, элемент удерживания, выполненный с возможностью удерживать заряд, элемент усиления, выполненный с возможностью выводить сигнал на основе заряда, первый переключатель переноса, выполненный с возможностью переносить заряд из элемента фотоэлектрического преобразования в элемент удерживания, и второй переключатель переноса, выполненный с возможностью переносить заряд из элемента удерживания в элемент усиления;выходную линию, в которую выводятся сигналы из множества пикселов,при этом:в первый момент времени элементы фотоэлектрического преобразования множества пикселов начинают накопление заряда,первый переключатель переноса, по меньшей мере, одного из множества пикселов поддерживается выключенным от первого момента времени до второго момента времени, и элемент ...

ДАТЧИК ИЗОБРАЖЕНИЯ, СИСТЕМЫ ФОРМИРОВАНИЯ ИЗОБРАЖЕНИЯ, ДАТЧИК И СПОСОБ РАБОТЫ ДАТЧИКА ИЗОБРАЖЕНИЯ

... 1. Датчик изображения, содержащий:матрицу пикселей, в которой множество пикселей размещены так, чтобы формировать множество строк и множество столбцов;модуль считывания, выполненный с возможностью считывать сигнал из матрицы пикселей; имодуль управления, выполненный с возможностью управлять модулем считывания,причем модуль считывания включает в себямодуль выбора строки, выполненный с возможностью выбирать строку в матрице пикселей,модуль выбора столбца, выполненный с возможностью выбирать столбец в матрице пикселей, имодуль вывода, выполненный с возможностью выводить сигнал из пикселя, для пикселей в строке, выбранной модулем выбора строки, который соответствует столбцу, выбранному модулем выбора столбца,причем матрица пикселей включает в себя множество блоков, отличающихся по расстоянию от модуля вывода, ипри этом модуль управления управляет периодами считывания, требуемыми модулю считывания для считывания сигналов из множества блоков, чтобы считывать сигналы из блоков в более длительные ...

УСТРОЙСТВО ФОТОЭЛЕКТРИЧЕСКОГО ПРЕОБРАЗОВАНИЯ, СПОСОБ ВОЗБУЖДЕНИЯ УСТРОЙСТВА ФОТОЭЛЕКТРИЧЕСКОГО ПРЕОБРАЗОВАНИЯ, СИСТЕМА ФОРМИРОВАНИЯ ИЗОБРАЖЕНИЯ И ПОДВИЖНЫЙ ОБЪЕКТ

Изобретение относится к устройству фотоэлектрического преобразования, способу возбуждения устройства фотоэлектрического преобразования, системе формирования изображения и подвижному объекту, такому как транспортное средство. Техническим результатом является предоставление устройства фотоэлектрического преобразования с подсчетом фотонов, имеющего улучшенную функцию фотоэлектрического преобразования на высокой яркости, что обеспечивает повышение точности информации расстояния, представляющей собой информацию о параллаксе, величине расфокусировки, расстоянии до объекта. Результат достигается тем, что устройство фотоэлектрического преобразования включает в себя множество пикселей, каждый из которых включает в себя модуль приема света, который выводит импульс в ответ на падение фотона, и блок формирования сигнала, который выводит сигнал на основе вывода из модуля приема света, и каждый из множества пикселей дополнительно включает в себя блок обнаружения, который обнаруживает, превышает ли или ...

ТВЕРДОТЕЛЬНОЕ УСТРОЙСТВО ФОРМИРОВАНИЯ ИЗОБРАЖЕНИЯ, СПОСОБ УПРАВЛЕНИЯ ТАКИМ УСТРОЙСТВОМ И СИСТЕМА КАМЕРЫ

... 1. Твердотельное устройство формирования изображения, содержащее: ! блок пикселей с множеством пикселей, расположенных в виде матрицы, для выполнения фотоэлектрического преобразования; ! модуль считывания пиксельных сигналов, включающий в себя блок аналогово-цифрового (АЦ) преобразования, который выполнен с возможностью считывания пиксельных сигналов из блока пикселей в линию сигнала в виде модуля из множества пикселей, и сравнения опорного сигнала, имеющего пилообразную форму, с пиксельными сигналами для выполнения АЦ преобразования; ! модуль фиксации, выполненный с возможностью фиксации линии сигнала напряжением фиксации так, что пиксельные сигналы удерживаются на уровне, равном или большем установленного напряжения; ! схему смещения коррекции, выполненную с возможностью генерирования напряжения фиксации в соответствии с подаваемым установленным значением напряжения фиксации и подачи напряжения фиксации в модуль фиксации; и ! модуль выбора смещения коррекции, выполненный с возможностью ...

УСТРОЙСТВО ЗАХВАТА ИЗОБРАЖЕНИЯ И СИСТЕМА ЗАХВАТА ИЗОБРАЖЕНИЯ

УСТРОЙСТВО РАДИАЦИОННОЙ ВИЗУАЛИЗАЦИИ И СПОСОБ РАДИАЦИОННОЙ ВИЗУАЛИЗАЦИИ

УСТРОЙСТВО ДАТЧИКА ИЗОБРАЖЕНИЯ, СПОСОБ УПРАВЛЕНИЯ И КОМПЛЕКСНОЕ УСТРОЙСТВО ДАТЧИКА ИЗОБРАЖЕНИЯ

... 1. Устройство датчика изображения, содержащее:блок выбора, предназначенный для выбора количества A/D-преобразователей, которые выводят пиксельный сигнал каждого пикселя; иблок управления, предназначенный для управления блоком выбора и заставляющий блок выбора выбирать количество A/D-преобразователей согласно запросу.2. Устройство датчика изображения по п.1, дополнительно содержащее:множество A/D-преобразователей для каждой столбца пиксельной матрицы,в котором блок выбора выполнен с возможностью выбора выходного назначения пиксельного сигнала из множества A/D-преобразователей, соответствующих столбцу.3. Устройство датчика изображения по п.2, в котором блок управления выполнен с возможностью управления блоком выбора, чтобы подключить каждый пиксель столбца к множеству A/D-преобразователей.4. Устройство датчика изображения по п.2,в котором блок управления выполнен с возможностью деления пикселей столбца на множество путей и управления блоком выбора, чтобы подключить пиксели каждого пути к ...

ТВЕРДОТЕЛЬНЫЙ ФОРМИРОВАТЕЛЬ СИГНАЛОВ ИЗОБРАЖЕНИЯ И СИСТЕМА ФОТОКАМЕРЫ

... 1. Твердотельный формирователь сигналов изображения, содержащий: ! блок растровых элементов, на котором в виде матрицы размещены множество схем растровых элементов со свойствами для преобразования оптического сигнала в электрический сигнал и накопления электрического сигнала в соответствии со временем экспозиции; ! блок возбуждения растровых элементов, имеющий возможность выполнения операции шторки в упомянутом блоке растровых элементов и операции считывания в соответствии с данными установки; и ! секцию интерфейса, выполненную с возможностью сохранения данных установки шторки и данных установки усиления, поданных извне, и управления тактированием для отражения установки шторки и установки усиления на, по меньшей мере, упомянутый блок возбуждения растровых элементов; ! при этом упомянутая секция интерфейса выполнена с возможностью отражения усиления на кадр, следующий на один кадр после установки. ! 2. Твердотельный формирователь сигналов изображения по п.1, в котором упомянутая секция ...

Photoelektrischer Umwandler, sein Steuerverfahren und System mit diesem photoelektrischen Umwandler

Festkörper-Bildaufnahmevorrichtung mit AD-Wandler

Festkörper-Bildaufnahmeeinrichtung mit steuerbarer Verstärkung

Festkörper-Bildaufnahmeeinrichtung mit steuerbarer Verstärkung

Festkörper-Bildgebungselement und Bildgebungsvorrichtung

Ein Festkörper-Bildgebungselement, das versehen ist mit: einem ersten Substrat, das einen photoelektrischen Umwandlungsabschnitt und einen Übertragungstransistor, der mit dem photoelektrischen Umwandlungsabschnitt elektrisch gekoppelt ist, aufweist; einem zweiten Substrat, das so angeordnet ist, dass es dem ersten Substrat zugewandt ist und einen Ausgangstransistor aufweist, der eine Gate-Elektrode, einen Kanalbereich eines ersten elektrischen Leitfähigkeitstyps, der so angeordnet ist, dass er der Gate-Elektrode zugewandt ist, und einen Source-Drain-Bereich des ersten elektrischen Leitfähigkeitstyps, der dem Kanalbereich benachbart ist, aufweist; und einer Ansteuerschaltung, an die eine in dem photoelektrischen Umwandlungsabschnitt erzeugte elektrische Signalladung über den Übertragungstransistor und den Ausgangstransistor ausgegeben wird.

Kamera mit elektronischem Schutz des Detektors

Auslesungskanal für aktiven Pixelsensor

Fotoelektrische Wandlervorrichtung und Abbildungssystem

Eine fotoelektrische Wandlervorrichtung enthält ein Bildelementarray mit einer Vielzahl von in einer Matrix angeordneten Bildelementen und eine Vielzahl von Signalverarbeitungseinheiten, die jeweils mit einer Spalte von Spalten des Bildelementarrays assoziiert sind und eine A/D-Wandlereinheit zur Umwandlung eines beruhend auf den Bildelementen erzeugten Signals in ein digitales Signal enthalten. Die fotoelektrische Wandlervorrichtung enthält ferner eine Vielzahl von Gruppen, die jeweils viele der Signalverarbeitungseinheiten aus der Vielzahl der Signalverarbeitungseinheiten und eine Blockausgabeeinheit zum Empfangen von Ausgaben der vielen Signalverarbeitungseinheiten enthalten, und eine Ansteuersignalübertragungseinheit zur Übertragung eines Ansteuersignals zur Ansteuerung einer Vielzahl der Blockausgabeeinheiten. Die Ansteuersignalübertragungseinheit führt einer der Blockausgabeeinheiten und einer anderen der Blockausgabeeinheiten das Ansteuersignal zu jeweils verschiedenen Zeiten zu.

Sensormatrix

Bilderfassungs- und Signalverarbeitungsschaltungen

Elektronisches Blitzgerät, elektronische Kamera mit Lichtausstrahler

Festkörper-Bildaufnahmevorrichtung

Dentales Röntgengerät und damit verwendetes Signalbearbeitungsverfahren

Amplification type solid states imaging device output circuit capable of stably operating at a low voltage

Analog-to-digital conversion

Image acquisition device, and imaging device

Imaging device, imaging system and moveable object

Imagers with high speed digital frame transfer and frame processing

Improved number of pixels in detector arrays using compressive sensing

Solid-state imaging apparatus and imaging system

Improvements in or relating to sensors

Multi-mode photodetector

Image pick-up apparatus capable of changing drive mode and image signal control method

Method and system for providing automatic gain control in an imaging device using signal combination and threshold comparison

A method for providing automatic gain control (AGC) in an image capture device comprises: accumulating a signal in response to light at each active pixel 114 in an image sensor during an exposure period; producing a comparison signal (504, Figure 5) in response to a combined signal of the accumulated signal at each active pixel; and comparing the (summed) comparison signal with a threshold signal to derive a shutter value for image capture, including measuring the time duration for the comparison signal to become equal to the threshold (506, Figure 5). Also independently claimed is a system for providing such automatic gain control having an integration circuit 104, threshold or reference signal comparator 106, and counter 108 for measuring the time for the comparison signal to equal the threshold signal.

High density row ram for column parallel CMOS image sensors

Improved sample and hold circuit

Photo detector comprising SPAD cell array

A photo-detector comprising an array of SPAD (Single Photon Avalanche Diode) cells (50, 50'), wherein each SPAD cell includes a SPAD circuit (2, figure 1) and a readout circuit (4, figure 1) that has an output node (26, figure 1) and is configured to deliver an electrical current to the output node when the SPAD circuit is activated by a photon. The output nodes 26,26' of a plurality of the SPAD cells 50, 50' are connected to at least one common output line 56 whereby the currents delivered to the output nodes of the activated SPAD cells are added together (aggregated) to provide an output current Iout. The magnitude of the output current represents the activation rate of the SPAD cells. The SPAD circuit may be connected to the readout circuit through a buffer device (16 figure 1). The readout circuit may include a constant current device (20 figure 1) and a switch such as a MOS transistor (Ms figure 1) configured to control delivery of constant current to the output node 26. The switch ...

Sampling circuit and amplification type solid-state imaging device employing the circuit

Imaging apparatus and imaging system

Back side illuminated imaging apparatus including a plurality of photo-sensitive imaging pixels and associated circuits and further comprising a semiconductor layer 108 disposed a substrate (404 fig 4B). The imaging apparatus (photo sensor) is laterally divided into a first (light receiving) portion 101, a second discharge portion 103 and optionally a middle third charge transfer portion 102. A single upper electrode S106 (or double contact (first/third upper electrode (106-1, 106-2 figure 18)) is defined on the illuminated surface and contacts the semiconductor layer 108 directly or via a hole blocking layer 107. On the lower surface, a charge sensing (second) electrode P 110 (node B) detects photon induced electron-hole charges created within semiconductor 108. This (node-B) is connected to transistor amplifier 118 and AC bias source 113 via capacitor 116. Lower electrodes 111 (transfer electrode) and 112 D discharge (fourth) electrode enable the discharge of the stored charge near the ...

Image sensor utilising analogue binning with ADC architecture

An image sensor comprising a pixel array in which each pixel column comprises at least two column bit-lines, a readout input circuit comprising a plurality of first inputs and a second input with each of the first inputs and the second input being connected via a capacitance to a single comparator input node and a readout comparator circuit connected to the single comparator input node. Each of the first inputs receives, in parallel, an analogue signal acquired from the output of one or more of the pixels via the column bit-line. The analogue signals vary during a pixel readout period and have a first level during a calibration period and a second level during a read period. The analogue signals at the first inputs and a reference signal from a time varying reference circuit on the second input are constantly read onto their respective capacitances during both the calibration period and the read period. The readout comparator circuit compares an average of the signals on each of the plurality ...

Image acquisition device, and imaging device

Image acquisition device, and imaging device

The invention relates to an imaging apparatus, 19, that may be used in an image acquisition system, 1, (such as a scanning or light sheet microscope) that scans an object, S, with an illumination light, 3. The imaging apparatus comprises a light receiving section, 19a, (such as a CMOS image sensor array) made up of a plurality of pixel rows (Figure 3, 19d), in which signal readout from the pixel rows is accomplished using a rolling (or continuous) readout method by means of an image control section, 19b. The interval of signal readout between adjacent pixel rows is set to synchronise the signal readout with the scanning with the illumination light. The frequency or count of a driving clock may be used to control the signal readout. The frequency of the driving clock may be set so as to synchronise the signal readout with scanning with the illumination light or the count of the driving clock may be used to define the period of the signal readout.

Image acquisition device, and imaging device

Image acquisition device, and imaging device

Analog-to-digital conversion

Imaging device, imaging system and movable object

Ofset cancellation in array image sensors

Image sensor

VIDEO BUS FOR FAST ILLUSTRATION DEVICES WITH SEVERAL DISSOLUTIONS AND PROCEDURES FOR IT

SOLID ILLUSTRATION DEVICE

VERFAHREN ZUR INSPEKTION VON BEWEGTEN OBJEKTEN

Die Erfindung betrifft ein Verfahren zur Inspektion von bewegten Objekten (7) mit einer Sensoreinheit (2) die eine Vielzahl von Fotodioden (21) sowie eine Vielzahl von Auswerteschaltungen (22) umfasst, wobei eine eindeutige Zuordnung zwischen den Fotodioden (21) und den Auswerteschaltungen (22) vorgegeben wird, wobei am Ausgang jeder der Fotodioden (21) ein Intensitätssignal anliegt, das der dieser Fotodiode (21) zugeordneten Auswerteschaltung (22) zugeführt wird, wobei jede Auswerteschaltung (22) bei Überschreitung eines vorgegebenen Schwellenwerts durch den zeitlichen Änderungswert der Intensität ein Adress-Event (11) abgibt.Erfindungsgemäß ist vorgesehen, dass in vorgegebenen zeitlichen Abständen, eine Folge von Zuordnungen zwischen den Fotodioden (21) und den Auswerteschaltungen (22) festgelegt wird, dass mittels jedes der von den Auswerteschaltungen (22) abgegebenen Adress-Events (11) ein Punkt (13) generiert wird, und- dass die Vielzahl der Punkte (13) zu auswertbaren Punktmengen ...

Solid-state camera

Apparatus for reading and processing image information

System and method for sub-column parallel digitizers for hybrid stacked image sensor using vertical interconnects

Embodiments of a hybrid imaging sensor and methods for pixel sub-column data are read from within a pixel array. The hybrid imaging sensor and methods optimize the pixel array area and use a stacking scheme for a hybrid image sensor with minimal vertical interconnects between substrates.

System and method for sub-column parallel digitizers for hybrid stacked image sensor using vertical interconnects

Embodiments of a hybrid imaging sensor and methods for pixel sub-column data are read from within a pixel array. The hybrid imaging sensor and methods optimize the pixel array area and use a stacking scheme for a hybrid image sensor with minimal vertical interconnects between substrates.

Image sensor ADC and CDS per column

A solid state imager converts analog pixel values to digital. A counter (16) coupled to an N-bit DAC (20) produces an analog ramp corresponding to the contents of the counter. A ripple counter (90, 92) is associated with each respective column. Column comparators (22) gate the counter elements when the analog ramp equals the pixel value. The counter contents feed a video output bus to produce the digital video signal. Additional black-level readout counters elements (26) can create and store a black level values for reduction of fixed pattern noise. Additional buffer counter/latches can be employed. Ripple counters can be configured as counters to capture the digital video level, and then as shift registers to clock out the video levels to an output bus. The clocks for the DAC counter and ripple counters can be at the same or different rates.

Improved imaging method and apparatus

A method of correcting errors in the output of an image detector is disclosed. The method comprises measuring an output signal (V ...

Apparatus for reading and processing image information

High-speed vision sensor

LOW NOISE IMAGING WITH ANALOG CLOCK

An apparatus and method for low noise imaging uses an image sensor, such as an EMCCD in which charges are accumulated and shifted out using analog clock signals. A sensor controller generates the clock signals from digital waveforms stored in memory units that provide outputs to digital-to-analog converters that, in turn, convert the signals to analog form. The analog signals are then amplified and applied to the sensor. The specific waveforms are determined by a digital signal processor and stored in the memories, and the desired waveforms are read out the memories using addressing provided by a field-programmable gate array. The clock signals may be sinusoids, or may be more complex waveform shapes, and the waveform shapes may be varied by a user. The clock signal rise times may be made gradual so as to minimize noise contributions.

LOW NOISE IMAGING WITH ANALOG CLOCK

An apparatus and method for low noise imaging uses an image sensor, such as an EMCCD in which charges are accumulated and shifted out using analog clock signals. A sensor controller generates the clock signals from digital waveforms stored in memory units that provide outputs to digital-to-analog converters that, in turn, convert the signals to analog form. The analog signals are then amplified and applied to the sensor. The specific waveforms are determined by a digital signal processor and stored in the memories, and the desired waveforms are read out the memories using addressing provided by a field-programmable gate array. The clock signals may be sinusoids, or may be more complex waveform shapes, and the waveform shapes may be varied by a user. The clock signal rise times may be made gradual so as to minimize noise contributions.

ACTIVE LINEAR SENSOR

A CMOS imager includes a photosensitive device such as a photodiode or photogate having a sense node coupled to an FET located adjacent to the photosensitive region. Another FET, forming a differential input pair of an operational amplifier is located outside of the array of pixels. The operational amplifier is configured for unity gain and a row or columm of input FETs is connected in parallel. A correlated double sampler is connected to the output of the operational amplifier for providing a fixed pattern noise free signal.

SYSTEM AND METHOD FOR DYNAMIC PIXEL MANAGEMENT OF A CROSS PIXEL INTERCONNECTED CMOS IMAGE SENSOR

A camera using a CMOS image sensor based on a shared pixel array technology avails both high definition (HD) and ultra-high definition (UHD) resolution mode formats. Dynamic pixel management allows for both sequential and binned timing formats of pixel signals using switched capacitor noise reduction techniques. When UHD resolution mode is selected, noise can be reduced using both digital double sampling (DDS) or differential digital double sampling (dDDS), and when HD resolution mode is selected noise can be reduced using DDS. Additionally, both rolling shutter and global shutter modes can be selected when HD resolution mode is selected.

METHOD FOR CONTROLLING AN ACTIVE PIXEL IMAGE SENSOR

The invention relates to an active pixel sensor including a photodiode PHD, a memory node MN and a reading node SN, the memory node being provided so as to contain the charges generated by the photodiode at the end of an integration period allowing integration in global shutter mode and reading with correlated double sampling, in which the charge storage capacity of the memory node is provided so to be at least N times higher than the charge storage capacity of the photodiode (N being an integer no lower than 2), and in which, in each integration and reading cycle, during the integration time Tint(i), it is provided for N charge transfers Tri1, Tri2, Tri3 from the photodiode towards the memory node to be carried out, the N transfers being evenly distributed over the integration time. The dynamics of the sensor improve in strong-light environments.

IMAGE SENSOR WITH CONTROL SIGNAL SEQUENCE GENERATION

The invention relates to the image sensors and more precisely to the preparation of control signals of the pixels and of the reading circuits. The sequencing circuit that produces said signals includes a programmable memory (MEM) containing binary words (M0, M1, M2, ...), where each word includes a set of multiple bits of rank 1 to N, and where the rank i of a bit in a word corresponds to the rank i of a respective control signal; a memory controller (CTRL_MEM) for extracting, from the memory and at a predetermined pace, the words located at consecutive addresses of the memory from a start address to an arrival address; and a circuit (GEN_TIMING) for generating control signals establishing each control signal of rank i based on the series of bits of respective rank I, extracted from the memory by the controller, the control signal reproducing the consecutive values taken by the bit of rank i at the pace of the clock.

ELECTRON MULTIPLYING IMAGE SENSOR AND PIXEL READING ARRANGED IN A GROUP

L'invention concerne les capteurs d'image permettant d'acquérir des images électroniques à très bas niveau de lumière. Le capteur d'image des pixels pouvant être lus individuellement ou par regroupement des charges de quatre pixels adjacents pour plus de sensibilité. Deux photodiodes d'une même colonne (PH21, PH22) peuvent transférer leurs charges dans une même grille de multiplication (GM1 ), les deux pixels de la colonne adjacente transférant leurs charges dans une deuxième grille de multiplication (GM2). Une phase de multiplication peut être effectuée par une alternance de potentiels en opposition de phase appliquée aux grilles de multiplication. Des structures de lecture associées chacune à une des grilles de multiplication permettent de lire les charges de chacune des quatre photodiodes ou les charges réunies des quatre photodiodes.

IMAGE SENSOR WITH DOUBLE CHARGE TRANSFER FOR LARGE DYNAMIC RANGE AND METHOD OF READING

The invention relates to image sensors with active pixels. To obtain a wide dynamic operating range, the pixels are read by performing a double charge integration, during periods of different values (Ti1, Ti2). The result of the first integration (period Ti1) is sampled (command SHS1) in a sampling capacitor, and the result of the second integration (period Ti2) is conditionally sampled (command SHS2) in the same capacitor. This second sampling depends on the observation of the potential of the column conductor after the integration of charges corresponding to the longer period; this potential is compared to a threshold. If the comparison indicates a risk of saturation, the information collected during the shorter period is collected and retained in the sampling capacitor in order for it to be multiplied by a coefficient representing the ratio between the longer period and the shorter period. If the comparison indicates that there is no risk of saturation, the information collected during ...

METHOD AND SYSTEM OF IMAGE CAPTURE BASED ON LOGARITHMIC CONVERSION

Image capture based on logarithmic conversion. At least some of the illustrative embodiments are methods including capturing an image by: reading a plurality of analog signals from an array of light sensitive elements; performing logarithmic analog-to-digital conversion on the plurality of analog signals which creates a corresponding plurality of digital values; and storing representations of the plurality of digital values to a storage medium.

CIRCUIT FOR SUPPRESSING THE DARK CURRENT IN A PHOTODETECTORS

L'invention concerne un photodétecteur comportant au moins une diode photosensible et au moins un circuit de lecture permettant de convertir les charges générées par effet photoélectrique dans ladite diode en une information de tension échantillonnée par un interrupteur (K), caractérisé en ce que ladite diode photosensible a une première borne reliée à la grille et au drain d'un premier transistor (T2) et une deuxième borne reliée à la source dudit premier transistor (T2) et à la masse dudit photodétecteur, en ce qu'un deuxième transistor (T3) de dimensions proportionnelles à celles dudit premier transistor (T2) est monté en miroir de courant dudit premier transistor (T2) et en ce qu'une capacité d'intégration (Ci) est reliée au drain dudit deuxième transistor de façon à recueillir à ses bornes ladite information de tension.

Which comprises an arrangement of sensors responsive to electromagnetic radiation.

La présente invention concerne un dispositif (10) comportant un ensemble de détecteurs sensibles à une radiation électromagnétique, notamment un capteur dimages notamment pour des applications endoscopiques ou des caméras de surveillance miniaturisées ce capteur comportant une matrice de points dimage agencée pour fournir une image dune zone explorée dont la forme correspond sensiblement à la géométrie de ladite matrice. Ce dispositif est constitué dune matrice (11) de cellules photodétectrices (12) structurée selon des lignes et des colonnes orthogonales entre elles qui a une forme polygonale dont le contour comporte au moins cinq cotés inscrits dans une ligne fermée, avec des bords orthogonaux et des bords obliques.

Which comprises an arrangement of sensors responsive to electromagnetic radiation and endoscope tube equipped with such a device.

La présente invention concerne un dispositif (10) comportant un ensemble de détecteurs sensibles à une radiation électromagnétique, notamment un capteur d’images notamment pour des applications endoscopiques ou des caméras de surveillance miniaturisées ce capteur comportant une matrice de points d’image agencée pour fournir une image d’une zone explorée dont la forme correspond sensiblement à la géométrie de ladite matrice. Ce dispositif est constitué d’une matrice (11) de cellules photodétectrices (12) structurée selon des lignes et des colonnes orthogonales entre elles qui a une forme polygonale dont le contour comporte au moins cinq côtés inscrits dans une ligne fermée, avec des bords orthogonaux et des bords obliques.

A method and apparatus for decoding information delivered by a light source

Image sensor

Image sensor and method for driving same

Image picking-up apparatus and control method thereof

The invention provides a picturing device and a control method thereof. An image sensor comprises a plurality of photoelectric conversion units arranged on the line direction and the row direction, atransfer capacitance storing signals read out from the (n-1)th line of a plurality of the photoelectric conversion units, a transfer capacitance storing signals read out from the nth line of a plurality of the photoelectric conversion units, and a system control CPU controlling the image sensor, wherein, n is an integer which is equal to or more than 2. During the period of reading out the signalsstored in the (n-1)th line of the transfer capacitance from the transfer capacitance, when the level of a predetermined drive pulse generated in the image sensor, the system control CPU processes tocontrol so as not to output the signals of the (n-1)th line from the transfer capacitance.

IMAGE SENSOR CONTROLLING GYROSCOPE SENSOR AND MOVING DEVICE INCLUDING SAME

Imaging device

Imaging device

In an imaging device, one end of a capacitive element is connected to a second input terminal to which a reference signal Ramp is applied, and the other end of the capacitive element is connected to a voltage source during a reset operation and to a voltage source after the reset operation through a switching element. As a result, the voltage of the second input terminal is changed such that a voltage difference between the first input terminal and the second input terminal becomes a voltage guaranteeing a comparison operation after the reset operation.

Enhanced the back side of the lighting near-infrared Image sensor

Image pick-up device and control method for imaging device

Solid-state imaging device

Photoelectric conversion device, imaging system and method for driving photoelectric conversion device

Image processing circuit, imaging circuit, and electronic device

Solid-state image pickup device, method of driving same and imaging apparatus

Based on transfer type CCD industrial camera

READER FOR DETECTION ELEMENT OF ELECTROMAGNETIC RADIATIONS, SENSOR, AND PROCEEDED OF READING CORRESPONDING

CIRCUIT OF REMOVAL OF DARK CURRENT OF PHOTODETECTOR

IMAGING SENSOR WITH GLOBAL SHUTTER

Le capteur d'images intégré (CAP) adapté à un mode de commande dit à obturation globale est du type à illumination face arrière. Il comprend un substrat semi-conducteur (1) et une pluralité de pixels (Pi, Pi+1), chaque pixel comportant une zone photosensible (5), une zone de stockage (8), une zone de lecture (10) et des zones de transfert de charges (11, 23) entre ces différentes zones. Le capteur d'image comporte en outre pour chaque pixel (Pi, Pi+1), des moyens de protection (MP) s'étendant au moins en partie dans le substrat (1) depuis sa face arrière et configurés pour assurer une protection de la zone de stockage (8) contre ladite illumination face arrière.

PROCESSING CIRCUIT OF PIXELS

L'invention concerne un circuit de traitement de pixels comprenant : un premier convertisseur à rampe (210-i) couplé à une première ligne de colonne (204-i) d'un réseau de pixels et agencé pour affirmer un premier signal de commande (VCi) pendant une durée basée sur une première valeur de pixel (ΔVPIXi) lue par l'intermédiaire de la première ligne de colonne pendant une première phase de lecture ; un deuxième convertisseur à rampe (210-j) couplé à une deuxième ligne de colonne (204-j) du réseau de pixels et agencé pour affirmer un deuxième signal de commande (VCj) pendant une durée basée sur une deuxième valeur de pixel (ΔVPIXi) lue par l'intermédiaire de la deuxième ligne de colonne pendant la première phase de lecture ; et un premier circuit de commande de compteur (214-i) adapté à contrôler un premier compteur pour générer une première valeur numérique en fonction d'au moins les première et deuxième valeurs de pixels en faisant varier, sur la base d'au moins les premier et deuxième signaux ...

CIRCUIT OF REMOVAL OF DARK CURRENT OF PHOTODETECTOR

L'invention concerne un photodétecteur comportant au moins une diode photosensible et au moins un circuit de lecture permettant de convertir les charges générées par effet photoélectrique dans ladite diode en une information de tension échantillonnée par un interrupteur (K), caractérisé en ce que ladite diode photosensible a une première borne reliée à la grille et au drain d'un premier transistor (T2) et une deuxième borne reliée à la source dudit premier transistor (T2) et à la masse dudit photodétecteur, en ce qu'un deuxième transistor (T3) de dimensions proportionnelles à celles dudit premier transistor (T2) est monté en miroir de courant dudit premier transistor (T2) et en ce qu'une capacité d'intégration (Ci) est reliée au drain dudit deuxième transistor de façon à recueillir à ses bornes ladite information de tension.

SENSOR Of IMAGE HAS DOUBLE TRANSFER OF CHARGE FOR GREAT DYNAMICS AND PROCEEDED OF READING

DETECTOR OF RADIATIONS HAS GREAT DYNAMICS

A signal processing device for an imaging element in the solid state.

IMAGING DEVICE WITH FILTERING THE INFRARED RADIATION.

CIRCUIT OF PIXEL OF SENSOR Of IMAGE

L'invention concerne un circuit de pixel d'un capteur d'image comprenant un noeud de détection (106) pour mémoriser une charge transférée à partir d'une ou plusieurs photodiodes (102) ; et un transistor à source suiveuse (210) dont la grille est couplée au noeud de détection et la source est couplée à une ligne de sortie (114) du circuit de pixel par l'intermédiaire d'un transistor de lecture (212), dans lequel le contact de caisson du transistor à source suiveuse est couplé à la ligne de sortie (114).

IMPROVED DETECTION DEVICE

Le dispositif de détection comporte un photodétecteur (1) configuré pour transformer un signal électromagnétique en un signal électrique représentatif. Le dispositif de détection comporte également un amplificateur (2) ayant une première borne d'entrée connectée à une première borne du photodétecteur (1). Un condensateur d'intégration (Cint) est connecté à la borne de sortie de l'amplificateur (2) et à la première borne d'entrée de l'amplificateur. Une première source d'une tension de référence (Vref) est connectée à une deuxième borne d'entrée de l'amplificateur (2). Une deuxième source d'une tension de détecteur (Vdet) est connectée à une deuxième borne d'entrée du photodétecteur (1). Les première et deuxième sources de tension (Vref, Vdet) sont corrélées de manière à corréler les composantes de bruit.

Number Of Pixels In Detector Arrays Using Compressive Sensing

A method and apparatus using the techniques of compressive sensing, which has so far been applied mostly to improving a single-pixel detector into an effectively N-pixel detector, for improving a P-pixel detector array into an effectively P×N-pixel detector array.

SOLID-STATE IMAGE PICKUP DEVICE

A solid-state image pickup device includes a column ADC realizing higher precision and higher-speed conversion. Converters converts a signal of each pixels output via a corresponding vertical read line to a digital value by sequentially executing first to N-th (N: integer of three or larger) conversion stages. In the first to (N−1)th conversion stages, each converter determines a value of upper bits including the most significant bit of a digital value by comparing the voltage at a retention stage with a reference voltage while changing the voltage at a retention node. In the N-th conversion stage, each converter determines a value of remaining bits to the least significant bit by comparing the voltage at the retention node with the reference voltage while continuously changing the voltage at the retention node in a range of the voltage step in the (N−1)th conversion stage or a range exceeding the range. 1. A solid-state image pickup device comprising:an imaging unit in which a plurality of pixels each including a photoelectric conversion element for converting a light signal to an electric signal are disposed in a matrix, and signals of pixels in a selected row are output via a plurality of vertical read lines disposed for columns while sequentially scanning the pixels row by row; anda plurality of converters provided in correspondence with the vertical read lines,wherein each of the converters has a retention node for retaining a signal of a pixel which is output via a corresponding vertical read line and converts the signal retained by the retention node to a digital value by sequentially executing first to N-th (N: integer of three or larger) conversion stages,wherein, in the first conversion stage, each of the converters determines a value of one or plural upper bits including the most significant bit of the digital value by comparing the voltage at the retention node with a reference voltage while changing the voltage at the retention node by a predetermined ...

SOLID-STATE IMAGING DEVICE

A solid-state imaging device includes pixels, vertical signal lines, a high-order AD converter configured to convert M bits, a low-order AD converter, and first and second selection circuits. The first selection circuit is configured to output, in a normal mode, voltage of the selected vertical signal line and to output correction voltage in a correction mode. The high-order AD converter calculates 2residual voltage values each corresponding to a difference between a signal voltage value and each of 2threshold voltage values; outputs, in the normal mode, a high-order bit digital value corresponding to the maximum one of the 2threshold voltage values in a range below the signal voltage value, and outputs voltage having a residual voltage value corresponding to the maximum threshold voltage value; and outputs, in the correction mode, voltage having a residual voltage value corresponding to a selected threshold voltage value. 1. A solid-state imaging device comprising:a plurality of pixels arranged in rows and columns;a plurality of vertical signal lines each connecting pixels in each of the columns;a high-order AD converter configured to convert M bits;one or more low-order AD converters;a first selection circuit corresponding to the high-order AD converter; anda second selection circuit corresponding to the high-order AD converter,wherein the first selection circuit selects, in a normal mode, one of the vertical signal lines to output voltage of the selected one of the vertical signal lines, and output correction voltage in a correction mode, [{'b': 2', '2, 'sup': M', 'M, 'calculates residual voltage values each corresponding to a difference between a signal voltage value obtained based on output of the first selection circuit and each of threshold voltage values,'}, {'b': 2', '2, 'sup': M', 'M, 'outputs, in the normal mode, a high-order bit digital value corresponding to a maximum one of the threshold voltage values in a range below the signal voltage value, and ...

IMAGING SYSTEM

An imaging system comprises an image sensing apparatus including a pixel array, a row selection unit, and a readout unit; and a supply unit including a plurality of A/D converting units, and a transfer unit. The supply unit supplies a power supply voltage to an A/D converting unit which, of the plurality of A/D converting units, receives signals from the pixels in the pixel array by means of the transfer unit, and does not supply a power supply voltage to an A/D converting unit which, of the plurality of A/D converting units, receives no signals from the pixels in the pixel array by means of the transfer unit, in a 1-line period. The readout unit A/D-converts the signals from the pixels in the pixel array using the A/D converting unit supplied with the power supply voltage by the supply unit, and outputs a digital image signal. 1. (canceled)2. An imaging system comprising: a pixel array in which a plurality of pixels are arrayed in a row direction and a column direction,', 'a row selection unit configured to select one row in the pixel array,', 'a plurality of A/D converting units provided according to respective columns of the pixel array, and', 'a transfer unit configured to transfer signals of a plurality of pixels in the row selected by the selection unit to the plurality of A/D converting units in 1-line period from when the row selection unit selects one row until the row selection unit selects the next row; and, 'an image sensing apparatus configured to sense an object to acquire an image signal and including'}a controller configured to control such that the A/D converting unit to which signals of pixels of the same column are transferred by the transfer unit is changed for each 1-line or for each frame period including the 1-line, in a case that the transfer unit transfers signals of the plurality of pixels to the plurality of A/D converting units.3. The system according to claim 2 , wherein said controller controls such that the A/D converting units to ...

SOLID-STATE IMAGING DEVICE AND IMAGING DEVICE

A solid-state imaging device includes a plurality of AD conversion units respectively provided in a plurality of columns and each configured to convert a pixel signal converted by unit pixels provided in an associated column into digital data of N bits, and a plurality of data storage units respectively provided in the columns. The data storage units each include N flip-flop circuits. The solid-state imaging device further includes data switching units each configured to switch between a first state in which the digital data converted by the AD conversion unit is stored in the data storage unit of the associated column, and a second state in which the N flip-flop circuits in each of the data storage units are serially connected. 1. A solid-state imaging device , comprising:a plurality of unit pixels that each converts incident light into a pixel signal, the unit pixels being arranged in rows and columns;a plurality of AD conversion units respectively provided in a plurality of columns and each configured to convert the pixel signal converted by the unit pixel located in an associated column into digital data of N bits, N being an integer not smaller than 2; anda plurality of data storage units respectively provided in the plurality of columns,wherein the data storage units each include N flip-flop circuits respectively corresponding to bits of the digital data of N bits,the solid-state imaging device further comprising:a plurality of data switching units each configured to switch between:a first state in which the digital data of N bits converted by the AD conversion unit is stored in the data storage unit of the associated column; anda second state in which the N flip-flop circuits included in each of the data storage units are serially connected.2. The solid-state imaging device according to claim 1 ,wherein the data switching units are configured to switch among the first state, the second state, and a third state in which the data storage units respectively ...

SOLID-STATE IMAGING APPARATUS

A solid-state imaging apparatus comprising a plurality of pixels generating a photoelectric conversion signal, a column amplifying unit corresponding to columns of the pixels, for outputting a first and second signals generated by amplifying the photoelectric conversion signal at a smaller first gain and larger second gain respectively, an analog to digital converter () for converting the first and second signals from an analog signal to a digital signal, a comparing unit () for inputting the digital signal from the analog to digital converter, level-shifting into the same gain level the first and second signals converted by the analog to digital converter, and thereafter detecting a gain error between the level-shifted first and second signals, and a correction unit () for correcting the first and second signals based on the gain error. 1. A solid-state imaging apparatus comprising:a plurality of pixels arranged in a matrix for generating a signal by a photoelectric conversion;a column amplifying unit arranged corresponding to each of columns of the pixels, for outputting a first signal generated by amplifying the signal from the plurality of pixels at a first gain, and for outputting a second signal generated by amplifying the signal from the plurality of pixels at a second gain larger than the first gain;an analog to digital converter for converting the first and second signals from an analog signal to a digital signal;a comparing unit for receiving the digital signal from the analog to digital converter, level-shifting into the same gain level the first and second signals, and thereafter detecting a gain error between the level-shifted first and second signals; anda correction unit for correcting the first and second signals based on the gain error.2. The solid-state imaging apparatus according to claim 1 , whereinthe comparing unit detects the gain error when the second signal is in a signal level lower than a saturation start signal level.3. The solid-state ...

SYSTEM AND METHOD FOR A HIGH DYNAMIC RANGE SENSITIVE SENSOR ELEMENT OR ARRAY

A high dynamic range sensitive sensor element or array is provided which uses periodic sampling phase domain integration techniques to accurately capture high and low intensity images. The sensor element of the present invention is not limited by dynamic range characteristics exhibited by prior art solid-state pixel structures and is thus capable of capturing a full spectrum of electromagnetic radiation to provide a high quality output image. 1. A method for obtaining a high dynamic range read-out signal from a pixel structure includes the steps of:generating an integrated value of a response of a photosensitive element to impinging electromagnetic radiation using phase information obtained via periodic sampling of the response.2. The method of wherein the phase information is provided by an oscillator operating in a synchronous mode and coupled to receive the response of the photosensitive element and to provide an output waveform that varies in frequency in accordance with the response.3. The method of wherein the oscillator is one of a voltage or current controlled oscillator.4. The method of including the step of periodic sampling of the response claim 1 , the step of periodic sampling of the response including the step of comparing a value of a signal associated with the response against a predetermined threshold to determine whether the value exceeds the threshold.5. The method of wherein the step of comparing occurs at periodic intervals.6. A pixel structure including:a photosensitive element for generating a signal in response to electromagnetic radiation; anda synchronous phase integrator, coupled to the photosensitive element, for integrating the response of the photosensitive element to the electromagnetic radiation over an exposure time period using phase information obtained via periodic sampling of the response.7. The pixel structure of wherein the phase integrator further includes an oscillator coupled to provide an output waveform in response to a ...

IMAGERS HAVING VARIABLE GAIN AND RELATED STRUCTURES AND METHODS

The present application relates to imagers having variable gain and related structures and methods. The gain of the imager may vary between rows of the imager. Such variability may be achieved by suitable design of a readout integrated circuit (ROIC). The ROIC may provide different integration period durations for different rows of the imager. Different integration capacitances may be provided for pixels of different rows of the imager. The gain of a column buffer may be varied when operating on output signals of pixels from different rows. 1. A readout integrated circuit (ROIC) , comprising:a memory configured to store, for each of a plurality of temperatures, a plurality of integration period scaling factors including a first integration period scaling factor corresponding to at least one first row of an array of imaging pixels and a second integration period scaling factor corresponding to at least one second row of the array of imaging pixels; receive a nominal integration period value;', 'receive one of the plurality of integration period scaling factors; and', 'scale the nominal integration period value by the one of the plurality of integration period scaling factors to produce a corresponding scaled integration period value; and, 'a plurality of multipliers, each multiplier of the plurality of multipliers configured toa plurality of pulse generators including one pulse generator corresponding to each row of the array of imaging pixels,wherein each of the plurality of pulse generators is configured to receive a scaled integration period value from a multiplier of the plurality of multipliers and generate one or more timing signals based on the received scaled integration period value, wherein the one or more timing signals control, at least in part, a duration of an integration period of imaging pixels in a corresponding row of the array of imaging pixels.2. The ROIC of claim 1 , coupled to the array of imaging pixels to form an imager claim 1 , the array of ...

SOLID-STATE IMAGING DEVICE

A solid-state imaging device of one embodiment includes a light receiving section including of a plurality of pixels having respective photodiodes, the pixels being two-dimensionally arrayed in M rows and N columns; N readout lines disposed for the respective columns and connected with the photodiodes PD included in the pixels of a respective columns via readout switches; a signal output section for outputting a voltage value according to an amount of charge input through each of the readout lines; and a vertical shift register for controlling an opening and closing operation of the readout switch for each of the rows. A contour between one side along a row direction of the light receiving section and a pair of sides along a column direction has a stepped shape. A dummy photodiode region is formed along the stepped contour of the light receiving section. 17-. (canceled)8. A solid-state imaging device comprising:a light receiving section having a plurality of pixels including photodiodes, respectively, the pixels being two-dimensionally arrayed in M rows and N columns;N readout lines disposed for the respective columns, and connected with the photodiodes included in the pixels of the respective columns via readout switches;a signal output section for outputting a voltage value according to an amount of charge input through each of the readout lines; anda vertical shift register for controlling an opening and closing operation of the readout switch for each of the rows; anda dummy photodiode disposed between the vertical shift register and the light receiving section, whereinthe dummy photodiode is provided along a longitudinal direction of the vertical shift register, anda length of the dummy photodiode in a direction perpendicular to the longitudinal direction is smaller than a length of the dummy photodiode in the longitudinal direction.9. The solid-state imaging device according to claim 8 , further comprising:a trunk line provided extending along a column ...

SOLID-STATE IMAGING APPARATUS WITH EACH PIXEL INCLUDING A PHOTOELECTRIC CONVERSION PORTION AND PLURAL HOLDING PORTIONS

A solid-state imaging apparatus including a plurality of pixels each including: a first holding portion for holding signal carriers from a photoelectric conversion portion; an amplifying portion for amplifying and reading a signal based on the signal carriers generated in the photoelectric conversion portion; and a carrier discharging control portion for discharging charge carriers in the photoelectric conversion portion to an OFD region, and having a carrier path between the photoelectric conversion portion and the first carrier holding portion, in which the solid-state imaging apparatus further includes a second carrier holding portion electrically connected with the first carrier portion in parallel through a first transfer unit, when viewed from an output node of the photoelectric conversion portion, thereby smoothing an movie imaging without causing discontinuous frame while suppressing generation of noise mixing into the charge carrier holding portion. 14-. (canceled)5. A solid-state imaging apparatus comprising a plurality of pixels each includinga first photoelectric conversion portion;a first holding portion for holding signal carriers from the first photoelectric conversion element;a second photoelectric conversion portion;a second holding portion for holding signal carriers from the second photoelectric conversion element;a first transfer portion for controlling an electrical connection between the first holding portion and the second charge holding portionan amplifying portion for amplifying and reading a signal based on the signal carriers held in at least one of the first and second holding portions; anda carrier discharging control portion for controlling an electrical connection between the first and second photoelectric conversion portions and an overflow drain region, whereina carrier path between the first photoelectric conversion portion and the first holding portion, and a carrier path between the second photoelectric conversion portion and the ...

DRIVING METHOD FOR SOLID-STATE IMAGING APPARATUS, AND IMAGING SYSTEM

A driving method for a solid-state imaging apparatus including a plurality of pixels is provided. A potential of the electric charge accumulated in an accumulating portion is lower than a potential of a first transferring portion for connecting a photoelectric conversion element to the accumulating portion for accumulating an electric charge. The driving method includes: a first driving mode setting a start and an end of an operation of accumulating the electric charge in each of the plurality of pixels common for the plurality of pixels; and a second driving mode setting the start and the end of the operation of accumulating the electric charge in each of the plurality of pixels common for the pixels in each row. 1a photoelectric converting portion for photoelectrically converting an incident light;a first transferring portion for connecting the photoelectric converting portion to an accumulating portion for accumulating an electric charge;a second transferring portion for connecting the accumulating portion to a floating diffusion portion;a reset portion for connecting the floating diffusion portion to a first power source; anda third transferring portion for connecting the photoelectric converting portion to a second power source,such that, at least, during a time period of accumulating the electric charge in the pixel, a potential barrier formed in the first transferring portion for holding the electric charge accumulated in the accumulating portion is higher than a potential barrier formed in the third transferring portion, whereinthe driving method is executed by performing:a first driving mode wherein a start and an end of an operation of accumulating the electric charge in the pixel are set commonly to plurality of the pixels; anda second driving mode wherein a start and an end of an operation of accumulating the electric charge in the pixel are set commonly to the pixels in each row.. A driving method of a solid-state imaging apparatus, wherein the solid- ...

PHOTOELECTRIC CONVERSION APPARATUS, METHOD FOR DRIVING THE SAME, AND PHOTOELECTRIC CONVERSION SYSTEM

A photoelectric conversion apparatus includes a pixel array configured to include a first analog-to-digital conversion unit and a second analog-to-digital conversion unit, a first electrical signal supply unit configured to supply an electrical signal to the first analog-to-digital conversion unit, and a second electrical signal supply unit configured to supply an electrical signal to the second analog-to-digital conversion unit.

PHOTOELECTRIC CONVERSION APPARATUS AND IMAGE PICKUP SYSTEM

Provided is a photoelectric conversion apparatus including a plurality of pixels and a control unit, wherein each of the pixels includes a photoelectric conversion unit and a digital-signal output unit configured to output a digital signal based on the output of the photoelectric conversion unit, and the number of bits of the digital signal may be switched. 1. A photoelectric conversion apparatus comprising:a plurality of pixels, each of the plurality of pixels including a photoelectric conversion unit and a digital-signal output unit configured to output a digital signal based on an output of the photoelectric conversion unit; anda control unit configured to control the digital-signal output units to switch number of bits of the digital signals.2. The photoelectric conversion apparatus according to claim 1 , wherein the digital-signal output unit includes an analog-to-digital conversion unit.3. The photoelectric conversion apparatus according to claim 1 , wherein the control unit controls the digital-signal output unit to output the digital signal with a first number of bits claim 1 , and switches the digital-signal output unit to output the digital signal with a second number of bits larger than the first number claim 1 , in accordance with a detection of an event.4. The photoelectric conversion apparatus according to claim 3 , wherein the event is any one of a moving object claim 3 , a human body claim 3 , and a face claim 3 , and a combination thereof.5. The photoelectric conversion apparatus according to claim 1 , wherein the control unit controls claim 1 , in a first mode claim 1 , the digital-signal output unit to output the digital signal of 1-bit.6. The photoelectric conversion apparatus according to claim 5 , wherein an edge detection is performed based on the digital signal of 1-bit.7. The photoelectric conversion apparatus according to claim 2 , wherein the digital signal unit includes a counter driven by a clock signal claim 2 , whereinthe control unit ...

METHOD FOR DRIVING PHOTOELECTRIC CONVERSION DEVICE

After accumulating electric charges in pixels in first, second, and third rows, signals are output from the pixels in the first and second rows in a first frame, and thereafter, after accumulating electric charges in the pixels in the first row without accumulating electric charges in the pixels in the second and third rows, signals are output from the pixels in the first and third rows in a second frame following the first frame. Furthermore, the photoelectric conversion units of the pixels in the second and third rows are reset by the resetting units included in the pixels in the second and third rows in the first frame. 1. A method for driving a photoelectric conversion device which includes a plurality of pixels arranged in a matrix , a photoelectric conversion unit,', 'a holding unit configured to hold electric charges,', 'a transfer unit configured to transfer electric charges generated in the photoelectric conversion unit to the holding unit, and', 'a resetting unit configured to reset the photoelectric conversion unit,, 'each of the pixels including'} outputting, after accumulating electric charges in pixels in first, second, and third rows in the matrix, signals from the pixels in the first and second rows in a first frame and outputting, after accumulating electric charges in the pixels in the first row without accumulating electric charges in the pixels in the second and third rows, signals from the pixels in the first and third rows in a second frame following the first frame; and', 'resetting, in the first frame, the photoelectric conversion units of the pixels in the second and third rows using the resetting units included in the pixels in the second and third rows., 'the method comprising2. The method according to claim 1 , whereinthe pixel array further includes a fourth row and a fifth row; andthe method further comprisesaccumulating electric charges in pixels in the fourth and fifth rows together with the pixels in the first, second, and third rows ...

CDS CIRCUIT, IMAGE SENSOR INCLUDING THE SAME, AND IMAGE PROCESSING DEVICE INCLUDING THE IMAGE SENSOR

A correlated double sampling (CDS) circuit includes a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; and a comparator including first and second input terminals, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the second input terminal configured to receive a ramp signal, the comparator being configured to compare the corrected pixel signal with the ramp signal and output a comparison signal indicating a result of the comparing, wherein the correction circuit includes, a first capacitor connected between the first and second nodes, and one or more metal lines disposed adjacent to the first capacitor, and wherein at least one other capacitor is formed by the first capacitor and the metal line. 1. A correlated double sampling (CDS) circuit comprising:a correction circuit configured to receive an input pixel signal through a first node via a column line, correct the input pixel signal, and output the corrected pixel signal through a second node; anda comparator including a first input terminal and a second input terminal, the first input terminal being connected to the second node and being configured to receive the corrected pixel signal, and the second input terminal configured to receive a ramp signal, the comparator being configured to compare the corrected pixel signal with the ramp signal and output a comparison signal indicating a result of the comparing, a first capacitor connected between the first and second nodes, and', 'one or more metal lines disposed adjacent to the first capacitor, and, 'wherein the correction circuit includes,'}wherein at least one other capacitor is formed by the first capacitor and the metal line.2. The CDS circuit of claim 1 , wherein the one or more metal lines includes a first metal line and a second metal line ...

SOLID STATE IMAGE PICKUP APPARATUS

An apparatus includes a plurality of pixels each including a charge storage part, a photoelectric conversion part, a first transfer part and a second transfer part, when a signal charge generated during one period is transferred to an amplifier, a control unit supplies pulses such that a turning-on pulse is supplied to the second transfer part while supplying a turning-off pulse to the first transfer part thereby transferring the stored signal charge to the amplifier, a turning-on pulse is then supplied to a reset part to reset the signal charge transferred to the amplifier, and subsequently a turning-on pulse is supplied to the first transfer part and the second transfer part to transfer the signal charge held in the photoelectric conversion part to the amplifier. 1. An apparatus comprising:a plurality of pixels, each pixel including a photoelectric conversion part, a charge storage part configured to store a signal charge transferred by a first transfer part from the photoelectric conversion part, an amplifier configured to amplify a signal based on the signal charge transferred by a second transfer part, and a reset part; anda control unit configured to supply driving pulses, wherein when a signal charge generated during one period is transferred to the amplifier, the control unit supplies pulses such that a turning-on pulse is supplied to the second transfer part while supplying a turning-off pulse to the first transfer part thereby transferring the stored signal charge to the amplifier, a turning-on pulse is then supplied to the reset part to reset the signal charge transferred to the amplifier, and subsequently a turning-on pulse is supplied to the first transfer part and the second transfer part to transfer the signal charge held in the photoelectric conversion part to the amplifier.2. The apparatus according to claim 1 , wherein the control unit is configured to supply a turning-on pulse a plurality of times to the second transfer part before the turning-on ...

IMAGE SENSOR, CAMERA, SURVEILLANCE SYSTEM, AND METHOD FOR DRIVING THE IMAGE SENSOR

Provided is an image sensor having a pixel includes a photoelectric conversion element; a capacitor which is connected between the photoelectric conversion element; a reset circuit which resets a potential of a node between the photoelectric conversion element and the capacitor; an amplifier circuit which outputs a signal corresponding to the potential of the node; and a switch which controls electrical conduction between the amplifier circuit and a vertical signal line. When the node is brought into an electrically floating state, the potential of the optical signal is stored in the node in a state of being inverted. When an optical signal is detected while the potential is stored in the node, the potential of the node increases in accordance with an output potential of the photoelectric conversion element, and thus the potential of the node corresponds to a difference in potential between the optical signals in different light-receiving periods. 1. An image sensor comprising:a vertical signal line;a pixel electrically connected to the vertical signal line; andan analog-digital conversion device electrically connected to the vertical signal line,wherein the pixel includes a photodiode, a first capacitor, a first transistor, a second transistor, a third transistor, a first wiring, a second wiring, a third wiring, and a fourth wiring,wherein one electrode of the first capacitor is electrically connected to an anode of the photodiode,wherein the other electrode of the first capacitor is electrically connected to a gate of the second transistor,wherein a node between the other electrode of the first capacitor and the gate of the second transistor is configured to store a potential corresponding to an amount of electric charge generated in the photodiode,wherein a gate of the first transistor is electrically connected to the first wiring,wherein one of a source and a drain of the first transistor is electrically connected to the node, and the other of the source and the ...

IMAGING DEVICE, IMAGING SYSTEM, AND METHOD FOR DRIVING IMAGING DEVICE

Conventionally, in order to obtain a difference signal between an A+N signal and an N signal and a difference signal between an A+B+N signal and the A+N signal, the A+N signal needs to be held in two different capacitors. Hence, there is a problem in that, due to variations in capacitance of the two capacitors, the difference signal between the A+N signal and the N signal and the difference signal between the A+B+N signal and the A+N signal may not accurately be obtained. An imaging device generates a signal obtained by subtracting the same digital N signal from each of the digital A+N signal and the digital A+B+N signal. 1. An imaging device comprising an analog signal output unit and an analog-digital conversion unit ,the analog signal output unit including a pixel,the pixel having a photoelectric conversion unit,the analog signal output unit outputtinga first signal that is a noise signal in the analog signal output unit,a second signal based on signal charge generated in the photoelectric conversion unit, anda third signal based on signal charge obtained by adding other signal charge generated in the photoelectric conversion unit to the signal charge,the analog-digital conversion unit converting each of the first, second, and third signals into a digital signal,the analog-digital conversion unit including a signal holding unit that holds the digital signal converted from the first signal.2. The imaging device according to claim 1 , wherein the pixel includes at least n (n is a natural number of 2 or more) photoelectric conversion units claim 1 , andwherein the analog signal output unit outputsthe second signal, the second signal being based on signal charge generated in m (m is a natural number satisfying a relational expression of n>m) photoelectric conversion units among the n photoelectric conversion units, andthe third signal, the third signal being based on signal charge generated in the n photoelectric conversion units.3. The imaging device according to ...

IMAGING APPARATUS, IMAGING SYSTEM, IMAGING APPARATUS DRIVING METHOD, AND IMAGING SYSTEM DRIVING METHOD

Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals. 1. An imaging apparatus comprising:a plurality of pixels arrayed in a matrix shape, each including a plurality of photoelectric conversion units configured to generate signal charge, and to output a signal based on the signal charge;wherein at least each of a part of the pixels of the plurality of pixels outputs a first signal based on m (m is an integer) photoelectric conversion units which each of the pixels includes, the signal charge of n (n is an integer less than m) photoelectric conversion units within one frame period;and wherein each of the plurality of pixels outputs a second signal based on the signal charge of the m photoelectric conversion units which each of the plurality of pixels includes, within the one frame period;and wherein the number of signals based on the first signals which the imaging apparatus outputs is less than the number of signals based on the second signals which the imaging apparatus outputs.2. The imaging apparatus according to claim 1 , further comprising:a plurality of signal holding units; anda plurality of amplifier circuits;wherein one of the amplifier circuits outputs signals obtained by amplifying signals obtained by adding the first signals of the plurality of pixels to one of the signal holding units, and outputs the signal based on the second signal amplified by the amplifier circuit other than the one amplifier circuit to the signal holding unit other than the one signal holding unit.3. The imaging apparatus according to claim 1 , further comprising:a plurality of signal ...

REDUNDANCY IN COLUMN PARALLEL OR ROW ARCHITECTURES

A column circuitry architecture for an imager includes redundant column or row circuits. The column or row circuitry includes a number of redundant column or row circuits. Each column or row circuit include circuitry for controllably coupling the column or row circuit to one of plural signal lines from an array of pixels. A control mechanism is used to select a configuration of plural column or row circuits in the column or row circuitry. In this manner, some column or row circuits are decoupled from the pixel in favor of other column or row circuits. The decoupled column or row circuits may include defective or noisy circuits. 1. An imager comprising:a pixel array containing a plurality of imaging pixels arranged in rows and columns;a plurality of column circuits, the number of column circuits being greater than the number of imaging pixels arranged in a row;a storage device for storing addresses of column circuits which should be bypassed; anda control circuit for selecting and operating the plurality of column circuits such that the imaging pixels in each row are coupled to a column circuit which has no address stored in the storage device during readout of an image captured by the imaging pixels in the pixel array.2. An imager as in claim 1 , wherein each column circuit is associated with a plurality of imaging pixels of a row claim 1 , each column circuit being selectively connectable to one of the associated imaging pixels.3. An imager as in claim 2 , further comprising:a plurality of selection circuits respectively coupled to the plurality of pixel circuits each selection circuit selectively connecting an associated pixel circuit to one of its associated imaging pixels.4. An imager as in claim 3 , wherein each selection circuit comprises a multiplexer.5. An imager as in claim 1 , wherein the pixel array further comprises non-imaging pixels.6. An imager as in claim 5 , wherein the non-imaging pixels are arranged in at least one column of the pixel array.7. An ...

IMAGING DEVICE

In an imaging device, one end of a capacitive element is connected to a second input terminal to which a reference signal Ramp is applied, and the other end of the capacitive element is connected to a voltage source during a reset operation and to a voltage source after the reset operation through a switching element. As a result, the voltage of the second input terminal is changed such that a voltage difference between the first input terminal and the second input terminal becomes a voltage guaranteeing a comparison operation after the reset operation. 1. An imaging device , comprising:an imaging unit that includes unit pixel with a photoelectric conversion element arranged in a form of a matrix, and outputs a pixel signal from the unit pixel;a reference signal generating unit that generates a reference signal increasing or decreasing with passage of time;a comparing unit that includes a differential amplifying unit and a reset unit, the differential amplifying unit including a first input terminal electrically connected with the unit pixel and a second input terminal electrically connected with the reference signal generating unit through a first capacitive element and comparing a voltage of the first input terminal with a voltage of the second input terminal, the reset unit resetting the voltage of the first input terminal and the voltage of the second input terminal;a measuring unit that measures a comparison time from a comparison start to a comparison end by the comparing unit; anda changing unit that changes the voltage of the second input terminal such that a voltage difference between the first input terminal and the second input terminal becomes a voltage guaranteeing a comparison operation by the comparing unit after a reset operation by the comparing unit,wherein the changing unit includes a second capacitive element and a switching element, one end of the second capacitive element is connected to the second input terminal, and the other end of the ...

IMAGING DEVICE, IMAGING SYSTEM, AND DRIVING METHOD OF IMAGING DEVICE

Each of pixels in an imaging device includes a photoelectric converter and a first transistor. A signal based on a charge generated by the photoelectric converter is to be input into the first transistor. The imaging device includes a second transistor arranged at a ratio of one as to the pixels. A reference signal is to be input into the second transistor. The second transistor defines a differential pair together with the first transistor. The imaging device includes a comparator including the first transistor and the second transistor. Each of the pixels includes a selecting unit configured to turn off the first transistor by applying the first voltage to a control node of the first transistor. 1. An imaging device comprising: a photoelectric converter, and', 'a first transistor arranged such that a signal based on a charge generated by the photoelectric converter is to be input into the first transistor;, 'a plurality of pixels, each of the plurality of pixels including'}a second transistor arranged such that a reference signal is to be input into the second transistor, arranged at a ratio of one as to the plurality of pixels, and arranged to define, together with each of the first transistors, a differential pair; anda comparator including the first transistor and the second transistor;wherein each of the plurality of pixels further includes a selecting unit configured to turn off the first transistor by applying a first voltage to a control node of the first transistor.2. The imaging device according to claim 1 , wherein the selecting unit includes a selecting transistor configured to connect a main node of the first transistor and the control node of the first transistor.3. The imaging device according to claim 2 , the imaging device further comprising:a first node; and a first connecting transistor and', 'a first voltage node configured to supply the first voltage,, 'a voltage supplying unit including'}wherein the main nodes of the first transistors included ...

SOLID-STATE IMAGING APPARATUS

A solid-state imaging apparatus that shortens a time for reading out pixel signals of all pixels and improves the aperture ratio of pixels is provided. The solid-state imaging apparatus includes a plurality of pixels () arranged in a matrix along a plurality of rows and columns, in which each of the pixels includes a photoelectric conversion element and a color filter; a plurality of buffers () arranged with each one corresponding to a plurality of pixels; and a plurality of vertical output lines () arranged such that two or more of the vertical output lines () are arranged correspondingly to one of the columns of the pixels; in which an input node of each of the buffers is connected commonly to a plurality of pixels having color filters of different colors, and output nodes of the plurality of buffers are connected alternately to a plurality of vertical output lines. 1. A solid-state imaging apparatus comprising:a plurality of pixels arranged in a matrix along a plurality of rows and columns, wherein each of the pixels includes a photoelectric conversion element and a color filter;a plurality of buffers arranged commonly each one correspondingly to the plurality of pixels; anda plurality of vertical output lines arranged such that two or more of the vertical output lines are arranged correspondingly to one of the columns of the pixels, wherein 'output nodes of the plurality of buffers are connected alternately to the plurality of vertical output lines.', 'an input node of each of the buffers is connected commonly to the pixels having color filters of different colors, and'}26-. (canceled) 1. Field of the InventionThe present invention relates to a solid-state imaging apparatus.2. Description of the Related ArtSolid-state imaging apparatuses that are mounted in digital still cameras, video cameras, and cellular phones are being actively developed in recent years. CCD (Charge Coupled Devices) sensors and CMOS (Complementary Metal Oxide Semiconductor) sensors are ...

SOLID-STATE IMAGING DEVICE, DRIVING METHOD, AND ELECTRONIC APPARATUS

Disclosed is a solid-state imaging device including a pixel array, a pixel signal generation part, and a control part. The pixel signal generation part includes a comparator and a counter. In a case where an enable signal is supplied from the control part, a count value of the counter in a D-phase period where a signal level is detected is set as a limit value regardless of an output of the comparator when a count value of the counter in a P-phase period where a reset level is detected is a limit value. 1. A solid-state imaging device , comprising:a pixel array having a plurality of pixels arranged therein, each of the pixels having a charge holding part configured to hold a voltage corresponding to a charge obtained by a photoelectric conversion part;a pixel signal generation part configured to generate a pixel signal by calculating a difference between a signal level representing the voltage held by the charge holding part so as to correspond to the charge obtained by the photoelectric conversion part of the pixel and a reset level representing a voltage of the charge holding part in a reset state; and the pixel signal generation part including', 'a comparator configured to compare the voltage of the charge holding part with a reference voltage, and', 'a counter configured to count a clock in accordance with a comparison result output from the comparator,', 'a count value of the counter in a D-phase period where the signal level is detected being set as a limit value regardless of an output of the comparator when a count value of the counter in a P-phase period where the reset level is detected is a limit value, in a case where an enable signal is supplied from the control part., 'a control part configured to control the pixel signal generation part,'}2. The solid-state imaging device according to claim 1 , whereinthe pixel array has the plurality of pixels arranged in a two-dimensional matrix form,the pixel signal generation part is provided for each of columns ...

PHOTOELECTRIC CONVERSION APPARATUS

A photoelectric conversion apparatus includes: a plurality of pixels () configured to output a signal according to incident light; a maximum value detecting unit () configured to input the signals output from the plurality of pixels, and to output a maximum value among the signals output from the plurality of pixels, based on a first reference voltage, through a plurality of common drain NMOS transistors; and a minimum value detecting unit () configured to input the signals output from the plurality of pixels, and to output a minimum value among the signals output from the plurality of pixels, based on a second reference voltage, through a plurality of common drain PMOS transistors. 1. A photoelectric conversion apparatus comprising:a plurality of pixels configured to output signal according to an incident light;a maximum value detecting unit configured to receive the signals outputted from the plurality of pixels, and to output a maximum value among the signals outputted from the plurality of pixels, based on a first reference voltage, through a plurality of common-drain NMOS transistors; anda minimum value detecting unit configured to receive the signals outputted from the plurality of pixels, and to output a minimum value among the signals outputted from the plurality of pixels, based on a second reference voltage, through a plurality of common-drain PMOS transistors.2. The photoelectric conversion apparatus according to claim 1 , a reference voltage controlling unit configured to receive the maximum value and the minimum value, and to control so as to reduce a difference between a reference voltage of the maximum value and a reference voltage of the minimum value; and', 'a difference calculating unit configured to calculate a difference between the maximum value and the minimum value after the difference between the reference voltage of the maximum value and the reference voltage of the minimum value is reduced., 'further comprising3. The photoelectric ...

CORRELATED DOUBLE SAMPLING CIRCUIT AND IMAGE SENSOR INCLUDING THE SAME

A correlated double sampling (CDS) circuit included in an image sensor includes a sampling unit and a timing controlled band-limitation (TCBL) unit. The sampling unit is configured to generate an output signal by performing a CDS operation with respect to a reset component of an input signal and an image component of the input signal based on a ramp signal, the input signal being provided from a pixel array included in the image sensor. The TCBL unit is connected to the sampling unit, and is configured to remove noise from the output signal based on a timing control signal. The timing control signal is activated during a first comparison duration, in which a first comparison operation is performed with respect to the ramp signal and the reset component of the input signal, and during a second comparison duration, in which a second comparison operation is performed with respect to the ramp signal and the image component of the input signal. 1. A correlated double sampling (CDS) circuit included in an image sensor , the CDS circuit comprising:a sampling unit configured to generate an output signal by performing a CDS operation with respect to a reset component of an input signal and an image component of the input signal based on a ramp signal, the input signal being provided from a pixel array included in the image sensor; anda timing controlled band-limitation (TCBL) unit connected to the sampling unit, and configured to remove noise from the output signal based on a timing control signal, the timing control signal being activated during a first comparison duration, in which a first comparison operation is performed with respect to the ramp signal and the reset component of the input signal, and during a second comparison duration, in which a second comparison operation is performed with respect to the ramp signal and the image component of the input signal.2. The CDS circuit of claim 1 , wherein the TCBL unit is configured to perform a first pre-charge operation ...

IMAGING APPARATUS AND CAMERA

An imaging apparatus including a pixel, a current source, and a signal processing circuit. The pixel outputs signal charge, obtained by imaging, as a pixel signal. The current source is connected to a transmission path for the pixel signal and has a variable current. The signal processing circuit performs signal processing on a signal depending on an output signal to the transmission path and performs control so that a current of the current source is changed in accordance with the result of signal processing. 1. A camera , comprising:an imaging apparatus; a pixel that outputs signal charge as a pixel signal, the signal charge being obtained by imaging;', 'a current source connected to a transmission path for the pixel signal, the current source having a variable current; and', 'a signal processing circuit that performs signal processing on a signal depending on an output signal to the transmission path and performs control so that a current of the current source is changed in accordance with the result of signal processing,, 'an optical system that forms a subject image on the imaging apparatus, wherein the imaging apparatus includes the signal processing circuit comprises:', 'an integrator that integrates a pixel signal transmitted through the transmission path;', 'a quantizer that quantizes an output signal of the integrator; and', 'a selector that changes a current of the current source in accordance with the result of quantization by the quantizer;, 'wherein,'}a drive circuit; andan image processor.2. A camera , comprising:an imaging apparatus; a pixel that outputs signal charge as a pixel signal, the signal charge being obtained by imaging;', 'a current source connected to a transmission path for the pixel signal, the current source having a variable current; and', 'a signal processing circuit that performs signal processing on a signal depending on an output signal to the transmission path and performs control so that a current of the current source is ...

SOLID-STATE IMAGING APPARATUS

There is a need to provide a solid-state imaging apparatus capable of highly accurately analog-to-digital converting an analog voltage output from a pixel circuit. The solid-state imaging apparatus supplies a counter code to an integral A/D converter. The counter code CD includes 3-phase clock signals and gray signals. The clock signals each have a cycle equal to specified cycle multiplied by 8 and allow phases to shift from each other by specified cycle. The gray signals linearly increase count values at a cycle equal to specified cycle multiplied by 4. The counter code reverses only the logical level of a signal when a count value changes. A count value error can be limited to a minimum. 1. A solid-state imaging apparatus comprising:a pixel circuit to output an analog voltage having a level corresponding to an incident light quantity;a reference voltage generation circuit to generate a reference voltage whose voltage value linearly varies with the time;a counter to generate a counter code whose count value linearly varies with the time at a predetermined cycle; andan integral A/D converter to convert the analog voltage into a digital signal based on the reference voltage and the counter code,wherein the integral A/D converter includes:a comparator to compare the reference voltage with the analog voltage in terms of high and low states; anda latch circuit to latch the counter code based on a comparison result from the comparator when high-low relationship between the reference voltage and the analog voltage reverses, andwherein the counter code includes:a low-order bit code including as many as N clock signals (N is an integer greater than or equal to 2) that have equal frequencies and allow phases to shift from each other by the predetermined cycle; anda high-order bit code including a gray code whose count value varies at a cycle equal to the predetermined cycle multiplied by M (M is an integer greater than N).2. The solid-state imaging apparatus according to ...

SOLID-STATE IMAGING DEVICE AND SOLID-STATE IMAGING DEVICE DRIVING METHOD

A controlling section, by bringing readout switches of pixels of a certain row out of the M rows into a connected state, causes charges generated in the row to be input to integration circuits, causes first holding circuits to hold voltage values output from the integration circuits, and then brings transfer switches into a connected state to transfer the voltage values to the second holding circuits, and thereafter performs in parallel an operation for causing the voltage values to be sequentially output from the second holding circuits and an operation for, by bringing readout switches of pixels of another row into a connected state, causing charges generated in the row to be input to the integration circuits. Accordingly, a solid-state imaging device and a driving method thereof capable of suppressing variations in output characteristics, while solving the problem due to a delay effect are realized. 1. A solid-state imaging device comprising:a photodetecting section having M×N (each of M and N is an integer not less than 2) pixels each including a photodiode that are arrayed two-dimensionally in M rows and N columns;N readout wiring lines arranged for each column, and connected via readout switches with the photodiodes included in the pixels of corresponding columns;a signal connecting section including an integration circuit connected to each of the N readout wiring lines, and for outputting a voltage value according to an amount of charge input through the readout wiring line, a first holding circuit connected in series to the integration circuit, and for holding a voltage value output from the integration circuit, a second holding circuit connected in series via a transfer switch to the first holding circuit, and for holding a voltage value output from the first holding circuit, and an output switch connected to the second holding circuit, and for outputting a voltage value held in the second holding circuit; anda controlling section for controlling an opening ...

SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD

In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vare compared. A count clock CKcnt is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage V, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise. 1. An electronic apparatus , comprising:an imaging lens; 'an analog to digital (A/D) conversion unit, the A/D conversion unit', 'a solid-state imaging device, wherein the solid-state imaging device receives light guided by the imaging lens onto the solid-state imaging device, the solid-state imaging device including a reference signal generation section that generates a reference signal whose level changes gradually;', 'a comparison section the compares the reference signal and a target analog signal; and', 'a counter section that performs a counting based on a count clock and a result of the comparison of the reference signal and the target analog signal, the A/D conversion unit obtaining digital data of the target analog signal based on output data of the counter section,', 'a drive control section that controls the reference signal generation section and the A/D conversion unit to perform a digital integration that repeats an n-bit A/D conversion on the target analog signal W times, where W is a positive integer equal to or greater than 2,', 'the solid-state imaging device further comprising ...

SOLID-STATE IMAGING APPARATUS AND IMAGING SYSTEM

An imaging apparatus has an imaging area formed by arranging a plurality of imaging blocks each including a pixel array, a plurality of vertical signal lines, a horizontal output line commonly provided for the plurality of vertical signal lines to read out signals read out to the plurality of vertical signal lines, a first scanning circuit, and a second scanning circuit, wherein signals of the pixels of a selected row in the pixel array are read out to the plurality of vertical signal lines in accordance with a driving pulse from the first scanning circuit, the signals read out to the plurality of vertical signal lines are sequentially read out to the horizontal output line in accordance with a driving pulse from the second scanning circuit, and a length in a row direction of the pixel array is smaller than a length in a column direction of the pixel array. 1. A solid-state imaging apparatus having an imaging area formed by arranging a plurality of imaging blocks ,each of the plurality of imaging blocks comprising:a pixel array in which a plurality of pixels are arranged to form a plurality of rows and a plurality of columns;a plurality of vertical signal lines provided in correspondence with the plurality of columns, respectively;a horizontal output line commonly provided for the plurality of vertical signal lines to read out signals read out to the plurality of vertical signal lines;a first scanning circuit; anda second scanning circuit,wherein signals of the pixels of a selected row in the pixel array are read out to the plurality of vertical signal lines in accordance with a driving pulse from the first scanning circuit,the signals read out to the plurality of vertical signal lines are sequentially read out to the horizontal output line in accordance with a driving pulse from the second scanning circuit, anda length in a row direction of the pixel array is smaller than a length in a column direction of the pixel array.29-. (canceled) 1. Field of the InventionThe ...

SOLID-STATE IMAGE PICKUP DEVICE AND METHOD OF DRIVING SOLID-STATE IMAGE PICKUP DEVICE

A controlling section causes a charge of a photodiode to be output to an integration circuit by bringing a readout switch into a connected state, and then brings the readout switch into a non-connected state. Thereafter, a voltage value is output to a holding circuit from the integration circuit. After carrying out the output operation mentioned above, an operation for causing a charge held in an integrating capacitive element to be discharged, and bringing the readout switch into a connected state to cause a charge held in the photodiode to be discharged and an operation for causing voltage values held in the holding circuits to be sequentially output are carried out in parallel. Accordingly, a solid-state imaging device and a method of driving it capable of solving the problems due to a memory effect, a delay effect, and switching noise are realized. 1. A solid-state imaging device comprising:a photodetecting section having M×N (each of M and N is an integer not less than 2) pixels each including a photodiode that are arrayed two-dimensionally in M rows and N columns;N readout wiring lines arranged for each column, and connected via readout switches with the photodiodes included in the pixels of corresponding columns;a signal connecting section including an integration circuit connected to each of the N readout wiring lines, and for outputting a voltage value according to an amount of charge input through the readout wiring line, a holding circuit connected in series via an input switch with the integration circuit, and for holding a voltage value output from the integration circuit, and an output switch connected to the holding circuit, and for outputting a voltage value held in the holding circuit; anda controlling section for controlling opening and closing operations of the readout switches of the respective pixels and the input switches and controlling opening and closing operations of the output switches to cause voltage values according to amounts of ...

SENSOR PIXELS, ARRAYS AND ARRAY SYSTEMS AND METHODS THEREFOR

One sensor pixel includes amplifying transistor, coupled between first bias line and data line; switch transistor, operated by control line and coupled between data line and gate of amplifying transistor; storage capacitor, coupled to second bias line; and sensor being coupled to gate of amplifying transistor. Another sensor pixel includes first amplifying transistor coupled between first bias line and data line; second amplifying transistor being coupled between second bias line and data line; switch transistor being operated by control line and being coupled between data line and gates of first and second amplifying transistors; storage capacitor coupled to gates of first and second amplifying transistors; and sensor coupled to gates of first and second amplifying transistors, Further sensor pixel includes two photo transistors connected to first and second bias lines. Trap-assisted absorption, variable capacitor described for sensor pixels, and also biasing to reduce flicker and aging, and to compensate for aging, described for sensor pixels. 1. (canceled)2. A sensor pixel , comprising:an amplifying transistor having a first terminal, a second terminal and a gate terminal, the first terminal of the amplifying transistor being coupled to a first bias line;a switch transistor having a first terminal, a second terminal and a gate terminal, the gate terminal of the switch transistor being operated by a control line;a storage capacitor having a first terminal and a second terminal, the first terminal of the storage capacitor being coupled to a second bias line; anda sensor,the second terminal of the amplifying transistor and the first terminal of the switch transistor being coupled to at least one data line, andthe sensor, the second terminal of the storage capacitor, the second terminal of the switch transistor being coupled to the gate terminal of the amplifying transistor.3. The sensor pixel as claimed in claim 2 , wherein the at least one data line comprises:a ...

IMAGING SYSTEMS WITH PER-COLUMN ANALOG-TO-DIGITAL CONVERTER NON-LINEARITY CORRECTION CAPABILITIES

Electronic devices may include image sensors having image sensor pixels that are coupled to analog-to-digital converters (ADCs). Each ADC may be a sub-ranged ramp ADC that uses a first set of reference voltages to determine a coarse code and a second set of ramping voltages to determine a fine code. In the presence of parasitic capacitances, the reference voltages and the ramp voltages exhibit mismatch that causes the ADC to exhibit non-idealities such as missing codes. Calibration operations may be performed that involve obtaining a first code at a first predetermined input voltage level and obtaining a second code at a second predetermined input voltage level. A code correction value can then be computed based on the first and second codes. The code correction value can be selectively applied to the final ADC code to correct for missing codes. 1. A method of operating an imaging device having an image sensor pixel , comprising:generating an image signal with the image sensor pixel;obtaining a coarse code by comparing the image signal to a predetermined threshold signal;obtaining a fine code by comparing the image signal to a ramping voltage signal;combining the coarse code and the fine code to produce a raw output code; andselectively applying a correction amount to the raw output code when the coarse code has a given value.2. The method defined in claim 1 , wherein applying the correction amount comprises applying the correction amount to the raw output code only when the coarse code has the given value.3. The method defined in claim 1 , further comprising:when the coarse code has a value other than the given value, outputting the raw output code without applying the correction amount.4. The method defined in claim 1 , wherein the imaging device includes a sub-ranged ramp analog-to-digital converter claim 1 , and wherein obtaining the coarse and fine codes comprises obtaining the coarse and fine codes with the sub-ranged ramp analog-to-digital converter.5. The ...

SOLID-STATE IMAGING DEVICE AND CAMERA SYSTEM

A solid-state imaging device and a camera system are provided. The solid-state imaging device capable of performing an intermittent operation includes a pixel unit and a pixel signal readout unit for reading out a pixel signal from the pixel unit in units of a plurality of pixels for each column. The pixel signal readout circuit includes a plurality of comparators and a plurality of counters whose operations are controlled by outputs of the comparators. Each of the comparators includes an initializing switch for determining an operating point for each column at a start of row operation, and is configured so that an initialization signal to be applied to the initializing switch is controlled independently in parallel only a basic unit of the initialization signal used for a horizontal intermittent operation, and the initializing switch is held in an off-state at a start of non-operating row. 16-. (canceled)7. An image data processing circuit comprising:a plurality of analog-to-digital converters, each respectively configured to convert an analog signal to a digital signal, each of the plurality of analog-to-digital converters including;a comparator unit configured to compare the analog signal with a reference voltage to output a determination signal;a storing unit configured to store a digital signal corresponding to the analog signal based on the determination signal;wherein an initializing switch sets an initial operating point before analog-to-digital conversion operation is initiated, and an intermittent operation includes at least one non-operating analog-to-digital converter,a first group of the initializing switches corresponding to operating analog-to-digital converters is in an ON state; anda second group of the initializing switches corresponding to non-operating analog-to-digital converters is periodically in an OFF-state, and further wherein the second group of initializing switches are selectively turned off during an image data thinning mode.8. An ...

MEMORY-ENHANCED IMAGE SENSOR

An image sensor IC may have a non-volatile memory for several functions. The functions may include storing control parameters for a camera autofocus module, part tracking data, and data for defect correction or color science. The non-volatile memory can in particular be an antifuse non-volatile memory, which may not need special light shielding. 139-. (canceled)40. An image sensor integrated circuit (IC) comprising:a substrate;an image sensing pixel array on said substrate;an antifuse non-volatile memory on said substrate storing at least data associated with part-tracking; anda volatile memory on said substrate and configured to permit writing contents of said antifuse non-volatile memory into a region thereof, and to permit re-writing of the contents back into another region thereof.41. The image sensor IC of claim 40 , wherein the data for part-tracking comprises at least one of a sensor ID claim 40 , a date of manufacture claim 40 , and a sales region ID.42. The image sensor IC of claim 40 , wherein the data for part-tracking comprises at least one of a tester ID claim 40 , and test results.43. The image sensor IC of claim 40 , wherein the data for part-tracking comprises at least one of a wafer ID claim 40 , and a die ID.44. The image sensor IC of claim 40 , wherein said image sensing pixel array comprises a CMOS image sensing pixel array.45. An image sensor integrated circuit (IC) comprising:a substrate;an image sensing pixel array on said substrate;an antifuse non-volatile memory on said substrate storing at least data associated with defect correction; anda volatile memory on said substrate and configured to permit writing contents of said antifuse non-volatile memory into a region thereof, and to permit re-writing of the contents back into another region thereof.46. The image sensor IC of claim 45 , wherein the data associated with defect correction comprises locations of defective pixels.47. The image sensor IC of claim 45 , wherein the data associated ...

LIGHT PROPAGATION TIME CAMERA

A time-of-flight camera includes a photosensor and a reference photosensor. Each of the photosensors have accumulation gates and each are configured as a photomixing detector (PMD). A readout device is connected to the accumulation gates of the photosensor and to the accumulation gates of the reference photosensor. The readout device is configured to read out an electric quantity that corresponds to a charge that is present at respective ones of the accumulation gates. An integration time of accumulating the charges is the same for the photosensor and for the reference photosensor and is dimensioned so as to prevent the reference photosensor from reaching saturation during operation of the time-of-flight camera. 17-. (canceled)8. A time-of-flight camera , comprising:a photosensor and is reference photosensor, each of the photosensors having accumulation gates and being configured as a photomixing detector (PMD); anda readout device connected to the accumulation gates of the photosensor and to the accumulation gates of the reference photosensor, wherein the readout device is configured to read out an electric quantity that corresponds to a charge that is present at respective ones of the accumulation gates, an integration time of accumulating the charges being the same for the photosensor and for the reference photosensor and being dimensioned so as to prevent the reference photosensor from reaching saturation during operation of the time-of-flight camera.9. The time-of-flight camera according to claim 8 , wherein at least an individual PMD pixel of the reference photosensor and at least an individual PMD pixel of the photosensor have essentially the same physical and electric properties.10. The time-of-flight camera according to claim 8 , wherein the reference photosensor and the photosensor are structured as a joint photosensor component.11. The time-of-flight camera according to claim 8 , wherein the readout device is configured to sequentially integrate the ...

SOLID STATE IMAGE SENSOR AND METHOD FOR DRIVING THE SAME

A transistor () which acts as a load-current source for a source follower amplifying transistor () for outputting a pixel signal to a pixel output line () is provided in each picture element (), whereby a high bias current is prevented from passing through the high-resistance pixel output line (), so that a variation in an offset voltage among picture elements is suppressed. Inclusion of the high-resistance pixel output line () into the source follower amplification circuit is also avoided, whereby the gain characteristics are prevented from deterioration. Thus, the S/N ratio of the picture element is improved so as to enhance the quality of the images. 3. The solid-state image sensor according to claim 2 , wherein:the buffer circuit includes a selector switch for turning on and off an operation of the current driver.4. The solid-state image sensor according to claim 1 , wherein:a relay amplifier is provided in each of the pixel output lines, and a plurality of relay-amplifier areas formed along an extending direction of the pixel output lines are provided inside the memory area in order to arrange the relay amplifiers.5. The solid-state image sensor according to claim 2 ,a relay amplifier is provided in each of the pixel output lines, and a plurality of relay-amplifier areas formed along an extending direction of the pixel output lines are provided inside the memory area in order to arrange the relay amplifiers.7. The method for driving the solid-state image sensor according to claim 6 , wherein:the N picture elements to be connected to the same pixel output line are an even number of picture elements neighboring each other in a vertical direction, and the driving operation in the second driving mode is performed in such a manner that only a total of N/2 picture elements located at alternating positions in the vertical direction are used among each group of the N picture elements and the thereby used picture elements are located at alternating positions in each row ...

Image pickup apparatus, method for driving image pickup apparatus, image pickup system

There is provided an image pickup apparatus which outputs a digital signal based on a comparison result signal that changes the signal value at Nth (where N is an integer of 1 or higher) among comparison result signals output by a plurality of comparators.

OFFSET INJECTION IN AN ANALOG-TO-DIGITAL CONVERTER

An electronic device may have one or more analog-to-digital converters (ADCs). The ADCs may be used in digitizing signals from an image sensor. In order to ensure that input signals received by an ADC are not clipped, the input signals may be positively or negatively offset by a desired amount. Offsetting the input signals may ensure that the offset input signals wall within the acceptable input range of the ADCs. Offset injection may be accomplished using capacitors that are also used for analog-to-digital conversion. As an example, the ADC may be a successive approximation-type ADC that uses capacitors in a binary search for the digital value most accurately representing an input analog value. The capacitors of the ADC may be used for the successive approximation process and for offset injection. The offset injection may be digitally canceled out following digitization of the input analog signal. 1. A method of operating an analog-to-digital converter , wherein the analog-to-digital converter comprises a plurality of capacitors each having a first terminal and a second terminal , a plurality of switches , at least a first conductive line at a first reference voltage , and at least a second conductive line at a second reference voltage that is different from the first reference voltage , wherein each of the switches is associated with the first terminal of a respective one of the capacitors , wherein each of the switches has a first configuration in which that switch couples the first terminal of its associated capacitor to the first conductive line at the first reference voltage and has a second configuration in which that switch couples the first terminal of its associated capacitor to the second conductive line at the second reference voltage , the method comprising:setting at least one of the switches in its first configuration and setting at least one of the switches in its second configuration;while at least the one of the switches is set in its first ...

Method and apparatus providing pixel storage gate charge sensing for electronic stabilization in imagers

An imaging device that stores charge from a photosensor under at least one storage gate. A driver used to operate the at least one storage gate, senses how much charge was transferred to the storage gate. The sensed charge is used to obtain at least one signature of the image scene. The at least one signature may then be used for processing such as e.g., motion detection, auto-exposure, and auto-white balancing.

SOLID-STATE IMAGING ELEMENT, METHOD OF DRIVING SOLID-STATE IMAGING ELEMENT, AND IMAGING DEVICE

A solid-state imaging element includes a control unit that performs, in each frame, driving to inject electric charge into a storage unit from a power source supplying reset voltage by controlling the reset voltage supplied to a reset Tr and to discharge some of the electric charge that has been injected into the storage unit to the power source by controlling the reset voltage. 1. A solid-state imaging element that has a photoelectric converting layer that is formed above a semiconductor substrate and made of an organic material , and an MOS type signal readout circuit that is formed on the semiconductor substrate and reads out signals according to electric charge generated in the photoelectric converting layer ,wherein the signal readout circuit includes a first electric charge storage unit that stores electric charge generated in the photoelectric converting layer, a second electric charge storage unit to which the electric charge stored in the first electric charge storage unit is transferred, a transfer transistor that transfers the electric charge stored in the first electric charge storage unit to the second electric charge storage unit, a reset transistor that resets a potential of the second electric charge storage unit, and an output transistor that outputs a signal according to the potential of the second electric charge storage unit, andwherein the solid-state imaging element comprises:a control unit that performs, in each frame, driving to inject electric charge into the first electric charge storage unit from a semiconductor region by changing a potential of the semiconductor region in which a power source of the reset transistor is connected from a deep state to a shallow state, and to discharge the electric charge that has been injected into the first electric charge storage unit to the semiconductor region by changing, from this state, the potential of the semiconductor region from the shallow state to a deep state.2. The solid-state imaging element ...

SOLID-STATE IMAGING ELEMENT AND CAMERA SYSTEM

Disclosed herein is a solid-state imaging element including a pixel unit configured to include a plurality of pixels arranged in a matrix and a pixel signal readout unit configured to include an analog-digital conversion unit that carries out analog-digital conversion of a pixel signal read out from the pixel unit. Each one of the pixels in the pixel unit includes a plurality of divided pixels arising from division into regions different from each other in optical sensitivity or a charge accumulation amount. The pixel signal readout unit reads out divided-pixel signals of the divided pixels in the pixel. The analog-digital conversion unit carries out analog-digital conversion of the divided-pixel signals that are read out and adds the divided-pixel signals to each other to obtain a pixel signal of one pixel. 118-. (canceled)19. A solid-state imaging device comprising:a pixel unit including a plurality of pixels, each which having one or more photoelectric conversion element;the pixel unit including a first pixel group having a first exposure time and a second pixel group having a second exposure time;wherein the first exposure time is different from the second exposure time.201. The solid-state imaging device according to the claim , wherein the first pixel group has a first sensitivity.211. The solid-state imaging device according to the claim , wherein the second pixel group has a second sensitivity.221. The solid-state imaging device according to the claim , wherein the first pixel group is configured to convert light into a first signal charge , a first bit accuracy being used to convert said first signal charge into a first digital signal.231. The solid-state imaging device according to the claim , wherein the second pixel group is configured to convert said light into a second signal charge , a second bit accuracy being used to convert said second signal charge into a second digital signal.241. The solid-state imaging device according to the claim , wherein ...

IMAGE PICKUP APPARATUS, METHOD FOR DRIVING IMAGE PICKUP APPARATUS, IMAGE PICKUP SYSTEM, AND METHOD FOR DRIVING IMAGE PICKUP SYSTEM

An image pickup apparatus, a method for driving the image pickup apparatus, an image pickup system, and a method for driving the image pickup system output a digital signal based on a difference between signals output from a plurality of pixels and a digital signal based on the sum of the signals output from the pixels. 1. An image pickup apparatus comprising:a first pixel and a second pixel each having a photoelectric conversion unit that generates a signal carrier based on incident light; andan analog-to-digital conversion unit,wherein the first pixel outputs a first photoelectric conversion signal based on the signal carrier,and the second pixel outputs a second photoelectric conversion signal based on the signal carrier,wherein the analog-to-digital conversion unit includes a first comparator that outputs a first comparison result signal having a signal value obtained by comparing the first photoelectric conversion signal with a reference signal having a potential varying in a time-dependent manner and a second comparator that outputs a second comparison result signal having a signal value obtained by comparing the second photoelectric conversion signal with the reference signal, andwherein based on the first comparison result signal and the second comparison result signal, the analog-to-digital conversion unit generates a first digital signal and a second digital signal, the first digital signal is based on a difference between the first photoelectric conversion signal and the second photoelectric conversion signal, and the second digital signal is based on a sum of the first photoelectric conversion signal and the second photoelectric conversion signal.2. The image pickup apparatus according to claim 1 , wherein the analog-to-digital conversion unit further includesfirst and second counters each generating a count signal having a signal value obtained by counting the number of clock pulses anda counter control unit,wherein the counter control unit selects one ...

IMAGE PICKUP DEVICE, IMAGE PICKUP SYSTEM, AND METHOD OF DRIVING IMAGE PICKUP DEVICE

Provided are an image pickup device, a method of driving the image pickup device, and an image pickup system, in which timings of starting operations in a plurality of comparison units to which power supply voltage is applied through a common line are controlled to be different. 1. An image pickup device comprising: a photoelectric conversion unit that generates signal charges,', 'an analog signal output unit that outputs an analog signal based on the signal charges, and', 'a plurality of analog-digital conversion units, each analog-digital conversion unit including a comparison unit for outputting a comparison result signal obtained by comparing the analog signal with a reference signal, and convert the analog signal into a digital signal based on the comparison result signal; and, 'a plurality of pixels that each include'}a control unit that controls timings of starting operations of comparing the analog signal with the reference signal to be different from each other in the plurality of comparison units to which power supply voltage is applied through a common line.2. The image pickup device according to claim 1 , wherein the signal charges are transmitted from the photoelectric conversion unit to the analog signal output unit claim 1 , and the analog signal output unit thereby outputs the analog signal claim 1 , andthe plurality of pixels simultaneously transmits the signal charges from the photoelectric conversion unit to the analog signal output unit.3. The image pickup device according to claim 1 , further comprising:a first block that includes a part of the plurality of pixels; anda second block that includes the other part of the plurality of pixels,wherein the timings of starting the operations of the comparison units provided in the plurality of analog-digital conversion units to which the analog signal is output from the analog signal output unit are different between the first block and the second block.4. The image pickup device according to claim 3 , ...

SOLID-STATE IMAGING DEVICE, METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC DEVICE

A solid-state imaging device includes a pixel array unit composed of pixels including photoelectric conversion elements which are arranged in a matrix, and a pixel drive unit configured to perform a row selection operation of simultaneously selecting plural rows when a row is selected in accordance with an address signal for the respective pixels in the pixel array unit in a read period where signals are read out from the pixels. 1. A solid-state imaging device comprising:a pixel array unit composed of pixels including photoelectric conversion elements which are arranged in a matrix; anda pixel drive unit configured to perform a row selection operation of simultaneously selecting plural rows when a row is selected in accordance with an address signal for the respective pixels in the pixel array unit in a read period where signals are read out from the pixels.2. The solid-state imaging device according to claim 1 ,wherein the pixel drive unit performs the row selection operation of simultaneously selecting the plural rows in a settling period of an analog circuit configured to process the signals read out from the pixels.3. The solid-state imaging device according to claim 1 ,wherein the pixel drive unit performs in a current read period the row selection operation on read rows where a signal read of the pixels is conducted in the current read period and the row selection operation on reset rows where a reset of the pixels is conducted in a next read period.4. The solid-state imaging device according to claim 3 , further comprising:an AD converter configured to sequentially digitize analog reset levels and signal levels read out from the pixels,wherein the pixel drive unit performs the row selection operation on the reset rows where the reset of the pixels is conducted in the next read period, in the settling period of the analog circuit configured to process the signals read out from the pixels and an AD conversion period for the signal levels.5. The solid-state ...

IMAGE PICKUP UNIT AND IMAGE PICKUP DISPLAY SYSTEM

An image pickup unit includes: a plurality of pixels each including a photoelectric conversion device and a field-effect transistor; and a readout control line and a signal line that are disposed in a peripheral region of the photoelectric conversion device and are connected to the transistor. The readout control line includes a first wiring layer and a second wiring layer that are laminated and are electrically connected to each other. The first wiring layer is electrically connected to a gate electrode of the transistor, and the second wiring layer is provided in a same layer as the signal line. 2. The image pickup section according to wherein the first wiring layer and second wiring layer are laminated.3. The image pickup section according to wherein the second wiring layer is divided into at least two sections and the first wiring layer extends across each section of the second wiring layer.4. The image pickup section according to wherein the photoelectric conversion device is configured to receive incident light and generate an electric charge corresponding to the incident light.5. The image pickup section according to wherein a portion of the first wiring layer is removed.6. The image pickup section according to wherein the photoelectric conversion device comprises a first type semiconductor layer claim 1 , an intrinsic semiconductor layer claim 1 , and a second type semiconductor layer.7. The image pickup section according to wherein the first type semiconductor layer comprises at least one of a low temperature poly-silicon claim 6 , an amorphous silicon claim 6 , and a micro-crystal silicon.8. An image pickup display system comprising:an image pickup unit; and wherein,', 'the image pickup unit comprises (a) an image pickup section including a plurality of pixels arranged in a matrix, (b) a row scanning section, (c) an A/D conversion section, (d) a column scanning section, and (e) a system control section configured to control the row scanning section, the A/ ...

DISTRIBUTED SENSOR GRID, SURFACE, AND SKIN SYSTEMS AND METHODS

The present disclosure provides distributed sensor grid, surface, and skin systems and methods that utilize compressive sampling systems and methods for reading and processing the outputs of sensor arrays (serial and/or parallel) such that increased speed can be achieved. These sensor arrays can be functionalized or sensitized in any desired manner and functions are derived from the outputs, as opposed to individual data points. The sensor arrays can be made in the form of a textile, a fiber optic network, a MEMS network, or a CMOS camera, for example. In general, in accordance with the systems and methods of the present disclosure, a Code is applied to a distributed sensor as part of the compressive sampling technique and derives the functions. 1. A distributed sensor system , comprising:a distributed sensor array comprising a plurality of sensor units and one or more outputs; andone or more Codes applied to the plurality of sensor units;wherein the one or more Codes provide one or more functions that are read out at the one or more outputs, thereby allowing for the compressive sampling of the plurality of sensor units.2. The distributed sensor system of claim 1 , wherein the distributed sensor array comprises one of a linear sensor array claim 1 , a sensor grid claim 1 , and a sensor matrix.3. The distributed sensor system of claim 1 , wherein the distributed sensor array makes up one of a sensor surface claim 1 , a sensor fabric claim 1 , and a sensor skin.4. The distributed sensor system of claim 1 , wherein the distributed sensor array is manufactured using one of a fiber optic manufacturing technique claim 1 , a textile fabric manufacturing technique claim 1 , a photodiode fabrication technique claim 1 , and a micro-electromechanical system manufacturing technique.5. The distributed sensor system of claim 1 , wherein the distributed sensor array comprises one or more Single Output Distributed Sensor(s).6. The distributed sensor system of claim 1 , wherein the ...

IMAGING ELEMENT AND IMAGING APPARATUS

An imaging element includes a pixel array which has a plurality of pixels arranged in a two-dimensional matrix, and a plurality of signal output terminals which are provided to correspond to the pixel columns of the pixel array and output the signals of the pixels in the pixel columns. In the plurality of signal output terminals, each predetermined number of signal output terminals is arranged as a set in the column direction of the pixel array. The sets of the predetermined number of signal output terminals are arranged in the row direction of the pixel array. 1. An imaging element comprising:a pixel array which has a plurality of pixels arranged in a two-dimensional matrix; anda plurality of signal output terminals which are provided to correspond to the pixel columns of the pixel array and output the signals of the pixels in the pixel columns,wherein, in the plurality of signal output terminals, each predetermined number of signal output terminals are arranged as a set in the column direction of the pixel array, andthe sets of the predetermined number of signal output terminals are arranged in the row direction of the pixel array.2. The imaging element according to claim 1 ,wherein the sets of the predetermined number of signal output terminals are arranged in the row direction of the pixel array at intervals obtained by multiplying a pitch of the pixel columns by the predetermined number.3. The imaging element according to claim 2 ,{'b': '3', 'wherein the predetermined number is greater than or equal to .'}4. An imaging apparatus comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the imaging element according to ; and'}first connection terminals which are provided to correspond to the connecting terminals and are connected to the connecting terminals.5. The imaging apparatus according to claim 4 , further comprising:signal processing units which process signals output from the imaging element;second connection terminals which are provided to ...

IMAGING APPARATUS, IMAGING SYSTEM, METHOD OF CONTROLLING THE APPARATUS AND THE SYSTEM, AND PROGRAM

An imaging apparatus includes a conversion unit including a plurality of pixels arranged in a matrix, each pixel including a conversion element, an output switch element, and an initialization switch element; an output drive circuit controls an output operation; an initialization drive circuit controls an initialization operation; and a readout circuit performs a signal sample-and-hold operation and a reset operation. A control unit performs termination of the output operation of a certain row and start of the output operation of another row after the termination of the reset operation, the start of the signal sample-and-hold operation after the termination of the output operation of the certain row and the start of the output operation of the other row, the start of the reset operation and the initialization operation after the termination of the signal sample-and-hold operation, and the termination of the reset operation after the termination of the initialization operation. 1. An imaging apparatus comprising:a conversion unit including a plurality of pixels arranged in a matrix of rows and columns, each pixel including a conversion element that has a semiconductor layer arranged between a first electrode and a second electrode and being adapted to convert radiation or light into an electric charge, an output switch element that has one of two main terminals electrically connected to the first electrode and is adapted to perform an output operation to be in a conductive state to output an electrical signal based on the electric charge of the conversion element, and an initialization switch element that has one of two main terminals electrically connected to the first electrode and is adapted to perform an initialization operation to initialize the conversion element and that is provided separately from the output switch element in a conductive state;an output drive circuit adapted to control the output operation in units of rows;an initialization drive circuit ...

IMAGE PICKUP APPARATUS

There is provided an image pickup apparatus including a pixel including a photoelectric conversion element and an amplification element for amplifying and outputting a signal generated at the photoelectric conversion element, a load transistor for controlling an electric current flowing at the amplification element, and a potential control element for suppressing potential fluctuation in a first main electrode region of the load transistor which is an output side of the amplification element. 1. An image pickup apparatus comprising:a pixel including a photoelectric conversion element and an amplification element arranged to amplify and output a signal generated at photoelectric conversion element;a load transistor arranged to control an electric current flowing at said amplification element; anda potential control element arranged to suppress potential fluctuation in a first main electrode region of said load transistor which is an output side of said amplification element.2. An image pickup apparatus according to claim 1 , wherein said potential control element is a control transistor connected serially to the first main electrode region.3. An image pickup apparatus according to claim 2 , further comprising a drive circuit arranged to apply a constant first voltage to a control electrode region of said control transistor both during a period when the signal from said amplification element is being read and during a period when the signal from said amplification element is not being read.4. An image pickup apparatus according to claim 2 , further comprising a drive circuit arranged to apply a constant first voltage to a control electrode region of said control transistor during a period when the signal from said amplification element is being read out claim 2 , and apply a voltage lower than the first voltage to the control electrode region of the control transistor or apply a ground level during a period when the signal from said amplification element is not being ...

SINGLE-ELECTRON DETECTION METHOD AND APPARATUS FOR SOLID-STATE INTENSITY IMAGE SENSORS

Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels. 1. A charge counter , comprising:a charge-coupled device (CCD) register to output a charge packet;a charge-splitting device, operably coupled to the CCD register, to split a first charged particle from the charge packet; andan array of Geiger-mode avalanche diodes, operably coupled to the charge-splitting device, the array comprising a first Geiger-mode avalanche diode to receive the first charged particle and to provide a pulse indicative of a presence of the first charged particle at the first Geiger-mode avalanche diode.2. The charge counter of claim 1 , wherein the charge-splitting device is configured to deliver no more than one charged particle at a time to the first Geiger-mode avalanche diode.3. The charge counter of claim 1 , wherein the charge-splitting device comprises a forked CCD register to split the charge packet into a plurality of charged particles and to deliver each charged particle in the plurality of charged particles to a corresponding Geiger-mode avalanche diode in the array of Geiger-mode avalanche diodes.4. The charge counter of claim 3 , wherein the forked CCD register ...

IMAGE SENSOR CIRCUIT

The controlling circuit of the image censor circuit controls the row decoder to address the light receiving cell with the address signal to turn on the first MOS transistor and turns on the switch circuit with a switch controlling signal, and then controls the row decoder to turn off the first MOS transistor and then turns off the switch circuit with the switch controlling signal. 1. An image sensor circuit , comprising:a column line connected to a sample holding terminal;a light receiving cell including a first MOS transistor that is connected between a power supply and the column line and receives an address signal at a gate thereof and a second MOS transistor that is connected in series with the first MOS transistor between the power supply and the column line and receives a voltage responsive to received light at a gate thereof;a row decoder that generates the address signal that addresses the light receiving cell;a sample holding circuit including a current source that is connected between the column line and a ground and outputs a constant current and a switch circuit connected in series with the current source between the column line and the ground; anda controlling circuit that controls the row decoder and the switch circuit of the sample holding circuit,wherein the controlling circuitcontrols the row decoder to address the light receiving cell with the address signal to turn on the first MOS transistor and turns on the switch circuit with a switch controlling signal, and thencontrols the row decoder to turn off the first MOS transistor and then turns off the switch circuit with the switch controlling signal.2. The image sensor circuit according to claim 1 , wherein the controlling circuit turns off the switch circuit after a lapse of a prescribed time after the first MOS transistor is turned off.3. The image sensor circuit according to claim 1 , wherein the controlling circuit turns on the first MOS transistor and the switch circuit in synchronization with ...

GLOBAL SHUTTER WITH DUAL STORAGE

A sensor includes an array of pixels, and a global shutter configured to expose the array of pixels. Each pixel includes storage elements configured to independently store successive frames within a predetermined time period. Each storage element is configured to be independently read out. 131-. (canceled)32. A sensor comprising:an array of pixels, with each pixel comprising a plurality of storage elements configured to independently store a plurality of successive frames within a predetermined time period, and with each storage element being configured to be independently read out; anda global shutter configured to expose the array of pixels.3331. The sensor of claim , wherein the storage elements are configured to be read out simultaneously.3431. The sensor of claim , further comprising a single bit line configured to read out the storage elements.3531. The sensor of claim , further comprising a plurality of bit lines , each storage element being configured to be read out via a different bit line.36. The sensor of claim 35 , wherein the plurality of bit lines comprises two bit lines claim 35 , and wherein the plurality of storage elements comprises two storage elements.3731. The sensor of claim claim 35 , wherein each storage element comprises at least one transistor.3831. The sensor of claim claim 35 , wherein each storage elements comprises at least one capacitor.3931. The sensor of claim claim 35 , further comprising processing circuitry coupled to the plurality of storage elements and configured to process a plurality of successive frames so as to determine ambient light conditions.4031. The sensor of claim claim 35 , further comprising processing circuitry coupled to the plurality of storage elements and configured to process a plurality of successive frames so as to determine movement of an object from one frame to a successive frame.41. The sensor of claim 40 , wherein the processing circuitry generates a control signal based on movement of the object.42. ...

IMAGE SENSOR

An image sensor includes a plurality of self-resetting pixels including: a mechanism converting detected electromagnetic energy into a proportional electric current; an integrating capacitor including a mechanism for fast charging to a first electric level and for controlled discharging to a second electric level; a mechanism for comparing the controlled discharge; a loopback mechanism, allowing automatic repetition of fast charging and controlled discharging cycles and counting of number of cycles occurring during a determined integration time; a mechanism measuring a residual electric charge present in the integrating capacitor on completion of the integration period; and a calibration mechanism using the measurement mechanism to measure and compensate for operating and production dispersions specific to each pixel. 113-. (canceled)14. An image sensor comprising a plurality of pixels and comprising , for each pixel:means for converting electromagnetic energy detected by the pixel into an electric current proportional to the energy;a first integrating capacitor and means to cause a charge of the first capacitor to a first electric level and a discharge of the first capacitor to a second electric level, one of the discharge and the charge being controlled by the proportional electric current, the other one of the charge or the discharge being controlled by an electric current flowing through a reset switch;loopback means allowing automatic repetition of charging and discharging of the first capacitor during charging and discharging cycles, the loopback means including a comparator having an input connected to the first capacitor, with the comparator output being connected to the reset switch;counting means configured to count a number of cycles occurring during a given integration time in the first capacitor;means for measuring a residual electric charge present in the first capacitor after a time of integration;processing means configured to provide a digital value ...

Radiographic imaging device

The present invention provides a radiographic imaging including, provided at an insulating substrate, sensor portions for radiation detection that generate charges due to receive radiation or light converted from radiation, first signal lines that are connected to the sensor portions for radiation detection and through which flow electric signals that correspond to the charges generated at the sensor portions for radiation detection, and second signal lines having a substantially same wiring pattern as the first signal lines. Detection of radiation is carried out on the basis of a difference between an electric signal flowing through the first signal line and an electric signal flowing through the second signal line, or a difference between values of digital data obtained by digitally converting an electric signal flowing through the first signal line and an electric signal flowing through the second signal line, respectively.

METHOD OF VARYING GAIN, VARIABLE GAIN PHOTOELECTRIC CONVERSION DEVICE, VARIABLE GAIN PHOTOELECTRIC CONVERSION CELL, VARIABLE GAIN PHOTOELECTRIC CONVERSION ARRAY, METHOD OF READING OUT THEREOF, AND CIRCUIT THEREOF

Expansion of the dynamic range was difficult in conventional amplifying photoelectric conversion devices designed to have a large gain because, when used for high input light intensity, the electric current exceeds the electric current capacity of a near-minimum sized transistor obtained with the design rules. Also, in conventional photoelectric conversion devices, techniques for varying the electric signal outputs in real-time at the device level are necessary for real-time import of observation targets or images having a high contrast ratio and for visualization of local areas in real-time. In order to solve this problem, the present invention provides a gain varying method, a variable gain photoelectric conversion device, a photoelectric conversion cell, a photoelectric conversion array, a read-out method thereof, and a circuit therefor in which amplifying photoelectric conversion devices and field-effect transistors are combined. 1. A method of varying gain of an amplifying photoelectric conversion device , an amplifying photoelectric conversion cell or an amplifying photoelectric conversion array which includes:an amplifying photoelectric conversion part including a photoelectric conversion element and one or a plurality of transistor(s) each having a collector, a base and an emitter,the photoelectric conversion element being connected to a base of a transistor selected from the one or plurality of transistor(s),the photoelectric conversion element being an element which performs photoelectric conversion of optical information input including light intensity or light wavelength to an electric variable including electric current, electric charge, voltage or electric resistance variation,at least one of the collector(s) of the one or plurality of transistor(s) being a first output section,one of the emitter(s) of the one or plurality of transistor(s) being a second output section,the emitter(s) of the one or plurality of transistors other than the second output ...

IMAGE SENSOR AND IMAGE CAPTURING SYSTEM

An image sensor in which a plurality of pixels are arrayed in a row direction and a column direction, and an A/D converter is provided on each column of the plurality of pixels. The A/D converter performs one of charge and discharge from an initial value which is a voltage corresponding to an output signal from a pixel, outputs, as a digital value of the output signal, a value corresponding to a time taken for the voltage to become higher or lower than a predetermined reference voltage, and changes one of an amount of charge and an amount of discharge per unit time according to a possible value of the output signal. 1. An image sensor in which a plurality of pixels are arrayed in a row direction and a column direction , and an A/D converter is provided on each column of the plurality of pixels , wherein said A/D converter performs one of charge and discharge from an initial value which is a voltage corresponding to an output signal from a pixel , outputs , as a digital value of the output signal , a value corresponding to a time taken for the voltage to become higher or lower than a predetermined reference voltage , and changes one of an amount of charge and an amount of discharge per unit time according to a possible value of the output signal.2. The sensor according to claim 1 , wherein said A/D converter starts one of charge and discharge claim 1 , performs the other one of charge and discharge after the voltage becomes higher or lower than the reference voltage for the first time claim 1 , and then further outputs claim 1 , as a digital value of the output signal claim 1 , a value corresponding to a time taken to become lower or higher than the reference voltage.3. An image capturing system comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'an image sensor according to ; and'}control unit for controlling drive of said image sensor,wherein said control unit controls drive of said image sensor so that one of an amount of charge and an amount of ...

IMAGE SENSOR

An image sensor comprises a pixel portion formed by arraying pixels including photoelectric conversion portions in a matrix, a plurality of A/D converters which are provided in a one-to-one correspondence to pixel columns of the pixel portion, an adding unit which adds pixel signals from a plurality of pixel columns to each other, and a connecting portion capable of inputting, to an arbitrary A/D converter, a sum signal obtained by adding the pixel signals by the adding unit. 1. An image sensor comprising:a pixel portion formed by arraying pixels including photoelectric conversion portions in a matrix;a plurality of A/D converters which are provided in a one-to-one correspondence to pixel columns of said pixel portion;an adding unit which adds pixel signals from a plurality of pixel columns to each other; anda connecting portion capable of inputting, to an arbitrary A/D converter, a sum signal obtained by adding the pixel signals by said adding unit.2. The sensor according to claim 1 , further comprising an input unit which distributes and inputs claim 1 , to said plurality of A/D converters for each row claim 1 , sum signals obtained by adding the pixel signals by said adding unit.3. The sensor according to claim 1 , wherein an identical sum signal is input to said plurality of A/D converters.4. The sensor according to claim 1 , wherein said adding unit adds pixel signals from pixels of an identical color to each other.5. The sensor according to claim 1 , wherein said adding unit adds pixel signals from pixels on an identical row on different pixel columns to each other.6. The sensor according to claim 2 , wherein the signals distributed to said A/D converters are simultaneously A/D converted.7. The sensor according to claim 1 , wherein each pixel column includes a plurality of column output lines claim 1 , and pixels on an identical pixel column is connected to one of the plurality of column output lines.8. The sensor according to claim 7 , wherein said adding ...

A/D CONVERTER, IMAGE SENSOR DEVICE, AND METHOD OF GENERATING DIGITAL SIGNAL FROM ANALOG SIGNAL

According to this A/D converter, a first A/D conversion operation for performing integral A/D conversion and a second A/D conversion operation for performing cyclic A/D conversion are realized based on control of operational procedures in a same circuit configuration. Moreover, in the first A/D conversion operation, since a capacity of a capacitor used in the integration of an output signal is greater than a capacity of a capacitor used for storing an input analog signal and a standard reference voltage, the analog signal that is input in the integral A/D conversion is attenuated according to the capacity ratio and subject to sampling and integration. Consequently, the voltage range of the analog signal that is output in the integral A/D conversion also decreases according to the capacity ratio of the capacitors, and the A/D converter can be therefore constructed with a single-ended configuration. 1. A single-ended A/D converter , comprising:a gain stage which includes an input for receiving an analog signal to be converted into a digital value, an output, and an operational amplifier circuit having a first input, a second input and an output;an A/D conversion circuit which refers to a conversion reference voltage and generates a digital signal including one or more bits based on a signal from the output of the gain stage;a logical circuit which generates a control signal according to the digital signal; anda D/A conversion circuit which has first and second outputs, and provides at least a first standard reference voltage or a second standard reference voltage to the gain stage via the first and second outputs in accordance with the control signal, whereinthe gain stage includes first to third capacitors,a capacity of the third capacitor is greater than capacities of the first and second capacitors,the second input of the operational amplifier circuit receives a reference potential,the first standard reference voltage is higher than the second standard reference ...

SOLID-STATE IMAGE PICKUP DEVICE AND DRIVING METHOD THEREOF, AND ELECTRONIC APPARATUS

A solid-state image pickup device including a plurality of pixels and a scanning unit. Each pixel includes a photoelectric conversion element and a charge accumulation region. The scanning unit is configured to read a first signal from a charge accumulation region. The scanning unit is configured to read a second signal from the charge accumulation region. The first signal corresponds to an accumulation of signal charges during a first period, while the second signal corresponds to another accumulation of signal charges during a second period. 1. A solid-state image pickup device , comprising:a pixel array unit in which unit pixels are arranged two-dimensionally in matrix, each unit pixel including (a) a photoelectric conversion part that accumulates a charge generated by electric conversion, (b) a first transfer structure that transfers said charge from said photoelectric conversion part to a first charge accumulation portion, (c) a second transfer structure that transfers said charge from said first charge accumulation portion to a second charge accumulation portion, (d) a readout structure that reads out a signal in response to said charge to a signal line and(e) a reset structure that resets said second charge accumulation portion; anda row driving unit driving said unit pixel, (a) said first transfer structure transfers said charge stored in said photoelectric conversion part during first accumulation period to said first charge accumulation portion,', '(b) said second transfer structure and said readout structure read out a first signal to said signal line in response to said charge of said first charge accumulation portion, and then', '(c) said first transfer structure, said second transfer structure, and said readout structure read out a second signal to said signal line in response to said charge of said photoelectric conversion part during a second accumulation period., 'wherein said row driving unit is configured such that'}2. The solid-state image pickup ...

SOLID-STATE IMAGING APPARATUS WITH PLURAL READOUT MODES, AND ELECTRONIC EQUIPMENT

A solid-state imaging apparatus includes: a pixel array section in which pixels including photoelectric conversion elements are two-dimensionally arranged in a matrix form, and a plurality of systematic pixel drive lines to transmit drive signals to read out signals from the pixels are arranged for each pixel row; and a row scanning section to simultaneously output the drive signals through the plurality of systematic pixel drive lines to a plurality of pixel rows for different pixel columns. 2. The solid-state imaging apparatus according to claim 1 , wherein the control signal includes a drive signal to read out signals from the pixels.3. The solid-state imaging apparatus according to claim 2 , wherein the row scanning section successively outputs the drive signal to the respective pixel rows of the pixel array.5. The method according to claim 4 , the outputting the control signal includes outputting a drive signal to read out signals from the pixels.6. The solid-state imaging apparatus according to claim 5 , the outputting the drive signal includes successively outputting the drive signal to the respective pixel rows. This is a Continuation Application of the U.S. patent application Ser. No. 12/662,421, filed Apr. 16, 2010, which claims priority from Japanese Patent Application No. 2009-114250 filed in the Japanese Patent Office on May 11, 2009, the entire content of which are incorporated herein by reference.1. Field of the InventionThe present invention relates to a solid-state imaging apparatus, a driving method of the solid-state imaging apparatus and an electronic equipment.2. Description of the Related ArtAn imaging apparatus, such as a digital still camera, to convert light into an electric signal and to output an image signal includes a solid-state imaging apparatus as an image capture section (photoelectric conversion section). In the field of the solid-state imaging apparatus, in recent years, as the number of pixels is increased and a frame rate is ...

Image Capture Accelerator

An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode. 1. An image capture accelerator , comprising: a pre-processing engine configured to perform accelerated processing on received image data, and', 'a compression engine configured to compress processed image data received from the pre-processing engine;, 'accelerator circuitry comprisinga demultiplexer configured to receive image data captured by an image sensor array, the demultiplexer configured to output the received image data to an image signal processor (“ISP”) when the image data is captured by the image sensor array in a first capture mode, and configured to output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in a second capture mode; andan output interface configured to output the compressed image data.2. The image capture accelerator of claim 1 , wherein the pre-processing engine is configured to perform one or more of the following processing operations: clean Bayer processing claim 1 , noise reduction claim 1 , tone mapping claim 1 , and image data ...

PHOTON SEPARATION, ENCODING, MULTIPLEXING AND IMAGING

A method and device for obtaining information from a scene. A beam of photons associated with a scene is separated into a plurality of photon sub-beams. At least two photon sub-beams are optically encoded to generate at least two corresponding encoded photon sub-beams. Each encoded photon sub-beam is encoded based on a corresponding encoding function. The encoded photon sub-beams are combined to generate a combined photon beam. A detection device detects the combined photon beam to generate image data. The image data is decoded based on the plurality of encoding functions to generate a plurality of sub-images. Each sub-image corresponds to one of the at least two photon sub-beams of the plurality of photon sub-beams. 1. A method for obtaining information from a scene , comprising:separating a beam of photons associated with a scene into a plurality of photon sub-beams based on an attribute of the photons;optically encoding at least two photon sub-beams of the plurality of photon sub-beams to generate at least two corresponding encoded photon sub-beams, each encoded photon sub-beam encoded based on a corresponding encoding function of a plurality of encoding functions;optically combining the encoded photon sub-beams to generate a combined photon beam;detecting, with a detection device, the combined photon beam for the generation of image data; anddecoding the image data based on the plurality of encoding functions to generate a plurality of sub-images, each sub-image corresponding to one of the at least two photon sub-beams of the plurality of photon sub-beams.2. The method of claim 1 , wherein the beam of photons is separated by one of a dichroic spectral splitter claim 1 , a field angle pupil optic claim 1 , a wavelength beamsplitter claim 1 , a phase beamsplitter claim 1 , a polarization beamsplitter claim 1 , a dispersive element claim 1 , a pattern encoding optic claim 1 , a pattern bandpass filter claim 1 , a pattern phase shift filter claim 1 , a binary optic ...

SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS

The invention is directed to a solid-state imaging device in which pixels each including a photoelectric conversion portion formed above a semiconductor substrate and an MOS type signal reading circuit as defined herein are arranged in an array form, wherein: the photoelectric conversion portion includes a pixel electrode, a counter electrode and a photoelectric conversion layer as defined herein; a bias voltage is applied to the counter electrode as defined herein; the signal reading circuit includes a charge storage portion, an output transistor and a protection circuit as defined herein; the protection circuit has an impurity region as defined herein; the output transistor has an impurity region as defined herein; and the impurity regions of the protection circuits and the impurity regions of the output transistors are used in common to every adjacent two of the pixels as defined herein. 1. A solid-state imaging device in which pixels each comprising a photoelectric conversion portion formed above a semiconductor substrate and an MOS type signal reading circuit formed at the semiconductor substrate to read out a signal corresponding to electric charges generated in the photoelectric conversion portion are arranged in an array form , wherein:the photoelectric conversion portion comprises a pixel electrode formed above the semiconductor substrate and split in accordance with each of the pixels, a counter electrode formed above the pixel electrode, and a photoelectric conversion layer formed between the pixel electrode and the counter electrode;a bias voltage higher than a power supply voltage of the signal reading circuit is applied to the counter electrode so that holes of the electric charges generated in the photoelectric conversion layer move to the pixel electrode;the signal reading circuit comprises a charge storage portion which is formed in the semiconductor substrate and in which the holes moved to the pixel electrode are stored, an output transistor which ...

METHOD FOR DRIVING SOLID-STATE IMAGING DEVICE

A method for driving a solid-state imaging device, which includes pixels arranged in a two-dimensional array of m columns in a horizontal scanning direction and n rows in a vertical scanning direction (n is an integer no less than 2 and m is a natural number), includes ending a reset operation on pixels in an i-th row among the pixels when a reset operation on pixels in an (i+1)-th row among the pixels is in progress, or time elapsed from when the reset operation on the pixels in the (i+1)-th row is ended is less than one-frame capturing time, where i is an integer no less than 1 and no greater than (n−1). 12. A method for driving a solid-state imaging device including pixels arranged in a two-dimensional array of m columns in a horizontal scanning direction and n rows in a vertical scanning direction , where n is an integer no less than and m is a natural number , the method comprisingending a reset operation on pixels in an i-th row among the pixels when a reset operation on pixels in an (i+1)-th row among the pixels is in progress, or time elapsed from when the reset operation on the pixels in the (i+1)-th row is ended is less than one-frame capturing time, where i is an integer no less than 1 and no greater than (n−1).2. The method for driving a solid-state imaging device according to claim 1 , further comprising:driving an electronic shutter which provides an accumulation time period of j horizontal scanning periods, where j is an integer no less than 1 and no greater than (n−1); andstarting a reset operation on pixels in an (i+j+1)-th row among the pixels before ending a reset operation on the pixels in the (i+j)-th row, in a scanning period during which pixel signals are read out from the pixels in the i-th row.3. The method for driving a solid-state imaging device according to claim 1 , comprising in the following order:reading out pixel signals in the (i+1)-th row, starting the reset operation on the (i+1)-th row, and ending the reset operation on the i-th ...

SOLID-STATE IMAGE PICKUP DEVICE AND IMAGE PICKUP APPARATUS

A solid-state image pickup device is provided that is capable of effectively reducing color noise caused due to differences between sensitivities of color filters of an optical filter. The image pickup device includes a plurality of pixels arranged in a two dimensional matrix to respectively correspond to color filters. Pixels in odd-numbered rows of respective columns are connected to first column output lines, and pixels in even-numbered rows of respective columns are connected to second column output lines. First and second column units are provided to respectively correspond to the first and second column output lines, and amplify pixel signals output from these column output lines at gains that are set to different values according to the color filters. 1. A solid-state image pickup device that includes a plurality of pixels arranged in a two dimensional matrix to respectively correspond to optical filters for a plurality of colors and includes column output lines to which pixel signals are output from pixels in respective columns in the plurality of pixels , comprising:column amplification units provided to respectively correspond to the column output lines for the respective columns and configured to amplify the pixel signals for output to the column output lines,wherein gains of said column amplification units are set to different values according to the colors of the optical filters.2. The solid-state image pickup device according to claim 1 , wherein each of said column amplification units has a clamp capacitance connected to a corresponding one of the column output lines claim 1 , a column amplifier having an inverting input terminal connected to the clamp capacitance and a non-inverting input terminal applied with a predetermined clamp voltage claim 1 , and a feedback capacitance through which the non-inverting input terminal of the column amplifier is connected to an output terminal of the column amplifier claim 1 ,the gain of each of said column ...

Signal processing system for solid-state imaging device and solid-state imaging device

Provided is a solid-state imaging device that includes capacitors in a number greater than a unit read-out number that are connected to a plurality of pixels via transfer lines, and that performs a step of transferring to and retaining in separate capacitors from each other a noise signal output from the pixels in a number corresponding to the unit read-out number; and a step of repeating, for as many times as the unit read-out number, by switching the pixels and the capacitors, an operation in which a signal-plus-noise signal output from one of the pixels is transferred to and retained in one of the other capacitors, and the noise signal and the signal-plus-noise signal that have been output from the same pixel and retained in separate capacitors are subsequently output at the same time.

VOLTAGE GENERATION CIRCUIT, ANALOG-TO-DIGITAL CONVERSION CIRCUIT, SOLID-STATE IMAGING DEVICE, AND IMAGING APPARATUS

A voltage generation circuit includes a control circuit which outputs a first digital signal, a DAC which outputs a first analog signal corresponding to the first digital signal, and an attenuator which is connected to an output terminal of the DAC and is configured to output a voltage signal obtained by attenuating the first analog signal input from the DAC. 1. A voltage generation circuit comprising:a control circuit configured to output a first digital signal;a digital-to-analog conversion circuit configured to output a first analog signal corresponding to the first digital signal input from the control circuit; andan attenuator connected to an output terminal of the digital-to-analog conversion circuit, and configured to output a voltage signal obtained by attenuating the first analog signal input from the digital-to-analog conversion circuit.2. The voltage generation circuit of claim 1 , whereinthe digital-to-analog conversion circuit includes a ladder resistor circuit including a plurality of resistors, and configured to receive a reference current or a first reference voltage to generate a voltage corresponding to the first digital signal input from the control circuit, and a plurality of first switches provided between respective corresponding taps provided between the plurality of resistors, and the output terminal of the digital-to-analog conversion circuit, and configured to be controlled based on the first digital signal, andduring operation, the plurality of first switches are turned on or off in an order previously set by the control circuit so that the voltage signal is output from the attenuator.3. The voltage generation circuit of claim 2 , whereinthe digital-to-analog conversion circuit further includes a current varying circuit configured to supply, to the ladder resistor circuit, the reference current generated from a constant current.4. The voltage generation circuit of claim 2 , whereinthe digital-to-analog conversion circuit further includes a ...

SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS

A solid-state imaging device includes: an imaging unit; a row selection circuit; a column circuit unit; and a control unit configured to supply a row address signal which designates a pixel row to be selected to the row selection circuit, in which the imaging unit includes: a valid part including first pixels; and a peripheral part including second pixels, and the control unit includes an output adjustment unit which adjusts an output order of row address signals, the output adjustment unit adjusts the output order of the row address signals so that orders and combinations of the numbers of rows to be outputted per unit row are equal to each other in a first row selection sequence and in a second row selection sequence, and generate the first and second row selection sequences, and the control unit supplies the first and second row selection sequences to the row selection circuit. 1. A solid-state imaging device driven in a plurality of driving modes , comprising:an imaging unit including a plurality of pixels arranged two-dimensionally;a row selection circuit which selects a pixel row including pixels among the pixels arranged in a row direction;a column circuit unit configured to temporarily hold pixel signals outputted from the selected pixel row; anda control unit configured to supply a row address signal which designates a pixel row to be selected to the row selection circuit,wherein the pixels include:a plurality of first pixels which output pixel signals dependent on quantity of received light; anda plurality of second pixels which output pixel signals at a constant intensity regardless of the quantity of the received light,the imaging unit includes:a valid part including the first pixels; anda peripheral part including the second pixels which are arranged on a periphery of the valid part, andthe control unit is configured to generate and supply, to the row selection circuit, a first row selection sequence including the row address signal which designates the ...

AD CONVERSION CIRCUIT AND SOLID-STATE IMAGE PICKUP DEVICE

An AD conversion circuit may include: a reference signal generation unit; a comparison unit; a clock generation unit; a latch unit; a counting unit; and an encoding unit including a detection circuit and an encoding circuit, the detection circuit performing a first detection operation of detecting logic states of n lower phase signals in a signal group that a plurality of lower phase signals latched in the latch unit are arranged in the same order as those of the signal group when the plurality of lower phase signals output from the clock generation unit are arranged to be the signal group the detection circuit outputting a state detection signal when the logic state of the n lower phase signals is detected to be a predetermined logic state in the first detection operation, the encoding circuit performing encoding based on the state detection signal output from the detection circuit. 1. An AD conversion circuit comprising:a reference signal generation unit configured to generate a reference signal increasing or decreasing over time;a comparison unit configured to compare an analog signal that is a target of an AD conversion with the reference signal, the comparison unit being configured to terminate a comparison process at a timing at which the reference signal meets a predetermined condition for the analog signal;a clock generation unit that includes a delay circuit including a plurality of delay units connected to each other, the clock generation unit being configured to output a plurality of lower phase signals based on output signals of the delay circuit;a latch unit configured to latch the plurality of lower phase signals at a timing according to a termination of the comparison process;a counting unit including a counter circuit configured to perform counting by using a signal based on any one of the plurality of lower phase signals as a count clock so as to acquire an upper count value; andan encoding unit including a detection circuit and an encoding circuit, ...

RAMP-SIGNAL GENERATOR CIRCUIT, AND IMAGE SENSOR AND IMAGING SYSTEM INCLUDING THE SAME

The ramp-signal generator circuit includes a reference voltage generator that changes the voltage of a reference signal Vr to a comparator setting voltage VR for compensating for a voltage difference between a reference signal Vr and an analog input signal (Vs-Vsn) before comparison by an analog-to-digital converter circuit and outputs a ramp signal whose slope starts from the comparator setting voltage VR in response to a start of the comparison. The ramp-signal generator circuit is configured to add a predetermined enhanced voltage VA to the comparator setting voltage VR before the comparison. 1. A ramp-signal generator circuit that outputs , to a single-slope analog-to-digital converter circuit , a ramp signal that is sloped in terms of time with a predetermined inclination , as a reference signal , whereinthe analog-to-digital converter circuit includes a comparator having first and second input terminals and configured to receive the reference signal at the first input terminal and to receive an analog input signal at the second input terminal,the analog-to-digital converter circuit converts the analog input signal into a digital signal based on a result of comparison by the comparator,the ramp-signal generator circuit includes a reference voltage generator configured to change a voltage of the reference signal to a comparator setting voltage for compensating for a voltage difference between the first and second input terminals of the comparator before the comparison, and configured to output the ramp signal whose slope starts from the comparator setting voltage in response to a start of the comparison, andthe ramp-signal generator circuit is configured to add a predetermined enhanced voltage to the comparator setting voltage before the comparison.2. The ramp-signal generator circuit of claim 1 , whereinthe ramp-signal generator circuit is configured to output the ramp signal after adding the enhanced voltage and then returning the ramp signal to the comparator ...

Input Offset Cancellation for Charge Mode Readout Image Sensors

An image sensor that uses the same capacitor to sample the image and the amplifier offset. Readout is thus inherently compensated. 1. An amplifying system , comprising:an amplifier that amplifies an input signal;a sampling capacitor, that receiving a signal, an output of which is connectable to said amplifier; anda controller, that initially connects said sampling capacitor to receive a value from the amplifier representing an offset level of the amplifier, and while receiving the offset level from the amplifier, receives information to be amplified, to the same capacitor that is receiving the offset, thereby canceling the offset,a value from said sampling capacitor with said offset cancelled being coupled to said amplifier to amplify said value.2. The system as in claim 1 , wherein said system is in an image sensor claim 1 , and the sampling capacitor receives the signal from at least one pixel of the image sensor.3. The system as in claim 1 , wherein the amplifier is a differential amplifier.4. The system as in claim 3 , wherein the differential amplifier uses switched capacitors.5. The system as in claim 3 , wherein the system includes both sample and reset sampling capacitors claim 3 , both of said capacitors receiving said offset claim 3 , and said capacitors receiving respectively sample and reset signals claim 3 , and said capacitor providing said signals to respective inputs of said differential amplifier.6. The system as in claim 3 , wherein said differential amplifier is driven as a single ended amplifier.7. The system as in claim 6 , wherein an entire amount of the offset is driven onto one capacitor.8. The system as in claim 1 , further comprising another switch and a power supply claim 1 , that initially charges said sampling capacitor to a clamp level.9. The system as in claim 8 , where the power supply includes buffer circuitry to absorb current spikes.10. An method of operating an amplifier claim 8 , comprising:receiving a signal to be amplified on a ...

Solid state image sensor, method for driving a solid state image sensor, imaging apparatus, and electronic device

A solid state image sensor includes a pixel array, as well as charge-to-voltage converters, reset gates, and amplifiers each shared by a plurality of pixels in the array. The voltage level of the reset gate power supply is set higher than the voltage level of the amplifier power supply. Additionally, charge overflowing from photodetectors in the pixels may be discarded into the charge-to-voltage converters. The image sensor may also include a row scanner configured such that, while scanning a row in the pixel array to read out signals therefrom, the row scanner resets the charge in the photodetectors of the pixels sharing a charge-to-voltage converter with pixels on the readout row. The charge reset is conducted simultaneously with or prior to reading out the signals from the pixels on the readout row.

SOLID-STATE IMAGING DEVICE AND CAMERA SYSTEM USING SOLID-STATE IMAGING DEVICE

A solid-state imaging device in the present disclosure includes a semiconductor substrate, pixels, and column signal lines. Each of the pixels includes an amplifying transistor, a selection transistor, a reset transistor, and a photoelectric converting unit. The photoelectric converting unit includes a photoelectric converting film, a transparent electrode, a pixel electrode, and an accumulation diode. The pixel electrode and the accumulation diode are connected to a gate of the amplifying transistor. The amplifying transistor has a source connected to the column signal line and a drain connected to a power source line. The reset transistor has a source connected to the pixel electrode. The selective transistor is provided between the source of the amplifying transistor and the column signal line. A threshold voltage of the amplifying transistor is lower than a voltage of the accumulation diode. 1. A solid-state imaging device comprising:a semiconductor substrate;pixels arranged on the semiconductor substrate in a matrix; andvertical signal lines each formed for a corresponding one of columns of the pixels,wherein each of the pixels includes an amplifying transistor, a selection transistor, a reset transistor, and a photoelectric converting unit,the photoelectric converting unit includes a photoelectric converting film formed above the semiconductor substrate, a transparent electrode formed above the photoelectric converting film, a pixel electrode formed below the photoelectric converting film, and an accumulation diode connected to the pixel electrode,the pixel electrode and the accumulation diode are connected to a gate of the amplifying transistor,the amplifying transistor has a source connected to the vertical signal line and a drain connected to a power source line,the reset transistor has a source connected to the pixel electrode,the selection transistor is provided one of (i) between the source of the amplifying transistor and the vertical signal line and ( ...

DIGITAL IMAGE PROCESSING READOUT INTEGRATED CIRCUIT (ROIC) HAVING MULTIPLE SAMPLING CIRCUITS

Embodiments of the present invention provide an approach for improving overall chip speed by providing one or more sampling circuits in an ROIC so that signal processing and signal reading out operations may occur simultaneously instead of successively. 1. A readout integrated circuit (ROIC) , comprising:an amplifier circuit configured to amplify a charge generated at a set of photo diodes and to convert a received signal associated with the set of photo diodes to a set of voltage signals based on a reference voltage (VREF);a filter circuit coupled to the amplifier circuit, the filter being configured to reduce frequency noise from the set of voltage signals;a first sampling circuit coupled to the filter circuit, the first sampling circuit being configured to sample the set of voltage signals before and after sampling a set of incoming image signals and to output a set of sampling results; anda second sampling circuit coupled to the first sampling circuit, the second sampling circuit being configured to store the set of sampling results as received from the first sampling circuit.2. The ROIC of claim 1 , the second sampling circuit being further configured to output the set of sampling results in accordance with a control signal.3. The ROIC of claim 1 , the set of sampling results being stored by the second sampling circuits via a capacitor and a buffer.4. The ROIC of claim 1 , the amplifier circuit comprising an amplifier being coupled to a capacitor and a switch.5. The ROIC of claim 1 , the filter circuit comprising a low pass filter.6. The ROIC of claim 1 , the first sampling circuit comprising a correlated double sampling circuit.7. The ROIC of claim 1 , the second sampling circuit comprising a sampling and hold sampling circuit.8. The ROIC of claim 1 , the sampling and hold sampling circuit comprisinga first set of logic comprising a first amplifier coupled to a first capacitor and a first switch; anda second set of logic comprising a second amplifier coupled ...

READOUT INTEGRATED CIRCUIT FOR DYNAMIC IMAGING

A sampling circuit for dynamic imaging is provided. Specifically, embodiments of the present invention relate to a readout integrated circuit (ROIC) for dynamic imaging and a related image sensor. In one embodiment of the present invention, a sampling circuit is provided that comprises: an amplifier circuit, which amplifies charge signals generated at photo diodes and converts them to voltage signals; a filter circuit (optional) that receives and filters the voltage signals to yield a filtered signal; a sampling circuit, which samples the voltage signals and outputs a sampled signal in accordance with a sampling control signal; and a digital converter, which converts the sampled signal into a digital format and outputs a digital signal. 1. A readout integrated circuit (ROIC) for dynamic imaging , comprising:an amplifier circuit being configured to receive and amplify an input charge signal received from a set of photo diodes to yield a voltage signal;a sampling circuit coupled to the amplifier circuit, the sampling circuit being configured to receive and sample the voltage signal to yield a sampled signal; anda converter coupled to the sampling circuit, the converter being configured to receive and convert the sampled signal to yield a digital signal.2. The ROIC of claim 1 , further comprising a low-pass filter circuit coupled between the amplifier circuit and the sampling circuit claim 1 , the low-pass filter circuit being configured to receive and filter the voltage signal to yield a filtered signal claim 1 , and the sampling circuit being configured to receive and process the filtered signal to yield the sampled signal;3. The ROIC of claim 1 , the amplifier circuit comprising an amplifier coupled to a feedback capacitor and an amplifier switch claim 1 , and the voltage signal being based on a ratio of the input charge signal to a capacitance of the feedback capacitor.4. The ROIC of claim 1 , the low-pass filter comprising a resistor coupled to a filter capacitor. ...

IMAGE SENSOR FOR OUTPUTTING RGB BAYER SIGNAL THROUGH INTERNAL CONVERSION AND IMAGE PROCESSING APPARATUS INCLUDING THE SAME

The image sensor includes a pixel array including a plurality of pixels arranged in a non-red-green-blue (RGB) Bayer pattern, an analog-to-digital converter configured to convert an analog pixel signal output from each of the pixels into a digital pixel signal and an RGB converter configured to convert the digital pixel signal into an RGB Bayer signal. Accordingly, the image sensor is compatible with a universal image signal processor (ISP), which receives and processes RGB Bayer signals, without an additional compatible device or module. 120-. (canceled)2124-. (canceled)25. An image sensor comprising:a pixel array including a plurality of pixels arranged in a non-red-green-blue (RGB) Bayer pattern;an analog-to-digital converter configured to convert analog pixel signals output from the plurality of pixels into digital pixel signals; andan RGB converter configured to convert the digital pixel signals into RGB Bayer signals,the RGB converter being configured to perform an operation on at least two of the digital pixel signals to output an RGB Bayer signal among the RGB Bayer signals, and a first row of signals having R pixel signals alternate with G pixel signals, and', 'a second row of signals in which G pixel signals alternate with B pixel signals., 'the RGB Bayer signals include,'}261. The image sensor of claim , wherein the operation performed by the RGB converter is at least one of interpolation , weighted averaging , averaging , and summing.271. The image sensor of claim , wherein ,the RGB converter is configured to select the at least two digital pixel signals corresponding to pixels in an operation block including a target pixel, andthe RGB converter is configured to perform an operation on the selected digital pixel signals to output the RGB Bayer signal corresponding to the target pixel.281. The image sensor of claim , wherein the non-red-green-blue (RGB) Bayer pattern comprises at least one of a white pixel , a blue pixel , a red pixel , a green pixel , a ...

AD CONVERSION CIRCUIT AND SOLID-STATE IMAGE PICKUP DEVICE

An AD conversion circuit includes: a comparison unit that receives an analog signal and a reference signal, compares voltages of the signals, and outputs a first comparison signal; a signal generation unit that outputs a second comparison signal for switching a logic state, and outputs a third comparison signal that is a result of a logic operation on the first comparison signal and the second comparison signal; a control unit that outputs an enable signal; a clock generation unit that outputs first to nclock signals having different phases; a latch unit that includes first to nlatch units, each of the first to nlatch units including an input terminal, a first control terminal, a second control terminal, and an output terminal, and latches a logic state of the one of the first to nclock signals; and a count unit that performs a count operation. 1. An analog-to-digital (AD) conversion circuit comprising:a comparison unit configured to receive an analog signal and a reference signal that increases or decreases with passage of time, the comparison unit being configured to compare voltages of the analog signal and the reference signal, the comparison unit being configured to output a first comparison signal at a first timing at which the voltages of the analog signal and the reference signal have a predetermined relationship;a signal generation unit configured to output a second comparison signal for switching a logic state at a second timing at which a predetermined time has elapsed from the first timing, the signal generation unit being configured to output a third comparison signal that is a result of a logic operation on the first comparison signal and the second comparison signal;a control unit configured to output an enable signal at least between a timing relating to a comparison start of the comparison unit and the second timing;{'sup': 'th', 'a clock generation unit configured to output first to n(n is a natural number equal to or greater than 2) clock signals ...

MULTI-BAND READOUT INTEGRATED CIRCUITS AND RELATED METHODS

Readout integrated circuits (ROICs) for multi-band imagers, and related methods, are described. The ROICs may include multiple channels associated with the detectors of a photodetector array, with the different channels corresponding to different wavelength bands detected by the detectors. The ROICs may utilize capacitive transimpedance amplifier (CTIA) technology, and may implement time division multiplexing techniques. 1. A readout integrated circuit (ROIC) comprising:an operational amplifier having an inverting input configured to couple through a single connection to a first photodetector and a second photodetector of a photodetector array, a non-inverting input configured to receive a reference voltage, and an output configured to provide an output signal;a first feedback capacitor coupled between the output of the operational amplifier and the inverting input of the operational amplifier;a second feedback capacitor coupled between the output of the operational amplifier and the inverting input of the operational amplifier, the second feedback capacitor configured in parallel to the first feedback capacitor;a first sample and hold channel comprising a first sample and hold capacitor switchably coupled to the output of the operational amplifier by a first switch; anda second sample and hold channel comprising a second sample and hold capacitor switchably coupled to the output of the operational amplifier by a second switch, wherein the second sample and hold channel is configured in parallel to the first sample and hold channel,wherein the first sample and hold channel is configured to provide a first output signal indicative of detected radiation in a first wavelength band as detected by the first photodetector, andwherein the second sample and hold channel is configured to provide a second output signal indicative of detected radiation in a second wavelength band as detected by the second photodetector.2. The ROIC of claim 1 , wherein the first feedback ...

SOLID STATE IMAGING DEVICE, DRIVING METHOD OF SOLID STATE IMAGING DEVICE, AND ELECTRONIC DEVICE

There is provided a solid state imaging device including a photoelectric conversion unit that performs photoelectric conversion of converting incident light into charges and accumulates the charges, a charge-voltage conversion unit that converts the charges which have been subjected to the photoelectric conversion by the photoelectric conversion unit into a voltage, a charge transfer unit that transfers charges to the charge-voltage conversion unit, a charge reset unit that resets charges of the charge-voltage conversion unit, and a driving unit that performs driving such that a potential of a drain of the charge reset unit is controlled so that the charges are accumulated in the photoelectric conversion unit and the charge-voltage conversion unit up to a saturation level, and then the photoelectric conversion unit is subject to light exposure. 1. A solid state imaging device , comprising:a photoelectric conversion unit that performs photoelectric conversion of converting incident light into charges and accumulates the charges;a charge-voltage conversion unit that converts the charges which have been subjected to the photoelectric conversion by the photoelectric conversion unit into a voltage;a charge transfer unit that transfers charges to the charge-voltage conversion unit;a charge reset unit that resets charges of the charge-voltage conversion unit; anda driving unit that performs driving, such that a potential of a drain of the charge reset unit is controlled so that charges are accumulated in the photoelectric conversion unit and the charge-voltage conversion unit up to a saturation level, and then the photoelectric conversion unit is subject to light exposure.2. The solid state imaging device according to claim 1 ,wherein the driving unit performs driving, such that a potential of a drain of the charge reset unit is controlled so that the charges are accumulated in the photoelectric conversion unit and the charge-voltage conversion unit up to a saturation ...

Ad conversion circuit and solid-state imaging apparatus

An AD conversion circuit and a solid-state imaging apparatus reduce the occurrence of errors in encoding a lower phase signal while securing a degree of freedom of selection of a count clock. A detection circuit performs an operation of detecting logic states of m (m is a natural number of 2 or more) lower phase signals in a signal group that a plurality of lower phase signals latched by the latch unit is arranged, while selecting the m lower phase signals in a predetermined order so that the order thereof becomes the same as the order of the signal group and outputs a state detection signal at the time of detecting that the logic states of the m lower phase signals are in a predetermined logic state in the detection operation. The predetermined order is defined depending on a predetermined signal and an encoding method.

SENSITIVITY ADJUSTMENT DEVICE

A sensitivity adjustment device may include: a light receiver configured to receive a reflected light that has been emitted from a light emitting unit and reflected by a reflector, the light receiver being configured to convert the reflected light into an analog electrical signal; an A/D converter configured to convert the analog electrical signal into a digital signal; a threshold value calculator configured to calculate a threshold value with reference to a voltage level of the digital signal that has been sequentially converted and output by the A/D converter; and a determination unit configured to compare a high voltage level of the digital signal with the threshold value. 1. A sensitivity adjustment device comprising:a light receiver configured to receive a reflected light that has been emitted from a light emitting unit and reflected by a reflector, the light receiver being configured to convert the reflected light into an analog electrical signal;an A/D converter configured to convert the analog electrical signal into a digital signal;a threshold value calculator configured to calculate a threshold value with reference to a voltage level of the digital signal that has been sequentially converted and output by the A/D converter; anda determination unit configured to compare a high voltage level of the digital signal with the threshold value.2. The sensitivity adjustment device according to claim 1 , whereinthe threshold value calculator is configured to calculate the threshold value by using at least one of a maximum value and a minimum value of the voltage level of the digital signal that has been converted and output by the A/D converter when the light emitting unit is emitting a light, and the digital signal that has been converted and output by the A/D converter when the light emitting unit is not emitting the light.3. The sensitivity adjustment device according to claim 1 , whereinthe threshold value calculator is configured to calculate the threshold ...

SCANNING CIRCUIT, SOLID-STATE IMAGE SENSOR, AND CAMERA

A scanning circuit, comprising first signal lines, second signal lines, third signal lines, a drive unit configured to drive the first signal lines, first buffers configured to drive the second signal lines in accordance with signals of the first signal lines, second buffers configured to drive the third signal lines in accordance with the signals of the first signal lines, and a shift register having a first part to be driven by signals of the second signal lines and a second part to be driven by signals of the third signal lines, wherein the first to third signal lines include two signal lines arranged in parallel to each other and configured to transmit the in-phase signals. 1. A scanning circuit comprising:a predetermined number of first signal lines;second signal lines in the predetermined number;third signal lines in the predetermined number;a drive unit configured to drive the predetermined number of first signal lines;the predetermined number of first buffers configured to drive the predetermined number of second signal lines in accordance with signals of the predetermined number of first signal lines;the predetermined number of second buffers configured to drive the predetermined number of third signal lines in accordance with the signals of the predetermined number of first signal lines; anda shift register having a first part to be driven by signals of the predetermined number of second signal lines and a second part to be driven by signals of the predetermined number of third signal lines,wherein the predetermined number of first signal lines include at least two signal lines arranged in parallel to each other and configured to transmit in-phase signals,the predetermined number of second signal lines include at least two signal lines arranged in parallel to each other and configured to transmit the in-phase signals, andthe predetermined number of third signal lines include at least two signal lines arranged in parallel to each other and configured to ...

SOLID-STATE IMAGE TAKING DEVICE AND ELECTRONIC APPARATUS

A solid-state image taking device including a pixel section and a scan driving section wherein on each pixel column included in the pixel area determined in advance to serve as a pixel column having the unit pixels laid out in the scan direction, the opto-electric conversion section and the electric-charge holding section are laid out alternately and repeatedly, and on each of the pixel columns in the pixel area determined in advance, two the electric-charge holding sections of two adjacent ones of the unit pixels are laid out disproportionately toward one side of the scan direction with respect to the optical-path limiting section or the opto-electric conversion section. 1. A solid-state image taking device comprising:a pixel section including a plurality of unit pixels laid out to form a pixel matrix and to serve as unit pixels which have read sections and are each provided with a pixel opening prescribed by an optical-path limiting section provided on a semiconductor substrate and with an opto-electric conversion section as well as an electric-charge holding section; anda scan driving section configured to control an operation to transfer electric charge from said opto-electric conversion section to said electric-charge holding section at the same time for said unit pixels in a pixel area determined in advance in said pixel matrix and to scan and drive said read sections in one scan direction of a scan operation, whereinon each pixel column including said unit pixels laid out in said scan direction, said opto-electric conversion section and said electric-charge holding section are laid out alternately and repeatedly, andin each of said unit pixels on each of said pixel columns, said electric-charge holding section is placed on a start side of said scan operation whereas said opto-electric conversion section is placed on an end side of said scan operation.2. An electronic apparatus comprising an image processing section and an image input section including an ...

IMAGING APPARATUS AND DRIVING METHOD FOR IMAGING APPARATUS

An aspect of the present disclosure is directed to an imaging apparatus capable of reducing fluctuation in voltage in a current supply line due to fluctuation in a current consumption amount generated when an output circuit shifts from a first state to a second state, and a method for driving the imaging apparatus. 1. An imaging apparatus provided with a plurality of chips each comprising:a plurality of pixels each configured to photoelectrically convert incident light to generate an optical signal;an output circuit configured to output a signal based on the optical signal output from each of the plurality of pixels; anda current consumption circuit,wherein the plurality of chips is electrically connected to a current supply line in common, and an electric current is provided from the current supply line to the output circuit and the current consumption circuit of each of the plurality of chips,wherein the output circuit is capable of taking a first state and a second state, and the second state is a state in which a current consumption amount of the output circuit is larger than that in the first state, andwherein the current consumption circuit of each of the plurality of chips is a circuit that operates with a larger current consumption amount in the first state than a current consumption amount in the second state so as to reduce a difference of current consumption amounts of the output circuit between the first state and the second state.2. The imaging apparatus according to claim 1 , wherein the current consumption circuit includes a current consumption circuit which operates in the first state and is not in operation in the second state.3. The imaging apparatus according to claim 1 ,wherein the first state is a state in which the output circuit is not in operation, andwherein the second state is a state in which the output circuit outputs the signal based on the optical signal.4. The imaging apparatus according to claim 2 ,wherein each of the plurality of ...

IMAGE DATA RECEIVING APPARATUS AND IMAGE DATA TRANSMISSION SYSTEM

An image data receiving apparatus includes: a first receiving section that receives a first signal including serial data according to image data; a second receiving section that receives a second signal including serial data that is different from the serial data included in the first signal; a first conversion section that converts the serial data included in the first signal into parallel data and outputs the parallel data; a second conversion section that converts the serial data included in the second signal into parallel data and outputs the parallel data; a bit drift amount detecting section that obtains information indicating a degree of drift of the parallel data outputted from the second conversion section from a predetermined bit pattern; and a bit shifting section that shifts the parallel data outputted from the first conversion section according to the information obtained by the bit drift amount detecting section. 1. An image data receiving apparatus comprising:a first receiving section that receives a first signal from an image pickup apparatus, the first signal including serial data generated according to image data obtained as a result of an image of an object being picked up by the image pickup apparatus;a second receiving section that receives a second signal from the image pickup apparatus, the second signal including other serial data that is different from the serial data included in the first signal;a first serial/parallel conversion section that converts the serial data included in the first signal received by the first receiving section into parallel data and outputs the parallel data;a second serial/parallel conversion section that converts the serial data included in the second signal received by the second receiving section into parallel data and outputs the parallel data;a bit drift amount detecting section that obtains information indicating a degree of drift of each bit value included in the parallel data outputted from the second ...

Photoelectric conversion device, imaging system, photoelectric conversion device testing method, and imaging system manufacturing method

A photoelectric conversion device includes a pixel array including a plurality of pixels arranged in a matrix, a plurality of blocks including a plurality of pairs, each of the pairs including a comparator provided correspondingly with a column in the pixel array and a memory provided correspondingly with the comparator, and a block information supply unit configured to supply block information which indicates a location of a block, to the plurality of memories included in the blocks.

SYSTEMS AND METHODS FOR COLOR BINNING

In various exemplary embodiments, optically sensitive devices comprise a plurality of pixel regions. Each pixel region includes an optically sensitive layer over a substrate and has subpixel regions for separate wavebands. A pixel circuit comprises a charge store and a read out circuit for each subpixel region. Circuitry is configured to select a plurality of subpixel elements from different pixels that correspond to the same waveband for simultaneous reading to a shared read out circuit. 1. An image sensor comprising:an array of subpixels comprising photosensitive material;circuitry configured to operate in a first selectable mode to read out signals from the individual subpixels of photosensitive material;circuitry configured to operate in a second selectable mode to read out a binned signal for a plurality of subpixel regions corresponding to the same waveband with a higher sensitivity than the first mode; andcircuitry configured to operate in a third selectable mode to read out a binned signal for a plurality of subpixel regions corresponding to the same waveband with a higher dynamic range than the second mode.2. The image sensor of claim 1 , wherein:the circuitry configured to operate in the second mode integrates the binned signal using a first capacitance; andthe circuitry configured to operate in the third mode integrates the binned signal using a second capacitance greater than the first capacitance.3. The image sensor of claim 2 , wherein the circuitry configured to operate in the first mode integrates the signal for each subpixel using a capacitance equal to the first capacitance.4. An image sensor comprising:an array of subpixels comprising photosensitive material;circuitry configured to operate in a first selectable mode to read out signals from the individual subpixels of photosensitive material; andcircuitry configured to operate in a second selectable mode to read out a binned signal for a plurality of subpixel regions corresponding to a first color ...

Pixel array area optimization using stacking scheme for hybrid image sensor with minimal vertical interconnects

Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed.

SYSTEM AND METHOD FOR PROCESSING ELECTROMAGNETIC RADIATION

The present invention relates to a system and a method for processing electromagnetic radiation. In particular, the present invention relates to conversion of light, such as light () comprising image information (), from one wavelength interval to another wavelength interval. More in particular, the present invention relates to wavelength conversion of incident light () by means of optical mixing with a laser beam in a non-linear crystal (). The method according to the present invention comprises receiving incoming electromagnetic radiation () and a laser beam () in a non-linear crystal, setting a plurality of phase match conditions within the non-linear crystal (), obtaining a plurality of images of the processed electromagnetic radiation (), and providing a first combined image () comprising a first part of a first image and comprising a second part of a second image. The wavelength conversion is realized in an intra-cavity arrangement by for example sum-frequency generation between the intra-cavity laser light () and the in-coupled radiation (). 122-. (canceled)23. Method for processing incoming electromagnetic radiation from an object space , the incoming electromagnetic radiation comprising radiation in a first wavelength interval , the method comprising:receiving the incoming electromagnetic radiation and a laser beam in a non-linear crystal, wherein interaction between the incoming electromagnetic radiation in the first wavelength interval and the laser beam provides processed electromagnetic radiation comprising radiation in a second wavelength interval,setting a plurality of phase match conditions within the non-linear crystal for the incoming electromagnetic radiation propagating in a first direction within the non-linear crystal, the plurality of phase match conditions including a first phase match condition and a second phase match condition,obtaining a plurality of images of the processed electromagnetic radiation, the plurality of images including a ...

ELECTRIC SHAVER WITH IMAGING CAPABILITY

System and method for improving the shaving experience by providing improved visibility of the skin shaving area. A digital camera is integrated with the electric shaver for close image capturing of shaving area, and displaying it on a display unit. The display unit can be integral part of the electric shaver casing, or housed in a separated device which receives the image via a communication channel. The communication channel can be wireless (using radio, audio or light) or wired, such as dedicated cabling or using powerline communication. A light source is used to better illuminate the shaving area. Video compression and digital image processing techniques are used for providing for improved shaving results. The wired communication medium can simultaneously be used also for carrying power from the electric shaver assembly to the display unit, or from the display unit to the electric shaver. 1. A device for capturing an image as a digital image and for transmitting the digital image and a power signal over a cable , for use with a power source supplying a power signal , the device comprising:a digital camera for capturing the image and producing the digital image;a connector for connecting to the cable; anda transmitter coupled between the connector and the digital camera for transmitting the digital image to the cable via the connector;a skin treatment component for treating a human skin area; anda single enclosure housing the digital camera, the connector, the transmitter, and the skin treatment component,wherein the digital camera is configured and positioned for capturing the human skin area and the connector is coupled to the power source and to the transmitter for concurrently carrying the digital image and a power signal over the cable.2. The device according to claim 1 , wherein the skin treatment component is an electrical hair remover for removing hair from the human skin area.3. The device according to claim 1 , wherein the skin treatment component ...

ELECTRIC SHAVER WITH IMAGING CAPABILITY

System and method for improving the shaving experience by providing improved visibility of the skin shaving area. A digital camera is integrated with the electric shaver for close image capturing of shaving area, and displaying it on a display unit. The display unit can be integral part of the electric shaver casing, or housed in a separated device which receives the image via a communication channel. The communication channel can be wireless (using radio, audio or light) or wired, such as dedicated cabling or using powerline communication. A light source is used to better illuminate the shaving area. Video compression and digital image processing techniques are used for providing for improved shaving results. The wired communication medium can simultaneously be used also for carrying power from the electric shaver assembly to the display unit, or from the display unit to the electric shaver. 1. A handheld device for capturing and displaying video data , the device comprising:a first video camera that outputs a first video data;a second video camera that outputs a second video data;a multiplexer coupled to the first and second cameras for multiplexing the first and second video data into a multiplexed signal;an antenna for transmitting a wireless signal over a wireless network;a wireless transmitter coupled between the antenna and the multiplexer for transmitting the multiplexed signal;a rechargeable battery coupled to power the video cameras, the wireless transmitter, and the multiplexer; anda single portable and handheld casing housing the video cameras, the wireless transmitter, and the multiplexer,wherein the casing comprises two opposed first and second exterior surfaces, the first video camera is attached to the first surface and the second video camera is attached to the second surface.2. The device according to claim 1 , wherein each of the cameras comprises optical lens for focusing received light.3. The device according to claim 1 , further for identifying ...

ELECTRIC SHAVER WITH IMAGING CAPABILITY

System and method for improving the shaving experience by providing improved visibility of the skin shaving area. A digital camera is integrated with the electric shaver for close image capturing of shaving area, and displaying it on a display unit. The display unit can be integral part of the electric shaver casing, or housed in a separated device which receives the image via a communication channel. The communication channel can be wireless (using radio, audio or light) or wired, such as dedicated cabling or using powerline communication. A light source is used to better illuminate the shaving area. Video compression and digital image processing techniques are used for providing for improved shaving results. The wired communication medium can simultaneously be used also for carrying power from the electric shaver assembly to the display unit, or from the display unit to the electric shaver. 1. A device for use with a cable that comprises multiple insulated wires and concurrently carries a DC (Direct Current) power and video data signals over the same wires , the device comprising:a video camera for capturing video content;a video processor coupled to the video camera for generating the video data according to a digital video format;a connector for coupling a signal to the cable;a wired transmitter coupled between the connector and the video processor for transmitting the video data to the cable via the connector; anda casing housing the video camera, the video processor, and the wired transmitter,wherein the device is powered only from the DC power signal carried in the cable via the connector.2. The device according to claim 1 , wherein the video camera comprises an optical lens for focusing received light mechanically oriented to focus an image of at least part of the captured content.3. The device according to claim 2 , wherein the video camera further comprises a photosensitive image sensor array disposed approximately at an image focal point plane of the ...

ELECTRIC SHAVER WITH IMAGING CAPABILITY

System and method for improving the shaving experience by providing improved visibility of the skin shaving area. A digital camera is integrated with the electric shaver for close image capturing of shaving area, and displaying it on a display unit. The display unit can be integral part of the electric shaver casing, or housed in a separated device which receives the image via a communication channel. The communication channel can be wireless (using radio, audio or light) or wired, such as dedicated cabling or using powerline communication. A light source is used to better illuminate the shaving area. Video compression and digital image processing techniques are used for providing for improved shaving results. The wired communication medium can simultaneously be used also for carrying power from the electric shaver assembly to the display unit, or from the display unit to the electric shaver. 1. A system for use with a wireless network , the system comprising an oral hygiene device and a display device that communicates with the oral hygiene device over the wireless network , the oral hygiene device comprising:a toothbrush for brushing teeth surface;an electric motor attached for moving the toothbrush;a sensor for generating an output in response to a physical phenomenon;a first wireless transceiver coupled to the sensor for transmitting a first data that is responsive to the sensor output over the wireless network; andan handheld casing housing the toothbrush, the electric motor, the sensor, and the first wireless transceiver, and the display device comprising:a second wireless transceiver coupled for receiving the first data from the oral hygiene device over the wireless network;a display component having a screen for displaying data, the display is coupled to the second wireless transceiver for displaying information in response to the received first data; andan enclosure housing the second wireless transceiver, and the display component.2. The system according ...

ELECTRIC SHAVER WITH IMAGING CAPABILITY

System and method for improving the shaving experience by providing improved visibility of the skin shaving area. A digital camera is integrated with the electric shaver for close image capturing of shaving area, and displaying it on a display unit. The display unit can be integral part of the electric shaver casing, or housed in a separated device which receives the image via a communication channel. The communication channel can be wireless (using radio, audio or light) or wired, such as dedicated cabling or using powerline communication. A light source is used to better illuminate the shaving area. Video compression and digital image processing techniques are used for providing for improved shaving results. The wired communication medium can simultaneously be used also for carrying power from the electric shaver assembly to the display unit, or from the display unit to the electric shaver. 1. A system comprising a portable device and an oral hygiene device that communicate over a Wireless Local Area Network (WLAN) , a toothbrush adapted for teeth brushing;', 'a motion actuator for moving at least part of a brushing mechanism;', 'a sensor mechanically coupled to the toothbrush for generating an output in response to a physical phenomenon;', 'software and a processor for executing the software, the processor is coupled to the sensor for receiving the output;', 'a battery for powering the sensor, the motion actuator, the sensor, and the processor;', 'an first WLAN antenna for coupling to the WLAN using Radio-Frequency (RF) waves; and', 'a first WLAN transceiver coupled between the first antenna and the sensor for transmitting a first data that is responsive to the sensor output over the WLAN;', 'an handheld casing housing the battery, the toothbrush, the motion actuator, the first WLAN antenna, the first WLAN transceiver, the sensor, the software, and the processor,, 'the oral hygiene device comprising a second WLAN antenna for coupling to the WLAN using Radio- ...

TDI Imaging System With Variable Voltage Readout Clock Signals

A Time Delay and Integration (TDI) imaging system utilizing variable voltage readout clock signals having progressively increasing amplitudes defined as a function of pixel row location, where pixel rows positioned to receive/collect/transfer image-related charges at the start of the TDI imaging process are controlled using lower amplitude readout clock signals than pixel rows positioned to receive/collect/transfer image-related charges near the end of the TDI process. The clock signal amplitude for each pixel row is determined by the expected maximum amplitude needed to hold and transfer image charges by the pixels of that row. Multiple (e.g., three) primary phase signals are generated that are passed through splitters to provide multiple identical secondary phase signals, and then drivers having gain control circuitry are utilized to produce voltage readout clock signals having the same phases as the primary phase signals, but having two or more different voltage amplitudes. 1. A Time Delay and Integration (TDI) imaging system , comprising:a sensor including an array of pixels arranged in a plurality of rows and a plurality of columns,phase signal generating means for generating a plurality of primary phase signals;means for splitting each of said plurality of primary phase signals into a plurality of secondary phase signals such that a first said primary phase signal is split into a plurality of identical first secondary phase signals, and a second said primary phase signal is split into a plurality of second secondary phase signals;a plurality of drivers for generating a plurality of readout clock signals in accordance with said plurality of secondary phase signals, said plurality of drivers being coupled to said sensor such that each row of said pixels receives at least two readout clock signals respectively generated by associated said drivers in accordance with associated secondary phase signals; andgain control means for controlling the plurality of drivers ...

COLOR AND INFRARED FILTER ARRAY PATTERNS TO REDUCE COLOR ALIASING

Embodiments of a color filter array include a plurality of tiled minimal repeating units, each minimal repeating unit comprising an M×N set of individual filters, and each individual filter in the set having a photoresponse selected from among four different photoresponses. Each minimal repeating unit includes a checkerboard pattern of filters of the first photoresponse, and filters of the second, third, and fourth photoresponses distributed among the checkerboard pattern such that the filters of the second, third, and fourth photoresponses are sequentially symmetric about one or both of a pair of orthogonal axes of the minimal repeating unit. 1. A color filter array comprising: a checkerboard pattern of filters of the first photoresponse, and', 'filters of the second, third, and fourth photoresponses distributed among the checkerboard pattern such that the filters of the second, third, and fourth photoresponses are sequentially symmetric about one or both of a pair of orthogonal axes of the minimal repeating unit., 'a plurality of tiled minimal repeating units, each minimal repeating unit comprising an M×N set of individual filters, and each individual filter in the set having a photoresponse selected from among four different photoresponses, wherein each minimal repeating unit includes2. The color filter array of wherein the number of filters of the second claim 1 , third claim 1 , and fourth photoresponses are substantially equal.3. The color filter array of wherein the first photoresponse is panchromatic (W) claim 1 , the second photoresponse is red (R) claim 1 , the third photoresponse is green (G) claim 1 , and the fourth photoresponse is blue (B).7. The color filter array of wherein the first photoresponse is green (G) claim 1 , the second photoresponse is infrared (IR) claim 1 , the third photoresponse is red (R) claim 1 , and the fourth photoresponse is blue (B).8. The color filter array of wherein the minimal repeating unit includes:approximately 50% green ...

IMAGING ELEMENT, IMAGING APPARATUS, ITS CONTROL METHOD, AND CONTROL PROGRAM

An imaging element having a layered structure including a first chip having a pixel portion in which pixels for photoelectrically converting an optical image of an object and generating a pixel signal are arranged two-dimensionally and a second chip in which a drive means of the pixel portion is arranged, and having a first output path to output the pixel signals of at least a first pixel group in the pixel portion and a second output path to output the pixel signals of a second pixel group, comprises the a conversion means for converting the pixel signals of the first and second output paths into digital signals and a control information generation means for generating control information of a photographing operation of the object by using the digital signal converted by the conversion means, wherein at least a part of the conversion means is arranged in the first chip. 1. An imaging element having a layered structure which includes a first chip having a pixel portion in which pixels each for photoelectrically converting an optical image of an object and generating a pixel signal are arranged in a matrix form and a second chip in which a drive unit of the pixel portion is arranged and having a first output path for outputting the pixel signals of at least a first pixel group in the pixel portion and a second output path for outputting the pixel signals of a second pixel group , comprising:a conversion unit configured to convert the pixel signals of the first output path and the second output path into digital signals; anda control information generation unit configured to generate control information of a photographing operation of the object by using the digital signal converted by the conversion unit,wherein at least a part of the conversion unit is arranged in the first chip.2. An element according to claim 1 , wherein the conversion unit is arranged in the first chip.3. An element according to claim 1 , wherein the conversion unit includes a first conversion ...

IMAGE SENSING DEVICE

An image sensing device is provided to include a plurality of unit pixel regions arranged in a first direction and a second direction, a first device isolation region structured to isolate the plurality of unit pixel regions from each other, a plurality of photoelectric conversion regions in the substrate to form a plurality of imaging pixels structured to generate photocharges, a plurality of second device isolation regions configured to define active regions of the plurality of imaging pixels, a plurality of floating diffusion regions formed in a first active region to store the photocharges, and a plurality of transfer gates structured to transmit the photocharges. The floating diffusion region is located contiguous to the transfer gate in the first direction and the second direction and is structured to surround a plurality of side surfaces of a corresponding transfer gate. 1. An image sensing device comprising:a plurality of unit pixel regions arranged in a first direction and a second direction perpendicular to the first direction in a substrate;a first device isolation region supported by the substrate and structured to isolate the plurality of unit pixel regions from each other;a plurality of photoelectric conversion regions supported by the substrate and formed in the plurality of unit pixel regions in the substrate to form a plurality of imaging pixels structured to generate photocharges by performing photoelectric conversion of incident light;a plurality of second device isolation regions supported by the substrate to define active regions of the plurality of imaging pixels;a plurality of floating diffusion regions formed in a first active region to store the photocharges generated by the photoelectric conversion regions; anda plurality of transfer gates structured to transmit the photocharges generated by the photoelectric conversion regions to the plurality of the floating diffusion region,wherein each of the floating diffusion regions is located ...