ФИЛЬТР, ПРЕЖДЕ ВСЕГО ДЛЯ ФИЛЬТРАЦИИ ЭЛЕКТРОМАГНИТНЫХ ПОМЕХ

Изобретение относится к фильтру, прежде всего для фильтрации электромагнитных помех, с базовым элементом (2), по меньшей мере с одним электрическим фильтрующим элементом (3, 4), по меньшей мере с двумя входными соединительными контактами (5) и по меньшей мере с двумя выходными соединительными контактами (6) для подключения провода электрической проводки, при этом входные соединительные контакты (5) соединены с выходными соединительными контактами (6) по расположенным на базовом элементе (2) токопроводящим дорожкам (7). В каждой токопроводящей дорожке (7) предусмотрены два продольных контакта (8), через которые фильтрующий элемент (3, 4) является электрически соединяемым с токопроводящей дорожкой (7) таким образом, что электрическое соединение токопроводящей дорожки (7) между обоими продольными контактами (8) проходит через фильтрующий элемент (3, 4) и что в токопроводящих дорожках (7) предусмотрен в каждом случае по меньшей мере один поперечный контакт (9), так что две токопроводящие дорожки ...

УСТРОЙСТВО ОТОБРАЖЕНИЯ

... 1. Жидкокристаллическое устройство отображения, содержащее:подложку внешней схемы;первую подложку, на которой монолитно сформированы пиксельная схема и задающая схема для пиксельной схемы; а такжевторую подложку, расположенную таким образом, чтобы она находилась оппозитно первой подложке,подложка внешней схемы, первая подложка и вторая подложка расположены в данной последовательности таким образом, чтобы они накладывались друг на друга,на поверхности второй подложки, расположенной оппозитно первой подложке, имеется множество входных клемм,на подложке внешней схемы имеется множество выходных клемм,множество входных клемм расположено таким образом, чтобы они находились оппозитно множеству выходных клемм, а множество выходных клемм накладывалось на них при виде множества входных клемм и множества выходных клемм в одной плоскости,множество входных клемм сформированы таким образом, чтобы они не накладывались на первую подложку,множество входных клемм и задающая схема электрически соединены через ...

Bus bar with address wires - each wire consecutively connects output terminal of socket to input terminal of another socket

The bus bar is designed for the control of the electronic assemblies that are plugged in. Each wire consecutively connects an output terminal of a plug-in socket to an input terminal of another socket. A specified sequence is prescribed for the address wires, so that address wires needed at an assembly form the beginning of this sequence. Other address wires are moved by connection inside the assembly to the beginning of the sequence, while retaining the required order. The advantage of this arrangement is that no address decoding is necessary, so that when faulty components are changed no coding errors can arise due to wrong programming.

RUECKWANDLEITERPLATTE.

SPEICHERMODULBAUGRUPPE, DIE TEILWEISE DEFEKTE CHIPS VERWENDET

EINRICHTUNG MIT PROGRAMMIERBARER KONSTANTSTROMQUELLE FUER TRANSDERMALE ARZNEIAPPLIKATION.

Verfahren zum Ermöglichen der Übereinstimmungskodierung einer Übertragungsvorrichtung mit einer anderen und entsprechende Übertragungsvorrichtung, wie Sender oder Empfänger

Memory element with printed line sequences of conductive material printed on flexible substrate, with each line either conductive or non conductive due to interruption

The unit has lines sequences (3, 4) made of a conductive material and printed on a flexible substrate (2), such that each line is either conductive or non conductive due to an interruption (5). The interruption is formed by a printed narrow place of the line, which is converted by flow and/or tensile admission of the line into an insulator. The conductive material is made of an organic material or an inorganic material. Independent claims are also included for the following: (A) a reader for reading a memory unit (B) a method for manufacturing a memory unit.

Electronic component e.g. airbag system, operating method for motor vehicle system, involves connecting connector with connector area for programming operation of component, where programming of component is carried out over contact units

The method involves connecting a connector with an electronic component (1) for normal operation of the component, where the data transmission takes place in the normal operation over a group of contact units (1.2). Another connector is connected with a connector area (1.1) of the component for the programming operation of the component, where the connector area has another group of contact units (1.5) and the latter connector has counter contacts. The programming of the component is carried out over the latter group of contact units.

Coding device for storage of configuration data of electric device, has conductive strip fuses provided on printed circuit board, where fuses are separated depending upon contents of configuration data

The device (1) has conductive strip fuses (3) provided on a printed circuit board, where the fuses are separated depending upon contents of configuration data. Separation of the respective fuses is carried out by a stamped flow and a laser beam. The fuses are attached to an input module (4) by which the configuration data is automatically selected. The fuses are arranged in a matrix, and the configuration data in parts are selected successively by a central equipment (7). An independent claim is also included for a method for storage of configuration data with a coding device.

A printed circuit board and apparatus for recording data thereon

A printed circuit board (11) is described having a number of functional electrically conductive tracks (12) used to connect together the operative components and a number of further tracks (13) not connected to the functional tracks (12). The further tracks (13) include a number of fusible links (16) which can be failed by the application of excessive current to produce a binary data record of certain events.

ADDRESS CODE ARRANGEMENTS

In a cordless telephone it is usual for the base station and the handset to be allotted a single address code to provide "dial security". Such an address code is usually programmed in during manufacture. In the present arrangement, a printed circuit board (2) in the handset or base station bears a single common track (5) and a set of tracks (6) adjacent to it. Each cordless set's two units also has a label (1) with a set of conductive strips on it which is secured to the board so as to connect the common track and a selection of the individual tracks. Thus energization of the common track (5) energizes a selection of the tracks (6) according to the address. When a number is to be sent the address code defined by the handset's label is sent to the base station and compared with that for the base station's label. If they agree, "dialling" is permitted. The label can also be wrapped round the edge of the board or plugged into a socket on the board.

ADDRESS CODE ARRANGEMENTS

Electrical lead and financial terminal including the lead

CROSS CONNECTION BY PERMUTATIONS OF MEANS OF CONFIGURABLE PRINTED CIRCUIT BOARDS

MARKIERUNG ZUM MARKIEREN BZW. CODIEREN EINES GEGENSTANDS SOWIE VERFAHREN ZUR HERSTELLUNG EINER DERARTIGEN MARKIERUNG UND VERWENDUNG

Bei einer Markierung zum Markieren bzw. Codieren eines Gegenstands ist vorgesehen, daß eine Mehrzahl von aus einem leitenden bzw. leitfähigen Material bestehenden Markierungselementen (4, 5, 6) vorgesehen ist, daß die Markierungselemente (4, 5, 6) auf einem aus einem isolierenden Material bestehenden Teilbereich des Gegenstands aufbringbar und/oder in diesen integrierbar sind, daß die Markierungselemente (4, 5, 6) zur Ausbildung eines Codes wenigstens teilweise miteinander durch jeweils wenigstens ein aus einem leitenden bzw. leitfähigen Material bestehendes Verbindungselement (7, 8) verbunden bzw. verbindbar sind und daß die Markierungselemente (4, 5, 6) zur Erfassung des Codes wenigstens teilweise durch einen leitenden Zustand zwischen einzelnen Markierungselementen (4, 5, 6) feststellende Elemente kontaktierbar sind.Darüber hinaus wird ein Verfahren zur Herstellung einer derartigen Markierung als auch eine Verwendung einer derartigen Markierung im Zusammenhang mit einer insbesondere ...

PROCEDURE FOR THE CONSTRUCTION OF MULTILEVEL CIRCUITS, STRUCTURES WITH PERSONALISIERUNGSMERKMALEN AND THEREIN USED COMPONENTS

Amplifier cartridge for UHF and VHF range

MULTI-POSITION CIRCUIT PRODUCTION AND STUKTUR WITH POSSIBILITY OF ADAPTATION AND COMPONENTS FOR IT

ELECTRONIC PACKAGE ASSEMBLY AND ACCESSORY

CHANGE-OVER SWITCHING USING CONFIGURABLE PRINTED CIRCUIT BOARDS

L'invention concerne un câblage dans un boîtier de connexion , à l'aide d'un panneau de circuit imprimé qui comporte sur l'un de ses bords N bornes d'entrée, sur le bord opposé N bornes de sortie, et, entre ces deux bords, une pluralité d'étages de dispositifs élémentaires de connexion à deux entrées deux sorties, les deux entrées d'un dispositif étant reliées électriquement aux deux sorties dudit dispositif , d'une part, par deux liaisons directes et, d'autre part, par deux liaisons de dérivation croisés, les entrées des dispositifs du premier étage étant directement reliées électriquement aux bornes d'entrée, les sorties des dispositifs du dernier étage étant directement reliées électriquement aux bornes de sortie, et, entre deux étages successifs, les sorties des dispositifs de l'étage de rang inférieur sont reliées électriquement aux entrées des dispositifs de l'étage de rang supérieur. Pour personnaliser un câblage on coupe soit les liaisons directes, soit les liaisons de dérivation ...

PRINTED CIRCUIT BOARD WITH SELECTABLE ROUTING CONFIGURATION

A printed circuit board (60) having a selectable circuit routing configurati on comprises a substrate (62), a plurality of electrical traces (42 and 44) mounted to the substrate for interconnecting electrical components, and at least one fusible connector (40) mounted to the substrate. Each of the fusib le connectors has a fuse line (50) formed from a conductive layer of the printe d circuit board and forms a fusible connector between at least two of the electrical traces. The circuit routing configuration can be selected by application of a predetermined current through at least one of the fusible connectors to break the fusible connection formed by the fusible connector.< /SDOAB> ...

Rangierverteiler für Alarmanlagen

Platte mit gedruckter Schaltung und Verbindungsorganen

ELECTRIC CLOCK MODULE SUITED FOR ADAPTING THE BATTERY POLARITY TO THAT OF THE CIRCUIT

Procedure and connection device for connecting a majority from each other of reserved electrical contact points through.

Electronic device and related circuit board

Information support with modifiable memory, reader of information support adapted to use such a support, and system consisted such a reader.

A METHOD FOR ALLOWING the CODING Of AGREEMENT Of a DEVICE OF TRANSMISSION WITH Another, AND DEVICE OF TRANSMISSION, SUCH AS TRANSMITTER OR RECEIVER, CORRESPONDING

PROCEEDED OF PROGRAMMING OF the ADDRESS Of PERIPHERAL AND PERIPHERAL POURSA IMPLEMENTED

CONNECTION SYSTEM

ENCODING DEVICE PARTICULARLY FOR IC CARD

Electronic component test-bed for operation at elevated temp. - permits rearrangement of bias configurations for components under test in environmental simulation chamber

Logic system employing modular logic cards - consists of several logic modules each associated with two interface cards

Continuous/continuous converter unit having cards with converter sections first/second complementary units mounting holding cards/input/output connections forming/paralleling.

L'invention concerne un dispositif convertisseur. Elle se rapporte à un dispositif convertisseur qui comprend plusieurs cartes de circuit (2a, 2b) ayant chacune une section de convertisseur (3) qui transforme un courant-tension d'entrée en un courant-tension correspondant à des conditions spécifiées, un motif de connexion de borne d'entrée de puissance et un motif de connexion de borne de sortie de puissance connectés à la section de convertisseur (3) sur chaque carte de circuit (2a, 2b), et plusieurs organes complémentaires (4) destinés à maintenir et fixer les cartes de circuit (2a, 2b) sous forme empilée avec un espacement entre elles. Les motifs d'entrée et de sortie de puissance sont connectés par un premier et des seconds organes complémentaires (4). Application aux convertisseurs continu-continu.

Manual control device having to perform at least two different functions

Le dispositif à commande manuelle de l'invention coopère avec des organes fixes qui l'environnent à l'aide d'un ensemble de bornes de connexion et comporte n dispositifs (21; 22) commandés manuellement reliés chacun respectivement à au moins une partie (PC1, PC2; PC8, PC16) d'un ensemble de bornes de connexion (PC1, PC2, PC9, PC10; PC7, PC8, PC15, PC16), lesdits dispositifs (21; 22) commandés manuellement et lesdits ensembles de bornes de connexion (PC1, PC2, PC9, PC10; PC7, PC8, PC15, PC16) présentant une symétrie d'ordre n sur ledit dispositif à commande manuelle de telle sorte qu'un moyen de commande manuelle puisse être fixe et coopérer individuellement avec chacun desdits dispositifs (21; 22) commandés manuellement pour la mise en oeuvre d'une fonction propre à chaque couple formé par un dispositif (21; 22) commandé manuellement et un ensemble de bornes de connexion (PC1, PC2, PC9, PC10; PC7, PC8, PC15, PC16), en fonction de la position dudit dispositif (20) à commande manuelle par ...

MULTILAYER CIRCUIT BOARD

USING MIXING BY PERMUTATIONS OF THE CIRCUITS PRINT CONFIGURABLE

L'invention concerne un câblage dans un boîtier de connexion , à l'aide d'un panneau de circuit imprimé qui comporte sur l'un de ses bords N bornes d'entrée, sur le bord opposé N bornes de sortie, et, entre ces deux bords, une pluralité d'étages de dispositifs élémentaires de connexion à deux entrées deux sorties, les deux entrées d'un dispositif étant reliées électriquement aux deux sorties dudit dispositif , d'une part, par deux liaisons directes et, d'autre part, par deux liaisons de dérivation croisés, les entrées des dispositifs du premier étage étant directement reliées électriquement aux bornes d'entrée, les sorties des dispositifs du dernier étage étant directement reliées électriquement aux bornes de sortie, et, entre deux étages successifs, les sorties des dispositifs de l'étage de rang inférieur sont reliées électriquement aux entrées des dispositifs de l'étage de rang supérieur. Pour personnaliser un câblage on coupe soit les liaisons directes, soit les liaisons de dérivation ...

CONFIGURABLE PRINTED CIRCUIT BOARD

Hot swapping technique for expansion cards

One embodiment of the present disclosure set forth a system for hot swapping an expansion card. The system includes a fastener mechanism for coupling an expansion card to a motherboard. The system further includes a switch for controlling voltage supply to the expansion card. When the fastener mechanism is in an activated state, the fastener mechanism secures the expansion card to the motherboard and the switch causes voltage to be supplied to the expansion card. When the fastener mechanism is in a partially activated state, the fastener mechanism secures the expansion card to the motherboard and the switch prevents voltage from being supplied to the expansion card.

MARKER FOR MARKING OR CODING AN OBJECT AND METHOD FOR PRODUCING SUCH A MARKER AND USE

On a marker for marking or coding an object, a plurality of marker elements (4, 5, 6) made of a conducting or conductive material are provided, the marker elements (4, 5, 6) can be applied onto and/or integrated into a partial region of the object made of an insulating material, the marker elements (4, 5, 6) are or can be connected at least partially to each other by a connecting element (7, 8) made of a conducting or conductive material for forming a code, and the marker elements (4, 5, 6) can be contacted at least partially by elements ascertaining a conducting state between individual marker elements (4, 5, 6) for capturing the code, wherein a plurality of mutually associated or associatable marker elements (4, 5, 6, 9, 10) are disposed or configured in different levels or layers of an insulating partial region of an object, particularly a planar object. In addition, a method for producing such a marker and also a use of such a marker in connection with a circuit board, particularly ...

APPARATUS FOR MAKING CONTACT WITH A DIRECTION-DEPENDENT ELECTRICAL AND/OR ELECTRONIC COMPONENT, AND CORRESPONIDNG COMPONENT ARRANGEMENT

The invention relates to an apparatus (20) for making contact with a direction-dependent electrical and/or electronic component (10) comprising a predefined first number of functions with which contact is to be made, having a main body (21) and a predefined first number of first contact elements (23) which are each assigned to a function with which contact is to be made according to a predefined connection assignment and are arranged on the main body (21) with predefined positioning, and to an associated component arrangement having such a contact-making apparatus (20). According to the invention, the first contact elements (23) are positioned on the main body (21) in a rotationally symmetrical manner through an angle of 90°, with the result that no different component-based functions lie on one another when the direction-dependent electrical and/or electronic component (10) is rotated through 90°.

METHODS AND APPARATUS FOR FABRICATING CHIP-ON-BOARD MODULES

A method of assembling a Chip-on-Board memory module as shown in Fig. 1, the method may be divided into several area or steps, mounting (step 100), patching (step 110), testing (step 120), and covering (step 130). During mounting (step 100), preferably, at least one unpackaged chip is mounted on a printing circuit board. In some embodiments, a selectively settable material may used to mount unpackaged memory parts. When mounting die on PC (step 101), a ring of selectively settable material is preferably used to surround the die and hold the die in place. Once mounted the alignment of each unpackaged chip may be adjusted (step 102), after which the ring selectively settable material disposed around the chip is cured or hardened (step 103). The hardened ring around each die keeps the die in place. In some embodiments, the ring is higher than the die it surround to facilitate the addition of bond wires.

Configurable circuit board and fabrication method

Circuit boards capable of receiving different sets of electrical devices are fabricated from raw boards of the same type by forming respective networks of electrically conductive traces with a common layout on the raw boards, including open circuits within the networks. Electrical device receivers and controllers are then loaded on the boards, and some of the open circuits are closed such that some of the boards have different patterns of closed circuits and thereby different interconnections. Some of the receivers can accommodate two different types of electrical devices, with some of the boards configured to support one type and the others another type. The loading of receivers and controllers, and the closing of open circuits, can be performed simultaneously with the placement of zero ohm resistors used for circuit closings. Numerous different circuit board configurations can thus be supported from a common supply of raw boards.

Cross-connecting by permutations using configurable printed circuits

The invention relates to wiring in a junction box using a printed circuit panel having on one of its edges N input terminals and on the opposite edge N output terminals, and between said two edges, a plurality of stages of individual connection devices each having two inputs and two outputs, the two inputs of a device being electrically connected to the two outputs of said device firstly by two direct connections and secondly by two crossed-over branch connections, the inputs of the devices of the first stage being electrically connected directly to input terminals, the outputs of the devices of the last stage being electrically connected directly to the output terminals, and between two successive stages, the outputs of each device of a lower stage are electrically connected to respective inputs of each device of the stage of higher rank. To personalize the wiring, either the direct connections or else the branch connections are interrupted in each of the devices.

Method of constructing a number of different memory systems

A printed circuit board assembly includes at least two layers which is able to accommodate a subsystem such as a memory subsystem designed to have one or more optional features. The two layers of the printed circuit board when etched include the required number of horizontal and vertical paths to be connected to all of the integrated circuit chips to be positioned and interconnected thereon. The required holes for such integrated circuit chips when drilled include first sets of holes for mounting groups of integrated circuit chips required for implementing a first group of features and which are to be interconnected to the other integrated circuit chips of the subsystem mounted on the different sections of the board. Second sets of holes are included on the board so as to have a predetermined relationship with the first sets of holes for mounting alternative groups of integrated circuit chips to be interconnected in a manner to implement other features. Thereafter, the circuit board is ...

Converter device

A plurality of converter circuits is connected in parallel while reducing conduction loss. A converter circuit is formed on each of a plurality of circuit boards, and a plurality of types of terminal connection patterns containing power input terminal connection patterns and power output terminal connection patterns are formed on the end portions of each of the circuit boards with the disposition positions substantially matching each other. The terminal connection patterns at the same position of each circuit board are sandwiched by each of clips of a common terminal member, each of the circuit boards is laminated and fixed, and the converter circuits of each of the circuit boards are connected in parallel. The conduction path for electrically connecting the converter circuit of each circuit board becomes short, making it possible to reduce conduction loss. Also, it is possible to mount a plurality of converter circuits without increasing the occupied area of a motherboard to be mated therewith ...

Flip-chip semiconductor device having anisotropic electrical interconnection and substrate utilized for the package

Disclosed is a flip-chip semiconductor device having isotropic electrical interconnection, primarily comprising a chip and a substrate. The chip has at least a first bump and a plurality of second bumps. The substrate has a plurality of bump pads disposed on the top surface and an isotropic connecting mechanism disposed inside the substrate consisting of a plurality of terminals electrically isolated from each other and a flexible vertical pad protruded from the top surface, wherein the disposition locations of the terminals circle around the flexible vertical pad as a disposition center. When the second bumps of the chip are bonded onto the corresponding bump pads, the first bump presses and bends the flexible vertical pad in a specific horizontal direction so that the flexible vertical pad selectively and electrically connect to a selected one of the terminals.

ACCESSARY CIRCUIT ASSEMBLY FOR CONNECTION TO ELECTRIC PACKAGE AND CIRCUIT ITSELF

Speicherplatine für einen Atari R -Computer Falcon R 030

Mehrlageschaltungsherstellung und Stuktur mit Anpassungsmöglichkeit und Komponenten dafür

Schaltungsanordnung und Verfahren zur elektrischen Ankopplung eines Anschlusskabels an eine elektrische Schaltung

Schaltungsanordnung mit einer elektrischen Schaltung (2), die auf einer Leiterplatte (3) ausgebildet ist und die mehrere Anschlussstellen (29, 30, 31, 32) aufweist, die zur Einkopplung und/oder Auskopplung von elektrischen Signalen in die elektrische Schaltung (2) und/oder aus der elektrischen Schaltung (2) eingerichtet sind, wobei die Leiterplatte (3) mehrere Anschlussmittel (21, 22, 23, 24) umfasst, die zum Anschluss von elektrischen Leitern (4, 5, 6, 7) eines Anschlusskabels (8) ausgebildet sind und die über Leiterbahnen (11 bis 20) der Leiterplatte (3) elektrisch mit den Anschlussstellen (29, 30, 31, 32) verbunden sind, dadurch gekennzeichnet, dass wenigstens zwei der Anschlussmittel (22, 23) jeweils eine Auswahleinrichtung (27, 28) zugeordnet ist, die für eine wahlweise elektrische Verbindung des jeweiligen Anschlussmittels (22, 23) mit wenigstens zwei unterschiedlichen Anschlussstellen (30, 31) ausgebildet ist, wobei die Auswahleinrichtungen (27, 28) als elektrisch einstellbare Umschalter ...

Low-cost method for selectively reducing switch loss

MAKING CONNECTIONS BETWEEN EELCTRICAL CONTACTS

Electrical wiring assembly

... 866,984. Printed circuits. INTERNATIONAL BUSINESS MACHINES CORPORATION. Sept. 3, 1957 [Sept. 4, 1956], No. 27752/57. Class 37. A circuit assembly comprises a stack of insulating cards, each carrying a plurality of separate conductors some of which have been interrupted by punching, conductors on adjacent cards being inter-connected to form a three-dimensional circuit. The cards described are of plastic material and of a size suitable for perforating in punched card accounting machines. Fig. 9 shows a partly cut-away view of a stack of such cards, alternate cards baving parallel strips of conducting material positioned respectively to correspond to the rows and columns of the accounting cards. At each indexing or punching position a projection is formed on either side of each conducting strip extending to the surface of the card. These projections 13 provide connections between conductors in corresponding positions on adjacent cards of the stack. Holes such as 41 are punched to isolate sections ...

METHOD AND APPARATUS FOR INFORMATION CODING OF A SEMICONDUCTOR HOUSING

MEMORY MODULE BUILDING GROUP, WHICH USES PARTIAL DEFECTS CHIPS

PRINTED PRINTED CIRCUIT BOARD

ELECTRONIC CONSTRUCTION UNIT

Memory module assembly using partially defective chips

METHOD AND PRINTED CIRCUIT BOARD APPARATUS

Prototype development system

Reconfigurable data processing system

Printed wiring board, circuit board, and control unit

A printed wiring board (100) has: a pattern of a primary circuit (101) that receives power supply of a high voltage from a high-voltage power supply, and a pattern of a low-voltage circuit (105) that is used when a low-voltage component (102) used at a low voltage lower than the high voltage, and a power supply terminal block that receives power supply of a low voltage from a low-voltage power supply (112) are mounted; a pattern of a common circuit (104) to be used when a high-voltage component (108) to be used at a high voltage is mounted, and when the low-voltage component (102) is mounted; a first insulating section (106) that insulates the pattern of the primary circuit (101) and the pattern of the common circuit (104) from each other; and a second insulating section (107) that insulates the pattern of the common circuit (104) and the pattern of the low-voltage circuit (105) from each other.

Reconfigurable data processing system

UNIVERSAL PROGRAMMABLE INTERFACE

A universal, programmable interface for interconnecting printed circuit boards and discrete wires. Standard card-edge connectors and standard cables interconnect one or two bytes of i/o signals between the pc boards and the programmable interface, with the interface being programmed by jumpers to interconnect the desired contact fingers of the interface with screw-type terminations for receiving discrete wires.

ELECTRONIC PACKAGE ASSEMBLY AND ACCESSORY COMPONENT THEREFOR

ELECTRONIC PACKAGE ASSEMBLY AND ACCESSORY COMPONENT THEREFOR An accessory circuit component for an electrical package is disclosed. This circuit component includes a conductive path for connecting an accessory component to selected contacts of the electrical package. The conductive path includes portions thereof which are selectively removable to create an open electrical circuit between the selected package contacts.

TEST CIRCUIT BOARD AND METHOD FOR TESTING A TECHNOLOGY USED TO MANUFACTURE CIRCUIT BOARD ASSEMBLIES

A test circuit board has a substrate having one or both of its surfaces adapted to mount selected one or more of electrical or electronics components of predetermined packaging types, as part of one or more circuit carried by the substrate, to form a test circuit board assembly. Each circuit has set of component connection sites interconnected by conducting traces and including, for each predetermined packaging type, at least one connection site having an input contact pad and an output contact pad adapted to be electrically bond to corresponding connecting terminals of the component characterized by its packaging type. The circuit further has a set of pairs of connecting areas associated with the set of component connection sites, the areas of each pair being in electrical communication respectively with the input contact pad the output contact pad of the component connection site to which it is associated The board further has leads adapted to interface each circuit with an electrical ...

KEY CARD APPARATUS

Printing complex electronic circuits

Printed circuit board and power supply module

Système de connexion

La présente invention concerne un système de connexion du type comprenant un circuit imprimé 3 comportant des pistes électriques conductrices, un boîtier en matériau électriquement isolant 1 ouvert sur une face, en contact avec le circuit 3 par l'une de ses faces latérales 12, un élément mâle 2, caractérisé en ce qu'au moins une partie de la face 12 du boîtier 1 en contact avec le circuit 3 est formée de languettes 120, 120' susceptibles de se déformer élastiquement selon une direction sensiblement perpendiculaire à ladite face 12 et en ce que le circuit imprimé comporte sélectivement des trous 30 dans la région prévue pour recevoir ledit boîtier 1, pour autoriser sélectivement la pénétration des languettes 120, 120' dans les trous 30 du circuit 3 de sorte que les languettes 120 en regard d'un trou 30 et aptes à pénétrer dans celui-ci, puissent libérer l'espace interne dudit boîtier 1 tandis que les autres languettes 120' font saillie à l'intérieur du boîtier et que l'élément mâle 2 est ...

PROCEEDED OF PROGRAMMING OF the ADDRESS Of PERIPHERAL AND PERIPHERAL FOR SA IMPLEMENTED

TOGETHER SPANGLE HAS INCLUDING/UNDERSTANDING A MULTI-LAYER SUBSTRATE OF WIRING

A METHOD FOR ALLOWING the CODING Of AGREEMENT Of a DEVICE OF TRANSMISSION WITH Another, AND DEVICE OF TRANSMISSION, SUCH AS TRANSMITTER OR RECEIVER, CORRESPONDING

Connection system

METHOD AND DEVICE FOR MOUNTING CIRCUIT BOARD FOR MEMORY SUBSYSTEM

METHOD OF MAKING REPRESENTATIONS OF,AND METHOD OF AND MEANS FOR MAKING,PRINTED CIRCUIT BOARDS

A modular printed circuit construction using visual or other representations (1 to 7) which can be arranged so as to produce a visual pattern in which continuous interconnections between the modules appear (automatically as a result of overlapping of individual representations). The composite visual pattern can be used to produce a unitary printed circuit board. Alternatively the individual printed circuit boards can be combined in a board assembly using a mounting frame or edge connectors. Two dimensional extension is possible. Particular applications include microprocessor systems (including parallel processors using a common memory). Bus lines can extend completely across individual representations or the unitary board. The positions of such lines can be determined in dependence on the number of individual representations to which they are common.

Printing complex electronic circuits

A programmable circuit includes an array of printed groups of microscopic transistors or diodes. The devices are pre-formed and printed as an ink and cured. The devices in each group are connected in parallel so that each group acts as a single device. In one embodiment, about 10 devices are contained in each group so the redundancy makes each group very reliable. Each group has at least one electrical lead that terminates in a patch area on the substrate. An interconnection conductor pattern interconnects at least some of the leads of the groups in the patch area to create logic circuits for a customized application of the generic circuit. The groups may also be interconnected to be logic gates, and the gate leads terminate in the patch area. The interconnection conductor pattern then interconnects the gates for form complex logic circuits.

Electrical apparatus having an electromagnetic device operable at multiple inductance values

An electrical apparatus and method for matching the input power source and output impedance of the electrical apparatus utilizes electromagnetic devices having two or more inductive windings, which may be connected in various series and/or parallel circuit configurations, by inserting them into a circuit board specially configured to accept my improved electromagnetic devices, and attaching jumpers to the circuit board for selecting the particular inductive windings to be incorporated into the electrical apparatus. The windings not selected for a given electromagnetic apparatus remain unconnected within the electromagnetic device.

Method and arrangement for customizing electronic circuit interrupters

An electronic circuit interruption device having a plurality of protection, indication and control options includes a dedicated printed circuit board having electrical connection with operating circuits controlling each of the several options. Electrical connections between the operating circuits and the circuit interruption controller is made through corresponding dedicated resistors. Option selection is obtained by removal of resistors connecting with non-selected circuits on the printed circuit board.

Electric clock module suited for adapting the battery polarity to that of the circuit

The module comprises a first printed circuit (1) on one end portion (51) of a flexible support (50), and a second printed circuit (40) housed in a recess (53) provided in the watch plate (22). The first circuit has four conductive areas (2, 3, 8, 9). The second circuit has one side (40b) a first pair of conductive areas (41, 42) and on its other side (40a) a second pair of conductive areas (47,48). Two of the conductive areas (2, 3) of the first circuit are connected to the electrodes of a cell while its two other conductive areas (8, 9) are connected to the supply terminals of an electronic circuit. The second circuit (40) may be placed in the recess (53) in two different positions, identified by a pair of symbols. Each position corresponds to a different cell polarity. Upon folding down said end portion (51) of the flexible support (50) on the watch plate (22) after having placed the second circuit (40) in the position corresponding to the polarity of the cell, the conductive areas of ...

Electrical connection box

To provide an electrical connection box which can easily respond to a change in the circuit construction among different types of vehicles and among different grades of the same type of vehicles, and can be generally used, an internal circuitry of an electrical connection box is divided into a common circuitry 1 and a special circuitry 2. A conductive layer on which the common circuitry 1 is formed and another conductive layer on which the special circuitry 2 is formed are arranged one over the other at different levels in a casing of the electrical connection box. The common circuitry 1 comprises flat busbars 10, whereas the special circuitry 2 preferably comprises a wire, longitudinal busbars 20, or a flat circuit 25 such as a flexible printed circuit (FPC) or a printed circuit board (PCB). The common circuitry 1 and the special circuitry 2 may alternatively be formed of the same conductive material. ...

Programmierung von Steuergeräten bei geschlossenem Gehäuse

Verfahren zur Herstellung einer elektrischen Geraeteschaltung

ADDRESS CODE ARRANGEMENTS

A method of connecting wiring with a PCB

A method of connecting wiring with a printed circuit board (10) includes the step of manufacturing the PCB (10) so that solder pads (11) for components are provided with conductive tracks (13 to 20) each of which extends to a corresponding one of a series of pins located at a common edge of the PCB (10). In a subsequent step of the method, interconnection of conductors with the pins is effected by push-on connection with the pins of sockets located at free ends of the conductors.

CODE CARRYING DEVICES

... 1306757 Testing printed circuit boards PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 19 April 1971 [15 April 1970] 26764/71 Heading G1U [Also in Division G4] A printed circuit board E, Fig. 2 is provided with a plurality of binary coding elements to effect recognition thereof at least a plurality 19-26 of which are electrical contact connected to one of two in puts 17, 18, a further plurality 27-30 being of a photo-electric type, the coding elements further comprising an electrical impedance 35 between an input terminal 17 and a further contact 33. A further impedance 36 may be connected to the other input 18 and the contact 33. Upon application of a power source, the contacts 19-26 provide a digital indication, and the impedances 35, 36 provide an analogue signal. The apparatus of Fig. 3 may be employed wherein the circuit board 49 comprising a circuit 39, binary and analogue code elements 38, 40 respectively, is coupled with power sources 42, 28, a decoder 43 for the digital part and ...

MULTILAYER ELECTRICAL DEVICE

PRINTED CIRCUIT BOARD

ELECTRONIC EQUIPMENT WITH MEANS RANKING BRIDGES FIXED FUNCTION.

PROGRAMMABLE LAMP PLUG

Method and arrangement for customizing electronic circuit interrupters

PROGRAMMABLE TRANSDERMAL DRUG DELIVERY SYSTEM

Signal transmission line and circuit board

A signal line and a circuit board that can be easily bent in a U shape and prevent unwanted emission include a line portion includes a plurality of laminated line portion sheets made of a flexible material. Signal lines extend within the line portion in an x-axis direction. Ground lines are provided within the line portion on a positive direction side in a z-axis direction with respect to the signal lines and have line widths equal to or smaller than the line widths of the signal lines. Ground lines are provided within the line portion on a negative direction side in the z-axis direction with respect to the signal lines. The signal lines overlap the ground lines when seen in a planar view from the z-axis direction.

Z-directed pass-through components for printed circuit boards

A Z-directed signal pass-through component for insertion into a printed circuit board while allowing electrical connection from external surface conductors to internal conductive planes or between internal conductive planes. The Z-directed pass-through component is mounted within the thickness of the PCB allowing other components to be mounted over it. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body.

Circuit board with double-sided universal circuit layout and layout method thereof

A circuit board with double-sided universal circuit layout for laying out electronic components has a first side with a first circuit layout thereon and an opposing second side with a second circuit layout thereon; hence, the first circuit layout and the second circuit layout are disposed on the opposing sides of the circuit board, respectively. The first circuit layout and the second circuit layout feature electronic circuits having the same function, thereby allowing users to selectively install the electronic components at one of the first circuit layout and the second circuit layout as needed and still have access to the electronic circuits having the same function. A layout method for use with the circuit board with double-sided universal circuit layout is further introduced.

Printed circuit board with compound via

A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.

Printed circuit board

A power source terminal and a ground terminal for a semiconductor integrated circuit are connected to a conductor pattern through a capacitor. The conductor pattern is connected, through a filter, to a plane conductor connected to neither a ground plane nor a power source plane. Thus, a common mode noise arising from between the power source and the ground is caused to flow into the plane conductor. This reduces the common mode noise flowing in the ground and the power source of the printed wiring board, which relatively act as antennas.

Electrosurgical Systems and Printed Circuit Boards for Use Therewith

An electrosurgical system for treating tissue is disclosed. The system includes an electrosurgical generator, a printed circuit board, a generator ground and a patient ground. The printed circuit board is disposed in mechanical cooperation with the electrosurgical generator and includes a plurality of conductive layers. The generator ground includes a first portion and a second portion. The first portion is electro-mechanically connected to a conductive layer of the printed circuit board and the second portion is electro-mechanically connected to another conductive layer of the printed circuit board. The patient ground includes a portion that is at least partially interposed between the first portion of the generator ground and the second portion of the generator ground.

Plug connector and multi-layer circuit board

The invention relates to a multi-pole plug connector ( 90 ) for contacting a multi-layer circuit board ( 51 ), comprising a plurality of contact elements ( 50 a, 50 b - 50′ a, 50′ b ), as well as to a multi-layer circuit board for assembly with a multi-pole plug connector ( 90 ), comprising blind boreholes ( 60 a, 60 b - 60′ a, 60′ b ) for contacting terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) of the contact elements ( 50 a, 50 b - 50′ a, 50′ b ) of the multi-pole plug connector ( 90 ). The invention further relates to a combination of a multi-pole plug connector ( 90 ) for contacting with a multi-layer circuit board ( 51 ) and to a multilayer circuit board for assembly with the multi-pole plug connector ( 90 ). The plug connector ( 90 ) according to the invention is characterized by terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) that have different lengths for contacting the terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) with conductors ( 52 a, 52 b; 72 a, 72 b - 72′ a, 72′ b ) of the multi-layer circuit board ( 51 ) provided in different conductor levels ( 71 - 71 ′). The multi-layer circuit board ( 51 ) according to the invention is characterized by blind boreholes ( 60 a, 60 b - 60′ a, 60′ b ) that terminate in different conductor levels ( 71 - 71 ′) of the multilayer circuit board ( 51 ) for deliberately contacting the terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) with conductors ( 52 a, 52 b; 72 a, 72 b - 72′ a, 72′ b ) of the multilayer circuit board ( 51 ) provided in different conductor levels ( 71 - 71 ′).

System and method for protecting a computing device using vsd material, and method for designing same

Embodiments described herein provide for programmatic design or simulation of substrates carrying electrical elements to integrate voltage switchable dielectric (“VSD”) material as a protective feature. In particular, VSD material may be incorporated into the design of a substrate device for purpose of providing protection against transient electrical conditions, such as electrostatic discharge (ESD).

Electronic control device including interrupt wire

An electronic control device includes a substrate, a plurality of component-mounted wires disposed on the substrate, a plurality of electronic components mounted on the respective component-mounted wires, a common wire disposed on the substrate and coupled with each of the electronic components, an interrupt wire coupled between one of the component-mounted wires and the common wire, a connection wire via which the interrupt wire is coupled with one of the common wire and the one of the component-mounted wires, and a solder disposed between each of the electronic components and a corresponding one of the component-mounted wires and having a lower melting point than the interrupt wire. The interrupt wire is configured to melt in accordance with heat generated by an overcurrent so as to interrupt a coupling between the one of the component-mounted wires and the common wire.

Reprogrammable circuit board with alignment-insensitive support for multiple component contact types

The present invention is directed to a system that programmably interconnects integrated circuit chips and other components at near-intra-chip density. The system's contact structure allows it to adapt to components with a wide variety of contact spacings and interconnection requirements, the use of releasable attachment means allows component placement to be modified as needed, the system identifies the contacts and the components to facilitate specifying the inter-component connections, and the system provides signal conditioning and retiming to minimize issues with signal integrity and signal skew.

Illumination device and display device

Provided is an illumination device in which it is possible to suppress a member mounted with a light source such as an LED from being displaced, and to make said member and the illumination device smaller. A backlight unit ( 49 ) is provided with a plurality of mounting substrates ( 11 ) having various shapes, wherein the shapes are formed in a manner such that if at least one mounting substrate ( 11 ) were to move in either of two intersecting directions in the plane of the substrate, the two neighboring mounting substrates would be shaped so as to come into contact with and restrict one of the other neighboring mounting substrates ( 11 ).

Usb interface device and circuit board thereof

An exemplary USB interface device includes a circuit board and a USB socket mounted on the circuit board. The USB socket includes a connecting port, a plurality of electrical pins and fixing pins extending from a side of the USB socket. The circuit board defines first and second inserting hole groups. The USB socket can be selectively inserted into the first or second inserting hole group according to the type of USB socket. When the electrical pins and the fixing pins of the USB socket are inserted into and fixed on the first inserting hole group of the circuit board, the second inserting hole group is standing idle. When the electrical pins and the fixing pins of the USB socket are inserted into and fixed on the second inserting hole group of the circuit board, the first inserting hole group is standing idle.

Conductive sheet, usage method of conductive sheet and capacitive type touch panel

Disclosed are a conductive sheet, a usage method of the conductive sheet and a capacitive type touch panel. For a first conductive sheet ( 10 A), two or more conductive first large grids ( 14 A) are formed atop a first transparent base ( 12 A), wherein each first large grid ( 14 A) is constituted by combining two or more small grids ( 18 ), and the shapes of facing sides of each first large grid ( 14 A) are formed to alternate. For example, rectangular waveshapes of a first side portion ( 28 a ) of the first large grid ( 14 A) and of a fourth side portion ( 28 d ) facing the first side portion ( 28 a ) are made to alternate, and rectangular waveshapes of a second side portion ( 28 b ) of the first large grid ( 14 A) and of a third side portion ( 28 c ) facing the second side portion ( 28 b ) are made to alternate.

Heat management in an above motherboard interposer with peripheral circuits

A computing device has a circuit substrate having a socket, a main processor inserted into the socket, an interposer substrate inserted between the socket and the main processor, the circuit substrate, the socket and the interposer substrate being electrically connected, at least one peripheral circuit on the interposer substrate, and a heat sink thermally coupled to the peripheral circuit.

Method and apparatus for multiple input power distribution to adjacent outputs

Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs.

Apparatus for restricting moisture ingress

Apparatus and methods to protect circuitry from moisture ingress, e.g., using a metallic structure as part of a moisture ingress barrier.

Injection molded control panel with in-molded decorated plastic film that includes an internal connector

Provided are systems and methods for a control assembly including: a first film that is in-molded that includes decorative graphics, a front surface and a rear surface; and a second film molded to the rear surface of the first film having a printed circuit that includes sensors, control circuits and interconnects and a front and rear surface; and an internal connector.

Dc/dc convertor power module package incorporating a stacked controller and construction methodology

Methods and systems are described for enabling the efficient fabrication of small form factor power converters and also the small form factor power converter devices.

Microelectronic structure including air gap

A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure.

Microelectronic structure including air gap

A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure.

Structure and circuit board

A structure ( 10 ) includes a conductor ( 151 ), conductors ( 111, 131 ) that are located on the same side with respect to the conductor ( 151 ), that are opposed to at least a part of the conductor ( 151 ), and that overlap each other when seen in a plan view, a connection member ( 101 ) that penetrates the conductors ( 111, 131, 151 ), that is connected to the conductor ( 151 ), and that is insulated from the conductors ( 111, 131 ), openings ( 112, 132 ) that are formed in the conductors ( 111, 131 ), respectively, and which the connection member ( 101 ) passes through, and conductor elements ( 121, 141 ) that are formed to be opposed to the openings ( 112, 132 ), that are connected to the connection member ( 101 ) passing through the openings ( 112, 132 ), and that are larger than the openings ( 112, 132 ). The number of layers in which the conductor elements ( 121, 141 ) are located is two or more and less than or equal to the number of layers in which the conductors ( 111, 131 ) are located.

Electrical fuse structure

An electrical fuse structure includes a top conductive pattern having a top fuse and a top fuse extension portion, a bottom conductive pattern having a bottom fuse and a bottom fuse extension portion corresponding to the top fuse extension portion, and a via conductive layer positioned between the top fuse extension portion and the bottom fuse extension portion for electrically connecting the top fuse extension portion and the bottom fuse extension portion.

PREPARING A SUBSTRATE FOR EMBEDDING WIRE

A portion of the surface of a substrate may be prepared for mounting an antenna wire such as by removing material to form a sequence of ditches (holes) separated by bridges (lands), and conforming to the pattern for the antenna, which is typically a flat squared spiral, having a number of turns. The antenna wire may be laid in the ditches and embedded in the bridges. Additional features, such as undermining or removing material from adjacent the bridges may facilitate displacement of substrate material at the bridges. The collapsed bridges form pinch points, securing the wire in the substrate. In some embodiments of the invention, relevant portions of the substrate are prepared for embedding antenna wire, without removing material. The substrate may be an inlay substrate or card body for a secure document. 1. A method of mounting a wire to a substrate for an electronic device comprising:preparing a selected area of the substrate with a sequence of ditches, separated by bridges, thereby removing material at some locations where an antenna wire will be scribed into the substrate; andscribing the antenna wire into ditches and embedding the antenna wire into the bridges.2. The method of claim 1 , wherein:the ditches coincide with a pattern for an antenna formed by the wire.3. The method of claim 2 , wherein:the pattern is a spiral pattern having a number of turns.4. The method of claim 1 , wherein:the ditches are elongated, being longer than they are wide.5. The method of claim 1 , wherein:the ditches are arranged generally end-to-end, but spaced apart from one another by the bridges.6. The method of claim 1 , wherein:{'b': '1', 'the ditches have a length (“L”);'}{'b': '2', 'the bridges have a length (“L”); and'}the ditches are longer than the bridges.7. The method of claim 6 , wherein:the ditches are at least twice as long as the bridges.8. The method of claim 6 , wherein:the ditches are approximately ten times long as the bridges.9. The method of claim 1 , wherein:the ...

Multilayer Circuit Board and Manufacturing Method Thereof

A multilayer circuit board is provided, which includes multiple core boards stacked together. The core board includes an insulation layer and at least one conductor layer attached together. The conductor layer includes a circuit. The core board has at least one identification conductor disposed at an edge of at least one conductor layer. The identification conductor forms an identification pattern on a side surface of the core board along a stacking direction of the core boards. The identification patterns of the multiple core boards are different from each other on the side surface of the multilayer circuit board along the stacking direction of the core boards. A manufacturing method of the multilayer circuit board is further provided. 1. A multilayer circuit board comprising:multiple core boards stacked together,wherein each of the core boards comprises an insulation layer and at least one conductor layer attached together,wherein each conductor layer comprises a circuit,wherein each core board has at least one identification conductor disposed at an edge of the at least one conductor layer,wherein each identification conductor forms an identification pattern on a side surface of the core board along a stacking direction of the core boards, andwherein identification patterns of the multiple core boards are different from each other on side surfaces of the multilayer circuit board along the stacking direction of the core boards.2. The multilayer circuit board according to claim 1 , wherein a length of the identification conductor is greater than or equal to 2 millimeters (mm).3. The multilayer circuit board according to claim 1 , wherein a width of the identification conductor ranges from 5 to 10 thousandths of an inch (mil).4. The multilayer circuit board according to claim 1 , wherein the identification conductor is a non-functional copper sheet.5. The multilayer circuit board according to claim 1 , wherein the identification patterns on different core boards ...

ELECTRONIC COMPONENT INCLUDING MULTILAYER SUBSTRATE

The multilayer substrate includes: a plurality of dielectric layers stacked on one another; a first conductor pattern which is disposed along a principal surface of a dielectric layer and which is electrically connected to a ground; and second conductor patterns and which are disposed along the principal surface of a dielectric layer and which are opposed to the first conductor pattern only through the dielectric layers therebetween, the second conductor patterns and forming inductor elements. Only the dielectric layers that sandwich the first conductor pattern therebetween are bonded to each other via openings through formed in the first conductor pattern As viewed from the stacking direction, the second conductor patterns substantially entirely overlap a portion other than the openings through in the first conductor pattern 1. An electronic component including a multilayer substrate , the multilayer substrate comprising:a plurality of dielectric layers stacked on one another;a first conductor pattern which is disposed along principal surfaces of the dielectric layers and which is electrically connected to a ground; anda second conductor pattern which is disposed along the principal surfaces of the dielectric layers and which is opposed to the first conductor pattern only through the dielectric layer therebetween, the second conductor pattern forming an inductor element, a stripline, or a microstrip line, which is electrically connected to an element other than a ground,wherein an opening is formed in the first conductor pattern, and only the dielectric layers that sandwich the first conductor pattern therebetween in a stacking direction of the dielectric layers are bonded to each other via the opening, andwherein, as viewed from the stacking direction in which the dielectric layers are stacked, the second conductor pattern substantially entirely overlaps portions other than the openings in the first conductor.2. The electronic component including the multilayer ...

Power converters with integrated capacitors

An apparatus having a power converter circuit having a first active layer having a first set of active devices disposed on a face thereof, a first passive layer having first set of passive devices disposed on a face thereof, and interconnection to enable the active devices disposed on the face of the first active layer to be interconnected with the non-active devices disposed on the face of the first passive layer, wherein the face on which the first set of active devices on the first active layer is disposed faces the face on which the first set of passive devices on the first passive layer is disposed.

CARD STRUCTURE, SOCKET STRUCTURE, AND ASSEMBLY STRUCTURE THEREOF

A card structure includes a first substrate, a second substrate, an intermediate unit, and a connector. The first substrate includes a base surface. The second substrate is disposed on the base surface of the first substrate and coupled to the first substrate. The connector is disposed on the base surface of the first substrate to juxtapose the second substrate via the intermediate unit and coupled to the first substrate. 1. A card structure , comprising:a first substrate comprising a base surface;a second substrate disposed on the base surface of the first substrate and coupled to the first substrate;an intermediate unit; anda connector disposed on the base surface of the first substrate to juxtapose the second substrate via the intermediate unit and coupled to the first substrate.2. The card structure as claimed in claim 1 , wherein the intermediate unit comprises at least one connecting portion claim 1 , and the connector comprises a contact unit coupled to the first substrate via the at least one connecting portion of the intermediate unit.3. The card structure as claimed in claim 2 , wherein the contact unit of the connector comprises at least one first contact portion and at least one second contact portion claim 2 , and the at least one first contact portion and the at least one second contact portion of the contact unit of the connector are coupled to the connector.4. The card structure as claimed in claim 3 , wherein the at least one first contact portion of the contact unit of the connector comprises a plurality of pad portions claim 3 , and the at least one second contact portion of the contact unit of the connector comprises a plurality of elastic plates.5. The card structure as claimed in claim 2 , wherein the at least one connecting portion of the intermediate unit comprises a cylindrical conductive structure.6. The card structure as claimed in claim 2 , wherein the at least one connecting portion of the intermediate unit comprises a cylindrical non- ...

Card structure, socket structure, and assembly structure thereof

A card structure includes a first substrate, a second substrate, and a connector. The first substrate includes a base surface, wherein at least one electronic part region and a terminal region are disposed on the base surface. The second substrate is disposed on the base surface and is coupled to the terminal region of the first substrate. The connector is disposed on the base surface to juxtapose the second substrate. The connector includes a connecting surface, a contact unit, and a plurality of contact regions disposed on the connecting surface and coupled to the contact unit and the terminal region, such that the plurality of contact regions are coupled to the second substrate via the terminal region of the first substrate.

Circuit board structure

A circuit board structure including a dielectric layer, a fine circuit pattern and a patterned conductive layer is provided, wherein the fine circuit pattern is embedded in a surface of the dielectric layer, and the patterned conductive layer is disposed on another surface of the dielectric layer and protrudes therefrom.

Method for manufacturing circuit board provided with metal posts and circuit board manufactured by the method

Provided is a method for manufacturing a circuit board provided with metal posts formed on at least one surface of the circuit board, the method including preparing a substrate made of a conductive material, performing a first selective etching a first surface of the substrate in regions corresponding to insulating portions of a first circuit pattern, laminating a first insulating layer over the first surface of the substrate, and performing a second etching on a second surface opposite of the first surface of the substrate, thereby forming the metal posts and the first circuit.

CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME

A semiconductor device () has a plurality of device-side lands () which are disposed asymmetrically in relation to an intersection point (B). The plurality of device-side lands () include 45 device-side connection lands and four device-side isolation lands. Each of the device-side connection lands is mechanically connected to a printed board () via a connection component (). Each of the device-side isolation lands is mechanically isolated from the printed board (). 1. A circuit board comprising:a printed board; anda semiconductor device being mounted to the printed board and including a plurality of device-side lands, the plurality of device-side lands disposed asymmetrically in relation to a specific reference point, the plurality of device-side lands having a plurality of device-side connection lands and a device-side isolation land, the plurality of device-side connection lands mechanically connected to the printed board with solder, the device-side isolation land mechanically isolated from the printed board.2. The circuit board according to claim 1 , whereinthe semiconductor device has a solder ball, the solder ball being connected to the device-side isolation land and mechanically isolated from the printed board.3. The circuit board according to claim 1 , whereinthe semiconductor device has a semiconductor element, andthe device-side isolation land is a dummy land which is electrically isolated from the semiconductor element.4. The circuit board according to claim 1 , whereina spacing between each of the plurality of device-side lands and the printed board is substantially uniform.5. The circuit board according to claim 1 , whereinthe printed board has a mounting face to which the semiconductor device is mounted,the semiconductor device has an opposing face which opposes the mounting face of the printed board, andthe opposing face is substantially parallel to the mounting face.6. The circuit board according to claim 1 , whereinthe plurality of device-side ...

System and method for controlling radio frequency transmissions from an electronic device

The disclosure relates to a printed circuit board (PCB) for an electronic circuit for a power amplifier of a wireless communication device. The PCB comprises: a substrate; a ground reference in the substrate; first through fourth locations and first and second pads in the substrate; and first and second electrical tracks in the substrate. The locations are for components for the PCB, including a 0 ohm component, and pads connect tracks to the components. The first pad is for a high band power input terminal of the amplifier. The first track connects the first pad to the second location. The third location is in the first track for placement of a first capacitor in a circuit between the first pad and ground. The second pad is for an output terminal of the amplifier. The second track connects the second pad to an output stage circuit of the amplifier.

Board terminal and printed circuit board provided with board terminal

A board terminal has a flat-plate shaped connection portion to be connected to an electric component at one end and an insertion portion to be inserted in and soldered to a through-hole of a printed circuit board at the other end and is formed in a crank shape by being provided with a support plate portion protruding in a plate thickness direction of the connection portion between the connection portion and the insertion portion. Also, the insertion portion is formed in a location on only one side in a width direction of the support plate portion.

Wireless terminal with reduced specific absorption rate peak and implementation method thereof

The disclosure discloses a wireless terminal with a reduced Specific Absorption Rate (SAR) peak. The wireless terminal comprises a Printed Circuit Board (PCB), wherein a fractal gap is formed at an edge of a metal ground on the PCB to disturb distribution of induced current at the edge of the metal ground. The disclosure also discloses a method for reducing an SAR peak. On the premise of the non-influence on the communication quality of the wireless terminal, the SAR and the production cost can be reduced and the structure space of wireless terminal can be saved by using the wireless terminal and the method.

Test Structure and Method of Testing Electrical Characteristics of Through Vias

A method and apparatus for testing the electrical characteristics, such as electrical continuity, is provided. A substrate, such as a wafer or an interposer, having a plurality of through vias (TVs) is provided. Along one side of the substrate, a conductive layer electrically couples two or more of the TVs. Thereafter, the electrical characteristics of the TVs may be test by, for example, a probe card in electrical contact with the TVs on the other side of the substrate. During testing, current passes through a first TV from a first side of the substrate, to the conductive layer on a second side of the substrate, to a second TV, and back to the first side of the substrate through the second TV.

METHOD FOR PRODUCING AN ELECTRICAL MULTI-LAYER COMPONENT AND ELECTRICAL MULTI-LAYER COMPONENT

A method for producing an electrical multi-layer component is described, wherein a first ceramic layer () comprising a first and a second ceramic material () is applied to a ceramic substrate (). The first ceramic material () is applied to a first surface partition () of the substrate () by a first inkjet printing step and the second ceramic material () is applied to a second surface partition () of the substrate () by a second inkjet printing step, the second surface partition () surrounding and enclosing the first surface partition (). The second ceramic material () is different from the first ceramic material (). 1. A method for producing an electrical multi-layer component , comprising the steps:providing a ceramic substrate; andapplying a first ceramic layer to the substrate,wherein the first ceramic layer comprises a first ceramic material and a second ceramic material, the first ceramic material is applied to a first surface partition of the substrate by a first inkjet printing step, and the second ceramic material is applied to a second surface partition of the substrate by a second inkjet printing step,wherein the second surface partition surrounds and encloses the first surface partition, andwherein the second ceramic material is different from the first ceramic material.2. The method according to claim 1 , wherein the first surface partition has a surface area which is equal to or smaller than 500 μm times 500 μm claim 1 , preferably equal to or smaller than 100 μm times 100 μm.3. The method according to or claim 1 , wherein the first ceramic layer has a thickness of equal to or less than 100 μm claim 1 , preferably of equal to or less than 50 μm.4. The method according to claim 1 , wherein a first electrode layer is applied to the substrate claim 1 , the first ceramic layer is applied upon the first electrode layer claim 1 , and a second electrode layer is applied to the first ceramic layer.5. The method according to claim 4 , wherein the first and ...

STRUCTURAL BODY AND INTERCONNECT SUBSTRATE

A structural body includes: a first conductor and a second conductor of which at least portions are opposite to each other; a third conductor, interposed between the first conductor and the second conductor, of which at least a portion is opposite to the first conductor and the second conductor, and has a first opening; an interconnect provided in the inside of the first opening; and a conductor via which is electrically connected to the first conductor and the second conductor and is electrically insulated from the third conductor, wherein the interconnect is opposite to the first conductor and the second conductor, one end thereof being electrically connected to the third conductor at an edge of the first opening and an other end thereof being formed as an open end. 1. A structural body comprising:a first conductor and a second conductor of which at least portions are opposite to each other;a third conductor, interposed between the first conductor and the second conductor, of which at least a portion is opposite to the first conductor and the second conductor, and which has a first opening;an interconnect provided in an inside of the first opening; anda conductor via which is electrically connected to the first conductor and the second conductor and is electrically insulated from the third conductor,wherein the interconnect is opposite to the first conductor and the second conductor, one end thereof being electrically connected to the third conductor at an edge of the first opening and an other end thereof being formed as an open end.2. The structural body according to claim 1 , wherein at least one of the conductor vias is provided at a distance equal to or less than of ½ of a wavelength of a noise electromagnetic wave from a connection portion of the interconnect and the third conductor.3. The structural body according to claim 1 , wherein the interconnect forms a strip line using the first conductor and the second conductor as a return path.4. The structural ...

METHOD OF MAKING A SUPPORT STRUCTURE

The invention relates to a method of manufacturing a support structure for supporting an article in a lithographic process, comprising: providing a substrate having an electrically conductive top layer provided on an insulator; patterning the conductive top layer to provide a patterned electrode structure; and oxidizing the conductive top layer, so as to provide a buried electrode structure having an insulating top surface. In this way a simple buried structure can be provided as electrode structure to conveniently provide an electrostatic clamp. The invention additionally relates to a correspondingly manufactured support structure for supporting an article in a lithographic process. 1. A method of manufacturing a support structure for supporting an article in a lithographic process , comprising:providing a substrate having an electrically conductive upper layer provided on an insulator layer;providing a preform patterning structure in the conductive upper layer having a height contour of electrode parts;partially converting the conductive upper layer, wherein the sides of electrode parts are converted to become isolating; thus providing a buried electrode structure having an insulating top layer that is connected to the isolator and that wholly surrounds the remaining conductive electrodes; and, after a polishing step, further comprising the step ofproviding a burl structure on the patterned electrode structure.2. A method according to claim 1 , wherein the electrically conductive upper layer is formed by a Silicon layer or any of the group of SiN or TiN.3. A method according to claim 2 , wherein the conductive layer is doped.4. A method according to claim 1 , wherein the partial conversion step is formed by thermal oxidizing or plasma treatment.5. A method according to claim 1 , wherein the burl structure is provided as a wear resistant layer that is provided on any of the oxidized top layer or insulator claim 1 , and wherein the resistant layer is partially ...

Wiring substrate, image pickup device, and image pickup module

A image pickup device includes a wiring substrate and an image pickup device. A wiring substrate includes an insulating substrate and a plurality of connection electrodes. The insulating substrate has a penetrating hole, and has an inclined area where its lower surface is inclined downward toward the opening. The plurality of connection electrodes are disposed in a surrounding region around the penetrating hole on the lower surface of the insulating substrate, and are to be electrically connected to an image sensor. The image pickup device is mounted on the lower surface of the insulating substrate of the wiring substrate, and is electrically connected to the plurality of connection electrodes.

ELECTRODE STRUCTURE WITH SPATIAL INTERPOLATION FOR CAPACITIVE TOUCH PANEL

A touch panel includes first and second sets of electrodes separated by a dielectric and oriented so that the electrodes of the first set intersect with the electrodes of the second set without touching. Each of the electrodes can be made of a plurality of individual conductors shorted together. The conductors can be provided in the form of flat cable or clockspring material. 1. An apparatus comprising:a substrate;a first electrode structure disposed on a first surface of said substrate, said first electrode structure comprising a plurality of elongated conductors extending in a first direction across said substrate in a side-by-side arrangement, said plurality of conductors of said first electrode structure electrically connected to one another;a second electrode structure disposed on said first surface of said substrate, said second electrode structure comprising a plurality of elongated conductors extending in said first direction across said substrate in a side-by-side arrangement, said plurality of conductors of said second electrode structure electrically connected to one another; anda third electrode structure disposed on a second surface of said substrate, said third electrode structure comprising at least one elongated conductor, said at least one conductor of said third electrode structure intersecting at least certain ones of said conductors of said first electrode structure and said conductors of said second electrode structure while separated therefrom by said substrate.2. The apparatus of wherein said first electrode structure comprises a first multi-conductor flat cable and wherein said conductors of said first electrode structure comprise conductors of said first multi-conductor flat cable.3. The apparatus of wherein said multi-conductor cable comprises a layer of insulating material upon which said conductors of said multi-conductor cable are disposed claim 2 , said layer of insulating material comprising said substrate.4. The apparatus of wherein ...

Printed circuit board and method for manufacturing the same

Disclosed herein is a printed circuit board, including: a core layer; and a plurality of circuit layers stacked on the core layer, wherein one of the circuit layers includes a mesh pattern and a solid pattern, and another of the circuit layers include a first signal pattern opposite to the mesh pattern and a second signal pattern opposite to the solid pattern, the second signal pattern having a high-speed signal line with a higher speed, as compared with the second signal pattern.

ALUMINUM ALLOY FILM, WIRING STRUCTURE HAVING ALUMINUM ALLOY FILM, AND SPUTTERING TARGET USED IN PRODUCING ALUMINUM ALLOY FILM

The present invention provides an Al alloy film that, in a production step of a thin-film transistor substrate, reflective film, reflective anode, touch panel sensor, or the like, can effectively prevent corrosion such as pinhole corrosion (black dots) or corrosion of the Al alloy surface when immersed in a sodium chloride solution, has superior corrosion resistance, is able to suppress hillock formation, and has superior heat resistance. The Al alloy thin film is used as a reflective film or a wiring film on a substrate, and contains 0.01-0.5 at % of Ta and/or Ti and 0.05-2.0 at % of a rare earth element. 1. An Al alloy film , comprising:from 0.01 to 0.5 at. % of Ta, Ti, or a mixture thereof; andfrom 0.05 to 2.0 at. % of a rare earth element.2. The Al alloy film according to claim 1 , wherein the rare earth element is at least one element selected from the group consisting of Nd claim 1 , La claim 1 , and Gd.3. The Al alloy film according to claim 1 , wherein when the Al alloy film is immersed in a 1% aqueous sodium chloride solution at 25° C. for 2 hours and a surface of the Al alloy film is observed with an optical microscope at a magnification of 1000 claim 1 , a fraction of a corroded area in an Al alloy film surface relative to a total area of the Al alloy film surface is suppressed to 10% or less.4. A wiring structure claim 1 , comprising:a substrate;{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the Al alloy film according to ; and'}a transparent conductive film,wherein from the substrate side,the Al alloy film and the transparent conductive film are formed in that order, orthe transparent conductive film and the Al alloy film are formed in that order.5. The wiring structure according to claim 4 , wherein the Al alloy film is directly connected to the transparent conductive film.6. The wiring structure according to claim 4 ,wherein the Al alloy film and the transparent conductive film are formed in that order from the substrate side, andwherein when an ...

Flexible Circuit Sheet

A flexible circuit assembly can include a base layer, a plurality of circuit traces and an insulative layer. The plurality of circuit traces can each be coupled to a pair of circuit pads, and the circuit traces can be formed on an upper side of the base layer. The insulative layer can be formed over the circuit traces to isolate the circuit traces from an external environment. The base layer, plurality of circuit traces and insulative layer can form a flexible circuit sheet. The base layer and the insulative layer can include material properties and a thickness configured to facilitate the flexible circuit sheet being flexible such that the flexible circuit sheet is adapted to conform to a non-planar surface of the medical device. 1. A flexible circuit assembly for a navigated medical instrument , comprising:a base layer;a plurality of circuit traces each coupled to a pair of circuit pads, the circuit traces formed on an upper side of the base layer; andan insulative layer formed over the circuit traces to isolate the circuit traces from an external environment, wherein the base layer, plurality of circuit traces and insulative layer form a flexible circuit sheet;wherein the base layer and the insulative layer include material properties and a thickness configured to facilitate the flexible circuit sheet being flexible such that the flexible circuit sheet is adapted to conform to a non-planar surface of the medical device.2. The flexible circuit assembly of claim 1 , wherein the flexible circuit sheet includes a thickness of approximately 0.05 mm.3. The flexible circuit assembly of claim 2 , wherein the flexible circuit sheet includes a thickness of 0.04 mm.4. The flexible circuit assembly of claim 1 , wherein the base layer and the insulative layer are formed from polyimide or a photoimageable coverlay.5. The flexible circuit assembly of claim 1 , further comprising an adhesive configured to contact a lower side of the base layer and adapted to adhere the flexible ...

WAFER OR CIRCUIT BOARD AND JOINING STRUCTURE OF WAFER OR CIRCUIT BOARD

A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusion which is provided in low melting point metal for electrically connecting mutually joined wafers and and which defines an interval between mutually joined wafers and without being deformed at the time when low melting point metal is melted. A joining structure of wafers and is manufactured by using wafers and at least one of which has protrusion In the manufactured joining structure of wafers and wafers and are electrically connected to each other by low melting point metal and protrusion which defines the interval between wafers and without being deformed at the time when low melting point metal is melted, is provided in low melting point metal 1. A device , comprising:a first substrate;a first conductor penetrating the first substrate;a first conductive film disposed on a first surface of the first substrate and electrically connected to the first conductor;a first protrusion disposed on the first conductive film; anda low-melting point metal disposed over the first conductive film,wherein the first protrusion has a melting point higher than a melting point of the low-melting point metal.2. The device according to claim 1 , further comprising a first metal claim 1 , whereinthe first metal covers an upper surface and a side surface of the first protrusion and a part of the first conductive film,the first metal has a first top surface and a second top surface, andthe first top surface is higher than the second top surface from the first conductive film.3. The device according to claim 2 , wherein the first metal has a melting point higher than the melting point of the low—melting point metal.4. The device according to claim 1 , further comprising a second conductive film disposed on a second surface of the first substrate claim 1 , the second surface being opposite to the first surface claim 1 , and the second conductive film being electrically connected to the first ...

FRAME ELEMENT OF A LASER GYROSCOPE COMPRISING A SUBSTRATE COMPRISING MOBILE IONS AND AN ELECTRODE

The invention pertains to a frame element of a laser gyroscope comprising a substrate comprising mobile ions and an electrode fixed to the said substrate, comprising at least one electrically conducting element, connected electrically to the said electrode, and furnished with at least one distal part integrated into the said substrate and exhibiting at least one tip and/or at least one groove, forming at least one blind hole and/or at least one groove in the said substrate, of shape corresponding to that of the said distal part or parts, so as to obtain a tip effect. 1104. Frame element of a laser gyroscope comprising a substrate comprising mobile ions and an electrode fixed to the said substrate , wherein that it comprises at least one electrically conducting element () , connected electrically to the said electrode , and furnished with at least one distal part integrated into the said substrate and exhibiting at least one tip and/or at least one groove , forming at least one blind hole and/or at least one groove in the said substrate , of shape corresponding to that of the said distal part or parts , so as to obtain a tip effect.2. Frame element of a laser gyroscope according to claim 1 , in which at least one groove exhibits a radius of curvature of a value less than the square of the greatest length of the zone of the substrate to be protected claim 1 , divided by the minimum distance separating the said groove and the zone of the substrate to be protected.3. Frame element of a laser gyroscope according to claim 1 , in which at least one tip exhibits a radius of curvature of a value less than the square of the greatest length of the zone of the substrate to be protected claim 1 , divided by the minimum distance separating the said tip and the zone of the substrate to be protected.4. Frame element of a laser gyroscope according to claim 3 , in which at least one groove exhibits a radius of curvature of a value less than the square of the greatest length of the ...

Print Compatible Designs and Layout Schemes for Printed Electronics

Embodiments of the present invention relate to circuit layouts that are compatible with printing electronic inks, printed circuits formed by printing an electronic ink or a combination of printing and conventional blanket deposition and photolithography, and methods of forming circuits by printing electronic inks onto structures having print-compatible shapes. The layouts include features having (i) a print-compatible shape and (ii) an orientation that is either orthogonal or parallel to the orientation of every other feature in the layout. 1. A layout for a printed circuit , comprising:a first layout consisting essentially of a first plurality of features, each of the first plurality of features being orthogonal or parallel to every other feature in the first plurality of features, the first plurality of features comprising (i) first print-compatible shape features and (ii) first and second subsets of features; anda second layout consisting essentially of a second plurality of features, each of the second plurality of features being orthogonal or parallel to every other feature in the first and second plurality of features, the second plurality of features comprising (i) second print-compatible shape features, (ii) a first subset that crosses over the first subset of the first plurality of features, and (iii) a second subset that crosses over the second subset of the first plurality of features.2. The layout of claim 1 , wherein each of the print-compatible shape features is independently selected from the group consisting of a rectangle claim 1 , a square claim 1 , a line claim 1 , a circle and an oval.3. The layout of claim 2 , wherein each of the first and second plurality of features consists essentially of a rectangle claim 2 , square claim 2 , or line having a length and a width claim 2 , wherein the length and width of each of the first and second plurality of features is either orthogonal or parallel to the length and width of every other feature in the ...

MULTI-LAYERED PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A multi-layered printed circuit board and a method of manufacturing the multi-layered printed circuit board are disclosed. The multi-layered printed circuit board in accordance with an embodiment of the present invention includes: an insulation layer; an inner-layer pad disposed inside the insulation layer; an inner-layer circuit wiring disposed inside the insulation layer and formed to be thinner than that of the inner-layer pad; a via connected with the inner-layer pad by penetrating the insulation layer; and an outer-layer circuit wiring formed on an outside surface of the insulation layer. 1. A multi-layered printed circuit board comprising:an insulation layer;an inner-layer pad disposed inside the insulation layer;an inner-layer circuit wiring disposed inside the insulation layer and formed to be thinner than that of the inner-layer pad;a via connected with the inner-layer pad by penetrating the insulation layer; andan outer-layer circuit wiring formed on an outside surface of the insulation layer.2. The multi-layered printed circuit board of claim 1 , wherein a height of the via protruded from the insulation layer is the same as a height of the outer-layer circuit wiring.3. The multi-layered printed circuit board of claim 1 , constituted with three layers claim 1 , which comprise one layer of inner-layer circuit wiring formed inside the insulation layer and two layers of outer-layer circuit wiring formed claim 1 , respectively claim 1 , on either surface of the insulation layer.4. A method of manufacturing a multi-layered printed circuit board claim 1 , comprising:forming a metal layer on one surface of a first insulation layer;etching the metal layer so that an inner-layer circuit wiring becomes thinner than an inner-layer pad;laminating a second insulation layer on one surface of the first insulation layer;forming a via hole in such a way that the inner-layer pad is exposed; andforming a via in the via hole and forming an outer-layer circuit wiring on an ...

CHIP CARD CONTACT ARRAY ARRANGEMENT

In various embodiments, a chip card contact array arrangement is provided, having a carrier, a plurality of contact arrays which are arranged on a first side of the carrier, an electrically conductive structure which is arranged on a second side of the carrier, which is arranged opposite the first side of the carrier, a first plated-through hole and a second plated-through hole, wherein the first plated-through hole is coupled to the electrically conductive structure, a connecting structure which is arranged on the first side of the carrier, wherein the connecting structure connects the first plated-through hole to the second plated-through hole, the connecting structure having a longitudinal extent which runs parallel to a direction in which a contact-connection device on a reading device is moved relative to the plurality of contacts. 1. A chip card contact array arrangement , comprising:a carrier;a plurality of contact arrays which are arranged on a first side of the carrier;an electrically conductive structure which is arranged on a second side of the carrier, which is arranged opposite the first side of the carrier;a first plated-through hole and a second plated-through hole;wherein the first plated-through hole is coupled to the electrically conductive structure;a connecting structure which is arranged on the first side of the carrier, wherein the connecting structure connects the first plated-through hole to the second plated-through hole; andthe connecting structure having a longitudinal extent which runs parallel to a direction in which a contact-connection device on a reading device is moved relative to the plurality of contacts.2. The chip card contact array arrangement as claimed in claim 1 ,wherein the contact arrays are arranged on the basis of ISO/IEC 7816-2.3. The chip card contact array arrangement as claimed in claim 1 ,wherein the carrier is formed from electrically insulating material.4. The chip card contact array arrangement as claimed in claim ...

PRINTED CIRCUIT BOARD HAVING WIRE PATTERN

A printed circuit board (PCB) includes a wire pattern having first and second surfaces facing in opposite directions from each other, the wire pattern including a first region having a first thickness and a second region having a second thickness greater than the first thickness; a core insulation layer on the second surface in the first region, the core insulation layer having a third surface adjacent to the second surface in the first region and a fourth surface facing in an opposite direction from the third surface, the fourth surface being connected to the second surface; and a first protection layer covering a portion of the fourth surface of the core insulation layer and a portion of the second surface in the second region. 1. A printed circuit board (PCB) , comprising:a wire pattern having first and second surfaces facing in opposite directions from each other, the wire pattern including a first region having a first thickness and a second region having a second thickness greater than the first thickness;a core insulation layer on the second surface in the first region, the core insulation layer having a third surface adjacent to the second surface in the first region and a fourth surface facing in an opposite direction from the third surface, the fourth surface being connected to the second surface; anda first protection layer covering a portion of the fourth surface of the core insulation layer and a portion of the second surface in the second region.2. The PCB as claimed in claim 1 , wherein:the first protection layer includes an opening exposing another portion of the second surface in the second region, anda width of the opening is smaller than a width of the second region.3. The PCB as claimed in claim 2 , further comprising a first external connection terminal on the second surface in the second region claim 2 , the first external connection terminal extending through the opening.4. The PCB as claimed in claim 3 , further comprising a second external ...

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

Disclosed herein is a printed circuit board, including: a base substrate; at least one circuit pattern formed on the base substrate; at least one dummy pattern formed on the base substrate; and an insulating layer formed on the circuit pattern and the dummy pattern, wherein a distance between adjacent patterns to each other among the circuit patterns and the dummy patterns meets the following Equation 1. 2. The printed circuit board as set forth in claim 1 , wherein a difference between the maximum thickness and a minimum thickness of the insulating layer is 3 μm or less.3. The printed circuit board as set forth in claim 1 , wherein the thickness of the insulating layer is 100 μm or less.4. The printed circuit board as set forth in claim 1 , wherein the base substrate is an organic substrate or an organic composite substrate.5. The printed circuit board as set forth in claim 1 , further comprising:a build up layer formed on or beneath the base substrate and including at least one circuit pattern and at least one insulating layer.7. The printed circuit board as set forth in claim 6 , wherein a difference between the maximum height and the minimum height of the insulating layer in the first region is 3 μm or less.8. The printed circuit board as set forth in claim 1 , wherein the thickness of the insulating layer is 100 μm or less.9. The printed circuit board as set forth in claim 6 , wherein the base substrate is an organic substrate or an organic composite substrate.11. The method as set forth in claim 10 , wherein in the forming of the insulating layer claim 10 , a difference between a maximum height and a minimum height of the insulating layer is formed to be 3 μm or less.12. The method as set forth in claim 10 , wherein in the forming of the insulating layer claim 10 , the thickness of the insulating layer is 100 μm or less.13. The method as set forth in claim 10 , wherein the base substrate is an organic substrate or an organic composite substrate.14. The method ...

Wiring board and method for manufacturing the same

A wiring board includes a first multilayer wiring board having first conductive layers and having a surface, a second multilayer wiring board having second conductive layers and positioned such that the second multilayer wiring board has a surface facing the surface of the first multilayer wiring board, and an adhesive layer including an adhesive sheet and interposed between the first multilayer wiring board and the second multilayer wiring board such that the adhesive layer is adhering the first multilayer wiring board and the second multilayer wiring board. The first multilayer wiring board has a first pad on the surface of the first multilayer wiring board, the second multilayer wiring board has a second pad on the surface of the second multilayer wiring board, and the first pad and the second pad are positioned such that the first pad and the second pad face each other across the adhesive layer.

TRANSPARENT CONDUCTIVE FILM

A transparent conductive film includes a film base, a cured resin layer formed at one side of the film base, and an indium composite oxide layer laminated at a side of the cured resin layer opposite to the film base. The indium composite oxide layer has a thickness of 20 nm to 50 nm. The cured resin layer has a plurality of spherical particles and a binder resin layer which fixes the plurality of spherical particles to the film base. A difference w−d between a mode particle size w and a thickness d of the binder resin layer is greater than zero and less than or equal to 1.2 μm, where w is a mode particle size of the spherical particles and d is a thickness of the binder resin layer. 1. A transparent conductive film comprising:a film base, a first cured resin layer formed at one side of the film base, and a first indium composite oxide layer laminated at a side of the first cured resin layer opposite to the film base,wherein the first indium composite oxide layer has a thickness of 20 nm to 50 nm,the first cured resin layer has a plurality of spherical particles and a first binder resin layer which fixes the plurality of spherical particles to the film base, anda difference w−d between a mode particle size w and a thickness d of the first binder resin layer is greater than zero and less than or equal to 1.2 μm, where w is a mode particle size of the spherical particles and d is a thickness of the first binder resin layer.2. The transparent conductive film according to claim 1 , wherein the difference w−d is 0.1 μm to 1.0 μm claim 1 , and the mode particle size w is 0.5 μm to 3.0 μm.3. The transparent conductive film according to claim 2 , wherein the difference w−d is 0.3 μm to 0.9 μm claim 2 , and the mode particle size w is 1.0 μm to 2.0 μm.4. The transparent conductive film according to claim 1 , wherein the first cured resin layer contains 0.1 parts by weight to 4.0 parts by weight of the plurality of spherical particles with respect to 100 parts by weight of a ...

MULTI-LAYER WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF

Embodiments of the presently-disclosed subject matter include a multilayer wiring substrate including a first laminated structure that includes at least one conductive layer and at least one resin insulating layer; a core substrate that includes a reinforced fiber and that is laminated on the first laminated structure; and a second laminated structure that includes at least one conductive layer and at least one resin insulating layer and that is formed on the core substrate; and a plurality of via conductors which penetrate the first laminated structure, the core substrate, and the second laminated structure in the thickness direction, wherein the plurality of via conductors all expand in diameter in one direction, and the reinforced fiber is located above a center of the core substrate in the thickness direction. 1. A multilayer wiring substrate comprising:a first laminated structure that includes at least one conductive layer and at least one resin insulating layer;a core substrate that includes a reinforced fiber and that is laminated on the first laminated structure;a second laminated structure that includes at least one conductive layer and at least one resin insulating layer and that is formed on the core substrate; anda plurality of via conductors that penetrate the at least one resin insulating layer of the first laminated structure, the core substrate, and the at least one resin insulating layer of the second laminated structure,wherein the plurality of via conductors all expand in diameter in the same direction, andwherein the reinforced fiber is located above a center of the core substrate in a thickness direction.2. A method of manufacturing a multilayer wiring substrate comprising:forming, on a support board, a first laminated structure that includes at least one conductive layer and at least one resin insulating layer;forming, on the first laminated structure, a core substrate that includes a reinforced fiber by laminating the core substrate on the ...

TERMINAL DEVICE AND TRANSPARENT SUBSTRATE

A transparent substrate including a transmissive electrode area including a plurality of wiring line portions arranged side by side on a substrate formed of a transparent material, a width of each of the wiring line portions being set in accordance with a current to flow through the wiring line portion; and a non-transmissive electrode area disposed on the substrate, the non-transmissive electrode being connected to the wiring line portions of the transmissive electrode area. 1. An information processing apparatus comprising:a first housing;a second housing;a transparent member disposed between the first and second housings; anda transparent substrate including a transmissive electrode area having a wiring line portion electrically connecting an interior of the first housing and an interior of the second housing, the wiring line portion having a width set based on a current flow through the wire line portion.2. The information processing apparatus of claim 1 , whereinthe wiring line portion is formed of a mesh-like electrode.3. The information processing apparatus of claim 2 , whereinthe mesh-like electrode includes a plurality of portions each having widths determined in accordance with an amount of current to flow in each of the plurality of portions.4. The information processing apparatus of claim 3 , whereinthe transmissive electrode area includes a plurality of portions in a region of the mesh-like electrode that are not included in the wiring line portion.5. The information processing apparatus of claim 1 , further comprising:a non-transmissive electrode area connected to the wiring line portion of the transmissive electrode area.6. The information processing apparatus of claim 5 , whereinthe non-transmissive electrode area includes a pad having an exposed conductive portion.7. The information processing apparatus of claim 6 , whereinthe pad is connected to another circuit substrate or an electronic component.8. The information processing apparatus of claim 7 ...

SUBSTRATE HAVING TRANSPARENT CONDUCTIVE LAYER, METHOD FOR PRODUCING SAME, TRANSPARENT CONDUCTIVE FILM LAMINATE FOR TOUCH PANEL, AND TOUCH PANEL

A substrate having a transparent conductive layer has a transparent conductive pattern that is not easily visually recognizable by a naked human eye on a transparent substrate and can be formed by a simple and efficient method. In the case where a transparent conductive pattern is formed on a transparent substrate, the pattern region does not include conductive regions covered with uniform transparent conductive films or a high-resistance region that is not covered with the transparent conductive film, the high-resistance region electrically insulating the conductive regions. Instead of the conductive regions or the high-resistance region, the inventors use a region having a structure including a mixture of a portion covered with the transparent conductive film and a portion not covered with the transparent conductive film, thereby solving the foregoing visual recognition issue. 1. A transparent substrate comprising a transparent conductive layer , the transparent conductive layer having a pattern , the transparent conductive layer being formed of a transparent conductive film containing a binder resin and a conductive substance , wherein the transparent conductive layer includes conductive regions (A) uniformly covered with the transparent conductive film and a high-resistance region (B) provided between the transparent conductive regions (A) , wherein the high-resistance region (B) includes subregions (C) covered with the transparent conductive films and subregions (D) not covered with the transparent conductive film , the subregions (C) and the subregions (D) being located in the high-resistance region (B) , and wherein the subregions (C) and/or subregions (D) form a two-dimensional arrangement having a fine period or size that is not visually recogizable by a naked human eye.2. The substrate having a transparent conductive layer according to claim 1 , wherein the two-dimensional arrangement formed by the subregions (C) and/or the subregions (D) has a repeat ...

PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

The present invention relates to a method for manufacturing a printed circuit board, which includes: preparing a base substrate with an electrode pad; providing a conductive material having a predetermined height; disposing the conductive material on the electrode pad; and forming a conductive post on the electrode pad by bonding the electrode pad and the conductive material, and can achieve a fine pitch and easily implement a conductive post with a high aspect ratio. 1. A method for manufacturing a printed circuit board , comprising:preparing a base substrate with an electrode pad;providing a conductive material having a predetermined height;disposing the conductive material on the electrode pad; andforming a conductive post on the electrode pad by bonding the electrode pad and the conductive material.2. The method for manufacturing a printed circuit board according to claim 1 , wherein providing the conductive material having a predetermined height provides the conductive material having a predetermined height by cutting the conductive material formed in a wire shape to a height to be formed.3. The method for manufacturing a printed circuit board according to claim 1 , wherein disposing the conductive material on the electrode pad disposes the conductive material on the electrode pad by moving the conductive material to the electrode pad through a jig.4. The method for manufacturing a printed circuit board according to claim 3 , wherein disposing the conductive material on the electrode pad comprises:forming a hole passing through the jig;inserting the conductive material in the hole; anddisposing the conductive material on the electrode pad by moving the jig in which the conductive material is inserted to the base substrate.5. The method for manufacturing a printed circuit board according to claim 4 , wherein inserting the conductive material in the hole inserts the conductive material in the hole using any one method selected from a vibration absorption method ...

MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING SAME

A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely. 1. A multilayer wiring board comprising: a first insulating board,', 'a plurality of first wirings provided on an upper surface of the first insulating board and made of conductive foil, and', 'a plurality of second wirings provided on a lower surface of the first insulating board and made of conductive foil;, 'a first double-sided wiring board including'}a first insulating substrate stacked on the first double-sided wiring board, the first insulating substrate having a lower surface situated on the upper surface of the first insulating board such that the first wirings are embedded in the first insulating substrate, the first insulating substrate having a plurality of first through-holes provided therein;a plurality of first vias each of which is provided in respective one of the first through-holes of the first insulating substrate;an outermost wiring formed on an upper surface of the first insulating substrate;a first fiducial mark provided on the first double-sided wiring board to position the first double-sided wiring board;a second fiducial mark provided on the first insulating substrate to position the first insulating substrate;a second insulating substrate stacked on the first double-sided wiring board, the second insulating ...

LAMINATE BODY, LAMINATE PLATE, MULTILAYER LAMINATE PLATE, PRINTED WIRING BOARD, AND METHOD FOR MANUFACTURE OF LAMINATE PLATE

A laminate body containing at least one resin composition layer and at least one glass substrate layer, wherein the resin composition layer comprises a resin composition containing a thermosetting resin and an inorganic filler. A laminate plate containing at least one cured resin layer and at least one glass substrate layer, wherein the cured resin layer comprises a cured product of a resin composition that contains a thermosetting resin and an inorganic filler. A printed wiring board having the laminate plate and a wiring provided on the surface of the laminate plate. A method for producing a laminate plate containing at least one cured resin layer comprising a cured product of a resin composition containing a thermosetting resin and an inorganic filler, and at least one glass substrate layer, which comprises a cured resin layer forming step of forming a cured resin layer on the surface of a glass substrate. 1. A laminate body containing at least one resin composition layer and at least one glass substrate layer , wherein the resin composition layer comprises the resin composition containing the thermosetting resin and the inorganic filler.2. The laminate body according to claim 1 , wherein the thickness of the glass substrate layer is from 30 μm to 200 μm.3. The laminate body according to claim 1 , wherein the thermosetting resin is one or more selected from an epoxy resin claim 1 , a phenolic resin claim 1 , an unsaturated imide resin claim 1 , a cyanate resin claim 1 , an isocyanate resin claim 1 , a benzoxazine resin claim 1 , an oxetane resin claim 1 , an amino resin claim 1 , an unsaturated polyester resin claim 1 , an allyl resin claim 1 , a dicyclopentadiene resin claim 1 , a silicone resin claim 1 , a triazine resin and a melamine resin.4. The laminate body according to claim 1 , wherein the inorganic filler is one or more selected from silica claim 1 , alumina claim 1 , talc claim 1 , mica claim 1 , aluminium hydroxide claim 1 , magnesium hydroxide claim ...

Printed Circuit Board Compensation Processing Method, Device, and PCB

The invention discloses a printed circuit board compensation processing method for fabricating a BGA despite a small distance between a line and a pad of the BGA. The method includes compensating a pad and/or a line under a predetermined condition, and removing a portion of the pad facing the line by a second predetermined width when the shortest distance between the compensated line and pad is smaller than a first predetermined distance. The invention further discloses a device for performing the method and a PCB fabricated using the method. 1. A printed circuit board compensation processing method , comprising:compensating a pad, or a line, or both of the pad and the line under a predetermined condition; andremoving a portion of the pad facing the line by a second predetermined width when the shortest distance between the compensated line and pad is smaller than a first predetermined distance.2. The method of claim 1 , further comprising: removing in a line-width direction an edge portion of the line adjacent to the pad by a first predetermined width when the shortest distance between the compensated line and pad is smaller than the first predetermined distance.3. The method of claim 2 , wherein the removing in a line-width direction the edge portion of the line adjacent to the pad by the first predetermined width comprises: removing in the line-width direction an edge portion of the line adjacent to and facing the pad by the first predetermined width so that the shortest distance between the line and the pad is greater than or equal to the first predetermined distance.4. The method of claim 1 , wherein the first predetermined distance is 3 mil.5. The method of claim 1 , wherein the printed circuit board is a printed circuit board having a ball grid array (BGA) structure.6. A printed circuit board compensation processing device claim 1 , comprising:a compensating device configured to compensate a pad, or a line, or both of the pad and the line under a ...

WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A wiring board includes a substrate which has multiple opening portions and one or more boundary portions separating the opening portions, multiple electronic devices positioned in the opening portions of the substrate, respectively, a conductive pattern formed on a surface of the boundary portion, and an insulation layer formed on the substrate and the conductive pattern on the boundary portion of the substrate such that the insulation layer covers the electronic devices in the opening portions of the substrate. 1. A wiring board , comprising:a substrate which has a plurality of opening portions and at least one boundary portion separating the opening portions;a plurality of electronic devices positioned in the plurality of opening portions of the substrate, respectively;a conductive pattern formed on a surface of the boundary portion; andan insulation layer formed on the substrate and the conductive pattern on the boundary portion of the substrate such that the insulation layer covers the plurality of electronic devices in the plurality of opening portions of the substrate.2. The wiring board according to claim 1 , wherein the boundary portion has a width which is in a range of approximately 0.05 to approximately 2.0 mm.3. The wiring board according to claim 1 , further comprising an opposing conductive pattern formed on an opposite surface of the boundary portion with respect to the conductive pattern on the surface of the boundary portion.4. The wiring board according to claim 1 , further comprising a through-hole conductor formed in the boundary portion such that the through-hole conductor is penetrating through the substrate.5. The wiring board according to claim 4 , wherein the boundary portion has a width which is in a range of approximately 0.2 to approximately 2.0 mm.6. The wiring board according to claim 4 , wherein the conductive pattern on the boundary portion has an opening portion formed in the conductive pattern on the boundary portion claim 4 , and ...

Apparatus capable of selectively using different types of connectors

An apparatus capable of selectively applying different types of connectors to a substrate is disclosed. The memory apparatus includes a substrate having a controller. First and second connector pads may be arranged on edges of top and bottom surfaces of the substrate. A via hole may be arranged between the controller and the first and second connector pads. A first passive device pad may be arranged between the via hole and the first connector pads. A second passive device pad may be arranged between the via hole and the second connector pads. A passive device may be coupled to only one of the first passive device pad or the second passive device pad.

Transparent conductive element, input device, electronic device, and master for fabrication of transparent conductive element

A transparent conductive element includes a base having a first surface and a second surface, and a transparent electrode pattern part and a transparent insulating pattern part formed on at least one of the first surface and the second surface. The transparent electrode pattern part and the transparent insulating pattern part are laid alternately on a base surface. Plural pore portions are randomly formed apart in the transparent electrode pattern part and. Plural island portions are randomly formed apart in the transparent insulating pattern part.

WIRING BOARD AND METHOD FOR MANUFACTURING WIRING BOARD

A wiring board includes an interlayer insulation layer, conductive patterns formed on the interlayer insulation layer, and a solder-resist layer formed on the interlayer insulation layer and having an opening partially exposing the conductive patterns. The solder-resist layer has an edge portion bordering the opening and intersecting the conductive patterns, and the edge portion of the solder-resist layer has a concavo-convex shape having convex portions and concave portions such that the convex portions and the concave portions are alternately intersecting the conductive patterns. 1. A wiring board , comprising:an interlayer insulation layer;a plurality of conductive patterns formed on the interlayer insulation layer; anda solder-resist layer formed on the interlayer insulation layer and having an opening partially exposing the plurality of conductive patterns,wherein the solder-resist layer has an edge portion bordering the opening and intersecting the conductive patterns, and the edge portion of the solder-resist layer has a concavo-convex shape having a plurality of convex portions and a plurality of concave portions such that the convex portions and the concave portions are alternately intersecting the conductive patterns.2. The wiring board according to claim 1 , wherein the solder-resist layer has an opposing edge portion bordering the opening and formed on an opposite side of the opening with respect to the edge portion claim 1 , and the opposing edge portion of the solder-resist layer has a concavo-convex shape having a plurality of convex portions and a plurality of concave portions such that the convex portions and concave portions of the opposing edge portion are alternately intersecting the conductive patterns.3. The wiring board according to claim 1 , wherein the solder-resist layer has an opposing edge portion bordering the opening and formed on an opposite side of the opening with respect to the edge portion claim 1 , and the opposing edge portion of ...

Printed circuit board and the method for manufacturing the same

Provided is a method for manufacturing a printed circuit board. The method for manufacturing a printed circuit board includes preparing an insulation board, irradiating a laser onto a graytone mask to each a surface of the insulation board, thereby forming a circuit pattern groove and a via hole at the same time, and filling the circuit pattern groove and the via hole to form a buried circuit pattern and the via. Thus, the circuit pattern groove and the via hole may be formed using the graytone mask at the same time without performing a separate process for forming the via hole. Therefore, the manufacturing process may be simplified to reduce the manufacturing costs.

Microelectronics device including anisotropic conductive layer and method of forming the same

A microelectronics device includes a first substrate, first electrodes disposed on the first substrate, an insulating layer covering the first electrodes, the insulating layer including openings on the first electrodes, and an anisotropic conductive film on the insulating layer, the anisotropic conductive film including conductive particles electrically connected to the first electrodes through the openings.

Circuit Board, Method for Fabricating the Same and Semiconductor Package Using the Same

A circuit board is provided including a core insulation film having a thickness and including a first surface and an opposite second surface, an upper stack structure and a lower stack structure. The upper stack structure has a thickness and has an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film. The lower stack structure has a thickness and has a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film. A ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.2. 1. A circuit board comprising:a core insulation film having a thickness and including a first surface and an opposite second surface;an upper stack structure having a thickness and having an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film; anda lower stack structure having a thickness and having a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film, wherein a ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.25.2. The circuit board of claim 1 , wherein the upper conductive pattern and the upper insulation film comprise a plurality of layers sequentially and repeatedly stacked on the first surface and the lower conductive pattern and the lower conductive pattern and the lower insulation film comprise a plurality of layers sequentially and repeatedly stacked on ...

MULTILAYER ELECTRONICS ASSEMBLY AND METHOD FOR EMBEDDING ELECTRICAL CIRCUIT COMPONENTS WITHIN A THREE DIMENSIONAL MODULE

A multilayer electronics assembly and associated method of manufacture are provided. The multilayer electronics assembly includes a plurality of stacked substrate layers. Each of the substrate layers is fusion bonded to at least an adjacent one of the plurality of substrate layers. A first discrete electrical circuit component is bonded to a first layer of the plurality of layers. A bonding material is interposed between the discrete electrical circuit component and the first layer. The bonding material has a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers. 1. A multilayer electronics assembly , comprising:a plurality of stacked substrate layers, each of the plurality of substrate layers fusion bonded to at least an adjacent one of the plurality of substrate layers;a first discrete electrical circuit component bonded to a first layer of the plurality of layers; anda bonding material interposed between the discrete electrical circuit component and the first layer, the bonding material having a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers.2. The multilayer electronics assembly according to claim 1 , further comprising:a second discrete electrical circuit component bonded to a second layer of the plurality of layers.3. The multilayer electronics assembly according to claim 2 , wherein the plurality of substrate layers are stacked in a first direction claim 2 , and the first discrete electrical component overlaps the second discrete electrical component in the first direction.4. The multilayer electronics assembly according to claim 1 , wherein the plurality of substrate layers are stacked in a first direction claim 1 , and the first discrete electrical circuit component is positioned between adjacent layers of the plurality of stacked substrate layers.5. The multilayer electronics ...

ELECTRONIC CARD, AN ELECTRONIC DEVICE INCLUDING SUCH A CARD, AND A METHOD OF PROTECTING AN ELECTRONICS CARD

An electronics card comprising a stack of printed circuit layers, each comprising an electrically insulating support having at least one conductive track extending thereon, and two electromagnetic shields extending respectively over a top face and over a bottom face of the stack, each shield comprising a grid and a plate that are superposed and electrically conductive, each extending over an electrically insulating support, and the conductive tracks being obtained by solid copper type etching. The invention also provides a device including such a card, and a method of protecting such a card of such a device against a lightning strike and against electromagnetic radiation. 1. An electronics card comprising a stack of printed circuit layers , each comprising an electrically insulating support having at least one conductive track extending thereon , and two electromagnetic shields extending respectively over a top face and over a bottom face of the stack , the card being characterized in that each shield comprises a grid and a plate that are superposed and electrically conductive , each extending over an electrically insulating support , and the conductive tracks are obtained by solid copper type etching.2. The card according to claim 1 , wherein the grid extends between the support of the plate and the stack.3. The card according to claim 1 , wherein the grid has tracks that are about 1 mm wide and that are spaced apart from one another by about 5 mm.4. An electronic device comprising a housing containing at least one electronics card comprising a stack of printed circuit layers claim 1 , each comprising an electrically insulating support having at least one conductive track extending thereon claim 1 , and two electromagnetic shields extending respectively over a top face and over a bottom face of the stack claim 1 , the card being provided with an electrical connection with the outside of the housing claim 1 , and with at least one anti-lightning component claim 1 , ...

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

In a suspension board, a conductor layer having a predetermined pattern is formed on the upper surface of a first insulating layer. The first insulating layer has a thick portion having a large thickness and a thin portion having a small thickness. A reinforcing layer is formed on the upper surface of the first insulating layer so as to overlap with a boundary between the thick portion and the thin portion. 1. A printed circuit board comprising:a first insulating layer that has first and second surfaces and includes a first portion and a second portion having a smaller thickness than a thickness of said first portion;a conductor layer that is formed on said first surface of said first insulating layer and has a predetermined pattern; anda reinforcing layer that is formed in a partial region on said first surface of said first insulating layer so as to overlap with a boundary between said first portion and said second portion.2. The printed circuit board according to claim 1 , whereinsaid partial region on said first surface of said first insulating layer is formed to be flat, and a step caused by the boundary between said first portion and said second portion is formed on said second surface of said first insulating layer.3. The printed circuit board according to claim 1 , whereinat least part of said conductor layer is formed so as to overlap with said second portion.4. The printed circuit board according to claim 1 , whereinat least part of said conductor layer is formed in another region excluding said partial region on one surface of said first insulating layer so as to overlap with the boundary between said first portion and said second portion.5. The printed circuit board according to claim 1 , whereinsaid reinforcing layer includes polyimide resin.6. The printed circuit board according to claim 1 , whereinsaid reinforcing layer includes copper.7. The printed circuit board according to claim 1 , further comprising a support substrate that is provided on said ...

ANISOTROPIC CONDUCTIVE FILM DISPERSED WITH CONDUCTIVE PARTICLES, AND APPARATUS AND METHOD FOR PRODUCING SAME

An anisotropic conductive film includes a substrate layer, an insulated layer and a number of conductive particles dispersed in the insulated layer. The insulated layer includes a lower layer attached on a side surface of the substrate layer and a nano-structured layer having a number of nano-scaled micro-structures on the lower layer. The conductive particles are dispersed in the nano-structured layer and insulated and spaced from each other by the micro-structures. 1. An anisotropic conductive film , comprising:a substrate layer;an insulated layer comprising a lower layer attached on a side surface of the substrate layer and a nano-structured layer, the nano-structured layer having a plurality of nano-scaled micro-structures on the lower layer; anda number of conductive particles dispersed in the nano-structured layer, the conductive particles insulated and spaced from each other by the micro-structures.2. The anisotropic conductive film of claim 1 , wherein the nano-scaled micro-structures are micro-recesses claim 1 , along lateral directions substantially parallel to the substrate layer claim 1 , the conductive particles are insulated and spaced from each other by the micro-recesses.3. The anisotropic conductive film of claim 1 , wherein the substrate layer is a PET film.4. The anisotropic conductive film of . wherein a material of the insulated layer is epoxy resin.5. The anisotropic conductive film of claim 1 , wherein the conductive particles are made from at least one material selected from the group consisting of nickel claim 1 , gold claim 1 , silver and silver-tin alloy.6. An apparatus for producing anisotropic conductive films claim 1 , comprising:a glue tank for containing liquid insulated glue with conductive particles dispersed therein;a guiding pipe communicating with the glue tank; anda pressing roller, the guiding pipe guiding pipe guiding the insulated glue, from the glue tank onto the pressing roller;wherein the pressing, roller comprises a ...

CIRCUIT BOARD

A circuit board includes a circuit substrate, a first dielectric layer, a first conductive layer, a second conductive layer and a second dielectric layer. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via. The second conductive layer is electrically connected to the first circuit layer via the first conductive layer. The second dielectric layer is disposed on the first dielectric layer and covers the second conductive layer and the second surface of the first dielectric layer. 1. A circuit board comprising:a circuit substrate having a first surface and a first circuit layer;a first dielectric layer disposed on the circuit substrate and covering the first surface and the first circuit layer, the dielectric layer having a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern;a first conductive layer disposed in the at least a blind via;a second conductive layer disposed in the intaglio pattern and the at least a blind via and covering the first conductive layer, the second conductive layer being electrically connected to the first circuit layer via the first conductive layer; anda second dielectric layer disposed on the first dielectric layer and coving the second conductive layer and the second surface of the first dielectric layer.2. The circuit board as claimed in claim 1 , wherein a height of the at least a blind via is denoted as H and a thickness of the first conductive layer is denoted as h claim 1 , and a relationship between h and H complies with 0.2≦(h/H)≦0.9.3. ...

ELECTRICAL INTERCONNECT IC DEVICE SOCKET

A surface mount electrical interconnect is disclosed that provides an interface between a PCB and solder balls of a BGA device. The electrical interconnect includes a socket substrate and a plurality of electrically conductive contact members. The socket substrate has a first layer with a plurality of openings configured to receive solder balls of the BGA device and has a second layer with a plurality of slots defined therethrough that correspond to the plurality of openings. The contact members may be disposed in the openings in the first layer and through the plurality of slots of the second layer of the socket substrate. The contact members can be configured to engage a top portion, a center diameter, and a lower portion of the solder ball of the BGA device. Each contact member electrically couples a solder ball on the BGA device to the PCB. 1. A surface mount electrical interconnect to provide an interface between a PCB and solder balls on a BGA device , the electrical interconnect comprising:a socket substrate comprising a first layer having a plurality of openings configured to receive the solder balls on the BGA device and a second layer having a plurality of slots defined therethrough that correspond to the plurality of openings; anda plurality of electrically conductive contact members disposed in the openings in the first layer and through the plurality of slots of the second layer of the socket substrate, each contact member configured to electrically couple a solder ball on the BGA device to the PCB, wherein each contact member comprises a contact plate defining a notch at a solder ball interface region, the notch configured to be positioned in the opening of the first layer and configured to receive a portion of the solder ball such that a solder ball positioned in the opening is nested within the notch in contact with the contact plate.2. The electrical interconnect of claim 1 , wherein each of the plurality of contact members is configured to retain ...

PRINTED CIRCUIT BOARD, AND BOARD BLOCK FOR VEHICLES USING THE SAME

Disclosure relates to a printed circuit board, and a board block for vehicles using the same. A housing forms an outer appearance of the board block of the present invention. The housing includes a housing body and a housing cover. An interior space is formed in the housing body, and a first connector is integrally formed with one side of an upper end of the housing body. The housing cover covers the upper end of the housing body and a first connector unit. 1. A printed circuit board comprising:a first area having an insulation layer formed on a surface of a metal layer formed of a metal and a first circuit pattern formed in the insulation layer;a second area provided separately from the first area and having a separate insulation layer formed on a surface of the metal layer and a second circuit pattern formed in the separate insulation layer; andan exposure area formed between the first area and the second area and from which the metal layer is exposed.2. The printed circuit board as claimed in claim 1 , wherein a component coupling terminal to which electric power is supplied through the metal layer and the first circuit pattern is provided in the first area claim 1 , and a first connector terminal of a first connector unit electrically connected to the component coupling terminal is provided on a surface of the first area opposite to the surface on which the component coupling terminal is provided claim 1 , and wherein a microchip to which electric power is supplied through the metal layer and the second circuit pattern is provided in the second area and a second connector terminal of a second connector unit electrically connected to the microchip.3. The printed circuit board as claimed in claim 2 , wherein an input connector terminal constituting an input connector unit for supplying electric power to the metal layer is provided in any one of the first area and the second area.4. The printed circuit board as claimed in claim 3 , wherein the first connector ...

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board. 115-. (canceled)16. A printed wiring board , comprising:a first substrate comprising a non-flexible base material and having a plurality of conductors including a conductor layer formed on a surface of the first substrate;a second substrate comprising a non-flexible base material and having a plurality of conductors including a conductor layer formed on a surface of the second substrate;an insulation layer comprising an insulative material and formed over the first substrate and the second substrate such that the insulation layer covers the conductor layers formed on the surfaces of the first and second substrates; anda wiring layer formed on the insulation layer and having a plurality of interlayer connection portions formed through the insulation layer such that the conductor layers formed on the surfaces of the first and second substrates are directly and electrically connected through the wiring layer,wherein the first substrate has an accommodation section configured to accommodate the second substrate, the insulation layer is formed over the first substrate and the second substrate such that the second substrate is embedded in the accommodation section of the first substrate, the insulation layer has a plurality of vias formed through the insulation layer, and the interlayer connection portions of the wiring layer are formed in the vias, respectively.17. The printed wiring board according to claim 16 , wherein the accommodation section of the first substrate is configured to accommodate a plurality of ...

MANUFACTURING METHOD OF PRINTED WIRING BOARD AND PRINTED WIRING BOARD

Object of the present invention is to provide a method for manufacturing a printed wiring board which enables fine wiring formation at low costs and with high yields without introducing any special equipment, and a printed wiring board manufactured by the method. To achieve the object, a method for forming the wiring pattern adopted includes steps; for forming a laminate having a structure in which a copper foil layer formed using copper foil without roughening treatment having surface roughness (Rzjis) at a bonding surface of 2 μm or less and thickness of 5 μm or less is laminated to a conductive layer via an insulating layer; for providing a blind-hole composed of a hole perforating the copper foil layer and the insulating layer; and a bottom composed of the conductive layer in the laminate; for filling-up the blind-hole by a electro-plated copper in the time for depositing an electro-plated copper layer on a surface of the electroless-plated copper layer to make the total thickness of a copper layer provided on the insulating layer 15 μm or less, for providing of an etching resist layer having thickness of 15 μm or less and for etching of the copper layer. 1. Manufacturing method of a printed wiring board comprising:a laminate formation step for forming a laminate having a structure in which a copper foil layer formed using copper foil without roughening treatment having surface roughness (Rzjis) at a bonding surface of 2 μm or less and thickness of 5 μm or less is laminated to a conductive layer via an insulating layer;a blind-hole formation step for providing a blind-hole composed of a hole perforating the copper foil layer and the insulating layer; and a bottom composed of the conductive layer in the laminate;an electroless copper plating step for providing an electroless-plated copper layer on a surface of the copper foil layer and an inner wall of the blind-hole;a panel plating step for providing an electro-plated copper layer on a surface of the electroless ...

METHOD OF FABRICATING PRINTED-WIRING BOARD, AND PRINTED-WIRING BOARD

A method of fabricating a printed-wiring board, includes: forming a through-hole across a thickness of a printed-wiring board, the forming of the through-hole including forming a first opening part having a first diameter, forming a second opening part having a second diameter, and forming a third opening part provided between the first opening part and the second opening part, wherein the second diameter is larger than the first diameter, and the third opening part is formed in a tapered shape whose diameter decreases toward the first opening part from the second opening part. 1. A method of fabricating a printed-wiring board comprising: forming a first opening part having a first diameter,', 'forming a second opening part having a second diameter, and', 'forming a third opening part provided between the first opening part and the second opening part,, 'forming a through-hole across a thickness of a printed-wiring board, the forming of the through-hole including'}wherein the second diameter is larger than the first diameter, and the third opening part is formed in a tapered shape whose diameter decreases toward the first opening part from the second opening part.2. The method of fabricating a printed-wiring board according to claim 1 , further comprising:setting a solder ring provided with a through-hole in a space defined by the second opening part, a space defined by third opening part, or a space defined by both the second opening part and the third opening part;applying solder paste to an interior of the through-hole from a side of the second opening part;inserting a pin of an electronic component into the through-hole from the side of the second opening part; andsubjecting the printed-wiring board to a reflow treatment.3. The method of fabricating a printed-wiring board according to claim 1 , further comprising:applying solder paste to an interior of the through-hole from a side of the second opening part;inserting a pin of an electronic component into the ...

DC/DC Converter Power Module Package Incorporating a Stacked Controller and Construction Methodology

Methods and systems are described for enabling the efficient fabrication of small form factor power converters and also the small form factor power converter devices.

COMPOSITE LAYER STRUCTURE AND TOUCH DISPLAY DEVICE HAVING THE SAME THEREOF

A composite layer structure used in a touch display device is disclosed. The composite layer structure comprises a matrix material, a non-conductive metal layer and a transparent electrical-conductive layer. The non-conductive metal layer is disposed on the matrix material. The non-conductive metal layer and the transparent electrical-conductive layer are formed a stacked structure. 1. A composite layer structure used in a touch display device , the composite layer structure comprising:a matrix material;a non-conductive metal layer disposed on the matrix material; anda transparent electrical-conductive layer, the transparent electrical-conductive layer and the non-conductive metal layer staked on each other.2. The composite layer structure according to claim 1 , wherein the transparent electrical-conductive layer is a patterned transparent electrical-conductive layer.3. The composite layer structure according to claim 2 , wherein an area of the non-conductive metal layer is larger than an area of the patterned transparent electrical-conductive layer.4. The composite layer structure according to claim 2 , wherein the composite layer structure comprises a first area and a second area claim 2 , the first area has the non-conductive metal layer and the patterned transparent electrical-conductive layer claim 2 , the second area has the non-conductive metal layer.5. The composite layer structure according to claim 4 , wherein the first area has a first light transmittance and a first light reflectivity claim 4 , the second area has a second light transmittance and a second light reflectivity claim 4 , a difference between the first light transmittance and the second light transmittance is smaller than 2.01 claim 4 , a difference between the first light reflectivity and the second light reflectivity is smaller than 1.63.6. The composite layer structure according to claim 1 , wherein a sheet resistance of a material for forming the non-conductive metal layer is larger than ...

LAMINATE WITH INTEGRATED ELECTRONIC COMPONENT

The invention relates to methods for producing a laminate for contacting an electronic component, in which an insulating layer is arranged between first and second metal layers. The method includes contacting the metal layers to each other in a contact region, generating a recess in the insulating layer, laminating the metal layers to the insulating layer, generating a notch for accommodating the electronic component in the contact region in the first metal layer, inserting the electronic component in a depression in the laminate formed through a notch and recess. The electronic component is connected in a conductive manner to the second metal layer, such that an entire circumference of the electronic component is accommodated in the recess and/or notch, and at least part of the height of the electronic component is accommodated in the notch and/or recess. The invention also relates to such a laminate for contacting an electronic component. 116.-. (canceled)171112181828414242122231323. A method for producing a laminate ( , , ) for contacting at least one electronic component ( , , ) in which an insulating layer ( , , ) is arranged between a first metal layer ( , , ) and a second metal layer ( , , ) , the method comprising:{'b': 2', '3', '12', '13', '22', '23, 'contacting the first and second metal layers (, , , , , ) to each other in at least one contact region;'}{'b': 6', '16', '26', '4', '14', '24, 'generating at least one recess (, , ) in the insulating layer (, , );'}{'b': 2', '3', '12', '13', '22', '23', '4', '14', '24, 'laminating the metal layers (, , , , , ) to the insulating layer (, , );'}{'b': 7', '17', '27', '8', '18', '28', '2', '12', '22, 'generating at least one notch (, , ) for accommodating the at least one electronic component (, , ) in the first metal layer (, , );'}{'b': 8', '18', '28', '1', '11', '21', '7', '17', '27', '6', '16', '26', '8', '18', '28', '3', '13', '23', '8', '18', '28', '6', '16', '26', '7', '17', '27', '8', '18', '28', '7', '17 ...

MULTILAYERED WIRING SUBSTRATE AND ELECTRONIC APPARATUS

A multilayered wiring substrate that includes at least one signal layer and at least one ground layer is provided. The multilayered wiring substrate includes a first signal via that extends in a direction substantially perpendicular to the layers of the multilayered wiring substrate, is conductively connected to one of a pair of differential signaling wires provided in the signal layer, and is formed on a first grid point; and a second signal via that extends in a direction substantially perpendicular to the layers of the multilayered wiring substrate, is conductively connected to the other of the pair of differential signaling wires, and is formed on a second grid point that is positioned diagonally adjacent with respect to the first signal via. 1. A multilayered wiring substrate that includes at least one signal layer and at least one ground layer , the multilayered wiring substrate comprising:a first signal via extending in a direction substantially perpendicular to the layers of the multilayered wiring substrate, the first signal via being conductively connected to one of a pair of differential signaling wires provided in the signal layer, and formed on a first grid point; anda second signal via extending in a direction substantially perpendicular to the layers of the multilayered wiring substrate, the second signal via being conductively connected to the other of the pair of differential signaling wires and formed on a second grid point that is positioned diagonally adjacent with respect to the first signal via.2. The multilayered wiring substrate of claim 1 , further comprising:differential signaling wires aligned to pass between the first signal via and the second signal via.3. A multilayered wiring substrate that includes at least one signal layer and at least one ground layer claim 1 , the multilayered wiring substrate comprising:a first signal via extending in a direction substantially perpendicular to the layers of the multilayered wiring substrate and ...

MULTILAYERED PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers. 1. A multilayered printed wiring board , comprising:a plurality of insulating layers;a plurality of wiring layers which are located between the corresponding adjacent insulating layers; anda plurality of interlayer connection conductors for electrically connecting said wiring layers through said insulating layers,wherein a cavity is formed through one or more of said insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for said insulating layers.2. The multilayered printed wiring board as set forth in claim 1 ,wherein said second electric/electronic component is mounted on the same surface level as a bottom of said cavity.3. The multilayered printed wiring board as set forth in claim 1 ,wherein at least one portion of said second electric/electronic component is contacted with a resin of a prepreg composing one of said insulating layers.4. The multilayered printed wiring board as set forth in claim 1 ,wherein an inner wall of said cavity is coated with a resin5. The multilayered printed wiring board as set forth in claim 1 ,wherein said multilayered printed wiring board is composed of a first printed wiring board and a second printed wiring board; andwherein said second electric/electronic component is mounted on said first printed wiring board and said cavity is formed in said second printed wiring board.6. The multilayered printed wiring board ...

PRINTED CIRCUIT BOARD FOR MOBILE PLATFORMS

The invention provides a printed circuit board for mobile platforms. An exemplary embodiment of the printed circuit board for mobile platforms includes a core substrate having a first side. A ground plane covers the first side. A first insulating layer covers the ground plane. A plurality of first signal traces and a plurality of first ground traces are alternatively arranged on the first insulating layer. A second insulating layer connects to the first insulating layer. A plurality of second signal traces separated from each other is disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto. 1. A printed circuit board for mobile platforms , comprising:a core substrate having a first side;a ground plane covering on the first side;a first insulating layer covering the ground plane;a plurality of first signal traces and a plurality of first ground traces, alternatively arranged on the first insulating layer;a second insulating layer connecting to the first insulating layer; anda plurality of second signal traces separated from each other, disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto.2. The printed circuit board for mobile platforms as claimed in claim 1 , wherein the second insulating layer covers the first signal traces and the first ground traces claim 1 , and wherein the ground plane is disposed at the bottommost layered level of the printed circuit board claim 1 , the first signal traces and the first ground traces are disposed at a middle layered level of the printed circuit board and the second signal traces are disposed at a topmost layered level of the printed circuit board.3. The printed circuit board for mobile platforms as claimed in claim 2 , wherein the topmost layered level of the printed circuit ...

PRINTED WIRING BOARD

A printed wiring board includes a core substrate, a first buildup layer laminated on a first surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on a second surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost conductive layer of the first buildup layer includes pads positioned to mount a semiconductor device on a surface of the first buildup layer, and the outermost interlayer resin insulation layer of the first buildup layer has a thermal expansion coefficient which is set lower than a thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer. 1. A printed wiring board , comprising:a core substrate having a first surface and a second surface on an opposite side of the first surface;a first buildup layer laminated on the first surface of the core substrate and comprising an outermost interlayer resin insulation layer and an outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer; anda second buildup layer laminated on the second surface of the core substrate and comprising an outermost interlayer resin insulation layer and an outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer,wherein the outermost conductive layer of the first buildup layer includes a plurality of pads positioned to mount a semiconductor device on a surface of the first buildup layer, and the outermost interlayer resin insulation layer of the first buildup layer has a thermal expansion coefficient which is set lower than a thermal expansion coefficient of the ...

Process for making stubless printed circuit boards

A process of copper plating a through-hole in a printed circuit board, and the printed circuit board made from such process. The process comprises: providing a printed circuit board with at least two copper interconnect lines separated by an insulator in the vertical direction; providing a through-hole in the printed circuit board in the vertical direction such that the interconnect lines provide a copper land in the through-hole; applying a seed layer to an interior surface of the through-hole; removing an outermost portion of the seed layer from the interior surface of the through-hole with a laser; applying copper on the seed layer.

MODULE SUBSTRATE AND METHOD FOR MANUFACTURING MODULE SUBSTRATE

A module substrate includes a plurality of electronic components mounted on at least one surface of a base substrate and a columnar terminal connection substrate connected to the one surface of the base substrate on which a plurality of the electronic components are mounted. The terminal connection substrate includes a plurality of conductor portions, at least one corner of the columnar terminal connection substrate is chamfered with a flat surface and/or curved surface, and the terminal connection substrate is connected at a side surface thereof contacting the chamfered surface, to the one surface of the base substrate. 1. A module substrate comprising:a base substrate;a plurality of electronic components mounted on at least one surface of the base substrate;a plurality of conductor portions connected to the one surface of the base substrate on which the plurality of the electronic components are mounted; whereinat least one corner of each of the plurality of conductor portions is chamfered with a flat surface and/or curved surface; andeach of the plurality of conductor portions is connected, at a side surface thereof contacting the chamfered flat surface and/or curved surface, to the one surface of the base substrate.2. The module substrate according to claim 1 , wherein each of the plurality of conductor portions is arranged such that the chamfered flat surface and/or curved surface faces an inside of the base substrate.3. The module substrate according to claim 1 , wherein a cross-sectional shape of each of the plurality of conductor portions in a plane perpendicular to the base substrate is an inverted L shape.4. The module substrate according to claim 1 , further comprising:a columnar terminal connection substrate including the plurality of the conductor portions and connected to the one surface of the base substrate on which the plurality of the electronic components are mounted; whereinat least one corner of the terminal connection substrate is chamfered ...

CIRCUIT APPARATUS HAVING A ROUNDED DIFFERENTIAL PAIR TRACE

A first artwork layer having a first adaptable-mask section allows a graded amount of light to pass into an underlying first photoresist layer. Subsequent to developing the first photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least a lower portion of a rounded trace. A dielectric layer is laminated upon the lower portion and a second artwork layer having an second adaptable-mask section allows a graded amount of light to pass into a second photoresist layer. Subsequent to developing the second photoresist layer, the graded amount of light creates a rounded geometric void used as a mold or sidewall for the creation of at least an upper portion of a rounded trace. The photoresist and dielectric layers are removed resulting in a circuit apparatus having a rounded differential pair trace. 1. A circuit apparatus having a rounded electrically conductive differential pair trace comprising:a dielectric layer;a lower portion of the rounded electrically conductive trace having a first rounded sidewall and a first flat sidewall, the lower portion of the electrically conductive trace joined to the dielectric layer; andan upper portion of the rounded electrically conductive trace having a second rounded sidewall and a second flat sidewall, the lower portion of the electrically conductive trace joined to an opposing side of the dielectric layer aligned with the lower portion of the rounded electrically conductive trace.2. The apparatus of wherein the first rounded sidewall and the second rounded side wall are aligned to form a circular geometry.3. The apparatus of wherein the first rounded sidewall and the second rounded side wall are aligned to form an elliptical geometry.4. The circuit apparatus of further comprising a first photoresist layer having a geometrical void used to create the lower portion of the rounded electrically conductive trace.5. The circuit apparatus of further comprising a ...

METHOD OF FORMING A SUBSTRATE CORE STRUCTURE USING MICROVIA LASER DRILLING AND CONDUCTIVE LAYER PRE-PATTERNING AND SUBSTRATE CORE STRUCTURE FORMED ACCORDING TO THE METHOD

A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof, and the second supplemental patterned conductive layer at another side thereof. 1. A multilayer substrate core structure including:a starting insulating layer;a first patterned conductive layer on one side of the starting insulating layer, and a second patterned conductive layer on another side of the starting insulating layer;a first supplemental insulating layer on the first patterned conductive layer;a second supplemental insulating layer on the second patterned conductive layer;a first supplemental patterned conductive layer on the first supplemental insulating layer;a second supplemental patterned conductive layer on the second supplemental insulating layer;a set of conductive vias provided in corresponding laser-drilled via openings extending from the second supplemental patterned conductive layer to the first supplemental patterned conductive layer, the via openings further extending through the first patterned conductive layer and the second patterned conductive layer.2. The substrate core structure of claim 1 , wherein the set of conductive vias include a plated conductive material therein.3. The substrate core structure of claim 1 , ...

Wiring board, display panel, and electronic apparatus

A wiring substrate of the present invention has, on a first dummy wiring disposing section ( 105 a ) in a first lead-out wiring section ( 105 ), a dummy wiring line ( 2 ) that is formed of a light-shielding metal in positions that correspond to a front and a rear of a bent portion ( 10 ) of a wiring line ( 1 ) by having an insulating layer therebetween. As a result, sufficient countermeasures against disconnection of the wiring line ( 1 ) are taken in the first lead-out wiring section, and a sufficient aperture ratio for seal curing with UV radiation can be ensured.

CONDUCTIVE FILM HAVING OXIDE LAYER AND METHOD OF MANUFACTURING THE SAME

Provided are a conductive film and a method of manufacturing the same. The conductive film includes a substrate, a first conductive layer formed on the substrate, and a patterned second conductive layer formed on the first conductive layer. Here, oxide layers are formed on top and side surfaces of the second conductive layer. The conductive film may prevent defects of the conductive layer caused by rapid oxidation or damage to the substrate, and increase emission uniformity. 1. A conductive film , comprising:a substrate;a first conductive layer formed on the substrate; anda patterned second conductive layer formed on the first conductive layer,wherein oxide layers are formed on top and side surfaces of the second conductive layer.2. The conductive film according to claim 1 , wherein the substrate includes one or more resins selected from the group consisting of polyesters claim 1 , acetates claim 1 , polyether sulfones claim 1 , polycarbonates claim 1 , polyamides claim 1 , polyimides claim 1 , (meth)acrylates claim 1 , polyvinyl chlorides claim 1 , polyvinylidene chlorides claim 1 , polystyrenes claim 1 , polyvinyl alcohols claim 1 , polyacrylates and polyphenylene sulfides.3. The conductive film according to claim 1 , wherein the first conductive layer is formed of ITO or a zinc oxide-based thin film doped with an element M (ZnO:M) claim 1 , and the element M is a group 13 element or a transition metal having an oxidation number of +3.4. The conductive film according to claim 1 , wherein the second conductive layer includes copper (Cu) claim 1 , aluminum (Al) claim 1 , molybdenum (Mb) claim 1 , chromium (Cr) claim 1 , magnesium (Mg) claim 1 , calcium (Ca) claim 1 , sodium (Na) claim 1 , potassium (K) claim 1 , titanium (Ti) claim 1 , indium (In) claim 1 , yttrium (Y) claim 1 , lithium (Li) claim 1 , gadolinium (Gd) claim 1 , silver (Ag) claim 1 , tin (Sn) claim 1 , lead (Pb) or an alloy containing two or more thereof.5. The conductive film according to claim 1 , ...

ELECTRICAL CONDUCTOR AND A PRODUCTION METHOD THEREFOR

Provided are an electrical conductor and a production method therefor; the electrical conductor comprising a transparent substrate and an electro-conductive pattern provided on at least one surface of the transparent substrate, and the electroconductive pattern being of a type such that, for at least 30% of the entire surface area of the transparent substrate, when a straight line is drawn intersecting the electroconductive pattern, the ratio of the standard deviation to the mean value of the distances between adjacent points of intersection between the straight line and the electroconductive pattern (the distance distribution ratio) is at least 2%. Also, provided are an electrical conductor and a production method therefor; the electrical conductor comprising a transparent substrate and an electroconductive pattern provided on at least one surface of the transparent substrate, and the electroconductive pattern being of a type such that at least 30% of the entire surface area of the transparent substrate is accounted for by continuously distributed closed motifs, and the ratio of the standard deviation to the mean value of the surface areas of the closed motifs (the surface area distribution ratio) is at least 2%. 1. An electrical conductor comprising:a transparent substrate; andan electric conductive pattern on at least one side of the transparent substrate,when a straight line that crosses the electric conductive pattern is drawn, wherein 30% or more of the entire area of the transparent substrate has the electric conductive pattern in which a ratio (distance distribution ratio) of standard deviation in respects to an average value of distances between adjacent intersection points of the straight line and the electric conductive pattern is 2% or more.2. The electrical conductor according to claim 1 , wherein the straight line that crosses the electric conductive pattern is a line in which the standard deviation of the distances between adjacent intersection points ...

STACKED ELECTRODE, STACKED ELECTRODE PRODUCTION METHOD, AND PHOTOELECTRIC CONVERSION DEVICE

A stacked electrode of an embodiment includes: a multi-layered graphene film and a metal wiring formed thereon, wherein the metal wiring contains randomly oriented metal nanowires, the multi-layered graphene film contains a laminate of graphene sheets, the graphene sheets each contain an aggregate of graphene plates, and the graphene plates have an average area of (A+B)nmor more, wherein A (nm) represents the average diameter of the metal nanowires, B (nm) satisfies the equation (1) of B/(A+B)=(1−X), and X represents the ratio of the area of the metal nanowires projected in the stacking direction of the stacked electrode. 1. A stacked electrode comprising:a multi-layered graphene film anda metal wiring formed thereon, whereinthe metal wiring contains randomly oriented metal nanowires,the multi-layered graphene film contains a laminate of graphene sheets,the graphene sheets each contain an aggregate of graphene plates, and{'sup': 2', '2', '2', '2, 'the graphene plates have an average area of (A+B)nmor more, wherein A (nm) represents the average diameter of the metal nanowires, B (nm) satisfies the equation (1) of B/(A+B)=(1−X), and X represents the ratio of the area of the metal nanowires projected in a stacking direction of the stacked electrode.'}2. The stacked electrode according to claim 1 , wherein the graphene plates have an average area of 2(A+B)nmor more.3. The stacked electrode according to claim 1 , wherein the graphene plates have an average area of 3(A+B)nmor more.4. The stacked electrode according to claim 1 , wherein the metal nanowires have an average diameter of 30 to 150 nm.5. The stacked electrode according to claim 1 , wherein the metal nanowires contain silver claim 1 , gold claim 1 , or copper.6. The stacked electrode according to claim 1 , wherein the multi-layered graphene film has a thickness of 5 nm or less.7. The stacked electrode according to claim 1 , coated with a near-infrared transparent resin.8. The stacked electrode according to claim ...

LAYERED STRUCTURE HAVING LAYERED CONDUCTIVE PATTERNS, MANUFACTURING PROCESS THEREOF AND TOUCHSCREEN WITH LAYERED STRUCTURE

A manufacturing process for manufacturing a layered structure is provided. In the manufacturing process, transfer layers including conductive layers are transferred from transfer films so as to form a first transfer layer defining a first conductive pattern and a second transfer layer defining a second conductive pattern on a surface of a substrate, such that the first conductive layer and the second conductive layer are stacked onto each other. At least one of the first transfer layer and the second transfer layer has a non-conductive layer on a surface facing the other of the first transfer layer and the second transfer layer. The non-conductive layer is provided between the first conductive pattern and the second conductive pattern. 1. A manufacturing process for manufacturing a layered structure having layered conductive patterns , the manufacturing process comprising:transferring a first transfer layer onto a substrate from a first transfer material having the first transfer layer including a conductive layer; andtransferring a second transfer layer onto the substrate from a second transfer material having the second transfer layer including a conductive layer such that the second transfer layer is stacked onto the first transfer layer, whereina first conductive pattern is formed on the substrate by the conductive layer of the first transfer layer, and a second conductive pattern different from the first conductive pattern is formed on the substrate by the conductive layer of the second transfer layer such that the second conductive pattern is stacked onto the first conductive pattern, whereina non-conductive layer is formed on a surface of at least one of the first transfer layer and the second transfer layer, the non-conductive layer being provided between the first conductive pattern and the second conductive pattern by transferring the first transfer layer and the second transfer layer onto the substrate.2. The manufacturing process according to claim 1 , ...

MULTILAYER FLEXIBLE SUBSTRATE

A multilayer flexible substrate includes a first structural layer including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and filled vias disposed in the insulating layer; and a second structural layer provided on a principal surface of a portion of the first structural layer and including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and a filled via provided in the insulating layer. The multilayer flexible substrate includes rigid regions and a flexible region that is more flexible than the rigid regions. In the multilayer flexible substrate, the filled via disposed in the flexible region has a higher porosity than the filled via disposed in the second structural layer. 1. A multilayer flexible substrate comprising:a first structural layer including at least one resin sheet including a first insulating layer, a first wiring conductor provided on a principal surface of the first insulating layer, and first filled vias provided in the first insulating layer; anda second structural layer which is provided on a portion of a principal surface of the first structural layer and which includes at least one resin sheet including a second insulating layer, a second wiring conductor provided on a principal surface of the insulating layer, and a second filled via disposed in the insulating layer; whereinthe multilayer flexible substrate includes a rigid region including a portion of the first structural layer and the second structural layer and a flexible region that is more flexible than the rigid region and including another portion of the first structural layer;the first filled vias are provided in the rigid region and in the flexible region;the first filled vias provided in the flexible region have a higher porosity than the second filled via provided in the second structural layer.2. The multilayer ...

MOUNTING ADAPTER, PRINTED BOARD, AND MANUFACTURING METHOD THEREOF

There is provided a mounting adapter to be disposed between a socket and an electronic component when the electronic component is mounted with the socket. The mounting adapter includes a base having insulating property, a first electrode provided on a first surface of the base, the first surface facing the electronic component, the first electrode being to be in contact with an electric pad of the electronic component, a second electrode provided on a second surface of the base, the second electrode facing the socket, the second electrode being to be in contact with a conductor of the socket, and a through via that penetrates through the base and electrically connects the first electrode and the second electrode. 1. A mounting adapter to be disposed between a socket and an electronic component when the electronic component is mounted with the socket , the mounting adapter comprising:a base having insulating property;a first electrode provided on a first surface of the base, the first surface facing the electronic component, the first electrode being to be in contact with an electric pad of the electronic component;a second electrode provided on a second surface of the base, the second electrode facing the socket, the second electrode being to be in contact with a conductor of the socket; anda through via that penetrates through the base and electrically connects the first electrode and the second electrode.2. The mounting adapter according to claim 1 , wherein the base is made of organic resin.3. The mounting adapter according to claim 1 , wherein an area of the through via is less than an area of the first electrode in plan view.4. The mounting adapter according to claim 1 , wherein the area of the through via is less than an area of the second electrode in plan view.5. The mounting adapter according to claim 1 , wherein the area of the first electrode is less than the area of the second electrode in plan view.6. The mounting adapter according to claim 1 , wherein ...

TOUCH PANEL, DISPLAY DEVICE INCLUDING THE TOUCH PANEL, AND METHOD OF MANUFACTURING THE TOUCH PANEL

A external connecting terminal () includes a first interconnect layer (A) formed of a same film as a first conductive pattern for touch position detection under an interlayer insulating film (), and a second interconnect layer (B) formed of a same film as a second conductive pattern for touch position detection on the interlayer insulating film (). the first and the second interconnect layers are electrically connected to a lead line () at a portion overlapping the lead line (), and electrically connected together at a portion outside the lead line (). 1. A touch panel , comprising:a touch region for detecting a touch position touched by a contact body;a terminal region provided outside the touch region and connected to an external circuit;a first conductive pattern for touch position detection located in the touch region and made of transparent conductive oxide;an interlayer insulating film provided to cover at least part of the first conductive pattern;a second conductive pattern for touch position detection provided on the interlayer insulating film and made of transparent conductive oxide;a protection insulating film provided to cover the second conductive pattern;a lead line electrically connected to at least one of the first conductive pattern or the second conductive pattern, drawn from the touch region to the terminal region, and covered by the insulating film; andan external connecting terminal connected to a lead top of the lead line, drawn out of the insulating film, and provided in the terminal region, whereinthe external connecting terminal includes a first interconnect layer formed of a same film as the first conductive pattern, and a second interconnect layer formed of a same film as the second conductive pattern, the first and second interconnect layers being electrically connected to the lead line at a portion overlapping the lead line and being electrically connected together at a portion outside the lead line.2. The touch panel of claim 1 , ...

NOVEL PHOTOSENSITIVE RESIN COMPOSITION AND USE THEREOF

In order to provide (A) a photosensitive resin composition which (i) obtains an excellent tack-free property after being applied and dried, (ii) can be subjected to fine processing so as to have photosensitivity, (iii) prepares a cured film having excellent flexibility, flame retardancy, and electrical insulation reliability, and (iv) has small warpage after being cured, (B) a resin film, (C) an insulating film, and (D) an printed wiring board provided with an insulating film, the photosensitive resin composition containing at least (A) binder polymer; (B) cross-linked polymer particles, whose polymer has a urethane bond in its molecule; (C) thermosetting resin; and (D) photo-polymerization initiator is used. 1. A photosensitive resin composition , comprising at least:(A) binder polymer;(B) cross-linked polymer particles, whose polymer has a urethane bond in its molecule;(C) thermosetting resin; and(D) photo-polymerization initiator,wherein the (A) binder polymer contains (A1) resin having a urethane bond in its molecule.2. (canceled)3. The photosensitive resin composition as set forth in claim 1 ,wherein the (A1) resin having a urethane bond in its molecule has at least one organic group selected from the group consisting of the following (a1)-(a3):(a1) a (meth)acryloyl group;(a2) a carboxyl group; and(a3) an imide group.4. The photosensitive resin composition as set forth in claim 1 ,wherein the (A) binder polymer contains (A2) resin having an imide group in its molecule.5. The photosensitive resin composition as set forth in claim 1 ,wherein the (A) binder polymer contains (A3) resin having a (meth)acryloyl group in its molecule.6. The photosensitive resin composition as set forth in claim 1 ,wherein the (A) binder polymer contains (A4) resin having a carboxyl group in its molecule.7. The photosensitive resin composition as set forth in claim 1 ,wherein an average particle diameter of the (B) cross-linked polymer particle falls within a range from 1 μm to 20 μm.8 ...

Wiring Substrate and Method for Manufacturing Wiring Substrate

A method for manufacturing a wiring substrate includes alternately stacking first wiring patterns and first insulative layers on a first surface of a core substrate and alternately stacking second wiring patterns and second insulative layers on a second surface of the core substrate at an opposite side of the first surface. The number of the second insulative layers excluding the outermost second insulative layer differs from the number of the first insulative layers. The method further includes forming a via hole in the outermost first insulative layer to expose a portion of the outermost first wiring pattern, and exposing the outermost second wiring pattern by reducing the outermost second insulative layer in thickness. The method further includes forming a via in the via hole and forming a wiring pattern, which is connected by the via to the outermost first wiring pattern, on the outermost first insulative layer. 1. A method for manufacturing a wiring substrate , the method comprising:alternately stacking a plurality of first wiring patterns and a plurality of first insulative layers on a first surface of a core substrate and alternately stacking a plurality of second wiring patterns and a plurality of second insulative layers on a second surface of the core substrate located at an opposite side of the first surface, wherein the number of the second insulative layers excluding an outermost one of the second insulative layers differs from the number of the first insulative layers;forming a via hole in an outermost one of the first insulative layers to expose a portion of an outermost one of the first wiring patterns;exposing an outermost one of the second wiring patterns by reducing the outermost second insulative layer in thickness;forming a first seed layer, which covers the outermost first insulative layer, the exposed outermost first wiring pattern, and a wall of the via hole, and a second seed layer, which covers the outermost second insulative layer and the ...

SOLDER-MOUNTED BOARD, PRODUCTION METHOD THEREFOR, AND SEMICONDUCTOR DEVICE

The present invention provides a solder-mounted board which realizes reliable mounting of a component thereon; a method for producing the board; and a semiconductor device. The solder-mounted board includes a substrate; a wiring layer; a solder pad for mounting a component by the mediation of the solder; and an insulating layer which covers the wiring layer such that at least the solder pad is exposed, the wiring layer, the solder pad, and the insulating layer being provided on at least one surface of the substrate, wherein the insulating layer is formed of a first insulating layer provided on the substrate and the wiring layer, and a second insulating layer provided on at least a portion of the first insulating layer. 1. A solder-mounted board comprising a substrate; a wiring layer; a solder pad for mounting a component by the mediation of the solder; and an insulating layer which covers the wiring layer such that at least the solder pad is exposed , the wiring layer , the solder pad , and the insulating layer being provided on at least one surface of the substrate , wherein the insulating layer is formed of a first insulating layer provided on the substrate and the wiring layer , and a second insulating layer provided on at least a portion of the first insulating layer.2. A solder-mounted board according to claim 1 , wherein at least a portion of the solder pad is exposed through an opening provided in the first insulating layer.3. A solder-mounted board according to claim 1 , wherein an opening is provided in the second insulating layer such that a component mounting region falls within the opening claim 1 , the component mounting region including a plurality of solder pad portions exposed through openings provided in the first insulating layer.4. A solder-mounted board according to claim 2 , wherein an opening is provided in the second insulating layer such that a component mounting region falls within the opening claim 2 , the component mounting region ...

Many-up wiring substrate, wiring board, and electronic device

A many-up wiring substrate includes an insulating base substrate in which a plurality of wiring board regions are arranged in at least one of a vertical direction and a horizontal direction; a hole disposed in one main surface of the insulating base substrate, and straddling adjacent wiring board regions of the plurality of wiring board regions or straddling the wiring board regions and a dummy region; a conductor disposed on an inner surface of the hole; and a through hole disposed so as to extend from the inner surface of the hole of the wiring board regions to the other main surface of the insulating base substrate.

Soldering device, soldering method, and substrate and electronic component produced by the soldering device or the soldering method

Provided are a soldering device and a soldering method which allow for soldering at low cost with high yield and high reliability. The soldering device has: first organic fatty acid-containing solution bath 21 in which workpiece member 10 having a copper electrode is immersed in organic fatty acid-containing solution 31 a ; space section 24 having a steam atmosphere of organic fatty acid-containing solution 31 b , the space section horizontally having ejection unit 33 to spray a jet stream of a molten solder to the copper electrode provided on workpiece member 10 and ejection unit 34 to spray a liquid to an excess of the molten solder for removal; and second organic fatty acid-containing solution bath 23 in which workpiece member 10 from which the excess of the molten solder is removed in space section 24 is immersed again in organic fatty acid-containing solution 31 c.