이미다졸 및 비스에폭사이드 화합물의 반응 산물을 함유하는 구리 전기도금조로부터 포토레지스트 정의된 특징부의 전기도금 방법

... 전기도금 방법은 실질적으로 균일한 형태를 갖는 포토레지스트 정의된 특징부의 도금을 가능케 한다. 전기도금 방법에는 포토레지스트 정의된 특징부를 전기도금하기 위해 이미다졸 및 비스에폭사이드의 반응 산물을 포함하는 구리 전기도금조가 포함된다. 이러한 특징부에는 기둥, 결합 패드 및 라인 스페이스 특징부가 포함된다.

METHOD OF ELECTROPLATING PHOTORESIST DEFINED FEATURES FROM COPPER ELECTROPLATING BATHS CONTAINING REACTION PRODUCTS OF ALPHA AMINO ACIDS AND BISEPOXDES

Pressure sensor

A pressure sensor includes a conductive substrate, a ring-shaped spacer, an inner spacer and a sensing circuit substrate. The conductive substrate includes a conductive substrate body and a conductive layer. The conductive layer is disposed on the conductive substrate body. The ring-shaped spacer and the inner spacer are disposed on the conductive substrate body. The sensing circuit substrate is disposed on the ring-shaped spacer and the inner spacer, and includes a circuit substrate body, a first sensing circuit and a second sensing circuit. The first sensing circuit and the second sensing circuit are disposed on two sides of the circuit substrate body, and a priority of first finger circuits of the first sensing circuit and a priority of second finger electrodes of the second sensing circuit are interlaced. And the first sensing circuit and the second sensing circuit are densely arranged at the center of the conductive layer and arranged evacuation on both sides of the conductive layer ...

Wiring board and light emitting device using same, and manufacturing method for both

In the present invention, a wiring board comprises a substrate in which a plurality of plate wirings formed by metal plates and an insulating part that is constituted by a resin-including resin composition are integrally formed, and a plurality of surface layer wirings that are electrically connected to the plate wirings. The substrate has a first surface and a second surface and the surface layer wirings are provided to these surfaces. The surface layer wirings are thinner than the plate wirings, and the minimum wiring gap between the surface layer wirings is smaller than the minimum gap between the plate wirings. One plate wiring has, in the normal line direction of the first surface, a shape that is substantially the same as the overlapping shape of a first upper surface-layer wiring on the first surface and a first lower surface-layer wiring on the second surface, and the first upper surface-layer wiring and the first lower surface-layer wiring are connected by such one plate-wiring ...

Radio frequency connection arrangement

A radio frequency transmission arrangement comprises a ground plate (13) having an aperture (14, 15a, 15b) comprising a slot (14) with an elongate cross-section and substantially parallel sides, and a first (12, 11) and second (17,18) transmission line. The thickness of the ground plate (t) is greater than a width of the slot (w). The aperture (14, 15a, 15b) is partially filled with a solid dielectric material and partially filled with air. The first transmission line comprises a first elongate conductor (12) on a first side of the ground plate (13) and has an end terminated with a first termination stub (11). The second transmission line comprises a second elongate conductor (17) on the opposite side of the ground plate and has an end terminated with a second termination stub (18). The first transmission line is arranged to cross the slot at a point adjacent to the first termination stub (11), and the second transmission line is arranged to cross the slot at a point adjacent to the second ...

Connecting member for electronic device, and electronic device comprising same

Connecting member for electronic device and electronic device including the same

A connecting member for electrically connecting a circuit board and a component in an electronic device is provided. The connecting member includes at least one bending part configured to comprise elasticity, a pad part connected to the bending part and configured to be attached to one surface of the circuit board, and a fixing part extending from the pad part and configured to fix the connecting member to the circuit board.

METHOD OF ELECTROPLATING PHOTORESIST DEFINED FEATURES FROM COPPER ELECTROPLATING BATHS CONTAINING REACTION PRODUCTS OF PYRIDYL ALKYLAMINES AND BISEPOXIDES

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of pyridyl alkylamines and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features. 1. A method for electroplating photoresist defined features comprising:a) providing a substrate comprising a layer of photoresist, wherein the layer of photoresist comprises a plurality of apertures;b) providing a copper electroplating bath comprising one or more reaction products of one or more pyridyl alkylamines and one or more bisepoxides; an electrolyte; one or more accelerators; and one or more suppressors;c) immersing the substrate comprising the layer of photoresist with the plurality of apertures in the copper electroplating bath; andd) electroplating a plurality of copper photoresist defined features in the plurality of apertures, the plurality of photoresist defined features comprise an average % TIR of −5% to +12%.2. The method of claim 1 , wherein a % WID of the plurality of photoresist defined features is from 5% to 14%.6. The method of claim 1 , wherein the one or more reaction products are in amounts of 0.25 ppm to 20 ppm in the copper electroplating bath.7. The method of claim 1 , wherein the one or more photoresist defined features is chosen from a pillar claim 1 , bond pad and line space feature.8. The method of claim 1 , wherein a current density is from 0.25 ASD to 40 ASD.9. An array of photoresist defined features on a substrate comprising an average % TIR of −5% to +12% and a % WID of 5% to 14%. The present invention is directed to a method of electroplating photoresist defined features from copper electroplating baths which include reaction products of pyridyl alkylamines and bisepoxides. More specifically, the present invention is directed to a method of electroplating photoresist defined ...

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of pyridyl alkylamines and bisepoxides

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of pyridyl alkylamines and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.

Pressure sensor enhancing variation percentages under high pressures

A pressure sensor includes a conductive substrate, a ring-shaped spacer, an inner spacer and a sensing circuit substrate. The conductive substrate includes a conductive-substrate body and a conductive layer. The conductive layer is disposed on the conductive-substrate body. The ring-shaped spacer and the inner spacer are disposed on the conductive-substrate body. The sensing-circuit substrate, disposed on the ring-shaped spacer and the inner spacer, includes a circuit-substrate body, a first sensing circuit and a second sensing circuit. The first sensing circuit and the second sensing circuit are disposed on opposing sides of the circuit-substrate body, and a plurality of first finger circuits of the first sensing circuit and a plurality of second finger circuits of the second sensing circuit are interlaced. The first sensing circuit and the second sensing circuit are densely arranged at the center of the conductive layer and less densely arranged on both sides of the conductive layer.

A Reconfigured Fractal Compact Minkowski Microstrip Filter for Advanced Wireless Communication Applications

A Reconfigured Fractal Compact Minkowski Microstrip Filter for Advanced Wireless Communication Applications A reconfigurable, tunable and compact Microstrip radio frequency and microwave components like amplifiers, filters, tuners and oscillators are more exciting topics in recent years due to its compact size, ease of fabrication and cost effectiveness. The proposed work is focused on reconfigurable filters, these reconfigurable Microstrip filters are designed to handle multifunctional tasks in wireless communication systems. Using such devices can reduce the overall size of radio and microwave frequency components and also reduce the cost of overall wireless communication system. A rapid growth in wireless communication applications like air traffic control, weather monitoring, satellite communication, blue tooth, Wi-Fi, some cordless telephones, air traffic control, maritime vessel traffic control, defense tracking, and vehicle speed detection for law enforcement demands compact and ...

ELECTRODE PATTERN INTEGRATED MOLDING AND METHOD FOR MANUFACTURING SAME

Semiconductor packages having interconnection members

A semiconductor package may include a first substrate including a first connection portion disposed on a surface of the first substrate and a second substrate including a second connection portion disposed on a surface of the second substrate. The second substrate may be disposed over the first substrate and the second connection portion facing the first connection portion. A first connection loop portion may be provided to include an end connected to the first connection portion. A second connection loop portion may be provided to include one end connected to the second connection portion and the other end combined with the first connection loop portion.

ELECTRONIC PACKAGE

An electronic package is provided, which includes a substrate and an antenna board structure disposed on the substrate. The antenna board structure has a first portion, a second portion and a partition portion between the first portion and the second portion. As such, current can be split into two paths so as to spread electromagnetic radiation, and thus produce electromagnetic radiation with a high bandwidth. 1. An electronic package , comprising:a substrate; andan antenna board structure disposed on the substrate and having a first portion, a second portion and a partition portion between the first portion and the second portion.2. The electronic package of claim 1 , wherein the partition portion is configured with an opening.3. The electronic package of claim 1 , wherein the partition portion is made of a material different from materials of the first portion and the second portion.4. The electronic package of claim 1 , wherein the partition portion is disposed around an outer periphery of the first portion.5. The electronic package of claim 1 , wherein the second portion is disposed around an outer periphery of the first portion.6. The electronic package of claim 1 , further comprising a shielding structure disposed around a periphery of the antenna board structure.7. The electronic package of claim 6 , wherein the shielding structure has a post shape or a wall shape.8. The electronic package of claim 1 , further comprising an electronic element disposed on the substrate.9. The electronic package of claim 1 , further comprising an encapsulant formed on the substrate.10. The electronic package of claim 9 , wherein the antenna board structure is disposed on and in contact with the encapsulant.11. The electronic package of claim 9 , further comprising a shielding structure embedded in the encapsulant and disposed around a periphery of the antenna board structure.12. The electronic package of claim 11 , wherein the shielding structure has a post shape or a wall ...

Leiterplatte zum Montieren eines Überbrückungsmoduls und Leiterplatten-Anordnung

Eine Leiterplatte (1) zum Montieren eines Überbrückungsmoduls enthält eine Leiterplatte (40), sowie ein Überbrückungsmodul (10), das einen isolierenden Hauptkörper (30) aufweist, der mit leitenden elektrischen Verbindungsteilen (20) versehen ist, mit denen Verbindung zwischen Verbindungsstrukturen (51) hergestellt wird, um elektrischen Durchgang zwischen ihnen zu schaffen, indem jedes der Kontaktteile (21) an beiden Enden der leitenden elektrischen Verbindungsteile (20) mit den Verbindungsstrukturen (51) verbunden wird, die voneinander beabstandet an der Leiterplatte (40) ausgebildet sind. Das Überbrückungsmodul (10) ist auf der Leiterplatte (40) so montiert, dass es Verbindung zwischen den Kontaktteilen (21) und den Verbindungsstrukturen (51) herstellt, die voneinander beabstandet ausgebildet sind. Die Leiterplatte (40) enthält einen Abschnitt (50), in dem sich Verbindungsstrukturen konzentrieren und der ausgebildet wird, indem die Verbindungsstrukturen (51) entsprechend einer Vielzahl ...

Radio frequency connection arrangement

Wiring board and light emitting device using same, and manufacturing method for both

In the present invention, a wiring board comprises a substrate in which a plurality of plate wirings formed by metal plates and an insulating part that is constituted by a resin-including resin composition are integrally formed, and a plurality of surface layer wirings that are electrically connected to the plate wirings. The substrate has a first surface and a second surface and the surface layer wirings are provided to these surfaces. The surface layer wirings are thinner than the plate wirings, and the minimum wiring gap between the surface layer wirings is smaller than the minimum gap between the plate wirings. One plate wiring has, in the normal line direction of the first surface, a shape that is substantially the same as the overlapping shape of a first upper surface-layer wiring on the first surface and a first lower surface-layer wiring on the second surface, and the first upper surface-layer wiring and the first lower surface-layer wiring are connected by such one plate-wiring ...

For an electronic device including the connecting member and the connecting member of the electronic device

WIRING CIRCUIT BOARD

Provided is a wiring circuit board that allows the electrical connection between the elements and the terminals to be easy and sure. The wiring circuit board includes an insulating base layer, a plurality of wires with different thicknesses from each other, and an insulating cover layer sequentially toward an upper side. The wires include a first wire having the greatest thickness. The wiring circuit board further includes a plurality of terminals disposed on an upper surface of the insulating base layer. The terminals are electrically connected with the wires, respectively. The upper surfaces and of the terminals are each located at an upper side as compared to an upper surface of the insulating cover layer (a wire covering portion) covering the first wire.

Radio frequency connection arrangement

Coil substrate

The coil substrate may include a substrate; a first conductor layer including a plurality of first and second segments periodically disposed on a top and a bottom of the substrate; a second conductor layer including a plurality of first and second segments periodically overlapping the first conductor layer on the top and the bottom of the substrate; a first connection line that connects the first and second segments of the first conductor layer; and a second connection line that connects the first and second segments of the second conductor layer. The first connection line includes a first region exposed on at least one of first and second surfaces that are opposite to each other of the substrate and second and third regions disposed through the substrate from both sides of the first region.

알파 아미노산 및 비스에폭사이드의 반응 산물을 함유하는 구리 전기도금조로부터 포토레지스트 정의된 특징부의 전기도금 방법

... 전기도금 방법은 실질적으로 균일한 형태를 갖는 포토레지스트 정의된 특징부의 도금을 가능케 한다. 전기도금 방법에는 포토레지스트 정의된 특징부를 전기도금하기 위해 α-아미노산 및 비스에폭사이드의 반응 산물을 포함하는 구리 전기도금조가 포함된다. 이러한 특징부에는 기둥, 결합 패드 및 라인 스페이스 특징부가 포함된다.

피리딜 알킬아민과 비스에폭사이드의 반응 생성물을 함유하는 구리 전기도금조로부터 포토레지스트 한정된 피쳐를 전기도금하는 방법

전기도금 방법은 실질적으로 균일한 형태를 갖는 포토레지스트 한정된 피쳐의 도금을 가능하게 한다. 상기 전기도금 방법은 포토레지스트 한정된 피쳐를 전기도금하기 위해 피리딜 알킬아민과 비스에폭사이드의 반응 생성물을 포함하는 구리 전기도금조를 포함한다. 그와 같은 피쳐는 필러, 결합 패드 및 라인 공간 피쳐를 포함한다. The electroplating process enables the plating of photoresist-defined features having a substantially uniform shape. The electroplating process includes a copper electroplating bath comprising a reaction product of a pyridyl alkylamine and bis epoxide to electroplating a photoresist-limited feature. Such features include fillers, bond pads, and line space features.

Molding with integrated electrode pattern and method for manufacturing same

A molding with an integrated electrode pattern, including a resin molded body having a first surface and a second surface opposing each other; a first film that is formed on the first surface and that includes an electrode pattern and a first lead-out wire electrically connected to the electrode pattern, the first film not being covered by the resin molded body; and a second film that stands on the first surface, and that includes a second lead-out wire electrically connected to the first lead-out wire, the second film having a rectangular shape, and the resin molded body includes a pair of support wall portions formed integrally with the first surface so as to stand on the first surface and clamp both ends of a base part of the second film.

Electronic Stickers with Modular Structures

An electronic sticker assembly includes a first electronic sticker comprising an upper surface, a lower surface, and a first group of conductive connection dots on the upper surface, a first adhesive layer on the first electronic sticker and comprising a first window. The first window is positioned to expose the first group of one or more conductive connection dots. A second electronic sticker on the first adhesive layer includes a lower surface and one or more second conductive connection dots on the lower surface. The first group of conductive connection dots on the upper surface of the first electronic sticker are in contact with the one or more second conductive connection dots on the lower surface of the second electronic sticker through the first window in the first adhesive layer. 1. An electronic sticker assembly , comprising:a first electronic sticker comprising an upper surface, a lower surface, and a first group of one or more conductive connection dots on the upper surface, wherein the lower surface is configured to be adhered to a human skin or a surface of an object;a first adhesive layer on the first electronic sticker and comprising a first window, wherein the first window is positioned to expose the first group of one or more conductive connection dots; anda second electronic sticker on the first adhesive layer, wherein the second electronic sticker includes a lower surface and one or more second conductive connection dots on the lower surface, wherein the first group of one or more conductive connection dots on the upper surface of the first electronic sticker are configured to be in contact with the one or more second conductive connection dots on the lower surface of the second electronic sticker through the first window in the first adhesive layer.2. The electronic sticker assembly of claim 1 , wherein at least some of the first group of one or more conductive connection dots and the one or more second conductive connection dots are formed by a ...

RADIO FREQUENCY CONNECTION ARRANGEMENT

Drucksensor

Drucksensor, der ein leitfähiges Substrat (1), einen ringförmigen Abstandshalter (2), einen inneren Abstandshalter (3) und ein Erfassungsschaltungssubstrat (4) aufweist. Das leitfähige Substrat (1) weist einen Substratkörper (11) und eine Leiterschicht (12) auf. Die Leiterschicht (12) befindet sich auf dem Substratkörper (11). Der ringförmige Abstandshalter (2) und der innere Abstandshalter (3) sind auf dem Substratkörper (11) voneinander beabstandet angeordnet. Das Erfassungsschaltungssubstrat (4) befindet sich auf dem ringförmigen Abstandshalter (2) und dem inneren Abstandshalter (3) und weist einen Schaltungssubstratkörper (41), eine erste Erfassungsschaltung (42) und eine zweite Erfassungsschaltung (43) auf. Die erste Erfassungsschaltung (42) und die zweite Erfassungsschaltung (43) sind an beiden Seiten des Schaltungssubstratkörpers (41) angeordnet. Die erste Erfassungsschaltung (42) und die zweite Erfassungsschaltung (43) sind jeweils mit einer Mehrzahl von versetzt angeordneten Fingerelektroden ...

IMPRINTED MULTI-LAYER MICRO-STRUCTURE

An imprinted micro-structure includes a substrate having a first layer in relation thereto. First, second, and third micro-channels are imprinted in the first layer and have first, second, and third micro-wires respectively located therein. A second layer is adjacent to and in contact with the first layer. Imprinted first and second connecting micro-channels including first and second connecting micro-wires are in contact with the first and second micro-wires respectively and are isolated from the third micro-wire. A third layer is adjacent to and in contact with the second layer and has an imprinted bridge micro-channel with a bridge micro-wire contacting the first and second connecting micro-wires and separate from the third micro-wire so that the first and second micro-wires are electrically connected and electrically isolated from the third micro-wire. 1. An imprinted micro-wire structure , comprising:a substrate;a first layer formed in relation to the substrate;imprinted first, second, and third micro-channels in the first layer, the third micro-channel separate from the first and second micro-channels and dividing the first layer into first and second portions, the first micro-channel located in the first portion, and the second micro-channel in the second portion;a first micro-wire located in the first micro-channel, a second micro-wire located in the second micro-channel, and a third micro-wire located in the third micro-channel;a second layer adjacent to and in contact with the first layer;an imprinted first connecting micro-channel in contact with at least a portion of the first micro-wire and an imprinted second connecting micro-channel in contact with at least a portion of the second micro-wire, the first and second micro-channels in the second layer and not in contact with the third micro-wire;a first connecting micro-wire located in the first connecting micro-channel contacting at least a portion of the first micro-wire and separate from the third ...

Printed wiring board and method for manufacturing printed wiring board

A printed wiring board includes a base insulating layer, a conductor layer including first and second pads, a solder resist layer covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, a first bump including base plating layer in the first opening and top plating layer on the first base layer, and a second bump including base plating layer in the second opening and top plating layer on the base layer. The second opening has smaller diameter than the first opening, and the second bump has smaller diameter than the first bump. The first base layer has flat upper surface or first recess having depth of 20 μm or less in upper central portion. The second base layer has flat upper surface, raised portion in upper central portion, or second recess shallower than the first recess in the upper central portion.

Imprinted multi-layer micro structure method

A method of making an imprinted micro-wire structure includes providing a substrate and first, second, and third different stamps. A curable first layer is provided in relation to a substrate and imprinted with first, second, and third micro-channels using the first stamp. First, second, and third micro-wires are formed in the first, second, and third micro-channels. A curable second layer is provided adjacent to the first layer and imprinted with first and second connecting micro-channels. First and second connecting micro-wires are formed in the first and second connecting micro-channels. A curable third layer is provided and imprinted with a bridge micro-channel and a bridge micro-wire formed in the bridge micro-channel. The first and second micro-wires, the first and second connecting micro-wires, and the bridge micro-wire are electrically connected and electrically isolated from the third micro-wire.

FORMKÖRPER MIT INTEGRIERTEM ELEKTRODENMUSTER UND VERFAHREN ZUR HERSTELLUNG DESSELBEN

... [Aufgabe] Bereitstellung eines Formkörpers mit einem integrierten Elektrodenmuster, in dem eine bandförmige zweite Folie mit einem elektrischen Verbindungsabschnitt mit einem externen Substrat verbunden werden soll und an einer Innenfläche eines aus Harz geformten Körpers sicher befestigt werden kann, und Bereitstellung eines Verfahrens zur Herstellung des Formkörpers mit einem integrierten Elektrodenmuster.[Lösung] Ein Formkörper mit einem integrierten Elektrodenmuster schließt einen aus Harz geformten Körper; eine erste Folie 11, die auf einer Innenfläche des aus Harz geformten Körpers gebildet ist und die ein Elektrodenmuster 13 und einen ersten, mit dem Elektrodenmuster elektrisch verbundenen Anschlussdraht 63 enthält, ein; und eine zweite, bandförmige Folie 4, die sich auf der Innenfläche des aus Harz geformten Körpers befindet und die einen zweiten, mit dem ersten Anschlussdraht elektrisch verbundenen Anschlussdraht 15 einschließt. Der aus Harz geformte Körper schließt ein Paar Stützwandabschnitte ...

투명 도전막 및 투명 도전막의 제조 방법

... 본 발명은, 투명 도전막 및 투명 도전막의 제조 방법에 관한 것이다. 투명 도전막은, 투명 기체 (12) 와, 그 투명 기체 (12) 상에 형성된 금속 배선부 (14) 를 갖는 투명 도전막 (10) 에 있어서, 금속 배선부 (14) 의 전극부 (18) 를 구성하는 금속 세선 (24) 이, Ra2/Sm ＞ 0.01 ㎛ 를 만족시키는 표면 형상을 가지며, 또한, 금속 체적율이 35 ％ 이상이다. 또한, Ra 는 산술 평균 조도를 나타내고, 표면 조도 측정 지점의 금속 세선의 두께 이하로서, 단위가 ㎛ 이다. Sm 은 요철의 볼록간의 평균 간격으로서, 0.01 ㎛ 이상이다.

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of alpha amino acids and bisepoxdes

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of [alpha]-amino acids and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.

투명 도전막 및 투명 도전막의 제조 방법

... 본 발명은, 투명 도전막 및 투명 도전막의 제조 방법에 관한 것이다. 투명 도전막은, 투명 기체 (12) 와, 그 투명 기체 (12) 상에 형성된 금속 배선부 (14) 를 갖는 투명 도전막 (10) 에 있어서, 금속 배선부 (14) 의 전극부 (18) 를 구성하는 금속 세선 (24) 이, Ra2/Sm ＞ 0.01 ㎛ 를 만족시키는 표면 형상을 가지며, 또한, 금속 체적율이 35 ％ 이상이다. 또한, Ra 는 산술 평균 조도를 나타내고, 표면 조도 측정 지점의 금속 배선의 두께 이하로서, 단위가 ㎛ 이다. Sm 은 요철의 평균 간격으로서, 0.01 ㎛ 이상이다.

PRINTED CIRCUIT BOARD

A printed circuit board according to an embodiment includes: an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes an upper surface, a lower surface, a first side surface, and a second side surface, and surface roughness Ra of at least three surfaces of the upper surface, the lower surface, the first side surface, and the second side surface of the circuit pattern is 0.1 μm to 0.31 μm. 1. A printed circuit board comprising:an insulating layer; anda circuit pattern disposed on the insulating layer,wherein the circuit pattern includes an upper surface, a lower surface, a first side surface, and a second side surface, andsurface roughness Ra of at least three surfaces of the upper surface, the lower surface, the first side surface, and the second side surface of the circuit pattern is 0.31 μm or less.2. The printed circuit board of claim 1 , wherein surface roughness Ra of at least three surfaces of the upper surface claim 1 , the lower surface claim 1 , the first side surface claim 1 , and the second side surface of the circuit pattern is 0.17 μm or less.3. The printed circuit board of claim 1 , wherein surface roughness Ra of at least three surfaces of the upper surface claim 1 , the lower surface claim 1 , the first side surface claim 1 , and the second side surface of the circuit pattern is 0.1 μm to 13 μm.4. The printed circuit board of claim 1 , wherein at least one of a length of the upper surface and a length of the lower surface in a cross section in a width direction of the circuit pattern is different from at least one of lengths of the first side surface and the second side surface in the cross section of the circuit pattern claim 1 ,wherein the surface roughness Ra of at least one of the upper and lower surfaces of the circuit pattern is different from the surface roughness Ra of at least one of the first side surface and the second side surface of the circuit pattern.5. The printed circuit board ...

WIRING CIRCUIT BOARD, PRODUCING METHOD THEREOF, AND WIRING CIRCUIT BOARD ASSEMBLY SHEET

A method for producing a wiring circuit board includes a first step of preparing a wiring circuit board assembly sheet including a support sheet, a plurality of wiring circuit boards supported by the support sheet, and a joint connecting the support sheet to the plurality of wiring circuit boards, having flat-shaped one surface and the other surface facing one surface at spaced intervals thereto in a thickness direction, and having a thin portion in which the other surface is recessed toward one surface and a second step of forming a burr portion protruding toward the other side in the thickness direction and cutting the thin portion.

RADIO FREQUENCY CONNECTION ARRANGEMENT

A radio frequency transmission arrangement comprises a ground plate having an aperture comprising a slot with an elongate cross-section and substantially parallel sides, and a first and second transmission line. The thickness of the ground plate is greater than a width of the slot. The aperture is partially filled with a solid dielectric material and partially filled with air. The first transmission line comprises a first elongate conductor on a first side of the ground plate and has an end terminated with a first termination stub. The second transmission line comprises a second elongate conductor on the opposite side of the ground plate and has an end terminated with a second termination stub. The first transmission line is arranged to cross the slot at a point adjacent to the first termination stub, and the second transmission line is arranged to cross the slot at a point adjacent to the second termination stub. 1. A radio frequency transmission arrangement comprising:a ground plate having first and second opposite sides and an aperture passing through the ground plate from the first side to the second side, the aperture comprising a slot, the slot having an elongate cross-section in a plane of the first side of the ground plate, the cross-section having substantially parallel sides extending along a length of the cross section, and the slot having a width which is a distance between the parallel sides of the cross-section of the slot;a first transmission line comprising a first elongate conductor disposed on the first side of the ground plate in a substantially parallel relationship with the first side of the ground plate, the first transmission line having an end terminated with a first termination stub; anda second transmission line comprising a second elongate conductor disposed on the second side of the ground plate in a substantially parallel relationship with the second side of the ground plate, the second transmission line having an end terminated with a ...

CONNECTORS FOR COAXIAL CABLES

A connector for connecting a coaxial cable to a printed circuit board includes a support portion that receives an end of the coaxial cable within a hollow structure thereof so that an exposed outer conductor of the coaxial cable is connected to an interior surface of a side wall of the hollow structure and so that the coaxial cable extends within the support portion perpendicular to the printed circuit board. The connector further includes an engagement portion that is connected to the support portion and configured to fix the connector to a first side of the printed circuit board, where the engagement portion is mounted above a via hole in the printed circuit board. 1. A connector configured for connecting a coaxial cable to a printed circuit board , the coaxial cable having an exposed outer conductor on one end thereof and having an exposed inner conductor that extends beyond the exposed outer conductor , the connector comprising:a support portion, which includes a hollow structure having a side wall, wherein the support portion is configured to receive one end of the coaxial cable within the hollow structure so that the exposed outer conductor is mechanically and electrically connected to an interior surface of the side wall and so that the coaxial cable extends within the support portion perpendicular to the printed circuit board; andan engagement portion, which is connected to the support portion and configured to fix the connector to a first side of the printed circuit board, wherein the engagement portion is mounted above a via hole in the printed circuit board.23-. (canceled)4. The connector according to claim 1 , wherein the hollow structure is above and aligned with the via hole.5. The connector according to claim 4 , wherein the exposed outer conductor is retained within the hollow structure claim 4 , and the exposed inner conductor extends through the hollow structure and the via hole and is electrically connected to a metal pattern on a second side of ...

IMPRINTED MULTI-LAYER MICRO-STRUCTURE METHOD WITH MULTI-LEVEL STAMP

A method of making an imprinted micro-wire structure includes providing a substrate, a first stamp, and a different multi-level second stamp. A curable bottom layer is provided over the substrate. One or more bottom-layer micro-channels) are imprinted in the curable bottom layer with the first stamp and a bottom-layer micro-wire formed in each bottom-layer micro-channel. A curable multi-layer is formed adjacent to and in contact with the cured bottom layer. First and second multi-layer micro-channels and a top-layer micro-channel are imprinted in the curable multi-layer with the multi-level second stamp. Either two bottom-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a top-layer micro-wire or two top-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a bottom-layer micro-wire.

The jumper module carries the circuit substrate and the circuit board assembly

本发明提供一种跨接模块搭载电路基板和电路基板组装体，其能够削减器件成本。跨接模块搭载电路基板(1)具有电路基板(40)和跨接模块(10)，跨接模块在绝缘主体部(30)上设置有导电性的电气连接部(20)，电气连接部通过将两端的各触点部(21)与在电路基板上分离地形成的连接图案(51)连接而将连接图案间能导通地连接，跨接模块搭载电路基板以使触点部与分离的连接图案(51)连接的方式将跨接模块搭载在电路基板上，其中，电路基板具有将与多个布线规格相应的连接图案汇集在跨接模块的搭载位置(P)而形成的连接图案汇集部(50)，跨接模块的触点部(21)根据布线规格，与连接图案汇集部的连接图案选择性地连接。

METHOD OF ELECTROPLATING PHOTORESIST DEFINED FEATURES FROM COPPER ELECTROPLATING BATHS CONTAINING REACTION PRODUCTS OF IMIDAZOLE AND BISEPOXIDE COMPOUNDS

SYSTEMS, METHODS AND DEVICES FOR INTER-SUBSTRATE COUPLING

Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets. 1. A system comprising:a first chip including a first capacitive coupling element;a second chip including a second capacitive coupling element; anda liquid droplet disposed between the first capacitive coupling element and the second capacitive coupling element to create a capacitor, wherein properties of the first chip, the second chip, and the liquid droplet are selected to minimize a surface energy of the liquid droplet at a spacing between the first chip and the second chip when the liquid droplet is located between and in contact with the first chip and the second chip such that the first chip and the second chip are separated at a droplet location by a defined distance.2. The system of claim 1 , wherein the first chip comprises a first dielectric layer disposed between the first capacitive coupling element and the liquid droplet.3. The system of claim 2 , wherein the second chip comprises a second dielectric layer disposed between the second capacitive coupling element and the liquid droplet.4. The system of claim 1 , wherein the liquid droplet comprises a conductive liquid.5. The system of claim 4 , wherein the conductive liquid comprises a liquid metal.6. The system of claim 5 , wherein the liquid metal reacts with the first capacitive coupling element or the second capacitive coupling element.79-. (canceled)10. The system of claim 4 , wherein the conductive liquid comprises a nonmetallic liquid including conductive particles.11. The system of claim 1 , wherein the liquid droplet comprises a non-conductive liquid.1253-. (canceled)54. A system ...

IMPRINTED BI-LAYER MICRO-STRUCTURE METHOD

A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing first, second, and third different stamps. A curable bottom, connecting layer, and top layer are formed on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer in the central area and the edge area, a connecting-layer micro-channel is imprinted in the connecting layer in the edge area over the bottom-layer micro-channel, an edge micro-channel is imprinted in the top layer in the edge area over the connecting-layer micro-channel, and top-layer micro-channels are imprinted in the top layer over the central area. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire in the central area is electrically connected to the edge micro-wire in the edge area and is electrically isolated from the top-layer micro-wire.

Imprinted bi-layer micro-structure method with bi-level stamp

A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing a first stamp and a multi-level second stamp. A curable bottom layer and multi-layer are provided on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer. A multi-layer micro-channel and a top-layer micro-channel are imprinted in the multi-layer. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire extends from the central area into the edge area. The multi-layer micro-wire contacts the bottom-layer micro-wire in the edge area. The top-layer micro-wire is over the central area and is separate from the multi-layer micro-wire and the bottom-layer micro-channel. The bottom-layer micro-wire is electrically connected to the multi-layer micro-wire and is electrically isolated from the top-layer micro-wire.

Printed Wiring Board

A printed wiring board used to suppress parasitic component is provided. The printed wiring board 100 includes a multi-layer substrate 110, and a power line 50 laid on the multi-layer substrate 110 and connected with a power terminal row T11a-T11d of a semiconductor device 10. The power line 50 includes a first wiring pattern 51 formed on a surface of the multi-layer substrate 110, a second wiring pattern 52 formed within the multi-layer substrate 110, and interlayer connections 53x and 53y electrically conducting the first wiring pattern 51 and the second wiring pattern 52 to bypass at least a portion of the power terminal row T11a-T11d.

WIRING BOARD AND LIGHT EMITTING DEVICE USING SAME, AND MANUFACTURING METHOD FOR BOTH

In the present invention, a wiring board comprises a substrate in which a plurality of plate wirings formed by metal plates and an insulating part that is constituted by a resin-including resin composition are integrally formed, and a plurality of surface layer wirings that are electrically connected to the plate wirings. The substrate has a first surface and a second surface and the surface layer wirings are provided to these surfaces. The surface layer wirings are thinner than the plate wirings, and the minimum wiring gap between the surface layer wirings is smaller than the minimum gap between the plate wirings. One plate wiring has, in the normal line direction of the first surface, a shape that is substantially the same as the overlapping shape of a first upper surface-layer wiring on the first surface and a first lower surface-layer wiring on the second surface, and the first upper surface-layer wiring and the first lower surface-layer wiring are connected by such one plate-wiring.

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD

A printed wiring board includes a base insulating layer, a conductor layer including first and second pads, a solder resist layer covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, a first bump including base plating layer in the first opening and top plating layer on the first base layer, and a second bump including base plating layer in the second opening and top plating layer on the base layer. The second opening has smaller diameter than the first opening, and the second bump has smaller diameter than the first bump. The first base layer has flat upper surface or first recess having depth of 20 μm or less in upper central portion. The second base layer has flat upper surface, raised portion in upper central portion, or second recess shallower than the first recess in the upper central portion.

METHOD OF ELECTROPLATING PHOTORESIST DEFINED FEATURES FROM COPPER ELECTROPLATING BATHS CONTAINING REACTION PRODUCTS OF IMIDAZOLE AND BISEPOXIDE COMPOUNDS

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of imidazole and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features. 1. A method of electroplating photoresist defined features comprising:a) providing a substrate comprising a layer of photoresist, wherein the layer of photoresist comprises a plurality of apertures;b) providing a copper electroplating bath comprising one or more reaction products of one or more imidazole compounds and one or more bisepoxides; an electrolyte; one or more accelerators; and one or more suppressors;c) immersing the substrate comprising the layer of photoresist with the plurality of apertures in the copper electroplating bath; andd) electroplating a plurality of copper photoresist defined features in the plurality of apertures, the plurality of photoresist defined features comprise an average % TIR of 5% to 8%.2. The method of claim 1 , wherein a % WID of the plurality of photoresist defined features is from 5% to 12%.4. The method of claim 3 , wherein R claim 3 , Rand Rare independently chosen from hydrogen and (C-C)alkyl.6. The method of claim 1 , wherein the reaction product is in amounts of 0.25 ppm to 20 ppm.7. The method of claim 1 , wherein electroplating is done at a current density of 0.25 ASD to 40 ASD.8. The method of claim 1 , wherein the one or more copper photoresist defined features are pillars claim 1 , bond pads or line space features.9. An array of photoresist defined features on a substrate comprising an average % TIR of 5% to 8% and a % WID of 5% to 12%. The present invention is directed to a method of electroplating photoresist defined features from copper electroplating baths which include reaction products of imidazole and bisepoxide compounds. More specifically, the present invention is ...

Wiring circuit board, method of manufacturing same, and wiring circuit board assembly sheet

本發明之配線電路基板之製造方法具備：第1步驟，其係準備配線電路基板集合體片材，該配線電路基板集合體片材具備支持片材、支持於支持片材之複數個配線電路基板、及接頭，該接頭將支持片材及複數個配線電路基板連結，具有平坦狀之一面、及於厚度方向上隔開間隔與一面對向之另一面，且具有另一面朝向一面凹陷之薄壁部；及第2步驟，其係一面形成朝向厚度方向另一側突出之毛邊部，一面將薄壁部切斷。

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

In a printed wiring board, when a plurality of wiring base bodies are collectively stacked, a constituent material of a first layer of an insulating resin film has a low melting point, so that the first layer is easily melted. Therefore, thermal welding on an upper surface of the wiring base body is reliably performed, and the wiring base bodies are bonded to each other with high reliability.

METHOD FOR PROVIDING AN ELECTRICAL CONNECTION AND PRINTED CIRCUIT BOARD

Method for providing an electrical connection, comprising connecting a first cable to a first conducting structure on a printed circuit board, connecting a second cable to a second conducting structure on the printed circuit board, comparing a propagation delay of a first signal path comprising the first cable and the first conducting structure on the printed circuit board, and a propagation delay of a second signal path comprising the second cable and the second conducting structure on the printed circuit board; and removing conductive material of the first conducting structure and/or of the second conducting structure, in order to modify an electrical length of the first conducting structure and/or of the second conducting structure, to obtain a first conducting path and a second conducting path, in dependence on a result of the comparison, in order to reduce a difference of the propagation delays between the first signal path and the second signal path.

Self-containing imidazole and double-epoxide of reaction products of copper electroplating bath plating photoresist defining the characteristic of the method

Electrode pattern integrated molding and method for manufacturing same

To provide an electrode pattern integrated molding and a method for manufacturing the same that are capable of securely fixing, onto an inner surface of a resin molding, a band-like second film having an electric connection part with an external substrate. Provided are the following: a resin molding; a first film 11 formed on an inner surface of the resin molding and having an electrode pattern 13 and first lead-out wiring 63 electrically connected to the electrode pattern 13; and a band-like second film 4 rising from the inner surface of the resin molding and having second lead-out wiring 15 electrically connected to the first lead-out wiring. The resin molding contains a pair of support wall parts 3 integrally rising from the inner surface of the resin molding so as to clamp and hold both ends of a base part 4a of the second film.

Connectors for coaxial cables

A connector for connecting a coaxial cable to a printed circuit board includes a support portion that receives an end of the coaxial cable within a hollow structure thereof so that an exposed outer conductor of the coaxial cable is connected to an interior surface of a side wall of the hollow structure and so that the coaxial cable extends within the support portion perpendicular to the printed circuit board. The connector further includes an engagement portion that is connected to the support portion and configured to fix the connector to a first side of the printed circuit board, where the engagement portion is mounted above a via hole in the printed circuit board.

Imprinted multi-layer micro-structure method with multi-level stamp

A method of making an imprinted micro-wire structure includes providing a substrate, a first stamp, and a different multi-level second stamp. A curable bottom layer is provided over the substrate. One or more bottom-layer micro-channel(s) are imprinted in the curable bottom layer with the first stamp and a bottom-layer micro-wire formed in each bottom-layer micro-channel. A curable multi-layer is formed adjacent to and in contact with the cured bottom layer. First and second multi-layer micro-channels and a top-layer micro-channel are imprinted in the curable multi-layer with the multi-level second stamp. Either two bottom-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a top-layer micro-wire or two top-layer micro-wires are electrically connected through the first and second multi-layer micro-wires and a bottom-layer micro-wire.

PRINTED CIRCUIT BOARD HAVING CIRCUIT PATTERN FORMING BOTTLENECK SECTION

The present invention relates to a printed circuit board having a circuit pattern forming a bottleneck section. More specifically, the present invention relates to a printed circuit board having a circuit pattern forming a bottleneck section which adjusts a width area of a part of a circuit pattern electrically connecting a plurality of components based on at least one among voltage, current, the temperature and the thickness of the circuit pattern to form at least one bottleneck section. Also, the at least one bottleneck section is self-destructed when overcurrent is applied to the circuit pattern, and the overcurrent is blocked, so that a separate fuse pattern is not required. The printed circuit board having a circuit pattern forming a bottleneck section comprises: at least one circuit pattern; and a slit hole. COPYRIGHT KIPO 2018 ...

PRESSURE SENSOR

PRINTED CIRCUIT BOARD WITH CIRCUIT PATTERN INCLUDING BOTTLENECK SECTION

The present invention relates to a printed circuit board having a circuit pattern including a bottleneck section. More specifically, a bottleneck section is formed by adjusting a part of a circuit pattern for electrically connecting a plurality of parts based on at least one of the voltage, the current, the temperature and the thickness of the circuit pattern. When an overcurrent is applied to the circuit pattern, the bottleneck section itself is destroyed to block an overcurrent. So, a separate fuse pattern is not required. COPYRIGHT KIPO 2018 ...

Electronic package

The invention provides an electronic package comprising a substrate, an antenna board structure disposed on the substrate, the antenna board having first and second antenna sections and a partition section disposed between the first and second antenna sections, such that the conduct electric current is divided to flow into two pathways which enables flying and scattering of electromagnetic radiation to form high frequency range.

Electronic Component, Manufacturing Method for Electronic Component, Electronic Apparatus, and Moving Object

In order to prevent deformation or damage of a base of a lead terminal by alleviating stress which concentrates on the base of the lead terminal protruding from an electronic component main body, the lead terminal includes a connection pad connected to a connection terminal provided on a first substrate, and a lead portion extending from the connection pad, and the lead terminal also includes a first surface connected to the connection terminal, a second surface that is a rear surface thereof, and a third surface that is a side surface, and in which the lead portion includes a first bent section and a third bent section that are bent in a direction intersecting the first surface or the second surface, a second bent section that is bent in a direction intersecting the third surface between the first bent section and the third bent section. 1. An electronic component comprising:a substrate that is provided with a connection terminal; anda lead terminal that includes a first surface, a second surface which is a rear surface of the first surface, and a third surface which connects the first surface to the second surface, and includes a connection pad, a lead portion connected to the connection pad, and a lead end portion provided at the lead portion on an opposite side to the connection pad,wherein the first surface of the connection pad is connected to the connection terminal via a joining member, and a first bent section that is bent in a direction intersecting the first surface or the second surface;', 'a second bent section that is bent in a direction intersecting the third surface between the first bent section and the lead end portion; and', 'a third bent section that is bent in a direction intersecting the first surface or the second surface between the second bent section and the lead end portion., 'wherein the lead portion includes'}2. The electronic component according to claim 1 ,wherein the first bent section and the third bent section are bent toward the ...

PACKAGE-LEVEL ELECTROMAGNETIC INTERFERENCE SHIELDING STRUCTURES FOR A SUBSTRATE

A electromagnetic interference shielding device is disclosed having a first substrate one or more surfaces. One or more laminates are operatively attached to the one or more surfaces of the first substrate. A cavity is provided that is defined by the first substrate and its corresponding one or more laminates and at least one inner lateral portion. The cavity is operable to receive one or more microelectromechanical system (MEMS) components. A first conductive structure integrally formed with a trench or via array of the substrate spans a thickness defined by one or more of surfaces of the first substrate, the first conductive structure operable to shield electromagnetic interference between MEMS components assembled with the first substrate. 1. An electromagnetic interference shielding device , comprising:a first substrate having one or more surfaces;one or more laminates operatively attached to the one or more surfaces of the first substrate;a cavity defined by the first substrate and corresponding one or more laminates and at least one inner lateral portion, the cavity being operable to receive one or more microelectromechanical system (MEMS) components; anda first conductive structure spanning a thickness defined by one or more of surfaces of the first substrate, the first conductive structure operable to shield electromagnetic interference between MEMS components assembled with the first substrate.2. The device of claim 1 , wherein surfaces of the first substrate are operable for die embedding or receiving one or more metallization patterns.3. The device of claim 1 , wherein the first conductive structure is integrally formed with a trench of the substrate.4. The device of claim 1 , wherein the first conductive structure is integrally formed with a continuous pad of a via array of the substrate claim 1 , the continuous pad being disposed at a predetermined height relative to the substrate.5. The device of claim 3 , wherein the first conductive structure ...

Transparent conductive film and method for producing the same

本發明涉及一種透明導電膜及其製造方法，該透明導電膜(10)具有透明基體(12)和形成於該透明基體(12)上的金屬配線部(14)，構成金屬配線部(14)的電極部(18)的金屬細線(24)具有滿足Ra2/Sm＞0.01μm的表面形狀，且金屬體積率為35%以上。需要說明的是，Ra表示算術平均粗糙度，為表面粗糙度測定部位的金屬配線的厚度以下，單位為μm。Sm為凹凸的平均間隔，為0.01μm以上。

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of alpha amino acids and bisepoxides

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of α-amino acids and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.

Transparent conductive film and method for producing transparent conductive film

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra 2 /Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more.

Circuit board and manufacturing method thereof and electronic device

A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE

A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.

Copper foil, laminate, method of manufacturing printed wiring board, and method of manufacturing electronic device

CONNECTING MEMBER FOR ELECTRONIC DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

A connecting member for electrically connecting a circuit board and a component in an electronic device is provided. The connecting member includes at least one bending part configured to comprise elasticity, a pad part connected to the bending part and configured to be attached to one surface of the circuit board, and a fixing part extending from the pad part and configured to fix the connecting member to the circuit board. 1. A connecting member for electrically connecting a circuit board and a component in an electronic device , the connecting member comprising:at least one elastic bending part;a pad part connected to the bending part and configured to be attached to one surface of the circuit board; anda fixing part extending from the pad part and configured to fix the connecting member to the circuit board.2. The connecting member of claim 1 , wherein the fixing part is attached to a surface different from the one surface of the circuit board.3. The connecting member of claim 1 , wherein the one surface of the circuit board where the pad part is attached comprises a side edge of the circuit board.4. The connecting member of claim 1 , wherein the bending part is configured to physically contact the component.5. The connecting member of claim 4 , wherein the component comprises an antenna mounted on the electronic device.6. The connecting member of claim 1 , wherein the bending part is disposed in one of a horizontal and vertical direction with respect to the circuit board.7. The connecting member of claim 1 , wherein the pad part is attached to a portion of a side edge disposed at a perimeter of the circuit board.8. The connecting member of claim 1 , wherein the pad part is attached to a portion of a side edge of an opening part arranged inside a perimeter of the circuit board.9. The connecting member of claim 1 , further comprising a protection part extending from a side surface of the pad part and being connected to a surface different from the one surface of ...

COIL SUBSTRATE

The coil substrate may include a substrate; a first conductor layer comprising a plurality of first and second segments periodically disposed on top and bottom of the substrate; a second conductor layer comprising a plurality of first and second segments periodically overlapping the first conductor layer on the top and bottom of the substrate; a first connection line connecting between the first and second segments of the first conductor layer; and a second connection line connecting the first and second segments of the second conductor layer. The first connection line includes a first region exposed on at least one of the first and second surfaces that are opposite to each other of the substrate and second and third regions disposed through the substrate from both sides of the first region.

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of imidazole and bisepoxide compounds

Method of electroplating photoresist defined features from copper electroplating baths

Jumper module mounting circuit board and circuit board assembly

A jumper module mounting circuit board includes: a circuit board; and a jumper module having an insulator main body provided with conductive electrical connection parts for connecting between connection patterns so as to provide electrical continuity therebetween by connecting each of contact parts on both ends of the conductive electrical connection parts to the connection patterns which are formed to be spaced apart from each other on the circuit board. The jumper module is mounted onto the circuit board so as to connect between the contact parts and the connection patterns that are formed to be spaced apart from each other. The circuit board includes a connection pattern concentrated section that is formed by concentrating the connection patterns depending on a plurality of wiring specifications at a mount position of the jumper module.

Printed wiring board and method for manufacturing the same

In a printed wiring board, when a plurality of wiring base bodies are collectively stacked, a constituent material of a first layer of an insulating resin film has a low melting point, so that the first layer is easily melted. Therefore, thermal welding on an upper surface of the wiring base body is reliably performed, and the wiring base bodies are bonded to each other with high reliability.

COIL SUBSTRATE

The coil substrate may include a substrate; a first conductor layer comprising a plurality of first and second segments periodically disposed on top and bottom of the substrate; a second conductor layer comprising a plurality of first and second segments periodically overlapping the first conductor layer on the top and bottom of the substrate; a first connection line connecting between the first and second segments of the first conductor layer; and a second connection line connecting the first and second segments of the second conductor layer. The first connection line includes a first region exposed on at least one of the first and second surfaces that are opposite to each other of the substrate and second and third regions disposed through the substrate from both sides of the first region.

Printed circuit board

A printed circuit board according to an embodiment includes: an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes an upper surface, a lower surface, a first side surface, and a second side surface, and surface roughness Ra of at least three surfaces of the upper surface, the lower surface, the first side surface, and the second side surface of the circuit pattern is 0.1 μm to 0.31 μm.

JUMPER MODULE MOUNTING CIRCUIT BOARD AND CIRCUIT BOARD ASSEMBLY

A jumper module mounting circuit board includes: a circuit board; and a jumper module having an insulator main body provided with conductive electrical connection parts for connecting between connection patterns so as to provide electrical continuity therebetween by connecting each of contact parts on both ends of the conductive electrical connection parts to the connection patterns which are formed to be spaced apart from each other on the circuit board. The jumper module is mounted onto the circuit board so as to connect between the contact parts and the connection patterns that are formed to be spaced apart from each other. The circuit board includes a connection pattern concentrated section that is formed by concentrating the connection patterns depending on a plurality of wiring specifications at a mount position of the jumper module. 1. A jumper module mounting circuit board comprising:a circuit board; anda jumper module having an insulator main body provided with conductive electrical connection parts for connecting between connection patterns so as to provide electrical continuity therebetween by connecting each of contact parts on both ends of the conductive electrical connection parts to the connection patterns which are formed to be spaced apart from each other on the circuit board, the jumper module being mounted onto the circuit board so as to connect between the contact parts and the connection patterns that are formed to be spaced apart from each other, whereinthe circuit board has a connection pattern concentrated section that is formed by concentrating the connection patterns depending on a plurality of wiring specifications at a mount position of the jumper module, andthe jumper module is configured such that the contact parts selectively connect to the connection patterns of the connection pattern concentrated section depending on the plurality of wiring specifications.2. The jumper module mounting circuit board according to claim 1 , whereinthe ...

TRANSPARENT CONDUCTIVE FILM AND METHOD FOR PRODUCING TRANSPARENT CONDUCTIVE FILM

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra/Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more. 1. A transparent conductive film comprising a support and a metal wiring portion formed thereon ,wherein{'sup': '2', 'at least a part of the metal wiring portion has a surface shape satisfying a condition of Ra/Sm>0.01 μm and has a metal volume content of 35% or more,'}the Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than a thickness of a thin metal wire located in a position where a surface roughness is measured, andthe Sm represents an average distance between convex portions and is 0.01 μm or more.2. The transparent conductive film according to claim 1 , whereinat least the part of the metal wiring portion has Sm of 4 μm or less.3. The transparent conductive film according to claim 1 , whereinat least the part of the metal wiring portion has a difference of less than 3% between the specular reflectances of a front surface and a back surface.4. The transparent conductive film according to claim 1 , whereinat least the part of the metal wiring portion has a mesh pattern containing the thin metal wire.5. The transparent conductive film according to claim 1 , whereinthe transparent conductive film is obtained by a production method containing:an exposure step of exposing a photosensitive material having the support and a silver salt emulsion layer formed thereon; anda development step of developing the exposed silver salt emulsion layer to form a conductive pattern ...

TRANSPARENT CONDUCTIVE FILM AND METHOD FOR PRODUCING TRANSPARENT CONDUCTIVE FILM

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra2/Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more.

CIRCUIT BOARD AND ELECTRONIC DEVICE

A circuit board includes a board body, a signal conductor, a power supply conductor, and a first reference conductor. The signal conductor is in the board body and a high frequency signal is transmitted through the signal conductor. The power supply conductor is in the board body and is connected to a power supply potential. The power supply conductor extends along at least a portion of the signal conductor. The first reference conductor is in the board body and is insulated from the signal conductor and the power supply conductor.

Copper Foil, Copper Foil for High-Frequency Circuit, Carrier-Attached Copper Foil, Carrier-Attached Copper Foil for High-Frequency Circuit, Laminate, Method of Manufacturing Printed Wiring Board, and Method of Manufacturing Electronic Device

A copper foil including a roughened layer, and the roughened layer includes a primary particle layer, a surface roughness Ra of a surface on the side of the primary particle layer is 0.12 [mu]m or less, and the average particle size of primary particles of the primary particle layer is 0.10 to 0.25 [mu]m.

ELECTRONIC DEVICE AND METHODS TO CUSTOMIZE ELECTRONIC DEVICE ELECTROMAGNETIC EMISSIONS

A semiconductor device comprises a semiconductor substrate, one or more circuits disposed on the semiconductor substrate, and a modification of any one of hardware, software or firmware of the electronic device that generates emission of electromagnetic energy from the semiconductor device with desired characteristic(s), without changing a designed interface functionality of the semiconductor device. Method are also provided for modifying the semiconductor device and identifying modified semiconductor device. 1. A semiconductor device , comprising:a semiconductor substrate;one or more circuits disposed on said semiconductor substrate; anda means for modifying, without changing a designed interface functionality of said semiconductor device, characteristic(s) of an electromagnetic energy emittable from said semiconductor device.2. The semiconductor device of claim 1 , wherein said means comprises one or more trace elements within said one or more circuits claim 1 , each of said one or more trace elements with one end thereof being directly coupled to interconnect between two circuit elements within said one or more circuits and with an opposite end thereof being terminated without coupling to any one of trace(s) between circuit elements within said one or more circuits.3. The semiconductor device of claim 1 , wherein said means comprises trace elements spaced at a predetermined distance from each other along a length of at least one circuit interconnect claim 1 , each of said trace elements with one end thereof being directly coupled to said at least one interconnect and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between circuit elements within said one or more circuits.4. The semiconductor device of claim 1 , wherein said means comprises at least one interconnect between at least a pair of circuit elements in said semiconductor device claim 1 , said at least one interconnect with one or more regions of a smaller or ...

Radio frequency connection arrangement

A radio frequency transmission arrangement comprises a ground plate having an aperture comprising a slot with an elongate cross-section and substantially parallel sides, and a first and second transmission line. The thickness of the ground plate is greater than a width of the slot. The aperture is partially filled with a solid dielectric material and partially filled with air. The first transmission line comprises a first elongate conductor on a first side of the ground plate and has an end terminated with a first termination stub. The second transmission line comprises a second elongate conductor on the opposite side of the ground plate and has an end terminated with a second termination stub. The first transmission line is arranged to cross the slot at a point adjacent to the first termination stub, and the second transmission line is arranged to cross the slot at a point adjacent to the second termination stub.

SEMICONDUCTOR PACKAGES HAVING INTERCONNECTION MEMBERS

A semiconductor package may include a first substrate including a first connection portion disposed on a surface of the first substrate and a second substrate including a second connection portion disposed on a surface of the second substrate. The second substrate may be disposed over the first substrate and the second connection portion facing the first connection portion. A first connection loop portion may be provided to include an end connected to the first connection portion. A second connection loop portion may be provided to include one end connected to the second connection portion and the other end combined with the first connection loop portion.

Suspension board with circuit and producing method thereof

WIRING BOARD AND LIGHT EMITTING DEVICE USING SAME, AND MANUFACTURING METHOD FOR BOTH

A wiring board includes a base in which plate wirings formed of a metal plate are integrally formed with an insulating portion made of resin or a resin composition and surface wirings electrically connected to the plate wirings. The base has first and second surfaces on which the surface wirings are formed. The surface wirings are thinner than the plate wirings, and the minimum wiring gap between the surface wirings is smaller than the minimum wiring gap between the plate wirings. One of the plate wirings has substantially the same shape as that of a region where the first top-surface wiring on the first surface and the first bottom-surface wiring on the second surface overlap with each other in the normal direction of the first surface. The first top-surface wiring and the first bottom-surface wiring are connected to each other through the above-mentioned one of the plate wirings. 1. A wiring board comprising: a plurality of plate wirings including first and second plate wirings and formed of metal plates; and', 'an insulating portion made of resin, a resin composition, or a glass composition and integrally formed with the plurality of plate wirings so as to be substantially as thick as the plurality of plate wirings,, 'a base having a first surface and a second surface opposite to the first surface, the base includinga plurality of top-surface wirings metal-plated on the first surface so as to be thinner than the plurality of plate wirings, and including first and second top-surface wirings electrically connected to the first and second plate wirings, respectively; anda plurality of bottom-surface wirings metal-plated on the second surface so as to be thinner than the plurality of plate wirings, and including first and second bottom-surface wirings electrically connected to the first and second plate wirings, respectively,wherein a minimum wiring gap between the plurality of top-surface wirings is smaller than a minimum wiring gap between the plurality of plate ...

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of imidazole and bisepoxide compounds

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of imidazole and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.

Self-containing α amino acid and double-epoxide reaction product of copper bath of electroplating photoresist defining the characteristic of the method

Imprinted multi-layer micro-structure

An imprinted micro-structure includes a substrate having a first layer in relation thereto. First, second, and third micro-channels are imprinted in the first layer and have first, second, and third micro-wires respectively located therein. A second layer is adjacent to and in contact with the first layer. Imprinted first and second connecting micro-channels including first and second connecting micro-wires are in contact with the first and second micro-wires respectively and are isolated from the third micro-wire. A third layer is adjacent to and in contact with the second layer and has an imprinted bridge micro-channel with a bridge micro-wire contacting the first and second connecting micro-wires and separate from the third micro-wire so that the first and second micro-wires are electrically connected and electrically isolated from the third micro-wire.

ELECTRONIC PACKAGE

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of pyridyl alkylamines and bisepoxides

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of pyridyl alkylamines and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.

Printed wiring board

A printed wiring board used to suppress parasitic component is provided. The printed wiring board 100 includes a multi-layer substrate 110, and a power line 50 laid on the multi-layer substrate 110 and connected with a power terminal row T11a-T11d of a semiconductor device 10. The power line 50 includes a first wiring pattern 51 formed on a surface of the multi-layer substrate 110, a second wiring pattern 52 formed within the multi-layer substrate 110, and interlayer connections 53x and 53y electrically conducting the first wiring pattern 51 and the second wiring pattern 52 to bypass at least a portion of the power terminal row T11a-T11d.

Transparent conductive film and method for producing the same

IMPRINTED BI-LAYER MICRO-STRUCTURE METHOD WITH BI-LEVEL STAMP

A method of making an imprinted micro-wire structure includes providing a substrate having an edge area and a central area separate from the edge area and providing a first stamp and a multi-level second stamp. A curable bottom layer and multi-layer are provided on the substrate. A bottom-layer micro-channel is imprinted in the bottom layer. A multi-layer micro-channel and a top-layer micro-channel are imprinted in the multi-layer. Micro-wires are formed in each micro-channel. The bottom-layer micro-wire extends from the central area into the edge area. The multi-layer micro-wire contacts the bottom-layer micro-wire in the edge area. The top-layer micro-wire is over the central area and is separate from the multi-layer micro-wire and the bottom-layer micro-channel. The bottom-layer micro-wire is electrically connected to the multi-layer micro-wire and is electrically isolated from the top-layer micro-wire.

SUSPENSION BOARD WITH CIRCUIT AND PRODUCING METHOD THEREOF

A suspension board with circuit includes a metal supporting layer, a base insulating layer disposed at one side in a thickness direction of the metal supporting layer, a conductive pattern including a wire disposed at one side in the thickness direction of the base insulating layer and a terminal exposed from the metal supporting layer and the base insulating layer when viewed from the other side in the thickness direction, a piezoelectric element disposed at the other side in the thickness direction with respect to the terminal and including an element terminal electrically connected to the terminal, and a solder layer disposed between the terminal and the element terminal. The solder layer has a solder composition containing Sn, Ag, and Cu, and the solder layer has a thickness in the thickness direction of 50 μm or less.

Suspension board with circuit and producing method thereof

A suspension board with circuit includes a metal supporting layer, a base insulating layer disposed at one side in a thickness direction of the metal supporting layer, a conductive pattern including a wire disposed at one side in the thickness direction of the base insulating layer and a terminal exposed from the metal supporting layer and the base insulating layer when viewed from the other side in the thickness direction, a piezoelectric element disposed at the other side in the thickness direction with respect to the terminal and including an element terminal electrically connected to the terminal, and a solder layer disposed between the terminal and the element terminal. The solder layer has a solder composition containing Sn, Ag, and Cu, and the solder layer has a thickness in the thickness direction of 50 μm or less.

Methods for producing a transparent conductive film for a touch panel

A transparent conductive film comprises a transparent substrate and a metal wiring portion formed thereon. A thin metal wire contained in an electrode portion in the metal wiring portion has a surface shape satisfying the condition of Ra 2 /Sm>0.01 μm and has a metal volume content of 35% or more. Ra represents an arithmetic average roughness in micrometers and is equal to or smaller than the thickness of a metal wiring located in a position where the surface roughness is measured. Sm represents an average distance between convex portions and is 0.01 μm or more.

WIRING BOARD

A wiring board includes: an insulating layer; and a connection terminal formed on the insulating layer. The connection terminal includes a first metal layer laminated on the insulating layer, a second metal layer laminated on the first metal layer, a metal pad laminated on the second metal layer, and a surface treatment layer that covers an upper surface and a side surface of the pad and that is in contact with the upper surface of the insulating layer. An end portion of the second metal layer is in contact with the surface treatment layer, and an end portion of the first metal layer is positioned closer to a center side of the pad than the end portion of the second metal layer is to form a gap between the end portion of the first metal layer and the surface treatment layer. 1. A wiring board comprising:an insulating layer; anda connection terminal formed on an upper surface of the insulating layer, wherein a first metal layer laminated on the upper surface of the insulating', 'a second metal layer laminated on an per surface of the first metal layer,', 'a metal pad laminated on an upper surface of the second metal layer, and', 'a surface treatment layer that covers an upper surface and a side surface of the pad and that is in contact with the upper surface of the insulating layer,, 'the connection terminal includes'}an end portion of the second metal layer is in contact with the surface treatment layer, andan end portion of the first metal layer is positioned closer to a center side of the pad than the end portion of the second metal layer is to form a gap between the end Portion of the first metal layer and the surface treatment layer.2. The wiring board according to claim 1 , whereinthe second metal layer is a layer made of a same metal as the pad, andthe first metal layer is a layer made of a metal different from the second metal layer.3. The wiring board according to claim 1 , whereinthe end portion of the second metal layer extends to a same position as the ...

METHOD OF ELECTROPLATING PHOTORESIST DEFINED FEATURES FROM COPPER ELECTROPLATING BATHS CONTAINING REACTION PRODUCTS OF ALPHA AMINO ACIDS AND BISEPOXIDES

Electroplating methods enable the plating of photoresist defined features which have substantially uniform morphology. The electroplating methods include copper electroplating baths with reaction products of α-amino acids and bisepoxides to electroplate the photoresist defined features. Such features include pillars, bond pads and line space features.

Semiconductor Packages Having Interconnection Members

Method of electroplating photoresist defined features from copper electroplating baths containing reaction products of pyridyl alkylamines and bisepoxides

CHIP EMBEDDED SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

The present invention relates to a chip embedded substrate, which includes a substrate formed by alternately stacking an insulation layer and a circuit layer and an embedded chip equipped with a connection terminal and mounted inside the substrate, wherein the connection terminal is protruded from the insulation layer placed on the outermost layer of the substrate, and a connection surface to be connected to an electronic component is exposed to the outside.

DEVICE, SYSTEM AND METHOD TO PROMOTE THE INTEGRITY OF SIGNAL COMMUNICATIONS

Techniques and mechanisms for mitigating the effect of signal noise on communication via an interconnect. In an embodiment, a substrate includes an interconnect and a conductor which has a hole formed therein. Portions of the interconnect variously extend over a side of the conductor, wherein another recess portion of the interconnect extends from a plane which includes the side, and further extends at least partially into the hole. The configuration of the recess portion extending within the hole may contribute to an impedance which dampens a transmitter slew rate of the communication. In an embodiment, a total distance along a path formed by the interconnect is equal to or less than 5.5 inches. 1. A circuit device for mitigating loss of signal integrity , the circuit device comprising: [ a side region which extends in a plane; and', 'a sidewall structure which defines at least in part a hole which extends from the plane and at least partially through the conductor; and, 'a conductor comprising, 'an interconnect to communicate a signal between a first circuit and a second circuit while the conductor provides a reference potential, wherein the interconnect comprises:', 'a first portion and a second portion each disposed above the plane and offset from the side region; and', 'a recess portion, between the first portion and the second portion, which extends through the plane and into the hole, wherein any electrical connection of the interconnect to a circuit element is via a respective portion of the interconnect other than the recess portion., 'a substrate comprising2. The circuit device of claim 1 , wherein the hole extends entirely through the conductor.3. The circuit device of claim 1 , wherein the hole extends only partially toward another side region of the conductor.4. The circuit device of claim 1 , wherein the interconnect to communicate the signal comprises the interconnect to provide a single-ended communication.5. The circuit device of claim 1 , wherein ...

SYSTEMS, METHODS AND DEVICES FOR INTER-SUBSTRATE COUPLING

Inter-substrate coupling and alignment using liquid droplets can include electrical and plasmon modalities. For example, a set of droplets can be placed on a bottom substrate. A top substrate can be placed upon the droplets, which uses the droplets to align the substrates. Using the droplets in a capacitive or plasmon coupling modality, information or power can be transferred between the substrates using the droplets. 1. A system comprising:a first system comprising a first electronic circuit substrate including a first set of coupling elements;a second system comprising a second electronic circuit substrate including a second set of coupling elements; anda set of liquid droplets disposed between a first subset of the first set of coupling elements and a second subset of the second set of coupling elements, the placement of liquid droplets selecting which coupling elements are coupled together to form a configuration, the configuration defining functional connections between the first system and second system,wherein each of a subset of the set liquid droplets when disposed between a first coupling element and a second coupling element create a capacitor; andwherein properties of the first electronic circuit substrate, the second electronic circuit substrate, and the liquid droplet are selected to minimize a surface energy of the liquid droplet at a particular thickness of the liquid droplet when the liquid droplet is located between the first electronic circuit substrate and the second electronic circuit substrate such that the first electronic circuit substrate and the second electronic circuit substrate are separated by a defined distance.2. The system of claim 1 , wherein the first electronic circuit substrate further comprises a mask that covers a subset of coupling elements from the first set of coupling elements.3. The system of claim 2 , wherein the set of liquid droplets are formed by immersing the first electronic circuit substrate in liquid to form liquid ...

WIRING BOARD WITH BUILT-IN METAL BLOCK AND METHOD FOR MANUFACTURING THE SAME

A wiring board with built-in metal block includes a substrate having a cavity penetrating through the substrate, a metal block accommodated in the cavity and having first surface, second surface, and side surface connecting outer edges of the first and second surface, filling resin filling gap between inner side surface of the substrate in the cavity and the side surface of the block, a first build-up layer laminated on first surface of the substrate and including an insulating layer such that the first layer is covering the cavity and the first surface of the block, and a second build-up layer laminated on second surface of the substrate and including an insulating layer such that the second layer is covering the cavity and the second surface of the block. The side surface of the block is recessed such that the side surface of the block is forming a groove shape. 1. A wiring board with a built-in metal block , comprising:a substrate having a cavity such that the cavity is penetrating through the substrate;a metal block accommodated in the cavity of the substrate and formed such that the metal block has a first surface, a second surface on an opposite side of the first surface, and a side surface connecting an outer edge of the first surface and an outer edge of the second surface;a filling resin filling a gap formed between an inner side surface of the substrate in the cavity and the side surface of the metal block;a first build-up layer laminated on a first surface of the substrate and comprising an insulating resin layer such that the first build-up layer is covering the cavity and the first surface of the metal block in the cavity; anda second build-up layer laminated on a second surface of the substrate and comprising an insulating resin layer such that the second build-up layer is covering the cavity and the second surface of the metal block in the cavity,wherein the side surface of the metal block is recessed such that the side surface of the metal block is ...

RESILIENT MICRO LATTICE ELECTRICAL INTERCONNECTION ASSEMBLY

In an exemplary method, three dimensional printing forms a micro lattice truss structure with a first end formed in contact with a conductive area on a PCB so that the truss structure is adhered to the conductive area due to the three dimensional printing. The truss structure extends outward from the PCB and has a distal end. The truss structure is formed with resiliency so that the truss structure maintains structural integrity during end-to-end compression. The resiliency of the micro lattice truss structure enables the truss structure to return to substantially its uncompressed length when the compression is removed. The truss structure is conductive so that a resilient electrical connection can be formed between the conductive area of the PCB and another spaced apart surface parallel with the PCB when the distal end of the truss structure is in contact with and compressed by the other surface. 1. An apparatus for making a resilient electrical connection with at least one other surface comprising:a base board with at least one conductive area on an external surface of the base board;a resilient, conductive, three dimensional, micro lattice truss with a first end permanently attached to the at least one conductive area;the truss extending substantially perpendicular from the base board and having a second distal end;the apparatus being in an unengaged state when the second distal end of the truss is not in engagement with the at least one other surface and the truss is not compressed in an end-to-end direction; andthe apparatus being in an engaged state when the second distal end of the truss engages the at least one other surface and the truss is compressed in an end-to-end direction, the truss in the engaged state establishes an electrical connection between the at least one conductive area and the at least one other surface.2. The apparatus of wherein the resiliency of the truss enables the truss to return to at least 70% of its original unengaged length ...

Copper Foil, Copper Foil for High-Frequency Circuit, Carrier-Attached Copper Foil, Carrier-Attached Copper Foil for High-Frequency Circuit, Laminate, Method of Manufacturing Printed Wiring Board, and Method of Manufacturing Electronic Device

To provide a copper foil that the transmission loss is favorably controlled even when the copper foil is used in a high-frequency circuit board and that adhesion to a resin is favorable. A copper foil including a roughened layer, and the roughened layer includes a primary particle layer, a surface roughness Ra of a surface on the side of the primary particle layer is 0.12 μm or less, and the average particle size of primary particles of the primary particle layer is 0.10 to 0.25 μm.

Electrode-placed substrate

An optical modulation device includes a substrate having a principal surface, and electrodes provided on the principal surface of the substrate. The electrodes have end portion regions on the outer edge side of the principal surface of the substrate in a plan view, and planar-view corner portions provided between tip end outer edges which define the tip end shapes of the end portion regions in a first direction and side surface outer edges which define the side surface shapes of the end portion regions in the plan view have chamfered shapes.

SYSTEMS AND METHODS FOR BREADBOARD SYTLE PRINTED CIRCUIT BOARD

The present invention relates generally to electric circuit testing, building, or implementing using a breadboard style PCB. Aspects of the present invention include eliminating the need to use hookup wires when building and testing electric circuits on PCBs. In embodiments, a PCB system having rows and columns of signal tie points connected in a breadboard layout and using an embedded wire and a solder bridge to form partial connections between signal tie points. In embodiments, the embedded wire and solder bridge is capable of connecting a column of signal tie points. In embodiments, the embedded wire and solder bridge is capable of connecting a power rail to a signal tie point. Thus, a circuit can be implemented and tested by applying a small amount of solder to the solder bridge without the need for hookup wires. 1. A breadboard style printed circuit board (PCB) system , comprising:a printed circuit board having a first copper layer and a second copper layer;a plurality of signal tie points forming a plurality of columns and a plurality of rows on the second layer, wherein each signal tie point in a left portion of a row is electrically connected to each signal tie point in the left portion of the row and each signal tie point is electrically connected to each signal tie point in a right portion of the row;a plurality of signal tie points forming a plurality of columns and a plurality of rows on the second layer, wherein each signal tie point in the second layer has a corresponding signal tie point in the first layer;an electrical connection between the signal tie points in the first layer and the corresponding signal tie points in the second layer;a plurality of power rails used as power rails, arranged vertically;an embedded wire capable of connecting any two signal tie points on the first layer, wherein the connection is made once the electrical connection is completed; anda solder bridge capable of receiving solder to complete the electrical connection.2. ...

WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A wiring board of the present disclosure includes an insulating layer and a wiring conductor. The wiring conductor is buried in an insulating layer in such a manner as to have a top surface exposed to a surface of the insulating layer. The wiring conductor includes, at a portion buried in the insulating layer, a wiring level difference part or a wiring inclined part having a width larger than a width of the top surface. 1. A wiring board comprising an insulating layer and a wiring conductor ,wherein the wiring conductor is buried in the insulating layer in such a manner as to expose a top surface to a surface of the insulating layer, andwherein the wiring conductor includes, at a portion buried in the insulating layer, a wiring level difference part or a wiring inclined part having a width larger than a width of the top surface.2. The wiring board according to claim 1 , wherein the insulating layer has a multilayer structure claim 1 , and a wiring conductor buried in the insulating layer in such a manner as to have a top surface exposed to a surface of the insulating layer formed in at least an outermost layer includes claim 1 , at a portion buried in the insulating layer claim 1 , a wiring level difference part or a wiring inclined part having a width larger than a width of the top surface.3. A method for manufacturing a wiring board claim 1 , comprising:forming, on an underlying metal layer, a resist layer for plating having an opening pattern including an opening level difference part or an opening inclined part having a width being smaller toward the underlying metal layer;filling in the opening pattern, with a plated metal layer for a wiring conductor having a wiring level difference part or a wiring inclined part corresponding to the opening level difference part or the opening inclined part, and removing the resist layer for plating;forming, on the underlying metal layer and on the plated metal layer, an insulating layer burying entirely the plated metal ...

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

In a printed wiring board, when a plurality of wiring base bodies are collectively stacked, a constituent material of a first layer of an insulating resin film has a low melting point, so that the first layer is easily melted. Therefore, thermal welding on an upper surface of the wiring base body is reliably performed, and the wiring base bodies are bonded to each other with high reliability. 1. A printed wiring board comprising: an insulating resin film having a first main surface and a second main surface;', 'a conductive post embedded in the insulating resin film and the conductive post penetrating the insulating resin film from the first main surface to the second main surface; and', 'a wiring embedded in the insulating resin film, the wiring extending in a direction parallel to the second main surface, and the wiring exposed to the second main surface,, 'at least one layer of a wiring base body including'}wherein the insulating resin film has a multi-layer structure including a first layer constituting the first main surface and a second layer constituting the second main surface, andwherein a melting point of a constituent material of the first layer is lower than a melting point of a constituent material of the second layer.2. The printed wiring board according to claim 1 ,wherein the conductive post has a wiring portion exposed to the second main surface and a main body portion extending from the wiring portion to the first main surface.3. The printed wiring board according to claim 2 ,wherein the wiring portion and the main body portion of the conductive post are constituted through plating.4. A method for manufacturing a printed wiring board including at least one layer of a wiring base body including an insulating resin film having a first main surface and a second main surface; a conductive post embedded in the insulating resin film and the conductive post penetrating the insulating resin film from the first main surface to the second main surface; and a ...

Pressure sensor

A pressure sensor includes a conductive substrate, a ring-shaped spacer, an inner spacer and a sensing circuit substrate. The conductive substrate includes a conductive-substrate body and a conductive layer. The conductive layer is disposed on the conductive-substrate body. The ring-shaped spacer and the inner spacer are disposed on the conductive-substrate body. The sensing-circuit substrate, disposed on the ring-shaped spacer and the inner spacer, includes a circuit-substrate body, a first sensing circuit and a second sensing circuit. The first sensing circuit and the second sensing circuit are disposed on opposing sides of the circuit-substrate body, and a priority of first finger circuits of the first sensing circuit and a priority of second finger circuits of the second sensing circuit are interlaced. The first sensing circuit and the second sensing circuit are densely arranged at the center of the conductive layer and less densely arranged on both sides of the conductive layer.

Printed wiring board

A printed wiring board includes resin insulating layers, and conductor layers including a conductor layer such that the conductor layer includes a conductor circuit and that the conductor circuit has a surface index X/Y in a range of 1.00 to 2.20 where X is a length of an outer circumference of cross section of the conductor circuit, and Y is a length of an outer circumference of a reference quadrangle in the cross section of the conductor circuit. The reference quadrangle has a first reference line drawn with reference to bottom of deepest recess on first side, a second reference line is drawn with reference to bottom of deepest recess on second side, a third reference line is drawn with reference to bottom of deepest recess on third side, and a fourth reference line is drawn with reference to bottom of deepest recess on fourth side of the outer circumference.

Printed circuit board with circuit pattern including bottlenect section

본 발명은 병목 구간을 포함하는 회로 패턴을 구비한 인쇄 회로 기판에 관한 것으로서, 보다 구체적으로 복수의 부품을 전기적으로 연결하는 회로 패턴의 일부분의 폭 넓이를 전압, 전류, 온도 및 회로 패턴의 두께 중 어느 하나 이상을 기반으로 조절하여 하나 이상의 병목 구간을 형성하고, 회로 패턴에 과전류가 인가되는 경우 하나 이상의 병목 구간이 자체 파괴되어 과전류를 차단함으로써, 별도의 퓨즈 패턴이 필요하지 않는 병목 구간을 포함하는 회로 패턴을 구비한 인쇄 회로 기판에 관한 것이다. The present invention relates to a printed circuit board having a circuit pattern including a bottleneck section. More specifically, the width of a portion of a circuit pattern for electrically connecting a plurality of components is determined by determining the width of a portion of the circuit pattern among voltage, current, temperature, and thickness of the circuit pattern. One or more bottleneck sections are formed by adjusting based on any one or more, and when an overcurrent is applied to a circuit pattern, one or more bottleneck sections are self-destructed to block the overcurrent, including a bottleneck section that does not require a separate fuse pattern It relates to a printed circuit board having a circuit pattern.

Printed circuit board and manufacturing method thereof

본 발명은 절연층의 일면으로 상면이 노출되도록 상기 절연층 내에 매립된 제 1 회로패턴; 상기 제 1 회로패턴의 하면과 접하도록 상기 절연층 내에 매립된 결합 패드; 및 상기 절연층의 일면 상에 돌출되도록 상기 제 1 회로패턴의 상면 상에 형성된 범프 패드;를 포함하는 인쇄회로기판에 관한 것이다.

Printed circuit board

一種根據一實施例的印刷電路板包括：一絕緣層；以及一電路圖案，其安置於該絕緣層上，其中該電路圖案包括一上表面、一下表面、一第一側表面及一第二側表面，且該電路圖案之該些表面中至少三個表面之表面粗糙度Ra為0.1μm至0.31μm。

Printed circuit board

A printed circuit board according to an embodiment includes: an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes an upper surface, a lower surface, a first side surface, and a second side surface, and surface roughness Ra of at least three surfaces of the upper surface, the lower surface, the first side surface, and the second side surface of the circuit pattern is 0.1 µm to 0.31 µm.

Transparent conductive film and method for producing transparent conductive film

本发明涉及透明导电膜和透明导电膜的制造方法。透明导电膜为具有透明基体(12)以及在该透明基体(12)上形成的金属布线部(14)的透明导电膜(10)，其中，构成金属布线部(14)的电极部(18)的金属细线(24)具有满足Ra 2 /Sm＞0.01μm的表面形状，并且金属体积率为35％以上。另外，Ra表示算术平均粗糙度，为表面粗糙度测量位置的金属布线的厚度以下，单位为μm。Sm为凹凸的平均间隔，为0.01μm以上。

Coil substrate

본 발명의 코일기판은 기판의 상부 및 하부에 주기적으로 배치되고 서로 간에 중첩되는 제1 컨덕터층 및 제2 컨덕터층을 포함할 수 있다. 제1 및 제2 컨덕터층 각각은 다수의 세그먼트를 포함할 수 있다. 코일기판은 제1 컨덕터층의 제1 및 제2 세그먼트 사이를 연결시키는 제1 연결라인과, 제2 컨덕터층의 제1 및 제2 세그먼트 사이를 연결시키는 제2 연결라인을 더 포함할 수 있다. 제1 및 제2 연결라인 각각은 적어도 기판의 일 면 상에 노출되어 배치되는 영역을 포함할 수 있다. The coil substrate of the present invention may include a first conductor layer and a second conductor layer that are periodically disposed at the top and bottom of the substrate and overlap each other. Each of the first and second conductor layers may comprise a plurality of segments. The coil substrate may further include a first connection line connecting between the first and second segments of the first conductor layer and a second connection line connecting between the first and second segments of the second conductor layer. Each of the first and second connection lines may include an area exposed at least on one side of the substrate.

Out-of-mold electronic film and manufacturing method thereof

本发明属于电子贴膜领域，具体涉及一种模外电子贴膜及其制作方法，包括顺序设置的装饰贴膜、印刷油墨层和电子线路层，其特征在于：所述的电子线路层连接电子零件，塑胶件固定于电子线路层底部，塑胶件设置能容纳电子零件的凹槽。在高压成型机内，加温使装饰贴膜、电子线路层和印刷油墨层软化，施加压力并配合定位系统，使装饰贴膜、电子线路层和印刷油墨层呈弯曲状、倒勾状或具有锐角，并粘贴于塑胶件表面，电子零件则进入塑胶件的凹槽。本发明有益效果是：在模外形成具有电子功能的装饰贴膜，多个电子零件可同时在一张贴膜包覆，在特别弯曲、具有锐角或倒勾的塑胶件上均可实现装饰电子的功能，应用广泛。

PRINTED CIRCUIT BOARD and CIRCUIT WIRING

본 발명의 일 실시예에 따른 인쇄회로기판은, 제1 절연층 및 제1 절연층에 형성된 제1 회로패턴을 구비한 제1 기판부과, 제2 절연층 및 제2 절연층에 형성된 제2 회로패턴을 구비하며 제1 기판부에 연결되는 제2 기판부를 포함하고, 제1 회로패턴에는 돌출된 삽입부가 형성되고 제2 회로패턴에는 삽입부가 수용되는 수용부가 형성된다. A printed circuit board according to an embodiment of the present invention includes a first substrate unit having a first insulating layer and a first circuit pattern formed on the first insulating layer, and a second circuit formed on the second insulating layer and the second insulating layer. It includes a second substrate portion having a pattern and connected to the first substrate portion, the first circuit pattern is formed with a protruding insertion portion, and the second circuit pattern is formed with a receiving portion in which the insertion portion is accommodated.

Circuit board, preparation method thereof and backlight plate

一种电路板的制备方法，包括：提供电路基板，所述电路基板包括基层和形成于所述基层相对两表面的第一线路层和第二线路层，所述第一线路层包括第一连接垫，所述第二线路层包括对应所述第一连接垫的第二连接垫，所述电路基板中设有连接所述第一连接垫和所述第二连接垫的导热柱；在所述第一线路层上覆盖保护膜，使得所述第一连接垫暴露于所述保护膜；以及至少在所述第二连接垫上覆盖散热膜，所述散热膜包括导热胶层和散热层，所述导热胶层位于所述第二连接垫和所述散热层之间，所述散热层包括导热颗粒和包覆于所述导热颗粒外表面的导热涂料。本申请还提供一种电路板和一种背光板。

Ceramic substrate processing method, processing jig, ceramic substrate and probe card

本发明专利公开了一种陶瓷基板加工方法、加工治具、陶瓷基板及探针卡，陶瓷基板加工方法包括：向陶瓷基板发射激光，激光使陶瓷基板形成用于组装探针的导引孔；调节陶瓷基板相对于激光的位置，使陶瓷基板倾斜于激光；激光的边缘和导引孔的待加工边重合；调节陶瓷基板相对于激光的位置，使陶瓷基板垂直于激光；形成的导引孔和激光同轴设置，且导引孔沿其轴向的任一位置的口径均相等；在陶瓷基板对应于导引孔的一端面设有至少一输电线路，用于连接处于同一网络的多个探针所对应的导引孔，以使位于导引孔内的探针之间电性连接。如此能够有效地确保形成的孔的口径在沿其轴向延伸过程中保持一致，便于探针能够均匀地装入孔的内部。

Ceramic substrate processing method, processing jig, ceramic substrate and probe card

本发明专利公开了一种陶瓷基板加工方法、加工治具、陶瓷基板及探针卡，陶瓷基板加工方法包括：向陶瓷基板发射激光，激光使陶瓷基板形成用于组装探针的导引孔；调节陶瓷基板相对于激光的位置，使陶瓷基板倾斜于激光；激光的边缘和导引孔的待加工边重合；调节陶瓷基板相对于激光的位置，使陶瓷基板垂直于激光；形成的导引孔和激光同轴设置，且导引孔沿其轴向的任一位置的口径均相等；在陶瓷基板对应于导引孔的一端面设有至少一输电线路，用于连接处于同一网络的多个探针所对应的导引孔，以使位于导引孔内的探针之间电性连接。如此能够有效地确保形成的孔的口径在沿其轴向延伸过程中保持一致，便于探针能够均匀地装入孔的内部。

Connecting member for electronic device, and electronic device comprising same

A connecting member for electrically connecting a circuit board and a component in an electronic device is provided. The connecting member includes at least one bending part configured to comprise elasticity, a pad part connected to the bending part and configured to be attached to one surface of the circuit board, and a fixing part extending from the pad part and configured to fix the connecting member to the circuit board.

Transparent metal mesh and method of manufacture

Embodiments of the present disclosure include a metal mesh structure and a method of fabrication thereof. The metal mesh structure includes a metal mesh formed on a substrate. The metal mesh is a 2D or 3D pattern of lines. The lines in the first and second set are characterized by a linewidth that is less than 2 microns. Such metal mesh structures are fabricated through rolling mask lithography. This abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Circuit board, and electronic device

This circuit board is provided with a board main body, a signal conductor, a power supply conductor, and a first reference conductor. The signal conductor is provided on the board main body, and a high frequency signal is transmitted therethrough. The power supply conductor is provided on the board main body, is connected to a power supply potential, and follows at least a partial segment of the signal conductor. The first reference conductor is provided on the board main body, and is insulated from the signal conductor and the power supply conductor.

Printed circuit board

실시예에 따른 인쇄회로기판은, 절연층; 및 상기 절연층 상에 배치되는 회로패턴을 포함하고, 상기 회로패턴은 상부면, 하부면, 제 1 측면 및 제 2 측면을 포함하고, 상기 회로패턴의 상부면, 하부면, 제 1 측면 및 제 2 측면 중 적어도 3개의 면의 표면 조도(Ra)는 0.1㎛ 내지 0.31㎛이다.

Rigid-flex board, circuit board, electronic equipment and method for preparing rigid-flex board

本申请实施例公开了软硬结合板、电路板、电子设备及软硬结合板的制备方法，其中制备方法包括提供预制电路基板，去除所述第一部分；去除所述硬板区域的所述M层所述硬板走线层；及去除所述软板区域的所述第一至第N硬板走线层。本申请实施例的软硬结合板的制备方法通过去除导电件的第一部分后再去除M层硬板走线层，当导电件的第一部分去除后M层硬板走线层之间就不再经第一部分连接，能够使M层硬板走线层顺利的揭下，从而提高软硬结合板的生产良率。

Electronic component, method for manufacturing electronic component, electronic device, and moving object

一种抗干扰装置

本发明属于传感器技术领域，特别涉及一种抗干扰装置。本发明包括至少两组彼此相邻且并行排布的信号收发装置，相邻的所述信号收发装置之间设置有至少一个抗干扰层，所述抗干扰层用于削弱此两相邻的信号收发装置之间的电磁感应，所述抗干扰层设置在PCB板的中间层面上，相邻两个的信号收发装置分别设置于距离PCB板的中间层面的距离相等的两侧层面上；抗干扰层在PCB板所处平面上的投影形成封闭的圆环或形成间隙尽可能小的沿圆周方向均匀排布的格状条，这两种分布均能够有效地防止抗干扰层两侧的信号收发装置之间的电磁干扰，大大降低了电感式传感器内部干扰，能够被广泛地应用在传感器领域中，且本发明的结构简单、成本低廉、适合批量生产。

印刷电路板

根据实施例的印刷电路板包括：绝缘层；以及设置在绝缘层上的电路图案，其中，电路图案包括上表面、下表面、第一侧表面和第二侧表面，并且电路图案的上表面、下表面、第一侧表面和第二侧表面中的至少三个表面的表面粗糙度(Ra)为0.1μm至0.31μm。

一种用于车灯除雾的柔性线路板及其制作工艺

本发明公开了一种用于车灯除雾的柔性线路板及其制作工艺，涉及汽车配件技术领域。本发明包括基板，基板由第一PET板和CU组成，基板的上端压合有干膜,干膜依次进行曝光、显影和蚀刻退膜形成有线路图形，线路图形由导线网络和两个母线组成，两个母线位于导线网络的两侧，导线网络和母线电性连接,干膜的上端通过真空压机压合有覆盖膜，覆盖膜由UV固化透明胶和第二PET板组成，第二PET板位于UV固化透明胶的上端，干膜和第二PET板通过UV固化透明胶胶合连接。本发明通过各个配件的配合能够较好的对汽车前、后灯进行除雾，产品轻薄，运用广，制作流程简单，成本低，易导入批量生产，大大的节约生产成本。

Pcb等边三角形的制作方法

本发明涉及一种PCB等边三角形的制作方法，包括如下步骤：开料与烘烤：将PCB裁切成一定的尺寸，并放于烘箱中烘烤；钻孔：利用钻孔机在PCB上钻出多个定位孔；图形设计：根据设计标准，利用软件画出等边三角形和等腰梯形，并形成新的设计图形，线路曝光：依设计资料抓取机械定位孔定位，利用光化学反应将设计图形转移到PCB板上，通过干膜中未曝光成分与弱碱发生反应而溶解出设计影像资料图形；图形蚀刻：将裸露的铜面与蚀刻溶液接触，通过溶解腐蚀铜的效应，形成所需的等边三角形镂空成型的效果。利用本发明设计的图形蚀刻出成品图形更接近等边三角形，其尖角具有外形，满足设计外观的要求。

Pcb等边三角形的制作方法

本发明涉及一种PCB等边三角形的制作方法，包括如下步骤：开料与烘烤：将PCB裁切成一定的尺寸，并放于烘箱中烘烤；钻孔：利用钻孔机在PCB上钻出多个定位孔；图形设计：根据设计标准，利用软件画出等边三角形和等腰梯形，并形成新的设计图形，线路曝光：依设计资料抓取机械定位孔定位，利用光化学反应将设计图形转移到PCB板上，通过干膜中未曝光成分与弱碱发生反应而溶解出设计影像资料图形；图形蚀刻：将裸露的铜面与蚀刻溶液接触，通过溶解腐蚀铜的效应，形成所需的等边三角形镂空成型的效果。利用本发明设计的图形蚀刻出成品图形更接近等边三角形，其尖角具有外形，满足设计外观的要求。

三维电路板及其制备方法

本发明提供一种三维电路板，包括第二线路板、第二绝缘层、第一线路板、第一绝缘层和导电层。所述第二绝缘层、所述第一线路板和所述第一绝缘层依次堆叠设置在所述第二线路板的一侧。所述第一线路板开设有第一通孔，所述第一绝缘层填充于所述第一通孔中并与所述第二绝缘层相连接。所述第一绝缘层对应所述第一通孔处开设有凹槽，所述凹槽延伸至所述第二绝缘层。所述导电层包括第一线路图案，所述第一线路图案嵌设于所述第一绝缘层和所述第二绝缘层至少一者中并从所述凹槽露出。本发明还提供一种三维电路板的制备方法。

一种电路板及能源传输设备

本申请提供了一种电路板及能源传输设备，电路板包括基板，设置在基板上的布线层，布线层设置有电路、第一焊盘及第二焊盘。上述的第一焊盘及第二焊盘用于与电容的两个PIN脚一一对应连接。在与电路连接时，第一焊盘和第二焊盘中，至少一个焊盘通过导线与电路电连接，且所述导线作为保护电路的保险丝。在上述技术方案中，不采用与电容连接的焊盘直接与电路连接的方式，而是采用通过导线将电路与焊盘连接，并且该导线可在电容被击穿时熔断，起到保险丝的作用，降低了电容在击穿时影响到整个电路的风险，提高了整个电路板的安全性，还提高了使用电路板的设备的安全性。

구리박, 고주파 회로용 구리박, 캐리어 부착 구리박, 고주파 회로용 캐리어 부착 구리박, 적층체, 프린트 배선판의 제조 방법 및 전자기기의 제조 방법

고주파 회로 기판에 이용해도 전송 손실이 양호하게 억제되고, 또한 수지와의 밀착성이 양호한 구리박을 제공한다. 조화 처리층을 가지는 구리박으로서, 조화 처리층이 1차 입자층을 가지고, 1차 입자층측 표면의 표면 조도(Ra)가 0.12㎛ 이하이며, 1차 입자층의 1차 입자 평균 입경이 0.10~0.25㎛인 구리박.

Wiring circuit board, producing method thereof, and wiring circuit board assembly sheet

A method for producing a wiring circuit board includes a first step of preparing a wiring circuit board assembly sheet including a support sheet, a plurality of wiring circuit boards supported by the support sheet, and a joint connecting the support sheet to the plurality of wiring circuit boards, having flat-shaped one surface and the other surface facing one surface at spaced intervals thereto in a thickness direction, and having a thin portion in which the other surface is recessed toward one surface and a second step of forming a burr portion protruding toward the other side in the thickness direction and cutting the thin portion.

回路基板及び電子機器

配線回路基板、その製造方法および配線回路基板集合体シート

透明电路板的制作方法以及透明电路板

一种透明电路板的制作方法，包括以下步骤：提供一线路基板，所述线路基板包括依次叠设的透明基底层、黑化层以及底铜层；压合一干膜于所述底铜层背离所述基底层的表面；图案化处理所述干膜，以露出部分所述底铜层；在露出的部分所述底铜层的表面形成石墨烯层；去除所述干膜；以及去除所述石墨烯层覆盖之外的所述底铜层以形成线路层，从而得到所述透明电路板。本申请还提供一种上述透明电路板的制作方法制作的透明电路板。

アルファアミノ酸とビスエポキシドとの反応生成物を含有する電気銅めっき浴からフォトレジスト画定フィーチャを電気めっきする方法

【課題】実質的に均一なピラーを形成できる銅めっき浴の提供。 【解決手段】α−アミノ酸と下式で表わされるビスエポキシドとの反応生成物を電気銅めっき浴に添加した、アルファアミノ酸とビスエポキシドとの反応生成物を含有する電気銅めっき浴からフォトレジスト画定フィーチャを電気めっきする方法。ビスエポキシドは下式が望ましい。 （Ｒ１及びＲ２は、水素又はＣ１−４アルキル；Ａ＝Ｏ（（ＣＲ３Ｒ４）ｍＯ）ｎ又は（ＣＨ２）ｙ；Ｒ３及びＲ４は各々独立にＨ、メチル又はヒドロキシル；ｍ＝１−６の整数；ｎ＝１−２０の整数ｙ＝０−６の整数；ｙ＝０であるとき、Ａは、化学結合である） 【選択図】なし

电路板及其制备方法、背光板

一种电路板的制备方法，包括：提供电路基板，所述电路基板包括基层和形成于所述基层相对两表面的第一线路层和第二线路层，所述第一线路层包括第一连接垫，所述第二线路层包括对应所述第一连接垫的第二连接垫，所述电路基板中设有连接所述第一连接垫和所述第二连接垫的导热柱；在所述第一线路层上覆盖保护膜，使得所述第一连接垫暴露于所述保护膜；以及至少在所述第二连接垫上覆盖散热膜，所述散热膜包括导热胶层和散热层，所述导热胶层位于所述第二连接垫和所述散热层之间，所述散热层包括导热颗粒和包覆于所述导热颗粒外表面的导热涂料。本申请还提供一种电路板和一种背光板。

配線基板及び配線基板の製造方法

Molding with integrated electrode pattern and method for manufacturing same

[Solution] A molding with an integrated electrode pattern includes a resin molded body; a first film 11 that is formed on an inner surface of the resin molded body and that includes an electrode pattern 13 and a first lead-out wire 63 electrically connected to the electrode pattern; and a second film 4 that is band-shaped, that stands on the inner surface of the resin molded body, and that includes a second lead-out wire 15 electrically connected to the first lead-out wire. The resin molded body includes a pair of support wall portions 3 formed integrally with the inner surface of the resin molded body so as to stand on the inner surface of the resin molded body and clamp both ends of a base part 4a of the second film.

用于电镀的导向装置和印刷电路板

本发明提出了一种用于电镀的导向装置和印刷电路板，其中，用于电镀的导向装置包括：支撑部；导向部，固定于支撑部上；摆动部，摆动部包括导向固定部与滚动部，导向固定部用于固定摆动方管，滚动部用于在摆动方管摆动过程中，沿导向部滚动，摆动方管用于安装待电镀的印刷电路板。本发明的技术方案中，通过滚动摩擦代替滑动摩擦，降低了因上、下导向块之间的摩擦力，从而减少了导向部与摆动部之间的磨损，延长了导向装置的寿命，并且能够提高装置的稳定性，降低电路板的制备成本。

用于电镀的导向装置和印刷电路板

本发明提出了一种用于电镀的导向装置和印刷电路板，其中，用于电镀的导向装置包括：支撑部；导向部，固定于支撑部上；摆动部，摆动部包括导向固定部与滚动部，导向固定部用于固定摆动方管，滚动部用于在摆动方管摆动过程中，沿导向部滚动，摆动方管用于安装待电镀的印刷电路板。本发明的技术方案中，通过滚动摩擦代替滑动摩擦，降低了因上、下导向块之间的摩擦力，从而减少了导向部与摆动部之间的磨损，延长了导向装置的寿命，并且能够提高装置的稳定性，降低电路板的制备成本。

印制线路板设计图的生成方法、印制电路板及其制作方法

本申请公开了一种印制线路板设计图的生成方法、印制电路板及其制作方法，属于印制线路板设计领域。本申请的印制线路板设计图的生成方法所生成的设计图，包括第一网络图形、第二网络图形、第一焊盘图形、第二焊盘图形、第一导线图形、第二导线图形和第一标记图形。该设计图的仿真电路根据设计图中除标记图形之外的其他图形生成。在该设计图的仿真电路中，第一焊盘图形和第二焊盘图形彼此间隔，从而使第一网络图形和第二网络图形没有连接在一起，可以避免印制线路板设计图上两个信号网络连接在一起而无法通过电路检测，从而提高电路检测的准确性。

配線電路基板、其製造方法及配線電路基板集合體片材

本發明之配線電路基板之製造方法具備：第1步驟，其係準備配線電路基板集合體片材，該配線電路基板集合體片材具備支持片材、支持於支持片材之複數個配線電路基板、及接頭，該接頭將支持片材及複數個配線電路基板連結，具有平坦狀之一面、及於厚度方向上隔開間隔與一面對向之另一面，且具有另一面朝向一面凹陷之薄壁部；及第2步驟，其係一面形成朝向厚度方向另一側突出之毛邊部，一面將薄壁部切斷。

电路板及其制备方法

本申请提供一种电路板及其制备方法。所述电路板包括基层和设置于所述基层相对的两个表面的两个第一导电线路层。每一所述第一导电线路层包括第一底层线路和第一电镀铜线路。所述第一底层线路形成于所述基层的表面，所述第一底层线路包括朝向所述基层的第一端部、与所述第一端部相对设置的第二端部以及连接所述第一端部和所述第二端部的第一侧面。所述第一电镀铜线路覆盖所述第一底层线路的所述第二端部和所述第一侧面。本申请可用于制备细线路电路板，不会污染环境且有利于节省原料成本。

一种pcb高通流电源结构及pcb通流增高工艺

本发明公开一种PCB高通流电源结构，包括PCB基板、设置于所述PCB基板表面上的电源通流导体，以及覆盖于所述电源通流导体表面上、用于提高其通流性能的增厚通流涂层。如此，本发明通过加厚电源通流导体的厚度的方式提高其通流性能，使得电源通流导体能够承载或传输更大电流，从而提高PCB电源模块性能，适应PCB大电流应用环境。相比于现有技术，本发明所提供的PCB高通流电源结构，无需增加PCB板层，也无需占用PCB表面的布线面积，因此能够在提高PCB电源模块的通流能力的基础上，降低生产成本，同时避免占用额外布线空间。本发明还公开一种PCB通流增高工艺，其有益效果如上所述。

アルファアミノ酸とビスエポキシドとの反応生成物を含有する電気銅めっき浴からフォトレジスト画定フィーチャを電気めっきする方法

配線回路基板およびその製造方法

【課題】取扱性および実装性に優れる配線回路基板およびその製造方法を提供すること。【解決手段】配線回路基板３の製造方法は、支持シート２と、支持シート２に支持される複数の配線回路基板３と、支持シート２および複数の配線回路基板３を連結し、平坦状の一方面２１、および、一方面２１と厚み方向に間隔を隔てて対向する他方面２２を有するジョイント４であって、他方面２２が一方面２１に向かって凹む第１薄肉部５を有するジョイント４とを備える配線回路基板集合体シート１を準備する第１工程、および、厚み方向他方側に向かって突出するバリ部２８を形成しながら、第１薄肉部５を切断する第２工程を備える。支持シート２は、直結部９を有する。直結部９は、脆弱部２６を有する。第２工程では、脆弱部２６を、第１薄肉部５と同時に切断する。【選択図】図５

布线电路基板及其制造方法和布线电路基板集合体片

布线电路基板的制造方法包括：第1工序，在该第1工序中，准备布线电路基板集合体片，该布线电路基板集合体片包括：支承片；多个布线电路基板，该多个布线电路基板支承于支承片；以及接合部，其将支承片和多个布线电路基板连结起来，并具有平坦状的一侧面和在厚度方向上与一侧面隔开间隔地相对的另一侧面，该接合部具有另一侧面朝向一侧面凹陷而成的薄壁部；以及第2工序，在该第2工序中，在形成朝向厚度方向另一侧突出的毛边部的同时切断薄壁部。

Wiring circuit board, producing method thereof, and wiring circuit board assembly sheet

A method for producing a wiring circuit board includes a first step of preparing a wiring circuit board assembly sheet including a support sheet, a plurality of wiring circuit boards supported by the support sheet, and a joint connecting the support sheet to the plurality of wiring circuit boards, having flat-shaped one surface and the other surface facing one surface at spaced intervals thereto in a thickness direction, and having a thin portion in which the other surface is recessed toward one surface and a second step of forming a burr portion protruding toward the other side in the thickness direction and cutting the thin portion.

配線回路基板、その製造方法および配線回路基板集合体シート

配線回路基板の製造方法は、支持シートと、支持シートに支持される複数の配線回路基板と、支持シートおよび複数の配線回路基板を連結し、平坦状の一方面、および、一方面と厚み方向に間隔を隔てて対向する他方面を有するジョイントであって、他方面が一方面に向かって凹む薄肉部を有するジョイントとを備える配線回路基板集合体シートを準備する第１工程、および、厚み方向他方側に向かって突出するバリ部を形成しながら、薄肉部を切断する第２工程を備える。

透明电路板的制作方法以及透明电路板

一种透明电路板的制作方法，包括以下步骤：提供一透明基板；在所述基板的一表面进行硬质化处理，形成硬化层；在所述硬化层远离所述基板的表面形成一氧化层，所述氧化层至少包括层叠设置的第一透明导电氧化物层、金属层以及第二透明导电氧化物层，所述金属层位于所述第一透明导电氧化物层以及所述第二透明导电氧化物层之间；蚀刻部分所述氧化层，以形成电极层；在所述电极层远离所述基板的表面形成第一导电膏以及第二导电膏；以及在所述第一导电膏以及所述第二导电膏远离所述基板的表面贴附一电子元件后光照、固化，得到所述透明电路板。本申请还提供一种所述制作方法制作的透明电路板。

回路付サスペンション基板および回路付サスペンション基板の製造方法

【課題】圧電素子の位置精度の向上を図ることができながら、圧電素子が実装される部分の厚みの低減を図ることができる回路付サスペンション基板および回路付サスペンション基板の製造方法を提供すること。【解決手段】回路付サスペンション基板１に、支持基板５と、ベース絶縁層６と、導体パターン７と、圧電素子３とを備え、導体パターン７の第１端子３０および第２端子３１と、圧電素子３の第１素子端子４０および第２素子端子４１との間に、Ｓｎ−Ａｇ−Ｃｕ系はんだ組成物を有するはんだ層４を配置し、厚み方向における、はんだ層の厚みを５０μｍ以下とする。【選択図】図４

알파 아미노산 및 비스에폭사이드의 반응 산물을 함유하는 구리 전기도금조로부터 포토레지스트 정의된 특징부의 전기도금 방법

전기도금 방법은 실질적으로 균일한 형태를 갖는 포토레지스트 정의된 특징부의 도금을 가능케 한다. 전기도금 방법에는 포토레지스트 정의된 특징부를 전기도금하기 위해 α-아미노산 및 비스에폭사이드의 반응 산물을 포함하는 구리 전기도금조가 포함된다. 이러한 특징부에는 기둥, 결합 패드 및 라인 스페이스 특징부가 포함된다.