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Применить Всего найдено 3. Отображено 3.
07-04-2023 дата публикации

Single photon avalanche detector devices and semiconductor structures and methods of forming same

Номер: CN115939249A
Автор: CHIEN HUNG-CHANG, LIN RONGYI, XU MINGJIE, HUANG GUANJIE, WANG ZIRUI, HUANG SHIMIN, WANG QUANZHONG, YANG DUNNIAN, ZHU YIXIN, CHEN XIANGLIN
Принадлежит:

In some embodiments, the present disclosure relates to a single photon avalanche detector (SPAD) device that includes a silicon substrate that includes a recess in an upper surface of the silicon substrate. A p-type region is disposed in the silicon substrate below the lower surface of the recess. An n-type avalanche region is disposed in the silicon substrate below the p-type region and intersects the p-type region at a p-n junction. A germanium region is disposed within the recess over the p-n junction. In accordance with other embodiments of the present application, semiconductor structures and methods of forming the same are also provided.

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Номер записи: 1
22-08-2023 дата публикации

Image sensor, image sensor structure and forming method thereof

Номер: CN116632016A
Автор: CHEN XIANGLIN, JIANG XINYI, HUANG-CHEN SONGWEN, LIAO YINGKAI, LIN RONGYI, ZHU YIXIN, HUANG GUANJIE
Принадлежит:

Image sensors, image sensor structures, and methods of forming the same are provided. An image sensor according to the present disclosure includes a silicon substrate, a germanium region disposed in the silicon substrate, a doped semiconductor isolation layer disposed between the silicon substrate and the germanium region, a heavily p-doped region disposed on the germanium region, a heavily n-doped region disposed on the silicon substrate, a first n-type well disposed directly below the germanium region, and a second n-type well disposed directly below the first n-type well. A second n-type well disposed directly under the heavily n-doped region; and a deep n-type well disposed under and in contact with the first n-type well and the second n-type well.

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Номер записи: 2
13-08-2021 дата публикации

Integrated circuit die, three-dimensional integrated circuit stack, and method of forming integrated circuit

Номер: CN113257796A
Автор: GAO MINFENG, YANG DUNNIAN, LIN XINGZHI, LIU RENCHENG, ZHU YIXIN, CHEN PINZI, CHEN ZHEWEI, 高敏峰, 杨敦年, 林杏芝, 刘人诚, 朱怡欣, 陈品孜, 陈哲纬
Принадлежит:

In some embodiments, the present disclosure relates to a three-dimensional integrated circuit (IC) stack including a first integrated circuit die bonded to a second integrated circuit die. The first integrated circuit die includes a first semiconductor substrate, a first interconnect structure disposed on a front side of the first semiconductor substrate, and a first bonding structure disposed over the first interconnect structure. The second integrated circuit die includes a second semiconductor substrate, a second interconnect structure disposed on a front side of the second semiconductor substrate, and a second bonding structure disposed on a back side of the second semiconductor substrate. The first engagement structure faces the second engagement structure. In addition, the three-dimensional integrated circuit stack includes a first backside contact extending from the second bonding structure to a backside of the second semiconductor substrate and thermally coupled to at least one ...

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Номер записи: 3