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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 28. Отображено 28.
26-04-2018 дата публикации

MEMORY DEVICE

Номер: KR1020180042488A
Автор: CHOI, HAE RANG, CHI, SUNG SOO, WON, HYUNG SIK
Принадлежит:

A memory device includes: a plurality of memory cells; a weak address storage unit for storing a weak address of a weak cell whose data retention time is shorter than a reference time among the plurality of memory cells; a refresh counter for generating a counting address; and an address selecting unit for selecting the counting address to be outputted as the refresh address and selecting an address outputted from the weak address storage unit for a preset period if one or more set bit values are changed among a plurality of bits of the countering address, to be outputted as the refresh address. Accordingly, the present invention can reduce operation errors and power consumption. COPYRIGHT KIPO 2018 (101) Second selection unit (120) Weak address storage unit (130) Refresh counter (141) Selection control unit (142) First selection unit (150) Refresh control unit ...

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Номер записи: 1
08-06-2018 дата публикации

전압제어발진기

Номер: KR0101864643B1
Автор: 최해랑, 김용주, 권오경, 곽강섭, 송준용, 설현천
Принадлежит: 에스케이하이닉스 주식회사, 한양대학교 산학협력단

... 본 발명의 실시예에 따른 전압제어 발진기는 순차적으로 접속된 다수의 지연 셀들을 포함한다. 각 지연 셀들은, 소오스 공유 차동 구조를 가지며, 정(+) 지연입력단과 부(-) 지연입력단과 출력단을 포함한다. 상기 정 지연입력단은 이전 (m)(여기서, m은 1)번째 셀의 출력단으로부터 출력되는 제1 신호를 입력하고, 상기 부 지연입력단은 이전 (n)(여기서, n은 1보다 큰 2 또는 3)번째 셀의 출력단으로부터 출력되는 제2 신호를 입력한다. 이와 같이 본 발명의 실시예에 따른 전압제어발진기는 전원 잡음을 줄이기 위해 추가의 회로를 사용하는 대신에, 각 지연 셀이 부지연 입력을 제공받는 트랜지스터들을 추가적으로 포함하는 형태로 구성된다. 이에 따라 전원 잡음에 의해 발생하는 지터를 줄일 수 있고, 또한 소비 전력을 줄일 수 있다.

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Номер записи: 2
26-04-2018 дата публикации

MEMORY DEVICE AND METHOD FOR OPERATING MEMORY DEVICE

Номер: KR1020180042489A
Автор: CHOI, HAE RANG
Принадлежит:

A memory device may include a plurality of word lines; a plurality of bit lines; a plurality of memory cells connected to corresponding word lines and bit lines among the plurality of word lines and the plurality of bit lines; and a control part for controlling the two or more word lines among the plurality of word lines to be active together and for determining the presence or absence of a weak cell using the voltage of the bit line corresponding to the activated word lines. It is possible to reduce test time required to detect the weak cell. COPYRIGHT KIPO 2018 (120) Mode setting part (130) Refresh control part (140) Refresh counter (150) Control part (160) Low control part (170) Column control part (180) Pipe latch part (AA) D1,D2, or D3 ...

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Номер записи: 3
08-06-2018 дата публикации

MEMORY DEVICE

Номер: KR1020180061445A
Автор: CHOI, HAE RANG, CHI, SUNG SOO, LEE, DONG JAE
Принадлежит:

The present invention provides a memory device which can effectively manage a weak cell while increasing a refresh cycle by correcting an error of data of the weak cell by using an error correction code (ECC) circuit. The memory device comprises: multiple memory cells; a weak cell information storage part storing a weak address of at least one weak cell having a shorter data retention time than a reference time among the multiple memory cells and parity information corresponding to the at least one weak cell; the ECC circuit detecting and correcting an error bit of the at least one weak cell by using the parity information; and a refresh control part controlling the multiple memory cells to be refreshed in a cycle longer than the reference time. COPYRIGHT KIPO 2018 (220) Weak cell information storage part (230) ECC circuit (241) First selection part (242) Second selection part (250) Refresh control part (260) Refresh counter ...

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Номер записи: 4
30-11-2017 дата публикации

다수 판정 회로

Номер: KR0101803465B1
Автор: 최해랑, 김용주, 권오경, 곽강섭, 송준용, 설현천
Принадлежит: 에스케이하이닉스 주식회사, 한양대학교 산학협력단

... 본 발명의 다수 판정 회로는 제1데이터와 제2데이터를 비교하여 제1논리값인 비트의 개수가 많은 데이터를 판정하는 다수 판정부; 및 상기 제1데이터 중 상기 제1논리값인 비트의 개수와 상기 제2데이터 중 상기 제1논리값인 비트의 개수가 동일한 경우, 오프셋이 제1설정값이면 상기 다수 판정부가 상기 제1데이터를 상기 제1논리값인 비트의 개수가 많다고 판정하도록 하고, 상기 오프셋이 제2설정값이면 상기 다수 판정부가 상기 제2데이터를 상기 제1논리값인 비트의 개수가 많다고 판정하도록 하는 오프셋 인가부를 포함하고, 상기 오프셋은 제1페이즈에서는 상기 제1설정값이고, 제2페이즈에서는 상기 제2설정값이다.

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Номер записи: 5
01-12-2016 дата публикации

SMART ELECTRONIC BOARD CHANGEABLE FROM TRANSPARENT TO OPAQUE

Номер: KR101681581B1
Автор: CHOE, HAE RANG
Принадлежит: DIPSONE EDU INC.

The present invention relates to a smart electronic board changeable from transparent to opaque, enabling a user to selectively use the electric board as an imaging device for the viewing or a black board by selectively realizing in a transparent state or an opaque state. According to the present invention, the smart electric board includes a frame, an imaging device, a variable panel part, a window film, a poly(methyl methacrylate) (PMMA) sheet, a light guide plate, and a control unit. The frame has a plurality of sensors to detect a location of a writing unit. The imaging device is installed at an inner rear portion of the frame and includes a flat display panel to output an image. The variable panel part includes a polymer dispersed liquid crystal (PDLC) layer including the PDLC to transmit or scatters light, an indium tin oxide (ITO) layer interposed between a front surface and a rear surface of the PDLC layer, and coated with Indium-zinc oxide. The PMMA sheet is coupled to a substrate ...

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Номер записи: 6
13-05-2015 дата публикации

SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SAME

Номер: KR1020150051471A
Автор: KIM, YONG JU, KWON, DAE HAN, CHOI, HAE RANG, JANG, JAE MIN
Принадлежит:

The present invention relates to a semiconductor device generating and using a periodical signal, and to a driving method thereof. Provided is a semiconductor device which includes a periodical signal generation circuit generating a periodical signal having a predetermined regardless of temperature corresponding to a first trimming signal as a default, and generating the periodical signal having the unit period adjusted upon the temperature corresponding to a second trimming signal; and an internal circuit performing predetermined operation corresponding to the periodical signal. COPYRIGHT KIPO 2015 (110) Internal circuit (120) Periodical signal generation circuit (130) First trimming circuit (140) Second trimming circuit (150) Third trimming circuit ...

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Номер записи: 7
27-04-2018 дата публикации

DATA SENSE AMPLIFIER CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE

Номер: KR1020180042881A
Автор: CHOI, HAE RANG
Принадлежит:

The present invention relates to a semiconductor memory device with a ground bit line precharge scheme. The present invention includes: a first memory cell which is connected with a first bit line; a second memory cell which is connected with a second bit line; and a sense amplification circuit which senses and amplifies a voltage difference between the first bit line and the second bit line. The sense amplification circuit includes: an N type sense amplifier which is formed with a pair of cross-coupled first and second NMOS transistors respectively connected with the first and second bit lines; a P type sense amplifier which is formed with a pair of cross-coupled first and second PMOS transistors respectively connected with the first and second bit lines; and an offset providing unit which controls a timing for providing the voltage of the first bit line for the first NMOS transistor and a timing for providing the voltage of the second bit line for the second NMOS transistor depending ...

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Номер записи: 8
22-09-2016 дата публикации

CLOCK GENERATION CIRCUIT

Номер: KR1020160110604A
Автор: CHOI, HAE RANG, KIM, YONG JU, KWON, DAE HAN, KANG, SHIN DEOK
Принадлежит:

A clock generation circuit may include a clock generation part which generates a first inversion clock by inversing a first clock, and generates a second inversion clock by inversing a second clock of which phase is different from that of the first clock; and a reset control part which compares the phase of the first clock with the phase of the second clock and controls the clock generation part to inactivate the second clock and the second inversion clock during a preset range and to reactivate the second clock and the second inversion clock when the phase of the second clock precedes the phase of the first clock. So, the phases of the clocks can be corrected when the phases are changed due to noise. COPYRIGHT KIPO 2016 (310) Clock generation part (320) Reset control part ...

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Номер записи: 9
22-05-2017 дата публикации

듀티 싸이클 검출 회로

Номер: KR0101737069B1
Автор: 장재민, 김용주, 최해랑
Принадлежит: 에스케이하이닉스 주식회사

... 듀티 싸이클 검출 회로는 스트로브 신호에 응답하여 제 1 클럭 신호와 제 2 클럭 신호의 듀티 차이에 따라 제 1 출력 신호 및 제 2 출력 신호를 생성하도록 구성된 코어 블록, 및 코어 블록의 출력 신호에 응답하여 생성한 예비 스트로브 신호의 활성화 타이밍을 제 1 클럭 신호 또는 상기 제 2 클럭 신호에 따라 보정하여 상기 스트로브 신호로서 생성하도록 구성된 제어 블록을 포함한다.

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Номер записи: 10
10-08-2016 дата публикации

DUTY CYCLE DETECTION CIRCUIT AND DUTY CYCLE CORRECTION CIRCUIT INCLUDING SAME

Номер: KR1020160094685A
Автор: CHOI, HAE RANG, KWON, DAE HAN, KIM, YONG JU
Принадлежит:

A duty cycle detection circuit may include an initialization part which initializes a first node and a second node in response to an initialization signal; a first charging/discharging part which charges a first node while a positive clock is a first level, and discharges the first node while the positive clock is a second level; a second charging/discharging part which charges a second node while the positive clock is a second level, and discharges the second node while the positive clock is a second level; and a differential amplifier which amplifies a voltage difference between the first node and the second node in response to an amplification signal, thereby generating a detection signal. So, the duty cycle detection circuit can be accurately and quickly operated. COPYRIGHT KIPO 2016 ...

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Номер записи: 11
11-05-2018 дата публикации

ADDRESS COUNTING CIRCUIT, MEMORY DEVICE, AND OPERATION METHOD OF MEMORY DEVICE

Номер: KR1020180049314A
Автор: LEE, JAE SEUNG, CHOI, HAE RANG
Принадлежит:

An address counting circuit for effectively detecting a weak cell comprises: an address counter for counting an address in response to a counting signal; and a counting control unit for controlling the address counter so that the address skips one or more set values. COPYRIGHT KIPO 2018 (110) Address counter (120) Counting control unit ...

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Номер записи: 12
30-05-2016 дата публикации

DATA TRANSMITTING DEVICE

Номер: KR1020160060502A
Автор: KWAK, KANG SUB, RA, JONG HYUN, KWON, OH KYONG, CHOI, HAE RANG, KIM, YONG JU
Принадлежит:

According to a technology of the present invention, a data transmitting device comprises: a transmitter connected to a receiver with an end resistor through a channel, and configured to provide an output signal corresponding to an input signal to the channel and control output impedance in accordance with a bias signal; and a calibration control unit configured to compare the output signal corresponding to the input signal with a reference signal in the case of calibration operation to set the bias signal. Therefore, the data transmitting device does not require a separate replication resistor for impedance matching by preventing waste of a pad, thereby reducing the area and cost of a circuit. COPYRIGHT KIPO 2016 (111) First impedance control unit (112) Switching unit (113) Second impedance control unit (121) First selection unit (122) Second selection unit (123) First comparison unit (124) First accumulator (125) Second comparison unit (126) Second accumulator (130) Reference voltage generation ...

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Номер записи: 13
04-09-2018 дата публикации

DECOLORING BLACKBOARD CHANGING COLORS

Номер: KR101894908B1
Автор: CHOE, HAE RANG
Принадлежит: DIPSONE EDU INC.

The present invention provides a decoloring blackboard changing colors, switching to a transparent state after being used as a general blackboard to be usable with an imaging device such as a TV, a monitor, and a projector, which comprises: a frame formed in a rectangular frame shape; a panel coupled to an inner side of the frame and forming partitions therein to be partitioned into a plurality of compartments; a front aluminum sheet attached on a front of the panel and having a front side coated in white color; a heating film attached on a front side of the front aluminum sheet, being transparent, and generating heat if receiving power; a decoloring sheet attached on a front side of the heating film and having a transparent film on which cion ink is coated wherein the cion ink has a property of being decolorized to be transparent at a reference temperature or more by heat generated by the heating film after displaying a specific color; an insulation film attached on a front side of the ...

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Номер записи: 14
15-03-2018 дата публикации

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM

Номер: KR1020180027656A
Автор: WON, HYUNG SIK, CHOI, HAE RANG
Принадлежит:

A semiconductor system comprises a first semiconductor device and a second semiconductor device. The first semiconductor device outputs a command, an address and input data. The second semiconductor device repairs the address in accordance with first and second retention features in response to the command and the address to store the input data from a redundancy area and output the stored input data as output data or correct an error of the input data stored in a normal area and output the stored input data as output data. Therefore, the semiconductor system can prevent defects in output data. COPYRIGHT KIPO 2018 (10) First semiconductor device (100) Command decoder (200) Buffer circuit (300) Memory area (400) Test circuit (500) Defect address storage circuit ...

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Номер записи: 15
28-08-2015 дата публикации

CURRENT GENERATING CIRCUIT AND SEMICONDUCTOR DEVICE

Номер: KR1020150098434A
Автор: CHOI, HAE RANG
Принадлежит:

A semiconductor device includes: first and second driving devices whose threshold voltages are set differently from each other; a current generating circuit generating a reference voltage, which is a voltage level set to have a reference current and the amount of currents of the first and second driving devices identical; and an internal circuit where an output current is adjusted according to the amount of the reference current. COPYRIGHT KIPO 2015 (20) Internal circuit ...

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Номер записи: 16
15-11-2017 дата публикации

MAJORITY DECISION CIRCUIT

Номер: KR1020170125774A
Автор: CHOI HAE RANG, KIM YONG JU, KWON OH KYONG, KWAK KANG SUB, SONG JUN YONG, SEOL HYEON CHEON
Принадлежит:

A majority decision circuit according to the present invention includes: a majority decision unit which decides data with the large number of bits which are first logical values by comparing first data with second data; and an offset applying unit which makes the majority decision unit decide that the first data has the large number of bits which are the first logical values if an offset is a first set value, and makes the majority decision unit decide that the second data has the large number of bits which are the first logical values if the offset is a second set value, if the number of bits which are the first logical values among the first data is identical to the number of bits which are the first logical values among the second data. The offset is the first set value in a first phase and is the second set value in a second phase. Accordingly, the present invention can toggle an output signal or output a signal representing that the number of bits which show specific logical values ...

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Номер записи: 17
08-08-2017 дата публикации

MULTI-LAYER OPTICAL SHEET HAVING DOT PATTERN FOR ELECTRONIC PEN WRITING AND SMART ELECTRONIC BOARD

Номер: KR101766447B1
Автор: CHOE, HAE RANG
Принадлежит: DIPSONE EDU INC.

The present invention relates to a multi-layer optical sheet having a dot pattern for electronic pen writing, the multi-layer optical sheet which is formed to have a multi-layer, is attached on a front side of an image apparatus or a board, can track a trajectory of electronic pen writing, and displays the writing while recognizing the writing. The multi-layer optical sheet comprises: a pattern having a fine pattern comprising dots which are formed at intervals on intersection points of a virtual grid and have encoded location information to determine location information of an electronic pen; a diffusion film which is formed on a front side of the pattern film and blocks and diffuses a portion of light emitted by the image apparatus; a protection film which is formed on a front side of the diffusion film, is made of PET or polycarbonate, and is treated with anti-glare coating; a blocking film which is formed on a rear side of the pattern film and reflects and blocks a portion of the light ...

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Номер записи: 18
16-06-2016 дата публикации

LATCH CIRCUIT

Номер: KR1020160069232A
Автор: CHOI, HAE RANG, HWANG, MI HYUN
Принадлежит:

The purpose of the present invention is to provide a latch circuit which is strong for software error tolerance. The latch circuit comprises: a first PMOS transistor to pull up a second node in response to a voltage level of a first node; a first NMOS transistor to pull down the second node in response to the voltage level of the first node; a second PMOS transistor to pull up the first node in response to the voltage level of the second node; a second NMOS transistor to pull down the first node in response to the voltage level of the second node; a first separation element to electrically separate the first NMOS transistor from the second node when the first PMOS transistor is turned on; and a second separation element to electrically separate the second NMOS transistor from the first node when the second PMOS transistor is turned on. COPYRIGHT KIPO 2016 ...

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Номер записи: 19
03-01-2019 дата публикации

컴퓨터에서 PC 모니터를 통한 바탕화면 통합 관리용 애플리케이션을 구현하기 위하여 매체에 저장된 컴퓨터 프로그램

Номер: KR1020190000674A
Автор: 최해랑
Принадлежит:

... 본 발명은 PC의 운영체계에 따라 모니터에 표시되는 메인 바탕화면에 하나 이상의 서브 바탕화면을 표출하고 관리할 수 있도록 하는 바탕화면 통합 관리용 애플리케이션에 관한 것으로, (a) PC에 설치된 바탕화면 통합 관리용 애플리케이션이 실행되면, 바탕화면 통합 관리용 애플리케이션의 제어모듈은 PC가 네트워크에 연결되어 있는지 여부를 판단하여 하나 이상의 모니터가 연결된 독립 PC인 경우에 생성모듈에서 PC 모니터의 메인 바탕화면 위에 일정한 크기의 서브 바탕화면을 생성하는 기능; (b) 상기 바탕화면 통합 관리용 애플리케이션의 제어모듈은 메인 바탕화면과 서브 바탕화면 사이에 아이콘, 폴더 또는 파일을 가져오거나 내보내기 또는 삭제나 표시 또는 해당 아이콘, 폴더 또는 파일을 PC에 연결된 입력장치의 실행명령에 따라 PC에 설치된 관련 프로그램의 실행이 이루어지도록 관리하고 제어하는 기능; (c) 상기 서브 바탕화면의 프레임은 입력장치의 조작으로 제어모듈에 의하여 메인 바탕화면의 프레임 영역 내에서 최대화, 최소화 및 크기조절이 이루어지도록 제어하는 기능, 및 (d) 상기 서브 바탕화면의 프레임은 입력장치의 조작으로 닫기가 실행되면 제어모듈에 의하여 메인 바탕화면에서 제거됨과 더불어 서브 바탕화면에 표시되는 아이콘, 폴더 또는 파일에 관한 정보가 저장모듈에 저장된 후 생성모듈에서 메인 바탕화면으로부터 제거된 서브 바탕화면의 아이콘이 메인 바탕화면에 생성되어 표시되도록 하는 기능을 포함하여 이루어진 것으로, IT기기의 운영의 편의성 및 기능을 향상시키고, 복수의 사용자들 사이에 교육이나 회의 또는 학습 등의 편의를 제공한 이점이 있다.

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Номер записи: 20
28-09-2017 дата публикации

INTEGRATED CIRCUIT

Номер: KR1020170109140A
Автор: CHOI, HAE RANG, KWON, DAE HAN, KIM, HYUNG SOO
Принадлежит:

An integrated circuit comprises: a transmitting device which latches output data according to a first latch clock to output the generated first transmission data to a first channel, and latches the output data according to a second latch clock to output the generated second transmission data to a second channel To a transmitting apparatus; and a receiving device which latches the first transmission data according to a third latch clock to generate input data, and latches the second transmission data according to a fourth latch clock to generate the input data. The present invention provides the integrated circuit capable of preventing data transmitted through a plurality of channels from being deteriorated and distorted. COPYRIGHT KIPO 2017 (112,122,132,155,165) Latch (140,173) Internal clock generation circuit ...

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Номер записи: 21
25-06-2018 дата публикации

MEMORY DEVICE AND OPERATING METHOD THEREOF

Номер: KR1020180069177A
Автор: CHOI, HAE RANG, KIM, YOUK HEE, LEE, JAE SEUNG, JO, MI HYEON, LEE, DONG JAE, KANG, KYEONG PIL, CHI, SUNG SOO, WON, HYUNG SIK, JUNG HUN SAM, LEE, YO SEP
Принадлежит:

In a method for operating a memory device including a plurality of memory cells, the method includes the following steps: measuring a data retention time of the plurality of memory cells; storing a measurement result of the data retention time of the plurality of memory cells; and optimizing a refresh operation of the plurality of memory cells using the stored measurement result. Accordingly, the present invention reduce refresh current and power consumed in the memory device. COPYRIGHT KIPO 2018 (120) Array control unit (130) Test control unit (140) Result storage unit (150) Refresh control unit (160) Temperature measurement unit (170) Command decoder ...

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Номер записи: 22
24-08-2018 дата публикации

리셋 신호 생성장치

Номер: KR0101891165B1
Автор: 장재민, 김용주, 권대한, 최해랑
Принадлежит: 에스케이하이닉스 주식회사

... 리셋 신호 생성장치는 리셋 신호 생성부 및 리셋 신호 확장부를 포함한다. 상기 리셋 신호 생성부는 리셋 입력신호에 응답하여 리셋 신호 및 인에이블 신호를 인에이블시키고, 펄스 폭 연장신호에 응답하여 상기 리셋 신호를 디스에이블시킨다. 상기 리셋 신호 확장부는 상기 인에이블 신호에 응답하여 소정 시간 동안 인에이블되는 상기 펄스 폭 연장신호를 생성한다.

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Номер записи: 23
20-04-2018 дата публикации

집적회로 칩 및 이를 포함하는 송/수신 시스템

Номер: KR0101835637B1
Автор: 김용주, 권대한, 최해랑, 장재민
Принадлежит: 에스케이하이닉스 주식회사

... 송/수신 시스템은, 전송 칩; 수신 칩; 및 상기 전송 칩으로부터 상기 수신 칩으로 데이터를 전송하기 위한 다수의 라인을 포함하고, 상기 전송 칩은 상기 다수의 라인으로 전송될 데이터의 패턴과 상기 다수의 라인의 배열정보에 응답해, 상기 다수의 라인 상에서 발생하는 크로스 토크 방지동작을 수행한다.

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Номер записи: 24
01-12-2017 дата публикации

다수 판정 회로

Номер: KR0101803464B1
Автор: 최해랑, 김용주, 권오경, 곽강섭, 송준용, 설현천
Принадлежит: 에스케이하이닉스 주식회사, 한양대학교 산학협력단

... 본 발명의 다수 판정 회로는 제1데이터와 제2데이터를 비교하여 제1논리값인 비트의 개수가 많은 데이터를 판정하는 다수 판정부; 및 상기 제1데이터 중 상기 제1논리값인 비트의 개수와 상기 제2데이터 중 상기 제1논리값인 비트의 개수가 동일한 경우, 오프셋이 제1설정값이면 상기 다수 판정부가 상기 제1데이터를 상기 제1논리값인 비트의 개수가 많다고 판정하도록 하고, 상기 오프셋이 제2설정값이면 상기 다수 판정부가 상기 제2데이터를 상기 제1논리값인 비트의 개수가 많다고 판정하도록 하는 오프셋 인가부를 포함하고, 상기 오프셋은 제1페이즈에서는 상기 제1설정값이고, 제2페이즈에서는 상기 제2설정값이다.

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Номер записи: 25
18-09-2018 дата публикации

반도체 집적회로 및 그의 구동 방법

Номер: KR0101899084B1
Автор: 김용주, 권대한, 최해랑, 장재민
Принадлежит: 에스케이하이닉스 주식회사

... 지연고정루프를 포함하는 반도체 집적회로에 관한 것으로, 소오스 클럭을 지연고정에 필요한 제1 지연시간만큼 지연시켜 지연고정 클럭을 생성하고 지연고정이 완료된 이후에 업데이트 주기 조절신호에 응답하여 업데이트 주기가 조절되는 지연고정루프; 및 소오스 클럭과 지연고정루프로부터 제공되는 다수의 제어신호에 응답하여 지연고정루프의 루프 경로에서 발생하는 제2 지연시간에 기초한 업데이트 주기 조절신호를 생성하기 위한 업데이트 주기 조절부를 포함하는 반도체 집적회로가 제공된다.

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Номер записи: 26
03-11-2015 дата публикации

SMART BOARD CAPABLE OF BEING VARIABLE TO TRANSPARENT AND OPAQUE CONDITIONS

Номер: KR101565310B1
Автор: CHOE, HAE RANG
Принадлежит: DIPS ONE CO., LTD.

The present invention relates to a smart board capable of being variable to transparent and opaque conditions, the invention comprising: a frame fastened to an edge of an image apparatus installed in an inner portion of a board frame; a variable panel unit disposed to cover a front surface of an image apparatus by being fastened to an inner portion of the frame and capable of being variable to either a transparent or an opaque condition depending on whether power is supplied or cut; and a control unit capable of changing the variable panel unit to either a transparent or an opaque condition wherein the variable panel unit includes: a PDLC layer composed of a polymer distribution-type liquid crystal (PDLC) and capable of transmitting or scattering light; an ITO layer formed on each of a front and a rear side of the PDLC layer and coated with an indium tin oxide; a substrate layer formed on each of a front and a rear surface of the ITO layer; and a board layer fastened to the substrate formed ...

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Номер записи: 27
18-06-2020 дата публикации

DOT FILM, MULTI-LAYERS OPTIC SHEET AND SMART ELECTRIC BOARD

Номер: WO2020122436A1
Автор: CHOI, Hae Rang
Принадлежит:

The present invention provides a dot film, a multi-layers optic sheet comprising the dot film, and a smart electric board having the multi-layers optic sheet attached thereto, the dot film comprising: a base layer made of a synthetic resin; a resin layer coated with a resin mixture on the rear surface of the base layer; and a dot layer on which fine dots are formed by printing such that a printing material permeates the resin layer, wherein the dot layer has a plurality of dots formed therewith which are spaced apart from each other at crossing points of virtual grid lines, and has location information encrypted therein so as to determine location information of an electronic pen when writing with the electronic pen. According to the present invention, the optic sheet has a thinned thickness, a minimized possibility of an inflow of particles between layers in the production process, and a low reflectance and scattering rate, and thus has an excellent reactivity and recognition rate for ...

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Номер записи: 28