USE OF ANTRODIA CAMPHORATA FOR TREATING SKIN CONDITIONS

The present invention relates to the use of antrodia camphorata in the treatment of skin conditions, such as acne vulgaris, urticaria and eczema, allergic rhinitis, diabetes mellitus and its complications, cancer cachexia, hypercholesterolemia, gout in a subject in need of such treatment. The present invention is also directed to the use of antrodia camphorata in the prevention and treatment of oral cancer and arterial restenosis, in a subject in need of such prevention. The methods comprise the steps of: identifying a subject in need thereof, and administering to the subject a formulation comprising an effective amount of antrodia camphorata, whereby the symptoms in the subject are reduced or prevented. The composition can be a pharmaceutical composition or a nutraceutical composition. 1. A method for treating a skin condition in a subject , the method comprising the administering of a composition comprising an effective amount of antrodia camphorate , hereby the symptoms and signs of the skin condition are reduced.2. The method according to claim 1 , wherein said skin condition is selected from the group consisting of acne vulgaris claim 1 , eczema claim 1 , and urticaria.3. The method according to claim 1 , wherein said composition comprises about 1-8 g of dry weight of antrodia camphorata.4. The method according to claim 3 , wherein said composition comprises about 4 g of dry weight of antrodia camphorata.5. The method according to claim 1 , wherein said composition is a pharmaceutical composition.6. The method according to claim 1 , wherein said composition is a nutraceutical composition.7. The method according to claim 1 , wherein the said administering is oral administration. The present application is a divisional application of co-pending U.S. patent application Ser. No. 12/689,960, filed on Jan. 19, 2010, which is hereby incorporated by reference in its entirety.The present invention relates to methods of treating skin conditions, allergic rhinitis, ...

Semiconductor structure and method for fabricating the same

A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a substrate; forming a silicon layer on the substrate, wherein an edge region of the top surface of the substrate is exposed from the silicon layer; epitaxially growing a GaN-based semiconductor material on the silicon layer and the substrate to form a GaN-based semiconductor layer on the silicon layer and a plurality of GaN-based nodules on the edge region of the top surface of the substrate; and performing a first dry etch step to remove the GaN-based nodules, wherein performing the first dry etch step includes applying a first bias power that is equal to or higher than 1500 W.

Semiconductor devices and methods of manufacturing the same

A semiconductor device includes a base and a conductive layer to form a composite substrate. The conductive layer covers a surface of the base. The semiconductor device also includes a dielectric layer covering the conductive layer. The conductive layer is disposed between the dielectric layer and the base. The semiconductor device further includes a GaN-containing composite layer, a gate electrode disposed over the GaN-containing composite layer, a source electrode and a drain electrode disposed on the GaN-containing composite layer. The source electrode and the drain electrode are disposed at two opposite sides of the gate electrode. In addition, a method for manufacturing the semiconductor device with a composite substrate is provided.

USE OF ANTRODIA CAMPHORATA FOR TREATING DISEASES

The present invention relates to the use of in the treatment of skin conditions, such as acne vulgaris, urticaria and eczema, allergic rhinitis, diabetes mellitus and its complications, cancer cachexia, hypercholesterolemia, gout in a subject in need of such treatment. The present invention is also directed to the use of in the prevention and treatment of oral cancer and arterial restenosis, in a subject in need of such prevention. The methods comprise the steps of: identifying a subject in need thereof, and administering to the subject a formulation comprising an effective amount of , whereby the symptoms in the subject are reduced or prevented. The composition can be a pharmaceutical composition or a nutraceutical composition. 1. A method for treating oral cancer , comprising the steps of:{'i': 'Antrodia camphorata.', 'administering to a subject in need thereof a composition comprising an effective amount of'}2Antrodia camphorata.. The method according to claim 1 , wherein said composition comprises about 1 g to about 8 g of dry weight of3. The method according to claim 1 , wherein said composition is a pharmaceutical composition.4. The method according to claim 1 , wherein said composition is a nutraceutical composition.5. The method according to claim 1 , wherein the said administering is oral administration.6. The method according to claim 1 , wherein said subject is a human.7. The method according to claim 1 , wherein said subject is an animal. The present application is a continuation application of co-pending U.S. patent application Ser. No. 12/689,960, filed on Jan. 19, 2010, which is hereby incorporated by reference in its entirety.The present invention relates to methods of treating skin conditions, allergic rhinitis, diabetes mellitus and its complications, cancer cachexia, hypercholesterolemia, and the prevention of oral cancer and restenosis in an artery by a composition comprisingalso known as “niu-chang chih”, is a native fungus in Taiwan. Its spores ...

Semiconductor structure and preparation method thereof

A semiconductor structure includes a substrate, a semiconductor device in the substrate, and an isolating structure in the substrate and adjacent to the semiconductor device. The isolating structure has a roughness surface at a sidewall of the isolating structure, and the roughness surface includes carbon atoms thereon.

Semiconductor devices and methods of manufacturing the same

A semiconductor device includes and an active region and a peripheral region. The peripheral region includes a seal region. The semiconductor device includes a substrate and a seed layer one the substrate. The semiconductor device also includes a GaN-containing composite layer on the seed layer, and the GaN-containing composite layer is disposed in the active region and the peripheral region. The semiconductor device also includes a gate electrode, a source electrode and a drain electrode disposed on the GaN-containing composite layer within the active region. The source electrode and the drain electrode are disposed at two opposite sides of the gate electrode. The semiconductor device further includes a sealing structure, and the sealing structure includes a barrier structure and a seal component in the seal region. The barrier structure is disposed around the active region. The barrier structure penetrates the GaN-containing composite layer and the seed layer.

METHOD OF FABRICATING HIGH ELECTRON MOBILITY TRANSISTOR

A method of fabricating a HEMT includes the following steps. A substrate having a group III-V channel layer, a group III-V barrier layer, a group III-V gate layer, and a gate etch stop layer disposed thereon is provided. A passivation layer is formed to cover the group III-V barrier layer and the gate etch stop layer. A gate contact hole and at least one source/drain contact hole are formed in the passivation layer, where the gate contact hole exposes the gate etch stop layer, and the at least one source/drain contact hole exposes the group III-V channel layer. In addition, a conductive layer is conformally disposed on a top surface of the passivation layer and in the gate contact hole and the at least one source/drain contact hole. 1. A method of fabricating a high electron mobility transistor , comprising:providing a substrate having a group III-V channel layer, a group III-V barrier layer, a group III-V gate layer, and a gate etch stop layer disposed thereon;forming a passivation layer covering the group III-V barrier layer and the gate etch stop layer;forming a gate contact hole and at least one source/drain contact hole in the passivation layer, wherein the gate contact hole exposes the gate etch stop layer, and the at least one source/drain contact hole exposes the group III-V channel layer; andforming a conductive layer conformally disposed on a top surface of the passivation layer and in the gate contact hole and the at least one source/drain contact hole.2. The method of fabricating a high electron mobility transistor of claim 1 , wherein the group III-V gate layer is a p-type group III-V gate layer.3. The method of fabricating a high electron mobility transistor of claim 1 , wherein the composition of the gate etch stop layer comprises metal nitride claim 1 , and a metal element of the metal nitride is selected from the group consisting of refractory metals.4. The method of fabricating a high electron mobility transistor of claim 1 , wherein a composition ...

Semiconductor structure and methods of manufacturing the same

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a substrate and a seed layer on the substrate. The substrate includes a base and a composite layer encapsulating the base. The semiconductor structure also includes an epitaxial layer on the seed layer. The semiconductor structure also includes a semiconductor device on the epitaxial layer, and an interlayer dielectric layer on the epitaxial layer. The interlayer dielectric layer covers the semiconductor device. The semiconductor structure further includes a via structure that penetrates at least the composite layer of the substrate and is in contact with the base.

Methods of fabricating semiconductor structures and high electron mobility transistors

A method of fabricating a semiconductor structure includes forming a GaN-based semiconductor layer on a substrate, forming a silicon-containing insulating layer on the GaN-based semiconductor layer, forming a recess in the silicon-containing insulating layer in a first etching step, wherein the first etching step is performed by using a fluorine-containing etchant and applying a first bias power, and enlarging the recess to extend into the GaN-based semiconductor layer in a second etching step, wherein the second etching step is performed by using the same fluorine-containing etchant as the first etching step and applying a second bias power that is greater than the first bias power. In addition, a method of fabricating a high electron mobility transistor is provided.

Semiconductor device and method for forming the same

A semiconductor device is provided. The semiconductor device includes a substrate and a first III-V group compound semiconductor layer disposed on the substrate. The first III-V group compound semiconductor layer includes a fin structure having a top surface, a first sidewall, and a second sidewall opposite to the first sidewall. The semiconductor device also includes a second III-V group compound semiconductor layer disposed on the first III-V group compound semiconductor layer. The first III-V group compound semiconductor layer and the second III-V group compound semiconductor layer are made of different materials. The semiconductor device also includes a gate electrode disposed on the second III-V group compound semiconductor layer.

Methods of fabricating semiconductor structures with two-step etching

A method of fabricating a semiconductor structure includes forming a GaN-based semiconductor layer on a substrate, forming a silicon-containing insulating layer on the GaN-based semiconductor layer, forming a recess in the silicon-containing insulating layer in a first etching step, wherein the first etching step is performed by using a fluorine-containing etchant and applying a first bias power, and enlarging the recess to extend into the GaN-based semiconductor layer in a second etching step, wherein the second etching step is performed by using the same fluorine-containing etchant as the first etching step and applying a second bias power that is greater than the first bias power. In addition, a method of fabricating a high electron mobility transistor is provided.

SEMICONDUCTOR DEVICES AND METHODS FOR FORMING THE SAME

A semiconductor device includes a first composite III-V group compound semiconductor layer disposed on a composite substrate, and a second III-V group compound semiconductor layer disposed on the first composite III-V group compound semiconductor layer. The semiconductor device also includes a gate structure disposed on the second III-V group compound semiconductor layer, and a source electrode and a drain electrode disposed on the second III-V group compound semiconductor layer and at opposite sides of the gate structure. The semiconductor device further includes a field plate disposed between the gate structure and the drain electrode, and a conductive structure penetrating through the second III-V group compound semiconductor layer and the first composite III-V group compound semiconductor layer, wherein the field plate is electrically connected to the composite substrate through the conductive structure. 1. A semiconductor device , comprising:a first composite III-V group compound semiconductor layer disposed on a composite substrate;a second III-V group compound semiconductor layer disposed on the first composite III-V group compound semiconductor layer;a gate structure disposed on the second III-V group compound semiconductor layer;a source electrode and a drain electrode, disposed on the second III-V group compound semiconductor layer and at opposite sides of the gate structure;a field plate disposed between the gate structure and the drain electrode; anda conductive structure penetrating through the second III-V group compound semiconductor layer and the first composite III-V group compound semiconductor layer, wherein the field plate is electrically connected to the composite substrate through the conductive structure.2. The semiconductor device as claimed in claim 1 , wherein a bottom surface of the conductive structure is higher than a bottom surface of the composite substrate.3. The semiconductor device as claimed in claim 1 , wherein the first composite ...

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

A semiconductor structure includes a substrate, a gate electrode, a first dielectric layer, a gate metal layer, a source structure, and a drain structure. The first dielectric layer has a first opening exposing the gate electrode and a second opening, and the depth of the second opening is greater than the depth of the first opening. The gate metal layer conformally covers the top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate. A first portion of the gate metal layer at the bottom of the first opening is higher than a second portion of the gate metal layer at the bottom of the second opening. The source structure and the drain structure are disposed at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure. 1. A semiconductor structure , comprising:a substrate;a gate electrode disposed on the substrate;a first dielectric layer disposed on the substrate, wherein the first dielectric layer has a first opening exposing the gate electrode and a second opening adjacent to the first opening, and a depth of the second opening is greater than a depth of the first opening;a gate metal layer conformally covering a top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate, wherein a first portion of the gate metal layer at a bottom of the first opening is higher than a second portion of the gate metal layer at a bottom of the second opening, wherein the gate electrode and the gate metal layer form a gate structure; anda source structure and a drain structure disposed on the substrate and at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure.2. The semiconductor structure as claimed in claim 1 , wherein the source structure comprises a source contact and a source field plate claim 1 , wherein the source field ...

Semiconductor devices and methods for forming the same

A semiconductor device includes a first composite III-V group compound semiconductor layer disposed on a composite substrate, and a second III-V group compound semiconductor layer disposed on the first composite III-V group compound semiconductor layer. The semiconductor device also includes a gate structure disposed on the second III-V group compound semiconductor layer, and a source electrode and a drain electrode disposed on the second III-V group compound semiconductor layer and at opposite sides of the gate structure. The semiconductor device further includes a field plate disposed between the gate structure and the drain electrode, and a conductive structure penetrating through the second III-V group compound semiconductor layer and the first composite III-V group compound semiconductor layer, wherein the field plate is electrically connected to the composite substrate through the conductive structure.

Use of antrodia camphorata for treating gout

The present invention relates to the use of antrodia camphorata in the treatment of skin conditions, such as acne vulgaris, urticaria and eczema, allergic rhinitis, diabetes mellitus and its complications, cancer cachexia, hypercholesterolemia, gout in a subject in need of such treatment. The present invention is also directed to the use of antrodia camphorata in the prevention and treatment of oral cancer and arterial restenosis, in a subject in need of such prevention. The methods comprise the steps of: identifying a subject in need thereof, and administering to the subject a formulation comprising an effective amount of antrodia camphorata, whereby the symptoms in the subject are reduced or prevented. The composition can be a pharmaceutical composition or a nutraceutical composition.

High electron mobility transistor and fabrication method thereof

A high electron mobility transistor (HEMT) includes a group III-V channel layer, a passivation layer, a group III-V barrier layer, a gate structure, and a source/drain electrode. The passivation layer is disposed on the group III-V channel layer and includes a gate contact hole and a source/drain contact hole, and the group III-V barrier layer is disposed between the group III-V channel layer and the passivation layer. The gate structure includes group III-V gate layer, a gate etch stop layer, and a gate electrode which are stacked in sequence. The gate electrode is disposed in the gate contact hole and conformally covers a portion of the top surface of the passivation layer. The source/drain electrode is disposed in the source/drain contact hole and conformally covers another portion of the top surface of the passivation layer.

Use of Antrodia camphorata for treating diseases

The present invention relates to the use of antrodia camphorata in the treatment of skin conditions, allergic rhinitis, diabetes mellitus and its complications, cancer cachexia, hypercholesterolemia, gout in a subject in need of such treatment. The present invention is also directed to the use of antrodia camphorata in the prevention and treatment of oral cancer and arterial restenosis, in a subject in need of such prevention. The methods comprise the steps of: identifying a subject in need thereof, and administering to the subject a formulation comprising an effective amount of antrodia camphorata , whereby the symptoms in the subject are reduced or prevented. The composition can be a pharmaceutical composition or a nutraceutical composition.

Method of fabricating high electron mobility transistor

A method of fabricating a HEMT includes the following steps. A substrate having a group III-V channel layer, a group III-V barrier layer, a group III-V gate layer, and a gate etch stop layer disposed thereon is provided. A passivation layer is formed to cover the group III-V barrier layer and the gate etch stop layer. A gate contact hole and at least one source/drain contact hole are formed in the passivation layer, where the gate contact hole exposes the gate etch stop layer, and the at least one source/drain contact hole exposes the group III-V channel layer. In addition, a conductive layer is conformally disposed on a top surface of the passivation layer and in the gate contact hole and the at least one source/drain contact hole.

High-voltage semiconductor structure

A semiconductor structure includes a substrate, a semiconductor epitaxial layer, a semiconductor barrier layer, a first semiconductor device, a doped isolation region, and at least one isolation pillar. The substrate includes a core layer and a composite material layer, the semiconductor epitaxial layer is disposed on the substrate, and the semiconductor barrier layer is disposed on the semiconductor epitaxial layer. The first semiconductor device is disposed on the substrate, where the first semiconductor device includes a first semiconductor cap layer disposed on the semiconductor barrier layer. The doped isolation region is disposed at one side of the first semiconductor device. At least a portion of the isolation pillar is disposed in the doped isolation region, and the isolation pillar surrounds at least a portion of the first semiconductor device and penetrates the composite material layer.

Semiconductor device and method for forming the same

A semiconductor device is provided. The semiconductor device includes a substrate; a buffer layer on the substrate; a channel layer on the buffer layer; a barrier layer on the channel layer; a doped compound semiconductor layer on a portion of the barrier layer; an un-doped first capping layer on the doped compound semiconductor layer; a gate structure on the un-doped first capping layer; and source/drain structures on opposite sides of the gate structure. There is a channel region in the channel layer that is adjacent to the interface between the channel layer and the barrier layer.

Semiconductor device and method for forming the same

A semiconductor device is provided. The semiconductor device includes a substrate; a buffer layer on the substrate; a channel layer on the buffer layer; a barrier layer on the channel layer; a doped compound semiconductor layer on a portion of the barrier layer; an un-doped first capping layer on the doped compound semiconductor layer; a gate structure on the un-doped first capping layer; and source/drain structures on opposite sides of the gate structure. There is a channel region in the channel layer that is adjacent to the interface between the channel layer and the barrier layer.

即時トラフィック収集・分析システム及び方法

【課題】トラフィック統計方法によって、取得したトラフィック情報の伝送量を減少してフローに基づくトラフィックパケット分類マッチング方法を提供する。【解決手段】トラフィックの種類を収集する即時トラフィック収集モジュールと、トラフィックの種類を統計と分析して、ネットワークトラフィックの種類の使用状況、異常な行為等を分析して、ネットワーク管理者の参考用に供するトラフィック分析モジュールとを有する、ソフトウェアがネットワークを定義するコントロールプレーンと、パケットの各種類のテーブルヘッダに対して分類マッチングするフローに基づくトラフィックパケット分類マッチング方法とトラフィックパケット分類マッチング方法に基づいて統計するトラフィック統計方法とを含むデータプレーン、から構成される。【選択図】図２

Systems and methods for displaying

Compound extracted from antrodia Cinnamomea and pharmaceutical composition comprising the same and methods of their use in inhibiting cancer cells

引擎潤滑油路結構

本發明係有關於一種引擎潤滑油路結構，包括有相連接之曲軸箱以及汽缸體。曲軸箱包括有右曲軸箱體及左曲軸箱體，右曲軸箱體上有右內部通道，左曲軸箱體上有左內部通道，二通道間設有流道。汽缸體有第一油道凹槽、第二油道凹槽、複數油道、及汽缸體傳動件子室，第一油道凹槽連通左內部通道與複數油道，而第二油道凹槽連通複數油道與汽缸體傳動件子室。潤滑油流經由右內部通道、流道、左內部通道後，再流至第一油道凹槽並通過複數油道至第二油道凹槽，到達傳動件腔室，如此讓汽缸體靠近傳動件腔室之部份獲得適當冷卻，以平衡汽缸體膨脹量。

Semiconductor structure and method of fabricating the same

A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.

Digital video recorder, multimedia storage apparatus, and method thereof

A multimedia storage apparatus comprises a demultiplexer (101), a stream converter (103), and a memory (105). The demultiplexer (101) separates A/V data (104) and auxiliary data (106) from a first stream (102), while the stream converter (103) converts the A/V data (104) into a second stream (110). The memory (105) then stores the auxiliary data (106). A multimedia storage method comprises the following steps: separating A/V data and auxiliary data from a first stream; converting the A/V data into a second stream; and storing the auxiliary data for display.

自牛樟芝萃取之化合物及含彼之醫藥組合物及其用途

Systems and methods for displaying

Semiconductor structures and methods of forming the same

A semiconductor structure is provided. The semiconductor structure includes: a substrate; a source structure and a drain structure disposed on the substrate; a gate structure disposed on the substrate and between the source structure and the drain structure; a first field plate disposed on the substrate; a first oxide layer disposed between the substrate and the first field plate; a second field plate disposed on the first field plate, wherein the second field plate is closer to the drain structure than the first field plate; a planarized second oxide layer disposed between the first oxide layer and the second field plate; and a third field plate disposed on the second field plate, wherein the third field plate is closer to the drain structure than the second field plate.

Multimedia storage apparatus and method, and digital video recorder

Multimedia display system, multimedia display apparatus, and method thereof

引擎之二次空氣導入裝置

本發明係有關於一種引擎之二次空氣導入裝置，包括有：汽缸、汽缸頭、汽缸頭蓋、單向閥、單向閥蓋、空氣通道及引擎罩蓋。其中，汽缸具有一單向閥座；汽缸頭固設於汽缸上，且具有一排氣道；汽缸頭蓋蓋設於汽缸頭上；單向閥設置於汽缸之單向閥座上；單向閥蓋則蓋設於單向閥上，並具有一接頭；空氣通道設置於汽缸上，空氣通道並具有一與單向閥相通之第一端及一與排氣道相通之第二端；引擎罩蓋係蓋設於汽缸上，且具有一可供單向閥蓋之接頭伸出引擎罩蓋外之開口。藉此，可使引擎小型化及減少零件數，且可抑制噪音傳出。

High electron mobility transistor and fabrication method thereof

A high electron mobility transistor (HEMT) includes a semiconductor channel layer, a semiconductor barrier layer, a patterned semiconductor capping layer, and a patterned semiconductor protection layer disposed on a substrate in sequence. The HEMT further includes an interlayer dielectric layer and a gate electrode. The interlayer dielectric layer covers the patterned semiconductor capping layer and the patterned semiconductor protection layer, and includes a gate contact hole. The gate electrode is disposed in the gate contact hole and electrically coupled to the patterned semiconductor capping layer, where the patterned semiconductor protection layer is disposed between the gate electrode and the patterned semiconductor capping layer. The resistivity of the patterned semiconductor protection layer is between the resistivity of the patterned semiconductor capping layer and the resistivity of the interlayer dielectric layer.

Copolymer and method of manufacturing the same

A method of manufacturing copolymer includes mixing and reacting a polyester, an aliphatic polyol or an aliphatic polyol oligomer, and a first catalyst in a first region of a screw to form a polyester polyol, and side-feeding a lactone or a lactam to a second region of the screw to copolymerize the lactone or a lactam and the polyester polyol to form a copolymer, wherein the first region and the second region are continuous connecting regions.

Isolation structure for semiconductor device

A semiconductor structure includes a substrate, a semiconductor device in the substrate, and an isolating structure in the substrate and adjacent to the semiconductor device. The isolating structure has a roughness surface at a sidewall of the isolating structure, and the roughness surface includes carbon atoms thereon.

Method of fabricating semiconductor structure

A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.