30-05-2023 дата публикации
Номер: CN116187270A
Принадлежит:
The invention discloses a test method and device for automatically verifying identifiers in a schematic diagram, and the method comprises the steps: analyzing a text file to obtain dictionaries of all module names, dictionaries of input and output ports contained in each cell, dictionaries of all signals, module serial numbers and dictionaries of respective input and output ids, analyzing a netlist file and a wiring file, storing all module files into modledict, and carrying out the verification of the identifiers in the schematic diagram. According to the method, all cells and all ports under the cells are stored in a celldcit, after a wiring file is analyzed, paths through which all signals in the wiring file pass are stored in routedict, an analysis method is called, whether names and ports of the cells are consistent and whether the name of net is consistent with the cells through which the signals pass are verified, and therefore cell and net information can be automatically verified ...
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