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Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 36. Отображено 36.
31-07-2001 дата публикации

Semiconductor device and method of fabricating the same

Номер: US0006268249B1
Автор: Jong-Bong Ha, HA JONG-BONG
Принадлежит: Hyundai Electronics Industries Co., Ltd., HYUNDAI ELECTRONICS IND, HYUNDAI ELECTRONICS INDUSTRIES CO., LTD.

The present invention relates to a semiconductor device and a method of fabricating the same. A semiconductor device having first and second transistor regions and a field region includes a semiconductor substrate having a first type conductivity, a first trench in the substrate at the field region separating the first and second transistor regions from each other, a second trench in the substrate over the first trench, a first field oxide layer in the first trench, a second field oxide layer in the second trench over the first field oxide layer, first and second gate oxide layers on sides of the second trench, first and second gates in the second field oxide layer, and second and third impurity regions at the bottom surface of the second trench and first and fourth impurity regions outside the second trench on the substrate.

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Номер записи: 1
25-10-2001 дата публикации

Semiconductor device and method of fabricating the same

Номер: US20010033005A1
Автор: Jong-Bong Ha
Принадлежит: Hyundai Electronics Industries

The present invention relates to a semiconductor device and a method of fabricating the same. A semiconductor device having first and second transistor regions and a field region includes a semiconductor substrate having a first type conductivity, a first trench in the substrate at the field region separating the first and second transistor regions from each other, a second trench in the substrate over the first trench, a first field oxide layer in the first trench, a second field oxide layer in the second trench over the first field oxide layer, first and second gate oxide layers on sides of the second trench, first and second gates in the second field oxide layer, and second and third impurity regions at the bottom surface of the second trench and first and fourth impurity regions outside the second trench on the substrate.

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Номер записи: 2
22-06-2006 дата публикации

Tape carrier package on reel and plasma display device using the same

Номер: US20060132692A1
Автор: Bu-Kyeong Mo, Jong-Bong Ha, Seung-Hak Kim
Принадлежит:

A Tape Carrier Package (TCP) that is attachable to and detachable from a connector of a Printed circuit Board Assembly (PBA) of a plasma display apparatus that includes a plurality of electrodes, and a plasma display device including the same. The TCP includes an input portion that is attachable to and detachable from the PBA, an output portion that is attachable to and detachable from one of the plurality of electrodes of the plasma display apparatus, and at least one alignment mark, at least a portion of the alignment mark corresponding to or abutting an edge of the input portion.

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Номер записи: 3
02-02-2010 дата публикации

Tape carrier package on reel and plasma display device using the same

Номер: US0007656089B2
Автор: Bu-Kyeong Mo, Jong-Bong Ha, Seung-Hak Kim, MO BU-KYEONG, HA JONG-BONG, KIM SEUNG-HAK
Принадлежит: Samsung SDI Co., Ltd., SAMSUNG SDI CO LTD, SAMSUNG SDI CO., LTD.

A Tape Carrier Package (TCP) that is attachable to and detachable from a connector of a Printed circuit Board Assembly (PBA) of a plasma display apparatus that includes a plurality of electrodes, and a plasma display device including the same. The TCP includes an input portion that is attachable to and detachable from the PBA, an output portion that is attachable to and detachable from one of the plurality of electrodes of the plasma display apparatus, and at least one alignment mark, at least a portion of the alignment mark corresponding to or abutting an edge of the input portion.

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Номер записи: 4
04-06-2002 дата публикации

Semiconductor device and method of fabricating the same

Номер: US0006399986B2
Автор: Jong-Bong Ha, HA JONG-BONG
Принадлежит: Hyundai Electronics Industries Co., Ltd., HYUNDAI ELECTRONICS IND, HYUNDAI ELECTRONICS INDUSTRIES CO., LTD.

The present invention relates to a semiconductor device and a method of fabricating the same. A semiconductor device having first and second transistor regions and a field region includes a semiconductor substrate having a first type conductivity, a first trench in the substrate at the field region separating the first and second transistor regions from each other, a second trench in the substrate over the first trench, a first field oxide layer in the first trench, a second field oxide layer in the second trench over the first field oxide layer, first and second gate oxide layers on sides of the second trench, first and second gates in the second field oxide layer, and second and third impurity regions at the bottom surface of the second trench and first and fourth impurity regions outside the second trench on the substrate.

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Номер записи: 5
12-04-2012 дата публикации

Methods Of Manufacturing High Electron Mobility Transistors

Номер: US20120088341A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hong Ki-ha, Hwang In-jun, IM Ki-sik, KIM Dong-seok, KIM Jong-Seob, KIM Ki-Won, LEE Jung-hee, Oh Jae-joon, Shin Jai-kwang
Принадлежит:

The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer. 1. A method of manufacturing a high electron mobility transistor (HEMT) , comprising:forming a first layer including a first material on a substrate;increasing an electrical resistance of at least a part of the first layer;forming a source pattern and a drain pattern spaced apart from each other on the first layer, the source and drain patterns including a second material, a band gap of the second material greater than a band gap of the first material;forming a gate insulation layer on the first layer between the source pattern and the drain pattern;forming a gate electrode on the gate insulation layer;forming a source electrode on the source pattern; andforming a drain electrode on the drain pattern.2. The method of claim 1 , wherein the increasing of the electrical resistance of the part of the first layer includes injecting impurities into the first layer.3. The method of claim 1 , wherein the forming of the source pattern and the drain pattern includesforming a second layer including the second material on the first layer, andpatterning the second layer.4. The method of claim 1 , wherein the forming of the source pattern and the drain pattern includesforming a growth blocking layer on a channel region and a peripheral region of the first layer such that regions of the first layer corresponding to the source and drain patterns are exposed,depositing the second material onto the exposed regions of the first layer, andremoving the growth blocking layer.5. The method of claim 4 , whereinthe increasing includes injecting impurities into the first material, andthe forming a source pattern and a drain pattern includes forming the ...

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Номер записи: 6
10-05-2012 дата публикации

E-Mode High Electron Mobility Transistors And Methods Of Manufacturing The Same

Номер: US20120112202A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hong Ki-ha, Hwang In-jun, KIM Jong-Seob, Oh Jae-joon, Shin Jae-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

An Enhancement-mode (E-mode) high electron mobility transistor (HEMT) includes a channel layer with a 2-Dimensional Electron Gas (2DEG), a barrier layer inducing the 2DEG in the channel layer, source and drain electrodes on the barrier layer, a depletion layer on the barrier layer between the source and drain electrodes, and a gate electrode on the depletion layer. The barrier layer is recessed below the gate electrode and the depletion layer covers a surface of the recess and extends onto the barrier layer around the recess. 1. A High Electron Mobility Transistor (HEMT) , comprising:a channel layer including a 2-Dimensional Electron Gas (2DEG);a barrier layer configured to induce the 2DEG in the channel layer, the barrier layer including a recess region;source and drain electrodes on the barrier layer;a depletion layer on the barrier layer between the source and drain electrodes, the depletion layer covering a surface of the barrier layer in the recess region and extending onto a region of the barrier layer outside the recess region; anda gate electrode on the depletion layer in the recess region.2. The HEMT of claim 1 , wherein the barrier layer includes first and second barrier layers.3. The HEMT of claim 1 , wherein a thickness of the barrier layer in the recess region is about 5 nm to about 20 nm.4. The HEMT of claim 1 , wherein the depletion layer is at least one of a p-type semiconductor layer and a dielectric layer.5. The HEMT of claim 2 , wherein a polarization rate of the first barrier layer is different from a polarization rate of the second barrier layer.6. The HEMT of claim 1 , wherein the barrier layer is at least one of an AlN layer claim 1 , an AlGaN layer claim 1 , an AlInN layer and an AlInGaN layer.7. The HEMT of claim 1 , wherein the depletion layer is at least one of a GaN layer claim 1 , an InN layer claim 1 , an AlGaN layer claim 1 , an AlInN layer claim 1 , an InGaN layer and an AlInGaN layer.8. The HEMT of claim 7 , wherein the depletion ...

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Номер записи: 7
03-01-2013 дата публикации

HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME

Номер: US20130001587A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hong Ki-ha, Hwang In-jun, KIM Jong-Seob, Oh Jae-joon, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

High electron mobility transistors (HEMTs) including a cavity below a drain and methods of manufacturing HEMTS including removing a portion of a substrate below a drain. 1. A high electron mobility transistor (HEMT) , comprising:a substrate including a cavity;a first semiconductor layer on the substrate;a second semiconductor layer on the first semiconductor layer; anda plurality of sources, a drain, and a plurality of gates on the second semiconductor layer.2. The HEMT of claim 1 , wherein the cavity is below the drain.3. The HEMT of claim 1 , wherein a hole penetrates the first semiconductor layer and the second semiconductor layer between the cavity and the drain.4. The HEMT of claim 3 , wherein a diameter of the hole is about 10 nm to about 10 μm.5. The HEMT of claim 1 , wherein the first semiconductor layer includes a group III-V compound semiconductor.6. The HEMT of claim 5 , wherein the first semiconductor layer includes one of GaN claim 5 , GaAs claim 5 , and InN.7. The HEMT of claim 1 , wherein the second semiconductor layer includes one of AlGaN claim 1 , AlN claim 1 , AlGaAs claim 1 , and AlInN.8. The HEMT of claim 1 , further comprising:an insulation layer on the substrate in the cavity.9. The HEMT of claim 1 , further comprising:an etch stop region in the substrate around the cavity.10. A method of manufacturing a high electron mobility transistor (HEMT) claim 1 , the method comprising:stacking a first semiconductor layer on a substrate;stacking a second semiconductor layer on the first semiconductor layer;exposing the substrate by forming a hole in the second semiconductor layer and the first semiconductor layer;forming a cavity in the substrate by etching the substrate via the hole; andforming a plurality of sources, a drain, and a plurality of gates on the second semiconductor layer.11. The method of claim 10 , wherein the forming a cavity includes anisotropically etching the substrate.12. The method of claim 11 , wherein the forming a cavity ...

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Номер записи: 8
07-02-2013 дата публикации

HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME

Номер: US20130032816A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hong Ki-ha, Hwang In-jun, KIM Jong-Seob, Oh Jae-joon, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer. 1. A high electron mobility transistor (HEMT) , comprising:a nitride substrate with a dielectric constant and thermal conductivity greater than a dielectric constant and thermal conductivity of bulk silicon; and a first compound semiconductor layer including a 2-dimensional electron gas (2DEG),', 'a second compound semiconductor layer on the first compound semiconductor layer, a polarization index of the second compound semiconductor layer greater than a polarization index of the first compound semiconductor layer, and', 'a source electrode, a drain electrode, and a gate on the second compound semiconductor layer., 'a HEMT stack on the nitride substrate, the HEMT stack including'}2. The HEMT of claim 1 , wherein the nitride substrate is one of an aluminum nitride (AlN) substrate and a silicon nitride (SiN) substrate.3. The HEMT of claim 1 , wherein the second compound semiconductor layer includes at least one of a recess region and an oxidized region.4. The HEMT of claim 1 , further comprising:a depletion layer between the second compound ...

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Номер записи: 9
13-06-2013 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR

Номер: US20130146890A1
Автор: CHOI Hyo-ji, Ha Jong-bong, Hwang In-jun, LEE Jae-won, Oh Jae-joon
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

A high electron mobility transistor (HEMT) according to example embodiments includes a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and a reverse diode gate structure on the second semiconductor layer. A source and a drain may be on at least one of the first semiconductor layer and the second semiconductor layer. A gate electrode may be on the reverse diode gate structure. 1. A high electron mobility transistor comprising:a substrate;a first semiconductor layer on the substrate;a second semiconductor layer on the first semiconductor layer;a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; anda gate structure between the source and the drain,the gate structure including a reverse diode gate structure and a gate electrode.2. The high electron mobility transistor of claim 1 , whereinthe reverse diode gate structure includes a first layer, andthe first layer includes a p-type group III nitride semiconductor.3. The high electron mobility transistor of claim 2 , whereinthe first layer is doped with a p-type dopant, andfirst layer includes at least one of GaN, InGaN, AlGaN, AlInN, and AlGaInN.4. The high electron mobility transistor of claim 2 , wherein the gate structure includes a second layer on the first layer.5. The high electron mobility transistor of claim 4 , wherein the second layer includes one of:an group III nitride semiconductor doped with an n-type dopant,an undoped group III nitride semiconductor, anda group III nitride semiconductor doped with a p-type dopant at a concentration lower than a p-type dopant concentration in the first layer.6. The high electron mobility transistor of claim 5 , wherein the second layer includes at least one of GaN claim 5 , InGaN claim 5 , AlGaN claim 5 , AlInN claim 5 , and AlGaInN.7. The high electron mobility transistor of claim 5 , whereinthe second layer includes at least one of GaN, InGaN, AlGaN, AlInN, and AlGaInN, andthe ...

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Номер записи: 10
11-07-2013 дата публикации

Substrate structure, semiconductor device fabricated from the same, and method of fabricating the semiconductor device

Номер: US20130175538A1
Автор: Chang-Yong Um, Hyuk-soon Choi, In-jun Hwang, Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jong-Seob Kim, Ki-ha Hong
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a substrate structure may include a GaN-based third material layer, a GaN-based second material layer, a GaN-based first material layer, and a buffer layer on a non-GaN-based substrate. The GaN-based first material layer may be doped with a first conductive type impurity. The GaN-based second material layer may be doped with a second conductive type impurity at a density that is less than a density of the first conductive type impurity in the first GaN-based material layer. The GaN-based third material layer may be doped with a first conductive type impurity at a density that is less than the density of the first conductive type impurity of the GaN-based first material layer. After a second substrate is attached onto the substrate structure, the non-GaN-based substrate may be removed and a GaN-based vertical type semiconductor device may be fabricated on the second substrate.

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Номер записи: 11
11-07-2013 дата публикации

High electron mobility transistors and methods of manufacturing the same

Номер: US20130175539A1
Автор: Chang-Yong Um, Hyuk-soon Choi, In-jun Hwang, Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jong-Seob Kim, Ki-ha Hong
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer and a channel layer. The channel layer may include an effective channel region and a high resistivity region. The effective channel region may be between the high resistivity region and the channel supply layer. The high resistivity region may be a region into which impurities are ion-implanted. According to example embodiments, a method of forming a HEMT includes forming a device unit, including a channel layer and a channel supply layer, on a first substrate; adhering a second substrate to the device unit; removing the first substrate; and forming a high resistivity region by ion-implanting impurities into at least a portion of the channel layer.

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Номер записи: 12
12-09-2013 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Номер: US20130234207A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hwang In-jun, KIM Jong-Seob, Oh Jae-joon, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode. 1. A high electron mobility transistor (HEMT) comprising:a channel supply layer; 'the channel layer including a two dimensional gas (2DEG) channel;', 'a channel layer on the channel supply layer,'}a source electrode, a drain electrode, and a gate electrode supporting the channel supply layer;a source contact pad connected to the source electrode;a drain contact pad connected to the drain electrode;a gate contact pad connected to the gate electrode; and a first one of the source contact pad, the drain contact pad, and the gate contact pad is on an upper surface of the buffer layer,', 'a second one of the source contact pad, the drain contact pad, and the gate contact pad is on the upper surface of the buffer layer or below the channel supply layer, and', 'the channel supply layer is on a third one of the source contact pad, the drain contact pad, and the gate contact pad., 'a buffer layer on the channel layer,'}2. The HEMT of claim 1 , whereinthe source contact pad and the gate contact pad are on the upper surface of the buffer layer, andthe drain contact pad is below the channel supply layer.3. The HEMT of claim 1 , whereinthe second one of the source contact pad, the drain contact pad, and the ...

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Номер записи: 13
21-11-2013 дата публикации

HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME

Номер: US20130307026A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hwang In-jun, HWANG Sun-kyu, KIM Jong-Seob, KIM Kyoung-yeon, Oh Jae-joon, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

According to example embodiments, High electron mobility transistors (HEMTs) may include a discontinuation region in a channel region. The discontinuation region may include a plurality of 2DEG unit regions that are spaced apart from one another. The discontinuation region may be formed at an interface between two semiconductor layers or adjacent to the interface. The discontinuation region may be formed by an uneven structure or a plurality of recess regions or a plurality of ion implantation regions. The plurality of 2DEG unit regions may have a nanoscale structure. The plurality of 2DEG unit regions may be formed in a dot pattern, a stripe pattern, or a staggered pattern. 1. A high electron mobility transistor (HEMT) comprising:a first semiconductor layer; 'the second semiconductor layer being configured to induce a 2-dimensional electron gas (2DEG) in the first semiconductor layer;', 'a second semiconductor layer on the first semiconductor layer,'}a gate corresponding to a discontinuation region of the first semiconductor layer in which a plurality of 2DEG unit regions are spaced apart from one another; and 'the source and drain electrically connected to the 2DEG.', 'a source and a drain spaced apart from the gate,'}2. The HEMT of claim 1 , wherein the discontinuation region of the first semiconductor layer is defined by an uneven portion in the first semiconductor layer that is under the gate.3. The HEMT of claim 2 , whereinthe uneven portion is defined by a plurality of protrusions and depressions formed between the protrusions along an upper surface of the first semiconductor layer, andthe second semiconductor layer covers the plurality of protrusions and the plurality of depressions.4. The HEMT of claim 3 , wherein the second semiconductor layer is configured to induce the plurality of 2DEG unit regions in the plurality of protrusions.5. The HEMT of claim 3 , wherein the second semiconductor layer is configured to induce the plurality of 2DEG unit regions in ...

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Номер записи: 14
23-01-2014 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Номер: US20140021510A1
Автор: Choi Hyuk-soon, Ha Jong-bong, JEON Woo-chul, Oh Jae-joon, PARK Ki-yeol, PARK Young-hwan, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

A higher electron mobility transistor (HEMT) and a method of manufacturing the same are disclosed. According to example embodiments, the HEMT may include a channel supply layer on a channel layer, a source electrode and a drain electrode that are on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a source pad and a drain pad. The source pad and a drain pad electrically contact the source electrode and the drain electrode, respectively. At least a portion of at least one of the source pad and the drain pad extends into a corresponding one of the source electrode and drain electrode that the at least one of the source pad and the drain pad is in electrical contact therewith. 1. A high electron mobility transistor comprising:a channel layer;a channel supply layer on the channel layer;a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer;a gate electrode between the source electrode and the drain electrode; anda source pad and a drain pad that electrically contact the source electrode and the drain electrode, respectively,wherein at least a portion of at least one of the source pad and the drain pad extends into a corresponding one of the source electrode and the drain electrode that the at least one of the source pad and the drain pad is in electrical contact therewith.2. The high electron mobility transistor of claim 1 , whereinthe source pad includes a contact portion that electrically contacts the source electrode, andthe source pad includes an insertion portion that extends into the source electrode.3. The high electron mobility transistor of claim 2 , wherein the insertion portion of the source pad penetrates the source electrode.4. The high electron mobility transistor of claim 3 , further comprising:a substrate, wherein the channel layer is on the substrate.5. The high electron mobility transistor of claim 4 , wherein ...

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Номер записи: 15
23-01-2014 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Номер: US20140021511A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hwang In-jun, HWANG Sun-kyu, JEON Woo-chul, KIM Jong-Seob, KIM Joon-yong, KIM Kyoung-yeon, Oh Jae-joon, PARK Ki-yeol, PARK Young-hwan, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

A high electron mobility transistor (HEMT) according to example embodiments includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a Schottky electrode forming a Schottky contact with the channel supply layer. An upper surface of the channel supply layer may define a Schottky electrode accommodation unit. At least part of the Schottky electrode may be in the Schottky electrode accommodation unit. The Schottky electrode is electrically connected to the source electrode. 1. A high electron mobility transistor (HEMT) comprising:a channel layer;a channel supply layer on the channel layer,an upper surface of the channel supply layer defining a Schottky electrode accommodation unit;a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer;a gate electrode between the source electrode and the drain electrode such that the Schottky electrode accommodation unit of the channel supply layer is between the gate electrode and the drain electrode; and the Schottky electrode forming a Schottky contact with the channel supply layer, and', 'the Schottky electrode is electrically connected to the source electrode., 'at least part of a Schottky electrode in the Schottky electrode accommodation unit of the channel supply layer,'}2. The HEMT of claim 1 , wherein the Schottky electrode accommodation unit is a recess defined by the upper surface of the channel supply layer.3. The HEMT of claim 2 , wherein the Schottky electrode accommodation unit is separated from an interface between the channel layer and the channel supply layer.4. The HEMT of claim 3 , wherein a distance from a bottom portion of the Schottky electrode accommodation unit to the interface between the channel layer and the channel supply layer is maintained at a level at which a ...

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Номер записи: 16
13-02-2014 дата публикации

High electron mobility transistor

Номер: US20140042449A1
Автор: Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jong-Seob Kim, Ki-Yeol Park, Sun-Kyu Hwang, Woo-Chul JEON, Young-Hwan Park
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer that induces a two-dimensional electron gas (2DEG) in a channel layer, a source electrode and a drain electrode that are at sides of the channel supply layer, a depletion-forming layer that is on the channel supply layer and contacts the source electrode, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulating layer. The depletion-forming layer forms a depletion region in the 2DEG.

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Номер записи: 17
20-02-2014 дата публикации

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SEMICONDUCTOR DEVICE

Номер: US20140048850A1
Автор: Ha Jong-bong, JEON Woo-chul, OH Jae-joo, PARK Ki-yeol, PARK Young-hwan, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

According to example embodiments, a semiconductor device may include a high electron mobility transistor (HEMT) on a first region of a substrate, and a diode on a second region of the substrate. The HEMT may be electrically connected to the diode. The HEMT and the diode may be formed on an upper surface of the substrate such as to be spaced apart from each other in a horizontal direction. The HEMT may include a semiconductor layer. The diode may be formed on another portion of the substrate on which the semiconductor layer is not formed. The HEMT and the diode may be cascode-connected to each other. 1. A semiconductor device comprising:a substrate;a high electron mobility transistor (HEMT) on a first region of the substrate, the HEMT including a semiconductor layer; anda diode on a second region of the substrate,the diode being electrically connected to the HEMT.2. The semiconductor device of claim 1 , wherein the HEMT includes:a source electrode electrically connected to a first region of the semiconductor layer;a drain electrode electrically connected to a second region of the semiconductor layer; anda gate electrode on the semiconductor layer between the source electrode and the drain electrode.3. The semiconductor device of claim 2 , wherein an upper surface of the substrate contacts one of the source electrode and the drain electrode.4. The semiconductor device of claim 3 , whereinthe source electrode is spaced apart from the substrate, andthe drain electrode contacts the substrate and the semiconductor layer.5. The semiconductor device of claim 1 , wherein the semiconductor layer includes a channel layer and a channel supply layer.6. The semiconductor device of claim 1 , wherein the semiconductor layer includes a gallium nitride (GaN)-based material.7. The semiconductor device of claim 1 , wherein the diode is a Schottky diode.8. The semiconductor device of claim 7 , wherein the diode includes:an anode that forms a Schottky contact with the substrate; anda ...

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Номер записи: 18
06-03-2014 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Номер: US20140061725A1
Автор: Ha Jong-bong, HWANG Sun-kyu, JEON Woo-chul, PARK Ki-yeol, PARK Young-hwan, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

According to example embodiments, a higher electron mobility transistor (HEMT) may include a first channel layer, a second channel layer on the first channel layer, a channel supply on the second channel layer, a drain electrode spaced apart from the first channel layer, a source electrode contacting the first channel layer and contacting at least one of the second channel layer and the channel supply layer, and a gate electrode unit between the source electrode and the drain electrode. The gate electrode unit may have a normally-off structure. The first and second channel layer form a PN junction with each other. The drain electrode contacts at least one of the second channel layer and the channel supply layer. 1. A high electron mobility transistor comprising:a first channel layer; 'the second channel layer forming a PN junction with the first channel layer;', 'a second channel layer on the first channel layer,'}a channel supply layer on the second channel layer; 'the drain electrode contacting at least one of the second channel layer and the channel supply layer;', 'a drain electrode spaced apart from the first channel layer,'}a source electrode contacting the first channel layer and contacting at least one of the second channel layer and the channel supply layer; and 'the gate electrode unit having a normally-off structure.', 'a gate electrode unit between the source electrode and the drain electrode,'}2. The high electron mobility transistor of claim 1 , whereinthe first channel layer is a p-type semiconductor layer, andthe second channel layer is an n-type semiconductor layer.3. The high electron mobility transistor of claim 2 , wherein the first channel layer is a p-type doped GaN layer.4. The high electron mobility transistor of claim 2 , wherein the second channel layer is one of an undoped GaN layer and an n-type doped GaN layer.5. The high electron mobility transistor of claim 1 , whereinat least one of the channel supply layer and the second channel ...

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Номер записи: 19
10-04-2014 дата публикации

HIGH-ELECTRON MOBILITY TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

Номер: US20140097470A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hwang In-jun, HWANG Sun-kyu, KIM Jong-Seob, KIM Joon-yong, KIM Kyoung-yeon, Oh Jae-joon, Shin Jai-kwang
Принадлежит:

According to example embodiments, a HEMT includes a channel supply layer on a channel layer, a p-type semiconductor structure on the channel supply layer, a gate electrode on the p-type semiconductor structure, and source and drain electrodes spaced apart from two sides of the gate electrode respectively. The channel supply layer may have a higher energy bandgap than the channel layer. The p-type semiconductor structure may have an energy bandgap that is different than the channel supply layer. The p-type semiconductor structure may include a hole injection layer (HIL) on the channel supply layer and be configured to inject holes into at least one of the channel layer and the channel supply in an on state. The p-type semiconductor structure may include a depletion forming layer on part of the HIL. The depletion forming layer may have a dopant concentration that is different than the dopant concentration of the HIL. 1. A high-electron mobility transistor (HEMT) comprising:a channel layer; 'the channel supply layer having an energy bandgap that is higher than an energy bandgap of the channel layer;', 'a channel supply layer on the channel layer,'} the p-type semiconductor structure having an energy bandgap that is different than the energy bandgap of the channel supply layer,', 'the p-type semiconductor structure including a hole injection layer (HIL) on the channel,', 'the HIL being configured to inject holes into at least one of the channel layer and the channel supply layer in an on state, and', 'the p-type semiconductor structure including a depletion forming layer on a portion of the HIL,', 'the depletion forming layer having a different dopant concentration than a dopant concentration of the HIL;, 'a p-type semiconductor structure on the channel supply layer,'}a gate electrode on the p-type semiconductor structure; and 'the source electrode and the drain electrode being spaced apart from two sides of the gate electrode respectively.', 'a source electrode and a ...

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Номер записи: 20
17-04-2014 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR AND METHOD OF DRIVING THE SAME

Номер: US20140103969A1
Автор: Ha Jong-bong, JEON Woo-chul, KIM Jong-Seob, Oh Jae-joon, PARK Ki-yeol, PARK Young-hwan, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

According to example embodiments, a HEMT includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode spaced apart on the channel layer, a depletion-forming layer on the channel supply layer, and a plurality of gate electrodes on the depletion-forming layer between the source electrode and the drain electrode. The channel supply layer is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured to form a depletion region in the 2DEG. The plurality of gate electrodes include a first gate electrode and a second gate electrode spaced apart from each other. 1. A high electron mobility transistor (HEMT) comprising:a channel layer including a first semiconductor material; the channel supply layer including a second semiconductor material,', 'the channel supply layer configured to induce a two-dimensional electron gas (2 DEG) in the channel layer;, 'a channel supply layer on the channel layer,'}a source electrode and a drain electrode at both sides of the channel supply layer; 'the depletion-forming layer configured to form a depletion region in the 2 DEG;', 'a depletion-forming layer on the channel supply layer,'}a first gate electrode on the depletion-forming layer,the first gate electrode between the source electrode and the drain electrode; andat least one second gate electrode separated from the first gate electrode on the depletion-forming layer and between the source electrode and the drain electrode.2. The HEMT of claim 1 , whereinthe HEMT includes one second gate electrode,the second gate electrode is a floating electrode, andthe first and second gate electrodes are configured such that applying a first gate voltage to the first gate electrode induces a second gate voltage in the second gate electrode.3. The HEMT of claim 2 , whereinthe first gate electrode and the second gate electrode are connected to each other by the depletion-forming layer, ...

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Номер записи: 21
05-06-2014 дата публикации

HIGH ELECTRON MOBILITY TRANSISTOR INCLUDING PLURALITY OF GATE ELECTRODES

Номер: US20140151747A1
Автор: Ha Jong-bong, HWANG Sun-kyu, JEON Woo-chul, Oh Jae-joon, PARK Ki-yeol, PARK Young-hwan, Shin Jai-kwang
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

According to example embodiments, a high electron mobility transistor includes: a channel layer including a first semiconductor material; a channel supply layer on the channel layer and configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, the channel supply layer including a second semiconductor material; source and drain electrodes spaced apart from each other on the channel layer, and an upper surface of the channel supply layer defining a gate electrode receiving part; a first gate electrode; and at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part. The first gate electrode may be in the gate electrode receiving part and between the source electrode and the drain electrode. The at least one second gate electrode may be between the source electrode and the first gate electrode. 1. A high electron mobility transistor comprising:a channel layer comprising a first semiconductor material; the channel supply layer comprising a second semiconductor material,', 'the channel supply layer configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, and', 'an upper surface of the channel supply layer defining a gate electrode receiving part;, 'a channel supply layer on the channel layer,'}source and drain electrodes spaced apart from each other on the channel layer;a first gate electrode in the gate electrode receiving part and between the source electrode and the drain electrode; 'the at least one second gate electrode between the source electrode and the first gate electrode.', 'at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part,'}2. The high electron mobility transistor of claim 1 , whereinthe at least one second gate electrode includes a floating electrode, andthe first gate electrode is configured to induce a second gate voltage into the floating electrode if a first gate voltage is applied ...

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Номер записи: 22
17-06-2021 дата публикации

BATTERY MODULE

Номер: US20210184307A1
Автор: HA Jong Bong, IM Jang Yeong, KIM Cheorl Hwan, Kim Hyun Jae, KIM Jeong Nam, MOON Pil Yong
Принадлежит:

A battery module includes battery cells arranged along a longitudinal direction of the battery module with respective long side surfaces of adjacent ones of the battery cells facing each other and heat-insulating partition walls interposed between the respective long side surfaces of the adjacent ones of the battery cells. A heat-insulating partition wall of the heat-insulating partition walls includes a heat-insulating sheet and a frame around an edge of the heat-insulating sheet. The heat-insulating sheet has a plate shape and comprises pores therein. The heat-insulating sheet is coupled between the respective long side surfaces of the adjacent ones of the battery cells. 1. A battery module comprising:battery cells arranged along a longitudinal direction of the battery module with respective long side surfaces of adjacent ones of the battery cells facing each other; andheat-insulating partition walls interposed between the respective long side surfaces of the adjacent ones of the battery cells,wherein a heat-insulating partition wall of the heat-insulating partition walls comprises a heat-insulating sheet and a frame around an edge of the heat-insulating sheet, the heat-insulating sheet having a plate shape and comprising pores therein, andwherein the heat-insulating sheet is coupled between the respective long side surfaces of the adjacent ones of the battery cells.2. The battery module of claim 1 , wherein the heat-insulating sheet is made of a ceramic paper or a foam sheet.3. The battery module of claim 2 , wherein the heat-insulating sheet further comprises aerogel or an oxide claim 2 , the oxide being SiO claim 2 , AlO claim 2 , ZrO claim 2 , CaO claim 2 , MgO claim 2 , or TiO.4. The battery module of claim 3 , wherein the heat-insulating sheet further comprises a fiber to connect the aerogel or the oxide.5. The battery module of claim 1 , wherein the frame is made of a metal or plastic.6. The battery module of claim 1 , wherein a first surface of the heat- ...

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Номер записи: 23
28-08-2014 дата публикации

Method and apparatus for controlling a gate voltage in high electron mobility transistor

Номер: US20140240026A1
Автор: Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Joon-Yong Kim, Ki-Yeol Park, Sun-Kyu Hwang, Woo-Chul JEON, Young-Hwan Park
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a method for controlling a gate voltage applied to a gate electrode of a high electron mobility transistor (HEMT) may include measuring a voltage between a drain electrode and a source electrode of the HEMT, and adjusting a level of the gate voltage applied to the gate electrode of the HEMT according to the measured voltage. The level of the gate electrode may be adjusted if the voltage between the drain electrode and the source electrode is different than a set value.

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Номер записи: 24
06-08-2015 дата публикации

HIGH ELECTRON MOBILITY TRANSISTORS AND METHODS OF MANUFACTURING THE SAME

Номер: US20150221745A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hong Ki-ha, Hwang In-jun, KIM Jong-Seob, Oh Jae-joon, Shin Jai-kwang
Принадлежит:

High electron mobility transistors (HEMTs) including a substrate and a HEMT stack on the substrate, the HEMT stack including a compound semiconductor layer that includes a 2-dimensional electron gas (2DEG), an upper compound semiconductor layer that has a polarization index higher than a polarization index of the compound semiconductor layer, and a source electrode, a drain electrode, and a gate that are disposed on the upper compound semiconductor layer. The substrate may be a nitride substrate that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of a silicon substrate. The substrate may include an insulating layer that has a dielectric constant and a thermal conductivity higher than a dielectric constant and a thermal conductivity of the silicon substrate, a metal layer that is deposited on the insulating layer, and a plate that is attached to the metal layer. 116.-. (canceled)17. A method of manufacturing a high electron mobility transistor (HEMT) , the method comprising: forming a second compound semiconductor layer with a greater polarization index than the first compound semiconductor layer such that a 2-dimensional electron gas (2DEG) is induced in the first semiconductor layer,', 'forming a source electrode, a drain electrode, and a gate on the second compound semiconductor layer;, 'forming a first compound semiconductor layer on the substrate,'}, 'forming a HEMT stack on a substrate by'}attaching a carrier wafer to the HEMT stack;removing the substrate from a surface of the HEMT stack;attaching a nitride substrate with a dielectric constant and thermal conductivity greater than a dielectric constant and a thermal conductivity of bulk silicon to the surface; andremoving the carrier wafer.18. The method of claim 17 , wherein the nitride substrate includes at least one of AlN and SiN.19. The method of claim 17 , further comprising:forming at least one of a recess and an oxidized region in the ...

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Номер записи: 25
06-08-2015 дата публикации

METHODS OF MANUFACTURING HIGH ELECTRON MOBILITY TRANSISTORS

Номер: US20150221746A1
Автор: Choi Hyuk-soon, Ha Jong-bong, Hong Ki-ha, Hwang In-jun, IM Ki-sik, KIM Dong-seok, KIM Jong-Seob, KIM Ki-Won, LEE Jung-hee, Oh Jae-joon, Shin Jai-kwang
Принадлежит:

The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer. 1. A method of manufacturing a high electron mobility transistor (HEMT) , comprising:forming a first layer including a first material on a substrate;after the first layer is completely formed, increasing an electrical resistance of at least a part of the first layer;after the electrode resistance of at least a part of the first layer is increased, forming a source pattern and a drain pattern spaced apart from each other on the first layer, the source and drain patterns including a second material, a band gap of the second material greater than a band gap of the first material;forming a gate insulation layer on the first layer between the source pattern and the drain pattern;forming a gate electrode on the gate insulation layer;forming a source electrode on the source pattern; andforming a drain electrode on the drain pattern,wherein the forming of the source pattern and the drain pattern includesforming a growth blocking layer on a channel region and a peripheral region of the first layer such that regions of the first layer corresponding to the source and drain patterns are exposed,depositing the second material onto the exposed regions of the first layer, andremoving the growth blocking layer2. The method of claim 1 , wherein the increasing of the electrical resistance of the part of the first layer includes injecting impurities into the first layer.34-. (canceled)5. The method of claim 1 , whereinthe increasing includes injecting impurities into the first material, andthe forming a source pattern and a drain pattern includes forming the growth blocking layer to a thickness that substantially blocks the impurities from ...

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Номер записи: 26
08-10-2020 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20200321440A1
Автор: BONG Ha Jong, LIM Jae Gu
Принадлежит: LG INNOTEK CO., LTD.

Disclosed in an embodiment is a semiconductor device comprising a semiconductor structure, which comprises a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein: the first conductive semiconductor layer comprises a first super lattice layer comprising a plurality of first sub layers and a plurality of second sub layers, the first and second sub layers being alternately arranged; the semiconductor structure emits ions of indium, aluminum, and a first and second dopant during a primary ion irradiation; the intensity of indium ions emitted from the active layer includes a maximum indium intensity peak; the doping concentration of the first dopant emitted from the first conductive semiconductor layer includes a maximum concentration peak; the maximum indium intensity peak is disposed to be spaced from the maximum concentration peak in a first direction; the intensity of indium ions emitted from the plurality of first sub layers has a plurality of first indium intensity peaks; the doping concentration of the first dopant emitted from the plurality of first sub layers has a plurality of first concentration peaks; and the plurality of first indium intensity peaks and the plurality of first concentration peaks are disposed between the maximum indium intensity peak and the maximum concentration peak. 110.-. (canceled)11. A semiconductor device comprising:a semiconductor structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer,wherein the first conductive semiconductor layer includes a first superlattice layer including a plurality of first sub layers and a plurality of second sub layers, which are alternately disposed,the semiconductor structure emits ...

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Номер записи: 27
05-01-2016 дата публикации

High electron mobility transistor and method of manufacturing the same

Номер: US9231093B2
Автор: Hyuk-soon Choi, In-jun Hwang, Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jong-Seob Kim, Joon-Yong Kim, Ki-Yeol Park, Kyoung-Yeon Kim, Sun-Kyu Hwang, Woo-Chul JEON, Young-Hwan Park
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A high electron mobility transistor (HEMT) according to example embodiments includes a channel layer, a channel supply layer on the channel layer, a source electrode and a drain electrode on at least one of the channel layer and the channel supply layer, a gate electrode between the source electrode and the drain electrode, and a Schottky electrode forming a Schottky contact with the channel supply layer. An upper surface of the channel supply layer may define a Schottky electrode accommodation unit. At least part of the Schottky electrode may be in the Schottky electrode accommodation unit. The Schottky electrode is electrically connected to the source electrode.

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Номер записи: 28
29-09-2015 дата публикации

High electron mobility transistor including plurality of gate electrodes

Номер: US9147738B2
Автор: Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Ki-Yeol Park, Sun-Kyu Hwang, Woo-Chul JEON, Young-Hwan Park
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a high electron mobility transistor includes: a channel layer including a first semiconductor material; a channel supply layer on the channel layer and configured to generate a 2-dimensional electron gas (2DEG) in the channel layer, the channel supply layer including a second semiconductor material; source and drain electrodes spaced apart from each other on the channel layer, and an upper surface of the channel supply layer defining a gate electrode receiving part; a first gate electrode; and at least one second gate electrode spaced apart from the first gate electrode and in the gate electrode receiving part. The first gate electrode may be in the gate electrode receiving part and between the source electrode and the drain electrode. The at least one second gate electrode may be between the source electrode and the first gate electrode.

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Номер записи: 29
19-09-2013 дата публикации

高電子移動度トランジスタ及びその製造方法

Номер: JP2013187546A
Автор: Hyuk-soon Choi, In-jun Whang, Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jongseob Kim, 仁俊 ▲黄▼, 在光 申, 在浚 ▲呉▼, 種奉 河, 赫洵 崔, 鍾燮 金
Принадлежит: SAMSUNG ELECTRONICS CO LTD

【課題】高電子移動度トランジスタ及びその製造方法を提供する。 【解決手段】バッファ層と、バッファ層上に形成され、２ＤＥＧ（２−Ｄｉｍｅｎｓｉｏｎａｌ Ｅｌｅｃｔｒｏｎ Ｇａｓ）チャネルを含むチャネル層と、チャネル層上に形成されたチャネル供給層と、チャネル供給層上に形成されたソース電極、ドレイン電極及びゲート電極と、ソース電極に連結されるソースコンタクトパッドと、ドレイン電極に連結されるドレインコンタクトパッドと、ゲート電極に連結されるゲートコンタクトパッドと、を備え、ソースコンタクトパッド、ドレインコンタクトパッド及びゲートコンタクトパッドのうち何れか一つまたは二つは、バッファ層の外面上に備えられ、残りは、他の方向に備えられた高電子移動度トランジスタ（ＨＥＭＴ：Ｈｉｇｈ Ｅｌｅｃｔｒｏｎ Ｍｏｂｉｌｉｔｙ Ｔｒａｎｓｉｓｔｏｒ）である。 【選択図】図１

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Номер записи: 30
09-04-2009 дата публикации

リール状のテープキャリアパッケージとこれを適用したプラズマディスプレイ装置

Номер: JP2009075620A
Автор: Bu-Kyeong Mo, Jong-Bong Ha, Seung-Hak Kim, 宗 奉 河, 富 慶 牟, 昇 鶴 金
Принадлежит: Samsung SDI Co Ltd

【課題】リール状態でＴＣＰの正確なパンチングを誘導してＴＣＰ組立時のコネクタとＴＣＰの誤整列を防止し、コネクタとＴＣＰの正確な組立を確認することができるリール状のテープキャリアパッケージと、これを適用したプラズマディスプレイ装置を提供する。 【解決手段】本発明の一実施形態によるリール状のテープキャリアパッケージ５０は、ＩＣをテープキャリアでパッケージングして成るリール状のテープキャリアパッケージ５０において、入力部５３ａと出力部５３ｂを含む回路配線を形成しつつ前記ＩＣと接合されて複数の単位パターンを形成する銅箔５３１と、前記銅箔に取り付けられるフィルム層５０３と、を含み、前記各単位パターン入力部の幅方向周縁外側に、前記フィルム層を貫通するスリット５１が形成される。 【選択図】図５

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Номер записи: 31
22-06-2006 дата публикации

リール状のテープキャリアパッケージとこれを適用したプラズマディスプレイ装置

Номер: JP2006163406A
Автор: Bu-Kyeong Mo, Jong-Bong Ha, Seung-Hak Kim, 宗 奉 河, 富 慶 牟, 昇 鶴 金
Принадлежит: Samsung SDI Co Ltd

【課題】リール状態でＴＣＰの正確なパンチングを誘導してＴＣＰ組立時のコネクタとＴＣＰの誤整列を防止し、コネクタとＴＣＰの正確な組立を確認することができるリール状のテープキャリアパッケージと、これを適用したプラズマディスプレイ装置を提供する。 【解決手段】本発明の一実施形態によるプラズマディスプレイ装置は、プラズマディスプレイパネルと、前記プラズマディスプレイパネルが支持されるシャーシーベースと、前記シャーシーベースのプラズマディスプレイパネルとの反対側に取り付けられ、前記プラズマディスプレイパネルを駆動するための駆動回路素子が備えられる回路ボードと、一側端が前記回路ボード上に連結されて入力部を構成し、他側端が前記プラズマディスプレイパネルの駆動電極に連結されて出力部を構成するＴＣＰと、を含み、前記ＴＣＰ上に前記入力部と隣接して整列マークが形成される。 【選択図】図５

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Номер записи: 32
03-05-2012 дата публикации

Light emitting device

Номер: US20120104356A1
Автор: Dae Seob Han, HA Jong Bong, Yong Tae Moon
Принадлежит: LG Innotek Co Ltd

Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a light emitting structure having a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first and second conductive semiconductor layers. The active layer includes a plurality of well layers and barrier layers. An outermost barrier layer of the barrier layers includes a plurality of first layers; and a plurality of second layers.

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Номер записи: 33
28-03-2017 дата публикации

High electron mobility transistor and method of manufacturing the same

Номер: US09608100B2
Автор: Hyuk-soon Choi, In-jun Hwang, Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jong-Seob Kim
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a high electron mobility transistor (HEMT) includes: stack including a buffer layer, a channel layer containing a two dimensional electron gas (2DEG) channel, and a channel supply layer sequentially stacked on each other, the stack defining a first hole and a second hole that are spaced apart from each other. A first electrode, a second electrode, and third electrode are spaced apart from each other along a first surface of the channel supply layer. A first pad is on the buffer layer and extends through the first hole of the stack to the first electrode. A second pad is on the buffer layer and extends through the second hole of the stack to the second electrode. A third pad is under the stack and electrically connected to the third electrode.

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Номер записи: 34
14-02-2017 дата публикации

High electron mobility transistor

Номер: US09570597B2
Автор: Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Jong-Seob Kim, Ki-Yeol Park, Sun-Kyu Hwang, Woo-Chul JEON, Young-Hwan Park
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a high electron mobility transistor (HEMT) includes a channel supply layer that induces a two-dimensional electron gas (2DEG) in a channel layer, a source electrode and a drain electrode that are at sides of the channel supply layer, a depletion-forming layer that is on the channel supply layer and contacts the source electrode, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulating layer. The depletion-forming layer forms a depletion region in the 2DEG.

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Номер записи: 35
04-10-2016 дата публикации

Method and apparatus for controlling a gate voltage in high electron mobility transistor

Номер: US09461637B2
Автор: Jae-joon Oh, Jai-Kwang Shin, Jong-Bong Ha, Joon-Yong Kim, Ki-Yeol Park, Sun-Kyu Hwang, Woo-Chul JEON, Young-Hwan Park
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a method for controlling a gate voltage applied to a gate electrode of a high electron mobility transistor (HEMT) may include measuring a voltage between a drain electrode and a source electrode of the HEMT, and adjusting a level of the gate voltage applied to the gate electrode of the HEMT according to the measured voltage. The level of the gate electrode may be adjusted if the voltage between the drain electrode and the source electrode is different than a set value.

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Номер записи: 36