Programmierverfahren und Programmierwiederaufnahmeverfahren für ein nichtflüchtiges Speicherbauelement

Programmierverfahren für ein nichtflüchtiges Speicherbauelement, mit folgenden Schritten: – Programmieren von Daten in eine erste Mehrzahl von Speicherzellen eines nichtflüchtigen Speicherbauelements, – Programmieren einer Bestätigungsinformation, welche mit den in die erste Mehrzahl von Speicherzellen programmierten Daten assoziiert ist, in wenigstens eine zweite Speicherzelle des nichtflüchtigen Speicherbauelements während des Programmierens der Daten in die erste Mehrzahl von Speicherzellen (Schritt 1000) und – Bestimmen, ob die Daten korrekt in die erste Mehrzahl von Speicherzellen programmiert sind, basierend auf der Ermittlung einer Schwellwertspannungsverteilung von wenigstens einem Teil der ersten Mehrzahl von Speicherzellen und der Schwellwertspannungsverteilung der wenigstens einen zweiten Speicherzelle (Schritte 1400 und 1500).

Methods of manufacturing a semiconductor device

In a method of manufacturing a semiconductor device, a mask pattern is formed on an active region of a substrate. An exposed portion of the substrate is removed to form a trench in the substrate. A preliminary first insulation layer is formed on a bottom and sidewalls of the trench and the mask pattern. A plasma treatment is performed on the preliminary first insulation layer using fluorine-containing plasma to form a first insulation layer including fluorine. A second insulation layer is formed on the first insulation layer to fill the trench. A thickness of a gate insulation layer adjacent to an upper edge of the trench may be selectively increased, and generation of leakage current may be reduced.

Touch screen substrate and method of manufacturing a touch screen substrate

A method of manufacturing a touch screen substrate includes forming a sensing electrode on a substrate, spraying a first ink and a second ink having a same amount of ink as the first ink to respectively form a first ink droplet and a second ink droplet on a light blocking region of the substrate, and irradiating a first light upon the first ink droplet to form a first spacer having a first height and a second light upon the second ink droplet to form a second spacer having a second height lower than the first height. A total energy of the first light irradiated upon the first ink droplet differs from a total energy of the second light irradiated upon the second ink droplet, and the second spacer makes contact with the sensing electrode.

EQUIPMENT AND PROCEDURE FOR THE CERTIFICATION OF THE SIM OF MAP OWNER IN A GSM TERMINAL

Method of manufacturing pixel walls of an electrowetting display device

A method of manufacturing an electrowetting display device includes a preliminary partition wall pattern formed on a lower substrate on which a pixel electrode of an oxide series and an insulation layer are formed. The preliminary partition wall pattern is disposed along a boundary of the pixel electrode. A water-repellent layer including a self-assembled monolayer having a hydrophobic property is formed on the lower substrate. A portion of the preliminary partition wall pattern and the water-repellent layer formed on the preliminary partition wall pattern are removed to form a partition wall pattern on the insulation layer and to form a water-repellent pattern on the pixel electrode and the insulation layer between partition walls of the partition wall patterns. A fluid layer is formed on the lower substrate on which the water-repellent pattern is formed. The lower substrate and an upper substrate are combined with each other.

Methods for programming user data and confirmation information in nonvolatile memory devices

Method of programming nonvolatile memory devices are provided in which data is programmed into a first plurality of memory cells of the nonvolatile memory device. At the same time associated programming confirmation information is programmed into at least one second memory cell of the nonvolatile memory device. Then, a determination is made as to whether the data was correctly programmed into the first plurality of memory cells based on an evaluation of (1) the threshold voltage distributions of at least some of the first plurality of memory cells and (2) the threshold voltage distribution of the at least one second memory cell. Methods of resuming a data programming operation after an interruption such as a loss of power are also provided.

AUTHENTICATION DEVICE BASED ON BIOMETRIC INFORMATION, CONTROL SERVER AND APPLICATION SERVER, AND OPERATION METHOD THEREOF

A method of uploading and downloading data to an application server requested from a computing device, by a biometric information based authentication device which is connected to the computing device and interworks with a control server, is provided. The method includes detecting an upload request message which is transmitted from the computing device to the application server, extracting a first identifier included in the upload request message, outputting a first biometric information authentication result for input first biometric information, and transmitting upload authentication information comprising the first identifier, the first biometric information authentication result, and a first data encryption key to the control server.

Decodierschaltung zur Verwendung in einer nichtflüchtigen Halbleiterspeichervorrichtung

Nichtflüchtiger Halbleiterspeicher, Methode zum gleichzeitigen Löschen mehrerer Speicherblöcke und zugehörige Decoderschaltung

Method for forming grid with polycrystal silicone-titanium silicide structure

Light-emitting element, method of manufacturing light-emitting element, and display device

The invention relates to a light-emitting element, a method of manufacturing the light-emitting element, and a display device. The light-emitting element includes: a first semiconductor layer doped with an n-type dopant; a second semiconductor layer disposed on the first semiconductor layer and doped with a p-type dopant; a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer; an electrode layer disposed on the second semiconductor layer; an insulating film surrounding at least an outer surface of the light emitting layer; and a void formed at least in the first semiconductor layer, the void extending in a direction in which the first semiconductor layer, the light emitting layer, and the second semiconductor layer are disposed.

Display device

The invention provides a display device. The display device according to an embodiment of the present invention may include: a display panel; the frame is positioned behind the display panel and is combined with the display panel; and a rear cover covering a rear portion of the frame, the frame may include: a pin including a main body protruding from a back surface of the frame toward an inner side of the rear cover, and a head protruding from an outer peripheral surface of the main body in a direction intersecting an axial direction of the main body, a portion of the rear cover may be located between the back surface of the frame and the head and latched to the head.

Display panel, color filter substrate, and method of manufacturing the same

A display panel includes; a substrate, and a light blocking structure surrounding an ink filling region on the substrate, the light blocking structure including; a first layer pattern having an ink affinity characteristic disposed on the substrate, and a second layer pattern positioned on the first layer pattern and including an organic material having a light blocking characteristic.

Flashspeicherbauelement

Flashspeicherbauelement, das einen Cachelesevorgang unterstützt, der eine Reihe von aufeinanderfolgenden Datenlesevorgängen umfasst, und folgende Elemente aufweist: – einen ersten und einen zweiten Pufferspeicher (120, 130), – einen nichtflüchtigen Speicherkern (110), der ein nichtflüchtiges Speicherzellenfeld (210) mit einer Mehrzahl von Speicherblöcken beinhaltet, die jeweils eine Mehrzahl von Seiten umfassen, – einen Seitenpuffer (220), der zum Lesen von Daten aus einem ausgewählten Speicherblock eingerichtet ist, – ein erstes Register (150) zum Speichern von Adressen- und Befehlsinformation, – eine Steuerlogikschaltung (140), die ein zweites Register (141) umfasst und dafür eingerichtet ist, ein Freigabesignal (EN) zu erzeugen, wenn detektiert wird, dass eine Befehlsinformation in das erste Register (150) geschrieben wurde, und – eine Kopierschaltung (160) zum Kopieren der im ersten Register (150) gespeicherten Adressen- und Befehlsinformation in das zweite Register (141) in Reaktion ...

Non-volatile semiconductor memory device and multi-block erase method thereof

A non-volatile semiconductor memory device includes memory blocks and an erase controller configured to control a multi-block erase operation where at least two of the memory blocks are simultaneously erased. According to some embodiments, after selecting and simultaneously erasing the selected memory blocks, an erase verify operation for each of the erased memory blocks is performed according to an externally provided erase verify command and block address. According to some embodiments, if a suspend command is received by the memory device while selected memory blocks are being erased, the erase operation ceases and another operation, such as a read operation, begins. When a resume command is received by the memory device, the erase operation resumes. Other embodiments are described and claimed.

Controller for NAND flash memory

A data processing system has a NAND flash memory 160 with an internal page buffer 162 and a non-volatile store 161. A memory controller 140 controls reads from the flash memory. The data may then be written into a RAM 150. A buffer 141 in the memory controller is used to speed up the transfer of data from the page buffer. The total transfer time is less than would be required to read each data unit from the page buffer and then write it into the RAM. The memory controller may use a direct access memory (DMA) controller 120 and a second memory controller 130 to transfer data to the RAM. The DMA controller may have an additional buffer 121. The memory controller and DMA controller buffers may be FIFOs. The transfer may be controlled by registers 142 in the first memory controller.

Methods for programming user data and confirmation information in nonvolatile memory devices

Method of programming nonvolatile memory devices are provided in which data is programmed into a first plurality of memory cells of the nonvolatile memory device. At the same time associated programming confirmation information is programmed into at least one second memory cell of the nonvolatile memory device. Then, a determination is made as to whether the data was correctly programmed into the first plurality of memory cells based on an evaluation of (1) the threshold voltage distributions of at least some of the first plurality of memory cells and (2) the threshold voltage distribution of the at least one second memory cell. Methods of resuming a data programming operation after an interruption such as a loss of power are also provided.

Flash memory device supporting cache read operation

A flash memory device comprises a non-volatile memory core operatively connected to first and second buffer memories through a page buffer. The device further comprises a first register adapted to receive command and address information from a host system, a copy circuit adapted to copy the command and address information from the first register to a second register within a control logic circuit. The device alternately transfers information to the first and second buffer memories during a cache read operation comprising a plurality of data read operations.

Adhesive composition for liquid crystal display and method of making and using the same

One embodiment of this invention provides an adhesive composition for a liquid crystal display comprising the adhesive resin and the black pigment coated on a part of area of the bottom surface of the liquid crystal panel of the liquid crystal display or on a part of area of the backlight module, so as to bond the liquid crystal panel and the backlight module. The adhesive composition for a liquid crystal display of this invention is to firmly bond the liquid crystal panel and the backlight module so as to reduce the weight and thickness of the liquid crystal display thus made. In addition, the adhesive composition contains the black pigment dispersed therein to block the light permeated from the backlight module to the exterior of the liquid crystal display module to thereby increase the performance of the liquid crystal. The present invention uses a simple coating process without having to employ other processes after coating so as to reduce costs.

Memory controller and data processing system with the same

In one aspect, a data processing system includes a OneNAND flash memory which includes an internal non-volatile memory and an internal buffer memory which temporarily stores a page data derived from the internal non-volatile memory, and a first memory controller which includes a speed-up buffer. The memory controller controls read operations of the OneNAND flash memory such that the page data stored in the OneNAND internal buffer memory is sequentially and continuously output in multiple data units from the OneNAND flash memory to an exterior device through the speed-up buffer.

Touch Screen Substrate and Method of Manufacturing a Touch Screen Substrate

A touch screen substrate includes an insulation ball formed on a substrate having a first diameter, a sensing electrode formed on the substrate, and a conductive ball formed on the sensing electrode having a second diameter shorter than the first diameter. A cell gap spacer for maintaining a cell gap of a touch screen panel and a spacer for electrically connecting a lower substrate with an upper substrate of the touch screen panel may be formed via a single spraying process. 1. A method of manufacturing a touch screen substrate , the method comprising:forming a sensing electrode on a substrate;spraying a first ink and a second ink on the substrate including the sensing electrode, the first ink including a first solvent and insulation balls having a first diameter, the second ink including a second solvent and conductive balls having a second diameter smaller than the first diameter; andhardening the first and second inks on the substrate, to fix the insulation balls on the substrate and the conductive balls on the sensing electrode formed on the substrate.2. The method of claim 1 , wherein the first and second inks are sprayed from an assembly including a first print head filled with the first ink and a second print head filled with the second ink claim 1 , and wherein the assembly moves over the substrate to spray the first and second inks.3. The method of claim 1 , wherein hardening the first and second inks sprayed on the substrate comprises:partially hardening the first solvent of the first ink to form a first hardener around a first contact point between the insulation ball and the substrate; andpartially hardening the second solvent of the second ink to form a second hardener around a second contact point between the conductive ball and the sensing electrode.4. The method of claim 1 , wherein the sensing electrode is formed in a light blocking region surrounding a light transmission region of the substrate claim 1 , and further comprising forming a pixel ...

Fuel cell system

A fuel cell system includes a radiator configured to perform heat exchange with a coolant discharged from a fuel cell stack, a coolant supply pump configured to supply the coolant to the fuel cell stack, a COD heater configured to consume power generated by the fuel cell stack, and a controller configured to control the COD heater. A valve connected to the fuel cell stack, the radiator, the coolant supply pump, and the COD heater to control a flow of the coolant, and a controller configured to control an operation start time and an output of the COD heater to consume energy generated by the fuel cell stack according to a state of charge (SOC) of the cell and an operation state of the fuel cell stack. The controller controls the valve such that the coolant flows to the COD heater in a temperature control section after a cold start section of the fuel cell stack.

METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer.

Method of fabricating semiconductor integrated circuit device

A method of fabricating a semiconductor integrated circuit (IC) device can include forming a first silicide layer on at least a portion of a transistor on a substrate, forming nitrogen in the first silicide layer to form a second silicide layer, forming a first stress layer having a tensile stress on the substrate having the transistor formed thereon, and irradiating the first stress layer with ultraviolet (UV) light to form a second stress layer having greater tensile stress than the first stress layer.

PHARMACEUTICAL COMPOSITION AND METHODS COMPRISING IMMUNE CELLS AND PONATINIB

Methods and compositions for treating cancer are disclosed. The compositions comprise immune cells pretreated with ponatinib, or immune cells co-administered with ponatinib, where ponatinib promotes survival and anti-cancer cytotoxicity of the immune cells. 1. A pharmaceutical composition for treating cancer , the pharmaceutical composition comprising immune cells and ponatinib or a pharmaceutically acceptable salt or derivative thereof.2. The pharmaceutical composition of claim 1 , wherein the immune cells comprise at least one of NK cells claim 1 , T cells claim 1 , B cells claim 1 , dendritic cells claim 1 , and macrophages.3. The pharmaceutical composition of or claim 1 , wherein the immune cells comprise NK cells claim 1 , wherein NK cells comprise at least one of NK cells cultured with cytokines; NK cells co-cultured with cytokines and irradiated human peripheral blood mononuclear cells (PBMC); NK cells co-cultured with established cell line(s) or genetically engineered feeder cells or both; and genetically engineered CAR-NK cells.4. The pharmaceutical composition of claim 3 , wherein the established cell lines are transformed lymphocyte cells selected from LCL cells claim 3 , KL-1 cells claim 3 , or K562 cells.5. The pharmaceutical composition of any one of - claim 3 , wherein the immune cells comprise T cells claim 3 , wherein T cells comprise at least one of T cells isolated from peripheral blood mononuclear cells (PBMC) and cultured with cytokines; T cells extracted near tumors; T cells treated with activators; and genetically engineered CAR-T cells.6. The pharmaceutical composition of any one of - claim 3 , wherein the concentration of ponatinib or pharmaceutically acceptable salt or derivative thereof is from about 1 nM to 1 μM.7. The pharmaceutical composition of any one of - claim 3 , wherein said immune cells are pre-treated with an effective amount of ponatinib or pharmaceutically acceptable salt or derivative thereof.8. The pharmaceutical ...

Piston structure of engine

A piston structure of an engine generates an automatic flow of gas through a hole penetrating from a bowl of the piston toward a lateral side of the piston. The structure provides a reinforcement of the compression and swirling movement in the combustion chamber of an engine, improvement of the mixture function of the fuel and air, reduction of the blowby leaking into the crankcase through the clearance between the cylinder wall and the piston, and prevention of the wear and tear of the cylinder liner and piston by eliminating wet fuel formed on the cylinder wall.

PROGRAMMING METHOD OF NONVOLATILE MEMORY DEVICE

Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line, The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line.

HOST DEVICE AND SYSTEM INCLUDING THE SAME

A memory module includes a first storage module including a first module controller and a first memory unit. The first storage module is configured to receive first partial data from a host and write the first partial data to the first memory unit. A second storage module includes a second module controller and a second memory unit. The second storage module is configured to receive second partial data from the host and write the second partial data to the second memory unit. The first storage module and the second storage module are configured to connect to the host through a single host interface bus. 1. A memory module comprising:a first storage module including a first module controller and a first memory unit, the first storage module being configured to receive first partial data from a host and write the first partial data to the first memory unit; anda second storage module including a second module controller and a second memory unit, the second storage module being configured to receive second partial data from the host and write the second partial data to the second memory unit,wherein the first storage module and the second storage module are configured to connect to the host through a single host interface bus.2. The module of claim 1 , wherein the memory module is configured such that the first partial data and the second partial data are written in the first memory unit and the second memory unit respectively in parallel.3. The module of claim 1 , wherein the memory module is configured such that the first partial data is written in the first memory unit in parallel with receiving the second partial data from the host.4. The module of claim 1 , wherein the first storage module further includes a first memory buffer and the second storage module further includes a second memory buffer;wherein the memory module is configured such that while the first partial data is written to the first memory unit, the first module controller receives third partial ...

Display apparatus and method of manufacturing the same

A display apparatus includes a substrate; a cavity layer; a display material layer; and a capping layer. The cavity layer includes a plurality of barriers arranged to be spaced apart from one another on the substrate and partitioning pixel regions, and a roof layer connecting upper parts of the plurality of barriers. The cavity layer forms a plurality of cavities including a cavity. The display material layer is formed in the cavity. The capping layer is formed on the cavity layer, the capping layer including a sealant and a plurality of fillers dispersed in the sealant.

Device and method of verifying subscriber identifying module card

Memory e.g. programmable ROM, for data processing system e.g. mobile telephone, has control logic unit to control memory core such that data reading periods are obtained from address and command information of core

The memory has a control logic unit to store address and command information of a memory core (161). A page buffer reads the data from a memory block of the core, where the unit controls the core so that the data reading periods are obtained from stored information. An interrupt signal is deactivated and activated when the data of the page buffer and two data buffers are transmitted to the data buffers and an external unit, respectively : An independent claim is also included for a method for controlling a memory.

Semiconductor device and manufacturing method thereof

A semiconductor device and a method of manufacturing the same are provided. According to the present invention, a semiconductor device includes: an active region formed in a substrate and including a flat surface and a hole-shaped recess; an upper layer plug disposed over the flat surface; a spacer disposed between the upper layer plugs and providing a trench exposing the hole-shaped recess; a lower plug filling the hole-shaped recess; and a buried conductive line disposed over the lower plug and partially filling the trench.

Pad printing apparatus

Disclosed is a pad printing apparatus. The pad printing apparatus according to an embodiment of the present invention includes: a stage which is disposed above a frame, and supports a plate to be printed in a sheet unit mounted thereon; an ink supply unit which is disposed above the frame to supply ink; and a pad printing unit which receives the ink from the ink supply unit to transfer to printing regions of the plate to be printed, wherein the pad printing unit includes: a pad gantry which is disposed above the frame in a first axial direction; printing pad moving parts which are mounted on the pad gantry to move in the first axial direction along the pad gantry; a plurality of printing pad parts which are mounted on the printing pad moving parts to transfer the ink smeared thereon to the printing regions of the plate to be printed; and a pad gantry moving unit which is configured to support the pad gantry and move the pad gantry in a second axial direction and a third axial direction.

METHOD OF CONTROLLING NOZZLES OF INKJET HEAD AND APPARATUS FOR MEASURING AMOUNTS OF INK EJECTED FROM NOZZLES OF INKJET HEAD

Provided are method of controlling nozzles of an inkjet head and an apparatus for measuring the amounts of ink ejected from the nozzles of the inkjet head. The method includes: preparing a mass measuring device, which measures the mass of ink by using an oscillation change, in a pixel; ejecting ink into the pixel from a nozzle of the inkjet head, and measuring the amount of ink ejected from the nozzle by using the mass measuring device; and adjusting a voltage waveform applied to the nozzle of the inkjet head. 1. An apparatus for measuring the amount of ink , the apparatus comprising:a plurality of pixels in which ink ejected from nozzles of an inkjet head are filled; andmass measuring devices corresponding to the pixels and measuring the masses of ink filled in the pixels by using oscillation changes.2. The apparatus of claim 1 , wherein each of the mass measuring devices comprises a first electrode claim 1 , a piezoelectric material layer oscillating at a resonant frequency claim 1 , and a second electrode which are sequentially stacked.3. The apparatus of claim 2 , wherein the mass measuring device includes a QCM.4. The apparatus of claim 1 , wherein the mass measuring devices are disposed on lower parts of the pixels.5. The apparatus of claim 1 , wherein the mass measuring devices measure the masses of ink filled in the pixels by using frequency shifts measured as the ink is filled in the pixels.6. The apparatus of claim 1 , wherein the pixels are formed to correspond to the nozzles of the inkjet head.7. The apparatus of claim 1 , further comprising a frame on which the pixels are formed.8. The apparatus of claim 7 , wherein edges of the mass measuring devices are fixed to the frame. This application is a Divisional Application of prior application Ser. No. 12/060,425, filed on Apr. 1, 2008, in the United States Patent and Trademark Office, which claims the benefit of Korean Patent Application No. 10-2008-0010815, filed on Feb. 1, 2008, in the Korean ...

TEG pattern for detecting void in device isolation layer and method of forming the same

Provided is a test element group (TEG) pattern for detecting a void in a device isolation layer. The TEG pattern includes active regions which are parallel to each other and extend in a first direction, a device isolation layer that separates the active regions, a first contact that is formed across the device isolation layer and a first one of the active regions that contacts a surface of the device isolation layer, and a second contact that is formed across the device isolation layer and a second one of the active regions that contacts another surface of the device isolation layer.

TEG PATTERN FOR DETECTING VOID IN DEVICE ISOLATION LAYER AND METHOD OF FORMING THE SAME

Provided is a test element group (TEG) pattern for detecting a void in a device isolation layer. The TEG pattern includes active regions which are parallel to each other and extend in a first direction, a device isolation layer that separates the active regions, a first contact that is formed across the device isolation layer and a first one of the active regions that contacts a surface of the device isolation layer, and a second contact that is formed across the device isolation layer and a second one of the active regions that contacts another surface of the device isolation layer.

形成具有多晶硅-硅化钛结构的栅极的方法

... 本发明提供了一种在栅极的再氧化工序中防止栅极异常氧化，同时，可以减小栅极电阻的多晶硅-硅化物结构的栅极形成方法。包括依次形成栅极氧化膜、多晶硅膜和硅化钛膜；在硅化钛膜上，按照栅极的形状，形成屏蔽绝缘膜。接着，对屏蔽绝缘膜的屏蔽层进行腐蚀，对硅化钛膜和多晶硅膜进行腐蚀，形成栅极。又利用再氧化工序，对基板进行氧化，在上述栅极的侧面和上述基板表面上，形成厚度均匀的氧化膜。 ...

Black sealing agent composition for liquid crystal display materials

The sealing agent of the liquid crystal display materials in accordance with the invention not only can be cured via the light and heat, but also has an excellent light-shielding feature, so as to be able to prevent light leakage occurred in a liquid crystal optical cell. In addition, it is able to provide a liquid crystal optical cell having excellent electric insulation, moisture resistance and high adhesion capability.

Inkjet print head and method for manufacturing the same

An inkjet print head includes a jet assembly, a printed-circuit board and a barrier coating film. The jet assembly includes a nozzle plate including a jet orifice in a lower surface of the nozzle plate and through which ink is discharged, and an ink transfer pathway inside nozzle plate. The printed-circuit board is combined with the jet assembly. The printed-circuit board includes an integrated circuit and a connection electrode. The barrier coating film includes organic material, a flexible layer and a hydrophobic layer. The barrier coating film covers an inner and an outer surface of the jet assembly, and an outer surface of the printed-circuit board. The barrier coating film exposes the lower surface of the nozzle plate and an outer surface of the connection electrode.

Read operation for semiconductor memory devices

Disclosed is a method of performing a read operation in a NAND/RAM semiconductor memory device. The semiconductor memory device comprises a NAND flash memory device having a memory cell array and a page buffer, and a data RAM outputting data in response to a clock signal received from a host. The method comprising; sensing data stored in one page of the memory cell array in the page buffer, transferring the sensed data from the page buffer to the data RAM in multiple blocks via a corresponding number of transfer operations, and reading the transferred data from the data RAM in response to the host clock signal, wherein a read-out operation for the transferred data commences during any one of the plurality of transfer time periods.

HOST DEVICE AND SYSTEM INCLUDING THE SAME

A memory module includes a first storage module including a first module controller and a first memory unit. The first storage module is configured to receive first partial data from a host and write the first partial data to the first memory unit. A second storage module includes a second module controller and a second memory unit. The second storage module is configured to receive second partial data from the host and write the second partial data to the second memory unit. The first storage module and the second storage module are configured to connect to the host through a single host interface bus. 1. A memory module comprising:a module controller;a crossbar switch connected to the module controller via a controller channel; anda memory unit including a plurality of memory chips, the memory unit being connected to the crossbar switch via an array channel,wherein the module controller is configured to communicate with the memory unit via the controller channel and the array channel.2. The memory module of claim 1 , wherein the plurality of memory chips are a plurality of nonvolatile memory chips; andwherein the module controller is a nonvolatile module controller.3. The memory module of claim 2 , wherein the memory module is a solid state storage module.4. The memory module of claim 1 , wherein the plurality of memory chips are embodied as one or more 3D flash memory elements in which a plurality of memory cells are vertically stacked.5. The memory module of claim 2 , wherein the crossbar switch is configured to transmit chip select signals to the memory unit via the array channel such that the module controller accesses the memory unit.6. The memory module of claim 4 , wherein the memory unit is configured to indicate a status of the memory unit to the module controller by transmitting status signals indicating a write/read operation in the memory unit.7. The memory module of claim 5 , wherein the plurality of memory chips are configured to share data input ...

Display apparatus

Disclosed is a display apparatus including a liquid crystal display (LCD) panel, a front cover including first latches and second latches, a back cover coupled with the first latches, and a guide panel, on which the LCD panel is seated. The guide panel is coupled with the second latches.

Non-volatile semiconductor memory device and multi-block erase method thereof

Device and method of verifying owner of subscriber identifying module card

Datenverarbeitungssystem und Verfahren zum Extrahieren von Daten aus einem OneNAND-Flash-Speicher in ein RAM-Speicherbauelement

Die Erfindung betrifft ein Datenverarbeitungssystem und ein Verfahren zum Extrahieren von Daten aus einem OneNAND-Flash-Speicher in ein RAM-Speicherbauelement. DOLLAR A Das Datenverarbeitungssystem umfasst einen OneNAND-Flash-Speicher (160) mit einem internen nichtflüchtigen Speicher (161) und einem internen Pufferspeicher (162), der zum temporären Speichern von Seitendaten, die von dem internen nichtflüchtigen Speicher (161) stammen, eingerichtet ist; und Steuermittel (140), die derart zum Steuern von Lesevorgängen des OneNAND-Flash-Speichers (160) eingerichtet sind, dass die in dem internen Pufferspeicher (162) des OneNAND-Flash-Speichers (160) gespeicherten Seitendaten sequentiell und kontinuierlich in vielfachen Dateneinheiten von dem OneNAND-Flash-Speicher (160) an ein externes Bauelement (150) über einen Beschleunigungspuffer (141) ausgegeben werden. DOLLAR A Verwendung beispielsweise in der Speichertechnologie.

Method of controlling nozzles of inkjet head and apparatus for measuring amounts of ink ejected from nozzles of inkjet head

Provided are method of controlling nozzles of an inkjet head and an apparatus for measuring the amounts of ink ejected from the nozzles of the inkjet head. The method includes: preparing a mass measuring device, which measures the mass of ink by using an oscillation change, in a pixel; ejecting ink into the pixel from a nozzle of the inkjet head, and measuring the amount of ink ejected from the nozzle by using the mass measuring device; and adjusting a voltage waveform applied to the nozzle of the inkjet head.

LIQUID CRYSTAL DISPLAY DEVICE

A liquid crystal display device capable of preventing light leakage and vertical crosstalk thereof is disclosed. The liquid crystal display device includes a first substrate in which a pixel region and a data line region next to the pixel region are defined, a data line formed on the data line region of the first substrate with a first insulating film interposed therebetween, two outermost common electrodes of the adjacent two pixels spaced apart from opposite edges of the data line, a shield layer having two segments, each segment has one side of which overlaps an edge of the data line by a width of 0 m or more to 2 m or less and the other side of which overlaps an edge of one of the two outermost common electrodes with the first insulating film interposed therebetween, and a second substrate bonded opposite to the first substrate.

Programming method of nonvolatile memory device

Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line.

Überdruckventil für Ölpumpe mit getrennten Bypassabschnitten

Verfahren zum Betreiben einer Überdruckventilanordnung für eine Ölpumpe, umfasst Freigeben eines ersten Bypass-Einlasskanals und Sperren eines ersten Bypass-Auslasskanals, eines zweiten Bypass-Einlasskanals und eines zweiten Bypass-Auslasskanals mit einem Kolben, Einführen von Öl in die Überdruckventilanordnung, Bewegen des Kolbens durch eine erste Verschiebung in Abwärtsrichtung, um den ersten Bypass-Auslasskanal freizugeben, Beginnen eines ersten Umleitens des Öls, Bewegen des Kolbens in die Abwärtsrichtung durch eine zweite Verschiebung, um den ersten Bypass-Einlasskanal zu sperren und den zweiten Bypass-Einlasskanal freizugeben, Beenden des ersten Umleitens des Öls, Bewegen des Kolbens in die Abwärtsrichtung durch eine dritte Verschiebung, um den zweiten Bypass-Auslasskanal freizugeben, und Starten eines zweiten Umleitens des Öls.

SEMICONDUCTOR DEVICES INCLUDING TRENCH ISOLATION STRUCTURES AND METHODS OF FORMING THE SAME

Trench isolation methods include forming a first trench and a second trench in a semiconductor substrate. The second trench has a larger width than the first trench. A tower isolation layer is formed on the semiconductor substrate using a first high density plasma deposition process. The lower isolation layer has a first thickness on an upper sidewall of the first trench and a second thickness on an upper sidewall of the second trench. The second thickness is greater than the first thickness. An upper isolation layer is formed on the semiconductor substrate including the lower isolation layer using a second high density plasma deposition process, different from the first high density plasma deposition process. The second high density plasma deposition process includes an H₂ treatment process.

Piezoelektrischer Tintenstrahldruckkopf mit Temperatursensor und Verfahren zur Befestigung des Temperatursensors

Display device

Provided is a display device capable of preventing a liquid crystal from being left outside a microcavity. The display device includes: a substrate; a pixel electrode formed on the substrate; a roof layer formed on the pixel electrode so as to be spaced apart from the pixel electrode with a plurality of microcavities therebetween; a light blocking member positioned between two microcavities of the plurality of microcavities, overlapping with a first edge of one microcavity of the two microcavities, and not overlapping with a second edge of the other microcavity; an injection hole exposing a part of the microcavity; a liquid crystal layer filling the microcavity; and an encapsulation layer formed on the roof layer so as to cover the injection hole to seal the microcavity.

Gerät und Verfahren zur Zertifizierung des SIM-Karteninhabers in einem GSM Endgerät

Electro-wetting display substrate and method of manufacturing the same

An electro-wetting display substrate includes a base substrate including a gate line extending in a first direction and a data line extending in a second direction, where the first direction is different from the second direction, a switching element electrically connected to the gate line and the data line, a pixel electrode electrically connected to the switching element, a notch electrode disposed adjacent to the switching element and overlapping the pixel electrode, and a water-repellent layer disposed over the pixel electrode.

Methods of manufacturing a semiconductor device

In a method of manufacturing a semiconductor device, a mask pattern is formed on an active region of a substrate. An exposed portion of the substrate is removed to form a trench in the substrate. A preliminary first insulation layer is formed on a bottom and sidewalls of the trench and the mask pattern. A plasma treatment is performed on the preliminary first insulation layer using fluorine-containing plasma to form a first insulation layer including fluorine. A second insulation layer is formed on the first insulation layer to fill the trench. A thickness of a gate insulation layer adjacent to an upper edge of the trench may be selectively increased, and generation of leakage current may be reduced.

Nonvolatile memory device e.g. flash memory device, programming method, involves determining whether data is correctly programmed into set of memory cells based on evaluation of threshold voltage distributions of memory cells

The method involves programming data into a set of memory cells of a nonvolatile memory device, and simultaneously programming confirmation information associated with the programmed data into the memory cells. A determination is made whether the data is correctly programmed into the set of memory cells based on an evaluation of threshold voltage distributions of the memory cells. An independent claim is also included for a method of resuming a data programming operation in a nonvolatile memory device after an interruption.

Flash memory has control logic circuit that controls buffer memories and nonvolatile memory core based on address and command information in second register, and first register for storing address information for next reading operation

The flash memory (100) has a control logic circuit (140) that controls the first and second buffer memories (120,130) and the nonvolatile memory core (110) based on the address and command information stored in a second register (141). The second register is included in the control logic circuit. The address information for the next data read operation of the flash memory is stored in a first register (150) which also stores the address and command information. The nonvolatile memory core includes a nonvolatile memory block (210) that contains several memory areas, and a page buffer (220) for reading data from a selected memory area. The control logic circuit produces an enabling signal (EN) if the command information is written into the first register. A copying circuit (160) is provided to copy the address and command information, stored in the first register, into the second register in response to the enabling signal from the control logic circuit.

Gerät und Verfahren zur Zertifizierung des SIM-Karteninhabers in einem GSM Endgerät

Semiconductor device

A semiconductor device is provided. The semiconductor device includes a bottom electrode on a substrate. The support pattern is disposed between the bottom electrodes in a plan view. The top electrode covers the bottom electrode and the support pattern. The dielectric layer is disposed between the bottom electrode and the top electrode and between the support pattern and the top electrode. The cap pattern is interposed between the bottom electrode and the dielectric layer and between the support pattern and the dielectric layer. The cover pattern covers at least a portion of a side surface of the support pattern and extends to cover a top surface of the support pattern and a top surface of the bottom electrode.

Mask having assist pattern

A mask may include a circuit area and a pixel area. The circuit area includes a circuit pattern. The pixel area includes a pixel pattern which is extended in a length direction and an assist pattern which is at an end portion of the pixel pattern and adjacent to the circuit area.

Display panel, color filter substrate, and method of manufacturing the same

A display panel includes; a substrate, and a light blocking structure surrounding an ink filling region on the substrate, the light blocking structure including; a first layer pattern having an ink affinity characteristic disposed on the substrate, and a second layer pattern positioned on the first layer pattern and including an organic material having a light blocking characteristic.

Ink supply apparatus of inkjet printing system

An ink supply apparatus of an inkjet printing system includes an ink tank including a pressure port and an ink supply opening connected to a print head, a flexible ink package connected to the ink supply opening to accommodate ink, and a pressure supply device to supply a purging pressure to the ink package by supplying a pressure fluid to the ink tank.

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a semiconductor memory device that improves the contact resistance characteristics of a gate by increasing the area of an active region contacting the gate and increases the channel width in a process of forming a vertical transistor, and to provide a method of manufacturing the same. SOLUTION: A semiconductor memory device comprises: lower pillars formed so as to extend in a first direction; upper pillars 315 formed on the lower pillars so as to protrude in a second direction perpendicular to the first direction; buried bit-line junction regions 265 disposed on one side wall of each lower pillar; buried bit lines 280 filling portions of trenches; first interlayer insulating films 290 that are formed on etching stop films 285a and are recessed so as to expose at least portions of the outer peripheral side surfaces of the upper pillars; second interlayer insulating films 295 formed on the first interlayer insulating films; and gates 320a that cover the outer ...

Deep ultraviolet light emitting diode

According to the present invention, a deep ultraviolet light emitting diode is provided. The deep ultraviolet light emitting diode according to one embodiment comprises: a substrate; the n-type semiconductor layer is located on the substrate; a mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer, and having a plurality of vias exposing the n-type semiconductor layer; the n ohmic contact layer is in contact with the n-type semiconductor layer in the through hole; a p ohmic contact layer in contact with the p-type semiconductor layer; the n pad metal layer is electrically connected with the n ohmic contact layer; the p pad metal layer is electrically connected with the p ohmic contact layer; the n bumps are electrically connected with the n pad metal layers; and a p bump electrically connected to the p pad metal layer, in which the p pad metal layer is formed to surround the n pad metal layer.

AUTHENTICATION DEVICE BASED ON BIOMETRIC INFORMATION AND OPERATION METHOD THEREOF

A biometric information based authentication device includes a seed data generator which generates seed data comprising biometric information and having a first length, an encryptor which encrypts the seed data to generate a first encryption value and a second encryption value having a second length, wherein the first encryption value and the second encryption value are different from each other, and an authentication information generator which generates at least one of a public key and a private key based on each of the first encryption value and the second encryption value which are input. The private key is discarded after use.

Non-volatile semiconductor memory device and multi-block erase method thereof

A non-volatile semiconductor memory device includes memory blocks and an erase controller configured to control a multi-block erase operation where at least two of the memory blocks are simultaneously erased. According to some embodiments, after selecting and simultaneously erasing the selected memory blocks, an erase verify operation for each of the erased memory blocks is performed according to an externally provided erase verify command and block address. According to some embodiments, if a suspend command is received by the memory device while selected memory blocks are being erased, the erase operation ceases and another operation, such as a read operation, begins. When a resume command is received by the memory device, the erase operation resumes. Other embodiments are described and claimed.

Thermal actuation pump

A simple structured thermal actuation pump for reducing energy loss is provided. The thermal actuation pump includes: a first chamber having at least one working fluid inlet and at least one working fluid outlet; a second chamber having at least one working fluid inlet and at least one working fluid outlet; and a thermoelectric element arranged between the first chamber and the second chamber and including one side being cooled and the other side being heated according to a direction of current for changing inside pressures of the first chamber and the second chamber.

Methods of manufacturing semiconductor devices

In a method of manufacturing a semiconductor device, a conductive layer pattern may be formed on a substrate. An oxide layer may be formed on the substrate to cover the conductive layer pattern. A diffusion barrier layer may be formed by treating the oxide layer to increase an energy required for a diffusion of impurities. An impurity region may be formed on the substrate by implanting impurities into the conductive layer pattern and a portion of the substrate adjacent to the conductive layer pattern, through the diffusion barrier. The impurities in the conductive layer pattern and the impurity region may be prevented or reduced from diffusing, and therefore, the semiconductor device may have improved performance.

Multi-chip package device having alternately-enabled memory chips

A multi-chip package device includes first and second memory chips configured to share addresses and control signals. The first and second memory chips each include main memory, buffer memory, an option terminal for receiving an option voltage, an access signal generation block, and a controller. The main memory of the first memory chip stores boot code. The buffer memory of the first memory chip includes boot memory. The option voltages of the first and second memory chips have different voltage levels. The access signal generation block generates a buffer access signal that undergoes a one-way transition in response to the boot code address. The one-way transition of the buffer access signal of the first memory chip is a transition to activation, and the one-way transition of the buffer access signal of the second memory chip is a transition to inactivation.

Read operation for semiconductor memory devices

Disclosed is a method of performing a read operation in a NAND/RAM semiconductor memory device. The semiconductor memory device comprises a NAND flash memory device having a memory cell array and a page buffer, and a data RAM outputting data in response to a clock signal received from a host. The method comprising; sensing data stored in one page of the memory cell array in the page buffer, transferring the sensed data from the page buffer to the data RAM in multiple blocks via a corresponding number of transfer operations, and reading the transferred data from the data RAM in response to the host clock signal, wherein a read-out operation for the transferred data commences during any one of the plurality of transfer time periods.

Display device

The present disclosure provides a display device including: a base layer; the circuit layer is arranged on the base body layer, and the circuit layer comprises a plurality of pixel circuits and a plurality of sensor circuits; a pixel element layer on the circuit layer, the pixel element layer including a plurality of light emitting elements connected to the plurality of pixel circuits, respectively, and a plurality of light receiving elements connected to the plurality of sensor circuits, respectively; the packaging layer covers the pixel element layer; and a touch sensing layer on the encapsulation layer, the touch sensing layer including a conductive pattern forming a plurality of touch electrodes for sensing a touch. The plurality of light-emitting elements includes a plurality of light-emitting layers, respectively, and the plurality of light-receiving elements includes a plurality of light-receiving layers, respectively. The conductive pattern includes a plurality of main patterns ...

Methods of fabricating semiconductor devices using a plasma process with non-silane gas including deuterium

Semiconductor devices are fabricated using a plasma process with a non-silane gas that includes deuterium, and which may result in improved device reliability and/or other improved device operational characteristics. One such method can include forming a gate oxide layer on a transistor region, which is defined on a substrate, and forming a gate electrode on the gate oxide layer. An etch stop layer is formed on the gate oxide layer and the gate electrode. A plasma process is performed on the interface between the gate oxide layer and the substrate using a non-silane treatment gas including deuterium. An interlayer dielectric layer is formed on the etch stop layer. A bottom metal line is formed on the interlayer dielectric layer.

Programming method of nonvolatile memory device

Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line.

Piston structure of engine

A piston structure of an engine generates an automatic flow of gas through a hole penetrating from a bowl of the piston toward a lateral side of the piston. The structure provides a reinforcement of the compression and swirling movement in the combustion chamber of an engine, improvement of the mixture function of the fuel and air, reduction of the blowby leaking into the crankcase through the clearance between the cylinder wall and the piston, and prevention of the wear and tear of the cylinder liner and piston by eliminating wet fuel formed on the cylinder wall.

Flat heat transferring device and method of fabricating the same

A flat heat transferring device includes a lower plate, an upper plate, a wick plate, and a liquid-phase coolant. The lower plate contacts a heat source at its bottom. The upper plate is hermetically coupled with the lower plate along its edge to form a void therebetween. The wick plate is positioned between the upper plate and the lower plate and is stuck to the lower plate by surface tension of the liquid-phase coolant. The liquid-phase coolant transfers heat transferred from the heat source from the vaporization part to the condensing part circulating between the vaporization part and the condensing part. Here, the wick plate includes a plurality of holes and a plurality of planar wicks and makes the liquid-phase coolant flow from the condensing part to the vaporization part by capillary force between itself and the lower plate.

Method of controlling nozzles of inkjet head and apparatus for measuring amounts of ink ejected from nozzles of inkjet head

Provided are method of controlling nozzles of an inkjet head and an apparatus for measuring the amounts of ink ejected from the nozzles of the inkjet head. The method includes: preparing a mass measuring device, which measures the mass of ink by using an oscillation change, in a pixel; ejecting ink into the pixel from a nozzle of the inkjet head, and measuring the amount of ink ejected from the nozzle by using the mass measuring device; and adjusting a voltage waveform applied to the nozzle of the inkjet head.

Light-emitting diode with high efficiency

Disclosed herein is a light emitting diode. The light emitting diode includes: a light emitting structure including a second conductive type semiconductor layer, an active layer disposed on an upper surface of the second conductive type semiconductor layer, and a first conductive semiconductor layer disposed on an upper surface of the active layer; at least one first electrode electrically connected to the first conductive type semiconductor layer; a current blocking layer disposed on a lower surface of the light emitting structure; and a second electrode electrically connected to the second conductive type semiconductor layer, wherein the second electrode includes a first reflective metal layer adjoining the second conductive type semiconductor layer and a second reflective metal layer covering a lower surface of the current blocking layer and a lower surface of the first reflective metal layer while adjoining a portion of the second conductive type semiconductor layer, and wherein contact ...

APPARATUS AND METHOD FOR MEASURING THICKNESS OF INK LAYER IN PIXEL

Provided are an apparatus and method for measuring the thickness of an ink layer in a pixel and a method of controlling nozzles of an inkjet head using the apparatus and method. The apparatus includes: a substrate; a plurality of pixels disposed on the substrate and filled with ink due to a printing operation; first and second electrodes corresponding to the pixels, the first and second electrodes disposed on opposite sides of each of the pixels; and a capacitance measurement circuit electrically connected to the first and second electrodes to measure the capacitance of each of the pixels.

Methods for programming user data and confirmation information in nonvolatile memory devices

Method of programming nonvolatile memory devices are provided in which data is programmed into a first plurality of memory cells of the nonvolatile memory device. At the same time associated programming confirmation information is programmed into at least one second memory cell of the nonvolatile memory device. Then, a determination is made as to whether the data was correctly programmed into the first plurality of memory cells based on an evaluation of (1) the threshold voltage distributions of at least some of the first plurality of memory cells and (2) the threshold voltage distribution of the at least one second memory cell. Methods of resuming a data programming operation after an interruption such as a loss of power are also provided.

Integrated structure of ion filter and reservoir

According to an embodiment of the present invention, an integrated structure of an ion filter and a reservoir is provided. The integrated structure of the ion filter and the liquid storage device comprises the liquid storage device for storing cooling liquid for cooling the fuel cell stack; the ion filter is positioned in the liquid storage device; the control valve is positioned in the liquid storage device and is opened or closed, so that the cooling liquid flows into the ion filter; wherein the reservoir is divided into a first region in which the ion filter is located by opening or closing the control valve and a second region which is a space other than the first region, and the first region and the second region are connected by an air ventilation unit through which air passes.

Liquid crystal display device

A liquid crystal display device capable of preventing light leakage and vertical crosstalk thereof is disclosed. The liquid crystal display device includes a first substrate in which a pixel region and a data line region next to the pixel region are defined; a data line formed on the data line region of the first substrate with a first insulating film interposed therebetween; two outermost common electrodes of the adjacent two pixels spaced apart from opposite edges of the data line; a shield layer having two segments, each segment has one side of which overlaps an edge of the data line by a width of 0 micron or more to 2 microns or less and the other side of which overlaps an edge of one of the two outermost common electrodes with the first insulating film interposed therebetween; and a second substrate bonded opposite to the first substrate.

Method of fabricating flash memory device

A method of fabricating a flash memory device includes defining a high voltage region and a low voltage region on a substrate. The high voltage region provides an area for one or more first transistors configured to operation at a first voltage, the low voltage region providing an area for one or more second transistors configured to operation at a second voltage that is lower than the first voltage, each first transistor having a gate and a source/drain region on each side of the gate. A first impurity region is formed as part of the source/drain region, the first impurity region having a first depth from an upper surface of the substrate, the first impurity region being of first conductivity having a first impurity concentration. A second impurity is formed as part of the source/drain region, the second impurity region having a second depth from the upper surface of the substrate that is less than first depth, the second impurity region being of the first conductivity and having a second ...

Photoresist composition and method of forming a metal pattern using the same

A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer, a mercaptopropionic acid compound and a solvent. The coating layer is exposed to a light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask.

METHOD OF CONTROLLING NOZZLES OF INKJET HEAD AND APPARATUS FOR MEASURING AMOUNTS OF INK EJECTED FROM NOZZLES OF INKJET HEAD

Provided are method of controlling nozzles of an inkjet head and an apparatus for measuring the amounts of ink ejected from the nozzles of the inkjet head. The method includes: preparing a mass measuring device, which measures the mass of ink by using an oscillation change, in a pixel; ejecting ink into the pixel from a nozzle of the inkjet head, and measuring the amount of ink ejected from the nozzle by using the mass measuring device; and adjusting a voltage waveform applied to the nozzle of the inkjet head.

Authentication device based on biometric information, control server connected to the same, and login method based on biometric information thereof

A method of providing a login to website requested from a computing device, by a biometric information based authentication device which interworks with a control server, is provided. The method includes detecting a login request message transmitted from the computing device to a website server providing the website, extracting login session information from the login request message, outputting an authentication result with respect to received biometric information, and transmitting authentication information comprising the login session information and the authentication result to the control server. The login session information is transmitted from the control server to the website server to determine, by the website server, the login allowance of the website.

Relief valve for oil pump having separated bypass period

A method of operating a relief valve assembly for an oil pump includes unblocking a first bypass inlet passage and blocking a first bypass outlet passage, a second bypass inlet passage, and a second bypass outlet passage with a plunger, introducing oil to the relief valve assembly, moving the plunger in a downward direction by a first displacement to unblock the first bypass outlet passage, starting a first bypass of the oil, moving the plunger in the downward direction by a second displacement to block the first bypass inlet passage and unblock the second bypass inlet passage, terminating the first bypass of the oil, moving the plunger in the downward direction by a third displacement to unblock the second bypass outlet passage, and starting a second bypass of the oil.

Piezolelectric inkjet printhead having temperature sensor and method of making the same

A piezoelectric inkjet printhead having a channel forming plate including an ink channel having a pressure chamber coupled to a nozzle, a piezoelectric actuator including a lower electrode on the channel forming plate, a piezoelectric element on the lower electrode, and an upper electrode on the piezoelectric element, the piezoelectric actuator corresponding to the pressure chamber, an insulation element on the lower electrode and spaced apart from the piezoelectric element, a first electrode on the insulation element, and a temperature sensor on the first electrode, and a method of making the same.

Microcooling device

A microcooling device is provided. The microcooling device includes a substrate, a microchannel array, and a condenser. A predetermined region of a lower surface of the substrate contacts a heat source. The microchannel array is placed on the substrate so that a coolant concentrating portion is opposite to the predetermined region of the lower surface. The condenser fixes the microchannel array, condenses vapor generated in a process of cooling the heat source, and allows the condensed vapor to flow into the microchannel array.

Programming method of nonvolatile memory device

Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line.

Non-volatile semiconductor memory device and multi-block erase method thereof

A non-volatile semiconductor memory device includes memory blocks and an erase controller configured to control a multi-block erase operation where at least two of the memory blocks are simultaneously erased. According to some embodiments, after selecting and simultaneously erasing the selected memory blocks, an erase verify operation for each of the erased memory blocks is performed according to an externally provided erase verify command and block address. According to some embodiments, if a suspend command is received by the memory device while selected memory blocks are being erased, the erase operation ceases and another operation, such as a read operation, begins. When a resume command is received by the memory device, the erase operation resumes. Other embodiments are described and claimed.

Appparatus and method for controlling power to USB device

The present invention relates to an apparatus and method for controlling power to a Universal Serial Bus (USB) device. The present invention provides an apparatus for controlling power to a USB device, the USB device being used to connect a Personal Computer (PC) with a peripheral device, the power control apparatus including a plug-in port for connecting the peripheral device with the PC, a state detector for detecting whether the peripheral device is in a preparation completion state, a power supply unit for supplying power to the USB device, and a power control unit for controlling the power supply unit so that power is supplied to the USB device if it is determined that the peripheral device is in a plugged-in state, and if it is determined that the peripheral device is in a preparation completion state by the state detector. Accordingly, the present invention performs the supply of power only when the peripheral device is plugged into the USB device and its internal application program ...

NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME

A nonvolatile memory device includes a plurality of gate structures, each gate structure formed over a substrate and including a tunnel insulating layer, a floating gate, an inter-gate dielectric layer, and a control gate, which are sequentially stacked, and an interlayer dielectric layer covering the plurality of gate structures and having an air gap formed between adjacent gate structures, wherein the bottom surface of the air gap is positioned at a lower level than the surface of the tunnel insulating layer. 1. A nonvolatile memory device comprising:a plurality of gate structures formed over a substrate, wherein each gate structure comprises a tunnel insulating layer, a floating gate, an inter-gate dielectric layer, and a control gate, which are sequentially stacked over the substrate; andan interlayer dielectric layer covering the plurality of gate structures and having an air gap formed between a gate structure and another gate structure adjacent thereto,wherein the bottom surface of the air gap is positioned at a lower level than the surface of the tunnel insulating layer.2. The nonvolatile memory device of claim 1 , wherein the tunnel insulating layer exists even under the air gap claim 1 , and whereinthe surface of a first portion of the tunnel insulating layer under the air gap is positioned at a lower level than the surface of a second portion of the tunnel insulating layer under the floating gate.3. The nonvolatile memory device of claim 1 , wherein the tunnel insulating layer does not exist under the air gap.4. The nonvolatile memory device of claim 1 , wherein the surface of a first portion of the substrate under the air gap is positioned at a lower level than the surface of a second portion of the substrate under the gate structure.5. The nonvolatile memory device of claim 1 , wherein the gap is surrounded by the interlayer dielectric layer.6. The nonvolatile memory device of claim 2 , wherein the bottom surface of the air gap is directly contacted ...

Liquid crystal display device

PROGRAMMING METHOD OF NONVOLATILE MEMORY DEVICE

Provided is a programming method of a nonvolatile memory device which includes a plurality of strings each including a source select transistor, a plurality of memory cells, and a drain select transistor which are connected in series between a common source line and a bit line. The programming method includes: applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; and applying a second voltage increased more than the first in voltage to the common source line during a second period in which a selected memory cell is programmed, when a selected word line belongs to a word line group adjacent to the common source line. 1. A programming method for a nonvolatile memory device that includes a plurality of strings , each including a source select transistor , a plurality of memory cells , and a drain select transistor that are connected in series between a common source line and a bit line , the programming method comprising:applying a first voltage to the common source line during a first period in which a channel of a plurality of memory cells of an unselected string is floated; andapplying, when a selected word line belongs to a word line group adjacent to the common source line, a second voltage that is greater than the first voltage to the common source line during a second period in which a selected memory cell, of the plurality of memory cells, is programmed.2. The programming method of claim 1 , where the second period comprises:a program voltage application period in which a program voltage is applied to the selected word line, andthe second voltage is applied to the common source line during the program voltage application period.3. The programming method of claim 1 , where the second period comprises:a pass voltage application period in which a pass voltage is applied to the selected word line, anda program voltage application period in which a program ...

PHOTORESIST COMPOSITION AND METHOD OF FORMING A METAL PATTERN USING THE SAME

A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer, a mercaptopropionic acid compound and a solvent. The coating layer is exposed to a light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask. 1. A photoresist composition comprising:a binder resin;a photo-sensitizer;a mercaptopropionic acid compound; anda solvent.2. The photoresist composition of claim 1 , comprising about 5% to about 50% by weight of the binder resin claim 1 , about 0.5% to about 30% by weight of the photo-sensitizer claim 1 , about 0.1% to about 2% by weight of the mercaptopropionic acid compound and a remainder of the solvent.3. The photoresist composition of claim 2 , wherein the binder resin is alkali-soluble claim 2 , and wherein the binder resin is selected from the group consisting of an acrylic resin claim 2 , a novolac resin and a combination thereof.4. The photoresist composition of claim 3 , wherein a weight average molecular weight of the binder resin is about 4 claim 3 ,000 to about 15 claim 3 ,000 claim 3 , and wherein the binder resin is a novolac resin prepared through a condensation reaction of a mixture including m-cresol and p-cresol with formaldehyde in the presence of oxalic acid catalyst.5. The photoresist composition of claim 2 , wherein the photo-sensitizer comprises a product of reaction of a naphthoquinone diazide sulfonate halogen compound with a phenol compound.6. The photoresist composition of claim 5 , wherein the photo-sensitizer is selected from the group consisting of 2 claim 5 ,3 claim 5 ,4-trihydroxybenzophenone-1 claim 5 ,2-naphthoquinonediazide-5-sulfonate claim 5 , 2 claim 5 ,3 claim 5 ,4 claim 5 ,4-tetrahydroxybenzophenone-1 claim 5 ,2-naphthoquinonediazide-5- ...

Method for forming patterns of non-display part

Disclosed is a method for forming patterns of a non-display part which includes: coating a surface of a pad with ink; and pressing the pad onto a concave groove which is formed on a non-display part of one surface of a cover window glass so as to form patterns thereon with the ink transferred into the groove, thereby it is possible to form patterns on a groove which is deeply concaved as well with a high accuracy, and the inventive method may be applied to a cover window glass with a large area on which a plurality of unit cells are formed.

Inkjet print head and method of manufacturing the same

An inkjet print head includes a main body including carbon allotrope, and an ink storage configured to store an ink and including a space defined in the main body. A protecting layer is on an inner surface of the main body, and includes parylene. An inorganic layer is on the protecting layer. An organic layer is on the inorganic layer.

APPPARATUS AND METHOD FOR CONTROLLING POWER TO USB DEVICE

The present invention relates to an apparatus and method for controlling power to a Universal Serial Bus (USB) device. The present invention provides an apparatus for controlling power to a USB device, the USB device being used to connect a Personal Computer (PC) with a peripheral device, the power control apparatus including a plug-in port for connecting the peripheral device with the PC, a state detector for detecting whether the peripheral device is in a preparation completion state, a power supply unit for supplying power to the USB device, and a power control unit for controlling the power supply unit so that power is supplied to the USB device if it is determined that the peripheral device is in a plugged-in state, and if it is determined that the peripheral device is in a preparation completion state by the state detector. Accordingly, the present invention performs the supply of power only when the peripheral device is plugged into the USB device and its internal application program ...

CUTTING INSERT AND CUTTING TOOL MOUNTED WITH THE SAME

A cutting insert according to an embodiment of the present invention is a double-sided cutting insert including an upper surface, a lower surface, a side surface, a cutting edge, and a mounting hole penetrating through the upper surface and the lower surface, in which the upper surface is provided with a planar single upper surface boss unit surrounding the mounting hole, the cutting edge includes a main cutting edge, a corner cutting edge connected to the main cutting edge, a sub-cutting edge connected to the corner cutting edge, and an edge portion connected to the sub-cutting edge. A first main cutting edge flank face connected to the main cutting edge and an extension line of the upper surface boss unit form an acute angle, and a secondary cutting edge chip breaking surface connected to the secondary cutting edge and an extension line of the upper surface boss unit form an angle that increases away from the corner cutting edge. When the cutting insert is viewed from the upper surface ...

Sealant composition for display element for improving liquid crystal contamination and sealant formed by curing the same

This invention relates to a curable resin composition for a liquid crystal display device used for producing a liquid crystal display element, and more particularly to a curable resin composition for a liquid crystal display device which uses a saline coupling agent for improving the liquid crystal contamination to enhance the photocurable property and the thermosetting property such that the liquid crystal contamination is less to achieve the excellent adhesion strength after being cured.

Method and apparatus for producing nano-sized silver particles using electrolysis

Provided is a method and apparatus for producing silver nanoparticles in uniform shape and size using an electrolysis eco-friendly and in a simple way. The silver nanoparticles producing method includes the steps of: dissolving a reducing agent and an electrolyte into water in a reaction vessel to thereby prepare an electrolytic solution; placing a cathode rod that is made of a material different from that of silver nanoparticles to be obtained in the electrolytic solution so as to rotate in the reaction vessel, and placing at least one anode made of silver (Ag) at a certain distance from the cathode rod; ionizing the silver at the anode by an electrolysis in which direct-current (DC) power is applied between the cathode rod and the anode while rotating the cathode rod, so as to suppress silver crystallines on the surface of the cathode rod while stirring the electrolytic solution, to thereby form silver ions in the electrolytic solution; and reducing the silver ions by the reducing agent to thereby form the silver nanoparticles.

ELECTRODE OF HIGH-DENSITY SUPER CAPACITOR AND METHOD FOR MANUFACTURING SAME

Provided is a supercapacitor electrode that is coupled on one side or both sides of a collector, in which the supercapacitor electrode consists of a carbon material that forms an electric double layer, in which the carbon material consists of: a powder-shaped electrode active material; a powder-shaped conductive material; and a fibrous carbon material of a aspect ratio of 3-33. The supercapacitor electrode can be implemented into a high-capacitance or high-power supercapacitor together with low equivalent series resistance. 1. A supercapacitor electrode that is coupled on one side or both sides of a collector , the supercapacitor electrode consisting of a carbon material that forms an electric double layer , wherein the carbon material consists of:a powder-shaped electrode active material;a powder-shaped conductive material; anda fibrous carbon material of a aspect ratio of 3-33.2. The supercapacitor electrode according to claim 1 , wherein the carbon material consists of:the fibrous carbon material of 1-10 wt %;the powder-shaped electrode active material of 71-81 wt %; andthe powder-shaped conductive material of 5-15 wt %, and wherein the carbon material further consists of: a binder of 5-12 wt %.3. The supercapacitor electrode according claim 1 , wherein the fibrous carbon material is at least one selected from the group consisting of carbon nanofiber (CNF) of 300-1000 nm in diameter and an activated carbon nano fiber (ACNF) of 300-1000 nm in diameter.4. The supercapacitor electrode according to claim 1 , wherein the powder-shaped electrode active material is activated carbon powder (ACP) having an average particle diameter of 10-30 μm.5. The supercapacitor electrode according to claim 1 , wherein the powder-shaped conductive material has an average particle diameter of 3-7 nm claim 1 , and is at least one selected from the group consisting of carbon black (CB) claim 1 , graphite claim 1 , vapor grown carbon fiber (VGCF) claim 1 , and carbon aerogel.6. A method of ...

Photoresist resin composition and method of forming patterns by using the same

A method for forming a pattern includes forming a photosensitive film by coating a photosensitive resin composition on a substrate, exposing the photosensitive film to light through a mask that includes a light transmission region and a non-light transmission region, coating a developing solution on the photosensitive film, and forming a photosensitive film pattern by baking the photosensitive film, wherein the photosensitive resin composition includes an alkali soluble base resin, a photoacid generator and a photoactive compound.

X-RAY IMAGING APPARATUS AND METHOD OF OPERATING THE SAME

An apparatus including a scintillator panel which absorbs X-rays radiated from an X-ray generator and converts the X-rays into visible light; an image detector including a plurality of pixels arranged in a matrix array and charging the plurality of pixels with electric charges proportional to intensity of the visible light converted by the scintillator panel; a gate driver which selects a line in the image detector and applies a drive signal to pixels in the selected line; an automatic exposure request signal generator which generates an automatic exposure request signal as a trigger signal informing of X-ray radiation through detection of X-rays radiated from the X-ray generator; and a controller which controls a time point of performing an exposure operation depending on a state of the drive signal applied to the pixels of the selected line in response to the automatic exposure request signal is disclosed. 1. An X-ray imaging apparatus comprising:a scintillator panel which absorbs X-rays radiated from an X-ray generator and converts the X-rays into visible light;an image detector including a plurality of pixels arranged in a matrix array and charging the plurality of pixels with electric charges proportional to intensity of the visible light converted by the scintillator panel;a gate driver which selects a line in the image detector and applies a drive signal to pixels in the selected line; anda controller which controls a time point of performing an exposure operation depending on a state of the drive signal applied to the pixels of the selected line in response to an exposure request signal informing of X-ray radiation from the X-ray generator.2. The X-ray imaging apparatus according to claim 1 , wherein the controller completes preparation for the exposure operation after application of the drive signal is completed claim 1 , when the drive signal applied to the pixels of the selected line is in an active state at a time point of receiving the exposure request ...

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device includes a semiconductor substrate including a first driving transistor region having a first driving transistor disposed therein and a second driving transistor region having a second driving transistor disposed therein, wherein the second driving transistor is driven at a lower voltage than the first driving transistor, a first gate insulating layer formed at edges of the second driving transistor region, and a second gate insulating layer formed at a center of the second driving transistor region, wherein the first gate insulating layer is thicker than the second gate insulating layer. 1. A semiconductor device , comprising:a semiconductor substrate including a first driving transistor region having a first driving transistor disposed therein and a second driving transistor region having a second driving transistor disposed therein, wherein the second driving transistor is driven at a lower voltage than the first driving transistor;a first gate insulating layer formed at edges of the second driving transistor region; anda second gate insulating layer formed at a center of the second driving transistor region,wherein the first gate insulating layer is thicker than the second gate insulating layer.2. The semiconductor device of claim 1 , further comprising a third gate insulating layer formed at the first driving transistor region and having the same thickness as the first gate insulating layer.3. The semiconductor device of claim 1 , further comprising a fourth gate insulating layer provided over the semiconductor substrate in a select transistor region of a cell array region and having the same thickness as the first gate insulating layer claim 1 ,wherein the semiconductor substrate further includes the cell array region having the select transistor region and memory cell region.4. The semiconductor device of claim 1 , further comprising an impurity implanted-region provided in the semiconductor substrate adjacent to the first gate ...

VIBRATION CONVERTING CHAIR

Disclosed is a vibration converting chair to be able to most effectively transmit the vibration energy of a transducer by molding a spring material in all-in-one form within a foam sponge which is a material of a cushion or a back piece of a chair and by implementing a new type of vibration transmission method to fix a transducer, which converts acoustic signals into vibrations, on the spring material within the foam sponge in a free condition, and therefore, for a sitter to be able to experience more detailed three-dimensional vibrations, and on the other hand, to be enable to enhance the durability of the foam sponge with the pressure dispersed by combining the spring and the mesh materials molded within the foam sponge in all-in-one form, and eventually to be able to improve the effects of experiencing the vibrations by maximally spreading the vibrations. 1. A vibration converting chair , characterized by the structure able to effectively transmit the vibration energy of a transducer by using the free supporting structure of a spring , which comprises a foam sponge which constructs a chair body , a spring for transmitting vibrations , and a transducer which converts sound signals into vibrations:said spring in a platy form bent several times, supported by all-in-one within a foam sponge; and,said transducer arranged in a groove for transducer in the back side of said spring, structured by being clamped and fixed with screws on a transducer bracket which is arranged on the front side of said spring.2. A vibration converting chair of claim 1 , wherein a mesh which disperses the pressure on said sponge and spreads vibrations passing from said transducer is arranged on one side of said spring over the whole area of said spring in all-in-one form within said foam sponge.3. A vibration converting chair of claim 1 , wherein a transducer-mounting spacer is interposed between a transducer bracket and said transducer which is clamped to said transducer bracket with said ...

DISPLAY PANEL, COLOR FILTER SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME

A display panel includes; a substrate, and a light blocking structure surrounding an ink filling region on the substrate, the light blocking structure including; a first layer pattern having an ink affinity characteristic disposed on the substrate, and a second layer pattern positioned on the first layer pattern and including an organic material having a light blocking characteristic. 1. A color filter substrate comprising: a first layer pattern which has an ink affinity characteristic, wherein the first layer pattern is disposed on the substrate; and', 'a second layer pattern positioned on the first layer pattern and including an organic material which has a light blocking characteristic; and, 'a light blocking structure which surrounds an ink filling region on a substrate, wherein the light blocking structure comprisesa color filter which includes at least one of a red color filter, a green color filter, and a blue color filter disposed within the ink filling region through inkjet printing.2. The color filter substrate of claim 1 , wherein the first layer pattern includes a metal having the ink affinity characteristic claim 1 , and the second layer pattern is plasma treated to have an ink resistance characteristic.3. The color filter substrate of claim 2 , wherein the first layer pattern includes a plurality of separate portions wherein adjacent portions are separated by a first interval to form a pair claim 2 , and the second layer pattern fills the first interval.4. A method for manufacturing a display panel claim 2 , the method comprising:disposing a first layer pattern which has an ink affinity characteristic and wherein the first layer pattern surrounds an ink filling region on a substrate;covering the first layer pattern on the substrate with a second layer pattern, wherein the second layer pattern includes an organic material which has a light blocking characteristic;plasma treating the second layer pattern to provide the second layer pattern with an ink ...

ELECTRO-WETTING DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

An electro-wetting display substrate includes a base substrate including a gate line extending in a first direction and a data line extending in a second direction, where the first direction is different from the second direction, a switching element electrically connected to the gate line and the data line, a pixel electrode electrically connected to the switching element, a notch electrode disposed adjacent to the switching element and overlapping the pixel electrode, and a water-repellent layer disposed over the pixel electrode. 1. An electro-wetting display substrate comprising:a base substrate including a gate line extending in a first direction and a data line extending in a second direction, wherein the first direction is different from the second direction;a switching element electrically connected to the gate line and the data line;a pixel electrode electrically connected to the switching element;a notch electrode disposed adjacent to the switching element and overlapping the pixel electrode; anda water-repellent layer disposed over the pixel electrode.2. The electro-wetting display substrate of claim 1 , whereinthe notch electrode overlaps a contact electrode extending from a drain electrode of the switching element.3. The electro-wetting display substrate of claim 2 , further comprising:a storage line spaced apart from a gate electrode of the switching element and overlapping the pixel electrode,wherein the contact electrode extends along the storage line.4. The electro-wetting display substrate of claim 3 , further comprising:a first insulating layer disposed between the storage line and the contact electrode;a second insulating layer disposed between the contact electrode and the pixel electrode; anda third insulating layer disposed between the pixel electrode and the notch electrode,wherein the storage line, the contact electrode and the first insulating layer define a first capacitor, andwherein the pixel electrode, the notch electrode and the third ...

METHOD FOR DROPPING LIQUID CRYSTAL AND METHOD FOR MANUFACTURING LIQUID CRYSTAL DISPLAY USING THE SAME

A liquid crystal dropping method and a liquid crystal display manufacturing method using the same are disclosed. The method for dropping a liquid crystal includes dropping a liquid crystal along a plurality of liquid crystal dropping routes on a display panel where a plurality of pixels are arranged in a matrix form, wherein a relative position of a first liquid crystal dropping route passing a first pixel among the plurality of pixels with respect to the first pixel, and a relative position of a second liquid crystal dropping route passing a second pixel among the plurality of pixels with respect to the second pixel, are substantially equivalent to each other. 1. A method for dropping a liquid crystal , the method comprising:dropping a liquid crystal along a plurality of liquid crystal dropping routes on a display panel where a plurality of pixels are arranged in a matrix form,wherein a relative position of a first liquid crystal dropping route passing a first pixel among the plurality of pixels with respect to the first pixel, is substantially equivalent to a relative position of a second liquid crystal dropping route passing a second pixel among the plurality of pixels with respect to the second pixel.2. The method of claim 1 , wherein an edge of the first pixel and an edge of the second pixel corresponding to each other are respectively referred as a first edge and a second edge claim 1 , anda distance between the first liquid crystal dropping route and the first edge and a distance between the second liquid crystal dropping route and the second edge are substantially equivalent to each other.3. The method of claim 2 , wherein a plurality of liquid crystal dots are formed along a liquid crystal dropping route of the plurality of liquid crystal dropping routes claim 2 , anda diameter of the liquid crystal dot is less than a longest length of a pixel.4. The method of claim 3 , wherein a step difference of a surface of the display panel corresponding to the first ...

Method of jetting a liquid crystal, liquid crystal jetting apparatus for performing the method and method of manufacturing a liquid crystal panel using the apparatus

A method of jetting a liquid crystal includes loading a substrate on a stage, controlling a surface temperature of an inkjet head and a substrate to be a setting temperature, and jetting the liquid crystal molecules on the substrate having the setting temperature.

MASK HAVING ASSIST PATTERN

A mask may include a circuit area and a pixel area. The circuit area includes a circuit pattern. The pixel area includes a pixel pattern which is extended in a length direction and an assist pattern which is at an end portion of the pixel pattern and adjacent to the circuit area. 1. A mask comprising:a circuit area comprising a circuit pattern; and a pixel pattern extended in a length direction; and', 'an assist pattern adjacent to the circuit area and at an end portion of the pixel pattern., 'a pixel area comprising2. The mask of claim 1 , wherein the assist pattern is connected to and extended from the end portion of the pixel pattern.3. The mask of claim 2 , wherein the assist pattern comprises two sub-assist patterns extended from the end portion of the pixel pattern.4. The mask of claim 3 , wherein the two sub-assist patterns are extended from corners of the pixel pattern.5. The mask of claim 4 , wherein each of the sub-assist patterns has a square shape.6. The mask of claim 5 , wherein a center of the square shape of the sub-assist pattern is on an extension line extended in the length direction of the pixel pattern.7. The mask of claim 5 , wherein twice a length of a side of the square shape of the sub-assist pattern is substantially equal to or smaller than about 75% of a width of the pixel pattern.8. The mask of claim 5 , wherein twice a length of a side of the square of the sub-assist pattern is substantially equal to or greater than about 50% of a width of the pixel pattern and is substantially equal to or smaller than about 70% of the width of the pixel pattern.9. The mask of claim 5 , wherein the sub-assist pattern is integral with the pixel pattern.10. The mask of claim 2 , wherein a width of the assist pattern is greater than a width of the pixel pattern.11. The mask of claim 10 , wherein a height of the assist pattern extended in the length direction of the pixel pattern is about 1/10 to about ¼ the width of the pixel pattern.12. The mask of claim 10 ...

INKJET PRINT HEAD AND METHOD FOR MANUFACTURING THE SAME

An inkjet print head includes a jet assembly which includes a nozzle plate, the nozzle plate including an ink transferring path on a bottom surface of the nozzle plate, and a jet jetting a transferred ink out of the head. A printed circuit substrate is connected to the jet assembly and includes an integrated circuit and a connection electrode. A barrier coating layer covers a surface of the printed circuit substrate and an inner surface and an outer surface of the jet assembly except a bottom surface of the nozzle plate and a surface of the connection electrode of the jet assembly and the printed circuit substrate being connected with each other. The barrier coating layer has a layered structure which includes a flexible layer, a diffusion barrier layer, and a hydrophobic layer. 1. An inkjet print head , comprising:a jet assembly comprising a nozzle plate, the nozzle plate comprising an ink transferring path and a jet, the ink transferring path being disposed in the nozzle plate and the jet being disposed on a bottom surface of the nozzle plate, the jet being configured to transfer ink through the jet;a printed circuit substrate connected to the jet assembly, the printed circuit substrate comprising an integrated circuit and a connection electrode; anda barrier coating layer formed on the jet assembly and the printed circuit substrate and covering a surface of the printed circuit substrate and an inner surface and an outer surface of the jet assembly except for a bottom surface of the nozzle plate and a surface of the connection electrode, the barrier coating layer comprising a flexible layer, a diffusion barrier layer, and a hydrophobic layer that are sequentially stacked.2. The inkjet print head of claim 1 , wherein the flexible layer comprises an organic layer.3. The inkjet print head of claim 2 , wherein the flexible layer comprises parylene.4. The inkjet print head of claim 1 , wherein the flexible layer is a thickest layer of the layers in the barrier coating ...

ELECTROWETTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

A method of manufacturing an electrowetting display device includes a preliminary partition wall pattern formed on a lower substrate on which a pixel electrode of an oxide series and an insulation layer are formed. The preliminary partition wall pattern is disposed along a boundary of the pixel electrode. A water-repellent layer including a self-assembled monolayer having a hydrophobic property is formed on the lower substrate. A portion of the preliminary partition wall pattern and the water-repellent layer formed on the preliminary partition wall pattern are removed to form a partition wall pattern on the insulation layer and to form a water-repellent pattern on the pixel electrode and the insulation layer between partition walls of the partition wall patterns. A fluid layer is formed on the lower substrate on which the water-repellent pattern is formed. The lower substrate and an upper substrate are combined with each other. 1. A method of manufacturing an electrowetting display device , the method comprising:forming a preliminary partition wall pattern on a lower substrate on which a pixel electrode and an insulation layer are formed, wherein the preliminary partition wall pattern is disposed along a boundary of the pixel electrode;forming a water-repellent layer on the preliminary partition wall pattern, the pixel electrode, and the insulation layer, wherein the water-repellent layer comprises a self-assembled monolayer having a hydrophobic property;removing a portion of the preliminary partition wall pattern and the water-repellent layer formed on the preliminary partition wall pattern, and forming a partition wall pattern on the insulation layer and forming a water-repellent pattern on the insulation layer and the pixel electrode between partition walls of the partition wall pattern;forming a fluid layer on the lower substrate on which the water-repellent pattern is formed; andcombining the lower substrate with an upper substrate.2. The method of claim 1 , ...

INKJET PRINT HEAD AND METHOD FOR MANUFACTURING THE SAME

An inkjet print head includes a jet assembly, a printed-circuit board and a barrier coating film. The jet assembly includes a nozzle plate including a jet orifice in a lower surface of the nozzle plate and through which ink is discharged, and an ink transfer pathway inside nozzle plate. The printed-circuit board is combined with the jet assembly. The printed-circuit board includes an integrated circuit and a connection electrode. The barrier coating film includes organic material, a flexible layer and a hydrophobic layer. The barrier coating film covers an inner and an outer surface of the jet assembly, and an outer surface of the printed-circuit board. The barrier coating film exposes the lower surface of the nozzle plate and an outer surface of the connection electrode. 1. An inkjet print head comprising: a jet orifice on a lower surface of the nozzle plate and through which an ink is discharged from the nozzle plate, and', 'an ink transfer pathway inside the nozzle plate;, 'a nozzle plate comprising, 'a jet assembly comprisinga printed-circuit board which is combined with the jet assembly, the printed-circuit board comprising an integrated circuit and a connection electrode; anda first barrier coating film comprising an organic material, a flexible layer and a hydrophobic layer,wherein the first barrier coating film covers an inner surface and an outer surface of the jet assembly, and an outer surface of a portion of the printed-circuit board, andthe first barrier coating film exposes the lower surface of the nozzle plate and an outer surface of the connection electrode of the printed-circuit board.2. The inkjet print head of claim 1 , wherein the flexible layer of the first barrier coating film comprises a parylene film.3. The inkjet print head of claim 2 , wherein the parylene film comprises at least one selected from parylene C claim 2 , parylene N claim 2 , parylene D and parylene HF.4. The inkjet print head of claim 1 , wherein a thickness of the flexible ...

PHOTO MASK AND METHOD OF MANUFACTURING IN-PLANE SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE USING THE SAME

A photo mask is disclosed. 1. A photo mask comprising:a mask substrate; anda mask pattern formed to include a plurality of unit mask patterns which are arranged in a single line for a fine pattern formation,wherein the unit mask pattern is configured to include a body portion positioned at a center and wing portions formed in a triangular shape at both sides of the body portion.2. The photo mask claimed as claim 1 , wherein the body portions included in the plurality of unit mask patterns are connected to one another.3. The photo mask claimed as claim 1 , wherein the body portion is formed to have a length corresponding to a ratio of 2:1 to a height of the wing portion claim 1 , and the wing portion of the triangular shape is formed to have an apex angle of substantially 90°.4. The photo mask claimed as claim 3 , wherein the body portion is formed to have a length range of 1.5 about 3.0 μm claim 3 , and the wing portion is formed to have a height range of 1 about 1.5 μm. This application is a divisional of copending application Ser. No. 12/641,905, filed on Dec. 18, 2009, which claims the benefit of Korean Patent Application No. 10-2009-0013611, filed on Feb. 18, 2009, both of which are hereby incorporated by reference in their entirety.1. Field of the DisclosureThis disclosure relates to a photo mask and a method of manufacturing a liquid crystal display device of an in-plane-switching (IPS) mode using the same.2. Description of the Related ArtIn general, liquid crystal display (LCD) devices control the light transmittance of dielectric anisotropy liquid crystal using an electric field, so as to display pictures. To this end, these LCD devices each include an LCD panel configured to include a plurality of liquid crystal cells arranged in a matrix shape for the display of pictures, and a driving circuit configured to drive the LCD panel. The LCD panel is classified into an IPS mode or a vertical electric field mode, according to the direction of the electric field ...

PATTERN MASK AND METHOD OF MANUFACTURING THIN FILM PATTERN USING PATTERN MASK

A pattern mask for patterning a thin film includes a transparent or translucent substrate with a plurality of grooves formed thereon having a pitch of about 4.6 μm to about 10.8 μm. 1. A pattern mask for patterning a thin film , comprising:a substrate formed of a transparent or translucent material having a plurality of grooves formed thereon having a pitch of about 4.6 μm to about 10.8 μm.2. The pattern mask of claim 1 , wherein the pitch of the grooves is from about 4.6 μm to about 8.8 μm.3. The pattern mask of claim 1 , wherein the pitch of the grooves is from about 5.1 μm to about 10.8 μm.4. The pattern mask of claim 1 , wherein each groove has a depth of about 260 nm to about 680 nm.5. The pattern mask of claim 1 , wherein the pattern mask has a refractive index of about 1.5.6. The pattern mask of claim 5 , wherein the pattern mask comprises quartz or glass.7. The pattern mask of claim 1 , further comprisinga plurality of opaque members disposed on the substrate and having a pitch greater than about 8.8.8. The pattern mask of claim 7 , wherein the pitch of the opaque members is greater than about 10.8.9. A method of manufacturing a thin film pattern claim 7 , the method comprising:depositing a photosensitive layer on a thin film;exposing the photosensitive layer through a pattern mask;developing the exposed photosensitive layer;etching the thin film using the developed photosensitive layer as an etch mask to form a plurality of thin film members; andremoving the developed photosensitive layer,wherein the pattern mask has a plurality of grooves having a pitch of about 4.6 μm to about 10.8 μm.10. The method of claim 9 , wherein the pattern mask comprises a plurality of opaque members having a pitch greater than about 10.8 μm.11. The method of claim 9 , wherein each groove has a depth of about 260 nm to 680 nm.12. The method of claim 9 , wherein the thin film members have a pitch that is half the pitch of the grooves.13. The method of wherein the pattern mask has ...

Method of fabricating gallium nitride based semiconductor device

Exemplary embodiments of the present invention disclose a method of fabricating a gallium nitride (GaN) based semiconductor device. The method includes growing GaN based semiconductor layers on a first surface of a GaN substrate to form a semiconductor stack, and separating at least a first portion of the GaN substrate from the semiconductor stack using a wire cutting technique.

Backlight unit and display device having the same

A backlight unit, and a display device including the backlight unit are provided. The backlight unit includes a light source member including a first substrate; and a plurality of light sources disposed on a surface of the first substrate, and a wavelength conversion member disposed on over of the light source member to overlap the light source member, the wavelength conversion member including a second substrate and a plurality of wavelength conversion patterns disposed on a surface of the second substrate, wherein the plurality of wavelength conversion patterns are disposed to be spaced apart from one another, and each of the plurality of wavelength conversion patterns covers at least one of the plurality of light sources.

LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME

Disclosed herein are a light emitting diode including a plurality of protrusions including zinc oxide and a method for manufacturing the same. According to an exemplary embodiment of the present disclosure, the light emitting diode includes: a substrate; a nitride light emitting structure disposed on the substrate; and a transparent electrode layer disposed on the nitride light emitting structure, wherein the transparent electrode layer includes a plurality of protrusions, the plurality of protrusions each have a lower portion and an upper portion, and a side of the lower portion and a side of the upper portion have different gradients. 112-. (canceled)13. A light emitting diode , comprising:a substrate;a nitride light emitting structure disposed on the substrate; anda transparent electrode layer disposed on the nitride light emitting structure and includes a plurality of protrusions, wherein each of the plurality of protrusions has a lower portion and an upper portion, anda side of the lower portion and a side of the upper portion have different gradients.14. The light emitting diode of claim 13 , wherein the transparent electrode layer includes zinc oxide.15. The light emitting diode of claim 13 , wherein the side of the lower portion is substantially vertical to a bottom surface of the transparent electrode.16. The light emitting diode of claim 13 , wherein the side of the upper portion has a gradient of 20 to 80° with respect to the side of the lower portion.17. The light emitting diode of claim 13 , wherein the side of the upper portion has a gradient continuously decreasing or increasing with respect to the side of the lower portion.18. The light emitting diode of claim 13 , wherein a horizontal width of the upper portion is smaller than that of the lower portion.19. The light emitting diode of claim 13 , wherein each of the plurality of protrusions has a disc shape or a hexagonal prism shape.20. The light emitting diode of claim 13 , wherein the nitride light ...

LIGHT-EMITTING DIODE HAVING IMPROVED LIGHT EXTRACTION EFFICIENCY AND METHOD FOR MANUFACTURING SAME

Disclosed are a light-emitting diode having improved light extraction efficiency and a method for manufacturing same. This light-emitting diode includes: a gallium nitride substrate having an upper surface and a lower surface; and a gallium nitride semiconductor multilayer structure disposed on the lower surface of the substrate, and having a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. Herein, the gallium nitride substrate has a main pattern having a protruding portion and a concave portion on the upper surface, and a rough surface formed on the protruding portion of the main pattern. The light-emitting diode is capable of improving light extraction efficiency through the upper surface thereof since the rough surface is formed along with the main pattern on the upper surface of the gallium nitride substrate.

COMPOSITION AND METHOD FOR INHIBITING AMYLOID BETA ACCUMULATION AND/OR AGGREGATION

Disclosed herein is an amyloid β accumulation and/or aggregation inhibitor. A technique for inhibiting amyloid β accumulation and/or aggregation by concurrently introducing Nurr1 and Foxa2 genes and introducing the co-expression of the genes is also provided. When used, the composition can be applied to the prevention or treatment of a neurodegenerative disease caused by amyloid β accumulation and/or aggregation, such as Alzheimer's disease. 122.-. (canceled)23. A method for inhibiting amyloid β accumulation and/or aggregation in a subject , comprising the step of:administering to the subject a therapeutically effective amount of a composition comprising Nurr1 and Foxa2 genes, wherein the administration inhibits amyloid β accumulation.24. The method of claim 23 , wherein the Nurr1 and Foxa2 genes are carried by a vector.25. The method of claim 24 , wherein the vector is viral vector.26. The method of claim 25 , wherein the viral vector comprises an adeno-associated virus claim 25 , lentivirus claim 25 , adenovirus claim 25 , herpes virus claim 25 , retrovirus claim 25 , vaccinia virus claim 25 , or poxvirus vector.27. The method of claim 24 , wherein the vector is a non-viral vector.28. The method of claim 26 , wherein the non-viral vector comprises a plasmid claim 26 , RNA molecule claim 26 , or lipofection vector.29. The method of claim 23 , wherein the composition comprises neurons claim 23 , neuronal stem cells claim 23 , or glia claim 23 ,and wherein the Nurr1 and Foxa2 genes have been introduced into the neurons, neuronal stem cells, or glia.30. The method of claim 26 , wherein the glia are astrocytes or microglia.31. The method of claim 23 , wherein the subject is a mammalian subject.32. The method of claim 23 , wherein the effective amount of the composition comprises from 5×10to 5×10viral genomes each of Nurr1 and Foxa2 per dose administered to the subject.33. The method of claim 23 , wherein the administration of the effective amount is directly to the ...

LIGHT EMITTING DIODE WITH HIGH EFFICIENCY

A light emitting diode includes a light emitting structure including first and second conductive type semiconductor layers, an active layer, a first electrode electrically connected to the first conductive type semiconductor layer, a current blocking layer disposed on a lower surface of the light emitting structure, and a second electrode electrically connected to the second conductive type semiconductor layer. The second electrode includes a first reflective metal layer adjoining the second conductive type semiconductor layer, and a second reflective metal layer covering a lower surface of the current blocking layer and a lower surface of the first reflective metal layer, and adjoining the second conductive type semiconductor layer. A contact resistance between the second reflective metal layer and the second conductive type semiconductor layer is higher than a contact resistance between the first reflective metal layer and the second conductive type semiconductor layer. 1. A light emitting diode comprising:a light emitting structure comprising a second conductive type semiconductor layer, an active layer disposed on an upper surface of the second conductive type semiconductor layer, and a first conductive type semiconductor layer disposed on an upper surface of the active layer;a first electrode electrically connected to the first conductive type semiconductor layer;a current blocking layer disposed on a lower surface of the light emitting structure; anda second electrode electrically connected to the second conductive type semiconductor layer, a first reflective metal layer adjoining the second conductive type semiconductor layer; and', 'a second reflective metal layer covering a lower surface of the current blocking layer and a lower surface of the first reflective metal layer, the second reflective metal layer adjoining a portion of the second conductive type semiconductor layer, and, 'wherein the second electrode compriseswherein a contact resistance between ...

DETERMINING NETWORK CONNECTION STRUCTURE OF TARGET AREA

The disclosure is related to determining a network connection structure of devices in a target service place by a service server including a processor and a memory and located at a remote location from the target service place. In order to determine, subscriber information of a target subscriber may be obtained. Based on the subscriber information, public network information associated with the target subscriber may be obtained from predetermined network devices associated with the target subscriber. First devices may be detected based on the obtained subscriber information and the collected network information, wherein the first devices are belonging to the target subscriber and are located in the target subscriber's service place. 1. A method of determining a network connection structure of devices in a target service place by a service server including a processor and a memory and located at a remote location from the target service place , the method comprising:obtaining subscriber information of a target subscriber;collecting public network information associated with the target subscriber from predetermined network devices associated with the target subscriber; anddetecting first devices belonging to the target subscriber and located in the target subscriber's service place based on the obtained subscriber information and the collected network information.2. The method of claim 1 , wherein the obtaining comprises:extracting identification information on the target subscriber from an inspection request message for requesting inspection of a service place of the target subscriber; andobtaining the subscriber information based on the extracted identification information.3. The method of claim 2 , wherein:the subscriber information is collected and stored when the target subscriber registers for a communication service;the subscriber information includes identification information of the target subscriber, information on the predetermined network devices having at ...

LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME

A liquid crystal display includes a thin film transistor disposed on a substrate, a pixel electrode connected to the thin film transistor, a lower insulating layer disposed facing the pixel electrode, a roof layer disposed on the lower insulating layer, and a microcavity formed between the pixel electrode and the lower insulating layer. The microcavity includes a liquid crystal layer including a liquid crystal material. The liquid crystal display further includes a first groove formed between a first pixel area and a second pixel area, a second groove formed between the first pixel area and a third pixel area, wherein the first groove is covered by the roof layer, the second groove is exposed at a portion where the roof layer is removed, the first pixel area corresponds to the pixel electrode, and the first pixel area is disposed between the second pixel area and the third pixel area. 1. A liquid crystal display , comprising:a thin film transistor disposed on a substrate;a pixel electrode connected to the thin film transistor;a lower insulating layer disposed facing the pixel electrode; anda roof layer disposed on the lower insulating layer,wherein a microcavity is formed between the pixel electrode and the lower insulating layer, and the microcavity includes a liquid crystal layer including a liquid crystal material, anda first groove is formed between a first pixel area and a second pixel area, a second groove is formed between the first pixel area and a third pixel area, wherein the first groove is covered by the roof layer, the second groove is exposed at a portion where the roof layer is removed, the first pixel area corresponds to the pixel electrode, and the first pixel area is disposed between the second pixel area and the third pixel area.2. The liquid crystal display of claim 1 , further comprising:an overcoat layer disposed on the roof layer, wherein the overcoat layer is disposed in the second groove and the liquid crystal material is disposed in the ...

DISPLAY DEVICE

A display device includes a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region, a first dam in the non-display region of the substrate, the first dam including a first barrier and a first stopper, the first stopper being on the first barrier and having a concave groove formed thereon, and a first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contacting a surface of the first stopper. 1. A display device , comprising:a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region;a first dam which is disposed in the non-display region of the first substrate;a first layer which covers the first dam; anda second layer covering the display region of the first substrate, at least a part of the second layer extending to the non-display region and contacting a surface of the first layer.2. The display device as claimed in claim 1 , the first layer has a concave groove at a surface thereof.3. The display device as claimed in claim 2 , at least a part of the second layer is disposed in the concave groove of the first layer.4. The display device as claimed in claim 1 , wherein the first layer extends to form a closed curve surrounding the display region of the first substrate.5. The display device as claimed in claim 1 , wherein:a minimum thickness of the first layer is equal to or greater than a thickness of a portion of the second layer that is in the display region of the first substrate, anda portion of the second layer that contacts a surface of the first layer has a thickness that is greater than a thickness of a portion of the second layer that is in the display region of the first substrate.6. The display device as claimed in claim 1 , further comprising:a second substrate opposite to the ...

COMPOSITION FOR BONE GRAFTING, COMPRISING NUCLEIC ACIDS, BONE GRAFT MATERIAL AND CATIONIC POLYMER, AND BONE GRAFT KIT FOR MANUFACTURING SAME

The present invention relates to a composition for bone grafting, comprising nucleic acids, a bone graft material, and a cationic polymer, and a bone graft kit for manufacturing the same. The composition for bone grafting, of the present invention, has been confirmed to promote the formation of a cushioning force that can respond to physiological stress and the formation of new bones at grafted sites, and has been confirmed to improve bone grafting convenience, and thus is expected to be effectively usable in the treatment of bone diseases. 1. A bone grafting composition , comprising:a) a nucleic acid;b) a bone graft; andc) a cationic polymer,wherein a) the nucleic acid and c) the cationic polymer form a bond which holds b) the bone graft to form an aggregate, said bone grafting composition being prepared by:a process comprisinga first step of mixing a) the nucleic acid with b) the bone graft to give a nucleic acid-bone graft mixture anda second step of adding c) the cationic polymer to the nucleic acid-bone graft mixture to hold the bone graft to form an aggregate; ora process comprisinga first step of mixing c) the cationic polymer with b) the bone graft to give a cationic polymer-bone graft mixture anda second step of adding a) the nucleic acid to the cationic polymer-bone graft mixture to hold the bone graft to form an aggregate.2. The bone grafting composition of claim 1 , wherein the bond is an ionic bond.3. The bone grafting composition of claim 1 , wherein the nucleic acid is mixed at a weight ratio of 1-20:1 with the cationic polymer.4. The bone grafting composition of claim 1 , wherein the nucleic acid is contained in an amount of 0.001-2% by weight claim 1 , based on the total weight of the bone grafting composition.5. The bone grafting composition of claim 1 , wherein the nucleic acid is a deoxyribonucleic acid (DNA) claim 1 , a ribonucleic acid (RNA) claim 1 , or a mixture thereof.6. The bone grafting composition of claim 1 , wherein the nucleic acid ...

Light emitting device and method of fabricating the same

A light-emitting device according to an exemplary embodiment of the present invention includes a first conductivity-type semiconductor layer disposed on a substrate; an active layer disposed on the first conductivity-type semiconductor layer; a second conductivity-type semiconductor layer disposed on the active layer; and an irregular convex-concave pattern disposed on a surface of the first conductivity-type semiconductor layer. The irregular convex-concave pattern includes convex portions and concave portions, and the convex portions have irregular heights and the concave portions have irregular depths. The first conductivity-type semiconductor layer including the irregular convex-concave pattern is exposed from the active layer and the second conductivity-type semiconductor layer.

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

A display device and a method of manufacturing the display device are provided. Moisture may be prevented from penetrating into the display device. The display device includes a substrate including a pixel area. A thin film transistor is formed on the substrate. A pixel electrode is connected to the thin film transistor and formed in the pixel area. A roof layer is formed on the pixel electrode. The roof layer is separated from the pixel electrode via a microcavity. A liquid crystal layer fills the microcavity. A liquid crystal injection hole is formed in the roof layer and exposes a portion of the microcavity. An encapsulation layer is formed on the roof layer. The encapsulation layer covers the liquid crystal injection hole and seals the microcavity for the pixel area. The encapsulation layer includes a multilayer structure. 1. A display device comprising:a substrate;a thin film transistor disposed on the substrate;a pixel electrode connected to the thin film transistor;a roof layer disposed on the pixel electrode to be spaced apart from the pixel electrode bya plurality of microcavities therebetween;a liquid crystal layer disposed in the plurality of microcavities; andan encapsulation layer disposed on the roof layer,wherein the encapsulation layer includes a first sub-encapsulation layer and a second sub-encapsulation layer, and the first sub-encapsulation layer is interposed between the second sub-encapsulation layer and the roof layer.2. The display device of claim 1 , wherein a portion of the first sub-encapsulation layer is interposed between the second sub-encapsulation layer and the roof layer.3. The display device of claim 1 , wherein the first sub-encapsulation layer includes an inorganic material claim 1 , and the second sub-encapsulation layer includes an organic insulating material.4. The display device of claim 3 , wherein the first sub-encapsulation layer includes a silicon oxide (SiOx) or a silicon nitride (SiNx).5. The display device of claim 3 , ...

Display device and method for manufacturing the same

A display device includes: a first substrate including a display area and a non-display area which is arranged outside the display area; a first dam which is disposed in the non-display area of the first substrate and which includes a first stopper having a recessed groove at a surface thereof; and a first alignment layer which covers the display area of the first substrate, the first alignment layer defining a first portion thereof which extends to the non-display area and terminates at the surface of the first stopper.

Inkjet apparatus for deposting liquid crystal

An inkjet apparatus for depositing liquid crystal according to an exemplary embodiment of the present invention includes: an inkjet head configured to discharge liquid crystal; a liquid crystal reservoir configured to provide the liquid crystal to the inkjet head, and the liquid crystal reservoir comprises metal; a storing tank configured to supply the liquid crystal to the liquid crystal reservoir; and a heat supply device configured to supply heat to the liquid crystal reservoir, in which a separation part is disposed inside of the liquid crystal reservoir, and the separation part divides the liquid crystal reservoir into an upper storing space and a lower storing space.

DISPLAY DEVICE

A display device includes a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region, a first dam in the non-display region of the substrate, the first dam including a first barrier and a first stopper, the first stopper being on the first barrier and having a concave groove formed thereon, and a first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contacting a surface of the first stopper. 120.-. (canceled)21. A display device , comprising:a substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region;a stopper which is disposed in the non-display region of the substrate; anda layer covering the display region of the substrate, at least a part of the layer extending to the non-display region and contacting a surface of the stopper,wherein each of the stopper and the layer includes an organic polymer, andthe organic polymer of the stopper is different from the organic polymer of the layer.22. The display device as claimed in claim 21 , wherein the stopper has a lyophobic characteristic with respect to the first layer.23. The display device as claimed in claim 21 , further comprising:a barrier being interposed between the substrate and the stopper, anda color filter being in the display region of the substrate,wherein the barrier includes the same material as the color filter.24. The display device as claimed in claim 21 , wherein the stopper includes a concave groove at the surface of the stopper.25. The display device as claimed in claim 24 , wherein:a minimum thickness of the stopper is equal to or greater than a thickness of a portion of the layer that is in the display region of the substrate, anda portion of the layer that contacts the surface of the stopper has a thickness that is greater than ...

SEMICONDUCTOR DEVICE

Provided is a semiconductor device including a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in one direction to be offset from each other, wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other (m is an integer of 0 or more). 1. A semiconductor device comprising:a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in a first direction and offset from each other in a second direction crossing the first direction,wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other in the first direction, andwherein m is an integer of 0 or more.2. The semiconductor device of claim 1 , wherein among the plurality of pillars included in one pillar column claim 1 , two or more consecutive pillars are aligned with each other in the first direction.3. The semiconductor device of claim 1 , further comprising a plurality of insulating layers and a plurality of conductive layers alternately stacked to surround the pillars.4. The semiconductor device of claim 3 , wherein the plurality of conductive layers each comprise tungsten.5. The semiconductor of claim 3 , wherein each of the conductive layers comprises at least one lower selection gate claim 3 , a plurality of control gates claim 3 , and at least one upper selection gate which are sequentially stacked.6. The semiconductor of claim 3 , wherein the conductive layers comprises a pipe gate claim 3 , a plurality of control gates claim 3 , and at least one selection gate claim 3 , which are sequentially stacked.7. The semiconductor device of claim 1 , further comprising at least one slit positioned between the pillar columns adjacent to each other.8. The semiconductor device of claim 1 , wherein the (m+1)th pillar and an (m+2)th pillar included in one pillar ...

SEMICONDUCTOR DEVICE

Provided is a semiconductor device including a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in one direction to be offset from each other, wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other (m is an integer of 0 or more). 1. A semiconductor device comprising:a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in one direction to be offset from each other,wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other, andwherein m is an integer of 0 or more.2. The semiconductor device of claim 1 , wherein among the plurality of pillars included in one pillar column claim 1 , two or more consecutive pillars are aligned with each other.3. The semiconductor device of claim 1 , further comprising a plurality of insulating layers and a plurality of conductive layers alternately stacked to surround the pillars.4. The semiconductor device of claim 3 , wherein the plurality of conductive layers each comprise tungsten.5. The semiconductor of claim 3 , wherein each of the conductive layers comprises at least one lower selection gate claim 3 , a plurality of control gates claim 3 , and at least one upper selection gate which are sequentially stacked.6. The semiconductor of claim 3 , wherein the conductive layers comprises a pipe gate claim 3 , a plurality of control gates claim 3 , and at least one selection gate claim 3 , which are sequentially stacked.7. The semiconductor device of claim 1 , further comprising at least one slit positioned between the pillar columns adjacent to each other.8. The semiconductor device of claim 1 , wherein the (m+1)th pillar and an (m+2)th pillar included in one pillar column are arranged to be offset from each other and the (m+2)th pillar and an (m+3)th pillar are ...

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

A display device and a method of manufacturing the display device are provided. Moisture may be prevented from penetrating into the display device. The display device includes a substrate including a pixel area. A thin film transistor is formed on the substrate. A pixel electrode is connected to the thin film transistor and formed in the pixel area. A roof layer is formed on the pixel electrode. The roof layer is separated from the pixel electrode via a microcavity. A liquid crystal layer fills the microcavity. A liquid crystal injection hole is formed in the roof layer and exposes a portion of the microcavity. An encapsulation layer is formed on the roof layer. The encapsulation layer covers the liquid crystal injection hole and seals the microcavity for the pixel area. The encapsulation layer includes a multilayer structure. 1. A display device comprising:a substrate including a pixel area;a thin film transistor formed on the substrate;a pixel electrode connected to the thin film transistor and formed in the pixel area;a roof layer formed on the pixel electrode, wherein the roof layer is separated from the pixel electrode via a microcavity;a liquid crystal layer filling the microcavity;a liquid crystal injection hole formed in the roof layer, the liquid crystal injection hole exposing a portion of the microcavity; andan encapsulation layer formed on the roof layer, the encapsulation layer covering the liquid crystal injection hole and sealing the microcavity,wherein the encapsulation layer has a multilayer structure.2. The display device of claim 1 , whereinthe encapsulation layer includes:a first sub-encapsulation layer including an organic insulating material; anda second sub-encapsulation layer including an inorganic insulating material.3. The display device of claim 2 , whereinthe first sub-encapsulation layer includes perylene, silicone, or a ultra violet (UV) sheet.4. The display device of claim 2 , whereinthe second sub-encapsulation layer includes a ...

DISPLAY DEVICE

A display device includes a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region, a first dam in the non-display region of the substrate, the first dam including a first barrier and a first stopper, the first stopper being on the first barrier and having a concave groove formed thereon, and a first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contacting a surface of the first stopper. 120.-. (canceled)21. A display device , comprising:a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region;a first dam which is disposed in the non-display region of the first substrate and which includes a first stopper having a concave groove at a surface thereof; anda first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contact a surface of the first stopper.22. The display device as claimed in claim 21 , wherein the first stopper extends to form a closed curve surrounding the display region of the first substrate.23. The display device as claimed in claim 21 , wherein:a minimum thickness of the first stopper is equal to or greater than a thickness of a portion of the first alignment layer that is in the display region of the first substrate, and a portion of the first alignment layer that contacts a surface of the first stopper has a thickness that is greater than a thickness of a portion of the first alignment layer that is in the display region of the first substrate.24. The display device as claimed in claim 21 , further comprising:a second substrate opposite to the first substrate in a state where the first alignment layer is interposed between the second substrate and the first substrate ...

LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME

Disclosed herein are a light emitting diode including a plurality of protrusions including zinc oxide and a method for manufacturing the same. According to an exemplary embodiment of the present disclosure, the light emitting diode includes: a substrate; a nitride light emitting structure disposed on the substrate; and a transparent electrode layer disposed on the nitride light emitting structure, wherein the transparent electrode layer includes a plurality of protrusions, the plurality of protrusions each have a lower portion and an upper portion, and a side of the lower portion and a side of the upper portion have different gradients. 1. A method of manufacturing a light emitting diode , comprising:forming a seed layer on a nitride light emitting structure;forming a mask pattern on the seed layer;forming a plurality of protrusions by re-growing the seed layer,wherein the plurality of protrusions each have a lower portion and an upper portion, anda side of the lower portion and a side of the upper portion have different gradients.2. The method of claim 1 , wherein the seed layer and the plurality of protrusions form a transparent electrode.3. The method of claim 2 , wherein the transparent electrode includes zinc oxide.4. The method of claim 1 , wherein the side of the lower portion is a substantially vertical.5. The method of claim 4 , wherein the side of the upper portion has a gradient of 20 to 80° with respect to the substantially vertical side.6. The method of claim 1 , wherein the upper portion has a horizontal width smaller than that of the lower portion.7. The method of claim 1 , wherein the lower portion has a height same as a thickness of the mask pattern.8. The method of claim 1 , wherein the forming of the plurality of protrusions by re-growing the seed layer includes performing re-growing by a hydrothermal synthesis method.9. The method of claim 8 , wherein the hydrothermal synthesis method uses a mixed solution of zinc salt and hexamethylenetetramine. ...

LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME

A liquid crystal display includes: a substrate; a thin film transistor comprising one or more terminals and disposed on the substrate; a pixel electrode connected to one of the terminals of the thin film transistor; and a roof layer disposed to face the pixel electrode, wherein a microcavity is formed between the pixel electrode and the roof layer, the microcavity including a liquid crystal material, wherein a plurality of microcavities are disposed along a first row and a second row adjacent to each other, a trench is formed between the first row and the second row, and at least one bridge connecting the first row and the second row is disposed at the trench. 1. A liquid crystal display comprising:a substrate;a thin film transistor comprising one or more terminals and disposed on the substrate;a pixel electrode connected to one of the terminals of the thin film transistor; anda roof layer disposed to face the pixel electrode,wherein a microcavity is formed between the pixel electrode and the roof layer, the microcavity including a liquid crystal material,wherein a plurality of microcavities are disposed along a first row and a second row adjacent to each other, a trench is formed between the first row and the second row, and at least one bridge connecting the first row and the second row is disposed at the trench.2. The liquid crystal display of claim 1 , wherein the trench includes a first region having a first cross-section and a second region having a second cross-section claim 1 , the first cross-section being smaller than the second cross-section claim 1 , and the first region corresponding to a portion in which the at least one bridge is disposed.3. The liquid crystal display of claim 2 , wherein the at least one bridge is disposed at a same layer as the roof layer.4. The liquid crystal display of claim 3 , wherein the at least one bridge comprises a same material as the roof layer.5. The liquid crystal display of claim 4 , further comprising a common ...

METHOD AND DEVICE FOR MEASURING ROTARY INPUT

An electronic device may include a main body; a rotary member rotatably mounted upon and enclosing at least a portion of the main body, the rotary member including a first region corresponding to a first attribute and a second region corresponding to a second attribute, the first and second regions being alternately arranged on one face of the rotary member; a sensor module configured to acquire attribute information corresponding to at least a partial region of the rotary member as the rotary member is rotated; and a processor, wherein the processor is configured to confirm a change in at least one of the first attribute and the second attribute and to determine at least one of a rotated angle and a rotated direction of the rotary member based on the change. 1. An electronic device comprising:a main body;a rotary member rotatably mounted upon and enclosing at least a portion of the main body, the rotary member including a first region corresponding to a first attribute and a second region corresponding to a second attribute, the first and second regions being alternately arranged on one face of the rotary member;a sensor module configured to acquire attribute information corresponding to at least a partial region of the one face of the rotary member as the rotary member is rotated; anda processor,wherein the processor is configured to confirm a change in at least one of the first attribute and the second attribute and to determine at least one of a rotated angle and a rotated direction of the rotary member based on the change.2. The electronic device of claim 1 , wherein the first attribute includes at least one of a first pattern claim 1 , a first reflectivity claim 1 , a first color claim 1 , a first form claim 1 , andthe second attribute includes at least one of a second pattern, a second reflectivity, a second color, and a second form.3. The electronic device of claim 1 , wherein at least one of the first region and the second region includes an opening formed ...

Psicose Epimerase and Psicose Production Method Using Same

The present invention provides a novel psicose epimerase derived from Flavonifractor plautii and capable of converting fructose to psicose. The novel psicose epimerase according to the present invention possesses an activity producing psicose by epimerizing the carbon-3 position of fructose, and has maximal activity for the conversion of fructose to psicose at a relatively high temperature and a pH less than or equal to neutral, has excellent thermal stability, and can mass-produce psicose from fructose in a high yield for a short amount of time. Therefore, the psicose epimerase according to the present invention is advantageous in the industrial production of psicose, and it is expected that the psicose produced thereby can be usefully utilized in the functional sugar industry and also as materials for health food, medicine, cosmetics, and the like using the psicose.

Lcd and manufacturing method thereof

A liquid crystal display includes: a first substrate on which a display area and a non-display area disposed on an outside of the display area are defined; a first insulating layer, which is disposed in the non-display area on the first substrate; a barrier pattern, which is disposed on the first insulating layer; a seal pattern, which is disposed on the barrier pattern to overlap the barrier pattern; and a second substrate, which is disposed to face the first substrate.

LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME

A liquid crystal display includes: a substrate; a thin film transistor disposed on the substrate; a pixel electrode disposed on the thin film transistor; a roof layer facing the pixel electrode; a plurality of microcavities formed between the pixel electrode and the roof layer, each microcavity including liquid crystal materials; a trench formed between the microcavities; and a buffer region formed at an end portion of the trench. 1. A liquid crystal display comprising:a substrate;a thin film transistor disposed on the substrate;a pixel electrode disposed on the thin film transistor;a roof layer facing the pixel electrode;a plurality of microcavities formed between the pixel electrode and the roof layer, each microcavity of the plurality of microcavities comprising liquid crystal materials;a trench formed between the microcavities; anda buffer region formed at an end portion of the trench.2. The liquid crystal display of claim 1 , wherein the trench has a first width claim 1 , the buffer region has a second width claim 1 , and the second width is larger than the first width.3. The liquid crystal display of claim 2 , wherein the buffer region is covered with the roof layer.4. The liquid crystal display of claim 3 , wherein at least a portion of liquid crystal materials are contained in the buffer region.5. The liquid crystal display of claim 4 , wherein an air hole is formed at the roof layer located above the buffer region.6. The liquid crystal display of claim 5 , further comprising a capping layer provided above the roof layer claim 5 , wherein the capping layer covers the trench and the air hole.7. The liquid crystal display of claim 4 , wherein the buffer region includes a plurality of buffer regions formed along one side of a display area claim 4 , and each of the buffer regions are formed separately from one another.8. The liquid crystal display of claim 7 , wherein gaps between the buffer regions are covered with the roof layer.9. The liquid crystal display ...

DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME

A display device includes a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region, a first dam in the non-display region of the substrate, the first dam including a first barrier and a first stopper, the first stopper being on the first barrier and having a concave groove formed thereon, and a first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contacting a surface of the first stopper. 1. A display device , comprising:a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region;a first dam in the non-display region of the substrate, the first dam including a first barrier and a first stopper, the first stopper being on the first barrier and having a concave groove formed thereon; anda first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contacting a surface of the first stopper.2. The display device as claimed in claim 1 , wherein each of the first barrier and the first stopper extends to form a closed curve surrounding the display region of the first substrate.3. The display device as claimed in claim 2 , wherein the first barrier forms a continuous straight line along each extension direction surrounding the display region of the first substrate claim 2 , andthe first stopper forms an uneven line along each extension direction surrounding the display region of the first substrate.4. The display device as claimed in claim 2 , wherein the first stopper has a width that is smaller than a width of the first barrier in a direction that is perpendicular to an extension direction.5. The display device as claimed in claim 1 , wherein the first stopper is on at least a part of a side ...

LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device according to an exemplary embodiment of the present invention having each pixel that comprises first and second subpixel areas, and an outer partition may be formed along a row direction between a plurality of liquid crystal layers, and the outer partition may separate a first liquid crystal injection hole and a second liquid crystal injection hole of two liquid crystal layers that are adjacent to each other along a column direction, thus liquid crystals are separated rather than being mixed with each other and fill their corresponding microcavities of the first and second subpixels areas. 1. A display device comprising:a substrate;a thin film transistor provided on the substrate;a pixel electrode connected with one terminal of the thin film transistor;a roof layer provided facing the pixel electrode;a liquid crystal layer formed between the pixel electrode and the roof layer and including a first liquid crystal layer having a first liquid crystal injection hole and to which a first liquid crystal molecule is injected and a second liquid crystal layer having a second liquid crystal injection hole and to which a second liquid crystal molecule is injected;an H-shaped inner partition separating the first liquid crystal layer and the second liquid crystal layer; andan outer partition formed in a liquid injection hole forming area of the substrate,wherein the liquid crystal layer is arranged in plural in a matrix format in the substrate,the outer partition is formed along a row direction between the plurality of liquid crystal layers, andthe outer partition separates a first liquid crystal injection hole and a second liquid crystal injection hole of two liquid crystal layers that are adjacent to each other along a column direction.2. The display device of claim 1 , wherein the first liquid crystal layer and the second crystal layer form one pixel corresponding to one pixel electrode and display different grays claim 1 ,a first valley and a second valley ...

ELECTRONIC DEVICE INCLUDING BIOMETRIC SENSOR

An electronic device according to one embodiment of the present disclosure may include: a housing; an optical element unit which may be configured to emit light toward a user's body, receive light reflected from the user's body, and convert the received light into a first signal; an IC element which may be configured to convert the first signal provided from the optical element unit into a second signal, and provide the second signal to a main circuit board disposed in the housing; a first circuit board that may be disposed between the optical element unit and the IC element and may be electrically connected to the optical element unit and the IC element; and a second circuit board that may include at least one first opening in which the IC element is mounted. The housing may include at least one transparent region such that the light generated by the optical element unit is transmitted through the transparent region to an exterior of the housing. 1. An electronic device comprising:a housing;an optical element unit configured to emit light toward a user's body, receive light reflected from the user's body, and convert the received light into a first signal;an IC element configured to convert the first signal provided from the optical element unit into a second signal, and provide the second signal to a main circuit board disposed in the housing;a first circuit board disposed between the optical element unit and the IC element and is electrically connected to the optical element unit and the IC element; anda second circuit board including at least one first opening in which the IC element is mounted,wherein the housing includes at least one transparent region such that the light generated by the optical element unit is transmitted through the transparent region to an exterior of the housing.2. The electronic device of claim 1 , wherein the first signal includes a measurement of a change in a flow rate of blood flowing in a blood vessel of the user.3. The electronic ...

DISPLAY DEVICE AND TILED DISPLAY DEVICE INCLUDING THE SAME

A display device includes: a first substrate including a first contact hole and a dam spaced from the first contact hole, a conductive line including a first portion in the first contact hole and a second portion on the dam, a second substrate on the first substrate and the conductive line, the second substrate including a second contact hole overlapping the dam in a thickness direction of the display device, a pad electrode on the second substrate and including a portion in the second contact hole, and a display layer on the second substrate and the pad electrode. 1. A display device comprising:a first substrate including a first contact hole and comprising a dam spaced from the first contact hole;a conductive line comprising a first portion in the first contact hole and a second portion on the dam;a second substrate on the first substrate and the conductive line, the second substrate including a second contact hole overlapping the dam in a thickness direction of the display device;a pad electrode on the second substrate and comprising a portion in the second contact hole; anda display layer on the second substrate and the pad electrode.2. The display device of claim 1 , wherein a length of an upper surface of the dam in a first direction is greater than a length of a bottom of the second contact hole in the first direction.3. The display device of claim 1 , further comprising a contact electrode overlapping the first contact hole in the thickness direction claim 1 , the contact electrode comprising a portion in the first substrate.4. The display device of claim 3 , wherein the first portion of the conductive line is connected to the contact electrode; andwherein the second portion of the conductive line is connected to the portion of the pad electrode in the second contact hole.5. The display device of claim 3 , further comprising:a connection film on a lower surface of the contact electrode;a flexible film attached to a lower surface of the connection film and ...

DISPLAY DEVICE

A display device includes a first substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region, a first dam in the non-display region of the substrate, the first dam including a first barrier and a first stopper, the first stopper being on the first barrier and having a concave groove formed thereon, and a first alignment layer covering the display region of the first substrate, at least a part of the first alignment layer extending to the non-display region and contacting a surface of the first stopper. 1. A display device , comprising:a substrate including a display region and a non-display region, the non-display region being positioned on an outside of the display region;a second layer disposed in the non-display region of the substrate;a third layer between the substrate and the second layer, anda layer covering the display region of the substrate, at least a part of the layer extending to the non-display region and contacting a surface of the second layer;wherein the second layer covers side surfaces of the third layer, and an upper surface of the third layer,the maximum thickness of the second layer is less than the thickness of the third layer.2. The display device as claimed in claim 1 , wherein the thickness of the second layer which is disposed on the upper surface of the third layer is greater than the thickness of the second layer which is disposed on the side surfaces of the third layer.3. The display device as claimed in claim 2 , wherein the second layer which is disposed on the upper surface of the third layer has indentation pattern indented toward the the upper surface of the third layer.4. The display device as claimed in claim 1 , further comprising a color filter in the display region of the substrate.5. The display device as claimed in claim 4 , wherein:the third layer includes the same material as the color filter,each of the second layer and the layer includes an ...

AUTHENTICATION DEVICE BASED ON BIOMETRIC INFORMATION, CONTROL SERVER CONNECTED TO THE SAME, AND LOGIN METHOD BASED ON BIOMETRIC INFORMATION THEREOF

A method of providing a login to website requested from a computing device, by a biometric information based authentication device which interworks with a control server, is provided. The method includes detecting a login request message transmitted from the computing device to a website server providing the website, extracting login session information from the login request message, outputting an authentication result with respect to received biometric information, and transmitting authentication information comprising the login session information and the authentication result to the control server. The login session information is transmitted from the control server to the website server to determine, by the website server, the login allowance of the website. 1. A method of providing a login to website requested from a computing device , by a biometric information based authentication device which interworks with a control server , the method comprising:detecting a login request message transmitted from the computing device to a website server providing the website;extracting login session information from the login request message;outputting an authentication result with respect to received biometric information; andtransmitting authentication information comprising the login session information and the authentication result to the control server,wherein the login session information is transmitted from the control server to the website server to determine, by the website server, the login allowance of the website.2. The login method of claim 1 , further comprisingreceiving a white list comprising information about a plurality of websites with biometric information login, from the control server,wherein the extracting the login session information comprises:determining whether the website server is included in the white list based on the login request message; andextracting a session key included in the login request message as the login session information in ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device is provided. The display device includes a substrate including a plurality of pixel areas; a thin film transistor disposed on the substrate; a first insulating layer disposed on the thin film transistor; a pixel electrode connected to the thin film transistor and disposed on the first insulating layer; a common electrode separated from the pixel electrode with a microcavity interposed therebetween; a second insulating layer disposed on the common electrode; a roof layer disposed on the second insulating layer; a hydrophobic layer disposed on the roof layer and including a plurality of protrusions; an injection hole disposed in the common electrode, the second insulating layer, and the roof layer, the injection hole exposing a portion of the microcavity; a liquid crystal layer for filling the microcavity; and an overcoat formed on the roof layer and covering the injection hole, so as to seal the microcavity. 1. A display device comprising:a substrate including a plurality of pixel areas;a thin film transistor disposed on the substrate;a first insulating layer disposed on the thin film transistor;a pixel electrode connected to the thin film transistor and disposed on the first insulating layer;a common electrode separated from the pixel electrode with a microcavity interposed therebetween;a second insulating layer disposed on the common electrode;a roof layer disposed on the second insulating layer;a hydrophobic layer disposed on the roof layer and including a plurality of protrusions;an injection hole disposed in the common electrode, the second insulating layer, and the roof layer, the injection hole exposing a portion of the microcavity;a liquid crystal layer for filling the microcavity; andan overcoat formed on the roof layer and covering the injection hole, so as to seal the microcavity.2. The display device of claim 1 , wherein the protrusions render a surface of the hydrophobic layer hydrophobic.3. The display device of claim 1 , wherein an ...

SEMICONDUCTOR MEMORY DEVICE AND WRITING METHOD THEREOF

A writing method of a semiconductor memory device includes applying a plurality of program voltages sequentially generated to a selected word line, and applying any one of a plurality of source selection line voltages to a source selection line when each of the plurality of program voltages is applied. 1. A writing method of a semiconductor memory device , the writing method comprising:applying a plurality of program voltages sequentially generated to a selected word line; andapplying any one of a plurality of source selection line voltages to a source selection line when each of the plurality of program voltages is applied.2. The writing method of claim 1 , wherein the any one of the plurality of source selection line voltages is determined according to whether or not the number of times that the program voltages are applied reaches a first reference value.3. The writing method of claim 2 , wherein the applying of the any one of the plurality of source selection line voltages includes:applying a first source selection line voltage to the source selection line when the number of times is less than the first reference value; andapplying a second source selection line voltage to the source selection line when the number of times is greater than or equal to the first reference value,wherein the second source selection line voltage is less than the first source selection line voltage.4. The writing method of claim 2 , wherein the applying of any one of the plurality of source selection line voltages comprises:applying a first source selection line voltage to the source selection line when the number of times is less than the first reference value; andapplying a second source selection line voltage to the source selection line when the number of times is greater than or equal to the first reference value,wherein the second source selection line voltage is higher than the first source selection line voltage.5. The writing method of claim 2 , wherein the any one of the ...

Relief Valve for Oil Pump Having Separated Bypass Period

A method of operating a relief valve assembly for an oil pump includes unblocking a first bypass inlet passage and blocking a first bypass outlet passage, a second bypass inlet passage, and a second bypass outlet passage with a plunger, introducing oil to the relief valve assembly, moving the plunger in a downward direction by a first displacement to unblock the first bypass outlet passage, starting a first bypass of the oil, moving the plunger in the downward direction by a second displacement to block the first bypass inlet passage and unblock the second bypass inlet passage, terminating the first bypass of the oil, moving the plunger in the downward direction by a third displacement to unblock the second bypass outlet passage, and starting a second bypass of the oil. 1. A relief valve assembly for an oil pump , the relief valve assembly being installed on a bypass passage and configured to connect a discharge port and a suction port in the oil pump in which an outer rotor and an inner rotor are configured to rotate to be inscribed with each other and to control a pressure of oil discharged from the oil pump , the relief valve assembly comprising:a plunger slidably installed in a valve housing formed on one side of the oil pump and configured to be elastically supported in a direction of blocking a flow of the oil; anda bypass inlet passage and a bypass outlet passage formed at two or more intervals to bypass the oil, the bypass inlet passage and the bypass outlet passage configured to open and close according to movement of the plunger while communicating the bypass passage with an interior of the valve housing,wherein the plunger is configured to move downward, and when the plunger moves downward, the bypass inlet passage and the bypass outlet passage, which communicate with each other, are configured to be blocked first, and then the bypass inlet passage is configured to communicate with the bypass outlet passage after a predetermined interval.2. The relief ...

WIRE GRID POLARIZER AND METHOD OF FABRICATING THE SAME

A wire grid polarizer and a method of fabricating a wire grid polarizer are provided. The wire grid polarizer comprises a substrate configured to have a plurality of recessed patterns disposed on a first surface thereof, a plurality of conductive wire patterns configured to be disposed in the recessed patterns, respectively, of the substrate, and an oxide layer configured to be disposed on the substrate and the conductive wire patterns. 1. A wire grid polarizer , comprising:a substrate configured to have a plurality of recessed patterns disposed on a first surface thereof;a plurality of conductive wire patterns configured to be disposed in the recessed patterns, respectively, of the substrate; andan oxide layer configured to be disposed on the substrate and the conductive wire patterns.2. The wire grid polarizer of claim 1 , further comprising:a supporting substrate configured to be provided on a second surface of the substrate.3. The wire grid polarizer of claim 1 , wherein the substrate is further configured to have a refractive index of 1.0 to 1.7.4. The wire grid polarizer of claim 1 , wherein the oxide layer is further configured to have a thickness of 100 nm to 1000 nm.5. The wire grid polarizer of claim 1 , wherein the oxide layer is further configured to contact the substrate and the conductive wire patterns.6. The wire grid polarizer of claim 5 , wherein the oxide layer is further configured to be thinner in an area where it contacts the substrate than in an area where it contacts the conductive wire patterns.7. A wire grid polarizer claim 5 , comprising:a substrate configured to have a plurality of first recessed patterns disposed on a first surface thereof and a second recessed pattern also disposed on the first surface thereof with a width larger than a width of the first recessed patterns;a plurality of conductive wire patterns configured to be disposed in the first recessed patterns, respectively, of the substrate;a reflective layer configured to be ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device includes a lower panel including a first substrate and at least one transistor disposed on the first substrate; and an upper panel facing the lower panel and including a first touch conductive layer including a second substrate, sensing electrodes disposed on the second substrate and including a first sensing electrode, and sensing lines including a second sensing line, a first insulating layer disposed on the first touch conductive layer, and a second touch conductive layer disposed on the first insulating layer including a blocking layer overlapping the sensing electrodes and the sensing lines and a connection electrode overlapping the first sensing electrode, the first sensing line, and the second sensing line. 1. A display device , comprising:a lower panel including a first substrate and at least one transistor disposed on the first substrate; andan upper panel facing the lower panel and including a first touch conductive layer including a second substrate, sensing electrodes disposed on the second substrate and including a first sensing electrode, and sensing lines including a second sensing line, a first insulating layer disposed on the first touch conductive layer, and a second touch conductive layer disposed on the first insulating layer including a blocking layer overlapping the sensing electrodes and the sensing lines and a connection electrode overlapping the first sensing electrode, the first sensing line, and the second sensing line.2. The display device of claim 1 , further comprising:a liquid crystal layer disposed between the lower panel and the upper panel.3. The display device of claim 1 ,wherein the connection electrode is electrically connected to the first sensing line and the second sensing line through a line connection contact hole penetrating the first insulating layer.4. The display device of claim 3 ,wherein the sensing electrodes are arranged along a first direction and a second direction crossing the first direction.5. ...

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

A display device includes: a pixel circuit layer including a plurality of transistors; first partition wall and a second partition wall on the pixel circuit layer, each of the first and second partition walls having a shape protruding in a thickness direction; a first electrode and a second electrode on the same layer and respectively on the first partition wall and the second partition wall; a light emitting element between the first electrode and the second electrode; and a semiconductor pattern directly on the first electrode. 1. A display device comprising:a pixel circuit layer comprising a plurality of transistors;a first partition wall and a second partition wall on the pixel circuit layer, each of the first and second partition walls having a shape protruding in a thickness direction;a first electrode and a second electrode on the same layer and respectively on the first partition wall and the second partition wall;a light emitting element between the first electrode and the second electrode; anda semiconductor pattern directly on the first electrode.2. The display device according to claim 1 , further comprising a first contact electrode on the semiconductor pattern.3. The display device according to claim 2 , further comprising a second contact electrode contacting a first end of the light emitting element and the second electrode.4. The display device according to claim 3 , wherein the semiconductor pattern overlaps the first contact electrode and does not overlap the second contact electrode.5. The display device according to claim 3 , wherein the first contact electrode and the second contact electrode are on different layers.6. The display device according to claim 5 , wherein the second contact electrode claim 5 , the semiconductor pattern claim 5 , and the first contact electrode are sequentially stacked.7. The display device according to claim 3 , wherein the semiconductor pattern is conductive when a voltage having a reference level or more is ...

DISPLAY DEVICE

A display device includes a display element layer on a substrate. The display element layer may include first and second electrodes, and light emitting elements electrically coupled to the first and second electrodes. The first electrode may include first protrusions, a first portion located between the first protrusions, a second portion corresponding to a side of each first protrusion, and a third portion coupled between the first portion and a first end of the second portion. The second electrode may include second protrusions that protrude toward the first electrode and are spaced apart from each other in the first direction, a first portion located between the second protrusions, a second portion corresponding to a side of each of the second protrusions, and a third portion coupled between the first portion and a first end of the second portion. 1. A display device , comprising:a display element layer on a substrate,wherein the display element layer comprises:a first electrode and a second electrode that extend in a first direction and are spaced apart from each other in a second direction different from the first direction; andlight emitting elements electrically coupled to the first electrode and the second electrode,wherein the first electrode comprises:first protrusions that protrude in a plane toward the second electrode and are spaced apart from each other in the first direction;a first portion located between the first protrusions;a second portion corresponding to a side of each of the first protrusions; anda third portion coupled between the first portion and a first end of the second portion,wherein the second electrode comprises:second protrusions that protrude in the same plane toward the first electrode and are spaced apart from each other in the first direction;a first portion located between the second protrusions;a second portion corresponding to a side of each of the second protrusions; anda third portion coupled between the first portion and a ...

DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

A display device and a manufacturing method thereof are disclosed. The display device may include a pixel circuit layer including a plurality of transistors, a first partition wall and a second partition wall on the pixel circuit layer, and each protruding in a thickness direction, a first electrode and a second electrode formed on the same layer, and on the first partition wall and the second partition wall, respectively; a light emitting element between the first electrode and the second electrode; and a first organic pattern directly on the light emitting element. 1. A display device , comprising:a pixel circuit layer comprising a plurality of transistors;a first partition wall and a second partition wall on the pixel circuit layer, and each protruding in a thickness direction;a first electrode and a second electrode on a same layer, and on the first partition wall and the second partition wall, respectively;a light emitting element between the first electrode and the second electrode; anda first organic pattern directly on the light emitting element.2. The display device according to claim 1 , further comprising:a second organic pattern directly on the first electrode; anda third organic pattern directly on the second electrode.3. The display device according to claim 2 , wherein the first organic pattern claim 2 , the second organic pattern claim 2 , and the third organic pattern are on the same layer.4. The display device according to claim 1 , further comprising:a first contact electrode in contact with the first electrode and a first end of the light emitting element; anda second contact electrode in contact with the second electrode and a second end of the light emitting element.5. The display device according to claim 4 , further comprising:a second organic pattern directly on the first electrode; anda third organic pattern directly on the second electrode,wherein the first contact electrode is between the first organic pattern and the second organic ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device according to an exemplary embodiment of the present disclosure comprises an insulation layer on a substrate and having a groove concave in a direction toward the substrate; a first reflective layer on at least a portion of the insulation layer; and a display element layer on the insulation layer and the first reflective layer, the display element layer including a light emitting element overlapping at least a portion of the groove and . 1. A display device comprising:an insulation layer on a substrate and having a groove concave in a direction toward the substrate;a first reflective layer on at least a portion of the insulation layer; anda display element layer on the insulation layer and the first reflective layer, the display element layer comprising a light emitting element overlapping at least a portion of the groove.2. The display device of claim 1 , wherein claim 1 ,the first reflective layer is on the groove and overlaps the light emitting element.3. The display device of claim 1 , the display element layer further comprising:a first electrode extending in the first direction and electrically coupled to the light emitting element; anda second electrode spaced apart from the first electrode in a second direction different from the first direction and electrically coupled to the light emitting element.4. The display device of claim 3 , wherein claim 3 ,each of the first electrode and the second electrode has a portion overlapping a portion of the groove.5. The display device of claim 3 , wherein claim 3 ,a distance between the first electrode and the second electrode in the second direction is less than a width of the groove in the second direction.6. The display device of claim 3 , wherein claim 3 ,a distance between the first electrode and the second electrode in the second direction is the same as a width of the first reflective layer in the second direction.7. The display device of claim 3 , wherein claim 3 ,the first and second electrodes ...

TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses. 1. A transistor array panel , comprisinga substrate; anda transistor on the substrate, wherein:the transistor includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer, andthe semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion, the first portion, the second portion, and the third portion having different minimum thicknesses.2. The transistor array panel as claimed in claim 1 , wherein the minimum thickness of the third portion is less than the minimum thickness of each of the first portion and the second portion.3. The transistor array panel as claimed in claim 1 , wherein the transistor includes:an ohmic contact layer between the semiconductor layer and the source electrode, andan ohmic contact layer between the semiconductor layer and the drain electrode.4. The transistor array panel as claimed in claim 1 , wherein a thickness of a first end of the third portion corresponds to a thickness of the first portion connected to the first end.5. The transistor array panel as claimed in claim 4 , wherein a thickness of a second end of the third portion corresponds to a thickness of the second portion connected to the second end.6. The transistor array panel as claimed in claim 1 , wherein the minimum thickness of the first portion is greater than the ...

Display apparatus and method of manufacturing the same

A display apparatus includes a substrate; a cavity layer; a display material layer; and a capping layer. The cavity layer includes a plurality of barriers arranged to be spaced apart from one another on the substrate and partitioning pixel regions, and a roof layer connecting upper parts of the plurality of barriers. The cavity layer forms a plurality of cavities including a cavity. The display material layer is formed in the cavity. The capping layer is formed on the cavity layer, the capping layer including a sealant and a plurality of fillers dispersed in the sealant.

MEMS MICROPHONE PACKAGE USING LEAD FRAME

The present disclosure discloses an MEMS microphone package. The MEMS microphone package in accordance with the present disclosure comprises a lead frame; an integrated MEMS chip mounted on the lead frame, having a vibration unit comprising a diaphragm and a backplate spaced each other with an air gap between them and a signal processing unit for amplifying electric signals generated in the vibration unit formed on a single silicon substrate; and an electric connection means for connecting the lead frame to the integrated MEMS chip. 1. An MEMS microphone package , the microphone package comprising:a lead frame;an integrated MEMS chip mounted on the lead frame, having a vibration unit comprising a diaphragm and a backplate spaced each other with an air gap between them and a signal processing unit for amplifying electric signals generated in the vibration unit, the vibrating unit and the signal processing unit being formed on a single silicon substrate, the vibrating unit being formed on a first area of the silicon substrate through MEMS process and the signal processing unit being formed on a second area located in the lateral direction of the first area of the silicon substrate; andan electric connection means for connecting the lead frame to the integrated MEMS chip,wherein the second area of the integrated MEMS chip encloses the first area.2. An MEMS microphone package , the microphone package comprising:a lead frame;an integrated MEMS chip mounted on the lead frame, having a vibration unit comprising a diaphragm and a backplate spaced each other with an air gap between them and a signal processing unit for amplifying electric signals generated in the vibration unit, the vibrating unit and the signal processing unit being formed on a single silicon substrate, the vibrating unit being formed on a first area of the silicon substrate through MEMS process and the signal processing unit being formed on a second area located in the lateral direction of the first area ...

LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THE SAME

A liquid crystal display according to exemplary embodiment of the present system and method includes: an insulating substrate; a thin film transistor positioned on the insulating substrate; a pixel electrode connected to the thin film transistor; a common electrode spaced apart from the pixel electrode while facing the pixel electrode; a liquid crystal layer injected into a microcavity between the pixel electrode and the common electrode; a roof layer formed on the common electrode; an injection hole positioned in the roof layer and the common electrode; an overcoat configured to cover the injection hole and partially overlap the roof layer; a film layer positioned on the overcoat and the roof layer; and a flattening layer positioned on the film layer. 1. A liquid crystal display , comprising:an insulating substrate;a thin film transistor positioned on the insulating substrate;a pixel electrode connected to the thin film transistor;a common electrode spaced apart from the pixel electrode while facing the pixel electrode;a liquid crystal layer positioned between the pixel electrode and the common electrode, and injected into a microcavity corresponding to one pixel;a roof layer formed on the common electrode;an injection hole positioned in the roof layer and the common electrode;an overcoat configured to cover the injection hole and partially overlap the roof layer;a film layer positioned on the overcoat and the roof layer; anda flattening layer positioned on the film layer2. The liquid crystal display of claim 1 , further comprising:an inorganic layer positioned on the film layer.3. The liquid crystal display of claim 2 , wherein:{'sub': 2', '3', '2, 'the inorganic layer includes any one of an aluminum oxide (AlO) and a titanium oxide (TiO).'}4. The liquid crystal display of claim 3 , wherein:the inorganic layer overlaps the film layer in a vertical direction with respect to a planar surface of the insulating substrate on which the thin film transistor is positioned ...

IMPRINTING APPARATUS AND METHOD FOR OPERATING IMPRINTING APPARATUS

Provided is an imprinting apparatus including: a stamp disposed on an area of a film; a first roller and a second roller configured to rotatably support the film such that the stamp moves along a lengthwise direction of the film as the first roller and the second roller rotate; a substrate which has an area corresponding to an area of the stamp and including a resin-coated surface disposed on a surface of the substrate; and a transfer unit which transfers the substrate while maintaining the resin-coated surface of the substrate faces downward. 1. An imprinting apparatus comprising:a stamp disposed on an area of a film;a first roller and a second roller configured to rotatably support the film such that the stamp moves along a lengthwise direction of the film as the first roller and the second roller rotate;a substrate which has an area corresponding to an area of the stamp and comprising a resin-coated surface disposed on a surface of the substrate; anda transfer unit configured to transfer the substrate while maintaining the resin-coated surface of the substrate facing downward.2. The imprinting apparatus of claim 1 , further comprising an injector configured to spray resin toward the surface of the substrate in a state where the surface of the substrate is placed to face downward toward the injector.3. The imprinting apparatus of claim 1 , wherein the first roller and the second roller are positioned at a same height from a ground claim 1 , a horizontal field in which the film is parallel to the ground is defined between the first roller and the second roller claim 1 , and a vertical field in which the film is perpendicular to the ground is defined on both sides of the horizontal field between the first roller and the second roller.4. The imprinting apparatus of claim 3 , wherein a feed part connected to a winding roller is disposed in one of the vertical fields claim 3 , and a discharge part to which the film is discharged is disposed in the other one of the ...

PHOTORESIST RESIN COMPOSITION AND METHOD OF FORMING PATTERNS BY USING THE SAME

A method for forming a pattern includes forming a photosensitive film by coating a photosensitive resin composition on a substrate, exposing the photosensitive film to light through a mask that includes a light transmission region and a non-light transmission region, coating a developing solution on the photosensitive film, and forming a photosensitive film pattern by baking the photosensitive film, wherein the photosensitive resin composition includes an alkali soluble base resin, a photoacid generator and a photoactive compound. 1. A method for forming a pattern , the method comprising:forming a photosensitive film by coating a photosensitive resin composition on a substrate;exposing the photosensitive film to light through a mask, the mask including a light transmission region and a non-light transmission region;coating a developing solution on the photosensitive film; andforming a photosensitive film pattern by baking the photosensitive film,wherein photosensitive resin composition includes an alkali soluble base resin, a photoacid generator and a photoactive compound.2. The method of claim 1 , wherein:the photosensitive film pattern has a substantially rectangular cross-section.3. The method of claim 1 , further comprising:forming a thin film on the substrate.4. The method of claim 3 , wherein:the thin film is a pixel electrode of a liquid crystal display, and the pixel electrode includes a fine branch electrode.5. The method of claim 4 , wherein:a width of the fine branch electrode is about 2 μm or less.6. The method of claim 1 , wherein:the photosensitive resin composition further includes a phenol-based compound including a hydrophobic group.8. The method of claim 1 , wherein:the alkali soluble base resin is a tandem type resin.9. The method of claim 8 , wherein:the tandem type resin includes a high molecular weight resin, a low molecular weight resin, and a medium molecular weight resin, wherein the medium molecular weight resin is included in a smaller ...

SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF

Provided are a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array having a plurality of strings each including a drain select transistor, a plurality of drain side memory cells, a pipe transistor, a plurality of source side memory cells, and a source select transistor. The semiconductor memory device may also include a peripheral circuit suitable for providing a plurality of operation voltages including an erase verify voltage to the plurality of strings, and a control logic suitable for controlling the peripheral circuit to adjust a voltage level of the erase verify voltage applied to a selected memory cell, from among the plurality of drain side memory cells and the plurality of source side memory cells, according to a distance between the selected memory cell and the pipe transistor when an erase verify operation is performed. 1. A semiconductor memory device , comprising:a memory cell array having a plurality of strings each including a drain select transistor, a plurality of drain side memory cells, a pipe transistor, a plurality of source side memory cells, and a source select transistor;a peripheral circuit suitable for providing a plurality of operation voltages including an erase verify voltage to the plurality of strings; anda control logic suitable for controlling the peripheral circuit to adjust a voltage level of the erase verify voltage applied to a selected memory cell, from among the plurality of drain side memory cells and the plurality of source side memory cells, according to a distance between the selected memory cell and the pipe transistor when an erase verify operation is performed.2. The semiconductor memory device of claim 1 , wherein the erase verify voltage is reduced as the selected memory cell is closer to the pipe transistor.3. The semiconductor memory device of claim 1 , wherein the string has a U-shaped channel layer structure.4. The semiconductor memory device ...

DISPLAY DEVICE

Provided is a display device capable of preventing a liquid crystal from being left outside a microcavity. The display device includes: a substrate; a pixel electrode formed on the substrate; a roof layer formed on the pixel electrode so as to be spaced apart from the pixel electrode with a plurality of microcavities therebetween; a light blocking member positioned between two microcavities of the plurality of microcavities, overlapping with a first edge of one microcavity of the two microcavities, and not overlapping with a second edge of the other microcavity; an injection hole exposing a part of the microcavity; a liquid crystal layer filling the microcavity; and an encapsulation layer formed on the roof layer so as to cover the injection hole to seal the microcavity. 1. A display device , comprising:a substrate;a pixel electrode on the substrate;a roof layer on the pixel electrode and spaced apart from the pixel electrode,a plurality of microcavities defined between the pixel electrode and the roof layer, each of which comprises a first edge opposite to a second edge thereof;a light blocking member between two adjacent microcavities of the plurality of microcavities, overlapping the first edge of one microcavity of the two microcavities, and not overlapping the second edge of the other microcavity of the two microcavities;an injection hole exposing an inner area of a microcavity;a liquid crystal layer in the microcavity; andan encapsulation layer on the roof layer, which covers the injection hole and seals the microcavity.2. The display device of claim 1 , wherein:the light blocking member is between the pixel electrode and the roof layer.3. The display device of claim 2 , further comprising:a first alignment layer on the pixel electrode;a second alignment layer below the roof layer; andan alignment material column connecting the first alignment layer and the second alignment layer to each other.4. The display device of claim 3 , further comprisinga first ...

INTERNET CONNECTION DEVICE, CENTRAL MANAGEMENT SERVER, AND INTERNET CONNECTION METHOD

A network connecting device, a central management server, and a network connecting method. The network connecting device is a network connecting device connected to a user terminal and a network, and it includes: a forgery and falsification detector which changes a destination IP address of a domain name server (DNS) query received from the user terminal with an IP address of a DNS that is known in advance and is reliable; and a network connector which transmits a DNS query including an IP address of the reliable DNS to the network. 122-. (canceled)23. A network connecting device comprising:a forgery and falsification detector which changes a destination IP address provided in a domain name server (DNS) query received from a user terminal with an IP address of a DNS that is known in advance and is reliable; anda network connector which transmits the DNS query comprising the IP address of the reliable DNS to a network.24. The network connecting device of claim 23 , wherein:the forgery and falsification detector tests the destination IP address provided in the DNS query to determine whether the destination IP address is the IP address of the reliable DNS, andin response to the forgery and falsification detector determining that the destination IP address is not the IP address, the forgery and falsification detector changes the destination IP address to the IP address of the reliable DNS.25. The network connecting device of claim 24 , whereinthe forgery and falsification detector transmits, via the network connector, transmission information of the DNS query to a central management server, after the network connector transmits the DNS query to the network.26. The network connecting device of claim 25 , whereinthe network connector transmits the transmission information provided by the forgery and falsification detector to the central management server through an encrypted communication.27. The network connecting device of claim 26 , whereinthe forgery and falsification ...

X-RAY IMAGING APPARATUS AND METHOD OF OPERATING THE SAME

An apparatus including a scintillator panel which absorbs X-rays radiated from an X-ray generator and converts the X-rays into visible light; an image detector including a plurality of pixels arranged in a matrix array and charging the plurality of pixels with electric charges proportional to intensity of the visible light converted by the scintillator panel; a gate driver which selects a line in the image detector and applies a drive signal to pixels in the selected line; an automatic exposure request signal generator which generates an automatic exposure request signal as a trigger signal informing of X-ray radiation through detection of X-rays radiated from the X-ray generator; and a controller which controls a time point of performing an exposure operation depending on a state of the drive signal applied to the pixels of the selected line in response to the automatic exposure request signal is disclosed. 1. An X-ray imaging apparatus comprising:a scintillator panel which absorbs X-rays radiated from an X-ray generator and converts the X-rays into visible light;an image detector including a plurality of pixels arranged in a matrix array and charging the plurality of pixels with electric charges proportional to intensity of the visible light converted by the scintillator panel;a gate driver which selects a line in the image detector and applies a drive signal to pixels in the selected line; anda controller which controls a time point of performing an exposure operation depending on a state of the drive signal applied to the pixels of the selected line in response to an exposure request signal informing of X-ray radiation from the X-ray generator.2. The X-ray imaging apparatus according to claim 1 , wherein the controller completes preparation for the exposure operation after application of the drive signal is completed claim 1 , when the drive signal applied to the pixels of the selected line is in an active state at a time point of receiving the exposure request ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A display device includes a substrate, a thin film transistor disposed on the substrate, and a pixel electrode electrically connected to the thin film transistor. The display device further includes a roof layer overlapping the pixel electrode with a cavity being positioned between the roof layer and the pixel electrode, the cavity having an opening. The display device further includes an alignment layer and a liquid crystal layer disposed inside the cavity. The display device further includes a plurality of bead members disposed at the opening and including a first bead member, a first portion of the first bead member being disposed inside the cavity, a second portion of the first bead member being disposed outside the cavity. The display device further includes an encapsulation layer overlapping the roof layer and overlapping the plurality of bead members. 1. A display device comprising:a substrate including a plurality of pixel areas;a thin film transistor disposed on the substrate;a pixel electrode electrically connected to the thin film transistor and disposed in the pixel area;a roof layer overlapping the pixel electrode with a plurality of microcavities being positioned between the roof layer and the pixel electrode, the microcavity having an injection hole;an alignment layer disposed inside the microcavity;a liquid crystal layer disposed inside the microcavity;a plurality of bead members disposed at the injection hole; andan encapsulation layer overlapping the roof layer and overlapping the plurality of bead members.2. The display device of claim 1 , wherein a diameter of the bead member is equal to or larger than a height of the microcavity.3. The display device of claim 2 , whereinthe diameter of the bead member is equal to or smaller than 110% of the height of the microcavity.4. The display device of claim 1 , whereinan area of the injection hole blocked by the plurality of bead members is in a range of 1% to 80% of the entire area of the injection hole.5 ...

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATED BY THE SAME

Example methods for fabricating a semiconductor device and example semiconductor devices are disclosed. An example method may include forming a sacrificial gate structure on a substrate, and the sacrificial gate structure may include a first portion and a second portion. The method may further include, removing the first portion of the sacrificial gate structure and forming an oxide film by oxidizing an upper surface of the second portion of the sacrificial gate structure after removing the first portion of the sacrificial gate structure. The method may additionally include, forming a trench on the substrate by removing the oxide film and the second portion of the sacrificial gate structure; and forming a gate electrode that fills the trench. 1. A method for fabricating a semiconductor device , the method comprising:forming a sacrificial gate structure on a substrate, the sacrificial gate structure including a first portion and a second portion;removing the first portion of the sacrificial gate structure;forming an oxide film by oxidizing an upper surface of the second portion of the sacrificial gate structure after removing the first portion of the sacrificial gate structure;forming a trench on the substrate by removing the oxide film and the second portion of the sacrificial gate structure; andforming a gate electrode that fills the trench.2. The method for fabricating the semiconductor device of claim 1 , wherein the sacrificial gate structure comprises polysilicon (poly Si).3. The method for fabricating the semiconductor device of claim 1 , wherein a dry etching process is utilized to remove the first portion of the sacrificial gate structure.4. The method for fabricating the semiconductor device of claim 1 , wherein a wet etching process is utilized to remove the oxide film and the second portion of the sacrificial gate structure.5. The method for fabricating the semiconductor device of claim 1 , wherein the formation of the oxide film is performed in-situ with ...

X-RAY IMAGING APPARATUS AND METHOD OF OPERATING THE SAME

An apparatus including a scintillator panel which absorbs X-rays radiated from an X-ray generator and converts the X-rays into visible light; an image detector including a plurality of pixels arranged in a matrix array and charging the plurality of pixels with electric charges proportional to intensity of the visible light converted by the scintillator panel; a gate driver which selects a line in the image detector and applies a drive signal to pixels in the selected line; an automatic exposure request signal generator which generates an automatic exposure request signal as a trigger signal informing of X-ray radiation through detection of X-rays radiated from the X-ray generator; and a controller which controls a time point of performing an exposure operation depending on a state of the drive signal applied to the pixels of the selected line in response to the automatic exposure request signal is disclosed. 1. A method of operating an X-ray imaging apparatus comprising:receiving, by a controller, a trigger signal informing of X-ray radiation;determining, by the controller, whether a drive signal is applied to pixels of a selected line in an image detector including a plurality of pixels arranged in a matrix array to perform a flush operation, upon receiving the trigger signal; andperforming, by the controller, an exposure operation after completion of the flush operation.2. The method according to claim 1 , wherein the trigger signal is an exposure request signal received from an X-ray generator.3. The method according to claim 1 , further comprising: detecting claim 1 , by an automatic exposure request signal generator claim 1 , X-rays radiated from an X-ray generator to generate the trigger signal claim 1 , before receiving the trigger signal.4. The method according to claim 3 , wherein the generating the trigger signal comprises:converting X-rays radiated from the X-ray generator into visible light;detecting and converting the visible light into an electric ...

Converter for electric power

The present invention relates to a converter for electric power having multiple sub-modules connected in series, the sub-modules having an energy storage unit and multiple power semiconductor circuits connected in parallel to the energy storage unit, and which causes an electric current to bypass a sub-module in case the breakdown of the sub-module occurs. To this end, the converter for electric power according to the present invention has multiple sub-modules connected to each other in series, the sub-modules having an energy storage unit and at least one power semiconductor circuit that is connected in parallel to the energy storage unit and comprises multiple power semiconductor switches and freewheeling diodes, wherein each of the sub-modules comprises a bypass switching unit, which is connected in parallel to any one of said at least one power semiconductor circuit, and bypasses an electric current via the bypass switching unit.

CONVERTER

The present invention provides a converter including a plurality of sub-modules connected in series to each other, wherein each of the sub-modules includes a first half-bridge unit including a first energy storage unit, and a plurality of first power semiconductors connected in parallel to the first energy storage unit and connected in series to each other; a second half-bridge unit including a second energy storage unit, and a plurality of second power semiconductors connected in parallel to the second energy storage unit and connected in series to each other; and an auxiliary circuit unit connecting the first half-bridge unit and the second half-bridge unit; wherein the auxiliary circuit unit includes a single third power semiconductor and a single diode. 1. A converter comprising a plurality of sub-modules connected in series to each other , wherein:each of the sub-modules comprises:a first half-bridge unit comprising a first energy storage unit, and a plurality of first power semiconductors connected in parallel to the first energy storage unit and connected in series to each other;a second half-bridge unit comprising a second energy storage unit, and a plurality of second power semiconductors connected in parallel to the second energy storage unit and connected in series to each other; andan auxiliary circuit unit connecting the first half-bridge unit and the second half-bridge unit;wherein the auxiliary circuit unit comprises a single third power semiconductor and a single diode.2. The converter of claim 1 , wherein a (+) terminal of the first energy storage unit and a (−) terminal of the second energy storage unit are connected through the third power semiconductor claim 1 , and a (−) terminal of the first energy storage unit and a (+) terminal of the second energy storage unit are connected through the diode.3. The converter of claim 2 , wherein an emitter terminal of the third power semiconductor is connected to a (−) terminal of any one of the first and ...

TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses. 1. A method for manufacturing a transistor array panel , comprising:forming a gate electrode on a substrate;forming a gate insulating layer to cover the gate electrode;sequentially forming a semiconductor layer, a first ohmic contact layer, and a first conductive layer on the gate insulating layer, and patterning the first conductive layer, the first ohmic contact layer, and the semiconductor layer; andsequentially forming a second ohmic contact layer and a second conductive layer, and patterning the second conductive layer and the second ohmic contact layer.2. The method as claimed in claim 1 , wherein patterning the first conductive layer includes:forming a first-stage photosensitive film pattern including a first portion and a second portion with different thicknesses on the first conductive layer; andetching the first conductive layer using the first-stage photosensitive film pattern as a mask.3. The method as claimed in claim 2 , wherein patterning the first ohmic contact layer and the semiconductor layer includes:forming a second-stage photosensitive film pattern by etching back the first-stage photosensitive film pattern, andetching the first ohmic contact layer and the semiconductor layer using the patterned first conductive layer as a mask.4. The method as claimed in claim 3 , further comprising:after etching the semiconductor layer, etching the patterned first conductive layer using the second-stage photosensitive film pattern as a mask to form a source electrode or a ...

LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF

A liquid crystal display according to an exemplary embodiment includes: a substrate; a liquid crystal layer positioned on the substrate and formed with a plurality of microcavities including liquid crystal molecules; a roof layer positioned on the liquid crystal layer; a capping layer positioned on the roof layer; and a light source positioned on the capping layer and positioned between the plurality of microcavities. 1. A liquid crystal display comprising:a substrate;a liquid crystal layer positioned on the substrate and formed with a plurality of microcavities including liquid crystal molecules;a roof layer positioned on the liquid crystal layer;a capping layer positioned on the roof layer; anda light source positioned on the capping layer and positioned between the plurality of microcavities.2. The liquid crystal display of claim 1 , further comprisinga light guide panel covering the light source and the capping layer.3. The liquid crystal display of claim 2 , further comprising:a diffuser sheet positioned between the light source and the light guide panel; anda reflection sheet formed on the light guide panel.4. The liquid crystal display of claim 1 , further comprisinga light blocking member positioned between the capping layer and the light source.5. The liquid crystal display of claim 2 , wherein the light guide panel is patterned at a position corresponding to the light source.6. The liquid crystal display of claim 2 , further comprising:a first diffuser sheet positioned between the light source and the light guide panel; anda second diffuser sheet formed on the light guide panel.7. The liquid crystal display of claim 1 , further comprising:a thin film transistor positioned on the substrate;a pixel electrode connected to the thin film transistor;an upper insulating layer positioned on the roof layer; anda lower insulating layer positioned under the roof layer and facing the pixel electrode based on the microcavities.8. The liquid crystal display of claim 7 , ...

Microfluidic bio sample processing apparatus capable of being assembled

Disclosed is a microfluidic bio sample processing apparatus including a processing module configured for processing the bio sample and having a hole through which the processed bio sample, a solution for processing the bio sample or both flow, a board having a flowing channel connected with the hole so as to allow the bio sample, the solution for processing the bio sample or both to flow between processing modules and a bonding feature for bonding the processing module with the board. The processing modules are configured to be assembled and/or disassembled onto or from the board so that the processing apparatus is adapted to various kinds of bio samples having different processing steps.

Uv light emitting diode

A UV light emitting diode includes a substrate having a plurality of holes surrounded by a flat surface, a first conductivity type semiconductor layer disposed on the substrate, a second conductivity type semiconductor layer disposed on the first conductivity type semiconductor layer, an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer. A distance from the flat surface to the active layer is smaller than a distance from bottom surfaces of the plurality of holes to the active layer. The flat surface is in contact with the first conductivity type semiconductor layer.

Converter for electric power

The present invention relates to a converter for electric power having multiple sub-modules connected in series, the sub-modules having an energy storage unit and multiple power semiconductor circuits connected in parallel to the energy storage unit, and which causes an electric current to bypass a sub-module in case the breakdown of the sub-module occurs. To this end, the converter for electric power according to the present invention has multiple sub-modules connected to each other in series, the sub-modules having an energy storage unit and at least one power semiconductor circuit that is connected in parallel to the energy storage unit and comprises multiple power semiconductor switches and freewheeling diodes, wherein each of the sub-modules comprises a bypass switching unit, which is connected in parallel to any one of said at least one power semiconductor circuit, and bypasses an electric current via the bypass switching unit.

Piezoelectric inkjet printhead having temperature sensor and method of attaching temperature sensor to inkjet printhead

Methods for programming user data and confirmation information in nonvolatile memory devices

Method of programming nonvolatile memory devices are provided in which data is programmed into a first plurality of memory cells of the nonvolatile memory device. At the same time associated programming confirmation information is programmed into at least one second memory cell of the nonvolatile memory device. Then, a determination is made as to whether the data was correctly programmed into the first plurality of memory cells based on an evaluation of (1) the threshold voltage distributions of at least some of the first plurality of memory cells and (2) the threshold voltage distribution of the at least one second memory cell. Methods of resuming a data programming operation after an interruption such as a loss of power are also provided.

X-ray imaging apparatus and method of operating the same

An apparatus including a scintillator panel which absorbs X-rays radiated from an X-ray generator and converts the X-rays into visible light; an image detector including a plurality of pixels arranged in a matrix array and charging the plurality of pixels with electric charges proportional to intensity of the visible light converted by the scintillator panel; a gate driver which selects a line in the image detector and applies a drive signal to pixels in the selected line; an automatic exposure request signal generator which generates an automatic exposure request signal as a trigger signal informing of X-ray radiation through detection of X-rays radiated from the X-ray generator; and a controller which controls a time point of performing an exposure operation depending on a state of the drive signal applied to the pixels of the selected line in response to the automatic exposure request signal is disclosed.

Method of fabricating gallium nitride based semiconductor device

Exemplary embodiments of the present invention disclose a method of fabricating a gallium nitride (GaN) based semiconductor device. The method includes growing GaN based semiconductor layers on a first surface of a GaN substrate to form a semiconductor stack, and separating at least a first portion of the GaN substrate from the semiconductor stack using a wire cutting technique.

Electronic device including biometric sensor

An electronic device according to one embodiment of the present disclosure may include: a housing; an optical element unit which may be configured to emit light toward a user's body, receive light reflected from the user's body, and convert the received light into a first signal; an IC element which may be configured to convert the first signal provided from the optical element unit into a second signal, and provide the second signal to a main circuit board disposed in the housing; a first circuit board that may be disposed between the optical element unit and the IC element and may be electrically connected to the optical element unit and the IC element; and a second circuit board that may include at least one first opening in which the IC element is mounted. The housing may include at least one transparent region such that the light generated by the optical element unit is transmitted through the transparent region to an exterior of the housing.

Ink supply apparatus of inkjet printing system

An ink supply apparatus of an inkjet printing system includes an ink tank including a pressure port and an ink supply opening connected to a print head, a flexible ink package connected to the ink supply opening to accommodate ink, and a pressure supply device to supply a purging pressure to the ink package by supplying a pressure fluid to the ink tank.

Method of operating a flash memory device

A method of operating a flash memory device wherein the width of threshold voltage distribution of memory cells is adjusted by setting different conditions of a program operation in accordance with levels of threshold voltages of the memory cells. As a result, width of the threshold voltage distribution of memory cells may be narrowed.

Piezoelectric inkjet printhead having temperature sensor and method of making the same

A piezoelectric inkjet printhead having a channel forming plate including an ink channel having a pressure chamber coupled to a nozzle, a piezoelectric actuator including a lower electrode on the channel forming plate, a piezoelectric element on the lower electrode, and an upper electrode on the piezoelectric element, the piezoelectric actuator corresponding to the pressure chamber, an insulation element on the lower electrode and spaced apart from the piezoelectric element, a first electrode on the insulation element, and a temperature sensor on the first electrode, and a method of making the same.

Photo mask and method of manufacturing in-plane-switching mode liquid crystal display device using the same

A photo mask is disclosed. The photo mask includes a mask substrate, and a mask pattern formed to include a plurality of unit mask patterns which are arranged in a single line for a fine pattern formation. The unit mask pattern is configured to include a body portion positioned at a center and wing portions formed in a triangular shape at both sides of the body portion.

Composition and method for inhibiting tau protein accumulation, aggregation, and tangle formation

Disclosed are a composition and method for inhibiting tau protein accumulation, aggregation, or tangle, the composition containing neurons or glia having Nurr1 and/or Foxa2 genes introduced thereinto, wherein the composition and method can be utilized in the prevention or treatment of a cerebral nervous disease caused by tau protein accumulation, aggregation, or tangle formation.

Semiconductor light-emitting device, method of fabricating the same, and package comprising the same

A semiconductor light-emitting device, which has excellent light emission efficiency in the lateral direction and facilitates substrate cutting, a method of fabricating the semiconductor light-emitting device, and a semiconductor light-emitting device including the semiconductor light-emitting device. The semiconductor light-emitting device includes a sapphire substrate and a nitride structure stacked on the upper surface of the substrate. The nitride structure has a plurality of nitride epitaxial layers including an active layer that generates light. A respective horizontal cross-section of the substrate and the nitride structure has a rhombic shape having two acute angles and two obtuse angles. The substrate has at least one refined area on at least one side surface thereof, the refined area having a band-like shape extending in a horizontal direction.

Method of fabricating gallium nitride based semiconductor device

Exemplary embodiments of the present invention disclose a method of fabricating a gallium nitride (GaN) based semiconductor device. The method includes growing GaN based semiconductor layers on a first surface of a GaN substrate to form a semiconductor stack, and separating at least a first portion of the GaN substrate from the semiconductor stack using a wire cutting technique.

Cleaning solution for cleaning surface of nozzle plate of inkjet printhead and method of cleaning surface of nozzle plate by using the cleaning solution

Provided are a cleaning solution for cleaning a surface of a nozzle plate of an inkjet printhead that prints an image by ejecting ink droplets through nozzles and a method of cleaning a surface of a nozzle plate by using the cleaning solution. The cleaning solution includes a solvent; and an additive comprising at least one of a leveling agent and a surfactant, which is added to the solvent.