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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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10-08-2017 дата публикации

OPTICAL VIEWING DEVICE

Номер: US20170227519A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

An optical viewing device includes a first assembly and a second assembly. The first assembly includes a first body and a light source. The second assembly includes a second body, a convex lens and an image capturing module. The first body has a first connecting portion and a light output hole, and the first connecting portion is disposed on at least one side of the light output hole. The light source is disposed within the first body. The second body has a second connecting portion, which is disposed corresponding to the first connecting portion. The convex lens and the image capturing module are disposed within the second body, and the light outputted from the light output hole passes through the convex lens and then enters the image capturing module. The first connecting portion and the second connecting portion are connected with each other to form a chamber. 1. An optical viewing device , comprising: a first body comprising a first connecting portion and a light output hole, wherein the first connecting portion is disposed on at least one side of the light output hole, and', 'a light source disposed within the first body; and, 'a first assembly comprising a second body comprising a second connecting portion, which is disposed corresponding to the first connecting portion,', 'a convex lens disposed within the second body, and', 'an image capturing module disposed within the second body, wherein the light outputted from the light output hole passes through the convex lens and then enters the image capturing module;, 'a second assembly comprisingwherein the first connecting portion and the second connecting portion match and connect each other to form a chamber.2. The optical viewing device as recited in claim 1 , wherein the first connecting portion is disposed around the light output hole.3. The optical viewing device as recited in claim 1 , wherein the second body comprises a light input hole claim 1 , the second connecting portion is disposed around the light ...

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Номер записи: 1
16-02-2017 дата публикации

MICROSCOPE MODULE AND MICROSCOPE DEVICE

Номер: US20170045724A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Shu-Sheng LIN, Tsun-Chao CHIANG, LIN CHENG-MING, CHEN CHANG-YU, LIN SHU-SHENG, CHIANG TSUN-CHAO, LIN Cheng-Ming, CHEN Chang-Yu, LIN Shu-Sheng, CHIANG Tsun-Chao
Принадлежит:

A microscope module includes a housing, a convex lens and a light guide element. The housing has a sample inspecting surface located on one side of the housing opposite to an image capturing module. The convex lens is disposed in the housing, and the shortest distance between the sample inspecting surface and the convex lens ranges from 0.1 mm to 3.0 mm. The light guide element is disposed on an external portion of the housing and has a light input portion and a light output portion. The light output portion is located between the image capturing module and the convex lens. The light input portion receives a light, and the light is outputted through the light output portion to the convex lens. The light passes through the convex lens and then reaches the sample inspecting surface. A microscope device including the microscope module is also disclosed. 1. A microscope module , which is cooperated with an image capturing module , comprising:a housing having a sample inspecting surface, which is located on one side of the housing opposite to the image capturing module;a convex lens disposed in the housing, wherein a shortest distance between the sample inspecting surface and the convex lens ranges from 0.1 mm to 3.0 mm; anda light guide element disposed on an external portion of the housing, wherein the light guide element has a light input portion and a light output portion, the light output portion is located between the image capturing module and the convex lens, the light input portion receives a light, and the light is outputted through the light output portion to the convex lens;wherein, the light enters the convex lens through a light input surface of the convex lens, leaves the convex lens through a light output surface of the convex lens, and then reaches the sample inspecting surface.2. The microscope module of claim 1 , wherein the light guide element has a bar structure or an annular structure.3. The microscope module of claim 1 , wherein the light guide ...

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Номер записи: 2
10-08-2017 дата публикации

REFLECTING MICROSCOPE MODULE AND REFLECTING MICROSCOPE DEVICE

Номер: US20170227758A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

A reflecting microscope module cooperating with an image capturing module includes a housing, a lens and a sample adhesive substance. The housing has a sample inspecting surface located on one side of the housing opposite to the image capturing module. The lens is disposed in the housing and the sample adhesive substance is detachably disposed on a bottom of the housing. The sample adhesive substance adjacently connected to the sample inspecting surface includes a substrate and a glue layer. The glue layer is integrally combined with the substrate to form one piece. A reflecting microscope device is also disclosed. 1. A reflecting microscope module cooperating with an image capturing module , the reflecting microscope module comprising:a housing having a sample inspecting surface located on one side of the housing opposite to the image capturing module;a lens disposed in the housing; anda sample adhesive substance, which is detachably disposed on a bottom of the housing, is adjacently connected to the sample inspecting surface and comprises:a substrate; anda glue layer integrally combined with the substrate to form one piece.2. The reflecting microscope module according to claim 1 , wherein a light ray is reflected by the sample adhesive substance and then penetrates through the lens and reaches the image capturing module.3. The reflecting microscope module according to claim 1 , wherein a light ray outputted from a light source is inputted from a light input surface of the lens claim 1 , and is outputted from a light output surface of the lens to the sample inspecting surface.4. The reflecting microscope module according to claim 1 , further comprising:a light emitting assembly, which has a light source and is disposed adjacently to the lens.5. The reflecting microscope module according to claim 4 , wherein the light source of the light emitting assembly is an annular light emitting source.6. The reflecting microscope module according to claim 1 , further ...

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Номер записи: 3
10-08-2017 дата публикации

SAMPLE ADHESIVE ELEMENT, SAMPLE CARRYING MODULE AND PORTABLE MICROSCOPE APPARATUS USING THE SAME

Номер: US20170227757A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

A portable microscope apparatus operated with an image capture device includes a sample carrying module, a lens module, a first polarizer and a second polarizer. The sample carrying module includes a transparent carrier and a sample adhesive element including a substrate and a glue layer. The substrate has a concave portion and an extending portion. The concave portion is adjacently connected to the extending portion to form a first surface. The glue layer is at least partially disposed on the first surface and in an integrated form with the substrate. The lens module is detachably connected to the image capture device, and disposed between the sample carrying module and the image capture device. The first polarizer is disposed on an optical path on one side of the sample carrying module. The second polarizer is disposed on the optical path on the other side of the sample carrying module. 1. A sample adhesive element , comprising:a substrate having a concave portion and an extending portion, wherein the extending portion is adjacently connected to the concave portion to form a first surface; anda glue layer at least partially disposed on the first surface and in an integrated form with the substrate.2. The sample adhesive element according to claim 1 , wherein an adhesive property of the glue layer on the concave portion is lower than an adhesive property of the glue layer on the extending portion.3. The sample adhesive element according to claim 1 , wherein at least a partial area of the sample adhesive element is a light-permeable area.4. The sample adhesive element according to claim 3 , wherein the extending portion is an opaque area claim 3 , and the concave portion is the light-permeable area.5. The sample adhesive element according to claim 3 , wherein the concave portion has a light obstructing spot.6. The sample adhesive element according to claim 1 , wherein the sample adhesive element is a sticker.7. A sample carrying module claim 1 , comprising:a light- ...

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Номер записи: 4
18-05-2017 дата публикации

MICROSCOPE UNIT AND MICROSCOPE DEVICE

Номер: US20170138840A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

A microscope unit and a microscope device are disclosed. The microscope unit is used with an external image capture module or an image capture module of the microscope device. The microscope unit comprises a body, an optical assembly and a heating element. The body has a tunnel going through the body, and a specimen observation plane located in the tunnel. The optical assembly having a convex lens is disposed at one end of the tunnel. A minimum distance from the specimen observation plane to the convex lens ranges from 0.1 mm to 3.0 mm. The heating element is disposed corresponding to the specimen observation plane. 1. A microscope unit used with an image capture module , the microscope unit comprising:a body having a tunnel going through the body, and a specimen observation plane located in the tunnel;an optical assembly, which has a convex lens and is disposed at one end of the tunnel, wherein a minimum distance from the specimen observation plane to the convex lens ranges from 0.1 mm to 3.0 mm; anda heating element disposed corresponding to the specimen observation plane.2. The microscope unit according to claim 1 , wherein the heating element is disposed on the optical assembly.3. The microscope unit according to claim 1 , wherein the heating element is disposed on a chamber wall of the body or in the tunnel.4. The microscope unit according to claim 1 , wherein the heating element is disposed on a chamber wall of the body or the optical assembly through a fixing member.5. The microscope unit according to claim 1 , wherein the heating element covers the convex lens.6. The microscope unit according to claim 5 , wherein a material of the heating element is selected from the group consisting of tungsten claim 5 , aluminum claim 5 , copper claim 5 , an alloy of tungsten claim 5 , an alloy of aluminum and an alloy of copper.7. The microscope unit according to claim 1 , wherein the microscope unit has a built-in power source or the microscope unit is connected to an ...

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Номер записи: 5
23-03-2017 дата публикации

DETECTING DEVICE, DETECTING MODULE AND DETECTING METHOD

Номер: US20170084019A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

A detecting device for detecting a sample in a fluid includes an image capturing unit, at least one lens, a detecting area and a light source. The image capturing unit has at least one camera. The lens is disposed at one side of the image capturing unit corresponding to the camera. The lens and the image capturing unit together form a DOF area, and the lens has a first optical axis. The detecting area is located in the DOF area, and the fluid flows through the detecting area. The light source emits a light beam to the DOF area along a second optical axis for illuminating at least a part of the detecting area. The image capturing unit captures at least a part of the light beam reflected, refracted or excited by the sample flowing through the detecting area for generating at least one sample image. 1. A detecting device for detecting a sample in a fluid , comprising:an image capturing unit having at least a camera;at least one lens disposed at one side of the image capturing unit corresponding to the camera, wherein the lens and the image capturing unit together form a DOF (depth of field) area, and the lens has a first optical axis;a detecting area located in the DOF area, wherein the fluid flows through the detecting area; anda light source emitting a light beam to the DOF area along a second optical axis for illuminating at least a part of the detecting area;wherein, the image capturing unit captures at least a part of the light beam reflected, refracted or excited by the sample flowing through the detecting area for generating at least one sample image.2. The detecting device of claim 1 , wherein the lens has a convex portion claim 1 , and the detecting area corresponds to the convex portion.3. The detecting device of claim 1 , further comprising:a channel, wherein the fluid flows in the channel and the detecting area is disposed in the channel.4. The detecting device of claim 3 , wherein an axial direction of the channel is perpendicular to or parallel to the ...

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Номер записи: 6
10-08-2017 дата публикации

SAMPLE CARRYING MODULE AND PORTABLE MICROSCOPE USING THE SAME

Номер: US20170227756A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

A microscope apparatus includes a sample carrying module, a light source module and a lens module. The sample carrying module includes an adhesive element and a body having a light-transmission region and a sample viewing surface. The adhesive element is detachably adhered to the body, and at least partially covers the light-transmission region, such that the adhesive element is disposed adjacent to the sample viewing surface. The light source module is detachably disposed at a side of the body, and includes a base and a light source. The base has an aperture, and the sample carrying module is detachably disposed at a side of the aperture. The light source is disposed in the base. The lens module includes at least one lens, which is detachably disposed at one side of the sample carrying module and substantially focuses at the sample viewing surface, and corresponds to the light source module. 1. A sample carrying module cooperated with a light source module , comprising:a body having a light-transmission region and a sample viewing surface; andan adhesive element detachably adhered to the body, wherein the adhesive element at least partially covers the light-transmission region, and the adhesive element is disposed adjacent to the sample viewing surface.2. The sample carrying module of claim 1 , wherein the adhesive element is a transparent element.3. The sample carrying module of claim 2 , wherein the adhesive element is a sticker.4. The sample carrying module of claim 1 , wherein the adhesive element has a sample attaching surface configured with an adhesive region and a non-adhesive region.5. The sample carrying module of claim 4 , wherein the adhesive region has a pattern for assisting observation.6. The sample carrying module of claim 4 , wherein the adhesive region comprises a transparent area and a nontransparent area.7. The sample carrying module of claim 1 , further comprising:at least a first magnetic element disposed at one side of the body.8. The sample ...

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Номер записи: 7
10-08-2017 дата публикации

SAMPLE DETECTING DEVICE

Номер: US20170227518A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Tsun-Chao CHIANG, Shu-Sheng LIN, LIN CHENG-MING, CHEN CHANG-YU, CHIANG TSUN-CHAO, LIN SHU-SHENG, LIN Cheng-Ming, CHEN Chang-Yu, CHIANG Tsun-Chao, LIN Shu-Sheng
Принадлежит:

A sample detecting device is used in cooperation with an image capturing device. The sample detecting device includes a first assembly and a second assembly. The first assembly includes a light emitting unit and a light-permeable unit. The light-permeable unit is disposed at one side of the light emitting unit. The first assembly and the second assembly match and connect with each other to form a sample containing space. The second assembly includes a body and a convex lens. The body has a first cavity portion and a second cavity portion. The light-permeable unit is disposed in the first cavity portion, and the convex lens is disposed in the second cavity portion. The light emitted from the light emitting unit sequentially passes through the light-permeable unit and the convex lens and leaves the body. 1. A sample detecting device used in cooperation with an image capturing device , comprising:a first assembly comprising:a light emitting unit; anda light-permeable unit disposed at one side of the light emitting unit; anda second assembly matching and connecting to the first assembly to form a sample containing space, the second assembly comprising:a body comprising a first cavity portion and a second cavity portion, wherein the light-permeable unit is disposed in the first cavity portion; anda convex lens disposed in the second cavity portion, wherein the light emitted from the light emitting unit sequentially passes through the light-permeable unit and the convex lens and then leaves the body.2. The sample detecting device as recited in claim 1 , wherein the light emitting unit comprises a light source and a light output hole claim 1 , the light source is disposed in the light emitting unit claim 1 , and at least a part of the light emitted by the light source is outputted through the light output hole.3. The sample detecting device as recited in claim 1 , wherein the light emitting unit comprises a light source and a housing claim 1 , the light source is disposed ...

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Номер записи: 8
16-02-2017 дата публикации

MICROSCOPE MODULE AND MICROSCOPE DEVICE

Номер: US20170045723A1
Автор: Cheng-Ming LIN, Chang-Yu CHEN, Shu-Sheng LIN, Tsun-Chao CHIANG, LIN CHENG-MING, CHEN CHANG-YU, LIN SHU-SHENG, CHIANG TSUN-CHAO, LIN Cheng-Ming, CHEN Chang-Yu, LIN Shu-Sheng, CHIANG Tsun-Chao
Принадлежит: AIDMICS BIOTECHNOLOGY Co Ltd

A microscope module, which is cooperated with an image capturing module, includes a housing, a convex lens and an illumination assembly. The housing has a sample inspecting surface located on one side of the housing, which is opposite to the image capturing module. The convex lens is disposed in the housing, and the shortest distance between the sample inspecting surface and the convex lens ranges from 0.1 mm to 3.0 mm. The illumination assembly has a light source and is located between the image capturing module and the convex lens. The light emitted from the light source enters the convex lens through an input surface of the convex lens, leaves the convex lens through an output surface of the convex lens, and then reaches the sample inspecting surface. A microscope device containing the microscope module is also disclosed.

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Номер записи: 9
18-10-2012 дата публикации

Three-dimensional glasses and power supplying method thereof

Номер: US20120262636A1
Автор: Ming-Cheng Lin, Yu-Hsiang Huang
Принадлежит: Coretronic Corp

A three-dimensional glasses including a glasses main body, a touch control circuit, a first and a second touch sensing interfaces, a glasses circuit system and a power supplying module is provided. The glasses main body has a first and a second sensing portions. The touch control circuit and the glasses circuit system are disposed in the glasses main body. The first and the second touch sensing interfaces are disposed at the first and the second sensing portions, electrically connected to the touch control circuit, and respectively transmit a first and a second input signals to the touch control circuit. After the touch control circuit receives the first and the second input signals, the touch control circuit transmits a power supplying signal to the power supplying module to drive the power supplying module to supply power to the glasses circuit system. Besides, a power supplying method is also provided.

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Номер записи: 10
20-12-2012 дата публикации

Liquid cooled motor assembly and cover thereof

Номер: US20120318479A1
Автор: CHANG CHI-LUNG, CHANG CHIN-FENG, Huang Cheng-Hui, Lin Ming-Cheng
Принадлежит:

A liquid cooled motor assembly and a cover thereof The cover of the liquid cooled motor assembly has an outer cylinder, an inner cylinder, a channel and multiple fins. The inner cylinder is mounted in and connected securely with the outer cylinder. The channel is zigzag and is formed between the inner cylinder and the outer cylinder. The fins are mounted securely on an outer surface of the inner cylinder. With the fins mounted on the outer surface of the inner cylinder, water can dissipate heat from the fins quickly and a dissipating efficiency is enhanced. 1. A cover of a liquid cooled motor assembly , the cover comprising:an outer cylinder; two opposite ends;', 'a length;', 'an outer surface; and', a length the same as that of the inner cylinder;', 'an end; and, 'multiple elongated connecting sections formed on and protruding from the outer surface of the inner cylinder at intervals, connected securely with the outer cylinder, each connecting section having'}, 'multiple breaches respectively formed at the ends of the connecting sections, wherein the adjacent two of the breaches are respectively located at the ends of the inner cylinder;, 'an inner cylinder, mounted inside the outer cylinder and having'}a zigzag channel formed between the outer cylinder and the inner cylinder; andmultiple fins mounted securely on the outer surface of the inner cylinder except at the connecting sections.2. The cover of a liquid cooled motor assembly as claimed in claim 1 , wherein each connecting section is linear and extends along a line parallel to an axis of the inner cylinder.3. The cover of a liquid cooled motor assembly as claimed in claim 2 , wherein at least two fins are located at each position between adjacent two connecting sections; and each fin is linear and extends along a line parallel to the axis of the inner cylinder.4. The cover of a liquid cooled motor assembly as claimed in claim 3 , wherein an inner surface;', 'an inlet radially formed in the outer cylinder and ...

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Номер записи: 11
04-04-2013 дата публикации

Hall-Effect Measurement Apparatus

Номер: US20130082694A1
Автор: Che-Hung Liu, Ming-Cheng Lin
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A Hall-Effect measure apparatus comprises a magnetic source, a wafer on a thermal chuck, a dc current source and a voltage meter. The magnetic source generates a magnetic field in a perpendicular position relative to the wafer. Furthermore, the magnetic field is targeted at a specific region of the wafer to be tested. By performing a Hall-Effect measurement and van der Pauw measurement, the carrier mobility of the specific region of the wafer can be calculated.

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Номер записи: 12
19-09-2013 дата публикации

Multi-serial port connection device and connection card thereof

Номер: US20130242497A1
Автор: Ming-Cheng Lin, Pei-Feng HUANG, zhong-ren Zhang
Принадлежит: SUNIX CO Ltd

A multi-serial port connection device has a connection card and a cable. The connection card has a serial signal transceiving control module and at least one Mini DisplayPort connector. The serial signal transceiving control module has at least two sets of serial I/O pins compatible with DB9 connector standard. The two sets of serial I/O pins are connected to twenty contacts of the Mini Display Port connector. The cable has a plug, at least two DB9 sockets for the connection of two external electronic devices with DB9 connectors. The multi-serial port connection device can reduce the space occupied by connectors on the connection card.

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Номер записи: 13
31-10-2013 дата публикации

Pci-based interfacing device with mappable port addresses to legacy i/o port addresses

Номер: US20130290579A1
Автор: Chieh-Tung CHIEN, Ming-Cheng Lin
Принадлежит: SUNIX CO Ltd

A PCI-based interfacing device with mappable port addresses to legacy I/O port addresses has an addressing circuit, a PCI controller connected to the addressing circuit and a PCI port, and an equipment controller connected to the PCI controller and an equipment port. The addressing circuit sets up a legacy I/O port address. The PCI controller transmit and receive data packets having data and one of the set of legacy I/O port addresses encapsulated therein to be processed to and from the PCI port, and output the received data packets to the equipment controller. The equipment controller converts the data packets into equipment data corresponding to the equipment port, and transmits the equipment data to the equipment port. Accordingly, the PCI-based interfacing device can perform data communication with legacy I/O port addresses.

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Номер записи: 14
07-01-2016 дата публикации

PORTABLE MICROSCOPE DEVICE

Номер: US20160004057A1
Автор: Chen Chang-Yu, CHIANG Tsun-Chao, LIN Cheng-Ming, LIN Shu-Sheng
Принадлежит:

The present invention discloses a portable microscope device which can be installed on the smartphone capable of capturing image. By combing these devices, users can observe the detection sample and capture the image of the sample instantly without environment limitation. Moreover, during operation, the user can observe the whole image of the sample by substituting the microscope lens of different magnification ratio or by shifting the position of the sample. 1. A portable microscope device , for cooperating with a communication device capable of capturing image and utilizing an image capture module of the communication device to capture an image of a detection sample , comprising:a base, having an illumination module;a cover, movably installed on the base;a microscope module, having a microscope lens movably installed on the cover to enable the image capture module of the communication device to capture the image of the detection sample by the microscope lens.2. The portable microscope device of claim 1 , wherein a magnetic attraction portion is installed on the periphery of the detective portion claim 1 , a relative magnetic attraction portion of the microscope module is attracted to the magnetic attraction portion to enable the microscope module and the cover to relatively move under the condition that they are not separated.3. The portable microscope device of claim 1 , wherein the base has a restrictive groove on an upper plane thereof for a microscope slide disposed in the restrictive groove.4. The portable microscope device of claim 1 , wherein a microscope slide is installed at one side of the cover.5. The portable microscope device of claim 1 , wherein the cover is made by transparent material.6. The portable microscope device of claim 1 , wherein the base has a detective portion at the top thereof.7. The portable microscope device of claim 6 , wherein a power module is installed on the bottom of the base claim 6 , the illumination module corresponds to the ...

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Номер записи: 15
03-01-2019 дата публикации

HIGH-ELECTRON-MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF

Номер: US20190006498A1
Автор: Hsiung Chih-Wen, Lin Ming-Cheng, TSAI Ming-Wei, Wong King-Yuen
Принадлежит:

Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformably over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers. 1. A semiconductor device , comprising:a substrate;a semiconductor layer over the semiconductive substrate, the semiconductor layer comprising a top surface;a gate structure over the semiconductor layer;a passivation layer over the gate structure and the semiconductor layer;a gate electrode over the gate structure;a field plate disposed on the passivation layer comprising a bottom edge; andwherein the gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, and the passivation layer contacting the second edge of the field plate.2. The semiconductor device of claim 1 , wherein the gate electrode comprises a vertical portion directly over the gate structure.3. The semiconductor device of claim 2 , wherein the gate electrode comprises a horizontal portion over the vertical portion and extending over the field plate.4. The semiconductor device of claim 3 , further comprising a capping layer between the field plate and the horizontal portion of the gate electrode.5. The semiconductor device of claim 2 , wherein the bottom edge of the field plate is substantially lower ...

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Номер записи: 16
21-01-2021 дата публикации

FERROELECTRIC STRUCTURE FOR SEMICONDUCTOR DEVICES

Номер: US20210020786A1
Автор: CHANG CHIH-YU, Chao Huang-Lin, Chui Chi On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi, Young Bo-Feng
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure relates to a semiconductor device includes a substrate and first and second spacers on the substrate. The semiconductor device includes a gate stack between the first and second spacers. The gate stack includes a gate dielectric layer having a first portion formed on the substrate and a second portion formed on the first and second spacers. The first portion includes a crystalline material and the second portion comprises an amorphous material. The gate stack further includes a gate electrode on the first and second portions of the gate dielectric layer, 1. A semiconductor device , comprising:a substrate;first and second spacers on the substrate; and a gate dielectric layer comprising a first portion formed on the substrate and a second portion formed on the first and second spacers, wherein the first portion comprises a crystalline material and the second portion comprises an amorphous material; and', 'a gate electrode on the first and second portions of the gate dielectric layer., 'a gate stack between the first and second spacers, the gate stack comprising2. The semiconductor device of claim 1 , wherein the semiconductor device comprises a negative-capacitance field effect transistor (NCFET) device.3. The semiconductor device of claim 1 , wherein the semiconductor device comprises a ferroelectric field effect transistor (FeFET) device.4. The semiconductor device of claim 1 , further comprising a fin formed on the substrate claim 1 , wherein the gate stack is formed on the fin.5. The semiconductor device of claim 1 , wherein the first and second portions of the gate dielectric layer comprise a hafnium-based oxide material.6. The semiconductor device of claim 1 , wherein the first and second portions of the gate dielectric layer comprise a high-k dielectric material.7. The semiconductor device of claim 1 , wherein the first portion of the gate dielectric layer comprises a ferroelectric material.8. The semiconductor device of claim 1 , wherein ...

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Номер записи: 17
25-01-2018 дата публикации

Integrated ESD Protection Circuit for GaN Based Device

Номер: US20180026029A1
Автор: Lin Ming-Cheng, LIN Yu-Syuan, TSAI Chun Lin, Wong King-Yuen, Yu Jiun-Lei
Принадлежит:

The present disclosure relates to an electrostatic discharge (ESD) protection circuit integrated with a gallium nitride (GaN) based transistor and configured to clamp a gate input voltage of the gallium nitride (GaN) based transistor during an ESD surge event, and associated methods. In some embodiments, the ESD protection circuit includes a first ESD protection stage and a second ESD protection stage connected between a gate terminal and a source terminal of the GaN based transistor. The first ESD protection stage includes a first plurality of GaN based gate-to-source shorted transistors connected in series and further connected to a first terminal of a first resistor. The second ESD protection stage is connected to the first ESD protection stage in parallel. The second ESD protection stage comprises a first GaN based shunt transistor having a gate terminal connected to the first terminal of the first resistor. 1. An electrostatic discharge (ESD) protection circuit integrated with a gallium nitride (GaN) based transistor , the ESD protection circuit comprising:a first ESD protection stage connected between a gate terminal and a source terminal of the GaN based transistor and comprising a first plurality of GaN based gate-to-source shorted transistors connected in series and further connected to a first terminal of a first resistor; anda second ESD protection stage connected to the first ESD protection stage in parallel and comprising a first GaN based shunt transistor having a gate terminal connected to the first terminal of the first resistor.2. The ESD protection circuit of claim 1 , wherein the GaN based transistor is an enhancement mode high electron mobility transistor (E-HEMT).3. The ESD protection circuit of claim 1 , wherein the first GaN based shunt transistor has a first S/D terminal connected to the gate terminal of the GaN based transistor.4. The ESD protection circuit of claim 1 , wherein the first GaN based shunt transistor has a second S/D terminal ...

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Номер записи: 18
04-02-2016 дата публикации

Apparatus for Adjusting Application Angle of Portable Device

Номер: US20160031381A1
Автор: Ming Cheng Lin
Принадлежит: Individual

An apparatus for adjusting application angle of portable device includes an accommodating unit, a base, a joining unit, and a strapping unit. The accommodating unit and the base can have the turning angle adjusted right and left. The base and the joining unit can have the turning angle adjusted up and down. The joining unit and the strapping unit can jointly clamp on handle to collectively achieving the effect of adjusting application angle for portable device.

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Номер записи: 19
04-02-2021 дата публикации

DEVICE PERFORMANCE BY FLUORINE TREATMENT

Номер: US20210036127A1
Автор: Chui Chi-On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит: TAIWAN SEMICONDUCTOR MANUFACTURING , CO., LTD.

A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a semiconductor fin, forming a source/drain structure on the semiconductor fin, forming an interfacial layer on the semiconductor fin, treating the interfacial layer with fluorine, forming a ferroelectric gate dielectric layer on the interfacial layer, treating the ferroelectric gate dielectric layer with fluorine, and forming a gate electrode layer on the ferroelectric gate dielectric layer. 1. A method for forming a semiconductor structure , comprising:patterning a semiconductor substrate to form a semiconductor fin;forming a source/drain structure on the semiconductor fin;forming an interfacial layer on the semiconductor fin;treating the interfacial layer with fluorine;forming a ferroelectric gate dielectric layer on the interfacial layer;treating the ferroelectric gate dielectric layer with fluorine; andforming a gate electrode layer on the ferroelectric gate dielectric layer.2. The method for forming a semiconductor structure as claimed in claim 1 , wherein the treating the interfacial layer with fluorine comprises exposing a surface of the interfacial layer to a fluorine-containing plasma claim 1 , a fluorine-containing gas claim 1 , or a combination thereof.3. The method for forming a semiconductor structure as claimed in claim 1 , wherein the treating the ferroelectric gate dielectric layer with fluorine comprises exposing a surface of the ferroelectric gate dielectric layer to a fluorine-containing plasma claim 1 , a fluorine-containing gas claim 1 , or a combination thereof.4. The method for forming a semiconductor structure as claimed in claim 1 , wherein an oxygen content of the interfacial layer is reduced after the treating the interfacial layer with fluorine.5. The method for forming a semiconductor structure as claimed in claim 1 , wherein an oxygen content of the ferroelectric gate dielectric layer is reduced after the ...

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Номер записи: 20
06-02-2020 дата публикации

Photomask and method for forming the same

Номер: US20200041894A1
Автор: CHANG HAO-MING, HSU YU-HSIN, HUANG Chung-Yang, LAI PO-CHENG, LEE Kuan-Shien, LI MING CHE, LIN Cheng-Ming, Lin Wei-Hsin, LIN Yi-Hsuan, SHIH WANG CHENG
Принадлежит:

A method for forming a photomask includes receiving a substrate having a first layer formed thereon, wherein a patterned second layer exposing portions of the first layer is disposed over the substrate, removing the exposed portions of the first layer through the patterned second layer to form a plurality of openings in the first layer, removing the patterned second layer, and performing a wet etching to remove portions of the first layer to widen the plurality of openings with an etchant. The etchant is in contact with a top surface of the first layer and sidewalls of the plurality of openings. Each of the plurality of openings has a first width prior to the performing of the wet etching and a second width after the performing of the wet etching. The second width is greater than the first width. 2. The method of claim 1 , wherein the etchant comprises HOand NHOH.3. The method of claim 1 , further comprising monitoring a conductivity of the etchant during the performing of the wet etching claim 1 , and ending the wet etching when the conductivity of the etchant is outside of a range.4. The method of claim 3 , wherein the range is between approximately 800 μS and 1300 μS.5. The method of claim 1 , wherein the first layer includes a first thickness prior to the performing of the wet etching claim 1 , a second thickness after the performing of the wet etching claim 1 , and a thickness difference between the first thickness and the second thickness claim 1 , the plurality of openings has a width difference between the first width and the second width claim 1 , and the thickness difference is less than the width difference.6. The method of claim 5 , wherein the width difference is less than 2 nanometers.7. A method for forming a photomask claim 5 , comprising:receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width;forming a protecting ...

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Номер записи: 21
03-03-2022 дата публикации

Mask Defect Prevention

Номер: US20220066312A1
Автор: Chen Ching-Yueh, Chen Yu-Tung, Hsu Ting-Chang, HU Wei-Chung, LIN Cheng-Ming, LU CHI-TA, Tu Chih-Chiang
Принадлежит:

A photolithographic mask assembly according to the present disclosure accompanies a photolithographic mask. The photolithographic mask includes a capping layer over a substrate and an absorber layer disposed over the capping layer. The absorber layer includes a first main feature area, a second main feature area, and a venting feature area disposed between the first main feature area and the second main feature area. The venting feature area includes a plurality of venting features.

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Номер записи: 22
25-02-2021 дата публикации

FABRICATING METHOD OF PHOTOMASK, PHOTOMASK STRUCTURE THEREOF, AND SEMICONDUCTOR MANUFACTURING METHOD USING THE SAME

Номер: US20210055647A1
Автор: CHANG HAO-MING, CHEN Chih-Ming, HUANG Chung-Yang, LIN Cheng-Ming
Принадлежит:

A method for fabricating a photomask is provided. The method includes several operations. A photomask substrate, having a chip region and a peripheral region adjacent to the chip region, is received. A reference pattern is formed by emitting one first radiation shot and a first beta pattern is formed by emitting a plurality of second radiation shots in the peripheral region. The plurality of second radiation shots are emitted along a first direction. A roughness of a boundary of the first beta pattern along the first direction is compared to a roughness of a boundary of the reference pattern along the first direction from a top view perspective. An alignment of the plurality of second radiation shots is adjusted if a result of the comparison exceeds a tolerance, or the photomask is formed. A photomask structure thereof and a method for manufacturing a semiconductor are also provided. 1. A method for fabricating a photomask , comprising:receiving a photomask substrate having a chip region and a peripheral region adjacent to the chip region;forming a reference pattern by emitting one first radiation shot in the peripheral region;forming a first beta pattern by emitting a plurality of second radiation shots in the peripheral region, wherein the plurality of second radiation shots are emitted along a first direction;comparing a roughness of a boundary of the first beta pattern along the first direction and a roughness of a boundary of the reference pattern along the first direction from a top view perspective;adjusting an alignment of the plurality of second radiation shots if a result of the comparison exceeds a tolerance; andforming the photomask if the result of the comparison is within the tolerance.2. The method of claim 1 , wherein the first radiation shot has a pixel size greater than a pixel size of each of the plurality of second radiation shots.3. The method of claim 1 , further comprising:comparing a width of the first beta pattern and a width of the ...

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Номер записи: 23
25-02-2021 дата публикации

SELECTIVE INTERNAL GATE STRUCTURE FOR FERROELECTRIC SEMICONDUCTOR DEVICES

Номер: US20210057581A1
Автор: Chao Huang-Lin, Chui Chi On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure relates to a semiconductor device including a substrate and first and second spacers on the substrate. The semiconductor device also includes a gate stack between the first and second spacers. The gate stack includes a gate dielectric layer having a first portion formed on the substrate and a second portion formed on the first and second spacers; an internal gate formed on the first and second portions of the gate dielectric layer; a ferroelectric dielectric layer formed on the internal gate and in contact with the gate dielectric layer; and a gate electrode on the ferroelectric dielectric layer. 1. A semiconductor device , comprising:a substrate;first and second spacers on the substrate; and a gate dielectric layer comprising a first portion on the substrate and a second portion on the first and second spacers;', 'an internal gate on the first and second portions of the gate dielectric layer;', 'a ferroelectric dielectric layer on the internal gate and in physical contact with the second portion of the gate dielectric layer through a non-linear surface; and', 'a gate electrode on the ferroelectric dielectric layer., 'a gate stack between the first and second spacers, the gate stack comprising2. The semiconductor device of claim 1 , wherein the semiconductor device comprises a negative-capacitance field effect transistor (NCFET) device.3. The semiconductor device of claim 1 , wherein the semiconductor device comprises a ferroelectric field effect transistor (FeFET) device.4. The semiconductor device of claim 1 , further comprising a fin on the substrate claim 1 , wherein the gate stack is on the fin.5. The semiconductor device of claim 1 , wherein the ferroelectric dielectric layer is between the internal gate and the gate electrode.6. The semiconductor device of claim 1 , wherein the ferroelectric dielectric layer is between the second portion of the gate dielectric layer and the gate electrode.7. (canceled)8. The semiconductor device of ...

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Номер записи: 24
22-05-2014 дата публикации

SENSING DEVICE CAPABLE OF CONVERTING OPTICAL ENERGY INTO ELECTRICAL ENERGY AND CONVERSION METHOD THEREOF

Номер: US20140139026A1
Автор: HSU Chin-Shun, Huang Po-Cheng, Lin Ming-Cheng
Принадлежит: INSTITUTE FOR INFORMATION INDUSTRY

A sensing device capable of converting optical energy into electrical energy and a conversion method thereof are presented. The sensing device includes an optical-to-electrical conversion module, a power regulation module, a sensing module, and a processing module. The optical-to-electrical conversion module is used for converting optical energy into electrical energy. The power regulation module is used for generating a power supply specification according to the electrical energy. The sensing module performs sensing according to the electrical energy to provide a sensing signal. The processing module processes the sensing signal according to the electrical energy. 1. A sensing device capable of converting optical energy into electrical energy , comprising:an optical-to-electrical conversion module, for converting optical energy into electrical energy;a power regulation module, connected to the optical-to-electrical conversion module, for adjusting the electrical energy to generate a power supply specification;a first sensing module, connected to the power regulation module, for performing a sensing operation according to the electrical energy to generate a first sensing signal; anda processing module, connected to the power regulation module and the first sensing module, for performing a first processing operation on the first sensing signal according to the electrical energy.2. The sensing device capable of converting optical energy into electrical energy according to claim 1 , wherein the power regulation module comprises at least one of an analog-to-digital conversion unit claim 1 , a digital-to-analog conversion unit claim 1 , a voltage regulation unit claim 1 , a rectification unit claim 1 , a filtering unit claim 1 , and a signal amplification unit.3. The sensing device capable of converting optical energy into electrical energy according to claim 1 , wherein the optical-to-electrical conversion module is a solar panel or an optical-to-electrical converter.4 ...

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Номер записи: 25
04-03-2021 дата публикации

Cap structure coupled to source to reduce saturation current in hemt device

Номер: US20210066483A1
Автор: Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu SU, Ming-Cheng Lin, Yun-Hsiang Wang
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

In some embodiments, the present disclosure relates to a high voltage device that includes a substrate comprising a first semiconductor material. A channel layer that comprises a second semiconductor material is arranged over the substrate. An active layer that comprises a third semiconductor material is arranged over the channel layer. Over the active layer is a source contact spaced apart from a drain contact. A gate structure is arranged laterally between the source and drain contacts and over the active layer to define a high electron mobility transistor (HEMT) device. Between the gate structure and the source contact is a cap structure, which is coupled to the source contact and laterally spaced from the gate structure. The cap structure and a gate electrode of the gate structure comprise a same material.

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Номер записи: 26
29-05-2014 дата публикации

SENSING DEVICE HAVING MULTIPLE SENSING UNITS, SENSING METHOD, AND RECORDING MEDIUM THEREOF

Номер: US20140149080A1
Автор: HSU Chin-Shun, Huang Po-Cheng, Lin Ming-Cheng
Принадлежит: INSTITUTE FOR INFORMATION INDUSTRY

A sensing device having multiple sensing units, a sensing method, and a recording medium thereof are provided. A system includes a plurality of sensing units, an operational module, a selection module, and a sampling module. The selection module is connected to a target sensing unit according to a selection signal provided by the operational module, and obtains a sensing signal provided by the target sensing unit. The sampling module obtains the sensing signal from the selection module. 1. A sensing device having multiple sensing units , comprising:a plurality of sensing units;an operational module, used to generate a selection signal;a selection module, used to connect to the operational module and the sensing units, receive the selection signal, and connected to a target sensing unit among the sensing units according to the selection signal, so as to obtain a sensing signal of the target sensing unit; anda sampling module, used to connect to the selection module to obtain the sensing signal.2. The sensing device having multiple sensing units according to claim 1 , wherein the sensing units are classified into a plurality of types claim 1 , each sensing unit corresponds to one of the types; the sampling module is further used to connect to the operational module and has a plurality types of sampling units claim 1 , each type of the sampling unit corresponds to one of the types; and the operational module is further used to generate a corresponding sampling signal when the selection signal is generated claim 1 , to set the sampling module to select a target sampling unit corresponding to a type of the target sensing unit claim 1 , and the target sampling unit obtains the sensing signal.3. The sensing device having multiple sensing units according to claim 1 , wherein the sensing units are classified into a plurality of types claim 1 , each sensing unit corresponds to one of the types; and the sensing units are grouped into a plurality of sensing groups claim 1 , and ...

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Номер записи: 27
24-03-2022 дата публикации

CAP STRUCTURE COUPLED TO SOURCE TO REDUCE SATURATION CURRENT IN HEMT DEVICE

Номер: US20220093781A1
Автор: Lin Ming-Cheng, Su Liang-Yu, TSAI Chun Lin, Wang Yun-Hsiang, Wu Chen-Bau, Wu Haw-Yun
Принадлежит:

In some embodiments, the present disclosure relates to a semiconductor device. The semiconductor device includes a channel layer disposed over a base substrate, and an active layer disposed on the channel layer. A source contact and a drain contact are over the active layer and are laterally spaced apart from one another along a first direction. A gate electrode is arranged on the active layer between the source contact and the drain contact. A passivation layer is arranged on the active layer and laterally surrounds the source contact, the drain contact, and the gate electrode. A conductive structure is electrically coupled to the source contact and is disposed laterally between the gate electrode and the source contact. The conductive structure extends along an upper surface and a sidewall of the passivation layer. 1. A semiconductor device , comprising:a channel layer disposed over a base substrate;an active layer disposed on the channel layer;a source contact and a drain contact over the active layer and laterally spaced apart from one another along a first direction;a gate electrode arranged on the active layer between the source contact and the drain contact;a passivation layer arranged on the active layer and laterally surrounding the source contact, the drain contact, and the gate electrode; anda conductive structure electrically coupled to the source contact and disposed laterally between the gate electrode and the source contact, wherein the conductive structure extends along an upper surface and a sidewall of the passivation layer.2. The semiconductor device of claim 1 , wherein the conductive structure has a first lower surface arranged on the active layer and a second lower surface arranged on the passivation layer.3. The semiconductor device of claim 1 , wherein an upper surface of the conductive structure has a greater width than a lower surface of the conductive structure.4. The semiconductor device of claim 1 , wherein the conductive structure ...

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Номер записи: 28
05-03-2020 дата публикации

PROJECTION DEVICE AND PERSONALIZED IMAGE SETTING METHOD THEREOF

Номер: US20200077062A1
Автор: Chen Yu-Meng, Kan Wei-Hsin, Lin Jiun-Tsang, Lin Ming-Cheng
Принадлежит: CORETRONIC CORPORATION

A projection device having an information input unit, a storage unit, a scaling unit, an image processing unit and a projection unit is provided. The information input unit receives the image file corresponded to a compressed personalized startup image file. The storage unit has a first storage block storing a preset startup image file and a second storage block. The scaling unit generates a projected image signal according to the compressed personalized startup image file, and the scaling unit stores the compressed personalized startup image file in the at least one second storage block. The image processing unit generates a projection control signal according to the projected image signal. The projection unit generates an image beam according to the projection control signal, and projects the image beam on a projection surface to form the startup image screen. The disclosure further provides a personalized startup image setting method. 1. A projection device , comprising:an information input unit, configured to receive an image file, wherein the image file corresponds to a compressed personalized startup image file;a storage unit, comprising a first storage block and at least one second storage block, wherein the first storage block configures to store a preset startup image file;a scaling unit, connected to the information input unit and the storage unit, wherein the scaling unit configures to generate a projected image signal according to the compressed personalized startup image file, and the scaling unit configures to store the compressed personalized startup image file to the at least one second storage block;an image processing unit, connected to the scaling unit, and configured to generate a projection control signal according to the projected image signal; anda projection unit, connected to the image processing unit, and configured to generate an image beam according to the projection control signal and project the image beam on a projection surface to ...

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Номер записи: 29
18-03-2021 дата публикации

GATE STACK TREATMENT FOR FERROELECTRIC TRANSISTORS

Номер: US20210083068A1
Автор: Chao Huang-Lin, Chui Chi On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure describes a method that can eliminate or minimize the formation of an oxide on the metal gate layers of ferroelectric field effect transistors. In some embodiments, the method includes providing a substrate with fins thereon; depositing an interfacial layer on the fins; depositing a ferroelectric layer on the interfacial layer; depositing a metal gate layer on the ferroelectric layer; exposing the metal gate layer to a metal-halide gas; and performing a post metallization annealing, where the exposing the metal gate layer to the metal-halide gas and the performing the post metallization annealing occur without a vacuum break. 1. A method , comprising:providing a substrate with fins thereon;depositing an interfacial layer on the fins;depositing a ferroelectric layer on the interfacial layer;depositing a metal gate layer on the ferroelectric layer;exposing the metal gate layer to a metal-halide gas; andperforming a post metallization annealing, wherein the exposing the metal gate layer to the metal-halide gas and the performing the post metallization annealing occur without a vacuum break.2. The method of claim 1 , wherein exposing the metal gate layer to the metal-halide gas comprises exposing the metal gate layer to tungsten hexafluoride (WF) claim 1 , tantalum pentafluoride (TaF) claim 1 , tungsten pentachloride (WCl) claim 1 , or tantalum pentachloride (TaCl).3. The method of claim 1 , wherein exposing the metal gate layer to the metal-halide gas comprises heating the substrate to a temperature between about 350° C. and about 600° C.4. The method of claim 1 , wherein exposing the metal gate layer to the metal-halide gas comprises removing between about 0.5 nm and about 1.5 nm of a metal oxide layer.5. The method of claim 1 , wherein exposing the metal gate layer to the metal-halide gas comprises removing a metal oxide layer formed on the metal gate layer by a vacuum break.6. The method of claim 1 , wherein depositing the ferroelectric layer ...

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Номер записи: 30
18-03-2021 дата публикации

SELF-ALIGNED METAL COMPOUND LAYERS FOR SEMICONDUCTOR DEVICES

Номер: US20210083120A1
Автор: Chao Huang-Lin, Chui Chi On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure relates to methods for forming a semiconductor device. The method includes forming a substrate and forming first and second spacers on the substrate. The method includes depositing first and second self-assembly (SAM) layers respectively on sidewalls of the first and second spacers and depositing a layer stack on the substrate and between and in contact with the first and second SAM layers. Depositing the layer stack includes depositing a ferroelectric layer and removing the first and second SAM layers. The method further includes depositing a metal compound layer on the ferroelectric layer. Portions of the metal compound layer are deposited between the ferroelectric layer and the first or second spacers. The method also includes depositing a gate electrode on the metal compound layer and between the first and second spacers. 1. A method for forming a semiconductor device , comprising:forming a substrate;forming first and second spacers on the substrate;depositing first and second self-assembly (SAM) layers respectively on sidewalls of the first and second spacers;depositing a layer stack on the substrate and between and in contact with the first and second SAM layers, wherein depositing the layer stack comprises depositing a ferroelectric layer;removing the first and second SAM layers;depositing a metal compound layer on the ferroelectric layer, wherein portions of the metal compound layer are deposited between the ferroelectric layer and the first or second spacers; anddepositing a gate electrode on the metal compound layer and between the first and second spacers.2. The method of claim 1 , wherein depositing the layer stack further comprises depositing another metal compound layer before depositing the ferroelectric layer.3. The method of claim 1 , wherein depositing the layer stack further comprises depositing a high-k dielectric layer before depositing the ferroelectric layer.4. The method of claim 1 , wherein depositing the layer stack ...

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Номер записи: 31
12-06-2014 дата публикации

Multi-sensing-elements calibration system, multi-sensing-elements calibration method and recording medium

Номер: US20140163917A1
Автор: Chin-Shun Hsu, Ming-Cheng Lin, Po-Cheng Huang
Принадлежит: INSTITUTE FOR INFORMATION INDUSTRY

A multi-sensing-elements sensing calibration system, a multi-sensing-elements sensing calibration method and a recording medium are provided. This system includes a plurality of sensing elements, a first calculating module and a second calculating module. The sensing elements are configured at a same place and generate corresponding sensing values under a plurality of sensing conditions. The first calculating module generates a plurality of corresponding average values from the sensing values under the sensing conditions. The second calculating module generates a corresponding calibration curve according to sensing values of each sensing element under a plurality of sensing conditions and each average value, and the calibration curve is provided to correct each sensing element.

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Номер записи: 32
19-06-2014 дата публикации

SAMPLING ASSEMBLY, MICROSCOPE MODULE, AND MICROSCOPE APPARATUS

Номер: US20140168405A1
Автор: Chen Chang-Yu, CHIANG Tsun-Chao, Chung Wo Andrew Man, LIN Cheng-Ming, LIN Shu-Sheng
Принадлежит: NATIONAL TAIWAN UNIVERSITY

A microscope apparatus is disclosed. The microscope apparatus comprises a microscope module and an image capture device. The microscope module comprises a housing, a lens element, a sampling assembly, and a light guide element. The lens element is mounted on the housing. The sampling assembly is accommodated in the housing. The light guide element is mounted in the sampling assembly. The sampling assembly is configured to sample a specimen and comprises a cover body and a base body received in the cover body. The cover body has a first top plate and a first anchoring structure connected to the top plate. The base body has a second opt plate and a second anchoring structure connected to the second top plate. The second top plate faces the first top plate to define a holding space for the specimen. 1. A sampling assembly for sampling a specimen , comprising:a cover body having a first top plate and a first anchoring structure connected to the first top plate; anda base body placed in the cover body having a second top plate and a second anchoring structure connected to the second top plate, wherein the second top plate faces the first top plate and includes a holding space for the specimen.2. The assembly according to claim 1 , wherein the first anchoring structure comprises a surrounding wall.3. The assembly according to claim 1 , wherein the first anchoring structure comprises at least one side plate.4. The assembly according to claim 1 , wherein the second anchoring structure comprises a surrounding wall.5. The assembly according to claim 1 , wherein the second anchoring structure comprises at least one side plate.6. The assembly according to claim 1 , further comprising a plurality of bumps between the first top plate and the second top plate.7. The assembly according to claim 6 , wherein the first top plate has an inside surface and an outside surface opposite to the inside surface claim 6 , and the bumps are disposed on the inside surface.8. The assembly ...

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Номер записи: 33
02-04-2015 дата публикации

EXTERNAL DEVICE AND A TRANSMISSION SYSTEM AND THE METHOD OF THE HETEROGENEOUS DEVICE

Номер: US20150095540A1
Автор: HUANG Pei-Feng, Lin Ming-Cheng
Принадлежит: SUNIX CO., LTD.

An external device and a transmission system and the method of the heterogeneous device can access the USB and PCI-E at the same time. The external device includes an USB socket couples to the host. The USB socket includes a plurality of first pins and a plurality of second pins. The first control module couples to the second pins. The first control module receives an operation signal via from the host. The micro control unit couples to the first control module via the first pins. The micro control unit receives an identify request via the first pins. The micro control unit generates the operating signal and sends the operating signal to the first control module. 1. A heterogeneous transmission system , selecting the corresponding transmission protocol according to the connected device , comprising:a PCI-E device, having a first socket, a micro control unit and a first control module, the micro control unit coupling to the first control module, the first socket having a plurality of first pins and a plurality of second pins; anda host, for connecting to the PCI-E device, the host having a second socket and a second control module, the second socket being set up corresponding to the first socket of the PCI-E device;wherein when the PCI-E device is connected to the host, the second control module is coupled to the micro control unit via the first pin, the second control module is coupled to the first control module via the second pin, the second control module drives the micro control unit via the plurality of first pins, such the micro control unit sends a side band signal to the first control module, the second control module sends an operating signal to the first control module via the second pin.2. The heterogeneous transmission system according to claim 1 , wherein the pinout of the first socket comprises:a pin number one, being the first pin, connecting to the power pin of USB 2.0 and the power pin of PCI-E;a pin number two, being the first pin, connecting to ...

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Номер записи: 34
29-03-2018 дата публикации

LOW STATIC CURRENT SEMICONDUCTOR DEVICE

Номер: US20180091140A1
Автор: Chen Chu Fu, Chen Mark, CHERN Chan-Hong, Lin Ming-Cheng, Liu Tysh-Bin, TSAI Chun Lin, Wong King-Yuen
Принадлежит:

A semiconductor device includes a power transistor and a driving circuit. The driving circuit is coupled to and is configured to drive the power transistor and includes first and second stages. The second stage is coupled between the first stage and the power transistor. Each of the first and second stages includes a pair of enhancement-mode high-electron-mobility transistors (HEMTs). The construction as such lowers a static current of the driving circuit. 1. A semiconductor device comprising:a power transistor; anda driving circuit coupled to and configured to drive the power transistor and including a first stage and a second stage coupled between the first stage and the power transistor, wherein each of the first and second stages includes first and second enhancement-mode high-electron-mobility transistors (HEMTs).2. The semiconductor device of claim 1 , wherein each of the first and second enhancement-mode HEMTs is an HEMT that is in an off state at a zero gate-source voltage.3. The semiconductor device of claim 1 , wherein the driving circuit further includes a third stage that includes a depletion-mode HEMT and an enhancement-mode HEMT and the depletion-mode HEMT is an HEMT that is in an on state at a zero gate-source voltage.4. The semiconductor device of claim 3 , wherein the driving circuit further includes a fourth stage that is coupled between the first and third stages and that includes a pair of enhancement-mode HEMTs.5. The semiconductor device of claim 3 , further comprising:a package encapsulating the driving circuit; andan input pin extending into the package, wherein the enhancement-mode HEMT of the third stage has a gate terminal coupled to the input pin.6. The semiconductor device of claim 3 , further comprising a charge pump circuit having input and output terminals and configured to generate a charge pump voltage at the output terminal thereof greater than a source voltage at the input terminal thereof claim 3 , wherein the depletion-mode HEMT ...

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Номер записи: 35
01-04-2021 дата публикации

Method for defect inspection

Номер: US20210096086A1
Автор: Cheng-Ming Lin, Hao-Ming Chang, Sheng-Chang Hsu, Tsun-Cheng Tang
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method for defect inspection includes receiving a substrate having a plurality of patterns; obtaining a gray scale image of the substrate, wherein the gray scale image includes a plurality of regions, and each of the regions has a gray scale value; comparing the gray scale value of each region to a gray scale references to define a first group, a second group and an N th group, wherein each of the first group, the second group and the N th group has at least a region; performing a calculation to obtain a score; and when the score is greater than a value, the substrate is determined to have an ESD defect, and when the score is less than the value, the substrate is determined to be free of the ESD defect.

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Номер записи: 36
30-04-2015 дата публикации

LIGHT ASSEMBLY, BACKLIGHT MODULE AND LIQUID CRYSTAL DISPLAY

Номер: US20150116628A1
Автор: CHAO Yung-Chieh, HUANG Teng-Yi, Lin Ming-Cheng
Принадлежит: RADIANT OPTO-ELECTRONICS CORPORATION

A light assembly, a backlight module and a liquid crystal display are described. The light assembly includes a carrier, a light guide plate, a light source, a constraining member and a securing unit. The light guide plate is disposed on the carrier and has an incident surface. The light source which emits light towards the light guide plate and is adjacent to the incident surface of the light guide plate. The constraining member is disposed above the carrier and has a constraining surface. The securing unit is used to combine the constraining member with the carrier while the light guide plate is restrained against movement by the constraining surface of the constraining member. 1. A backlight module , comprising:a carrier;a light guide plate disposed on the carrier;a light source which is disposed on the carrier and emits light towards the light guide plate;a constraining member which is disposed above the carrier and covers the light source, wherein the constraining member comprises a constraining surface, and the light guide plate is constrained by the constraining surface; anda securing unit used to combine the constraining member with the carrier;wherein the securing unit comprises a first hole, a second hole and a positioning member inserted into the first hole and fixed in the second hole;wherein the positioning member is adjustable within the first hole while the first hole is aligned with the second hole until the light guide plate is restrained against movement by the constraining surface of the constraining member.2. The backlight module of claim 1 , wherein the first hole is disposed on one of the constraining member and the carrier claim 1 , and the second hole is disposed on the other one of the constraining member and the carrier.3. The backlight module of claim 1 , wherein a size of the first hole is greater than a size of the second hole.4. The backlight module of claim 3 , wherein the constraining member is adjustable towards the light guide plate ...

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Номер записи: 37
11-04-2019 дата публикации

LIGHT ASSEMBLY, BACKLIGHT MODULE AND LIQUID CRYSTAL DISPLAY

Номер: US20190107667A1
Автор: CHAO Yung-Chieh, HUANG Teng-Yi, Lin Ming-Cheng
Принадлежит:

A light assembly, a backlight module and a liquid crystal display are described. The light assembly includes a carrier, a light guide plate, a light source, a constraining member and a securing unit. The light guide plate is disposed on the carrier and has an incident surface. The light source which emits light towards the light guide plate and is adjacent to the incident surface of the light guide plate. The constraining member is disposed above the carrier and has a constraining surface. The securing unit is used to combine the constraining member with the carrier while the light guide plate is restrained against movement by the constraining surface of the constraining member. 1. A backlight module , comprising:a light guide plate having an upper surface and a lower surface which extend along a horizontal direction;a carrier comprising a horizontal section which supports the lower surface of the light guide plate, and a vertical section which is substantially vertical to the horizontal direction;a light source which is disposed on the carrier and emits light towards the light guide plate;a constraining member which is disposed above the carrier and covers the light source, wherein the constraining member comprises a first section having a constraining surface which contacts the light guide plate by abutting against the upper surface thereof, and a second section which extends vertically in the vertical direction; anda fixing member used to fix the constraining member to the carrier;wherein the fixing member comprises a head portion, and the head portion directly contacts and restrains against an outer surface of the second section of the constraining member; andwherein the second section of the constraining member is sandwiched between the head portion of the fixing member and the vertical section of the carrier.2. The backlight module of claim 1 , wherein the carrier is a back plate or a heat sink.3. The backlight module of claim 1 , wherein the light guide plate ...

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Номер записи: 38
02-04-2020 дата публикации

INTELLIGENT VOICE SYSTEM AND METHOD FOR CONTROLLING PROJECTOR BY USING THE INTELLIGENT VOICE SYSTEM

Номер: US20200105258A1
Автор: Chen Yu-Meng, Dai Ji-Cheng, Kan Wei-Hsin, Lin Ming-Cheng
Принадлежит: CORETRONIC CORPORATION

The disclosure provides an intelligent voice system and a method for controlling a projector. The system includes a voice assistant, a cloud service platform, a projector, and a management server. When the voice assistant receives a voice signal for controlling the projector, the voice assistant extracts keywords from the voice signal and transmits the keywords to the cloud service platform, wherein the keywords include an alias corresponding to the projector and a first control command, and the cloud service platform includes second control commands. The cloud service platform analyzes the first control command, retrieves the corresponding second control command according to the first control command, and transmits the alias of the projector and the corresponding second control command to the management server. The management server accesses/controls the projector in response to the alias and adjusts the projector as a first operating state according to the corresponding second control command. 1. An intelligent voice system comprising:a first voice assistant;a first cloud service platform, connected to the first voice assistant and adapted to manage the first voice assistant;a first projector; anda management server, connected to the first cloud service platform and the first projector and configured to manage and control the first projector,wherein when the first voice assistant receives a first voice signal for controlling the first projector, the first voice assistant extracts a plurality of first keywords from the first voice signal and transmits the plurality of first keywords to the first cloud service platform,wherein the plurality of first keywords comprises a first alias corresponding to the first projector and a first control command,wherein the first cloud service platform comprises a first semantic analyzing program, and the first cloud service platform comprises a plurality of second control commands, the first cloud service platform analyzes the ...

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Номер записи: 39
02-04-2020 дата публикации

Intelligent voice system and method for controlling projector by using the intelligent voice system

Номер: US20200105259A1
Автор: Ji-Cheng Dai, Ming-Cheng Lin, Wei-Hsin Kan, Yu-Meng Chen
Принадлежит: Coretronic Corp

The disclosure provides an intelligent voice system and a method for controlling a projector. The system includes a voice assistant, a cloud service platform, a projector, and a management server. When the voice assistant receives a voice signal for controlling a video platform interface, the voice assistant extracts keywords from the voice signal and forwards the keywords to the cloud service platform, wherein the keywords include an alias corresponding to the projector and a first interface control command. The cloud service platform analyzes the first interface control command, acquires the corresponding second interface control command according to the first interface control command, and transmits the alias of the projector and the corresponding second interface control command to the management server. The management server accesses the projector in response to the alias and adjusts a projection situation of the video platform interface projected by the projector.

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Номер записи: 40
28-04-2016 дата публикации

MICROSCOPE MODULE AND MICROSCOPE DEVICE

Номер: US20160116725A1
Автор: Chen Chang-Yu, CHIANG Tsun-Chao, LIN Cheng-Ming, LIN Shu-Sheng
Принадлежит:

A microscope module includes a light source assembly, a sampling assembly and a diffusing element. The light source assembly includes a light source and a light guide element. The light source is disposed close to the light incidence end of the light guide element. The sampling assembly includes a cover and a base. The cover and the base are combined to define a sample accommodating space, which is located at the light exit end of the light guide element. The diffusing element is disposed between the light source and the sample accommodating space. The light emitted from the light source passes through the diffusing element and then enters the sample accommodating space. A microscope device containing the microscope module is also disclosed. 1. A microscope module , comprising:a light source assembly comprising a light source and a light guide element, wherein the light source is disposed close to a light incidence end of the light guide element;a sampling assembly comprising a cover and a base, wherein the cover and the base are combined to define a sample accommodating space located at a light exit end of the light guide element; anda diffusing element is disposed between the light source and the sample accommodating space;wherein, the light emitted from the light source passes through the diffusing element and then enters the sample accommodating space.2. The microscope module of claim 1 , wherein the light guide element has a first chamber claim 1 , and the diffusing element is disposed in the first chamber of the light guide element.3. The microscope module of claim 1 , wherein the light guide element is a solid rod claim 1 , and the diffusing element is disposed at the light incidence end or the light exit end of the light guide element.4. The microscope module of claim 1 , wherein the diffusing element is an optical lens claim 1 , and the diffusing element is connected to the light source.5. The microscope module of claim 1 , further comprising:a lens ...

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Номер записи: 41
02-04-2020 дата публикации

HIGH VOLTAGE CASCODE HEMT DEVICE

Номер: US20200105741A1
Автор: Lin Ming-Cheng, TSAI Chun Lin, Wu Chen-Bau, Wu Haw-Yun
Принадлежит:

In some embodiments, the present disclosure relates to a semiconductor device. The semiconductor device includes a first high electron mobility transistor (HEMT) device disposed within a semiconductor structure and having a first source, a first drain, and a first gate. A second HEMT device is disposed within the semiconductor structure and includes a second source coupled to the first drain, a second drain, and a second gate. A diode-connected transistor device is disposed within the semiconductor structure and comprising a third source, a third gate, and a third drain coupled to the second gate. 1. A semiconductor device , comprising:a first high electron mobility transistor (HEMT) device disposed within a semiconductor structure and comprising a first source, a first drain, and a first gate;a second HEMT device disposed within the semiconductor structure and comprising a second source coupled to the first drain, a second drain, and a second gate; anda diode-connected transistor device disposed within the semiconductor structure and comprising a third source, a third gate, and a third drain coupled to the second gate.2. The semiconductor device of claim 1 , wherein the first HEMT device is a first enhancement mode HEMT device.3. The semiconductor device of claim 2 ,wherein the second HEMT device is a second enhancement mode HEMT device; andwherein the third source is coupled to the first gate and the third drain is coupled to the second gate.4. The semiconductor device of claim 2 ,wherein the second HEMT device is a depletion mode HEMT device; andwherein the third source is coupled to the first source and the third drain is coupled to the second gate.5. The semiconductor device of claim 1 ,wherein the first HEMT device and the diode-connected transistor device are arranged within a first die; andwherein the second HEMT device is arranged within a second die that has an outermost sidewall that is separated from an outermost sidewall of the first die by a non-zero ...

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Номер записи: 42
18-04-2019 дата публикации

CIRCUIT, SYSTEM AND METHOD FOR ELECTROSTATIC DISCHARGE (ESD) PROTECTION

Номер: US20190115339A1
Автор: LAI Ming-Fang, Lin Ming-Cheng
Принадлежит:

A circuit including a discharging device, a resistive element and a bypass device is disclosed. The discharging device is disposed between a first voltage bus and a second voltage bus. The resistive element is configured to activate the discharging device in response to a high-to-low electrostatic discharge (ESD) event during which the first voltage bus is high in potential relative to the second voltage bus. The bypass device is configured to bypass the resistive element and activate the discharging device in response to a low-to-high ESD event during which the second voltage bus is high in potential relative to the first voltage bus. 1. A circuit , comprising:a discharging device between a first voltage bus and a second voltage bus;a resistive element configured to activate the discharging device in response to a high-to-low electrostatic discharge (ESD) event during which the first voltage bus is high in potential relative to the second voltage bus; anda bypass device configured to bypass the resistive element and activate the discharging device in response to a low-to-high ESD event during which the second voltage bus is high in potential relative to the first voltage bus.2. The circuit according to further comprising a trigger device configured to detect an ESD event claim 1 , wherein the trigger device is disposed between the first voltage bus and one end of the resistive element.3. The circuit according to claim 2 , wherein the trigger device includes a capacitor.4. The circuit according to claim 2 , wherein the trigger device includes a transistor including a source and a drain together coupled to the first voltage bus claim 2 , and including a gate coupled to the one end of the resistive element5. The circuit according to claim 4 , wherein the transistor includes a high-electron-mobility transistor (HEMT).6. The circuit according to claim 2 , wherein the trigger device includes a number of transistors cascode connected.7. The circuit according to claim 6 , ...

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Номер записи: 43
14-05-2015 дата публикации

Treatment recommending system of plant symptoms, method and non-transitory computer-readable medium

Номер: US20150131867A1
Автор: Mao-Yuan Chin, Ming-Cheng Lin, Po-Cheng Huang
Принадлежит: INSTITUTE FOR INFORMATION INDUSTRY

A treatment recommending system of plant symptom includes an operation interface, an image capture unit, a processing unit and a storage unit for storing plant symptom data and diagnostic data. The processing unit may find target contour data presenting a plant part according to symptom description and symptom characteristic data. The image capture unit obtains plant image data corresponding to the target contour data. The processing unit analyzes the plant image data, and coordinates with the symptom characteristic data to determine corresponding treatment recommendation data.

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Номер записи: 44
11-05-2017 дата публикации

HIGH-ELECTRON-MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF

Номер: US20170133496A1
Автор: Hsiung Chih-Wen, Lin Ming-Cheng, TSAI Ming-Wei, Wong King-Yuen
Принадлежит:

Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers. 1. A semiconductor device , comprising:a semiconductive substrate;a donor-supply layer over the semiconductive substrate, the donor-supply layer comprising a top surface;a gate structure, a drain, and a source over the donor-supply layer;a passivation layer over the gate structure and the donor-supply layer;a gate electrode over the gate structure;a field plate disposed on the passivation layer between the gate electrode and the drain, the field plate comprising a bottom edge; andwherein the gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.2. The semiconductor device of claim 1 , further comprising a capping layer over the field plate.3. The semiconductor device of claim 1 , further comprising a contact over the source or the drain claim 1 , the contact comprising a bottom surface substantially coplanar with the bottom edge of the field plate.4. The semiconductor device of claim 1 , wherein a vertical distance between the bottom edge ...

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Номер записи: 45
02-05-2019 дата публикации

Semiconductor device

Номер: US20190131442A1
Автор: Chun Lin Tsai, Jiun-Lei Yu, Ming-Cheng Lin, Yu-Syuan Lin
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted.

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Номер записи: 46
23-04-2020 дата публикации

Field Effect Transistors with Ferroelectric Dielectric Materials

Номер: US20200127111A1
Автор: Chui Chi On, Fang Ziwei, Lam Kai Tak, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит:

A method of forming a semiconductor device includes forming a hafnium-containing layer over a semiconductor layer, simultaneously performing a thermal annealing process and applying an electrical field to the hafnium-containing layer to form a ferroelectric hafnium-containing layer, and forming a gate electrode over the ferroelectric hafnium-containing layer. 1. A method , comprising:forming a hafnium-containing layer over a semiconductor layer, wherein forming the hafnium-containing layer includes simultaneously applying a first electric field having a first strength;simultaneously performing a thermal annealing process and applying a second electrical field having a second strength to the hafnium-containing layer to form a ferroelectric hafnium-containing layer, wherein the second strength differs from the first strength in magnitude; andforming a gate electrode over the ferroelectric hafnium-containing layer.2. (canceled)3. The method of claim 1 , wherein forming the hafnium-containing layer includes depositing hafnium oxide over the semiconductor layer.4. The method of claim 3 , wherein simultaneously performing the thermal annealing process and applying of the second electric field transforms amorphous hafnium oxide into crystalline hafnium oxide having a ferroelectric orthorhombic structure.5. The method of claim 4 , wherein the ferroelectric orthorhombic structure is designated by a space group of Pca2.6. The method of claim 1 , wherein the thermal annealing process is a first thermal annealing process claim 1 , the method further comprising:depositing a capping layer over the ferroelectric hafnium-containing layer; andperforming a second thermal annealing process to the capping layer.7. The method of claim 1 , wherein forming the gate electrode includes:forming at least one work function metal layer over the ferroelectric hafnium-containing layer; andforming a bulk conductive layer over the at least one work function metal layer.8. A method claim 1 , ...

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Номер записи: 47
30-04-2020 дата публикации

METHOD FOR CLEANING SUBSTRATE, METHOD FOR MANUFACTURING PHOTOMASK AND METHOD FOR CLEANING PHOTOMASK

Номер: US20200133118A1
Автор: CHANG HAO-MING, Hsu Sheng-Chang, HSU YU-HSIN, LIN Cheng-Ming, WEI Shao-Chi
Принадлежит:

A method for manufacturing a photomask is provided. The method includes: receiving a substrate having a hard mask disposed thereover; forming a patterned photoresist over the hard mask; patterning the hard mask using the patterned photoresist as a mask; and removing the patterned photoresist. The removing of the patterned photoresist includes: oxidizing organic materials over the substrate; applying an alkaline solution onto the patterned photoresist; and removing the patterned photoresist by mechanical impact. A method for cleaning a substrate and a photomask are also provided. 1. A method , comprising:receiving a substrate having a surface;applying tetramethylammonium hydroxide (TMAH) to the surface, thereby altering molecular bonding of polymeric materials on the surface; andproviding mechanical impact to the polymeric materials on the surface of the substrate.2. The method of claim 1 , wherein the TMAH alters the molecular bonding of the polymeric materials by breaking crosslinked polymer chains.3. The method of claim 1 , further comprising:oxidizing polymeric materials over the surface prior to applying the TMAH.4. The method of claim 3 , further comprising:rinsing the first surface with deionized water after oxidizing the organic materials and prior to applying the TMAH.5. The method of claim 1 , wherein the providing of mechanical impact to the first surface comprises:applying megasonic cleaning to the substrate.6. A method claim 1 , comprising:receiving a substrate having a hard mask disposed thereover;forming a patterned photoresist over the hard mask;patterning the hard mask using the patterned photoresist as a mask; and oxidizing organic materials over the substrate;', 'applying an alkaline solution onto the patterned photoresist after oxidizing the organic materials over the substrate; and', 'removing the patterned photoresist by mechanical impact., 'removing the patterned photoresist, comprising7. The method of claim 6 , further comprising:patterning a ...

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Номер записи: 48
09-05-2019 дата публикации

INSPECTION METHOD OF A PHOTOMASK AND AN INSPECTION SYSTEM

Номер: US20190137869A1
Автор: CHANG HAO-MING, Chang Waylen, Hsu Sheng-Chang, LIN Cheng-Ming, Tang Tsun-Cheng
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

In accordance with some embodiments of the present disclosure, an inspection method of a photomask includes performing a first inspection process, unloading the photomask from the inspection system, and performing a second inspection process. In the first inspection process, a common Z calibration map of an objective lens of an optical module with respect to the photomask is generated and stored, and a first image of the photomask is captured by using an image sensor while focusing the objective lens of the optical module based on the common Z calibration map. The photomask is unloaded from the inspection system. In the second inspection process, the photomask is loaded on the inspection system and a second image of the photomask is captured by using an image sensor while focusing an objective lens of an optical module based on the common Z calibration map generated in the first inspection process. 1. An inspection method of a photomask , comprising: loading the photomask on a stage of an inspection system of the first inspection process;', 'generating and storing a common Z calibration map of an objective lens of an optical module of the inspection system of the first inspection process with respect to the photomask; and', 'capturing a first image of the photomask by using an image sensor of the inspection system of the first inspection process while an illuminated light emitted from a light source of the inspection system of the first inspection process scans the photomask by focusing the objective lens of the optical module of the inspection system of the first inspection process based on the common Z calibration map;, 'performing a first inspection process, the first inspection process comprisingunloading the photomask from the stage of the inspection system; and loading the photomask on a stage of an inspection system of the second inspection process; and', 'capturing a second image of the photomask by using an image sensor of the inspection system of the ...

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Номер записи: 49
08-09-2022 дата публикации

GRAPHENE LAYER FOR LOW RESISTANCE CONTACTS AND DAMASCENE INTERCONNECTS

Номер: US20220285221A1
Автор: Chen Szu-Hua, HUANG Jhih-Rong, KHADERBAD Mrunal Abhijith, LIN Cheng-Ming, LIN HAN-YU, Shen Tzer-Min, Woon Wei-Yen
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure provides low resistance contacts and damascene interconnects with one or more graphene layers in fin structures of FETs. An example semiconductor device can include a substrate with a fin structure that includes an epitaxial region. The semiconductor device can also include an etch stop layer on the epitaxial region, and an interlayer dielectric layer on the etch stop layer. The semiconductor device can further include a metal contact, above the epitaxial region, formed through the etch stop layer and the interlayer dielectric layer, and a graphene film at interfaces between the metal contact and each of the epitaxial region, the etch stop layer, and the interlayer dielectric layer. 1. A semiconductor device , comprising:a substrate;a fin structure, on the substrate, comprising an epitaxial region;an etch stop layer on the epitaxial region;an interlayer dielectric layer on the etch stop layer;a metal contact, above the epitaxial region, formed through the etch stop layer and the interlayer dielectric layer; anda graphene film at interfaces between the metal contact and each of the epitaxial region, the etch stop layer, and the interlayer dielectric layer.2. The semiconductor device of claim 1 , wherein:the fin structure is a merged fin structure; andthe epitaxial region is a merged epitaxial region.3. The semiconductor device of claim 1 , further comprising:an other fin structure, on the substrate, comprising an other epitaxial region;a barrier layer on a top surface of the other epitaxial region;an other metal contact above the barrier layer; anda liner layer at an interface between the other metal contact and the barrier layer.4. The semiconductor device of claim 3 , wherein:the epitaxial region is an n-type epitaxial region; andthe other epitaxial region is a p-type epitaxial region.5. The semiconductor device of claim 3 , wherein:the epitaxial region is a p-type epitaxial region; andthe other epitaxial region is an n-type epitaxial region. ...

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Номер записи: 50
16-05-2019 дата публикации

METHOD OF MANUFACTURING PHASE SHIFT PHOTO MASKS

Номер: US20190146326A1
Автор: CHANG HAO-MING, CHEN Chih-Ming, CHIANG Cheng-Hsuen, HUANG Yen-Wei, LEE Kuan-Shien, LIN Cheng-Ming, LIN Kuo Chin, TIEN Chun-Chieh
Принадлежит:

In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer. 1. A method of manufacturing a photo mask , comprising:forming a photo resist layer over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer;forming a photo resist pattern by using a lithographic operation;patterning the light blocking layer by using the photo resist pattern as an etching mask;patterning the phase shift layer by using the patterned light blocking layer as an etching mask;covering a border region of the mask substrate, on which a part of the light blocking layer remains, with an etching hard cover, while a pattern region of the mask substrate is exposed through an opening of the etching hard cover;etching the patterned light blocking layer in the pattern region through the opening of the etching hard cover;detaching the etching hard cover; andperforming a photo-etching operation on the pattern region to remove residues of the light blocking layer.2. The method of claim 1 , wherein the etching hard cover is reusable.3. The method of claim 1 , wherein the etching hard cover is made of ceramic.4. The method of claim 1 , ...

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Номер записи: 51
14-05-2020 дата публикации

Frame Assembly, Backlight Module and Display Device

Номер: US20200150483A1
Автор: CHAO Yung-Chieh, HSU CHENG-AN, Lin Ming-Cheng, LU KUO-HSUAN
Принадлежит:

A frame assembly is adapted to fix at least a film, an outer edge of the film is provided with at least a first assembly portion, and the frame assembly comprises a back plate, a frame unit, and at least a fixing unit. The frame unit includes an outer frame portion disposed outside an outer edge of the back plate, and a holding portion connected to the outer frame portion, wherein the holding portion has a bottom surface and a top surface opposite to the bottom surface. The fixing unit is combined with the bottom surface of the holding portion, and the fixing unit includes a second assembly portion that is not covered by the holding portion and combined with the first assembly portion of the film, so that the film is fixed in the frame assembly. 1. A frame assembly adapted to fix at least a film , an outer edge of the film provided with at least a first assembly portion , and the frame assembly comprising:a back plate;a frame unit, including an outer frame portion disposed outside an outer edge of the back plate, and a holding portion connected to the outer frame portion, wherein the holding portion is provided with a bottom surface, and a top surface is opposite to the bottom surface; andat least a fixing unit, coupled to the bottom surface of the holding portion, wherein the fixing unit includes a second assembly portion that is not covered by the holding portion and the second assembly is capable of coupling to the first assembly portion of the film.2. The frame assembly as claimed in claim 1 , whereinthe frame unit further includes at least a first fastening portion disposed on the holding portion, andthe fixing unit further includes a main body connected to the second assembly portion, and at least a second fastening portion connected to the main body, andthe first fastening portion and the second fastening portion fit and combine together via a mechanical interference occurring between the first fastening portion and the second fastening portion.3. The frame ...

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Номер записи: 52
14-06-2018 дата публикации

METHOD AND SYSTEM FOR PROCESSING SUBSTRATE BY CHEMICAL SOLUTION IN SEMICONDUCTOR MANUFACTURING FABRICATION

Номер: US20180161828A1
Автор: CHANG HAO-MING, Hsu Sheng-Chang, LIN Cheng-Ming, LIN Kuo-Chin, Lu Li-Chih, WEI Shao-Chi, Yang Min-An
Принадлежит:

A method for processing a substrate is provided. The method includes supplying a first flow of a chemical solution into a processing chamber, configured to process the substrate, via a first dispensing nozzle. The method further includes producing a first thermal image of the first flow of the chemical solution. The method also includes performing an image analysis on the first thermal image. In addition, the method includes moving the substrate into the processing chamber when the result of the analysis of the first thermal image is within the allowable deviation from the baseline. 1. A method for processing a substrate , comprising:supplying a flow of a chemical solution into a processing chamber, configured to process the substrate, via a first dispensing nozzle;producing a first thermal image of the flow of the chemical solution;performing an image analysis on the first thermal image; andmoving the substrate into the processing chamber when the result of the analysis of the first thermal image is within an allowable deviation from the baseline.2. The method as claimed in claim 1 , further comprising:terminating the supply of the flow of the chemical solution when the result of the analysis of the first thermal image is outside the allowable deviation from the baseline; andissuing a warning signal for a maintenance process.3. The method as claimed in claim 1 , wherein the thermal image is captured by an infrared (IR) detector.4. The method as claimed in claim 1 , further comprising discharging an ultraviolet radiation to the chemical solution.5. The method as claimed in claim 1 , wherein the image analysis comprises performing an image comparison.6. The method as claimed in claim 1 , wherein the image analysis comprises calculating an area of a specific color in the thermal image.7. The method as claimed in claim 1 , wherein the chemical solution comprises developer solution or cleaning solution.8. The method as claimed in claim 1 , wherein the substrate ...

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Номер записи: 53
14-06-2018 дата публикации

PHOTOMASK AND FABRICATION METHOD THEREFOR

Номер: US20180164675A1
Автор: CHANG HAO-MING, CHU Yuan-Chih, HSU S. C., LAI CHIEN-HUNG, LIN Cheng-Ming, WANG HSUAN-WEN, WEI Shao-Chi, Yang Min-An
Принадлежит:

A method of manufacturing a mask includes depositing an end-point layer over a light transmitting substrate, depositing a phase shifter over the end-point layer, depositing a hard mask layer over the phase shifter, and removing a portion of the hard mask layer and a first portion of the phase shifter to expose a portion of the end-point layer. The end-point layer and the light transmitting substrate are transparent to a predetermined wavelength. 1. A method of manufacturing a mask , comprising:depositing an end-point layer over a light transmitting substrate, wherein the end-point layer and the light transmitting substrate are transparent to a predetermined wavelength;depositing a phase shifter over the end-point layer;depositing a hard mask layer over the phase shifter; andremoving a portion of the hard mask layer and a first portion of the phase shifter to expose a portion of the end-point layer.2. The method of claim 1 , wherein the depositing of the end-point layer comprises:depositing a material having a band gap energy equal to or greater than 6 electron volts (eV).3. The method of claim 1 , wherein the depositing of the end-point layer comprises:depositing a material having an average atomic number greater than an average atomic number of the light transmitting substrate.4. The method of claim 1 , wherein the depositing of the end-point layer comprises:depositing a material having an average atomic number smaller than an average atomic number of the light transmitting substrate.5. The method of claim 1 , wherein the depositing of the end-point layer comprises:depositing the end-point layer to have a thickness equal to or less than 100 angstrom (Å).6. The method of claim 1 , wherein the removing of the portion of the hard mask layer and the first portion of the phase shifter comprises:monitoring a backscattered electron (BSE) signal of the mask; andtransmitting a stop signal when a predetermined BSE signal is generated.7. The method of claim 1 , further ...

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Номер записи: 54
30-05-2019 дата публикации

SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

Номер: US20190165113A1
Автор: FANG Zi-Wei, Lim Peng-Soon, LIN Cheng-Ming
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A method includes forming a gate dielectric layer over a semiconductor substrate, forming a first metal element-containing layer over the gate dielectric layer, and thermal soaking the first metal element-containing layer in a first gas, such that a constituent of the first gas is diffused into the first metal element-containing layer. 1. A method , comprising:forming a gate dielectric layer over a semiconductor substrate;forming a first metal element-containing layer over the gate dielectric layer; andthermal soaking the first metal element-containing layer in a first gas, such that a constituent of the first gas is diffused into the first metal element-containing layer.2. The method of claim 1 , wherein forming the first metal element-containing layer and thermal soaking the first metal element-containing layer are performed in the same processing chamber.3. The method of claim 1 , wherein thermal soaking the first metal element-containing layer in the first gas is performed at a temperature from about 200° C. to about 500° C.4. The method of claim 1 , further comprising:forming a second metal element-containing layer over the first metal element-containing layer using a precursor, wherein the constituent of the first gas diffused into the first metal element-containing layer bonds with a constituent of the precursor.5. The method of claim 1 , wherein the constituent of the first gas includes an N-work function metal or silicon.6. The method of claim 1 , further comprising:thermal soaking the first metal element-containing layer in a second gas after thermal soaking the first metal element-containing layer in the first gas.7. The method of claim 6 , wherein thermal soaking the first metal element-containing layer in the first gas and thermal soaking the first metal element-containing layer in the second gas are performed in the same processing chamber.8. The method of claim 6 , wherein the first gas is an aluminum-containing gas claim 6 , and the second gas is a ...

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Номер записи: 55
30-05-2019 дата публикации

SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

Номер: US20190165116A1
Автор: FANG Zi-Wei, Lim Peng-Soon, LIN Cheng-Ming
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A semiconductor device includes a semiconductor substrate having a channel region. A gate dielectric layer is over the channel region of the semiconductor substrate. A work function metal layer is over the gate dielectric layer. The work function metal layer has a bottom portion, an upper portion, and a work function material. The bottom portion is between the gate dielectric layer and the upper portion. The bottom portion has a first concentration of the work function material, the upper portion has a second concentration of the work function material, and the first concentration is higher than the second concentration. A gate electrode is over the upper portion of the work function metal layer. 1. A semiconductor device comprising:a semiconductor substrate having a channel region;a gate dielectric layer over the channel region of the semiconductor substrate;a work function metal layer over the gate dielectric layer, wherein the work function metal layer has a bottom portion, an upper portion, and a work function material, the bottom portion is between the gate dielectric layer and the upper portion, the bottom portion has a first concentration of the work function material, the upper portion has a second concentration of the work function material, and the first concentration is higher than the second concentration; anda gate electrode over the upper portion of the work function metal layer.2. The semiconductor device of claim 1 , wherein the bottom portion of the work function metal layer has a lower effective work function value than the upper portion of the work function metal layer.3. The semiconductor device of claim 1 , wherein the upper portion of the work function metal layer is thicker than the bottom portion of the work function metal layer.4. The semiconductor device of claim 1 , wherein the work function material has a vacuum work function value smaller than about 4.4 eV.5. The semiconductor device of claim 1 , wherein the semiconductor substrate has a ...

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Номер записи: 56
29-09-2022 дата публикации

Contact Structures in Semiconductor Devices

Номер: US20220310800A1
Автор: Chen Szu-Hua, KHADERBAD Mrunal Abhijith, LIN Cheng-Ming, LIN HAN-YU, Woon Wei-Yen
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure describes a semiconductor device and a method for forming the semiconductor device. The method includes forming a fin structure on a substrate, forming a gate structure on the fin structure, and forming a source/drain (S/D) region on the fin structure not covered by the gate structure. The method further includes forming a contact structure on the S/D region. Forming the contact structure includes forming a transition metal chalcogenide (TMC) layer on the S/D region, and forming a contact plug on the TMC layer. 1. A method , comprising:forming a fin structure on a substrate;forming a gate structure on the fin structure;forming a source/drain (S/D) region on the fin structure not covered by the gate structure; and forming a transition metal chalcogenide (TMC) layer on the S/D region; and', 'forming a contact plug on the TMC layer., 'forming a contact structure on the S/D region, wherein forming the contact structure comprises2. The method of claim 1 , wherein a ratio between a thickness of the TMC layer and a length of the TMC layer along the fin structure can be between about 0.017:1 and about 0.3:1.3. The method of claim 1 , wherein forming the TMC layer comprises:depositing a layer of chalcogen material on the S/D region at a temperature between about 300° C. and about 800° C. with a plasma process or between about 500° C. and about 1100° C. without a plasma process; anddepositing a layer of transition metal on the layer of chalcogen material at a temperature between about 300° C. and about 800° C. with a plasma process or between about 500° C. and about 1100° C. without a plasma process.4. The method of claim 1 , wherein forming the TMC layer comprises:depositing a layer of chalcogen material on the S/D region;depositing a layer of transition metal on the layer of chalcogen material; andperforming a plasma process on the layer of transition metal.5. The method of claim 1 , wherein forming the TMC layer comprises:forming a contact opening on ...

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Номер записи: 57
01-07-2021 дата публикации

STRUCTURE AND METHOD OF RETICLE POD HAVING INSPECTION WINDOW

Номер: US20210202287A1
Автор: CHANG HAO-MING, HUANG Chung-Yang, LIN Cheng-Ming, SHIH WANG CHENG
Принадлежит:

The structure and methods of a reticle pod are provided. A reticle pod includes a base configured to support a reticle and a cover detachably coupled to the base. The cover includes a window that allows radiation at a wavelength between about 400 nm and about 700 nm to pass through with a transmittance of greater than 70%. 1. A reticle pod , comprising:a base configured to support a reticle; and a window body; and', 'a transparent film on two sides of the window body,', 'wherein the window is configured to allow radiation of a predetermined wavelength to pass through with a transmittance of greater than 70%., 'a cover configured to form a sealed space with the base, the cover comprising a window having2. The reticle pod of claim 1 , wherein the window is further configured to allow the radiation at the predetermined wavelength to impinge on the reticle without reaction with a photoresist material of the reticle.3. The reticle pod of claim 1 , wherein the predetermined wavelength is between about 500 nm and about 560 nm.4. The reticle pod of claim 1 , wherein the window comprises a width between about 125% and about 175% of a width of the reticle.5. The reticle pod of claim 1 , wherein the transparent film comprises a conductive material.6. The reticle pod of claim 5 , wherein the transparent film comprises at least one of aluminum zinc oxide (AZO) claim 5 , indium tungsten oxide (ITO) claim 5 , fluorine doped tin oxide (FTO) and carbon nanotube.7. The reticle pod of claim 5 , wherein the transparent film comprises a thickness between about 20 nm and about 200 nm.8. The reticle pod of claim 1 , wherein the cover further comprises a frame having an opening accommodating the window.9. The reticle pod of claim 8 , wherein the frame comprises an opaque material laterally surrounding the window.10. The reticle pod of claim 1 , wherein the base comprises at least one of PEEK and PMMA.11. A reticle pod claim 1 , comprising:a base configured to support a reticle; anda cover ...

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Номер записи: 58
18-09-2014 дата публикации

STRIP-GROUND FIELD PLATE

Номер: US20140264637A1
Автор: CHEN Po-Chih, Lin Ming-Cheng, SU Ru-Yi, TSAI Chun Lin, YANG Fu-Chih
Принадлежит: Taiwan Semiconductor Manufacturing Company Limited

Among other things, one or more semiconductor devices and techniques for forming such semiconductor devices are provided. The semiconductor device comprises a strip-ground field plate. The strip-ground field plate is connected to a source region of the semiconductor device and/or a ground plane. The strip-ground field plate provides a release path for a gate edge electric field. The release path directs an electrical field away from a gate region of the semiconductor device. In this way, breakdown voltage and gate charge are improved. 1. A semiconductor device , comprising:a channel between a source region and a drain region of a semiconductor device comprising a gate region formed over the channel, the channel comprising an access region formed between the gate region and the drain region; anda strip-ground field plate formed over the access region, the strip-ground field plate connected to at least one of the source region or a ground plane.2. The semiconductor device of claim 1 , the strip-ground field plate configured to provide a release path for a gate edge electric field.3. The semiconductor device of claim 1 , comprising:a first dielectric layer formed between the strip-ground field plate and the access region.4. The semiconductor device of claim 1 , comprising:a second dielectric layer formed over the gate region and the strip-ground field plate.5. The semiconductor device of claim 1 , the strip-ground field plate corresponding to at least one of a first strip ground of a metal one layer or a second strip ground of a metal two layer.6. The semiconductor device of claim 1 , the strip-ground field plate formed over at least a portion of the gate region.7. The semiconductor device of claim 4 , comprising:a source field plate formed over the second dielectric layer.8. The semiconductor device of claim 1 , the strip-ground field plate not connected to the gate region.9. The semiconductor device of claim 1 , the channel comprising gallium nitride.10. The ...

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Номер записи: 59
14-07-2016 дата публикации

DICING METHOD FOR POWER TRANSISTORS

Номер: US20160204074A1
Автор: Huang Hsin-Chieh, Lin Ming-Cheng, LIN Yu-Syuan, Wang Chao-Hsiung, YU Jiun-Lei Jerry
Принадлежит:

Some embodiments relate to a method of dicing a semiconductor wafer. The semiconductor wafer that includes a device structure that is formed within a device layer. The device layer is arranged within an upper surface the device layer. A crack stop is formed, which surrounds the device structure and reinforces the semiconductor wafer to prevent cracking during dicing. A laser is used to form a groove along a scribe line outside the crack stop. The groove extends completely through the device layer, and into an upper surface region of the semiconductor wafer. The semiconductor wafer is then cut along the grooved scribe line with a cutting blade to singulate the semiconductor wafer into two or more die. By extending the groove completely through the device layer, the method avoids damage to the device layer caused by the blade saw, and thus avoids an associated performance degradation of the device structure. 115-. (canceled)16. A method , comprising:providing a semiconductor wafer comprising a device layer arranged thereover;forming a device structure on or within an upper surface the device layer;forming a crack stop surrounding the device structure, wherein the crack stop is configured to reinforce the semiconductor wafer to limit cracking;using a laser to form a groove along a scribe line outside the crack stop, wherein the groove extends completely through the device layer and into an upper surface region of the semiconductor wafer; andcutting the semiconductor wafer along the grooved scribe line with a cutting blade to singulate the semiconductor wafer into two or more die.17. The method of claim 16 ,wherein the groove formed by the laser has a first width; andwherein the cut made by the cutting blade has a second width, which is less than the first width.18. The method of claim 17 ,wherein the first width is about four times larger than a thickness of the device layer; andwherein the second width is about three times larger than the thickness of the device layer ...

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Номер записи: 60
30-07-2015 дата публикации

TEMPERATURE DETECTOR AND PROJECTOR USING THE TEMPERATURE DETECTOR

Номер: US20150212399A1
Автор: CHEN Chia-Ming, Lin Ming-Cheng
Принадлежит: CORETRONIC CORPORATION

A temperature detector and a projector using the temperature detector are provided. The temperature detector is configured to judge the operating temperature of the lamp in the projector. The temperature detector includes a charging/discharging circuit and a temperature judgment unit. The charging/discharging circuit receives a system voltage and provides a temperature voltage. The temperature judgment unit receives the temperature voltage and judges whether or not the operating temperature of the lamp falls in a first temperature range according to the temperature voltage so as to correspondingly output a temperature judgment signal. The scheme of using the temperature detector can determine a heat-dissipation time required by the lamp to advance the accomplishment rate of re-lighting and avoid affecting the lifetime of the lamp due to frequent lighting operation. 1. A temperature detector , configured to judge an operating temperature of a lamp of a projector and comprising a charging and discharging circuit and a temperature judgment unit , wherein the charging and discharging circuit receives a system voltage and provides a temperature voltage; and the temperature judgment unit receives the temperature voltage and judges whether or not the operating temperature of the lamp falls in a first temperature range according to the temperature voltage so as to correspondingly output a temperature judgment signal.2. The temperature detector as claimed in claim 1 , wherein the charging and discharging circuit comprises:a diode, wherein an anode of the diode receives the system voltage;a capacitor, coupled between a cathode of the diode and a ground voltage end; anda resistor, coupled between the cathode of the diode and the ground voltage end.3. The temperature detector as claimed in claim 1 , wherein the temperature judgment unit comprises:an analog-to-digital converter, receiving the temperature voltage and providing a temperature signal; anda numerical comparator unit, ...

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Номер записи: 61
30-07-2015 дата публикации

Transmitting system, the device and the method for the remote bus

Номер: US20150215134A1
Автор: Chun-Hung Lee, Hung-Chou Lin, Kai-Tong Jian, Ming-Cheng Lin
Принадлежит: SUNIX CO Ltd

A transmitting system, the device and the method for the remote bus applies to control the remote device via network. The transmitting system comprises of a main computer and a bridge device. The main computer includes a first process unit, a storage unit, a first network port and an agent program. The first process unit dispatches the agent program, and sets up the address space and the connection channels according to the identify information. The bridge device couples to the main computer and the target device. The agent program divides the operation command and generates the first package. The main computer sends the first package to the bridge device via the first network port. The bridge device recovers the first package to the operation command, and drives the target device according to the operation command.

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Номер записи: 62
30-07-2015 дата публикации

NETWORK CONTROL DEVICE, THE NETWORK CONTROL SYSTEM AND THE METHOD OF THE REMOTE DEVICE

Номер: US20150215136A1
Автор: JIAN KAI-TONG, LEE CHUN-HUNG, Lin Hung-Chou, Lin Ming-Cheng
Принадлежит:

A network control device, the network control system and the method of the remote device, the control method comprises of the next steps. A bridge device judges the destination of the packages. If the destination of the package from the second network port is the third network port, the bridge drops the packages. If the destination of the package from the first network port is the third network port, the bridge device merge the operate command according to the packages. 1. A network control device , comprising:a first network port, connected to a main computer;a second network port, connected to an electronic device via a network;a third network port, electrically connected to a target device; anda processing unit, electrically connected to the first network port, the second network port and the third network port, the processing unit controlling the bidirectional transmission between the first network port and the third network port, the processing unit controlling the bidirectional transmission between the second network port and the third network port, and the processing unit controlling the unidirectional transmission from the first network port to the third network port.2. The network control device according to claim 1 , further comprising a heterogeneous conversion unit connected between the third network port and the target device.3. The network control device according to claim 2 , wherein the processing unit transfers a first network package from the main computer to the heterogeneous conversion unit claim 2 , the heterogeneous conversion unit recombines the first network packages to output an operation command claim 2 , the heterogeneous conversion unit transmits the operation command to the target device claim 2 , the heterogeneous conversion unit transmits a response information from the target device to the processing unit claim 2 , the processing unit converts the response information to a second network package and transmits the second network ...

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Номер записи: 63
27-07-2017 дата публикации

HIGH-ELECTRON-MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF

Номер: US20170213903A1
Автор: Hsiung Chih-Wen, Lin Ming-Cheng, TSAI Ming-Wei, Wong King-Yuen
Принадлежит:

Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers. 1. A semiconductor device , comprising:a substrate;a semiconductor layer over the semiconductive substrate, the semiconductor layer comprising a top surface;a gate structure over the semiconductor layer;a passivation layer over the gate structure and the semiconductor layer;a gate electrode over the gate structure;a field plate disposed on the passivation layer, comprising a bottom edge; andwherein the gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, and the passivation layer being between the first edge and the second edge.2. The semiconductor device of claim 1 , further comprising a capping layer over the field plate.3. The semiconductor device of claim 1 , further comprising:a source over the semiconductor layer;a drain over the semiconductor layer; anda contact over the source or the drain, the contact comprising a bottom surface substantially coplanar with the bottom edge of the field plate.4. The semiconductor device of claim 3 , wherein the source or the drain comprises an identical material as the field plate.5. The semiconductor device of claim 1 ...

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Номер записи: 64
03-08-2017 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20170222031A1
Автор: Lin Ming-Cheng, LIN Yu-Syuan, TSAI Chun Lin, Yu Jiun-Lei
Принадлежит:

A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted. 1. A semiconductor device , comprising:a semiconductor substrate; a first semiconductor layer;', 'an active region in the first semiconductor layer; and', 'a first conductive layer underlying the first semiconductor layer, wherein a conductive feature electrically connects a source feature of the first transistor with the first conductive layer;', a second semiconductor layer;', 'another active region in the second semiconductor layer;', 'a second conductive layer underlying the second semiconductor layer and electrically isolated from the first conductive layer., 'a second transistor disposed on the semiconductor substrate, the second transistor including], 'a first transistor disposed on the semiconductor substrate, the first transistor including2. (canceled)3. (canceled)4. (canceled)5. The semiconductor device as claimed in claim 1 , wherein the first conductive layer is biased at the same voltage level as a source terminal of the first transistor through the conductive feature.6. (canceled)7. A semiconductor device claim 1 , comprising:a substrate comprising a semiconductor material; and a first semiconductor layer;', 'an active region defined in the first semiconductor layer; and', 'a first conductive layer under the first semiconductor layer and over the substrate, wherein the first conductive layer is configured to receive a voltage, the voltage level of the first conductive layer to determine whether a channel is held in the active region, and the conductive layer configured to be electrically isolated from the substrate;, 'a first transistor disposed on the substrate, including a second semiconductor layer;', 'another active region defined in the second semiconductor layer; ...

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Номер записи: 65
19-08-2021 дата публикации

METHOD FOR FORMING SEMICONDUCTOR DEVICE

Номер: US20210255542A1
Автор: CHANG HAO-MING, HSU YU-HSIN, HUANG Chung-Yang, LAI PO-CHENG, LEE Kuan-Shien, LI MING CHE, LIN Cheng-Ming, Lin Wei-Hsin, LIN Yi-Hsuan, SHIH WANG CHENG
Принадлежит:

A method for forming a semiconductor device includes receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width; forming a protecting layer to cover the first opening and expose the second opening; performing a wet etching to widen the second opening with an etchant, wherein the second opening has a third width after the performing of the wet etching, and the third width of the second opening is substantially equal to the first width of the first opening; and performing a photolithography to transfer the first opening and the second opening to a target layer. 1. A method for forming a semiconductor device , comprising:receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width;forming a protecting layer to cover the first opening and expose the second opening;performing a wet etching to widen the second opening with an etchant, wherein the second opening has a third width after the performing of the wet etching, and the third width of the second opening is substantially equal to the first width of the first opening; andperforming a photolithography to transfer the first opening and the second opening to a target layer.2. The method of claim 1 , wherein the etchant comprises HOand NHOH.3. The method of claim 1 , further comprising monitoring a conductivity of the etchant during the performing of the wet etching claim 1 , and ending the wet etching when the conductivity of the etchant is outside of a range.4. The method of claim 1 , further comprising disposing an adjustment mark on the substrate.5. The method of claim 4 , wherein the adjustment mark has a fourth width prior to the performing of the wet etching claim 4 , and the adjustment mark has a fifth width after the performing of the wet etching ...

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Номер записи: 66
16-07-2020 дата публикации

Low Static Current Semiconductor Device

Номер: US20200228116A1
Автор: Chen Chu Fu, Chen Mark, CHERN Chan-Hong, Lin Ming-Cheng, Lin Tysh-Bin, TSAI Chun Lin, Wong King-Yuen
Принадлежит:

Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs. 1. A semiconductor device comprising: a power transistor and a driving circuit coupled to the power transistor; wherein:the driving circuit comprises a first stage, a second stage, a third stage, and a fourth stage;the first stage comprises an enhancement-mode high-electron-mobility transistor (HEMT) and a depletion-mode HEMT;the second stage is coupled between the first stage and the power transistor;the third stage is coupled between the first and second stages;the fourth stage is coupled between the first and third stages.2. The semiconductor device of claim 1 , further comprising a charge pump circuit coupled to the first stage.3. The semiconductor device of claim 2 , wherein the charge pump circuit comprises a ring oscillator claim 2 , a clock generator claim 2 , and a voltage multiplier.4. The semiconductor device of claim 3 , wherein the ring oscillator comprises a feedforward oscillating module claim 3 , a feedback oscillating module claim 3 , and an enabling module.5. The semiconductor device of claim 3 , wherein the clock generator comprises a true module and a complement module.6. The semiconductor device of claim 3 , wherein the voltage multiplier is a Dickson voltage multiplier.7. The semiconductor device of claim 1 , wherein the second stage comprises a pair of enhanced-mode HEMTs.8. The semiconductor device of claim 1 , wherein the third and fourth stages each comprises a pair of enhanced-mode HEMTs.9. The semiconductor device of claim 1 , further comprising a bootstrap circuit coupled to the third stage.10 ...

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Номер записи: 67
09-09-2021 дата публикации

Method of fabricating a photomask and method of inspecting a photomask

Номер: US20210278760A1
Автор: Cheng-Ming Lin, Hao-Ming Chang, Sheng-Chang Hsu, Tsun-Cheng Tang, Way-Len Chang
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

In accordance with some embodiments of the present disclosure, an inspection method of a photomask includes performing a first inspection process, unloading the photomask from the inspection system, and performing a second inspection process. In the first inspection process, a common Z calibration map of an objective lens of an optical module with respect to the photomask is generated and stored, and a first image of the photomask is captured by using an image sensor while focusing the objective lens of the optical module based on the common Z calibration map. The photomask is unloaded from the inspection system. In the second inspection process, the photomask is loaded on the inspection system and a second image of the photomask is captured by using an image sensor while focusing an objective lens of an optical module based on the common Z calibration map generated in the first inspection process.

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Номер записи: 68
09-09-2021 дата публикации

SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

Номер: US20210280679A1
Автор: FANG Zi-Wei, Lim Peng-Soon, LIN Cheng-Ming
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A semiconductor device includes a substrate, a semiconductor fin extending from the substrate, a gate dielectric layer over the semiconductor fin, a metal nitride layer comprising a first portion over the gate dielectric layer and a second portion over the first portion, and a fill metal over the metal nitride layer. The second portion has an aluminum concentration greater than an aluminum concentration of the first portion. 1. A device comprising:a substrate;a semiconductor fin extending from the substrate;a gate dielectric layer over the semiconductor fin;a metal nitride layer comprising a first portion over the gate dielectric layer and a second portion over the first portion, the second portion having an aluminum concentration greater than an aluminum concentration of the first portion; anda fill metal over the metal nitride layer.2. The device of claim 1 , further comprising:a p-type work function layer between the metal nitride layer and the fill metal.3. The device of claim 1 , further comprising:an n-type work function layer between the metal nitride layer and the fill metal.4. The device of claim 1 , wherein the aluminum concentration of the second portion of the metal nitride layer is in a range from about 5% to about 30%.5. The device of claim 1 , wherein the aluminum concentration of the first portion of the metal nitride layer is less than about 1%.6. The device of claim 1 , wherein the second portion of the metal nitride layer has a thickness in a range from about 5 Angstroms to about 50 Angstroms.7. The device of claim 1 , wherein the aluminum concentration of the second portion of the metal nitride layer is gradient.8. The device of claim 1 , wherein both the first portion and the second portion of the metal nitride layer comprises titanium nitride or tantalum nitride.9. The device of claim 1 , wherein the metal nitride layer further comprises a third portion over the second portion claim 1 , and the third portion has a silicon concentration greater ...

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Номер записи: 69
09-09-2021 дата публикации

DEVICES WITH BEZELS TO REDUCE RESONANCE SHIFT IN ANTENNAS

Номер: US20210280960A1
Автор: Hung Kuan-Jung, LIN Cheng-Ming
Принадлежит: Hewlett-Packard Development Company, L.P.

An example of a device including a display panel and a border region around the display panel is provided. The device includes a cover disposed on the display panel and the border region. The cover is to protect the display panel and the border region. The device also includes an antenna with a keep out area disposed within a portion of the border region. The device includes a bezel disposed in the keep out area to support the cover. The bezel includes a partially filled portion to reduce a resonance shift of the antenna. 1. A device comprising:a display panel;a border region around the display panel;a cover disposed on the display panel and the border region, the cover to protect the display panel and the border region;an antenna disposed within a portion of the border region, wherein the antenna has a keep-out area; anda bezel disposed in the keep-out area to support the cover, wherein the bezel includes a partially filled portion to reduce a resonance shift of the antenna.2. The device of claim 1 , wherein the bezel is a dielectric material.3. The device of claim 2 , wherein the dielectric material is plastic.4. The device of claim 3 , wherein the partially filled portion is a cutout section.5. The device of claim 4 , wherein the antenna extends into the cutout section to increase height.6. The device of claim 5 , wherein the height is increased up to a thickness of the bezel.707. The device of claim 6 , wherein the thickness is about . millimeters.8. The device of claim 1 , further comprising a shielding to protect the display panel and antenna.9. The device of claim 8 , wherein the shielding is metal to provide electromagnetic shielding.10. A bezel comprising:an elongated material dimensioned to fit in a border region around a display panel, wherein the bezel is to be disposed over an antenna within a keep-out area to support a cover; anda partially filled portion to reduce a resonance shift of the antenna.11. The bezel of claim 10 , wherein the partially ...

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Номер записи: 70
15-08-2019 дата публикации

Low Static Current Semiconductor Device

Номер: US20190253051A1
Автор: Chen Chu Fu, Chen Mark, CHERN Chan-Hong, Lin Ming-Cheng, Lin Tysh-Bin, TSAI Chun Lin, Wong King-Yuen
Принадлежит:

Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs. 1. A semiconductor device comprising: a power transistor , a driving circuit coupled to and configured to drive the power transistor , and a charge pump circuit; wherein:the driving circuit includes a first stage and a second stage;the first stage includes an enhancement-mode high-electron-mobility transistor (HEMT);the second stage is coupled between the first stage and the power transistor and includes a pair of enhancement-mode HEMTs; andthe charge pump circuit includes input and output terminals.2. The semiconductor device of claim 1 , wherein the charge pump circuit is configured to generate a charge pump voltage at the output terminal thereof greater than a source voltage at the input terminal thereof.3. The semiconductor device of claim 1 , wherein the charge pump circuit comprises a ring oscillator claim 1 , a clock generator claim 1 , and a voltage multiplier.4. The semiconductor device of claim 3 , wherein the voltage multiplier is coupled to the input and output terminals of the charge pump circuit.5. The semiconductor device of claim 3 , wherein the ring oscillator comprises a feedforward oscillating module claim 3 , a feedback oscillating module claim 3 , and an enabling module.6. The semiconductor device of claim 5 , further comprising a package encapsulating the driving circuit and an enable pin extending into the package claim 5 , wherein the enable pin is coupled to the enabling module.7. The semiconductor device of claim 1 , further comprising a package encapsulating the driving circuit and a pair of ...

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Номер записи: 71
21-10-2021 дата публикации

SELECTIVE INTERNAL GATE STRUCTURE FOR FERROELECTRIC SEMICONDUCTOR DEVICES

Номер: US20210328064A1
Автор: Chao Huang-Lin, Chui Chi On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

The present disclosure relates to a semiconductor device including a substrate and first and second spacers on the substrate. The semiconductor device also includes a gate stack between the first and second spacers. The gate stack includes a gate dielectric layer having a first portion formed on the substrate and a second portion formed on the first and second spacers; an internal gate formed on the first and second portions of the gate dielectric layer; a ferroelectric dielectric layer formed on the internal gate and in contact with the gate dielectric layer; and a gate electrode on the ferroelectric dielectric layer. 1. A semiconductor device , comprising:a substrate;first and second spacers on the substrate; and a gate dielectric layer, wherein a first portion of the gate dielectric layer is on the substrate and a second portion of the gate dielectric layer is on the first and second spacers;', a first metal layer comprising a vertical portion and a horizontal portion; and', 'a second metal layer in contact with the first metal layer and the second portion of the gate dielectric layer;, 'an internal gate, comprising, 'a ferroelectric dielectric layer in contact with the second metal layer and second portion of the gate dielectric layer; and', 'a gate electrode on the ferroelectric dielectric layer., 'a gate stack between the first and second spacers, the gate stack comprising2. The semiconductor device of claim 1 , wherein the ferroelectric dielectric layer comprises crystalline hafnium oxide.3. The semiconductor device of claim 1 , wherein the first and second metal layers comprise copper and tungsten claim 1 , respectively.4. The semiconductor device of claim 1 , further comprising a fin on the substrate claim 1 , wherein the gate stack is on the fin.5. The semiconductor device of claim 1 , wherein the ferroelectric dielectric layer is between the internal gate and the gate electrode.6. The semiconductor device of claim 1 , wherein the ferroelectric dielectric ...

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Номер записи: 72
06-08-2020 дата публикации

PROJECTOR AND METHOD FOR PROJECTING IMAGE LIGHT BEAM

Номер: US20200252592A1
Автор: Lin Ming-Cheng, Wang Chih-Ming
Принадлежит: CORETRONIC CORPORATION

A projector and a method for projecting an image light beam according to an image signal are provided. The method includes: receiving the image signal; decoding the image signal to obtain a metadata of the image signal; converting a color space of the image signal from a wider color gamut to a narrower color gamut according to the metadata so as to generate a converted image signal; performing a gamma correction on the converted image signal according to the metadata to generate a corrected image signal; transferring the corrected image signal into an optical signal; providing a light beam; respectively modulating the light beam and a illumination beam according to the optical signal to form an image light beam; and projecting the image light beam. 1. A projector for projecting an image light beam according to an image signal , comprising: receive the image signal and decode the image signal to obtain a metadata of the image signal; and', 'convert, according to the metadata, a color space of the image signal from a wider color gamut to a narrower color gamut so as to generate a converted image signal;, 'a receiver configured to perform, according to the metadata, a gamma correction on the converted image signal to generate a corrected image signal; and', 'transfer the corrected image signal into an optical signal;, 'a processor coupled to the receiver and configured toa light source module coupled to the processor and providing a light beam;a color conversion module coupled to the processor and disposed on a transmission path of the light beam, wherein the color conversion is configured to modulate, according to the optical signal, the light beam to an illumination beam;a light valve coupled to the processor and disposed on a transmission path of the illumination beam, wherein the light valve is configured to modulate, according to the optical signal, the illumination beam to form the image light beam; anda projection lens, disposed on a transmission path of the ...

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Номер записи: 73
13-08-2020 дата публикации

PROJECTOR AND METHOD FOR PROJECTING IMAGE LIGHT BEAM

Номер: US20200260059A1
Автор: Lin Ming-Cheng, Wang Chih-Ming
Принадлежит: CORETRONIC CORPORATION

A projector and a method for projecting an image light beam according to an image signal are provided. The method includes: receiving the image signal; decoding the image signal to obtain a metadata of the image signal; determining whether the image signal is a HLG-HDR signal according to the metadata; converting a color space of the image signal from a wider color gamut to a narrower color gamut in response to the image signal is the HLG-HDR signal so as to generate a converted image signal; performing a gamma correction on the converted image signal according to the metadata to generate a corrected image signal; transferring the corrected image signal into an optical signal; providing a light beam; respectively modulating the light beam and a illumination beam according to the optical signal to form an image light beam; and projecting the image light beam. 1. A projector for projecting an image light beam according to an image signal , comprising: receive the image signal and decode the image signal to obtain a metadata of the image signal;', 'determine, according to the metadata, whether the image signal is a HLG-HDR signal; and', 'convert, in response to the image signal is the HLG-HDR signal, a color space of the image signal from a wider color gamut to a narrower color gamut so as to generate a converted image signal;, 'a receiver configured to perform, according to the metadata, a gamma correction on the converted image signal to generate a corrected image signal; and', 'transfer the corrected image signal into an optical signal;, 'a processor coupled to the receiver and configured toa light source module coupled to the processor and providing a light beam;a color conversion module coupled to the processor and disposed on a transmission path of the light beam, wherein the color conversion is configured to modulate, according to the optical signal, the light beam to an illumination beam;a light valve coupled to the processor and disposed on a transmission path ...

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Номер записи: 74
29-09-2016 дата публикации

ELECTROCHEMICAL REACTION APPARATUS

Номер: US20160281257A1
Автор: Lin Ming-Cheng
Принадлежит:

An electrochemical reactor includes an adjustable electric field shaping capability during electroplating. The electrochemical reactor includes a reservoir configured to retain an electrolytic solution; a cathode and an anode disposed in the reservoir to form electric field lines passing through the electrolytic solution. Either the cathode or the anode includes a workpiece holder. A shield attaches to the cathode or the anode without the workpiece holder. The shield includes a surface configured to block a portion of the electric field lines, and a conduit positioned on the surface and configured to concentrate the electric field lines within the conduit. The conduit includes a protruding portion including a height measured from the surface to a top surface of the conduit, and an aperture penetrating the protruding portion and passing through the surface. The aperture is configured to allow the electric field lines to pass through the conduit. 1. An electrochemical reactor comprising an adjustable electric field shaping capability during electroplating , comprising:a reservoir configured to retain an electrolytic solution;a cathode and an anode disposed in the reservoir to form electric field lines passing through the electrolytic solution, wherein either the cathode or the anode includes a workpiece holder; and a surface configured to block a portion of the electric field lines; and', a protruding portion including a height measured from the surface to a top surface of the conduit; and', 'an aperture penetrating the protruding portion and passing through the surface, and the aperture configured to allow the electric field lines to pass through the conduit., 'a conduit positioned on the surface, and configured to concentrate the electric field lines within the conduit, wherein the conduit comprises], 'a shield attached to the cathode or the anode without the workpiece holder, the shield comprising2. The electrochemical reactor of claim 1 , further comprising an ...

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Номер записи: 75
04-10-2018 дата публикации

BLANK MASK AND FABRICATION METHOD THEREOF, AND METHOD OF FABRICATING PHOTOMASK

Номер: US20180284601A1
Автор: CHANG HAO-MING, CHEN Chih-Ming, Hsu Sheng-Chang, LIN Cheng-Ming, Lu Li-Chih, Shih Hsao, WEI Shao-Chi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A method of fabricating a photomask includes providing a blank mask; removing a portion of the resist layer to form a patterned resist layer exposing a portion of the cooling layer; patterning the cooling layer by using the patterned resist layer as an etching mask; patterning the opaque layer; and removing the patterned resist layer and the patterned cooling layer. The blank mask includes a light-transmitting substrate and an opaque layer, a cooling layer, and a resist layer sequentially stacked thereon, wherein the cooling layer has a thermal conductivity ranging between 160 and 5000 and an effective atomic number ranging between 5 and 14. 1. A method of fabricating a photomask , comprising:providing a blank mask comprising a light-transmitting substrate and an opaque layer, a cooling layer, and a resist layer sequentially stacked thereon, wherein the cooling layer has a thermal conductivity ranging between 160 and 5000 and an effective atomic number ranging between 5 and 14;removing a portion of the resist layer to form a patterned resist layer exposing a portion of the cooling layer;patterning the cooling layer by using the patterned resist layer as a mask;patterning the opaque layer; andremoving the patterned resist layer and the patterned cooling layer.2. The method of claim 1 , wherein providing the blank mask comprises:providing a laminated film of the light-transmitting substrate, the opaque layer, and a photoresist layer sequentially stacked;removing the photoresist layer of the laminated film;forming the cooling layer on the opaque layer; andcoating the resist layer on the cooling layer over the laminated film.3. The method of claim 2 , wherein forming the cooling layer comprises sputtering the cooling layer blanketly covering the opaque layer over the light-transmitting substrate have a thickness ranging from about 3 nm to about 100 nm.4. The method of claim 2 , wherein forming the cooling layer comprises depositing a layer of aluminum nitride claim 2 , ...

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Номер записи: 76
27-08-2020 дата публикации

REUSABLE HOLDING COMPONENT FOR HEATSINK

Номер: US20200273774A1
Автор: Lin Ming-Cheng
Принадлежит:

A reusable holding component is provided. The reusable holding component may comprise a frame with a fastener receiving opening extending from a first surface of the frame to a second surface of the frame, and at least two pins disposed on and extending away from the second surface of the frame, wherein each of the at least two pins includes a head portion, at least one elongated segment connected to a portion of the head portion, and a hook disposed on the at least one elongated segment. A heat transfer device and an electronic device with a heatsink are also provided. 1. A reusable holding component , comprising:a frame with a fastener receiving opening extending from a first surface of the frame to a second surface of the frame; andat least two pins disposed on and extending away from the second surface of the frame, wherein each of the at least two pins includes a head portion, at least one elongated segment connected to a portion of the head portion, and a hook disposed on the at least one elongated segment.2. The reusable holding component according to claim 1 , wherein the at least one elongated segment of each of the at least two pins has a curved cross-section claim 1 , and the hook is disposed on an outer surface of the at least one elongated segment.3. The reusable holding component according to claim 2 , wherein the hook of each of the at least two pins faces away from each other.4. The reusable holding component according to claim 2 , wherein the curved cross-section of the at least one elongated segment on each of the at least two pins forms a groove along the at least one elongated segment claim 2 , and wherein an inner surface of the at least one elongated segment on one of the at least two pins faces to the inner surface of the at least one elongated segment on another one of the at least two pins.5. The reusable holding component according to claim 1 , wherein the frame has a rectangular shape claim 1 , and the at least two pins are disposed at ...

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Номер записи: 77
27-08-2020 дата публикации

REUSABLE HOLDING COMPONENT FOR HEATSINK

Номер: US20200275572A1
Автор: Lin Ming-Cheng
Принадлежит:

A reusable holding component is provided. The reusable holding component may comprise a frame with a fastener receiving opening extending from a first surface of the frame to a second surface of the frame, and at least one pin disposed on and extending away from the second surface of the frame, wherein the at least one pin includes at least two elongated segments with hooks disposed on a head portion of each of the at least two elongated segments. A heat transfer device and an electronic device with a heatsink are also provided. 1. A reusable holding component , comprising:a frame with a fastener receiving opening extending from a first surface of the frame to a second surface of the frame; andat least one pin having a first end disposed on the second surface of the frame, the at least one pin extending away from the second surface to a second end of the at least one pin, wherein the second end of the at least one pin includes at least two elongated segments with hooks disposed on a head portion of each of the at least two elongated segments.2. The reusable holding component according to claim 1 , wherein the at least one pin is vertically extended from the second surface of the frame.3. The reusable holding component according to claim 1 , wherein the frame has a rectangular shape claim 1 , and at least two pins are disposed at diagonal corners on the second surface of the frame.4. The reusable holding component according to claim 1 , further comprising a fastener guiding wall disposed on and extending away from the first surface of the frame claim 1 , wherein the fastener guiding wall surrounds the fastener receiving opening of the frame.5. The reusable holding component according to claim 1 , wherein the at least two elongated segments are parallel with each other claim 1 , and there is a gap between the at least two elongated segments.6. A heat transfer device claim 1 , comprising: a frame with a fastener receiving opening extending from a first surface of the ...

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Номер записи: 78
12-10-2017 дата публикации

DICING TECHNIQUES FOR POWER TRANSISTORS

Номер: US20170294391A1
Автор: Huang Hsin-Chieh, Lin Ming-Cheng, LIN Yu-Syuan, Wang Chao-Hsiung, YU Jiun-Lei Jerry
Принадлежит:

Some embodiments relate to a die that has been formed by improved dicing techniques. The die includes a substrate which includes upper and lower substrate surfaces with a vertical substrate sidewall extending therebetween. The vertical substrate sidewall corresponds to an outermost edge of the substrate. A device layer is arranged over the upper substrate surface. A crack stop is arranged over an upper surface of the device layer and has an outer perimeter that is spaced apart laterally from the vertical substrate sidewall. The die exhibits a tapered sidewall extending downward through at least a portion of the device layer to meet the vertical substrate sidewall. 1. A die , comprising:a substrate including upper and lower substrate surfaces with a vertical substrate sidewall extending therebetween, wherein the vertical substrate sidewall corresponds to an outermost edge of the substrate;a device layer arranged over the upper substrate surface; anda crack stop arranged over an upper surface of the device layer and having an outer perimeter that is spaced apart laterally from the vertical substrate sidewall; andwherein the die exhibits a tapered sidewall extending downward through at least a portion of the device layer to meet the vertical substrate sidewall.2. The die of claim 1 ,wherein the tapered sidewall extends through an entire thickness of the device layer and beneath the upper substrate surface before meeting the vertical substrate sidewall.3. The die of claim 1 , wherein the tapered sidewall forms a rounded claim 1 , concave claim 1 , or spherical surface with a center of curvature located diagonally above the tapered sidewall.4. The die of claim 1 , further comprising:a dielectric layer arranged over the device layer and exhibiting a vertical dielectric sidewall, which extends downward from an upper surface of the dielectric layer to meet an uppermost point of the tapered sidewall.5. The die of claim 1 ,wherein the substrate comprises a group IV element; ...

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Номер записи: 79
03-09-2020 дата публикации

SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

Номер: US20200279929A1
Автор: FANG Zi-Wei, Lim Peng-Soon, LIN Cheng-Ming
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A semiconductor device includes a semiconductor substrate, a pair of source/drain regions, and a gate stack. The pair of source/drain regions is on the semiconductor substrate. The gate stack is laterally between the source/drain regions and includes a gate dielectric layer over the semiconductor fin, a metal element-containing layer over the gate dielectric layer, and a fill metal layer over the metal element-containing layer. The metal element-containing layer has a dopant, and a concentration of the dopant in an upper portion of the metal element-containing layer is higher than a concentration of the dopant in a bottom portion of the metal element-containing layer.

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Номер записи: 80
11-10-2018 дата публикации

HIGH-ELECTRON-MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF

Номер: US20180294347A1
Автор: Hsiung Chih-Wen, Lin Ming-Cheng, TSAI Ming-Wei, Wong King-Yuen
Принадлежит:

Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers. 1. A semiconductor device , comprising:a substrate;a semiconductor layer over the substrate, the semiconductor layer comprising a top surface;a gate structure over the semiconductor layer;a passivation layer over the gate structure and the semiconductor layer;a field plate disposed on the passivation layer, comprising a bottom edge; anda gate electrode comprising a vertical portion upward-extending from the gate structure, and a horizontal portion laterally extending over the field plate.2. The semiconductor device of claim 1 , wherein the horizontal portion of the gate electrode is wider than the gate structure.3. The semiconductor device of claim 1 , wherein the passivation layer surrounds the vertical portion of the gate electrode.4. The semiconductor device of claim 1 , the bottom edge of the field plate is in contact with the passivation layer.5. The semiconductor device of claim 1 , further comprising a capping layer over the field plate and the passivation layer.6. The semiconductor device of claim 1 , further comprising a protection layer between the gate structure and the passivation layer.7. A method of manufacturing a ...

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Номер записи: 81
18-10-2018 дата публикации

PHOTO MASK ASSEMBLY AND OPTICAL APPARATUS INCLUDING THE SAME

Номер: US20180299768A1
Автор: CHANG HAO-MING, Hsu Sheng-Chang, HSU YU-HSIN, LIN Cheng-Ming, WEI Shao-Chi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A photo mask assembly including a photo mask, a first adhesive layer adhered with the photo mask, a pellicle frame and a pellicle is provided. The pellicle frame includes a plurality of recesses for accommodating the first adhesive layer. The pellicle frame is adhered with the photo mask through the first adhesive layer accommodated in the plurality of recesses. The pellicle is disposed on the pellicle frame. The pellicle frame is between the pellicle and the first adhesive layer. An optical apparatus including the above-mentioned photo mask assembly is also provided. 1. A photo mask assembly , comprising:a photo mask;a first adhesive layer adhered with the photo mask;a pellicle frame comprising a plurality of recesses for accommodating the first adhesive layer, the pellicle frame being adhered with the photo mask through the first adhesive layer accommodated in the plurality of recesses; anda pellicle disposed on the pellicle frame, the pellicle frame being between the pellicle and the first adhesive layer.2. The photo mask assembly of claim 1 , wherein the photo mask comprises a transparent substrate and a light-shielding pattern disposed on the transparent substrate claim 1 , and the light-shielding pattern is between the transparent substrate and the pellicle.3. The photo mask assembly of claim 1 , wherein the first adhesive layer comprises a plurality of adhesive portions and each of the adhesive portions is accommodated in one of the plurality of recesses respectively.4. The photo mask assembly of claim 1 , wherein a width of the first adhesive layer is substantially equal to a maximum width of the pellicle frame and the first adhesive layer is thinner than the pellicle frame.5. The photo mask assembly of claim 1 , wherein a width of the first adhesive layer is less than a maximum width of the pellicle frame and the first adhesive layer is thinner than the pellicle frame.6. The photo mask assembly of claim 1 , wherein a maximum width of the pellicle frame ...

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Номер записи: 82
05-11-2015 дата публикации

SYSTEM AND METHOD FOR FILE ENCRYPTING AND DECRYPTING

Номер: US20150319147A1
Автор: Lin Ming-Cheng, WANG PO-SHENG
Принадлежит: Sunix Co., LTD

A system and method of file encrypting/decrypting is disclosed. The system comprises an external device and a host comprising a communication port, a processor, a storage module and an agent module. The processor connects to the communication port and the storage module. The communication port connects to the external device. The storage module stores an operation system, and is configured to have an encryption partition, in which a plurality of encrypted files is stored. The processor executes the operation system and the agent module. The agent module verifies the identification information in order to determine whether to mount the encryption partition. When the encryption partition is mounted into the operation system, the agent module encrypts the plaintext file stored in the encryption partition as an encrypted file, or accesses an encrypted file from the encryption partition. The agent module decrypts the encrypted file and outputs a corresponding plaintext file. 1. A processing system for file encrypting/decrypting , comprising:an external device storing identification information; anda host comprising a communication port, a processor, a storage module and an agent module, wherein the processor connects with the communication port and the storage module, the communication port connects to the external device, and the storage module stores an operation; the storage module has an encryption partition for storing a plurality of encrypted files; the processor executing the operation system and the agent module;wherein the agent module determines whether to load the encryption partition after verifying the identification information; when the operation system mounts the encryption partition, the agent module encrypts a plaintext file written in the encryption partition as the encrypted file, or the agent module accesses any of the encrypted files from the encryption partition, and decrypts the encrypted file and outputs the plaintext file.2. The processing ...

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Номер записи: 83
01-11-2018 дата публикации

Low Static Current Semiconductor Device

Номер: US20180316346A1
Автор: Chan-Hong Chern, Chu Fu CHEN, Chun Lin Tsai, King-Yuen Wong, Mark Chen, Ming-Cheng Lin, Tysh-Bin Lin
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

Devices, systems, and methods are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.

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Номер записи: 84
22-10-2020 дата публикации

Field Effect Transistors with Ferroelectric Dieletric Materials

Номер: US20200335599A1
Автор: Chui Chi On, Fang Ziwei, Lam Kai Tak, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит:

A semiconductor structure that includes a semiconductor fin disposed over a substrate, S/D features disposed over the semiconductor fin, and a metal gate stack interposed between the S/D features. The metal gate stack includes a gate dielectric layer disposed over the semiconductor fin, a capping layer disposed over the gate dielectric layer, and a gate electrode disposed over the capping layer, where the gate dielectric layer includes hafnium oxide with hafnium atoms and oxygen atoms arranged in a Pca2space group. 1. A semiconductor structure , comprising:a semiconductor fin disposed over a substrate;source/drain (S/D) features disposed over the semiconductor fin; and [{'sub': '1', 'a gate dielectric layer disposed over the semiconductor fin, wherein the gate dielectric layer includes hafnium oxide with hafnium atoms and oxygen atoms arranged in a Pca2space group;'}, 'a capping layer disposed over the gate dielectric layer; and', 'a gate electrode disposed over the capping layer., 'a metal gate stack interposed between the S/D features, wherein the metal gate stack includes2. The semiconductor structure of claim 1 , wherein the Pca2space group defines an orthorhombic phase.3. The semiconductor structure of claim 1 , wherein the gate dielectric layer exhibits ferroelectric property.4. The semiconductor structure of claim 3 , wherein the S/D features and the metal gate stack are configured to form a negative capacitance device.5. The semiconductor structure of claim 1 , wherein the gate dielectric layer further includes the hafnium oxide with the hafnium atoms and the oxygen atoms arranged in a monoclinic phase.6. The semiconductor structure of claim 1 , wherein the gate dielectric layer further includes a pervoskite material selected from lead zirconate titanate claim 1 , barium titanate claim 1 , barium strontium titanate claim 1 , strontium titanate claim 1 , or combinations thereof.7. The semiconductor structure of claim 1 , wherein the gate dielectric layer has ...

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Номер записи: 85
06-12-2018 дата публикации

PHOTOMASK AND MANUFACTURING METHOD THEREOF

Номер: US20180348625A1
Автор: CHANG HAO-MING, CHEN Chih-Ming, Cheng Huai-Chih, CHIANG Cheng-Hsuen, LIN Cheng-Ming, Shih Hsao, Yin Hsin-Yi
Принадлежит: Taiwan Semiconductor Manufacturing Co., Ltd.

A method of manufacturing a photomask includes at least the following steps. First, a phase shift layer and a hard mask layer are formed on a light transmitting substrate. A predetermined mask pattern is split into a first pattern and a second pattern. A series of processes is performed so that the hard mask layer and the phase shift layer have the first pattern and the second pattern. The series of processes includes at least the following steps. First, a first exposure process for transferring the first pattern is performed. Thereafter, a second exposure process for transferring the second pattern is performed. The first exposure process and the second exposure process are executed by different machines. 1. A method of manufacturing a photomask , comprising:forming a phase shift layer and a hard mask layer on a light transmitting substrate;splitting a predetermined mask pattern into a first pattern and a second pattern; performing a first exposure process for transferring the first pattern; and', 'performing a second exposure process for transferring the second pattern, wherein the first exposure process and the second exposure process are executed by different machines., 'performing a series of processes so that the hard mask layer and the phase shift layer have the first pattern and the second pattern, wherein the series of processes comprise2. The method of claim 1 , further comprising removing the hard mask layer claim 1 , wherein regions of the light transmitting substrate corresponding to the first pattern and the second pattern are exposed by the phase shift layer.3. The method of claim 2 , wherein the series of processes comprises:performing a first patterning process comprising the first exposure process to transfer the first pattern to the hard mask layer and the phase shift layer; andperforming a second patterning process comprising the second exposure process to transfer the second pattern to the hard mask layer and the phase shift layer.4. The method ...

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Номер записи: 86
14-12-2017 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20170358671A1
Автор: Lin Ming-Cheng, LIN Yu-Syuan, TSAI Chun Lin, Yu Jiun-Lei
Принадлежит:

A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted. 1. A semiconductor device , comprising:a semiconductor substrate; a first semiconductor layer;', 'an active region in the first semiconductor layer; and', 'a first conductive layer underlying the first semiconductor layer; and, 'a first transistor disposed on the semiconductor substrate, the first transistor including a second semiconductor layer;', 'another active region in the second semiconductor layer; and', 'a second conductive layer underlying the second semiconductor layer and electrically isolated from the first conductive layer., 'a second transistor disposed on the semiconductor substrate, the second transistor including2. The semiconductor device of claim 1 , wherein the second semiconductor layer is electrically isolated from the first conductive layer by a barrier structure interposing the first and second semiconductor layers.3. The semiconductor device of claim 1 , wherein the first and second conductive layers are physically separated.4. The semiconductor device of claim 1 , wherein a barrier structure extends between the active region in the first semiconductor layer and the another active region in the second semiconductor layer.5. The semiconductor device of claim 1 , wherein the first and second semiconductor layers are physically separated.6. The semiconductor device of claim 1 , further comprising: a barrier layer between the first and second semiconductor layers claim 1 , wherein the barrier layer is disposed on a first sidewall of the first semiconductor layer and a first sidewall of the second semiconductor layer.7. A semiconductor device claim 1 , comprising:a substrate comprising a semiconductor material; a first semiconductor layer;', 'an active region ...

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Номер записи: 87
12-11-2020 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20200357910A1
Автор: Lin Ming-Cheng, LIN Yu-Syuan, TSAI Chun Lin, Yu Jiun-Lei
Принадлежит:

A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted. 2. The semiconductor device of claim 1 , wherein the substrate has the first dopant type.3. The semiconductor device of claim 1 , further comprising: a conductive feature extending from the first conductive layer to the first source.4. The semiconductor device of claim 1 , wherein the first III-V semiconductor layer includes a GaN layer and an AlGaN layer directly interfacing the GaN layer.5. The semiconductor device of claim 1 , wherein the first conductive layer and the second conductive layer are electrically isolated from one another.6. The semiconductor device of claim 1 , wherein the first conductive layer physically interfaces the second conductive layer.7. The semiconductor device of claim 1 , wherein the first conductive layer is physically separated from the second conductive layer by the distance.8. The semiconductor device of claim 1 , wherein a barrier structure of dielectric material is disposed in the distance.9. The semiconductor device of claim 1 , wherein an isolation region is disposed in the distance claim 1 , the isolation region being dielectric material.10. A semiconductor device claim 1 , comprising:a substrate having a first dopant type;a first conductive layer over the substrate and having the first dopant type;a second conductive layer over the substrate and having a second dopant type;a first III-V semiconductor layer over the first conductive layer;a second III-V semiconductor layer over the second conductive layer; andan isolation layer extending between the first III-V semiconductor layer and the second III-V semiconductor layer.11. The semiconductor device of claim 10 , wherein the isolation layer interfaces each of the first conductive layer and the ...

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Номер записи: 88
26-11-2020 дата публикации

METHOD OF MANUFACTURING PHASE SHIFT PHOTO MASKS

Номер: US20200371425A1
Автор: CHANG HAO-MING, CHEN Chih-Ming, CHIANG Cheng-Hsuen, HUANG Yen-Wei, LEE Kuan-Shien, LIN Cheng-Ming, LIN Kuo-Chin, TIEN Chun-Chieh
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In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer. 1. An apparatus for a photo mask manufacturing operation comprising an etching hard cover , wherein:the etching hard cover is a reusable ceramic comprising a sintered body,the etching hard cover has a rectangular frame shape having a rectangular opening and a rectangular frame portion defining the rectangular opening,the frame portion includes a main cover portion that covers a border region of the photo mask to be manufactured, anda bottom surface of the main cover portion includes an abutting portion to abut the photo mask, when the etching hard cover is placed on the photo mask, the border region of the photo mask is covered by the etching hard cover such that the etching hard cover is in contact with a light blocking layer disposed at the border region.2. The apparatus of claim 1 , wherein the sintered body comprises at least one of boron nitride claim 1 , alumina claim 1 , crystalline silicon nitride claim 1 , silicon carbide claim 1 , zirconia claim 1 , and barium titanate claim 1 , or a coating of silicon oxide or silicon nitride.3. The apparatus of claim 1 , wherein the etching hard cover has a frame shape having the opening and a ...

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Номер записи: 89
31-12-2020 дата публикации

Fabrication of Field Effect Transistors With Ferroelectric Materials

Номер: US20200411662A1
Автор: Chao Huang-Lin, Chui Chi On, Fang Ziwei, LIN Cheng-Ming, Yeong Sai-Hooi
Принадлежит:

A method of forming a semiconductor device includes forming a sacrificial layer on sidewalls of gate spacers disposed over a semiconductor layer, forming a first hafnium-containing gate dielectric layer over the semiconductor layer in a first trench disposed between the gate spacers, removing the sacrificial layer to form a second trench between the gate spacers and the first hafnium-containing gate dielectric layer, forming a second hafnium-containing gate dielectric layer over the first hafnium-containing gate dielectric layer and on the sidewalls of the gate spacers, annealing the first and the second hafnium-containing gate dielectric layers while simultaneously applying an electric field, and subsequently forming a gate electrode over the annealed first and second hafnium-containing gate dielectric layers. 1. A method of fabricating a semiconductor device , comprising:forming a sacrificial layer on sidewalls of gate spacers disposed over a semiconductor layer;forming a first hafnium-containing gate dielectric layer over the semiconductor layer in a first trench disposed between the gate spacers;removing the sacrificial layer to form a second trench between the gate spacers and the first hafnium-containing gate dielectric layer;forming a second hafnium-containing gate dielectric layer over the first hafnium-containing gate dielectric layer and on the sidewalls of the gate spacers;annealing the first and the second hafnium-containing gate dielectric layers, wherein the annealing includes simultaneously applying an electric field; andforming a gate electrode over the annealed first and second hafnium-containing gate dielectric layers.2. The method of claim 1 , wherein forming the second hafnium-containing gate dielectric layer fills the second trench.3. The method of claim 1 , wherein forming the sacrificial layer includes selectively depositing the sacrificial layer over the gate spacers.4. The method of claim 1 , wherein forming the sacrificial layer includes ...

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Номер записи: 90
05-04-2016 дата публикации

Strip-ground field plate

Номер: US9306012B2
Автор: Chun Lin Tsai, Fu-Chih Yang, Ming-Cheng Lin, Po-Chih Chen, Ru-Yi Su
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

Among other things, one or more semiconductor devices and techniques for forming such semiconductor devices are provided. The semiconductor device comprises a strip-ground field plate. The strip-ground field plate is connected to a source region of the semiconductor device and/or a ground plane. The strip-ground field plate provides a release path for a gate edge electric field. The release path directs an electrical field away from a gate region of the semiconductor device. In this way, breakdown voltage and gate charge are improved.

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Номер записи: 91
20-10-2020 дата публикации

Manufacturing method for high-electron-mobility transistor

Номер: US10811261B2
Автор: Chih-Wen Hsiung, King-Yuen Wong, Ming-Cheng Lin, Ming-Wei Tsai
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformally over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.

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Номер записи: 92
18-05-2021 дата публикации

High-electron-mobility transistor and manufacturing method thereof

Номер: US11011380B2
Автор: Chih-Wen Hsiung, King-Yuen Wong, Ming-Cheng Lin, Ming-Wei Tsai
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a semiconductive substrate. A donor-supply layer is over the semiconductive substrate. The donor-supply layer includes a top surface. A gate structure, a drain, and a source are over the donor-supply layer. A passivation layer covers conformably over the gate structure and the donor-supply layer. A gate electrode is over the gate structure. A field plate is disposed on the passivation layer between the gate electrode and the drain. The field plate includes a bottom edge. The gate electrode having a first edge in proximity to the field plate, the field plate comprising a second edge facing the first edge, a horizontal distance between the first edge and the second edge is in a range of from about 0.05 to about 0.5 micrometers.

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Номер записи: 93
18-04-2023 дата публикации

Semiconductor device

Номер: US11631741B2
Автор: Chun Lin Tsai, Jiun-Lei Yu, Ming-Cheng Lin, Yu-Syuan Lin
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A semiconductor device includes a transistor, a semiconductor layer, an active region and a conductive layer. The active region is in the semiconductor layer. The conductive layer is configured to maintain a channel in the active region when the transistor is triggered to be conducted.

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Номер записи: 94
22-03-2022 дата публикации

FinFET having a work function material gradient

Номер: US11282933B2
Автор: Cheng-Ming Lin, Peng-Soon Lim, Zi-Wei FANG
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A semiconductor device includes a semiconductor substrate having a channel region. A gate dielectric layer is over the channel region of the semiconductor substrate. A work function metal layer is over the gate dielectric layer. The work function metal layer has a bottom portion, an upper portion, and a work function material. The bottom portion is between the gate dielectric layer and the upper portion. The bottom portion has a first concentration of the work function material, the upper portion has a second concentration of the work function material, and the first concentration is higher than the second concentration. A gate electrode is over the upper portion of the work function metal layer.

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Номер записи: 95
17-03-1999 дата публикации

PCI I/O interface card

Номер: EP0902372A1
Автор: Ming-Cheng Lin
Принадлежит: Individual

A PCI I/O interface card, which is of a "plug and play" type, is connected with PCI bus expansion slots of a motherboard and performs conversion between a PCI bus and an ISA bus to provide additional ISA bus input/output ports for peripheral devices to use.

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Номер записи: 96
22-09-2015 дата публикации

Lateral double-diffused metal oxide semiconductor

Номер: US9142671B2
Автор: Kwang-Ming Lin, Ming-Cheng Lin, Yu-Long Chang
Принадлежит: Vanguard International Semiconductor Corp

The invention provides a lateral double-diffused metal oxide semiconductor (LDMOS). The pre-metal dielectric layer (PMD) of the LDMOS is a silicon rich content material. Additionally, the inter-layer dielectric layer (ILD), inter-metal dielectric layer (IMD), or protective layer of the LDMOS may be formed of a silicon rich content material.

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Номер записи: 97
11-12-2008 дата публикации

Modularized (block) channel technology with expansion of different to output interfaces

Номер: US20080307143A1
Автор: Ming-Cheng Lin
Принадлежит: SUNIX CO Ltd

A kind of modularized channel technology with expansion of different IO output interfaces, hereafter called MIB (modular industrial bus) system, which consists of an interface card carrying control chip, a BUS transmission interface, an expansion board, and a hot-plug capacity IO output module; the said interface card carrying control chip can be used to convert output data into communication transmission standard suitable for transmission interface and transmit the data to expansion board through wired or wireless communication interface and then output the IO data through the several sets of output modules (blocks) installed on the expansion board; the present invention allows users to instantly expand or replace different output interfaces and output ports according to different requirements and hot plug-in methods in order to resolve the problem of many specifications and complexities that conventional technology faces due to different types of interface cards, output interfaces, and output ports.

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Номер записи: 98
01-04-2010 дата публикации

Photomask and method of fabricating a photomask

Номер: US20100081065A1
Автор: Chein-Hao Huang, Cheng-Ming Lin, Dong-Hsu Cheng
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

A method of fabricating a photomask is provided. A masking layer (e.g., chrome) is deposited on a substrate. A plasma treatment may be performed on the chrome layer. A photoresist layer may be formed on the treated chrome layer. In an embodiment, the plasma treatment roughens the chrome layer. In an embodiment, the plasma treatment forms a barrier film on the chrome layer. The photoresist layer may be used to pattern a sub-resolution assist feature.

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Номер записи: 99
07-12-2021 дата публикации

Cap structure coupled to source to reduce saturation current in HEMT device

Номер: US11195945B2
Автор: Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu SU, Ming-Cheng Lin, Yun-Hsiang Wang
Принадлежит: Taiwan Semiconductor Manufacturing Co TSMC Ltd

In some embodiments, the present disclosure relates to a high voltage device that includes a substrate comprising a first semiconductor material. A channel layer that comprises a second semiconductor material is arranged over the substrate. An active layer that comprises a third semiconductor material is arranged over the channel layer. Over the active layer is a source contact spaced apart from a drain contact. A gate structure is arranged laterally between the source and drain contacts and over the active layer to define a high electron mobility transistor (HEMT) device. Between the gate structure and the source contact is a cap structure, which is coupled to the source contact and laterally spaced from the gate structure. The cap structure and a gate electrode of the gate structure comprise a same material.

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Номер записи: 100