25-03-2021 дата публикации
Номер: US20210089459A1
Автор:
Yimin LU,
Xiaoyan XIANG,
Taotao ZHU,
Chaojun ZHAO,
LU YIMIN,
XIANG XIAOYAN,
ZHU TAOTAO,
ZHAO CHAOJUN,
LU, Yimin,
XIANG, Xiaoyan,
ZHU, Taotao,
ZHAO, Chaojun
Принадлежит:
A storage control apparatus, a storage control method, a processing apparatus, and a computer system are disclosed. The storage control apparatus includes: an address detection unit, adapted to detect whether any jump of physical addresses to which sequentially arriving write access requests are mapped occurs; and a logic control unit, adapted to use a no-write allocate policy if a cache is not hit and no jump of the physical addresses to which the plurality of sequentially arriving write access requests are mapped occurs, where in the no-write allocate policy, if a quantity of continuous jumps of the physical addresses to which the plurality of sequentially arriving write access requests are mapped is less than a preset quantity, the logic control unit keeps using the no-write allocate policy, where the preset quantity is greater than 1. When the quantity of continuous jumps of the physical addresses to which the sequentially arriving write access requests are mapped is less than the preset quantity, embodiments of the present disclosure can keep using the no-write allocate policy, and avoid selecting a write allocate policy during processing of information of a low access probability. Therefore, robustness and stability of the computer system are enhanced. 1. A storage control apparatus , comprising:an address detection unit, adapted to detect whether any jump of physical addresses to which sequentially arriving write access requests are mapped occurs; anda logic control unit, coupled to the address detection unit, and adapted to use a no-write allocate policy to process the write access requests if a cache is not hit and no jump of the physical addresses to which the plurality of sequentially arriving write access requests are mapped occurs, whereinin the no-write allocate policy, if a quantity of continuous jumps of the physical addresses to which the plurality of sequentially arriving write access requests are mapped is less than a preset quantity, the logic ...
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