TOUCH DEVICE

The disclosure provides a touch device, including a protection cover, a pressure-sensing layer and a flat touch-sensing electrode layer. The protection cover is used as an outer protection shield, and an upper surface of the protection cover is provided to users for pressing action. The pressure-sensing layer is disposed under the protection cover to detect touch strength. The flat touch-sensing electrode layer is disposed between the pressure-sensing layer and the protection cover to detect the position of the user's touch. 1. A touch device , comprising:a protection cover, used as an outer protection shield, an upper surface of the protection cover provided to users for a pressing action;a pressure-sensing layer, disposed under the protection cover, configured to detect touch strength; anda flat touch-sensing electrode layer, disposed between the pressure-sensing layer and the protection cover, configured to detect position of the pressing action.2. The touch device as claimed in claim 1 , wherein the pressure-sensing layer at least comprises a radial pressure-sensing electrode claim 1 , the radial pressure-sensing electrode has a plurality of extension portions claim 1 , and the extension portion is presented as a radial pattern outwards from the center of the radial pressure-sensing electrode for increasing a pressure-detection sensitivity.3. The touch device as claimed in claim 1 , wherein a size of the radial pressure-sensing electrode is about 25 mmto 225 mm.4. The touch device as claimed in claim 1 , wherein the radial pressure-sensing electrode is a transparent wire bent and rounded in a radial pattern.5. The touch device as claimed in claim 1 , which further comprises a plurality of radial pressure-sensing electrodes claim 1 , each of which is formed of the plurality of radial patterns bent and rounded by at least one transparent wire; wherein at least two radial patterns are formed of one bent and rounded transparent wire.6. The touch device as claimed in ...

Pattern of a capacitive touch device and manufacturing method thereof

The present disclosure relates to a touch device, and more particularly to a pattern of a capacitive touch device and a manufacturing method thereof. The pattern of the capacitive touch device comprises of a substrate, two adjacent first axial electrodes, a first axial conductive wire, and a pair of metal jumpers. The first axial conductive wire is disposed between the two adjacent first axial electrodes for connecting the two adjacent first axial electrodes. The pair of metallic metal jumpers is disposed on the connecting points of the two first axial electrodes and the first axial conductive wire. Accordingly, resistance caused by the connecting points of the two adjacent first axial electrodes and the first axial conductive wire can be reduced such that response speed of the pattern of the capacitive touch control device is increased.

Touch panel and method of manufacturing a touch panel

The present invention discloses a touch panel and a method of manufacturing a touch panel, to reduce the visibility of the transparent etching line of the transparent electrodes on the touch panel. The touch panel comprises a plurality of transparent electrode disposed distantly on the transparent conductive layer and the passivation layer of a transparent substrate, where the passivation layer covering the transparent conductive layer, to make the refractive index of the passivation layer and the transparent electrodes match with each other. Oxide with high refractive index added in the passivation material is filled in the etched area of the transparent conductive layer, so that the optical refractive index of the etched area and ITO area on transparent conductive layer become closer, and the difference in refractive index curve between ITO area and etched area is reduced, therefore, the effect of making the transparent electrode pattern is achieved.

Touch panel and methods for forming the same

A touch panel is disclosed. The touch panel includes a cover plate having a viewing region and a border region surrounding the viewing region. At least one bonding region is defined in the border region. A shielding layer is disposed on the cover plate corresponding to the border region. An adhesive pattern layer is disposed on the shielding layer and at least in the bonding region. A sensing electrode layer is disposed on the cover plate and extends from the viewing region to the shielding layer corresponding to the border region. A signal trace layer including a plurality of traces is disposed on the shielding layer corresponding to the border region. Each trace has one end electrically connected to the sensing electrode layer and another end assembled onto the adhesive pattern layer corresponding to the bonding region. A method for forming a touch panel is also disclosed.

TOUCH SENSING LAYER AND MANUFACTURING METHOD THEREOF

The present invention relates to a touch sensing layer which comprises at least one first-axis sensing electrode, second-axis sensing electrode, insulating element and conductive bridge. Each first-axis sensing electrode comprises a plurality of first electrode patterns with discontinuity-in-series, and each second-axis sensing electrode is configured to interlace with each first-axis sensing electrode and comprises a plurality of second electrode patterns with continuity-in-series. Each insulating element is continuously formed on the corresponding second-axis sensing electrode, and each conductive bridge is also continuously formed above the corresponding first-axis sensing electrode and crosses the insulating element to connect those first electrode patterns with discontinuity-in-series. 1. A touch sensing layer , comprising:a first-axis sensing electrode comprising a plurality of first electrode patterns with discontinuity-in-series;a second-axis sensing electrode interlaced with the first-axis sensing electrode and comprising a plurality of second electrode patterns with continuity-in-series;an insulating element, continuously formed on the corresponding second-axis sensing electrode; anda conductive bridge, discontinuously configured corresponding to the intersection of the first-axis sensing electrode and the second-axis sensing electrode and crossing the insulating element to connect two first electrode patterns with discontinuity-in-series.2. The touch sensing layer according to claim 1 , wherein the insulating element and the conductive bridge are formed by a printing process.3. The touch sensing layer according to claim 2 , wherein the printing process forming the insulating element being at least one chosen from contact printing process and non-contact printing process.4. The touch sensing layer according to claim 2 , wherein the printing process forming the conductive bridge being at least one chosen from contact printing process and non-contact ...

Touch-on-lens device and method for manufacturing the same

The present disclosure relates to a touch-on-lens (TOL) device and a method for manufacturing the same. The method includes forming a plastic layer and a touch layer; cutting the plastic layer and the touch layer; and filially laminating the plastic layer and the touch layer after cutting to a strengthened lens. The method can not only help keep good mechanical property but can also help improve the efficiency of mass production. Moreover, the present disclosure adopts a photoetching process to form a sensing pattern, thereby making the circuit thinner and beautifying the appearance.

PATTERN OF A CAPACITIVE TOUCH DEVICE AND MANUFACTURING METHOD THEREOF

The present disclosure relates to a touch device, and more particularly to a pattern of a capacitive touch device and a manufacturing method thereof. The pattern of the capacitive touch device comprises of a substrate, two adjacent first axial electrodes, a first axial conductive wire, and a pair of metal jumpers. The first axial conductive wire is disposed between the two adjacent first axial electrodes for connecting the two adjacent first axial electrodes. The pair of metallic metal jumpers is disposed on the connecting points of the two first axial electrodes and the first axial conductive wire. Accordingly, resistance caused by the connecting points of the two adjacent first axial electrodes and the first axial conductive wire can be reduced such that response speed of the pattern of the capacitive touch control device is increased. 1. A capacitive touch device pattern comprising:two adjacent first axial electrodes;a first axial conductive wire set between said two adjacent first axial electrodes; anda pair of metal jumpers electrically connected to connection point of said two adjacent first axial electrodes and said first axial conductive wire.2. The capacitive touch device pattern as claimed in claim 1 , further comprising:two adjacent transparent second axial electrodes disposed separately on two lateral sides of the first axial conductive wire;a second axial conductive wire stretching across the first axial conductive wire and connecting said two adjacent second axial electrodes; andan insulating layer formed between said first axial conductive wire and said second axial conductive wire and covering said first axial conductive wire partially to electrically insulate said first axial conductive wire and said second axial conductive wire.3. The capacitive touch device pattern as claimed in claim 1 , wherein said pair of metal jumpers is made of a metallic wire.4. The capacitive touch device pattern as claimed in claim 1 , wherein said pair of metal jumpers ...

Crystalline silicon ingot and method of fabricating the same

A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.

TOUCH PANEL

The present disclosure provides a touch panel including a plate, a sensing layer, a border, and an optical compensation layer, wherein the plate has an upper surface and a lower surface opposite to the upper surface, wherein the lower surface is planned with a conducting wire region and a sensing region. The border is overlaid on the conducting wire region, and the sensing layer is disposed in the sensing region. An optical compensation layer is disposed on the border, and is located between the plate and the border. The border has a first color, which appears as a second color if a user sees the border through the optical compensation layer, and thus achieves diversification of the border color. 1. A touch panel , comprising:a plate having an upper surface and a lower surface opposite to the upper surface, wherein the lower surface has a conducting wire region and a sensing region;a border overlaid on the conducting wire region; anda sensing layer disposed in the sensing region;wherein an optical compensation layer is disposed on the border, and wherein said optical compensation layer is located between the plate and the border.2. The touch panel of claim 1 , wherein the border has a first color claim 1 , wherein said first color appears as a second color if a user sees the border through the optical compensation layer.3. The touch panel of claim 1 , wherein the optical compensation layer is disposed on the edge of the lower surface of the plate to correspond to position of the border.4. The touch panel of claim 1 , wherein the optical compensation layer is disposed on the entire lower surface of the plate.5. The touch panel of claim 1 , wherein the optical compensation layer comprises of one or more refractive index layers.6. The touch panel of claim 5 , wherein the optical compensation layer includes a first refractive index layer and a second refractive index layer claim 5 , and wherein refractive index of the first refractive index layer is less than that of ...

MANUFACTURING METHOD OF SILICON CARBIDE WAFER AND SEMICONDUCTOR STRUCTURE

A manufacturing method of a silicon carbide wafer includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A nitrogen content in the reactor is reduced, which includes the following. An argon gas is passed into the reactor, where a flow rate of passing the argon gas into the reactor is 1,000 sccm to 5,000 sccm, and a time of passing the argon gas into the reactor is 2 hours to 48 hours. The reactor and the raw material are heated to form a silicon carbide material on the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. The silicon carbide ingot is cut to obtain a plurality of silicon carbide wafers. A semiconductor structure is also provided. 1. A manufacturing method of a silicon carbide wafer , comprising:providing a raw material containing carbon and silicon and a seed located above the raw material in a reactor; 'passing an argon gas into the reactor, wherein a flow rate of passing the argon gas into the reactor is 1,000 sccm to 5,000 sccm, and a time of passing the argon gas into the reactor is 2 hours to 48 hours;', 'reducing a nitrogen content in the reactor, comprisingheating the reactor and the raw material to form a silicon carbide material on the seed;cooling the reactor and the raw material to obtain a silicon carbide ingot; andcutting the silicon carbide ingot to obtain a plurality of silicon carbide wafers.2. The manufacturing method as described in claim 1 , wherein reducing the nitrogen content in the reactor comprises: before passing the argon gas into the reactor claim 1 , performing a first vacuum process on the reactor claim 1 , such that an air pressure in the reactor is 0.1 torr to 100 torr.3. The manufacturing method as described in claim 1 , wherein a resistivity of the silicon carbide ingot is 0.1 ohm/cm to 10 ohms/cm claim 1 , and a resistivity of each of the silicon carbide wafers is 0.1 ohm/cm to 10 ohms/cm.4. The ...

SILICON CARBIDE WAFER AND METHOD OF FABRICATING THE SAME

A silicon carbide wafer and a method of fabricating the same are provided. In the silicon carbide wafer, a ratio (V:N) of a vanadium concentration to a nitrogen concentration is in a range of 2:1 to 10:1, and a portion of the silicon carbide wafer having a resistivity greater than 10Ω·cm accounts for more than 85% of an entire wafer area of the silicon carbide wafer. 1. A silicon carbide wafer , wherein in the silicon carbide wafer , a ratio (V:N) of a vanadium concentration to a nitrogen concentration is in a range of 2:1 to 10:1 , and a portion of the silicon carbide wafer having a resistivity greater than 10Ω·cm accounts for more than 85% of an entire wafer area of the silicon carbide wafer.2. The silicon carbide wafer according to claim 1 , wherein in the silicon carbide wafer claim 1 , the nitrogen concentration is within a range of 10atom/cmto 9.9*10atom/cm claim 1 , and the vanadium concentration is within a range of 10atom/cmto 9*10atom/cm.3. The silicon carbide wafer according to claim 2 , wherein in the silicon carbide wafer claim 2 , the nitrogen concentration is within a range of 10atom/cmto 5*10atom/cm claim 2 , and the vanadium concentration is within a range of 10atom/cmto 3.5*10atom/cm.4. The silicon carbide wafer according to claim 2 , wherein in the silicon carbide wafer claim 2 , the nitrogen concentration is within a range of 5*10atom/cmto 7*10atom/cm claim 2 , and the vanadium concentration is within a range of 3.5*10atom/cmto 5*10atom/cm.5. The silicon carbide wafer according to claim 1 , wherein the ratio (V:N) of the vanadium concentration to the nitrogen concentration is in a range of 4.5:1 to 10:1 claim 1 , and the portion of the silicon carbide wafer having a resistivity greater than 10Ω·cm accounts for more than 90% of the entire wafer area of the silicon carbide wafer.6. The silicon carbide wafer according to claim 1 , wherein the ratio (V:N) of the vanadium concentration to the nitrogen concentration is in a range of 7:1 to 10:1 claim 1 ...

MANUFACTURING METHOD OF SILICON CARBIDE INGOT

A manufacturing method of a silicon carbide ingot includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A first surface of the seed faces the raw material. The reactor and the raw material are heated, where part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material. The growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. A diameter of the silicon carbide ingot is greater than a diameter of the seed. 1. A manufacturing method of a silicon carbide ingot , comprising:providing a raw material containing carbon and silicon and a seed located above the raw material in a reactor, wherein a first surface of the seed faces the raw material;heating the reactor and the raw material, wherein part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material, wherein the growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed; andcooling the reactor and the raw material to obtain the growing body that has completed growth, wherein the growing body that has completed growth is a silicon carbide ingot, and a diameter of the silicon carbide ingot is greater than a diameter of the seed.2. The manufacturing method as described in claim 1 , wherein the diameter of the seed is D1 claim 1 , the diameter of the silicon carbide ingot is D2 claim 1 , and D1:D2 is 1:8 to 7.5:83. The manufacturing ...

SILICON CARBIDE WAFER AND METHOD OF FABRICATING THE SAME

A silicon carbide wafer is provided, wherein within a range area of 5 mm from an edge of the silicon carbide wafer, there are no low angle grain boundaries formed by clustering of basal plane dislocation defects, and the silicon carbide wafer has a bowing of less than 15 μm. 1. A silicon carbide wafer , wherein within a range area of 5 mm from an edge of the silicon carbide wafer , there are no low angle grain boundaries formed by clustering of basal plane dislocation defects , and the silicon carbide wafer has a bowing of less than 15 μm.2. The silicon carbide wafer as claimed in claim 1 , wherein the silicon carbide wafer has a warping of less than 30 μm.3. The silicon carbide wafer as claimed in claim 1 , wherein within a range area of 10 mm from the edge of the silicon carbide wafer claim 1 , the low angle grain boundaries formed by the clustering of the basal plane dislocation defects are less than 7% of the range area.4. The silicon carbide wafer as claimed in claim 3 , wherein within the range area of 10 mm from the edge of the silicon carbide wafer claim 3 , there are no low angle grain boundaries formed by the clustering of the basal plane dislocation defects.5. The silicon carbide wafer as claimed in claim 1 , wherein within a range area of 15 mm from the edge of the silicon carbide wafer claim 1 , the low angle grain boundaries formed by the clustering of the basal plane dislocation defects are less than 10% of the range area.6. The silicon carbide wafer as claimed in claim 5 , wherein within the range area of 15 mm from the edge of the silicon carbide wafer claim 5 , there are no low angle grain boundaries formed by the clustering of the basal plane dislocation defects.7. The silicon carbide wafer as claimed in claim 1 , wherein within a range area of 20 mm from the edge of the silicon carbide wafer claim 1 , the low angle grain boundaries formed by the clustering of the basal plane dislocation defects are less than 30% of the range area.8. The silicon ...

SILICON CARBIDE CRYSTAL

A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer. 1. A silicon carbide crystal , comprising a seed layer , a bulk layer , and a stress buffering structure formed between the seed layer and the bulk layer , wherein the seed layer , the bulk layer , and the stress buffering structure are each formed with a dopant , and the dopant of the stress buffering structure cycles between high and low dopant concentrations;characterized in that the stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers, wherein the buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.2. The silicon carbide crystal of claim 1 , wherein each of the buffer layers has a thickness that is greater than 0 μm and less than 0.1 μm.3. The silicon carbide crystal of claim 2 , wherein the stress buffering structure has a thickness that is less than 0.1 mm.4. The silicon carbide crystal of claim 1 , wherein each of the buffer layers has a dopant concentration gradient in its thickness direction.5. The silicon carbide crystal of claim 4 , wherein the dopant of the seed layer has a reference concentration claim 4 , and the ...

WAFER CLEANING

One or more techniques or systems for cleaning wafers during semiconductor fabrication or an associated brush are provided herein. In some embodiments, the brush includes a brush body and one or more inner hole supports within the brush body. For example, a first inner hole support and a second inner hole support define a first inner hole associated with a first size. For another example, a third inner hole support and a fourth inner hole support define a second inner hole associated with a second size different than the first size. In some embodiments, a cleaning solution is applied to a wafer based on a first flow rate at a first brush position and based on a second flow rate at a second brush position. In this manner, a flow field associated with wafer cleaning is provided, thus enhancing cleaning efficiency, for example. 1. A brush for cleaning wafers during semiconductor fabrication , comprising:a brush body; and a first inner hole support and a second inner hole support defining a first inner hole associated with a first size; and', 'a third inner hole support and a fourth inner hole support defining a second inner hole associated with a second size different than the first size., 'one or more inner hole supports within the brush body2. The brush of claim 1 , the brush body comprising a brush bar.3. The brush of claim 1 , at least one of the first inner hole support or the second inner hole support closer to a first edge of the brush body than at least one of the third inner hole support or the fourth inner hole support is to the first edge of the brush body.4. The brush of claim 1 , the second size greater than the first size.5. The brush of claim 1 , comprising a fifth inner hole support and a sixth inner hole support defining a third inner hole associated with a third size.6. The brush of :the first inner hole support closer to a first edge of the brush body than the second inner hole support;the second inner hole support closer to a first edge of the brush ...

TOUCH PANEL AND MANUFACTURING METHOD THEREOF

A touch panel is formed by firstly forming a film layer on a first plate, and next, sequentially forming a buffer layer on the film layer, forming a sensing layer on the buffer layer, forming a second plate on the sensing layer. After the foregoing formation procedures, the first substrate layer is removed from the film layer. Next, a cover is attached to the film layer. In this way, the film layer is located between the cover and the buffer layer. Finally, the second substrate layer is removed from the sensing layer, so as to form a touch panel with the features of light weight, thin thickness and low costs. 1. A method for manufacturing a touch panel comprisingproviding a first plate;forming a film layer on said first plate;forming a buffer layer on said film layer, so said film layer being between said first plate and said buffer layer; said buffer layer comprising an inorganic material and an organic material;forming a sensing layer on said buffer layer; so said buffer layer being between said film layer and said sensing layer;forming a second plate on said sensing layer; so said sensing layer being between said buffer layer and said second plates;removing said first plate from said film layer;attaching a cover on said film layer by a binding layer, said binding layer being between said cover and said film layer; andremoving said second plate.2. The method for manufacturing a touch panel as set forth in claim 1 , further comprisingadding a first adhering layer on said first plate, so said first adhering layer being between said first plate and said film layer; andattaching said film layer to said first plate via a first adhering layer.3. The method for manufacturing claim 1 , a touch panel as set forth in claim 1 , further comprisingattaching said second plate to said sensing layer via a second adhering layer.4. The method for manufacturing a touch panel as set forth in claim 1 , further comprisingforming a protection layer on said sensing layer, so said sensing ...

TOUCH PANEL AND MANUFACTURING METHOD THEREOF

A touch panel is formed by firstly forming a film layer on a first plate, and next, sequentially forming a buffer layer on the film layer, forming a sensing layer on the buffer layer, forming a second plate on the sensing layer. After the foregoing formation procedures, the first plate is removed from the film layer. Next, a cover is attached to the film layer. In this way, the film layer is located between the cover and the buffer layer. Finally, the second plate is removed from the sensing layer, so as to form a touch panel with the features of light weight, thin thickness and low costs. 1. A touch panel , comprisinga cover;a binding layer;a film layer;a buffer layer;a sensing layer;said binding layer being between said cover and said film layer;said film layer being between said binding layer and said buffer layer;said buffer layer being between said film layer and said sensing layer; andsaid buffer layer comprising an inorganic material and an organic material.2. The touch panel as set forth in claim 1 , comprisingsaid film layer being formed with polyimide (PI).3. The touch panel as set forth in claim 1 , comprisingsaid film layer being formed with a material selected from the group consisting of polypropylene (PP), polystyrene (PS), acrylonitrile-butadiene-styrene (ABS), polyethylene terephthalate (PET), polyvinyl chloride (PVC), polycarbonate (PC), polyethylene (PE), polymethyl methacrylate (PMMA), polytetrafluoro ethylene (PTFE), cyclic olefin copolymer (COP) or a combination thereof.4. The touch panel as set forth in claim 1 , comprisingsaid film layer having, a thickness of 0.1 μm to 15 μm.5. The touch panel as set forth in claim 1 , comprisingsaid film layer having a thickness of 2 μm to 5 μm.6. The touch panel as set forth in claim 1 , comprisingsaid inorganic material comprising titanium oxide and silicon oxide.7. The touch panel as set forth in claim 1 , comprisingsaid inorganic material comprising zirconium oxide.8. The touch panel as set forth in ...

Silicon carbide crystal and method for manufacturing the same

A silicon carbide crystal and a method for manufacturing the same are disclosed. The silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low concentration. Therefore, the crystal defects can be significantly reduced.

MANUFACTURING METHOD FOR SILICON CARBIDE CRYSTAL

A silicon carbide crystal and a manufacturing method for same are provided. A silicon carbide crystal seed used for the silicon carbide crystal has a crystal-growing surface with a surface roughness (Ra) less than 2.0 nm, and a thickness of the silicon carbide crystal seed is less than 700 μm. Therefore, the silicon carbide crystal grown from the silicon carbide crystal seed by sublimation method (which is also a PVT method) may have low basal plane dislocation (BPD) and low micropipe density (MPD). 1. A silicon carbide crystal seed , for growing silicon carbide crystal , wherein the silicon carbide crystal seed is featured in that:a crystal-growing surface of the silicon carbide crystal seed has a surface roughness (Ra) less than 2.0 nm; anda thickness of the silicon carbide crystal seed is less than 700 μm.2. The silicon carbide crystal seed as recited in claim 1 , wherein the crystal-growing surface of the silicon carbide crystal seed has a surface roughness (Ra) less than 0.5 nm.3. The silicon carbide crystal seed as recited in claim 1 , wherein the crystal-growing surface of the silicon carbide crystal seed has a surface roughness (Ra) less than 0.3 nm.4. The silicon carbide crystal seed as recited in claim 1 , wherein the silicon carbide crystal seed has a total thickness variation (TTV) less than 2 μm.5. The silicon carbide crystal seed as recited in claim 1 , wherein the silicon carbide crystal seed has a warpage less than 30 μm.6. The silicon carbide crystal seed as recited in claim 1 , wherein the silicon carbide crystal seed has a bow less than 20 μm.7. A silicon carbide crystal claim 1 , which is grown from the silicon carbide crystal seed as recited in by a sublimation method claim 1 , which is featured in that the silicon carbide crystal has basal plane dislocation (BPD) of 2200/cmor less.8. The silicon carbide crystal as recited in claim 7 , wherein the silicon carbide crystal has a micropipe density (MPD) of 22/cmor less.9. The silicon carbide ...

Touch device and manufacturing method thereof

A touch device includes a cover plate, a carrying structure, a first sensor layer, a dielectric layer and a second sensor layer. The carrying structure is disposed on the cover plate and includes a film layer and a buffer layer stacked on each other. The film is located between the cover plate and the buffer layer. The first sensor layer is at least disposed on the carrying structure. The first sensor layer and the cover plate are respectively located at two opposite sides of the carrying structure. The dielectric layer is disposed on the first sensor layer. The dielectric layer and the carrying structure are respectively located at two opposite sides of the first sensor layer. The second sensor layer is at least disposed on the dielectric layer. The second sensor layer and the first sensor layer are respectively located at two opposite sides of the dielectric layer.

SILICON CARBIDE WAFER AND METHOD FOR PRODUCTION THEREOF

A method for producing a silicon carbide wafer includes: providing a silicon carbide wafer having an unpolished surface; in which the unpolished surface has a first crystal face and a second crystal face; polishing one face of the first crystal face and the second crystal face of the unpolished surface in a first polishing solution by using a polisher; in which the polisher includes a polishing pad and a plurality of abrasive particles fixed on the polishing pad; and polishing the other face of the first crystal face and the second crystal face of the unpolished surface in a second polishing solution by using the polisher; in which a pH value of the first polishing solution is less than or equal to 7, and a pH value of the second polishing solution is greater than or equal to 7. The present disclosure also provides a silicon carbide wafer. 1. A method for producing a silicon carbide wafer , comprising:providing a silicon carbide wafer having an unpolished surface; wherein the unpolished surface has a first crystal face and a second crystal face; wherein the first crystal face is a carbon face and the second crystal face is a silicon face;polishing the first crystal face of the unpolished surface in a first polishing solution by using a polisher; wherein the polisher includes a polishing pad and a plurality of abrasive particles fixed on the polishing pad; andpolishing the second crystal face of the unpolished surface in a second polishing solution by using the polisher after polising the first crystal face; wherein a pH value of the first polishing solution is less than or equal to 7, and a pH value of the second polishing solution is greater than or equal to 7.2. The method for producing the silicon carbide wafer according to claim 1 , wherein the pH value of the first polishing solution is less than or equal to 2 claim 1 , and the pH value of the second polishing solution is greater than or equal to 8.3. The method for producing the silicon carbide wafer according ...

Touch panel and methods for forming the same

A touch panel is disclosed. The touch panel includes a cover plate having a viewing region and a border region surrounding the viewing region. At least one bonding region is defined in the border region. A shielding layer is disposed on the cover plate corresponding to the border region. An adhesive pattern layer is disposed on the shielding layer and at least in the bonding region. A sensing electrode layer is disposed on the cover plate and extends from the viewing region to the shielding layer corresponding to the border region. A signal trace layer including a plurality of traces is disposed on the shielding layer corresponding to the border region. Each trace has one end electrically connected to the sensing electrode layer and another end assembled onto the adhesive pattern layer corresponding to the bonding region. A method for forming a touch panel is also disclosed.

TOUCH PANEL AND MANUFACTURING METHOD THEREOF

A touch panel is formed by firstly forming a film layer on a first plate, and next, sequentially forming a buffer layer on the film layer, forming a sensing layer on the buffer layer, forming a second plate on the sensing layer. After the foregoing formation procedures, the first plate is removed from the film layer. Next, a cover is attached to the film layer. In this way, the film layer is located between the cover and the buffer layer. Finally, the second plate is removed from the sensing layer, so as to form a touch panel with the features of light weight, thin thickness and low costs. 1. A touch panel , comprisinga cover;a binding layer;a film layer;a buffer layer;a sensing layer;said binding layer being between said cover and said film layer;said film layer being between said binding layer and said buffer layer;said buffer layer being between said film layer and said sensing layer; andsaid buffer layer comprising an inorganic material and an organic material.2. The touch panel as set forth in claim 1 , comprisingsaid film layer being formed with polyimide (PI).3. The touch panel as set forth in claim 1 , comprisingsaid film layer being formed with a material selected from the group consisting of polypropylene (PP), polystyrene (PS), acrylonitrile-butadiene-styrene (ABS), polyethylene terephthalate (PET), polyvinyl chloride (PVC), polycarbonate (PC), polyethylene (PE), polymethyl methacrylate (PMMA), polytetrafluoro ethylene (PTFE), cyclic olefin copolymer (COP) or a combination thereof.4. The touch panel as set forth in claim 1 , comprisingsaid film layer having a thickness of 0.1 μm to 15 μm.5. The touch panel as set forth in claim 1 , comprisingsaid film layer having a thickness of 2 μm to 5 μm.6. The touch panel as set forth in claim 1 , comprisingsaid inorganic material comprising titanium oxide and silicon oxide.7. The touch panel as set forth in claim 1 , comprisingsaid inorganic material comprising zirconium oxide.8. The touch panel as set forth in ...

CRYSTALLINE SILICON INGOT AND METHOD OF FABRICATING THE SAME

A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm. 112. A crystalline silicon ingot having a bottom and a vertical direction , comprising multiple silicon crystal grains growing along said vertical direction , wherein said bottom has a silicon crystal grain with a first average crystal grain size of less than about mm fabricated by the process comprising:forming a silicon melt in a crucible, the crucible having multiple protrusions on a bottom inner surface;controlling at least one thermal control parameter of said silicon melt such that multiple silicon crystal grains in said silicon melt nucleate on the bottom inner surface of the crucible and grow along a vertical direction; andcontrolling said at least one thermal control parameter continually until entirety of said silicon melt solidifies to become the crystalline silicon ingot,wherein said crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm, andwherein the multiple protrusions have a roughness ranging from 300 micrometers to 1000 micrometers such that the bottom inner surface of the crucible provides multiple nucleation sites for silicon crystal grains.2. The crystalline silicon ingot of claim 1 , wherein an upper portion of the crystalline silicon ingot claim 1 , which is about 250 mm away from a bottom portion of the crystalline silicon ingot claim 1 , has a silicon crystal grain size of greater than about 14 mm.3. ...

CAPACITIVE TOUCH PANEL AND A METHOD OF REDUCING THE VISIBILITY OF METAL CONDUCTORS IN CAPACITIVE TOUCH PANEL

The present invention discloses a capacitive touch panel, comprises a substantially transparent substrate and a transparent sensing pattern. The transparent sensing pattern, which detects touch signals, is formed on the substantially transparent substrate. The transparent sensing pattern comprises a plurality of conductor cells and at least one metal conductor disposed on the substantially transparent substrate. The at least one metal conductor connects two adjacent conductor cells. At least one low-reflection layer is formed on the at least one metal conductor. The low-reflection layer can reduce the reflected light therefore reducing the visibility of the metal conductors. 1. A method of reducing the visibility of metal conductors in a capacitive touch panel , comprising:providing a substantially transparent substrate;providing a plurality of first conductor cells arranged in a first direction, a plurality of second conductor cells arranged in a second direction and a plurality of first electrical conductors disposed on the substantially transparent substrate, wherein each of the first electrical conductors connects adjacent first conductor cells of the plurality of first conductor cells;providing a plurality of insulators, wherein each of the insulators is disposed on a corresponding first electrical conductor of the plurality of first electrical conductors;providing a plurality of second electrical conductors, wherein each of the second electrical conductors is disposed on a corresponding insulator of the plurality of insulators, and each of the second electrical conductors connects adjacent second conductor cells of the plurality of second conductor cells; andproviding a low-reflection strip on each of the plurality of second electrical conductors.2. The method according to claim 1 , wherein the low-reflection strip is made of oxide material or nitride material.3. The method according to claim 2 , wherein the oxide material comprises chromium oxide claim 2 , ...

Silicone carbide crystals and manufacturing method thereof

A silicon carbide crystal and a manufacturing method thereof are provided. The silicon carbide crystal includes an N-type seed layer, a barrier layer, and a semi-insulating ingot, which are sequentially stacked and are made of silicon carbide. The N-type seed layer has a resistivity within a range of 0.01-0.03 Ω·cm. The barrier layer includes a plurality of epitaxial layers sequentially formed on the N-type seed layer by an epitaxial process. The C/Si ratios of the epitaxial layers gradually increase in a growth direction away from the N-type seed layer. A nitrogen concentration of the silicon carbide crystal gradually decreases from the N-type seed layer toward the semi-insulating ingot by a diffusion phenomenon, so that the semi-insulating crystal has a resistivity larger than 107 Ω·cm.

Touch sensor, touch panel and method for manufacturing the same

A manufacturing method of touch sensors is provided. A flexible touch sensing component can be formed on a first substrate by a release layer. Next, the flexible touch sensing component is transferred to a second substrate after a releasing step. Furthermore, by the support of the second substrate, the flexible touch sensing component can be processed and then adhered a desired cover. After releasing the second substrate from the flexible touch sensing component, the touch sensor is formed.

TOUCH SENSOR, TOUCH PANEL AND METHOD FOR MANUFACTURING THE SAME

A flexible touch-sensing component is formed on a release film by support provided from a first carrier substrate and a second carrier substrate. Then, the flexible touch-sensing component can be attached onto non-planar and curved cover plates through the reloading of a third carrier substrate, so that the touch panel can be lighter and thinner, and have a lower processing cost. In addition, the flexible touch-sensing component uses a film sensor that includes a metal nanowire conductive layer. Since the silver nanowire has flexibility, the touch sensor and the touch panel in the present disclosure can be used in flexible touch-sensing devices and curved-surface touch-sensing devices. Furthermore, based on application of an adhesive reactive ink, the released touch panel can be directly attached to target carrier substrate without adding an auxiliary layer of optical glue or hydrogel glue. 1. A method for manufacturing a touch panel , comprising:S1: providing a first touch-sensing submodule, S1 comprising:S1-1: forming a first release film on a first carrier substrate;S1-2: forming a first flexible touch-sensing component on the first release film;S2: providing a second touch-sensing submodule, S2 comprising:S2-1: forming a second release film on a second carrier substrate;S2-2: forming a second flexible touch-sensing component on the second release film;S3: forming a third carrier substrate on the second touch-sensing submodule, and the second touch-sensing submodule and the third carrier substrate have a third release film therebetween;S4: releasing the second release film to remove the second carrier substrate from the second touch-sensing submodule;S5: utilizing a first bonding layer to attach the first touch-sensing submodule to the second touch-sensing submodule;S6: releasing the first release film to remove the first carrier substrate from the first touch-sensing submodule;S7: applying a second bonding layer to attach a flexible cover plate having a ...

Touch device

A touch device includes a cover plate, a carrying structure, a first sensor layer, a dielectric layer and a second sensor layer. The carrying structure is disposed on the cover plate and includes a film layer and a buffer layer stacked on each other. The film is located between the cover plate and the buffer layer. The first sensor layer is at least disposed on the carrying structure. The first sensor layer and the cover plate are respectively located at two opposite sides of the carrying structure. The dielectric layer is disposed on the first sensor layer. The dielectric layer and the carrying structure are respectively located at two opposite sides of the first sensor layer. The second sensor layer is at least disposed on the dielectric layer. The second sensor layer and the first sensor layer are respectively located at two opposite sides of the dielectric layer.

碳化矽晶片

一種碳化矽晶片包括位於相反側的兩個表面，並且兩個表面的至少其中一個表面為拋光面且包括：基準面及微結構模組。基準面未形成有長度大於5微米的刮痕。微結構模組形成於基準面，微結構模組包含凹設於基準面的多個微凹陷以及突出於基準面的多個微凸起，並且微結構模組的三維算數平均偏差(Sa)小於2.5奈米，而微結構模組的三維輪廓高低差(Sz)小於20奈米。

Touch sensing layer and manufacturing method thereof

The present invention relates to a touch sensing layer which comprises at least one first-axis sensing electrode, second-axis sensing electrode, insulating element and conductive bridge. Each first-axis sensing electrode comprises a plurality of first electrode patterns with discontinuity-in-series, and each second-axis sensing electrode is configured to interlace with each first-axis sensing electrode and comprises a plurality of second electrode patterns with continuity-in-series. Each insulating element is continuously formed on the corresponding second-axis sensing electrode, and each conductive bridge is also continuously formed above the corresponding first-axis sensing electrode and crosses the insulating element to connect those first electrode patterns with discontinuity-in-series.

Touch-on-lens device and method for manufacturing the same

The present disclosure relates to a touch-on-lens (TOL) device and a method for manufacturing the same. The method includes forming a plastic layer and a touch layer; cutting the plastic layer and the touch layer; and finally laminating the plastic layer and the touch layer after cutting to a strengthened lens. The method can not only help keep good mechanical property but can also help improve the efficiency of mass production. Moreover, the present disclosure adopts a photoetching process to form a sensing pattern, thereby making the circuit thinner and beautifying the appearance.

Touch sensing device and manufacturing method thereof

One-glass-solution touch panel and method of manufacturing the same

本發明提供一種單片玻璃觸控板，包括：一蓋板及一承載層，該承載層上形成有：一圖案化的導電層，包含一感測電極；複數信號導線，電性連接於感測電極，且信號導線匯聚於至少一接合區，且此至少一接合區位於感測電極至少一外側邊，其中此至少一接合區的承載層厚度大於非接合區的承載層厚度；以及一接合膠，設置於蓋板與承載層之間，用以接合蓋板與承載層。本發明另提供一種單片玻璃觸控板的製作方法。

Touch-on-lens device and method for manufacturing the same

The present disclosure relates to a touch-on-lens (TOL) device and a method for manufacturing the same. The method includes forming a plastic layer and a touch layer; cutting the plastic layer and the touch layer; and finally laminating the plastic layer and the touch layer after cutting to a strengthened lens. The method can not only help keep good mechanical property but can also help improve the efficiency of mass production. Moreover, the present disclosure adopts a photoetching process to form a sensing pattern, thereby making the circuit thinner and beautifying the appearance.

Touch-on-lens device

One-glass-solution touch panel

Touch panel and methods for forming the same

本發明揭露一種觸控面板，包括一蓋板，具有一可視區及圍繞可視區的一邊框區，邊框區內界定有至少一接合區。一遮蔽層設置於蓋板上，且位於邊框區內。一附著圖案層設置於遮蔽層上，且至少位於接合區內。一感測電極層設置於蓋板上，且自可視區延伸至邊框區的遮蔽層上。一信號引線層設置於遮蔽層上，且位於邊框區內，信號引線層包含複數引線，且每一引線的一端電性連接於感測電極層，另一端匯聚至接合區的附著圖案層上。本發明另提供一種觸控面板的製程方法。採用本發明的觸控面板，可改善引線從遮蔽層上脫落，進而可提高觸控面板的良率。

結晶成長炉システム

【課題】結晶の厚さを増やし、品質を改善することのできる結晶成長炉システムを提供する。【解決手段】結晶成長炉システム１００は、外部加熱モジュール１１０、炉１２０、第１駆動装置１３０、第２駆動装置１４０、および制御装置１５０を含む。炉は、外部加熱モジュール内に移動可能に配置される。第１駆動装置は、軸Ａ１に沿って移動するように炉を駆動する。第２駆動装置は、軸を中心に回転するように炉を駆動する。制御装置は、第１駆動装置、第２駆動装置、および外部加熱モジュールに電気接続される。【選択図】図１

結晶成長方法およびウェハ

【課題】結晶の厚さやサイズを増やし、品質を向上させることのできる結晶成長方法を提供する。【解決手段】結晶成長方法は、結晶成長炉内に種結晶３０を提供し、複数の時間点の後に第１方向に沿って種結晶上に結晶を形成することを含む。この結晶は、第１方向に沿って積層された複数のサブ結晶２１０ａ～２１０ｌを含み、各時間点においてサブ結晶のうちの対応する１つが形成され、サブ結晶は、種結晶から離れた複数の端面２２０ａ～２２０ｌを含み、端面のうちの任意の２つの最大温度の差値は、２０度以下である。また、ウェハも提供される。【選択図】図２

Silicon carbide seed crystal and method of manufacturing the same, and method of manufacturing silicon carbide ingot

A silicon carbide seed crystal and method of manufacturing the same, and method of manufacturing silicon carbide ingot are provided. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface BPD1 and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1):D=(BPD1−BPD2)/BPD1≤25%  (1).

Method of manufacturing silicon carbide seed crystal and method of manufacturing silicon carbide ingot

A method of manufacturing silicon carbide seed crystal and method of manufacturing silicon carbide ingot are provided. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD 1 of the silicon surface BPD 1 and a basal plane dislocation density BPD 2 of the carbon surface satisfies the following formula ( 1 ): D =( BPD 1− BPD 2)/ BPD 1≤25%  (1).

Manufacturing method of silicon carbide ingot

A manufacturing method of a silicon carbide ingot includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A first surface of the seed faces the raw material. The reactor and the raw material are heated, where part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material. The growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. A diameter of the silicon carbide ingot is greater than a diameter of the seed.

Method of manufacturing silicon carbide ingot

The disclosure provides a silicon carbide seed crystal and a method of manufacturing a silicon carbide ingot. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1), a local thickness variation (LTV) of the silicon carbide seed crystal is 2.5 μm or less, and a stacking fault (SF) density of the silicon carbide seed crystal is 10 EA/cm2 or less:D=(BPD1−BPD2)/BPD1≤25%  (1).

具有寬帶光散射功能的基板及其製造方法

Method of growing silicon carbide crystals

A method of growing the silicon carbide crystal includes the following steps. A raw material containing a carbon element and a silicon element, and a seed crystal located above the raw material are provided in a reactor. A growth process of the silicon carbide crystal is performed, wherein the growth process includes heating the reactor and the raw material to form silicon carbide crystal on the seed crystal. In the growth process, a ratio difference (ΔTz/ΔTx) between an axial temperature gradient (ΔTz) and a radial temperature gradient (ΔTx) of the silicon carbide crystal is adjusted so that the ratio difference is controlled in the range of 0.5 to 3 to form the silicon carbide crystal. The silicon carbide crystal formed by the above growth method can have a uniform resistivity distribution and excellent geometric performance.

Silicon carbide crystals and silicon carbide wafer

A silicon carbide crystal and a silicon carbide wafer, wherein a monocrystalline proportion of the silicon carbide crystal and the silicon carbide wafer is 100%, the resistivity thereof is in a range of 15 mΩ·cm to 20 mΩ·cm, and a deviation of an uniformity of the resistivity thereof is less than 0.4%.

Crystal growing method for crystals

A crystal growing method for crystals include the following steps. A first crystal seed is provided, the first crystal seed has a first monocrystalline proportion and a first size. N times of crystal growth processes are performed on the first crystal seed, wherein each of the crystal growth process will increase the monocrystalline proportion, and the N times of crystal growth processes are performed until a second crystal having a monocrystalline proportion of 100% is reached, and wherein the N times includes more than 3 times of crystal growth processes. Each crystal growth process includes adjusting a ratio difference (ΔTz/ΔTx) between an axial temperature gradient (ΔTz) and a radial temperature gradient (ΔTx) of the crystal, so as to control the ratio difference within a range of 0.5 to 3 for forming the second crystal.

炭化ケイ素結晶および炭化ケイ素ウェハ

【目的】均一な抵抗率を有する炭化ケイ素結晶および炭化ケイ素ウェハを提供する。【解決手段】炭化ケイ素結晶および炭化ケイ素ウェハの単結晶比率は、１００％であり、その抵抗率は、１５ｍΩ・ｃｍ～２０ｍΩ・ｃｍの範囲内であり、その抵抗率の均一性の偏差は、０.４％未満である。【選択図】図２

結晶の結晶成長方法

【課題】高い単結晶比率および大きなサイズを有する結晶の形成時間を大幅に短縮することのできる結晶の結晶成長方法を提供する。【解決手段】結晶の成長方法は、以下のステップを含む。第１種結晶を提供し、第１種結晶は、第１単結晶比率および第１サイズを有する。第１種結晶に対してＮ回の結晶成長プロセスを実行し、各結晶成長プロセスは、単結晶比率を増やし、かつ１００％の単結晶比率を有する第２結晶が達成されるまでＮ回の結晶成長プロセスを実行し、Ｎ回は、３回より多い結晶成長プロセスを含む。各結晶成長プロセスは、結晶の軸時方向温度勾配（ΔＴｚ）と径方向温度勾配（ΔＴｘ）の間の比差（ΔＴｚ／ΔＴｘ）を調整することにより、その比差を０．５～３の範囲に制御して、第２結晶を形成することを含む。【選択図】図４

Silicon carbide seed crystal and method of manufacturing silicon carbide ingot

The disclosure provides a silicon carbide seed crystal and a method of manufacturing a silicon carbide ingot. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1), a local thickness variation (LTV) of the silicon carbide seed crystal is 2.5 μm or less, and a stacking fault (SF) density of the silicon carbide seed crystal is 10 EA/cm 2 or less: D =(BPD1−BPD2)/BPD1≤25%  (1).

Crystal growth method and wafer

A crystal growth method, including providing a seed crystal in a crystal growth furnace, and forming a crystal on the seed crystal along a first direction after multiple time points, is provided. The crystal includes multiple sub-crystals stacked along the first direction, a corresponding one of the sub-crystals is formed at each of the time points, and the sub-crystals include multiple end surfaces away from the seed crystal, so that a difference value of maximum temperatures of any two of the end surfaces is less than or equal to 20 degrees. A wafer is also provided.

Manufacturing method of silicon carbide wafer and semiconductor structure

A manufacturing method of a silicon carbide wafer includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A nitrogen content in the reactor is reduced, which includes the following. An argon gas is passed into the reactor, where a flow rate of passing the argon gas into the reactor is 1,000 sccm to 5,000 sccm, and a time of passing the argon gas into the reactor is 2 hours to 48 hours. The reactor and the raw material are heated to form a silicon carbide material on the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. The silicon carbide ingot is cut to obtain a plurality of silicon carbide wafers. A semiconductor structure is also provided.

觸控面板

Silicon carbide wafer and method of fabricating the same

A silicon carbide wafer is provided, wherein within a range area of 5 mm from an edge of the silicon carbide wafer, there are no low angle grain boundaries formed by clustering of basal plane dislocation defects, and the silicon carbide wafer has a bowing of less than 15 μm.

Drilling and tapping machine or similar article

Isolation lighting equipment with positioning function

Crystal ingot cutting device and crystal ingot cutting method

A crystal ingot cutting device and a crystal ingot cutting method are provided. The crystal ingot cutting device includes a driving unit, at least one cutting wire and a plurality of abrasive particles. The cutting wire is connected to the driving unit, wherein the driving unit drives a crystal ingot to move to the cutting wire and drives the cutting wire to reciprocate. A moving speed of the crystal ingot is 10˜700 μm/min, and a reciprocating speed of the cutting wire is 1800˜5000 m/min. The plurality of abrasive particles are arranged on the cutting wire, and a particle size of each abrasive particle is 5˜50 μm.

觸控裝置圖形及其製造方法

本發明提供一種觸控裝置圖形，觸控裝置圖形包括兩相鄰的第一軸向電極、第一軸向導線與一對跨線。第一軸向導線，形成於兩相鄰的第一軸向電極之間，以連接兩相鄰的第一軸向電極。此對跨線，電性連接於兩相鄰的第一軸向電極與第一軸向導線連接處。據此，兩相鄰的第一軸向電極與第一軸向導線連接所造成的電阻值可被降低，使得觸控裝置圖形的反應速度可以提升。

Touchscreen

觸控面板

本發明提供一種觸控面板，包含一板材, 一感應層, 一邊框以及一光學補償層。板材具有一上表面以及與上表面相反、且相對於使用者的一下表面；該下表面規劃有一導線區與一感應區；邊框覆蓋該導線區；感應層設置於該感應區內，該邊框上設有一光學補償層，該光學補償層位於該板材與該邊框之間。其中，邊框具有第一顏色，透過光學補償層，使用者看邊框為第二顏色。

De-magnetizing device for the magnetic base of portable magnetic-type drilling and tapping machine

Substrate with broadband light scattering and method of fabricating the same

Silicon carbide crystal

A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

Crystal growth furnace system

A crystal growth furnace system, including an external heating module, a furnace, a first driven device, a second driven device, and a control device, is provided. The furnace is movably disposed in the external heating module. The first driven device drives the furnace to move along an axis. The second driven device drives the furnace to rotate around the axis. The control device is electrically connected to the first driven device, the second driven device, and the external heating module.

Method of fabricating silicon carbide material

A method of fabricating a silicon carbide material is provided. The method includes the following steps. A first annealing process is performed on a wafer or on an ingot that forms the wafer after wafer slicing. The conditions of the first annealing process include: a heating rate of 10° C./minute to 30° C./minute, an annealing temperature of 2000° C. or less, and a constant temperature annealing time of 2 minutes or more and 4 hours or less for performing the first annealing process. After performing the first annealing process, an average resistivity of the wafer or the ingot is greater than 1010 Ω·cm.

Method of fabricating silicon carbide ingot

A silicon carbide ingot is provided, which includes a seed end, and a dome end opposite to the seed end. In the silicon carbide ingot, a ratio of the vanadium concentration to the nitrogen concentration at the seed end is in a range of 5:1 to 11:1, and a ratio of the vanadium concentration to the nitrogen concentration at the dome end is in a range of 2:1 to 11:1.

Alignment method for wafer delivery in reaction chamber

Improved photo structure

Silicon carbide substrate and manufacturing method thereof

A silicon carbide substrate includes an N-type silicon carbide substrate having a first surface and a second surface opposite to the first surface. The N-type silicon carbide substrate includes a semi-insulating silicon carbide region and an N-type silicon carbide region. The semi-insulating silicon carbide region extends inward from the first surface into the N-type silicon carbide substrate to a depth. The semi-insulating silicon carbide region includes nitrogen and a first dopant. The first dopant includes at least one of group VB elements, group VIIA elements, argon and silicon. The N-type silicon carbide region is adjacent to the semi-insulating silicon carbide region and includes nitrogen element.

Silicon carbide material

A method of fabricating a silicon carbide material is provided. The method includes the following steps. A first annealing process is performed on a wafer or on an ingot that forms the wafer after wafer slicing. The conditions of the first annealing process include: a heating rate of 10° C./minute to 30° C./minute, an annealing temperature of 2000° C. or less, and a constant temperature annealing time of 2 minutes or more and 4 hours or less for performing the first annealing process. After performing the first annealing process, an average resistivity of the wafer or the ingot is greater than 10 10 Ω·cm.

Semi-insulating silicon carbide crystalline ingot having a resistivity larger than 10∧7 Ohm-cm and manufacturing method therefor

A silicon carbide crystal and a manufacturing method thereof are provided. The silicon carbide crystal includes an N-type seed layer, a barrier layer, and a semi-insulating ingot, which are sequentially stacked and are made of silicon carbide. The N-type seed layer has a resistivity within a range of 0.01-0.03 Ω·cm. The barrier layer includes a plurality of epitaxial layers sequentially formed on the N-type seed layer by an epitaxial process. The C/Si ratios of the epitaxial layers gradually increase in a growth direction away from the N-type seed layer. A nitrogen concentration of the silicon carbide crystal gradually decreases from the N-type seed layer toward the semi-insulating ingot by a diffusion phenomenon, so that the semi-insulating crystal has a resistivity larger than 10 7 Ω·cm.

Wafer cleaning

One or more techniques or systems for cleaning wafers during semiconductor fabrication or an associated brush are provided herein. In some embodiments, the brush includes a brush body and one or more inner hole supports within the brush body. For example, a first inner hole support and a second inner hole support define a first inner hole associated with a first size. For another example, a third inner hole support and a fourth inner hole support define a second inner hole associated with a second size different than the first size. In some embodiments, a cleaning solution is applied to a wafer based on a first flow rate at a first brush position and based on a second flow rate at a second brush position. In this manner, a flow field associated with wafer cleaning is provided, thus enhancing cleaning efficiency, for example.