Process for fabricating layered superlattice materials and making electronic devices including same

A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725° C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.

Method and apparatus for misted liquid source deposition of thin film with reduced mist particle size

A mass flow controller controls the delivery of a precursor to a mist generator. The precursor is misted utilizing a venturi in which a combination of oxygen and nitrogen gas is charged by a corona wire and passes over a precursor-filled throat. The mist is refined using a particle inertial separator, electrically filtered so that it comprises predominately negative ions, passes into a velocity reduction chamber, and then flows into a deposition chamber through inlet ports in an inlet plate that is both a partition between the chambers and a grounded electrode. The inlet plate is located above and substantially parallel to the plane of the substrate on which the mist is to be deposited. The substrate is positively charged to a voltage of about 5000 volts. There are 440 inlet ports per square inch in an 39 square inch inlet port area of the inlet plate directly above the substrate. The inlet port area is approximately equal to the substrate area. An exhaust port defines a channel about the ...

Methods and apparatus for material deposition using primer

A liquid primer is misted, flowed into a deposition chamber and deposited on a substrate. A liquid precursor is then misted, flowed into a deposition chamber and deposited on the substrate. The primer and precursor are dried to form a solid thin film, which is then annealed to form a part of an electronic component in an integrated circuit, such as the dielectric in a memory cell. The primer is a solvent, and the precursor includes a metal carboxylate, a metal alkoxide, or a metal alkoxycarboxylate in a precursor solvent. Preferably, the primer and the precursor solvent are the same solvent, such as 2-methoxyethanol, xylenes, or n-butyl acetate.

Ferroelectric/high dielectric constant integrated circuit and method of fabricating same

A transistor on a silicon substrate is covered by an insulating layer. A conducting plug passes through the insulating layer to the transistor drain. The bottom electrode of a ferroelectric capacitor that directly overlies the plug and drain contacts the plug. The ferroelectric layer is self-patterned and completely overlies the memory cell. A self-patterned sacrificial layer completely overlies the ferroelectric layer. The bottom electrode of the capacitor is completely enclosed by the ferroelectric layer, the insulating layer, and the conducting plug. The sacrificial layer comprises either: a) a metal selected from a first metal group consisting of tantalum, hafnium, tungsten, niobium and zirconium; or b) a metallic compound comprising one or more metals selected from a second group of metals consisting of titanium, tantalum, hafnium, tungsten, niobium and zirconium compounded with one or more metals from a third group of metals consisting of strontium, calcium, barium, bismuth, cadmium ...

UV radiation process for making electronic devices having low-leakage-current and low-polarization fatigue

A precursor solution formed of a liquid polyoxyalkylated metal complex in a solvent is applied to a substrate in the formation of a metal oxide thin film. The liquid thin film is baked in air to a temperature up to 500° C. while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed at temperature ranging from about 700° C. to 850° C. to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used. The use of UV radiation significantly reduces the leakage current and carbon impurity content of the final metal oxide.

Liquid deposition methods of fabricating layered superlattice materials

A precursor liquid comprising several metal 2-ethylhexanoates, such as strontium, tantalum, and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, and deposited on a substrate. In one embodiement the substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit the precursor liquid on the substrate. In another embodiment, the precursor is spin-coated on the substrate. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate.

Ferroelectric dielectric memory cell can switch at least giga cycles and has low fatigue - has high dielectric constant and low leakage current

An integrated circuit includes a layered superlattice material having the formula A1w1+a1 A2w2+a2 . . . Ajwj+aj S1x1+s1 S2x2+s2 . . . Skxk+ak B1y1+b1 B2y2+b2 . . . Blyl+bl Qz-2, where A1, A2 . . . Aj represent A-site elements in a perovskite-like structure, S1, S2 . . . Sk represent superlattice generator elements, B1, B2 . . . Bl represent B-site elements in a perovskite-like structure, Q represents an anion, the superscripts indicate the valences of the respective elements, the subscripts indicate the number of atoms of the element in the unit cell, and at least w1 and y1 are non-zero. Some of these materials are extremely low fatigue ferroelectrics and are applied in non-volatile memories. Others are high dielectric constant materials that do not degrade or breakdown over long periods of use and are applied in volatile memories.

Process for fabricating layered superlattice materials and making electronic devices including same

A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725° C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.

Integrated circuits having mixed layered superlattice materials and precursor solutions for use in a process of making the same

Metal alkoxycarboxylate-based liquid precursor solutions are used form electronic devices (100) that include mixed layered superlattice materials (112) of a type having discrete oxygen octahedral layers (124) and (128) collated with a superlattice-generator layer (116). The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer (124), a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer (128), and a superlattice-generator portion capable of forming the superlattice-generator layer (116). The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.

Process for fabricating materials for ferroelectric, high dielectric constant, and integrated circuit applications

A precursor comprising a medium-length ligand carboxylate, such as a metal 2-ethylhexanoate, in a xylenes solvent is applied to an integrated circuit wafer. The wafer is baked to dry the precursor, annealed to form a layered superlattice material on the wafer, then the integrated circuit is completed.

Low imprint ferroelectric material for long retention memory and method of making the same

Thin film ferroelectric materials for use in integrated memory circuits, such as FERAMS and the like, contain strontium bismuth niobium tantalate having an empirical formula SrBi2+E (NbX Ta2-X)O9+3E/2, wherein E is a number representing an excess amount of bismuth ranging from zero to 2; and X is a number representing an excess amount of niobium ranging from 0.01 to 0.9. The thin films demonstrate an exceptional resistance to polarization imprinting when challenged with unidirectional voltage pulses.

Photosensitive liquid precursor solutions and use thereof in making thin films

A photosensitive liquid solution is used to make thin films for use in integrated circuits. The photosensitive liquid solution contains a photo initiator, and solvent, and a mixture of metals bonded to free-radical-susceptible monomers. The metals are mixed in amounts corresponding to the desired stoichiometry of a metal oxide thin film that derives from the. The photosensitive liquid solution is applied to a substrate, soft baked, and exposed to ultraviolet radiation under a photo mask. The ultraviolet radiation patterns the soft-baked film through a free radical polymerization chain reaction. A solvent etch is used to remove the unpolymerized portion of the polymerized film. The remaining thin film pattern is annealed to provide a patterned metal oxide film.

UV radiation process for making electronic devices having low-leakage-current and low-polarization fatigue

A precursor solution formed of a liquid polyoxyalkylated metal complex in as solvent is applied to a substrate in the formation of a metal oxide thin film. The liquid thin film is baked in air to a temperature up to 500° C. while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed at temperature ranging from about 700° C. to 850° C. to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used. The use of UV radiation significantly reduces the leakage current and carbon impurity content of the final metal oxide.

Process for fabricating layered superlattice materials and making electronic devices including same

A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725° C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.

Memory with ferroelectric capacitor connectable to transistor gate

A ferroelectric memory includes a constant voltage source, a capacitor having first and second electrodes, and a transistor having a gate. A switch alternately connects the gate of the transistor to the first electrode and the constant voltage source. In another embodiment, there are two ferroelectric transistors, and the first electrode of each capacitor is connected both to the gate of the transistor and to a voltage source external of the memory.

Low imprint ferroelectric material for long retention memory and method of making the same

Thin film ferroelectric materials for use in integrated memory circuits, such as FERAMS and the like, contain strontium bismuth niobium tantalate having an empirical formula SrBi2+E (NbX Ta2-X)O9+3E/2, wherein E is a number representing an excess amount of bismuth ranging from zero to 2; and X is a number representing an excess amount of niobium ranging from 0.01 to 0.9. The thin films demonstrate an exceptional resistance to polarization imprinting when challenged with unidirectional voltage pulses.

Method and apparatus for preparing integrated circuit thin films by chemical vapor deposition

A mist is generated by a venturi from liquid precursors containing compounds used in chemical vapor deposition, transported in carrier gas through tubing at ambient temperature, passed into a heated zone where the mist droplets are gasified at a temperature of between 100° C. and 200° C., which is lower than the decomposition temperature of the precursor compounds. The gasified liquid is injected through an inlet assembly into a deposition reactor in which there is a substrate heated to from 400° C. to 600° C., on which the gasified compounds decompose and form a thin film of layered superlattice compound.

Misted deposition method with applied UV radiation

UV radiation is applied to a substrate in a deposition chamber to desorb water and other contaminates from it. A liquid precursor is misted, flowed into the deposition chamber and deposited on a substrate while UV radiation is applied to the mist. The film of liquid on the substrate is dried and annealed on the substrate while the UV radiation is applied to form a solid thin film of a metal oxide. The thin film is then incorporated into an electronic device of an integrated circuit fabricated on the substrate. The application of UV radiation to both the mist during deposition and the thin film after deposition significantly increases the quality of the resulting integrated circuits. The process has been found to be particularly excellent for making BST, strontium bismuth tantalate, and strontium bismuth niobate.

Aluminum treatment to prevent hillocking

A method of surface treating aluminum, particularly aluminum metallization for semiconductors, which includes subjecting the aluminum surface to be treated with fuming nitric acid for one to ten minutes at room temperature. Following cleaning, the surface is subjected to boiling water for 5 to 15 minutes. The foregoing treatment appears to form a boehmite (AlO(OH)) layer on the surface of the aluminum, thereby substantially eliminating hillocking.

Ferroelectric memory and non-volatile memory cell for same

A non-volatile integrated circuit memory in which the memory cell includes a first transistor gate overlying a first channel region, a ferroelectric material overlying a second channel region, and a second transistor gate overlying a third channel region. The channel regions are connected in series, and preferably are contiguous portions of a single semiconducting channel. The firm channel is connected to a plate voltage that is 20% to 50% of the coercive voltage of the ferroelectric material. A sense amplifier is connected to the third channel region via a bit line. The rise of the bit line after reading a logic "1" state of the cell is prevented from disturbing the ferroelectric material by shutting off the third channel before the sense amplifier rises.

Misted precursor deposition apparatus and method with improved mist and mist flow

A substrate is located within a deposition chamber, the substrate defining a substrate plane. A barrier plate is disposed in spaced relation above the substrate and substantially parallel thereto, the area of said barrier plate in a plane parallel to said substrate being substantially equal to said area of said substrate in said substrate plane, i.e. within 10% of said substrate area. The barrier plate has a smoothness tolerance of 5% of the average distance between said barrier plate and said substrate. A mist is generated, allowed to settle in a buffer chamber, filtered through a 1 micron filter, and flowed into the deposition chamber between the substrate and barrier plate to deposit a liquid layer on the substrate. The liquid is dried to form a thin film of solid material on the substrate, which is then incorporated into an electrical component of an integrated circuit.

PSZT for integrated circuit applications

An integrated circuit memory, MMIC, or other device including a dielectric comprising lead-tin zirconium-titanium oxide (PSZT). The proportion of tin ranges from 30% to 50% of the total amount of tin, zirconium and titanium. The dielectric is formed by applying a first liquid precursor having 10% excess lead to a substrate and heating it to form a first PSZT thin film, applying a second liquid precursor having 5% excess lead to the first thin film and heating to form a second thin film, then applying the first liquid precursor and heating to form a third thin film, and annealing the three thin films together to form a PSZT dielectric layer.

Method and apparatus for fabricating silicon dioxide and silicon glass layers in integrated circuits

A precursor liquid comprising silicon in a xylenes solvent is prepared, a substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of silicon dioxide or silicon glass on the substrate. Then an integrated circuit is completed to include at least a portion of the silicon dioxide or silicon glass layer as an insulator for an electronic device in the integrated circuit.

Method and apparatus for reduced fatigue in ferroelectric memory

A method and apparatus for programming ferroelectric memory cells which reduces polarizability fatigue effects of switching polarization of the ferroelectric devices associated with the memory cells such as ferroelectric capacitors and transistors. Alteration of the pulse width duty cycle associated with signals used to switch ferroelectric device polarization is shown to reduce polarizability fatigue of the ferroelectric material thereby increasing the useful life of ferroelectric memory cells. Methods and apparatus for producing a signal pulse duty cycle in the range 2-30% is disclosed and shown to improve the useful life of the ferroelectric material.

Shelf-stable liquid metal arylketone alcoholate solutions and use thereof in photoinitiated patterning of thin films

Solution films of a photosensitive metal arylketone alcoholate are micro-patterned by exposure to ultraviolet radiation under a mask. The resultant patterns are developed in an apolar solvent and annealed to provide thin film metal oxides for use in integrated circuits.

Method of fabricating an integrated circuit using self-patterned thin films

A first photosensitive liquid solution is applied to a substrate, patterned through exposure to radiation and development, and annealed to form a desired solid material, such as SrBi2 Ta2 O9, that is incorporated into a component of an integrated circuit Fabrication processes are designed protect the self-patterned solid material from conventional IC processing and to protect the conventional materials, such as silicon, from elements in the self-patterned solid material. In one embodiment, a layer of bismuth oxide is formed on the SrBi2 Ta2 O9 and a silicon oxide hole is etched to the bismuth oxide. The bismuth oxide protects the SrBi2 Ta2 O9 from the etchant, and is reduced by the etchant to bismuth. Any remaining bismuth oxide and much of the bismuth are vaporized in the anneal, and the remaining bismuth is incorporated into the SrBi2 Ta2 O9.

Precursors and processes for making metal oxides

A first metal, an alcohol, and a carboxylic acid are reacted to form a metal alkoxycarboxylate which is then reacted with an alkoxide and/or a carboxylate of a second metal to form a precursor. Alternatively, a metal carboxylate and a metal alkoxide are combined and heated to form a precursor. In either alternative, the precursor includes all or most of the metal-oxygen-metal bonds of a desired metal oxide and a carboxylate ligand. The precursor is applied to a substrate, dried and annealed to form the metal oxide, such as BST. The metal-oxygen-metal bonds in the precursor permit the desired metal oxide to be formed from the precursor in one step, providing excellent thin films suitable for integrated circuits. The carboxylate ligand provides stability to the precursor allowing it to be stored for periods common in large scale manufacturing.

Method and apparatus for material deposition

A method and apparatus are disclosed for forming thin films of chemical compounds utilized in integrated circuits. The method includes steps of forming a precursor liquid comprising a chemical compound in a solvent, providing a substrate within a vacuum deposition chamber, producing a mist of the precursor liquid, and flowing the mist into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried to form a thin film of a solid material on the substrate, then the integrated circuit is completed to include at least a portion of the film of solid material in a component of the integrated circuit.

ZnO thin-film varistors and method of making the same

A thin-film zinc oxide varistor (10) for use in integrated circuits and the like is produced by applying a polyoxyalkylated metal complex, such as a metal alkoxycarboxylate, to a substrate (12, 14, and 16) for the formation of a dried nonohmic layer (18). The method of production includes the steps of providing a substrate and a precursor solution including a polyoxyalkylated zinc complex (P22, P24), coating a portion of the substrate with the precursor solution (P26), drying the coated substrate (P32), and crystallizing the dried thin-film zinc oxide layer (P30). The resultant crystalline zinc oxide varistor layer (18) may be doped with bismuth, yttrium, praseodymium, cobalt, antimony, manganese, silicon, chromium, titanium, potassium, dysprosium, cesium, cerium, and iron to provide a non-ohmic varistor. The varistor layer (10) is annealed at a temperature ranging from about 400 to about 1000° C. to provide a layer having a thickness ranging from about 50 nanometers to about 500 nanometers ...

Methods and apparatus for material deposition

The present invention discloses methods and apparatus for depositing thin films of complex (compound) materials, including ferroelectrics, superconductors, and materials with high dielectric constants through a technique which is hereby entitled photo-enhanced chemical vapor deposition and activation (PECVDA). The technique involves the use of multiple heating sources including a resistive heat bias heater, a tuned optical source (UV or laser) and a source (halogen lamps or microwave sources) for applying high energy, rapid thermal pulses in a precise time sequence.

Misted deposition method of fabricating integrated circuits

A method and apparatus are disclosed for forming thin films of chemical compounds utilized in integrated circuits. The method includes steps forming a precursor liquid comprising a chemical compound in a solvent, providing a substrate within a vacuum deposition chamber, producing a mist of the precursor liquid, and flowing the mist into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried to form a thin film of a solid material on the substrate, then the integrated circuit is completed to include at least a portion of the film of solid material in a component of the integrated circuit.

Composition and process using ester solvents for fabricating metal oxide films and electronic devices including the same

A metal organic liquid precursor solution includes metal organic complexes dispersed in an ester solvent. The ester solvent has medium length carbon chains to prevent the precipitation of strongly electropositive metals in solution. A liquid precursor solution is used to make thin film metal oxides of uniform thickness and consistent quality.

Nondestructive readout memory utilizing ferroelectric capacitors isolated from bitlines by buffer amplifiers

A memory includes a bitline data signal input (24), at least one memory unit (20), a writing circuit (128) which writes a polarization state into each memory unit (20) responsive to the bitline data signal input, and a sensing circuit (130) that senses a polarization state of each memory unit (20). Each memory unit (20) includes a ferroelectric capacitor (22) and a buffer amplifier (26) in electrical series relationship with the ferroelectric capacitor (22) and the bitline data signal input (24). The buffer amplifier (26) capacitively isolates the ferroelectric capacitor (22) from the bitline data signal input (24) so that the ferroelectric capacitor (22) may be made smaller in size than would otherwise be the case.

Misted deposition method of fabricating layered superlattice materials

A precursor liquid comprising several metal 2-ethylhexanoates, such as stroritium tantalum and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, a substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate. Then an integrated circuit is completed to include at least a potion of the layered superlattice material film in a component of the integrated circuit.

Integrated circuits having mixed layered superlattice materials and precursor solutions for use in a process of making the same

Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials of a type having discrete oxygen octahedral layers and collated with a superlattice-generator layer. The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer, a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer, and a superlattice-generator portion capable of forming the superlattice-generator layer. The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.

Integrated circuits having mixed layered superlattice materials and precursor solutions for use in a process of making the same

Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials (112) of a type having discrete oxygen octahedral layers (124) and (128) collated with a superlattice-generator layer (116). The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer (124), a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer (128), and a superlattice-generator portion capable of forming the superlattice-generator layer (116). The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.

Liquid source formation of thin films using hexamethyl-disilazane

A precursor liquid comprising several metal 2-ethylhexanoates, such as strontium, tantalum and bismuth 2-ethylhexanoates, in a solvent such as xylenes/methyl ethyl ketone and a small amount of hexamethyl-disilazane. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate.

Electrical component having low-leakage current and low polarization fatigue made by UV radiation process

A precursor solution formed of a liquid polyoxyalkylated metal complex in a solvent is applied to a substrate in the formation of a metal oxide thin film. The liquid thin film is baked in air to a temperature up to 500° C. while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed at temperature ranging from about 700° C. to 850° C. to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used. The use of UV radiation significantly reduces the leakage current and carbon impurity content of the final metal oxide.

Antifuse programmable element using ferroelectric material

An electrically programmable antifuse element using ferroelectric materials for the insulative dielectric layer, methods for producing same, and an integrated circuit applying a plurality of ferroelectric antifuse elements in a two dimensional matrix of rows and columns for use as a programmable logic device (PLD) or as a programmable read-only memory (PROM). A ferroelectric material is formed between two conductive electrodes to create a ferroelectric antifuse element. In an alternative embodiment, a plurality of chemically distinct materials is layered to form the dielectric layer. The combined application of an AC electric field and a DC electric field breaks down the ferroelectric material to form a low-resistance conductive filament. The synergy of the two electric fields permits programming antifuse elements of the present invention by applying DC electric fields as low as 2 volts amplitude. In the preferred embodiment, as compared to prior designs, antifuse devices of the present ...

Ferroelectric integrated circuit

An oversize ferroelectric capacitor is located against the contact hole to the MOSFET source/drain in a DRAM. A barrier layer made of titanium nitride, titanium tungsten, tantalum, titanium, tungsten, molybdenum, chromium, indium tin oxide, tin dioxide, ruthenium oxide, silicon, silicide, or polycide lies between the ferroelectric layer and the source drain. The barrier layer may act as the bottom electrode of the ferroelectric capacitor, or a separate bottom electrode made of platinum may be used. In another embodiment in which the barrier layer forms the bottom electrode, an oxide layer less than 5 nm thick is located between the barrier layer and the ferroelectric layer and the barrier layer is made of silicon, silicide, or polycide. A thin silicide layer forms and ohmic contact between the barrier layer and the source/drain. The capacitor and the barrier layer are patterned in a single mask step. The ends of the capacitor are stepped or tapered. In another embodiment both the bottom ...

Non-volatile memory

A non-volatile memory includes a constant voltage source, a bit line, a memory cell having a first ferroelectric capacitor connected between the bit line and the constant voltage source, a source of a reference voltage, and a latch connected between the bit line and the reference voltage. The latch drives the bit line to the same logic state as the ferroelectric capacitor to read and rewrite the capacitor in a single operation. The reference voltage is provided by a ferroelectric dummy capacitor having an area smaller than the area of the first capacitor but greater than 1/2 the area of the first capacitor.

Layered superlattice ferroelectric liquid crystal display

A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using a special liquid precursor containing an alkoxycarboxylate. The thin film of layered superlattice material is formed using a spin-on technique and low-temperature heat treating. The thin film thickness is preferably in the range 500-1400 Å so that polarizability and transparency of the thin film is enhanced.

Process for fabricating materials for ferroelectric, high dielectric constant, and integrated circuit applications

A precursor comprising a metal 2-ethylhexanoate in a xylenes solvent is applied to an integrated circuit wafer. The wafer is baked to dry the precursor, annealed to form a layered superlattice material on the wafer, then the integrated circuit is completed. If the metal is titanium, the precursor comprises titanium 2-methoxyethoxide having at least a portion of its 2-methoxyethoxide ligands replaced by 2-ethylhexanoate. If the metal is a highly electropositive element, the solvent comprises 2-methoxyethanol. If the metal is lead, bismuth, thallium, or antimony, 1% to 75% excess metal is included in the precursor to account for evaporation of the oxide during baking and annealing.

Liquid source formation of thin films using hexamethyl-disilazane

A precursor liquid comprising several metal 2-ethylhexanoates, such as strontium, tantalum and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, a substrate is placed within a vacuum deposition chamber, a small amount of hexamethyl-disilazane is added to the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate. Then an integrated circuit is completed to include at least a portion of the layered superlattice material film in a component of the integrated circuit.

Method and apparatus for reduced fatigue in ferroelectric memory elements

A method and apparatus for programming ferroelectric memory cells which reduces fatigue effects of switching polarization of the ferroelectric devices associated with the memory cells such as ferroelectric capacitors and transistors. Alteration of the rise AC fall times associated with signals used to switch ferroelectric device polarization are shown to reduce fatigue of the ferroelectric material thereby increasing the useful life of ferroelectric memory cells. Slowing the rise and fall times as well as the rate of signal level rise and fall, (signal shape), are shown to reduce the fatigue effects of switching polarization of ferroelectric devices. Methods and apparatus for producing a triangular ("sawtooth") signal waveform, a Gaussian signal waveform, and a waveform having exponential rise and fall times are disclosed.

Method and apparatus for misted liquid source deposition of thin films with increased yield

A mist generator produces a mist from a liquid precursor. The mist is charged and accelerated by a pair of charged electrodes in an acceleration chamber. The mist passes through a conduit charged to the same polarity of the mist particles, to a deposition chamber where they are deposited on a substrate having the opposite polarity as the particles. Infrared lamps heat the mist particles in the acceleration chamber to a temperature below the temperature at which the compounds and solvent in the liquid precursor decompose. In one embodiment the deposition chamber is tubular and a plurality of substrates are held within the chamber in a position substantially perpendicular to the direction of mist flow in the chamber. A heater and an electrical field generator in the tube add sufficient energy to the mist as it passes through the tube to provide uniform deposition of the mist on the plurality of substrates.

Method and apparatus for misted deposition of integrated circuit quality thin films

A mass flow controller controls the delivery of a precursor to a mist generator. The precursor is misted utilizing a venturi in which a combination of oxygen and nitrogen gas is charged by a corona wire and passes over a precursor-filled throat. The mist is electrically filtered so that it comprises predominately negative ions, passes into a velocity reduction chamber, and then flows into a deposition chamber through inlet ports in an inlet plate that is both a partition between the chambers and a grounded electrode. The inlet plate is located above and substantially parallel to the plane of the substrate on which the mist is to be deposited. The substrate is positively charged to a voltage of about 5000 volts. There are 440 inlet ports per square inch in an 39 square inch inlet port area of the inlet plate directly above the substrate. The inlet port area is approximately equal to the substrate area. An exhaust port defines a channel about the periphery of an exhaust plane parallel to ...

Misted deposition apparatus for fabricating an integrated circuit

A method and apparatus are disclosed for forming thin films of chemical compounds utilized in integrated circuits. The method includes steps of forming a precursor liquid comprising a chemical compound in a solvent, providing a substrate within a vacuum deposition chamber, producing a mist of the precursor liquid, and flowing the mist into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried to form a thin film of a solid material on the substrate, then the integrated circuit is completed to include at least a portion of the film of solid material in a component of the integrated circuit.

Deposition of silicon nitride

Silicon nitride is pyrolytically deposited by the reaction of a halosilane with ammonia in an evacuated system. The process is particularly useful in providing uniform layers of silicon nitride on silicon wafers to be used in the fabrication of semiconductor devices.

Method of fabricating barium strontium titanate

A precursor liquid comprising barium and strontium 2-ethylhexanoates and titanium 2-methoxyethanol in a 2-methoxyethanol solvent is prepared, a substrate is placed within a vacuum deposition chamber, the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of barium strontium titanate on the substrate. Then an integrated circuit is completed to include at least a portion of the layered superlattice material film in a component of the integrated circuit.

Process for fabricating ferroelectric integrated circuit

An oversize ferroelectric capacitor is located against the contact hole to the MOSFET source/drain in a DRAM. A barrier layer made of titanium nitride, titanium tungsten, tantalum, titanium, tungsten, molybdenum, chromium, indium tin oxide, tin dioxide, ruthenium oxide, silicon, silicide, or polycide lies between the ferroelectric layer and the source drain. The barrier layer may act as the bottom electrode of the ferroelectric capacitor, or a separate bottom electrode made of platinum may be used. In another embodiment in which the barrier layer forms the bottom electrode, an oxide layer less than 5 nm thick is located between the barrier layer and the ferroelectric layer and the barrier layer is made of silicon, silicide, or polycide. A thin silicide layer forms and ohmic contact between the barrier layer and the source/drain. The capacitor and the barrier layer are patterned in a single mask step. The ends of the capacitor are stepped or tapered. In another embodiment both the bottom ...

Misted precursor deposition apparatus and method with improved mist and mist flow

A substrate is located within a deposition chamber, the substrate defining a substrate plane. A liquid precursor is misted by ultrasonic or venturi apparatus, to produce a colloidal mist. The mist is generated, allowed to settle in a buffer chamber, filtered through a system up to 0.01 micron, and flowed into the deposition chamber between the substrate and barrier plate to deposit a liquid layer on the substrate. The liquid is dried to form a thin film of solid material on the substrate, which is then incorporated into an electrical component of an integrated circuit.

Method of forming magnesium oxide films on glass substrate for use in plasma display panels

A new method (P200) is provided for making magnesium oxide layers (122) in plasma displays (100). A magnesium carboxylate liquid precursor solution is applied to a display panel (102), dried, and annealed to yield a solid magnesium oxide layer (122) having excellent electro-optical performance.

Apparatus for forming a thin film with a mist forming means

A method and apparatus are disclosed for generating fine mists of liquids using a rotating turbine blade disposed within an enclosure. A mixture of a liquid and a carrier gas are flowed into the enclosure such that it immediately impacts on the rotating turbine blade disposed near a lower end of the enclosure, and the resulting mist is withdrawn under vacuum near an upper end of the enclosure. A method and apparatus are also disclosed for chemical vapor deposition of thin films of complex chemical compounds using the discussed mists.

Ferroelectric memory with ferroelectric thin film having thickness of 90 nanometers or less, and method of making same

A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300° C. for five minutes, then RTP annealed at 675° C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700° C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 90 nm. A second electrode is applied to form a capacitor, and a post-anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700° C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8≦u≦1.0, 2.0≦v≦2.3, and 1.9≦w≦2.1.

Integrated circuit electrode structure and process for fabricating same

An electrode for a ferroelectric electronic device is formed on an SiO2 isolation layer by depositing an adhesion layer, such as titanium, between about 25 Å and 500 Å thick, then a layer of a nobel metal, such as platinum, that is at least 10 times thicker than the adhesion layer. The electrode is then annealed at a temperature higher than the minimum oxide eutectic temperature of the adhesion layer. The electrode is moved into the annealing furnace at a ramp rate such that it reaches its anneal temperature in five minutes or less. The relative thinness of the adhesion layer and the quick ramp up of the anneal causes all the titanium to be tied up in the oxide before it can diffuse through the platinum, and prevents the formation of rutile phases of the titanium and defects such as voids and hillocks in the platinum, which can destabilize the electrode.

Methods and apparatus for material deposition

Methods and apparatus for depositing thin films of complex (compound) materials, including ferroelectrics, superconductors, and materials with high dielectric constants by photo/plasma-enhanced chemical vapor deposition from stabilized compound sources. Multiple heating and/or spectral energy sources are used for applying high energy, rapid thermal pulses in a precise timed sequence. Sol-gels of compound sources are ultrasonically atomized before being introduced to the deposition chamber.

Method and apparatus for programming antifuse elements using combined AC and DC electric fields

An antifuse element has a dielectric layer comprising materials whose dielectric constant increases in the presence of a DC electric field, such as a ferroelectric. An applied AC electric field and a DC electric field breaks down the dielectric material to form a conductive filament. The AC electric field causes the physical reorientation of the electric dipole of the molecules in the ferroelectric material which creates heat within the ferroelectric material. The DC electric field enhances the heating effect of the AC electric field by enlarging the electric dipole of the ferroelectric molecules. The synergy of the two electric fields permits programming antifuse elements of the present invention by applying DC electric fields as low as 2 volts amplitude.

Ferroelectric non-volatile memory unit

An integrated circuit non-volatile, non-destructive read-out memory unit includes a ferroelectric capacitor having first and second electrodes, a capacitance Cf, and an area Af, and a transistor having a gate, a source and a drain forming a gate capacitor having an area Ag and a gate capacitance Cg, a gate overlap b, and a channel depth a, with the capacitor first electrode connected to the gate of the transistor. The ferroelectric material has a dielectric constant εf and the gate insulator has a dielectric constant εg. A source of a constant reference voltage is connectable to the first electrode. A bit line connects to the second electrode. In one embodiment the first electrode and gate are the same conductive member. In another embodiment the second electrode and the gate are the same conductive member and the first electrode is formed by extensions of the transistor source and drains underlying the gate, with the ferroelectric material between the source and drain extensions and the ...

Liquid source formation of thin films using hexamethyl-disilazane

A precursor liquid comprising several metal 2-ethylhexanoates, such as strontium, tantalum and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, a substrate is placed within a vacuum deposition chamber, a small amount of hexamethyl-disilazane is added to the precursor liquid is misted, and the mist is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film of a layered superlattice material, such as strontium bismuth tantalate, on the substrate. Then an integrated circuit is completed to include at least a portion of the layered superlattice material film in a component of the integrated circuit.

Low imprint ferroelectric material for long retention memory and method of making the same

Thin film ferroelectric materials for use in integrated memory circuits, such as FERAMS and the like, contain strontium bismuth niobium tantalate having an empirical formula SrBi 2+E (Nb X Ta 2-X )O 9+3E/2 , wherein E is a number representing an excess amount of bismuth ranging from zero to 2; and X is a number representing an excess amount of niobium ranging from 0.01 to 0.9. The thin films demonstrate an exceptional resistance to polarization imprinting when challenged with unidirectional voltage pulses.

Lanthanide series layered superlattice materials for integrated circuit applications

Method and apparatus for material deposition using primer

Integrated circuit with layered superlattice material compound

A method of fabricating a ferroelectric or layered superlattice DRAM compatible with conventional silicon CMOS technology. A MOSFET is formed on a silicon substrate. A thick layer of BPSG followed by a thin SOG layer overlies the MOSFET. A capacitor is formed by depositing a layer of platinum, annealing, depositing an intermediate layer comprising a ferroelectric or layer superlattice material, annealing, depositing a second layer of platinum, then patterning the capacitor. Another SOG layer is deposited, contact holes to the MOSFET and capacitor are partially opened, the SOG is annealed, the contact holes are completely opened, and a Pt/Ti/PtSi wiring layer is deposited.

Uv radiation process for making electronic devices having low-leakage-current and low-polarization fatigue

A precursor solution (P22) formed of a liquid polyoxyalkylated metal complex in a solvent is applied to a substrate in the formation of a metal oxide thin film (P26). The liquid thin film is baked (P28) in air to a temperature up to 500 ~C while UV radiation having a wavelength ranging from 180 nm to 300 nm is applied. The thin film can be twice-baked at increasing temperatures while UV radiation is applied at one or both bakings. The film is then annealed (P32) at temperature ranging from about 700 ~C to 850 ~C to produce a thin-film solid metal oxide product. Alternatively, the UV radiation may be applied to the liquid precursor, the thin film may be annealed with UV radiation, or combinations of such applications of UV radiation to the precursor, to the thin film before or after baking, and/or UV annealing may be used.

Ferroelectric memory and non-volatile memory cell for same

A non-volatile integrated circuit memory in which the memory cell includes a first transistor gate overlying a first channel region, a ferroelectric material overlying a second channel region, and a second transistor gate overlying a third channel region. The channel regions are connected in series, and preferably are contiguous portions of a single semiconducting channel. The firm channel is connected to a plate voltage that is 20% to 50% of the coercive voltage of the ferroelectric material. A sense amplifier is connected to the third channel region via a bit line. The rise of the bit line after reading a logic "1" state of the cell is prevented from disturbing the ferroelectric material by shutting off the third channel before the sense amplifier rises.

Process for fabricating layered superlattice materials

Non-volatile memory

A ferroelectric, non-volatile memory (336) includes a constant voltage source (85), a bit line (79), a memory cell (70) having a first ferroelectric capacitor (76) connected between the bit line (79) and the constant voltage source (85), a source (105) of a reference voltage, and a latch (74) connected between the bit line (79) and the reference voltage source (105). The latch (74) drives the bit line (79) to the same logic state as the ferroelectric capacitor (76) to read and rewrite the capacitor (76) in a single operation. The reference voltage is between QI/CD and QSW/CD + QI/CD, where QI is the linear capacitance of said first ferroelectric capacitor (76), CD is the capacitance of said bit line (79), and QSW is the switching charge of said first ferroelectric capacitor (76). In one embodiment, the reference voltage is provided by a ferroelectric dummy capacitor (141) having an area smaller than the area of the first capacitor (128) but greater than 1/2 the area of the first capacitor (128).

Method and apparatus for fabrication of thin films by chemical vapor deposition

A venturi mist generator creates a mist comprising droplets having a mean diameter less than one micron from liquid precursors containing multi-metal polyalkoxide compounds. The mist is mixed and then passed into a gasifier where the mist droplets are gasified at a temperature of between 100° C. and 250° C., which is lower than the temperature at which the precursor compounds decompose. The gasified precursor compounds are transported by carrier gas through insulated tubing at ambient temperature to prevent both condensation and premature decomposition. The gasified precursors are mixed with oxidant gas, and the gaseous reactant mixture is injected through a showerhead inlet into a deposition reactor in which a substrate is heated at a temperature of from 300° C. to 600 ° C. The gasified precursors decompose at the substrate and form a thin film of solid material on the substrate. The thin film is treated at elevated temperatures of from 500° C. to 900° C. to form polycrystalline metal oxide material, in particular, ferroelectric layered superlattice material.

Precursor solution for forming photosensitive thin film and thin film pattern forming method using same

(57)【要約】 【課題】 ゾル−ゲル法を利用せずに、解像度に優れた ＩＣ用金属酸化物 (特に、積層超格子材料およびペロブ スカイト) 薄膜パターンを形成する。 【解決手段】 １種もしくは２種以上の金属をラジカル 重合性モノマー (例、アクリレートモノマー) に結合さ せた有機金属化合物と光重合開始剤を溶媒に溶解させた 感光性前駆体溶液を利用する。この溶液を、目的とする 金属酸化物の金属原子比となるように必要により他の同 種溶液と混合してから、基板に塗布し、形成された薄膜 を予備焼成し、フォトマスクを介して紫外線に露光す る。薄膜の露光部はラジカル重合反応により現像液に不 溶性となる。現像で未重合部分をエッチングして除去 し、残った薄膜を乾燥および熱処理して金属酸化物に変 えると、金属酸化物薄膜のネガパターンが得られる。

Integrated circuit with layered superlattice material and method of fabricating same

A method of fabricating a layered superlattice DRAM (100) compatible with conventional silicon CMOS technology. A MOSFET (72) is formed on a silicon substrate (71). A thick layer (77D) of BPSG followed by a thin SOG layer (77E) overlies the MOSFET (72). A capacitor (80) is formed by depositing a layer (81) of platinum, annealing, depositing an intermediate layer (84) comprising a layered superlattice material, annealing, depositing a second layer (84) of platinum, then patterning the capacitor (80). Another SOG layer (86) is deposited, contact holes (106, 107) to the MOSFET (72) and capacitor (80) are partially opened, the SOG (86) is annealed, the contact holes (106, 107) are completely opened, and a Pt/Ti/PtSi wiring layer (88, 288) is deposited.

Process for fabricating layered superlattice materials and making electronic devices including same

A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Special polyoxyalkylated precursor solutions are designed to optimize polarizability of the corresponding metal oxide materials by adding dopants including stoichiometric excess amounts of bismuth and tantalum. The RTP baking process is especially beneficial in optimizing the polarizability of the resultant metal oxide.

Ferroelectric memory with ferroelectric thin film having thickness of 90 nanometers or less, and method of making same

A coating of liquid precursor containing a metal is applied to a first electrode, baked on a hot plate in oxygen ambient at a temperature not exceeding 300° C. for five minutes, then RTP annealed at 675° C. for 30 seconds. The coating is then annealed in oxygen or nitrogen ambient at 700° C. for one hour to form a thin film of layered superlattice material with a thickness not exceeding 90 nm. A second electrode is applied to form a capacitor, and a post-anneal is performed in oxygen or nitrogen ambient at a temperature not exceeding 700° C. If the material is strontium bismuth tantalate, the precursor contains u mole-equivalents of strontium, v mole-equivalents of bismuth, and w mole-equivalents of tantalum, where 0.8≦u≦1.0, 2.0≦v≦2.3, and 1.9≦w≦2.1.

Ferroelectric composite material, method of making same and memory utilizing same

A ferroelectric memory ( 436 ) includes a plurality of memory cells ( 73, 82, 100 ) each containing a ferroelectric thin film ( 15 ) including a microscopically composite material having a ferroelectric component ( 18 ) and a dielectric component ( 19 ), the dielectric component being a different chemical compound than the ferroelectric component. The dielectric component is preferably a fluxor, i.e., a material having a higher crystallization velocity than the ferroelectric component. The addition of the fluxor permits a ferroelectric thin film to be crystallized at a temperature of between 400° C. and 550° C.

Integrated circuits having mixed layered superlattice materials and precursor solutions for use in a process of making the same

Metal alkoxycarboxylate-based liquid precursor solutions are used to form electronic devices (100) that include mixed layered superlattice materials (112) of a type having discrete oxygen octahedral layers (124 and 128) collated with a superlattice-generator layer (116). The precursor solutions include a plurality of metal moieties in effective amounts for yielding the layered superlattice materials. These metal moieties are mixed to include an A/B portion capable of forming an A/B layer (124), a perovskite-like AB layer portion capable of forming a perovskite-like AB octahedral layer (128), and a superlattice-generator portion capable of forming the superlattice-generator layer (116). The precursors are deposited in liquid form upon a substrate and annealed to provide the layered superlattice materials.

Strontium bismuth niobate tantalate ferroelectric thin film

A thin film ferroelectric material (500) for use in integrated memory circuits (300, 400), such as FERAMS (300) and the like, contains strontium bismuth niobium tantalate having an empirical formula SrBi2+E(NbXTa2-X)O9+3E/2, wherein E is a number representing an excess amount of bismuth ranging from zero to 2; and X is a number representing an excess amount of niobium ranging from 0.01 to 0.9. A method of operating a ferroelectric memory cell (400) including providing such a material having the foregoing formula in a first polarization state, subjecting the thin film ferroelectric material in the first polarization state to a plurality of unidirectional voltage pulses; and thereafter switching the ferroelectric material to a second polarization state essentially free of imprint from the plurality of unidirectional voltage pulses.

Process for fabricating layered superlattice materials and making electronic devices including same

A liquid precursor containing a metal is applied to a substrate (18), RTP baked, and annealed to form a layered superlattice material (30). To obtain good electrical properties, prebaking the substrate (18) in oxygen in the RTP and anneal are essential, except for high bismuth content precursors. Excess bismuth between 110 % and 140 % of stoichiometry and RTP temperature of 750 °C is optimum. The film is formed in two layers (30A, 30B), the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor.

USE OF LAYERED GRILLED MATERIAL

Method and apparatus for fabricating silicon dioxide and silicon glass layers in integrated circuits

A precursor liquid (64) comprising silicon in a xylene solvent is prepared, a substrate (5, 71) is placed within a vacuum deposition chamber (2), the precursor liquid is misted, and the mist (66) is flowed into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film (1224, 77) of silicon dioxide or silicon glass on the substrate. Then an integrated circuit (100) is completed to include at least a portion of the silicon dioxide or silicon glass layer as an insulator (77) for an electronic device (76) in the integrated circuit.

Method and apparatus for reduced fatigue in ferroelectric memory elements

A method and apparatus for programming ferroelectric memory cells (100, 200) which reduce fatigue effects of switching polarization of the ferroelectric devices associated with the memory cells such as ferroelectric capacitors (102, 202) and transistors (1002). Alteration of the rise and fall times associated with signals used to switch ferroelectric device polarization reduces fatigue of the ferroelectric material thereby increasing the useful life of ferroelectric memory cells. Slowing the rise and fall times as well as the rate of signal level rise and fall, (signal shape), reduces fatigue effects of switching polarization of ferroelectric devices. Methods and apparatus for producing a triangular ('sawtooth') signal waveform (322), a Gaussian signal waveform (422), and a waveform (522) having exponential rise anf fall times are disclosed.

Ferroelectric memory and method of operating same

A ferroelectric memory 636 includes a group of memory cells ( 645, 12, 201, 301, 401, 501 ), each cell having a ferroelectric memory element ( 44, 218, etc.), a drive line ( 122, 322, 422, 522 etc.) on which a voltage for writing information to the group of memory cells is placed, a bit line ( 25, 49, 125, 325, 425, 525, etc.) on which information to be read out of the group of memory cells is placed, a preamplifier ( 20, 42, 120, 320, 420, etc.) between the memory cells and the bit line, a set switch ( 14, 114, 314, 414, 514, etc.) connected between the drive line and the memory cells, and a reset switch ( 16, 116, 316, 416, 516, etc.) connected to the memory cells in parallel with the preamplifier. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.

Method of fabricating an integrated circuit using self-patterned thin films

A first photosensitive liquid solution is applied to a substrate, patterned through exposure to radiation and development, and annealed to form a desired solid material, such as SrBi 2 Ta 2 O 9 , that is incorporated into a component of an integrated circuit Fabrication processes are designed protect the self-patterned solid material from conventional IC processing and to protect the conventional materials, such as silicon, from elements in the self-patterned solid material. In one embodiment, a layer of bismuth oxide is formed on the SrBi 2 Ta 2 O 9 and a silicon oxide hole is etched to the bismuth oxide. The bismuth oxide protects the SrBi 2 Ta 2 O 9 from the etchant, and is reduced by the etchant to bismuth. Any remaining bismuth oxide and much of the bismuth are vaporized in the anneal, and the remaining bismuth is incorporated into the SrBi 2 Ta 2 O 9 .

Misted deposition method of fabricating integrated circuits

A method and apparatus are disclosed for forming thin films of chemical compounds utilized in integrated circuits. The method includes steps forming a precursor liquid comprising a chemical compound in a solvent, providing a substrate within a vacuum deposition chamber, producing a mist of the precursor liquid, and flowing the mist into the deposition chamber while maintaining the chamber at ambient temperature to deposit a layer of the precursor liquid on the substrate. The liquid is dried to form a thin film of a solid material on the substrate, then the integrated circuit is completed to include at least a portion of the film of solid material in a component of the integrated circuit.

Layered superlattice material applications

Un circuit stratifié (36) comprend un matériau de surstructure stratifiée (60, 60', 92) représenté par la formule (1) dans laquelle A1, A2 ... Aj représentent des éléments de site A (84) d'une structure de type pérovskite, S1, S2 ... Sk représentent des éléentts générateurs de surstructure (87), B1, B2 ... Bl représentent des éléments de site B (86) d'une structure de type pérovskite (94), Q représente un anion (88), les exposants indiquent que les valences des éléments respectifs (84, 87, 86, 88), les indices indiquent le nombre d'atomes de l'élément de la cellule unitaire (89) et, au moins w1 et y1 sont non zéro. Quelques uns desdits matériaux sont des ferro-électriques extrêmement résistants et s'utilisent dans des mémoires non volatiles (36). D'autres sont des matériaux à constantes diélectriques élevées ne se détériorant pas pendant des périodes d'utilisation prolongée et s'appliquent à des mémoires volatiles (36). A laminated circuit (36) comprises a laminated substructure material (60, 60 ', 92) represented by the formula (1) in which A1, A2 ... Aj represent site elements A (84) of a structure of perovskite type, S1, S2 ... Sk represent elements generating the superstructure (87), B1, B2 ... Bl represent site elements B (86) of a structure of the perovskite type (94), Q represents a anion (88), the exponents indicate that the valences of the respective elements (84, 87, 86, 88), the indices indicate the number of atoms of the element of the unit cell (89) and, at least w1 and y1 are non zero. Some of said materials are extremely resistant ferroelectrics and are used in non-volatile memories (36). Others are materials with high dielectric constants which do not deteriorate during periods of prolonged use and apply to volatile memories (36).

Ferroelectric memory

A non-volatile integrated circuit memory (10, 11, 100, 200) in which the memory cell (10, 11) includes a first transistor gate (19, 36) overlying a first channel region (44A), a ferroelectric material (48) overlying a second channel region (44B), and a second transistor gate (23, 37) overlying a third channel region (44C). The channel regions (44A, 44B, 44C) are connected in series, and preferably are contiguous portions of a single semiconducting channel (44). The first channel (44A) is connected to a plate voltage that is 20 % to 50 % of the coercive voltage of the ferroelectric material. A sense amplifier (110) is connected to the third channel region (44C) via a bit line (108). The rise of the bit line after reading a logic '1' state of the cell is prevented from disturbing the ferroelectric material by shutting off the third channel before the sense amplifier rises.

Methods and apparatus for material deposition

Methods and apparatus for depositing thin films of complex (compound) materials, including ferroelectrics, superconductors, and materials with high dielectric constants by photo/plasma-enhanced chemical vapor deposition from stabilized compound sources. Multiple heating and/or spectral energy sources are used for applying high energy, rapid thermal pulses in a precise timed sequence. Sol-gels of compound sources are ultrasonically atomized before being introduced to the deposition chamber.

Lanthanide series layered superlattice materials for integrated circuit applications

An integrated circuit (40) includes a layered superlattice material (57) including one or more of the elements cerium, praseodymium, neodymium, promethium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium. These elements may either be A-site elements or superlattice generator elements in the layered superlattice material. In one embodiment, one or more of these elements substitute for bismuth in a bismuth layered material. They also are preferably used in combination with one or more of the following elements: strontium, calcium, barium, bismuth, cadmium, lead, titanium, tantalum, hafnium, tungsten, niobium, zirconium, bismuth, scandium, yttrium, lanthanum, antimony, chromium, thallium, oxygen, chlorine, and fluorine. Some of these materials are ferroelectrics that crystallize at relatively low temperatures. Others are high dielectric constant materials that do not degrade or break down over long periods of use.

Improvement of liquid deposition by selection of liquid viscosity and other precursor properties

A plurality of liquids, the flow of each controlled by a volumetric flowrate controller (515, 535), are mixed in a mixer to form a final precursor that is misted and then deposited on a substrate. A physical property of precursor liquid is adjusted by adjusting the volumetric flowrate controllers (515, 535), so that when precursor is applied to substrate and treated, the resulting thin film of solid material (30, 50, 236, 489, 492) has a smooth and planar surface (31, 51, 235, 488, 493). Typically the physical property is the viscosity of the precursor, which is selected to be relatively low, in the range of 1 - 2 centipoise.

Integrated circuit electrode structure and process for fabricating same

An electrode for a ferroelectric electronic device is formed on an SiO 2 isolation layer by depositing an adhesion layer, such as titanium, between about 25 Å and 500 Å thick, then a layer of a nobel metal, such as platinum, that is at least 10 times thicker than the adhesion layer. The electrode is then annealed at a temperature higher than the minimum oxide eutectic temperature of the adhesion layer. The electrode is moved into the annealing furnace at a ramp rate such that it reaches its anneal temperature in five minutes or less. The relative thinness of the adhesion layer and the quick ramp up of the anneal causes all the titanium to be tied up in the oxide before it can diffuse through the platinum, and prevents the formation of rutile phases of the titanium and defects such as voids and hillocks in the platinum, which can destabilize the electrode.

Method and apparatus for misted deposition of thin films

A liquid mass flow controller (15) controls the delivery of a precursor to a mist generator (12), which produces a charged mist. The mist passes into a velocity reduction chamber (636), and then flows into a deposition chamber (632) through inlet ports (688) in a mist inlet plate (682) that is both a partition between the chambers and a grounded upper electrode. The inlet plate (682) is located above and substantially parallel to the plane of the substrate (600) on which the mist is to be deposited. The substrate (600) is positively charged to accelerate the mist. There are 68.2 inlet ports per cm2 in an inlet port area (687) of 252 cm2 of the mist inlet plate (682) directly above the substrate (600). The inlet port area (687) is approximately equal to a substrate deposition area (601). An exhaust port (642) defines a channel about periphery of an exhaust plane parallel to and below the substrate plane.

Chemical vapor deposition vaporizer

A Chemical Vapor Deposition (CVD) vaporizer comprising: a liquid supply assembly (102) having an environment supporting a liquid state for a plurality of precursor components of a liquid precursor blend (114); a venturi (112) operative to atomize said liquid precursor blend; a vaporization chamber (106), located proximate to said liquid supply assembly and said venturi, having an environment supporting a vapor state (148) for said plurality of precursor components; and a thermal barrier (104) located between said liquid supply assembly and said vaporization chamber enabling preservation of a substantial temperature disparity between said liquid supply assembly and said proximately located vaporization chamber.

Method and apparatus for misted deposition of thin films

A liquid mass flow controller (15) controls the delivery of a precursor to a mist generator (12). The precursor is misted utilizing a venturi (460) in which a combination of oxygen and nitrogen gas is charged by a corona wire (328) and passes over a precursor-filled throat (466). The particle size of the mist is reduced in a mist refiner (302), passes into a velocity reduction chamber (636), and then flows into a deposition chamber (632) through inlet ports (688) in a mist inlet plate (682) that is both a partition between the chambers and a grounded upper electrode. The inlet plate (682) is located above and substantially parallel to the plane of the substrate (600) on which the mist is to be deposited. An accelerator (18) accelerates the charged mist particles in an electric field between the upper electrode and the lower electrode towards the substrate (600). The residual mist is withdrawn from the deposition chamber (632) via an exhaust port (642).

Ferro-elektrischer speicher und sein betriebsverfahren

Thin film capacitors on silicon germanium substrate and process for making the same

An integrated circuit capacitor (10, 25, 30, 402) containing a thin film of dielectric metaloxide (20, 420) is formed above a silicon germanium substrate (12, 406). A silicon nitride diffusion barrier layer (24, 324, 414) is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode (16, 418) is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400 °C, and annealed at between 600 °C and 850 °C to form a BST capacitor dielectric (20, 420). A top electrode (22, 422) is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.

Verwendung von schichtigem übergitter material

Apparatus for fabricating an integrated circuit

Misted precursor deposition apparatus and method with improved mist and mist flow

A substrate (5) is located within a deposition chamber (2), the substrate defining a substrate plane. A barrier plate (6) is disposed in spaced relation above the substrate and substantially parallel thereto, the area of said barrier plate in a plane parallel to said substrate being substantially equal to said area of said substrate in said substrate plane, i.e. within 10 % of said substrate area. The barrier plate has a smoothness tolerance of 5 % of the average distance between said barrier plate and said substrate. A mist (66) is generated, allowed to settle in a buffer chamber (42), filtered through a 1 micron filter (33), and flowed into the deposition chamber between the substrate and barrier plate to deposit a liquid layer on the substrate. The liquid is dried to form a thin film (1130) of solid material on the substrate, which is then incorporated into an electrical component (1112) of an integrated circuit (1110).

Apparatus for fabricating an integrated circuit

Thin film capacitors on silicon germanium substrate and process for making the same

An integrated circuit capacitor (10, 25, 30, 402) containing a thin film of dielectric metaloxide (20, 420) is formed above a silicon germanium substrate (12, 406). A silicon nitride diffusion barrier layer (24, 324, 414) is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode (16, 418) is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400 °C, and annealed at between 600 °C and 850 °C to form a BST capacitor dielectric (20, 420). A top electrode (22, 422) is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.

Verfahren zur herstellung von schichtigen supergittermaterialien.

Ferroelectric flat panel displays

A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using an inventive liquid precursor containing an alkoxycarbolyxate. The thin film thickness is preferably in the range of 50-140 nm, so that polarizability and transparency of the thin film is enhanced. A display element may comprise a varistor device to prevent cross-talk between pixels and to enable sudden polarization switching. A functional gradient in the ferroelectric thin film enhances electron emission. Two ferroelectric elements, one on either side of the phosphor may be used to enhance luminescence. A phosphor can be sandwiched between a dielectric and a ferroelectric layer to enhance emission.

Ion beam construction of I/C memory device

Integrated circuit electrode structure and process for fabricating same

An electrode (79, 329) for a ferroelectric electronic device (80, 317C) is formed on an SiO2 isolation layer (77, 324) by depositing an adhesion layer (98, 326), such as titanium, between about 25 Å and 500 Å thick, then a layer (81, 328) of a nobel metal, such as platinum, that is at least 10 times thicker than the adhesion layer. The electrode is then annealed at a temperature higher than the minimum oxide eutectic temperature of the adhesion layer. The electrode is moved into the annealing furnace at a ramp rate such that it reaches its anneal temperature in five minutes or less. The relative thinness of the adhesion layer and the quick ramp up of the anneal causes all the titanium to be tied up in the oxide before it can diffuse through the platinum, and prevents the formation of rutile phases of the titanium and defects such as voids and hillocks in the platinum, which can destabilize the electrode.

Infrared sensor and imager with differential ferroelectric cells

A pyrometer cell comprises a first ferroelectric capacitor, a second ferroelectric capacitor, and a difference circuit for determining the difference between the polarization charge, voltage, or current between the first and second ferroelectric capacitors. The cell is pulsed a plurality of times and an integrator circuit connected to the difference circuit provides an enhanced output signal representative of the integrated difference. An infrared imager is formed by an array of the pyrometer cells, with one ferroelectric capacitor in each cell exposed to an infrared source and the other ferroelectric capacitor not exposed to the infrared source.

Method of liquid deposition by selection of liquid viscosity and other precursor properties

Improvement of liquid deposition by selection of liquid viscosity and other precursor properties

A plurality of liquids, the flow of each controlled by a volumetric flowrate controller (515, 535), are mixed in a mixer to form a final precursor that is misted and then deposited on a substrate. A physical property of precursor liquid is adjusted by adjusting the volumetric flowrate controllers (515, 535), so that when precursor is applied to substrate and treated, the resulting thin film of solid material (30, 50, 236, 489, 492) has a smooth and planar surface (31, 51, 235, 488, 493). Typically the physical property is the viscosity of the precursor, which is selected to be relatively low, in the range of 1 - 2 centipoise.

Liquid source formation of thin films using hexamethyl-disilazane

Method and apparatus for fabrication of integrated circuit by selective deposition of precursor liquid

Liquid source formation of thin films using hexamethyl-disilazane

A precursor liquid comprising several metal 2-ethylhexanoates, such as strontium, tantalum and bismuth 2-ethylhexanoates, in a xylenes/methyl ethyl ketone solvent is prepared, a substrate (5, 858) is placed within a vacuum deposition chamber (2), a small amount of hexamethyl-disilazane is added to the precursor liquid, is misted, and the mist is flowed into the deposition chamber to deposit a layer of the precursor liquid on the substrate. The liquid is dried, baked, and annealed to form a thin film (506, 860) of a layered superlattice material, such as strontium bismuth tantalate, on the substrate. Then an integrated circuit (600, 850) is completed to include at least a portion of the layered superlattice material film in a component (604, 872) of the integrated circuit.

Pyroelectric sensor

A ferroelectric/pyroelectric sensor employs a technique for determining a charge output of a ferroelectric scene element (134) of the sensor by measuring the hysteresis loop output of the scene element (134) several times during a particular time frame for the same temperature. An external AC signal is applied to the ferroelectric scene element (134) to cause the hysteresis loop output from the element (134) to switch polarization. Charge integration circuitry (138), such as a combination output capacitor and operational amplifier, is employed to measure the charge from the scene element (134). Preferably, the ferroelectric of the scene element (134) is made of SBT or derivative thereof, disposed directly between the top and bottom electrodes. Because of the frequency characteristics of the sensor, created by the external AC signal, the element (134) need not be thermally isolated from the silicon substrate by a traditional air bridge, and instead is preferably thermally isolated by spin-on-glass, SOG. To prevent saturation of an output signal voltage of the sensor by excessive charge accumulation in an output capacitor, the sensor has a reference element (132) in parallel with the scene element (134). When the voltage of the AC signal is negative the output capacitor is discharged by flowing current through the reference element (132) thus interrogating the polarization of the reference element (132) which is compared to and subtracted from the polarization of the scene element (134) for each cycle. The polarization difference measured for each cycle over a set time period are summed by an integrating amplifier to produce a signal output.

Low temperature oxidizing method of making a layered superlattice material