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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 432. Отображено 185.
18-06-2019 дата публикации

Temperature compensation circuits

Номер: US0010325655B2

A temperature compensation circuit may comprise a temperature sensor to sense a temperature signal of a memristor crossbar array, a signal converter to convert the temperature signal to an electrical control signal, and a voltage compensation circuit to determine a compensation voltage based on the electrical control signal and pre-calibrated temperature data of the memristor crossbar array.

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02-09-2021 дата публикации

TWO-STAGE RAMP ADC IN CROSSBAR ARRAY CIRCUITS FOR HIGH-SPEED MATRIX MULTIPLICATION COMPUTING

Номер: US20210271732A1
Автор: Ning Ge
Принадлежит: TETRAMEM INC.

Technologies relating to implementing two-stage ramp ADCs in crossbar array circuits for high performance matrix multiplication are disclosed. An example two-stage ramp ADC includes: a transimpedance amplifier configured to convert an input signal from current to voltage; a comparator connected to the transimpedance amplifier; a switch bias set connected to the comparator; a switch side capacitor in parallel with the switch bias set; a ramp side capacitor in parallel with the switch bias set; a ramp generator connected to the comparator via the ramp side capacitor, wherein the ramp generator is configured to generate a ramp signal; a counter; and a memory connected to the comparator, wherein the memory is configured to store an output of the comparator.

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08-11-2022 дата публикации

Crossbar array circuits with 2T1R RRAM cells for low voltage operations

Номер: US0011495638B2
Автор: Wenbo Yin, Ning Ge
Принадлежит: TETRAMEM INC.

Technologies relating to crossbar array circuits with a 2T1R RRAM cell that includes at least one NMOS transistor and one PMOS transistor for low voltage operations are disclosed. An example apparatus includes a word line; a bit line; a first NMOS transistor; a second PMOS transistor; and an RRAM device. The first NMOS transistor and the second PMOS transistor are in parallel as a pair, wherein the pair connects in series with the RRAM device. The apparatus may further include an inverter, via which the second gate terminal of the second PMOS transistor is connected to the first gate terminal.

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03-05-2016 дата публикации

Forming memristors on imaging devices

Номер: US0009331278B2

Forming memristors on imaging devices can include forming a printhead body comprising a first conductive material, forming a memory on the printhead body by performing an oxidation process to form a switching oxide material on the first conductive material, and forming a second conductive material on the switching oxide material.

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26-03-2020 дата публикации

DEFECT MITIGATION IN A CROSSBAR-BASED COMPUTING ENVIRONMENT

Номер: US20200096564A1
Автор: Ning Ge, GE NING, Ge, Ning
Принадлежит: TETRAMEM INC.

Systems and methods for mitigating defects in a crossbar-based computing environment are disclosed. In some implementations, an apparatus comprises: a first row wire; a second row wire having a defective device; and a crossbar array configured to receive a first input signal. The defective device is associated with a defect pattern; the first row wire and the second row wire are located within the crossbar array; and the first input signal is configured to be provided to the first row wire. The apparatus further comprises a shuffling module connected to the crossbar array and configured to divert the input signal from the first row wire to the second row wire in accordance with a determination that the defect pattern is within a predefined approximation to a target circuit pattern associated with the first input signal. 1. An apparatus comprising:a first row wire;a second row wire having a defective device, wherein the defective device is associated with a defect pattern; the first row wire and the second row wire are located within the crossbar array; and', 'the first input signal is configured to be provided to the first row wire;, 'a crossbar array configured to receive a first input signal, wherein'}a shuffling module connected to the crossbar array and configured to divert the input signal from the first row wire to the second row wire in accordance with a determination that the defect pattern is within a predefined approximation to a target circuit pattern associated with the first input signal.2. The apparatus as claimed in claim 2 , wherein the defect pattern includes an un-tunable conductance and the target circuit pattern includes a target conductance of a device to which the first input signal was configured to be provided to.3. The apparatus as claimed in claim 1 , wherein the shuffling module is further configured to divert away from the second row wire in accordance with a second determination that the defect pattern is outside the predefined ...

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29-10-2019 дата публикации

Substance detection device

Номер: US0010458918B2

In an example implementation, a substance detection device includes a substrate having nanoimprinted chamber walls and nanostructures. The chamber walls define a chamber and the nanostructures are positioned within the chamber to react to a substance introduced into the chamber. A two-dimensional (2D) orifice plate is affixed to the chamber walls and forms a top side of the chamber.

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02-02-2017 дата публикации

NON-VOLATILE MEMORY ELEMENT WITH THERMAL-ASSISTED SWITCHING CONTROL

Номер: US20170032837A1

A non-volatile memory element with thermal-assisted switching control is disclosed. The non-volatile memory element is disposed on a thermal inkjet resistor. Methods for manufacturing the combination and methods of using the combination are also disclosed. 1. A non-volatile memory element with thermal-assisted switching control , wherein the resistive memory element is disposed on a thermal element.2. The non-volatile memory element of claim 1 , comprising a memristor.3. The non-volatile memory element of claim 1 , wherein the thermal element is a thermal inkjet resistor claim 1 , the non-volatile memory element further comprising the thermal inkjet resistor claim 1 , a passivation layer on the thermal inkjet resistor claim 1 , and the resistive memory element on the passivation layer.4. The non-volatile memory element of claim 3 , in which the thermal inkjet resistor comprises a relatively low resistivity electrically conducting material disposed on a relatively high resistivity electrically conducting material.5. The non-volatile memory element of claim 4 , in which the thermal inkjet resistor is selected from the group consisting of AlCu on TaAl claim 4 , AlCu on WSiN claim 4 , AlCu on TaAlOx claim 4 , AlCu on TiN claim 4 , TaAl on TiN/AlCu claim 4 , WSiN on TiN/AlCu claim 4 , TaAlOx on TiN/AlCu claim 4 , and TiN on TiN/AlCu.6. The non-volatile memory element of claim 3 , wherein the passivation layer is selected from the group consisting of silicon nitride claim 3 , silicon carbide claim 3 , and silicon dioxide.7. The non-volatile memory element of claim 3 , wherein the resistive memory element is a memristor having a structure that includes a bottom electrode claim 3 , an active region claim 3 , and a top electrode.8. A method of manufacturing a multi-level programming non-volatile memory element claim 3 , including disposing a non-volatile memory element on a thermal element.9. The method of claim 8 , comprising:providing a thermal inkjet resistor as the ...

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23-11-2023 дата публикации

TUNNELING-BASED SELECTORS INCORPORATING VAN DER WAALS (VDW) MATERIALS

Номер: US20230380189A1
Автор: Minxian Zhang, Ning Ge
Принадлежит: TetraMem Inc.

In accordance with some embodiments of the present disclosure a tunneling-based selector is provided. The selector includes a multilayer barrier structure fabricated between a first electrode and a second electrode. The multilayer barrier structure includes a first layer of a first van der Waals (vdW) material; a second layer of a second vdW material; and a third layer of a third vdW material. The first layer of the first vdW material is fabricated between the second layer of the second vdW material and the third layer of the third vdW material. The electron affinity of the first layer of the first vdW material is lower than the second electron affinity of the second layer of the second vdW material and the electron affinity of the third layer of the vdW material.

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31-01-2019 дата публикации

3D PRINTER WITH TUNED COOLANT DROPLETS

Номер: US20190030797A1

According to an example, a three-dimensional (3D) printer may include a first delivery device to selectively deposit a fusing agent onto a layer of build materials and a second delivery device to deposit coolant droplets at tuned drop weights onto the layer of build materials. The 3D printer may also include a controller to control the second delivery device to selectively deposit the coolant droplets at the tuned drop weights onto selected areas of the build material layer, in which the drop weights of the selectively deposited coolant droplets are tuned to provide a thermal balance between multiple areas of the build material layer during application of fusing radiation onto the build material layer. 1. A three-dimensional (3D) printer comprising:a first delivery device to selectively deposit a fusing agent onto a layer of build materials;a second delivery device to deposit coolant droplets at tuned drop weights onto the layer of build materials; anda controller to control the second delivery device to selectively deposit the coolant droplets at the tuned drop weights onto selected areas of the build material layer, wherein the drop weights of the selectively deposited coolant droplets are tuned to provide a thermal balance between multiple areas of the build material layer during application of fusing radiation onto the build material layer.2. The 3D printer according to claim 1 , wherein the controller is to determine fusing radiation absorption levels at the multiple areas of the build material layer at which the fusing agent is to be selectively deposited and to determine the drop weights of the coolant droplets to be selectively deposited onto the selected areas to reach the thermal balance between the multiple areas based upon the determined fusing radiation absorption levels at the multiple areas.3. The 3D printer according to claim 2 , wherein fusing agents having different fusing radiation absorption properties with respect to each other are deposited ...

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02-11-2017 дата публикации

DOUBLE BIAS MEMRISTIVE DOT PRODUCT ENGINE FOR VECTOR PROCESSING

Номер: US20170316828A1
Принадлежит:

A double bias dot-product engine for vector processing is described. The dot product engine includes a crossbar array having N×M memory elements to store information corresponding to values contained in an N×M matrix, each memory element being a memristive storage device. First and second vector input registers including N voltage inputs, each voltage input corresponding to a value contained in a vector having N×1 values. The vector input registers are connected to the crossbar array to supply voltage inputs to each of N row electrodes at two locations along the electrode. A vector output register is also included to receive voltage outputs from each of M column electrodes.

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26-08-2021 дата публикации

ANALOG TO ANALOG QUANTIZER IN CROSSBAR ARRAY CIRCUITS FOR IN-MEMORY COMPUTING

Номер: US20210266000A1
Автор: Ning Ge
Принадлежит: TETRAMEM INC.

Technologies relating to analog-to-analog quantizers with an intrinsic Rectified Linear Unit (ReLU) function designed for in-memory computing are disclosed. An apparatus, in some implementations, includes: a DAC; a first crossbar connected to the DAC; a first analog quantizer connected to the first crossbar; a buffer connected to the first analog quantizer; a second crossbar connected to the buffer; and an ADC connected to the second crossbar.

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29-10-2020 дата публикации

IMPLEMENTING MEMRISTOR CROSSBAR ARRAY USING NON-FILAMENTARY RRAM CELLS

Номер: US20200343305A1
Принадлежит: TETRAMEM INC.

Technologies relating to implementing memristor crossbar arrays using non-filamentary RRAM cells are disclosed. In some implementations, an apparatus comprises: a first row wire; a first column wire; a non-filamentary RRAM; and an access control device. The non-filamentary RRAM and the access control device are serially connected; the non-filamentary RRAM and the access control device connect the first row wire with the first column wire. The non-filamentary RRAM and the access control device may form a cross-point device. The cross-point device may be less than 40×40 nm2. A set current of the non-filamentary RRAM may be no more than 10 μA; and a reset current of the non-filamentary RRAM is no more than 10 μA. The access control device may comprise a transistor or a selector.

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18-01-2022 дата публикации

Enhanced reality system with haptic retargeting

Номер: US0011226674B2

An enhanced reality system, in an example, includes an input device, the input device including a first arm and a second arm configured to be held together by a user; a sensor to sense, at least, a relative position of at least a portion of the first and second arms; wherein sensing, at least, the relative position of the first and second arms comprises a haptic retargeting process that simulates a touching of ends of the first and second arms to the outer surface of a virtual object presented in the enhanced reality environment.

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20-10-2020 дата публикации

Fluid ejection device and particle detector

Номер: US0010807373B2

In one example in accordance with the present disclosure, a fluid ejection device is described. The fluid ejection device includes a number of nozzles to eject fluid. Each nozzle includes a firing chamber to hold fluid, a nozzle orifice through which to dispense fluid, and an ejector disposed in the firing chamber to eject fluid through the nozzle orifice. The fluid ejection device also includes a particle detector to detect the presence of foreign particles within the fluid in the firing chamber.

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03-10-2017 дата публикации

Fluid ejection device with ground electrode exposed to fluid chamber

Номер: US0009776419B2

An example provides a fluid ejection device including a fluid feed slot, a fluid chamber between a nozzle layer and a passivation layer, and a printhead-integrated sensor to sense a property of a fluid in the fluid chamber. The sensor may include a ground electrode exposed to the fluid chamber through a via in the passivation layer.

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13-07-2017 дата публикации

Management Controller

Номер: US20170199746A1
Принадлежит:

A system management controller with a consolidated memory is disclosed. The example computing device includes a processor to host an operating system and a system memory to be used by the processor to execute instructions. The computing device also includes a management controller to enable out-of-band management of the computing device. The management controller includes a consolidated memory device. A first memory block of the consolidated memory device is used by the management controller as a working memory and a second memory block of the consolidated memory device is used for long-term storage of programming instructions.

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14-07-2020 дата публикации

Activatable surface enhanced Raman spectroscopy sensor stage

Номер: US0010712279B2

An activatable SEL sensor stage may include a substrate, cation metal-based material masses supported by the substrate and isolated from one another and dielectric capping layer over the cation metal-based material masses to inhibit oxidation of the cation metal-based material masses.

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17-11-2022 дата публикации

RESISTIVE RANDOM-ACCESS MEMORY DEVICES WITH MULTI-COMPONENT ELECTRODES

Номер: US20220367803A1
Автор: Minxian Zhang, Ning Ge
Принадлежит:

The present disclosure relates to resistive random-access memory (RRAM) devices. In some embodiments, a RRAM device may include a first electrode; a second electrode comprising an alloy containing tantalum; and a switching oxide layer positioned between the first electrode and the second electrode, wherein the switching oxide layer includes at least one transition metal oxide. The alloy containing tantalum may further contain at least one of hafnium, molybdenum, tungsten, niobium, or zirconium. In some embodiments, the alloy containing tantalum may include one or more of a binary alloy containing tantalum, a ternary alloy containing tantalum, a quaternary alloy containing tantalum, a quinary alloy containing tantalum, a senary alloy containing tantalum, and a high order alloy containing tantalum.

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20-12-2022 дата публикации

Large-scale crossbar arrays with reduced series resistance

Номер: US0011532786B2
Автор: Ning Ge
Принадлежит: TETRAMEM INC.

Technologies for reducing series resistance are disclosed. An example method may comprise: forming a first layer on a temporary substrate; forming a second layer on the first layer; etching the first layer and the second layer to form a trench; electroplating a top electrode via the trench, wherein the top electrode partially formed on a top surface of the second layer; removing the first layer and the second layer; forming a curable layer on the temporary substrate and the top electrode; removing the temporary substrate from the curable layer and the top electrode; forming a cross-point device on the curable layer and the top electrode; forming a bottom electrode on the cross-point device; and forming a flexible substrate on the bottom electrode.

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02-06-2022 дата публикации

RRAM CROSSBAR ARRAY CIRCUITS WITH SPECIALIZED INTERFACE LAYERS FOR LOW CURRENT OPERATION

Номер: US20220173315A1
Автор: Minxian Zhang, Ning Ge
Принадлежит: Tetramem Inc

Technologies relating to RRAM crossbar array circuits with specialized interface layers for the low current operations are disclosed. An example apparatus includes: a substrate; a bottom electrode formed on the substrate; a first layer formed on the bottom electrode; an RRAM oxide layer formed on the first layer and the bottom electrode; and a top electrode formed on the RRAM oxide layer. The first layer may be a continuous layer or a discontinuous layer. The apparatus may further comprise a second layer formed between the RRAM oxide layer and the top electrode. The second layer may be a continuous layer or a discontinuous layer.

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24-05-2022 дата публикации

Build material particle fusing in a chamber containing vapor

Номер: US0011338508B2

According to an example, an apparatus may include an agent delivery device to selectively deliver an agent onto a layer of build material particles. The apparatus may also include an energy source to apply energy onto the layer of build material particles to selectively fuse the build material particles in the layer based upon the locations at which the agent was delivered and a chamber formed of a plurality of walls, in which the agent delivery device and the energy source are housed inside the chamber. The apparatus may further include a vapor source to supply vapor into the chamber to wet the build material particles inside the chamber.

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13-07-2021 дата публикации

Dual-purpose calibration system for optical pressure sensitive paint considering static and sinusoidal pressure changes, and calibration method

Номер: US0011060938B2

A dual-purpose calibration system for an optical pressure sensitive paint considering static and sinusoidal pressure changes, and a calibration method, in which a dual-purpose calibration tube is used in common, are provided. In the dual-purpose calibration system, a dynamic adapter and a static adapter are replaced with each other to achieve switching between dynamic calibration and static calibration, so that two calibration methods, one static and the other dynamic, can be implemented by the dual-purpose calibration system. The switching between the dynamic calibration and the static calibration includes changing between the dynamic adapter and static adapter, and setting a sound source corresponding to the dynamic adapter or setting a gas source corresponding to the static adapter.

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04-01-2022 дата публикации

Implementing memristor crossbar array using non-filamentary RRAM cells

Номер: US0011217630B2
Автор: Minxian Zhang, Ning Ge
Принадлежит: TetraMem Inc.

Technologies relating to implementing memristor crossbar arrays using non-filamentary RRAM cells are disclosed. In some implementations, an apparatus comprises: a first row wire; a first column wire; a non-filamentary RRAM; and an access control device. The non-filamentary RRAM and the access control device are serially connected; the non-filamentary RRAM and the access control device connect the first row wire with the first column wire. The non-filamentary RRAM and the access control device may form a cross-point device. The cross-point device may be less than 40×40 nm2. A set current of the non-filamentary RRAM may be no more than 10 μA; and a reset current of the non-filamentary RRAM is no more than 10 μA. The access control device may comprise a transistor or a selector.

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19-12-2017 дата публикации

Resistive elements to operate as a matrix of probabilities

Номер: US0009847124B2

An example apparatus includes a crossbar array of signal lines and control lines. The example apparatus also includes an input controller in circuit with the control lines. The input control is to select one of the control lines. The example apparatus also includes first resistive elements connected between corresponding ones of the control lines and corresponding ones of the signal lines. The first resistive elements have first conductances set to operate as a matrix of probabilities that define a fixed transition kernel of a Markov Chain. The example apparatus also includes second resistive elements in circuit with the signal lines. The second resistive elements have second conductances set to select one of the signal lines exclusive of others of the signal lines based on a subset of the probabilities in the matrix of the probabilities.

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14-05-2019 дата публикации

Management controller

Номер: US0010289423B2

A system management controller with a consolidated memory is disclosed. The example computing device includes a processor to host an operating system and a system memory to be used by the processor to execute instructions. The computing device also includes a management controller to enable out-of-band management of the computing device. The management controller includes a consolidated memory device. A first memory block of the consolidated memory device is used by the management controller as a working memory and a second memory block of the consolidated memory device is used for long-term storage of programming instructions.

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20-03-2018 дата публикации

Addressing an EPROM on a printhead

Номер: US0009919517B2

Addressing an EPROM on a printhead is described. In an example, a printhead includes an electronically programmable read-only memory (EPROM) having a plurality of cells arranged in rows and columns, each of the cells having a addressing port, a row select port, and a column select port. A conductor is coupled to the addressing portion of each of the plurality of cells. A column shift register is coupled to the column select ports of the plurality of cells, the column shift register having a register location for each column of the plurality of cells and having an input to receive a first input signal. A row shift register is coupled to row select ports of the plurality of cells, the row shift register having a register location for each row of the plurality of cells and having an input to receive a second input signal.

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12-05-2020 дата публикации

Substance detection device

Номер: US0010648915B2

In an example implementation, a substance detection device includes a chamber with chamber walls, a chamber top, and a chamber bottom. A substrate comprises imprinted nanostructures positioned within the chamber, and the substrate is coupled to the chamber walls to form the chamber bottom. An inert gas is sealed within the chamber.

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14-07-2020 дата публикации

Analyte detection package with integrated lens

Номер: US0010712278B2

Provided in one example is an analyte detection package that includes a chamber, a surface-enhanced luminescence analyte stage within the chamber, and a lens integrated as part of the package to focus radiation onto the analyte stage.

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03-03-2020 дата публикации

Fluid reservoir with fluid property and level detection

Номер: US0010576748B2

A fluid reservoir (101) includes a number of electrode pairs disposed within the fluid reservoir. Each of the electrode pairs includes a number of sensing electrodes (103), and a number of electrical traces (105) wherein the sensing electrodes are coupled to a respective one of the electrical traces. The fluid reservoir also includes a common electrode (104) electrically coupled to a voltage source (106). A number of properties of a fluid (110) within the fluid reservoir are detected by applying a voltage between the sensing electrodes in an electrode pair, and a level of the fluid within the fluid reservoir is detected by applying a voltage between the electrodes and the common electrode. A multiplexer (102) may be used to selectively couple the sensing electrodes (103) to a processing device (108). The fluid reservoir may be a printing fluid container.

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30-11-2021 дата публикации

Electronic device and communication method

Номер: US0011190384B2
Принадлежит: SONY CORPORATION, SONY CORP, Sony Corporation

An electronic device and communication method are disclosed. The electronic device comprises a processing circuit configured to perform a pre-processing operation on a first one-dimensional sequence of modulation symbols, the pre-processing operation including: performing a dimension-increasing conversion to convert the first one-dimensional sequence of modulation symbols into a first multi-dimensional modulation symbol block; transforming the first multi-dimensional modulation symbol block into a second multi-dimensional modulation symbol block with a first transformation, wherein the first transformation couples each symbol in the first multi-dimensional modulation symbol block with each other; and performing a dimension-decreasing conversion to convert the second multi-dimensional modulation symbol block into a second one-dimensional sequence of modulation symbols, wherein the dimension-decreasing conversion is an inverse process of the dimension-increasing conversion. The processing ...

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22-12-2020 дата публикации

Providing thermal shield to RRAM cells

Номер: US0010873024B2
Принадлежит: TETRAMEM INC, TETRAMEM INC.

The technology of a crossbar array circuit and method of improving thermal shielding are disclosed. An example apparatus includes a bottom wire; a first vertical thermal shielding layer formed on the bottom wire, a bottom electrode formed on the first vertical thermal shielding layer; a filament forming layer formed on the bottom electrode; a top electrode formed on the filament forming layer; a second vertical thermal shielding layer formed on the top electrode; a top wire formed on the second vertical thermal shielding layer, wherein the filament forming layer is configured to form a filament within the filament forming layer when applying a switching voltage upon the filament forming layer, and wherein a material of the first vertical thermal shielding layer and the second vertical thermal shielding layer includes ReOx, RuOx, IrOx, ITO, a combination thereof, or an alloy or doping thereof (with or without other thermally conductive materials).

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14-07-2020 дата публикации

Heated NANO finger collapse for capture of molecules in gas for sensing

Номер: US0010712280B2

A gas conduit directs a flow of gas from a gas flow source. A surface enhanced luminescence (SEL) stage is within the conduit and includes a substrate and nano fingers projecting from the substrate. A heater heats the nano fingers to a temperature so as to soften the nano fingers such that the nano fingers collapse towards each other to capture molecules entrained in the gas therebetween.

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18-06-2020 дата публикации

ARRANGEMENT DETERMINATION FOR 3D FABRICATED PARTS

Номер: US20200193716A1

According to an example, an apparatus may include a memory that may store instructions to cause a processor to generate, for each part to be fabricated in a build envelope of a 3D fabricating device, first level descriptions and second level descriptions for the part. The processor may determine, using the first level descriptions, whether there is an arrangement that results in the parts jointly fitting within the build envelope while providing certain thermal decoupling spaces between the parts. In response to a determination that the arrangement using the first level descriptions for the parts has not been determined, the processor may determine, using the second level descriptions, whether there is an arrangement that results in the parts jointly fitting within the build envelope while providing the certain thermal decoupling spaces.

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22-09-2016 дата публикации

PRINTHEADS HAVING MEMORIES FORMED THEREON

Номер: US20160271947A1

Printheads having memories formed thereon are disclosed. An example apparatus includes a printhead body comprising a first metal layer. The example apparatus also include a memory formed on the print-head body. The memory includes the first metal layer as a first electrode, a second metal layer as a second electrode, and a switching oxide layer between the first and second metal layers.

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31-01-2019 дата публикации

DOUBLE BIAS MEMRISTIVE DOT PRODUCT ENGINE FOR VECTOR PROCESSING

Номер: US20190035463A1
Принадлежит:

A double bias dot-product engine for vector processing is described. The dot product engine includes a crossbar array having N×M memory elements to store information corresponding to values contained in an N×M matrix, each memory element being a memristive storage device. First and second vector input registers including N voltage inputs, each voltage input corresponding to a value contained in a vector having N×1 values. The vector input registers are connected to the crossbar array to supply voltage inputs to each of N row electrodes at two locations along the electrode. A vector output register is also included to receive voltage outputs from each of M column electrodes.

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28-04-2022 дата публикации

CROSSBAR ARRAY CIRCUITS WITH 2T1R RRAM CELLS FOR LOW VOLTAGE OPERATIONS

Номер: US20220130902A1
Автор: Wenbo Yin, Ning Ge
Принадлежит: TETRAMEM INC.

Technologies relating to crossbar array circuits with a 2T1R RRAM cell that includes at least one NMOS transistor and one PMOS transistor for low voltage operations are disclosed. An example apparatus includes a word line; a bit line; a first NMOS transistor; a second PMOS transistor; and an RRAM device. The first NMOS transistor and the second PMOS transistor are in parallel as a pair, wherein the pair connects in series with the RRAM device. The apparatus may further include an inverter, via which the second gate terminal of the second PMOS transistor is connected to the first gate terminal.

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06-03-2018 дата публикации

Ink property sensing on a printhead

Номер: US0009908332B2

Ink property sensing on a printhead is described. In an example, a substrate for a printhead includes a cap layer having bores. Chambers are formed beneath the cap layer in fluidic communication with the bores. Fluid ejectors are disposed in at least a portion of the chambers. At least one ion-sensitive field effect transistor (ISFET) is disposed in a respective at least one of the chambers. An electrode is disposed in each of the chambers having an ISFET and capacitively coupled to said ISFET through a dielectric.

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10-05-2022 дата публикации

Reducing current in crossbar array circuits with large output resistance

Номер: US0011328772B2
Автор: Miao Hu, Ning Ge
Принадлежит: TetraMem, Inc., TETRAMEM INC.

Methods of using large output resistance with adjusted conductance mapping value to reduce the current in crossbar array circuit are disclosed. An example method of simulating a crossbar array circuit having a crossbar array, includes steps of: S1. testing the crossbar array; S2. calibrating a simulation model; S3. simulating the crossbar array with the simulation model, wherein a simulation result is generated after the S3; S4. determining a fixed ratio of ideal current from the simulation result; S5. adjusting conductance mapping value to let the crossbar array pass the fixed ratio of ideal current and generating a conductance matrix; S6. programming the conductance matrix to the crossbar array; S7. passing an input signal to the crossbar array and generating a computing result; and S8. checking the quality of computing results.

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02-08-2022 дата публикации

Surface enhanced luminescence sensor nano finger

Номер: US0011402332B2

A surface enhanced luminescence (SEL) sensor may include a substrate and nano fingers extending from the substrate. In one implementation, the nano fingers may be arranged in a cluster of at least three nano fingers extending from the substrate. The nano fingers of the cluster having different geometries so as to bend into a closed state such that each of the nano fingers of the cluster are linked to one another.

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23-10-2018 дата публикации

Double bias memristive dot product engine for vector processing

Номер: US0010109348B2

A double bias dot-product engine for vector processing is described. The dot product engine includes a crossbar array having N×M memory elements to store information corresponding to values contained in an N×M matrix, each memory element being a memristive storage device. First and second vector input registers including N voltage inputs, each voltage input corresponding to a value contained in a vector having N×1 values. The vector input registers are connected to the crossbar array to supply voltage inputs to each of N row electrodes at two locations along the electrode. A vector output register is also included to receive voltage outputs from each of M column electrodes.

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05-09-2017 дата публикации

Printhead with separate address generator for ink level sensors

Номер: US0009751320B2
Автор: Ning Ge, GE NING, Ge Ning

A printhead with a separate address generator for ink level sensors is described. In an example, a printhead includes drop ejectors fluidically coupled to nozzles, at least one nozzle address generator, nozzle decoders coupled to nozzle address generator(s) and the drop ejectors, ink level sensors each having a sensor circuit in a sensor chamber and a purging resistor circuit, a sensor address generator, and sensor decoders coupled to the sensor address generator and the purging resistor circuit in each of the ink level sensors.

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25-01-2022 дата публикации

Isotope detecting devices

Номер: US0011231687B2

A device for detecting isotopes includes an isotope portion including a material including an isotope of an element, a reaction control portion to cause a chemical reaction of the material, and an electrical parameter portion to measure a change in an electrical parameter of the material, where the change in the electrical parameter is caused by the chemical reaction, and where the change in the electrical parameter is dependent on the isotope in the material, to detect the isotope by comparing the change in the electrical parameter of the material with a known electrical parameter associated with a known isotope.

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14-02-2019 дата публикации

PARTICULATE BUILD MATERIAL

Номер: US20190047215A1

The present disclosure is drawn to a particulate build material for three-dimensional printing. The particulate build material can include a plurality of particulates, wherein individual particulates include a particulate core having a photosensitive coating applied to a surface of the particulate core. The particulate core includes a metal, a ceramic, or both a metal and a ceramic. The photosensitive coating includes a polymer having a photosensitive agent suspended or attached therein. 1. A particulate build material , comprising a plurality of particulates , wherein individual particulates comprise a particulate core having a photosensitive coating applied to a surface of the particulate core , the particulate core comprises a metal , a ceramic , or both a metal and a ceramic , and wherein the photosensitive coating comprises a polymer having a photosensitive agent suspended or attached therein.2. The particulate build material of claim 1 , wherein the particulate core is the metal and includes antimony claim 1 , chrome claim 1 , nickel claim 1 , steel claim 1 , stainless steel claim 1 , titanium claim 1 , tin claim 1 , gold claim 1 , silver claim 1 , bronze claim 1 , aluminum claim 1 , copper claim 1 , platinum claim 1 , zinc claim 1 , lead claim 1 , alloys thereof claim 1 , or combination thereof.3. The particulate build material of claim 1 , wherein the particulate core is the ceramic and includes aluminum oxide claim 1 , dense and nonporous aluminum oxides claim 1 , porous aluminum oxides claim 1 , aluminum-calcium-phosphorus oxides claim 1 , bioglasses claim 1 , boron nitride claim 1 , boron carbide claim 1 , borosilicate glass claim 1 , calcium aluminates claim 1 , calcium carbonate claim 1 , calcium sulfates claim 1 , ceravital claim 1 , corals claim 1 , ferric-calcium-phosphorus oxides claim 1 , glass fibers and their composites claim 1 , glasses claim 1 , dense and nonporous glasses claim 1 , hydroxyapatites claim 1 , dense hydroxyapatites claim 1 , ...

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08-04-2014 дата публикации

Method and device for transmitting and receiving signal in wireless communication system

Номер: US0008693565B2

A method and device for transmitting and receiving a signal in a wireless communication system. The method for transmitting a signal in a wireless communication system includes: receiving an original data block to be transmitted, the length of the original data block being M, wherein M is an integer; disordering the original data block for one or more times, whereby M data symbols in the original data block are rearranged in each of the one or more times of the disordering, so as to obtain one or more disordered data blocks with length of M; cascading the original data block and the one or more disordered data blocks with a cyclic prefix, to form an equalized signal of frequency domain diversity with time-frequency interleaving; and transmitting the equalized signal of frequency domain diversity through a single carrier.

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20-12-2022 дата публикации

Two-stage ramp ADC in crossbar array circuits for high-speed matrix multiplication computing

Номер: US0011531728B2
Автор: Ning Ge
Принадлежит: TetraMem Inc., TETRAMEM INC.

Technologies relating to implementing two-stage ramp ADCs in crossbar array circuits for high performance matrix multiplication are disclosed. An example two-stage ramp ADC includes: a transimpedance amplifier configured to convert an input signal from current to voltage; a comparator connected to the transimpedance amplifier; a switch bias set connected to the comparator; a switch side capacitor in parallel with the switch bias set; a ramp side capacitor in parallel with the switch bias set; a ramp generator connected to the comparator via the ramp side capacitor, wherein the ramp generator is configured to generate a ramp signal; a counter; and a memory connected to the comparator, wherein the memory is configured to store an output of the comparator.

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13-10-2020 дата публикации

Electronic device and communication method

Номер: US0010804985B2
Принадлежит: SONY CORPORATION, SONY CORP, Sony Corporation

The present disclosure relates to an electronic device and communication method. The electronic device comprising a RF link unit radiating a data stream in form of electromagnetic wave radiation onto a phase shifter; a processing circuitry configured to determine an analog precoding matrix; phase shifters, each of which for performing analog precoding on the received signal of the electromagnetic wave radiation according to the determined analog precoding matrix, and an antenna array, each of antenna elements of which transmits the analog precoded signal, wherein the number of the phase shifters is the same as the number of the antenna elements of the antenna array, and the phase shifters and the antenna elements are in one-to-one correspondence.

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07-09-2021 дата публикации

Reducing column switch resistance errors in RRAM-based crossbar array circuits

Номер: US0011114158B1
Автор: Ning Ge, GE NING, Ge, Ning
Принадлежит: TetraMem Inc., TETRAMEM INC, TETRAMEM INC.

Systems and methods for reducing column switch resistance error RRAM-based crossbar array circuits are disclosed. An example crossbar array circuit includes: a crossbar array including a row wire, a column wire, and a cross-point device connected between the row wire and the column wire; a column switch having a column switch input and a column switch output, connected to the cross-point device; an Op-amp device having a non-inverting input, an inverting input, and an Op-amp output; a three-terminal switch having a first terminal, a second terminal, and a third terminal. The three-terminal switch is connected to the inverting input and is configured to switch between the column switch input and the column switch output; a load resistor is connected with the column switch output and the Op-amp output.

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10-10-2017 дата публикации

Semiconductor device and method of making same

Номер: US0009786777B2

A semiconductor device and method of forming the same is described. In an example, a polysilicon layer is deposited on a substrate having at least one polysilicon ring. The substrate is doped using the polysilicon layer as a mask to form doped regions in the substrate. A dielectric layer is deposited over the polysilicon layer and the substrate. The dielectric layer is etched to expose portions of the polysilicon layer. A metal layer is deposited on the dielectric layer. The metal layer, the dielectric layer, and the exposed portions of the polysilicon layer are etched such that at least a portion of each polysilicon ring is removed.

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24-08-2017 дата публикации

BI-POLAR MEMRISTOR

Номер: US20170243645A1

A circuit comprising an input, a ground, a first switch, a second switch and a bi-polar memristor, wherein the first switch is a first transistor and a gate of the first transistor is connected to a line to instruct setting of the bi-polar memristor, and the second switch is a second transistor and a gate of the second transistor is connected to a line to instruct re-setting of the bi-polar memristor.

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05-08-2021 дата публикации

CAPACITIVE CODE COMPARING

Номер: US20210240950A1

Apparatus, systems, articles of manufacture, and methods to facilitate capacitive code comparing are disclosed. An example apparatus includes a comparator to receive a first portion of a first input and a second portion of a second input, the comparator including a capacitor. The example apparatus further includes a peripheral determination circuit to cause the capacitor to couple the first portion to the second portion; in response to coupling the first portion to the second portion, ground the capacitor; sense a current discharged by the grounded capacitor; and determine a Hamming distance of the first input and the second input based on the sensed current discharged by the capacitor.

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19-10-2021 дата публикации

User authentication

Номер: US0011151245B2

Examples associated with user authentication are described. One example method includes authenticating a user of a device using a static authentication technique. A behavior profile associated with the user is loaded. The behavior profile describes a pattern of device usage behavior by the user in a three-dimensional space over a time slice. The behavior profile also identifies distinctive user habits. Usage of the device is monitored, and a behavior similarity index is periodically updated. The behavior similarity index describes a similarity between the usage of the device and the pattern of device usage behavior. The behavior similarity index is weighted based on the distinctive user habits. Access to the device is restricted when the behavior similarity index reaches a predefined threshold.

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03-10-2017 дата публикации

Fluid ejection device with integrated ink level sensor

Номер: US0009776412B2

In an embodiment, a fluid ejection device includes an ink slot formed in a printhead die. The fluid ejection device also includes a printhead-integrated ink level sensor (PILS) to sense an ink level of a chamber in fluid communication with the slot, and a clearing resistor circuit disposed within the chamber to clear the chamber of ink.

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31-08-2017 дата публикации

FLUID EJECTION DEVICE

Номер: US20170246866A1
Принадлежит:

A fluid ejection device is described. In an example, a device includes a substrate having a chamber formed thereon to Ncontain a fluid. A metal layer includes a resistor under the chamber having a surface thermally coupled to the chamber. At least one layer is deposited on the metal layer. A polysilicon layer is under the metal layer comprising a polysilicon structure under the resistor to change topography of the resistor such that the surface is uneven.

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17-05-2022 дата публикации

Arrangement determination for 3D fabricated parts

Номер: US0011335074B2

According to an example, an apparatus may include a memory that may store instructions to cause a processor to generate, for each part to be fabricated in a build envelope of a 3D fabricating device, first level descriptions and second level descriptions for the part. The processor may determine, using the first level descriptions, whether there is an arrangement that results in the parts jointly fitting within the build envelope while providing certain thermal decoupling spaces between the parts. In response to a determination that the arrangement using the first level descriptions for the parts has not been determined, the processor may determine, using the second level descriptions, whether there is an arrangement that results in the parts jointly fitting within the build envelope while providing the certain thermal decoupling spaces.

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14-07-2020 дата публикации

Hybrid memory devices

Номер: US0010714179B2

In some examples, a hybrid memory device includes multiple memory cells, where a given memory cell of the multiple memory cells includes a volatile memory element having a plurality of layers including electrically conductive layers and a dielectric layer between the electrically conductive layers, and a non-volatile resistive memory element to store different data states represented by respective different resistances of the non-volatile resistive memory element, the non-volatile resistive memory element having a plurality of layers including electrically conductive layers and a resistive switching layer between the electrically conductive layers of the non-volatile resistive memory element.

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02-11-2017 дата публикации

RATIOED LOGIC WITH A HIGH IMPEDANCE LOAD

Номер: US20170317680A1

A device having ratioed logic with a high impedance load is described. The device includes a pull-down network coupled between a first voltage and an output. The device also includes a high impedance load coupled between a second voltage and the output. The high impedance load being smaller than a transistor of the pull-down network.

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01-08-2019 дата публикации

PRINTING FLUID CARTRIDGE WITH ELECTRODES AND METHOD TO THE LEVEL OF FLUID IN A PRINTING FLUID CARTRIDGE

Номер: US20190232673A1

A sensing structure in an example may include at least three electrodes along an interior surface of a reservoir from a top portion of the reservoir to a bottom portion of the reservoir wherein at least one of the electrodes is closer to at least another electrode at the top portion of the reservoir than at the bottom portion of the reservoir.

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25-02-2020 дата публикации

Analyte detection package housing

Номер: US0010571399B2

In one example, an analyte detection package includes a substrate, surface-enhanced luminescence (SEL) structures extending from the substrate and a low wettability housing. The SEL structures have a first wettability for a given liquid. The low wettability housing extends from the substrate to form a chamber between the housing of the substrate about the SEL structures to receive an analyte containing solution. The housing has an inner surface adjacent the chamber, wherein the inner surface has a second wettability for the given liquid less than the first wettability.

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21-03-2023 дата публикации

Crossbar array circuit with parallel grounding lines

Номер: US0011610942B2
Автор: Ning Ge
Принадлежит: TetraMem Inc.

Technologies relating to crossbar array circuits with parallel grounding lines are disclosed. An example crossbar array circuit includes: a word line; a bit line; a first selector line, a grounding line; a first transistor including a first source terminal, a first drain terminal, a first gate terminal, and a first body terminal; and an RRAM device connected in series with the first transistor. The grounding line is connected to the first body terminal and is grounded and the grounding line parallel to the bit line. The first selector line is connected to the first gate terminal. In some implementations, the RRAM device is connected between the first transistor via the first drain terminal and the word line, and the first source terminal is connected to the bit line.

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23-01-2020 дата публикации

THERMALLY CONDUCTIVE PARTICULATE SENSOR

Номер: US20200023301A1

In an example, an air filter system includes an air filter and a thermally conductive particulate sensor (TCPS). The TCPS includes a temperature sensor to measure a first temperature of the TCPS at a first time, measure a second temperature of the TCPS at a second time, and provide the measured first temperature and the measured second temperature to a controller. The controller to determine an actual rate of temperature change based on the measured first temperature and the measured second temperature, compare the actual rate of temperature change to a target rate of temperature change, and provide a notification when a difference between the actual rate of temperature change and the target rate of temperature change is greater than an accumulation threshold indicative of a threshold amount of particulate accumulation on the TCPS. 1. An air filter system , comprising:an air filter to remove particulates from air flowing through the air filter; and measure a first temperature of the TCPS at a first time;', 'measure a second temperature of the TCPS at a second time; and', determine an actual rate of temperature change based on the measured first temperature and the measured second temperature;', 'compare the actual rate of temperature change to a target rate of temperature change; and', 'provide a notification when a difference between the actual rate of temperature change and the target rate of temperature change is greater than an accumulation threshold indicative of a threshold amount of particulate accumulation on the TCPS., 'provide the measured first temperature and the measured second temperature to a controller that is to], 'a thermally conductive particulate sensor (TCPS), positioned in a path of the air flowing through the air filter, including a temperature sensor to2. The system of claim 1 , wherein the TCPS further includes a temperature sensor selected from a group consisting of a thermistor claim 1 , a thermocouple claim 1 , a resistance thermometer ...

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11-06-2019 дата публикации

Nonvolatile memory cross-bar array

Номер: US0010319441B2

Provided in one example is a nonvolatile memory cross-bar array. The array includes: a number of junctions formed by a number of row lines intersecting a number of column lines; a first set of controls at a first set of the junctions coupling between a first set of the row lines and a first set of the column lines; a second set of controls at a second set of the junctions coupling between a second set of the row lines and a second set of the column lines; and a current collection line to collect currents from the controls of the first set and the second set through their respective column lines and output a result current corresponding to a sum of a first dot product and a second dot product.

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06-02-2020 дата публикации

MICRO LIGHT-EMITTING DIODE DISPLAY WITH 3D ORIFICE PLATING AND LIGHT FILTERING

Номер: US20200043902A1

A micro light-emitting diode (LED) display assembly includes a backplane, a passivation layer on the backplane, a micro LED on the passivation layer, and a non-transparent metal housing on the passivation layer, wherein the housing includes a base portion on the passivation layer, a sidewall portion upwardly extending from the base portion, a cap portion connected at a top of the sidewall portion, an orifice in the cap portion, and a notch in the cap portion and adjacent to the orifice. The assembly also includes a translucent filter positioned in the notch and covering the orifice, and a pocket defined by an enclosed area in between the sidewall portion, the cap portion, the filter, and the passivation layer, wherein the micro LED is encased within the pocket such that light transmitted from the micro LED directly hits and passes through the filter. 1. A micro light-emitting diode (LED) display assembly comprising:a backplane;a passivation layer on the backplane;a micro LED on the passivation layer; a base portion on the passivation layer;', 'a sidewall portion upwardly extending from the base portion;', 'a cap portion connected at a top of the sidewall portion; and', 'an orifice in the cap portion;, 'a non-transparent metal housing on the passivation layer, wherein the housing comprisesa translucent filter positioned in the notch and covering the orifice; anda pocket defined by an enclosed area in between the sidewall portion, the cap portion, the filter, and the passivation layer, wherein the micro LED is encased within the pocket such that light transmitted from the micro LED directly hits and passes through the filter.2. The assembly of claim 1 , comprising a plurality of micro LEDs on the passivation layer and encased within the pocket.3. The assembly of claim 1 , wherein the translucent filter comprises a translucent colored filter.4. The assembly of claim 1 , wherein the passivation layer directly faces the cap portion and the filter in the pocket.5. The ...

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09-05-2019 дата публикации

NONVOLATILE MEMORY CROSS-BAR ARRAY

Номер: US20190139605A1
Принадлежит:

Provided in one example is a nonvolatile memory cross-bar array. The array includes: a number of junctions formed by a number of row lines intersecting a number of column lines; a first set of controls at a first set of the junctions coupling between a first set of the row lines and a first set of the column lines; a second set of controls at a second set of the junctions coupling between a second set of the row lines and a second sat of the column lines; and a current collection line to collect currents from the controls of the first set and the second set through their respective column lines and output a result current corresponding to a sum of a first dot product and a second dot product. 115.-. (canceled)16. A non-transitory computer readable medium comprising computer executable instructions stored thereon that , when executed by a processor , cause the processor to: receive a number of programming signals, the programming signals defining a number of matrix values; and', 'receive a number of vector signals, the vector signals defining a number of vector values to be applied to the first set of controls and the second set of controls; and, 'control a first set of controls and a second set of controls of a nonvolatile memory cross-bar array tocalculate a sum of a first dot product and a second dot product using currents collected respectively from the first set of controls and the second set of controls, the currents corresponding to the matrix values and the vector values,wherein the nonvolatile memory cross-bar array includes a number of junctions formed by a number of row lines intersecting a number of column lines, the first set of controls at a first set of the junctions coupling between a first set of the row lines and a first set of the column lines, the second set of controls at a second set of the junctions coupling between a second set of the row lines and a second set of the column lines, each column line including a junction of the first set of ...

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01-10-2020 дата публикации

RRAM-BASED CROSSBAR ARRAY CIRCUITS WITH INCREASED TEMPERATURE STABILITY FOR ANALOG COMPUTING

Номер: US20200313087A1
Принадлежит: TETRAMEM INC.

Technologies relating to RRAM-based crossbar array circuits with increase temperature stability are disclosed. An example apparatus includes: a bottom electrode; a filament forming layer formed on the bottom electrode; and a top electrode formed on the filament forming layer, wherein the filament forming layer is configured to form a filament within the filament forming layer when applying a switching voltage upon the filament forming layer, and wherein a material of the filament includes nitrogen-doped Ta2O5, Ta2N/Ta2O5, or TaNyOz.

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15-03-2018 дата публикации

MEMRISTIVE CROSSBAR ARRAY HAVING MULTI-SELECTOR MEMRISTOR CELLS

Номер: US20180075904A1
Принадлежит:

A memristive crossbar array is described. The crossbar array includes a number of row lines and a number of column lines intersecting the row lines to form a number of cross points. A number of memristor cells are coupled between the row lines and the column lines at the cross points. A memristor cell includes a memristive memory element to store information and multiple selectors electrically coupled to the memristive memory element. The multiple selectors are to provide access to the memristive memory element. 1. A memristive crossbar array , the crossbar array comprising:a number of row lines;a number of column lines intersecting the row lines to form a number of cross points; anda number of memristor cells coupled between the row lines and the column lines at the cross points, a memristor cell comprising:a memristive memory element to store information; andmultiple selectors electrically coupled to the memristive memory element, the multiple selectors to provide access to the memristive memory element.2. The array of claim 1 , wherein the multiple selectors are serially coupled to the memristive memory element.3. The array of claim 1 , wherein the multiple selectors are asymmetric selectors.4. The array of claim 3 , wherein:a first selector is tuned towards a first voltage polarity; anda second selector is tuned towards a second, and opposite, voltage polarity.5. The array of claim 1 , wherein a selector is a volatile selector comprising:a first electrode;a second electrode; andan active region disposed between the first electrode and the second electrode;in which the active region comprises cationic species that aggregate to form a conductive channel between the first electrode and the second electrode when a selecting voltage is applied and that dissipate when the selecting voltage is removed.6. The array of claim 1 , wherein the multiple selectors are non-liner selectors having a nonlinearity of greater than 1 claim 1 ,000.7. A system for accessing ...

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18-03-2021 дата публикации

CHIPLESS RFID PRINTING METHODS

Номер: US20210083360A1

With the purpose of having RFID tags that are cheap to produce and that are environmentally friendly, it is disclosed a method and a system to manufacture chipless RFID tags. The method and system comprises printing a conductive track on a carbon-based substrate and selectively heating the substrate on the parts comprising the conductive track. The printing of the conductive track envisages using an ink comprising at least one of a metal carbide, a metal boride or a metal nitride. 2. The method of claim 1 , wherein the selective heating of the substrate is performed by directing a laser towards the conductive track.3. The method of claim 1 , wherein the substrate is substrate.4. The method of claim 3 , wherein the substrate is paper.5. The method of claim 1 , wherein the conductive track comprises a passive antenna.6. The method of claim 1 , wherein the conductive track comprises a resonator.7. The method of claim 1 , wherein the ink is a metal carbide comprising a material selected from MgCNi claim 1 , LaC claim 1 , YC claim 1 , MOC claim 1 , LaNiC claim 1 , MoAlC claim 1 , SiC claim 1 , TiC claim 1 , VC claim 1 , WC claim 1 , WC claim 1 , ZrC claim 1 , MoC claim 1 , or NbC.8. The method of claim 1 , wherein the ink is a metal nitride comprising a material selected from: TiN claim 1 , VN claim 1 , BN claim 1 , AlN claim 1 , CrN or MgSiN.9. The method of claim 1 , further comprising adding a top layer surface on the substrate over the conductive track.11. The system of claim 10 , wherein the ink is a metal carbide that comprises a material selected from MgCNi claim 10 , LaC claim 10 , YC claim 10 , MoC claim 10 , LaNiC claim 10 , MoAlC claim 10 , SiC TiC claim 10 , VC claim 10 , WC claim 10 , W2C claim 10 , ZrC claim 10 , MoC claim 10 , or NbC.12. The system of claim 10 , wherein the ink is a metal nitride that comprises a material selected from: TiN claim 10 , VN claim 10 , BN claim 10 , AlN claim 10 , CrN or MgSiN.13. The system of claim 10 , wherein the ...

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03-06-2014 дата публикации

Short-range wireless mobile terminal method and system

Номер: US0008744453B2

A mobile wireless terminal includes a first wireless unit, a second wireless unit, an audio codec, and a processor unit. The first wireless unit is configured to connect to a wireless relay coupled between the mobile wireless terminal and a phone network over a short-range wireless link. The second wireless unit is configured to connect to a cellular network over a long-range wireless link. The audio codec is configured to process the voice communication. Further, the processor unit is coupled to the first wireless unit and the second wireless unit, and is configured to make a voice communication using the second wireless unit with an external party via the cellular network over the long-range wireless link. The processor unit is also configured to register with the wireless relay to establish the short-range wireless link and, when the registration is successful, to switch from the second wireless unit to the first wireless unit to carry the voice communication with a phone network via ...

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03-09-2019 дата публикации

Split memory bank

Номер: US0010403362B2

A split memory bank may comprise a number of memory matrices forming a memory bank and a shift register in which the shift register physically separates the matrices. An integrated circuit may comprise a number of shift registers and a plurality of memory matrices forming a memory bank in which the matrices are spatially separated by the shift register. An integrated printhead may comprise a number of memory banks each comprising a plurality of memory matrices and a number of shift registers in which each shift register spatially separates a number of the matrices.

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22-03-2022 дата публикации

RRAM-based crossbar array circuits with increased temperature stability for analog computing

Номер: US0011283018B2
Автор: Ning Ge, Minxian Zhang
Принадлежит: TETRAMEM INC.

Technologies relating to RRAM-based crossbar array circuits with increase temperature stability are disclosed. An example apparatus includes: a bottom electrode; a filament forming layer formed on the bottom electrode; and a top electrode formed on the filament forming layer, wherein the filament forming layer is configured to form a filament within the filament forming layer when applying a switching voltage upon the filament forming layer, and wherein a material of the filament includes nitrogen-doped Ta2O5, Ta2N/Ta2O5, or TaNyOz.

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27-05-2021 дата публикации

CROSSBAR ARRAY CIRCUIT WITH PARALLEL GROUNDING LINES

Номер: US20210159274A1
Автор: Ning Ge, GE NING, Ge, Ning
Принадлежит: TETRAMEM INC.

Technologies relating to crossbar array circuits with parallel grounding lines are disclosed. An example crossbar array circuit includes: a word line; a bit line; a first selector line; a grounding line; a first transistor including a first source terminal, a first drain terminal, a first gate terminal, and a first body terminal; and an RRAM device connected in series with the first transistor. The grounding line is connected to the first body terminal and is grounded and the grounding line parallel to the bit line. The first selector line is connected to the first gate terminal. In some implementations, the RRAM device is connected between the first transistor via the first drain terminal and the word line, and the first source terminal is connected to the bit line. 1. An apparatus comprising:a word line;a bit line;a first selector line;a grounding line; a first source terminal;', 'a first drain terminal;', 'a first gate terminal; and', 'a first body terminal; and, 'a first transistor comprisingan RRAM device connected in series with the first transistor, wherein the grounding line is connected to the first body terminal and is grounded, and the grounding line is parallel to the bit line, wherein the first selector line is connected to the first gate terminal.2. The apparatus as claimed in claim 1 , wherein the RRAM device is connected between the first transistor via the first drain terminal and the word line claim 1 , and the first source terminal is connected to the bit line.3. The apparatus as claimed in claim 1 , further comprising:a second selector line; and a second source terminal;', 'a second drain terminal;', 'a second gate terminal; and', 'a second body terminal, wherein the second selector line is connected to the second gate terminal., 'a second transistor comprising4. The apparatus as claimed in claim 3 , wherein the first transistor is an NMOS transistor claim 3 , and the second transistor is a PMOS transistor.5. The apparatus as claimed in claim 3 , ...

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11-07-2017 дата публикации

Printheads having memories formed thereon

Номер: US0009701115B2

Printheads having memories formed thereon are disclosed. An example apparatus includes a printhead body comprising a first metal layer. The example apparatus also include a memory formed on the print-head body. The memory includes the first metal layer as a first electrode, a second metal layer as a second electrode, and a switching oxide layer between the first and second metal layers.

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12-12-2019 дата публикации

CONTROLLABLE READ BLOCKING BASED RADIO-FREQUENCY IDENTIFICATION

Номер: US20190377994A1

In some examples, a controllable read blocking based radio-frequency identification (RFID) device may include a substrate layer, and a trace formed of a conductive material and disposed on, partially within, or fully within the substrate layer. The controllable read blocking based RFID device may further include a controllable read blocking layer disposed on the substrate layer and the trace and including a fluid disposed in the controllable read blocking layer to selectively block or allow passage of electromagnetic waves to the trace to respectively inhibit or allow communication of a RFID reading device with the controllable read blocking based RFID device.

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13-10-2020 дата публикации

1T2R RRAM cell and common reactive electrode in crossbar array circuits

Номер: US0010804324B1
Принадлежит: TETRAMEM INC, TETRAMEM INC.

Technologies relating to a crossbar array circuit with a one-transistor-two-memristor (1T2R) Resistive Random-Access Memory (RRAM) and a common reactive electrode in the applications of the crossbar array circuit are disclosed. An example crossbar array circuit includes: a two-memristor structure, wherein the two-memristor structure includes: a first bottom electrode; a first RRAM stack formed on the first bottom electrode; a top electrode formed on the first RRAM stack; a second RRAM stack formed on the top electrode; and a second bottom electrode formed on the second RRAM stack, wherein the top electrode is a reactive or scavenging electrode which is configured to provide the first RRAM stack and the second RRAM stack with oxygen vacancies near the reactive electrode; and a one-transistor structure, wherein the one-transistor structure includes: a source electrode; a gate electrode; and a drain electrode, wherein the source electrode is connected to the top electrode.

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12-12-2017 дата публикации

Memristor apparatus with variable transmission delay

Номер: US0009842646B2

In an example, a memristor apparatus with variable transmission delay may include a first memristor programmable to have one of a plurality of distinct resistance levels, a second memristor, a transistor connected between the first memristor and the second memristor, and a capacitor having a capacitance, in which the capacitor is connected between the first memristor and the transistor. In addition, application of a reading voltage across the second memristor is delayed by a time period equivalent to the programmed resistance level of the first memristor and the capacitance of the capacitor.

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24-06-2021 дата публикации

MICROFLUIDIC PRESSURE SENSOR

Номер: US20210190616A1
Принадлежит:

A microfluidic pressure sensor may include a reference chamber, a sensed volume, a microfluidic channel connecting an interior of the reference chamber to an interior of the sensed volume, a volume of liquid contained and movable within the microfluidic channel while occluding the microfluidic channel and a sensor to output signals indicating positioning of the volume of liquid along the microfluidic channel. Positioning of the volume of liquid along microfluidic channel indicates a pressure of the sensed volume. 1. A microfluidic pressure sensor comprising:a reference chamber;a sensed volume;a microfluidic channel connecting an interior of the reference chamber to an interior of the sensed volume;a volume of liquid contained and movable within the microfluidic channel while occluding the microfluidic channel; anda sensor to output signals indicating positioning of the volume of liquid along the microfluidic channel, wherein positioning of the volume of liquid along microfluidic channel indicates a pressure of the sensed volume.2. The microfluidic pressure sensor of further comprising an expansion chamber fluidly coupled between the sensed volume and the microfluidic channel claim 1 , the expansion chamber having a volume size to receive the volume of liquid.3. The microfluidic pressure sensor of further comprising a temperature sensor.4. The microfluidic pressure sensor of claim 2 , wherein the sensor comprises an optical sensor along the microfluidic channel.5. The microfluidic pressure sensor of claim 4 , wherein the sensor comprises a second optical sensor along the microfluidic channel and spaced from the optical sensor.6. The microfluidic pressure sensor of claim 2 , wherein the liquid comprises electrically conductive liquid and wherein sensor comprises an impedance sensor comprising:a local ground along the channel, andan electrode along the channel and spaced from the local ground, wherein the electrode is to receive electrical current forming an electric ...

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29-09-2015 дата публикации

Compound slot

Номер: US0009144984B2

The present disclosure describes a compound slot, and systems and methods of forming the compound slot. An example of a compound slot includes a wafer, where the compound slot includes a trench along a long axis of the compound slot and on a top surface of the wafer, where the trench passes through an initial portion of a total depth of the wafer. A number of openings pass through a remaining portion of the total depth of the wafer, where at least a retained portion of a bottom of the trench is present around a perimeter of each of the number of openings.

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16-09-2021 дата публикации

FLUID EJECTION DEVICE WITH MULTI-CHAMBER NOZZLE

Номер: US20210283911A1

In one example In accordance with the present disclosure, a fluid ejection device is described. The fluid ejection device Includes a number of nozzles to eject fluid. Each nozzle Includes multiple firing chambers to hold fluid. The multiple firing chambers are separated: by a chamber partition. Each nozzle also includes a shared nozzle orifice in a substrate through which to dispense fluid. Each nozzle also Includes multiple ejectors, at least one ejector disposed in each firing chamber, in a common channel of the nozzle, fluid from the multiple firing chambers Is mixed, A height of the common channel is defined by the substrate and the chamber partition and is less than a width of the shared nozzle orifice.

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16-01-2018 дата публикации

Non-volatile memory element with thermal-assisted switching control

Номер: US0009870822B2

A non-volatile memory element with thermal-assisted switching control is disclosed. The non-volatile memory element is disposed on a thermal inkjet resistor. Methods for manufacturing the combination and methods of using the combination are also disclosed.

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30-03-2023 дата публикации

CROSSBAR ARRAY WITH REDUCED DISTURBANCE

Номер: US20230102234A1
Автор: Ning Ge
Принадлежит: TetraMem Inc.

The present application provides methods for programming a circuit device with reduced disturbances. The methods may include: selecting a first target device on a target row of a plurality of rows and a target column of a plurality of columns; selecting the target row; connecting the plurality of rows other than the target row to a voltage potential with the same polarity as a programming signal; grounding the target column; preparing the programming signal on the target rows; sending a pulse signal enable an access transistor on the target column; and sending the programming signal to pass the first target device.

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04-01-2018 дата публикации

ELECTROSTATIC DISCHARGE MEMRISTIVE ELEMENT SWITCHING

Номер: US20180006449A1
Принадлежит:

In the examples provided herein, an electrostatic discharge (ESD) recording circuit has a first memristive element coupled to a pin of an integrated circuit. The first memristive element switches from a first resistance to a second resistance when an ESD event occurs at the pin, and the first resistance is less than the second resistance. The ESD recording circuit also has shunting circuitry to shunt energy from an additional ESD event away from the first memristive element. 1. An electrostatic discharge (ESD) recording circuit comprising:first memristive element coupled to a pin of an integrated circuit, wherein the first memristive element switches from a first resistance to a second resistance when an ESD event occurs at the pin, wherein the first resistance is less than the second resistance; andshunting circuitry to shunt energy from an additional ESD event away from the first memristive element.9. The ESD recording circuit of claim 1 , further comprising an electrical vying circuit to apply a reset voltage to the first memristive element to reset the first memristive element to the first resistance.3. The ESD recording circuit of claim 1 , further comprising an electrical reading circuit to determine a resistance of the first memristive element.4. The ESD recording circuit of claim 1 , wherein the shunting circuitry comprises a first resistive element in parallel with the first memristive element that has a third resistance greater than the first resistance and less than the second resistance claim 1 , and further wherein a resistance of the first memristive element is maintained at the second resistance after switching from the first resistance until the resistance is reset to the first resistance.5. The ESD recording circuit of claim w herein the shunting circuitry comprises a first resistive element in parallel with the first memristive element that has a third resistance greater than the first resistance and less than the second resistance claim 1 , and ...

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15-10-2019 дата публикации

Surface enhanced luminescence electric field generating base

Номер: US0010444151B2

Provided in one example is an analyte detection apparatus that includes surface enhanced luminescence (SEL) structure. A dielectric layer underlies the SEL structure. An electric field generating base underlies the dielectric layer. The electric field generating base is to apply an electric field about the SEL structures to attract charged ions to the SEL structures.

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06-10-2022 дата публикации

RESISTIVE RANDOM-ACCESS MEMORY DEVICES WITH ENGINEERED ELECTRONIC DEFECTS AND METHODS FOR MAKING THE SAME

Номер: US20220320430A1
Автор: Minxian Zhang, Ning Ge
Принадлежит: TetraMem Inc.

The present disclosure relates to resistive random-access memory (RRAM) devices. A method for fabricating resistive random-access memory (RRAM) device may include fabricating, on a first electrode of the RRAM device, a first interface layer comprising a first discontinuous film of a first material; fabricating, on the first interface layer, a switching oxide layer comprising at least one transition metal oxide; fabricating a second interface layer on the switching oxide layer; and fabricating a defect engineering layer on the second interface layer. The first material is more chemically stable than the at least one transition metal oxide. The defect engineering layer includes a layer of Ti in some embodiments.

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30-10-2014 дата публикации

EPROM STRUCTURE USING THERMAL INK JET FIRE LINES ON A PRINTHEAD

Номер: US20140320558A1

An integrated circuit (IC) erasable programmable read-only memory (EPROM) structure for a thermal inkjet printhead includes: a fire line to provide fire line data; a select line to provide selecting data; a firing cell coupled to the fire line; an EPROM cell coupled to the fire line; a selector cell coupled to the select line, the firing cell and the EPROM cell; and a data switching circuit to provide address data to the firing cell or the EPROM cell. The data switching circuit and the selector cell selectively enable transfer of the fire line data from the fire line to the firing cell or the EPROM cell as a function of state of the selecting data on the select line and the address data from the data switching circuit.

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18-03-2014 дата публикации

Coupled short-range wireless mobile terminal and relay

Номер: US0008676120B2

A wireless communication system is provided. The wireless communication system includes a wireless relay and a mobile terminal. The wireless relay is coupled to a phone network. The mobile terminal is physically coupled to the wireless relay to make a voice communication with the phone network via the wireless relay. Further, the mobile terminal and the wireless relay exchange control data and voice data corresponding to the voice communication over a short-range wireless link based on one of a transparent mode and a translation mode. A signaling connection is established on an asynchronous connection-oriented logical (ACL) transport channel between the mobile terminal and the wireless relay for exchanging the control data, and a voice connection is established on a synchronous connection oriented (SCO) channel between the mobile terminal and the wireless relay for exchanging the voice data.

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26-09-2023 дата публикации

Code comparators with nonpolar dynamical switches

Номер: US0011769544B2
Автор: Ning Ge
Принадлежит: TetraMem Inc., TETRAMEM INC.

Code comparators with nonpolar dynamical switches are provided. An example apparatus comprises: a plurality of row wires; a plurality of column wires; one or more cross-point devices, and a nonpolar volatile two-terminal device formed within a plurality of cross-point devices. Each cross-point device in the plurality of cross-point devices is located at a cross-point between a row in the plurality of row wires and a column in the plurality of column wires; the nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device. The nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device.

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08-03-2012 дата публикации

METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING SIGNAL IN WIRELESS COMMUNICATION SYSTEM

Номер: US20120057625A1
Принадлежит: Tsinghua University, Sony Corporation

The present invention discloses a method and device for transmitting and receiving a signal in a wireless communication system. The method for transmitting a signal in a wireless communication system according to the present invention comprises: receiving an original data block to be transmitted, the length of the original data block being M, wherein M is an integer; disordering the original data block for one or more times, whereby M data symbols in the original data block are rearranged in each of the one or more times of the disordering, so as to obtain one or more disordered data blocks with length of M; cascading the original data block and the one or more disordered data blocks with a cyclic prefix, to form an equalized signal of frequency domain diversity with time-frequency interleaving; and transmitting the equalized signal of frequency domain diversity through a single carrier.

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17-07-2018 дата публикации

Selector relaxation time reduction

Номер: US0010026477B2

In one example, a volatile selector is switched from a low conduction state to a first high conduction state with a first voltage level and then the first voltage level is removed to activate a relaxation time for the volatile selector. The relaxation time is defined as the time the first volatile selector transitions from the high conduction state back to the low conduction state. The volatile selector is switched with a second voltage level of opposite polarity to the first voltage level to significantly reduce the relaxation time of the volatile selector.

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25-09-2018 дата публикации

Ink level sensing

Номер: US0010082414B2

In some examples, an ink level sensor includes a sense capacitor between a first node and ground, a first switch to couple a first voltage to the first node and charge the sense capacitor, a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node, and a transistor having a drain, a gate coupled to the second node, and a source coupled to ground, the transistor to provide a drain to source resistance in proportion to the second voltage.

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19-04-2018 дата публикации

TEMPERATURE COMPENSATION CIRCUITS

Номер: US20180108403A1
Принадлежит:

A temperature compensation circuit may comprise a temperature sensor to sense a temperature signal of a memristor crossbar array, a signal converter to convert the temperature signal to an electrical control signal, and a voltage compensation circuit to determine a compensation voltage based on the electrical control signal and pre-calibrated temperature data of the memristor crossbar array. 1. A temperature compensation circuit , comprising:a temperature sensor to sense a temperature signal of a memristor crossbar array;a signal converter to convert the temperature signal to an electrical control signal; anda voltage compensation circuit to determine a compensation voltage based on the electrical control signal and pre-calibrated temperature data of the memristor crossbar array.2. The temperature compensation circuit of claim 1 , further comprising a voltage source to apply the compensation voltage to the memristor crossbar array.3. The temperature compensation circuit of claim 1 , wherein the pre-calibrated temperature data comprises a temperature-dependent resistance of the memristors.4. The temperature compensation circuit of claim 3 , wherein the compensation voltage is to compensate for a difference in resistance of the memristors as a result of the temperature of the memristor crossbar array.5. The temperature compensation circuit of claim 1 , wherein the memristor crossbar array comprises:a plurality of row lines;a plurality of column lines;a plurality of memristors coupled between a unique combination of one row line and one column line.6. The temperature compensation circuit of claim 5 , wherein each of the memristors exhibits linear current-voltage behavior.7. The temperature compensation circuit of claim 5 , wherein the signal converter is an analog-to-digital converter.8. The temperature compensation circuit of claim 1 , wherein the temperature sensor comprises any of a diode sensor claim 1 , a temperature coefficient sensor claim 1 , a band gap circuit ...

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25-08-2016 дата публикации

PRINTHEAD WITH SEPARATE ADDRESS GENERATOR FOR INK LEVEL SENSORS

Номер: US20160243845A1
Автор: Ning Ge, GE NING, Ge Ning
Принадлежит:

A printhead with a separate address generator for ink level sensors is described. In an example, a printhead includes drop ejectors fluidically coupled to nozzles, at least one nozzle address generator, nozzle decoders coupled to nozzle address generator(s) and the drop ejectors, ink level sensors each having a sensor circuit in a sensor chamber and a purging resistor circuit, a sensor address generator, and sensor decoders coupled to the sensor address generator and the purging resistor circuit in each of the ink level sensors.

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16-02-2016 дата публикации

Frame image quality as display quality benchmark for remote desktop

Номер: US0009264704B2
Принадлежит: VMware, Inc.

A method is provided to measure an overall image quality score for a remote desktop on a first computer and accessed from a second computer. The method includes playing a video timestamp on the remote desktop at the first computer where the video timestamp includes unique timestamps, screen capturing first computer frames of the remote desktop at the first computer and second computer frames of the remote desktop at the second computer at the same time, determining a frame image quality score for each second computer frame by comparing the client screen to a corresponding baseline first computer frame, and determining the overall image quality score for the remote desktop from frame image quality scores of the second computer frames.

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21-01-2020 дата публикации

Analyte detection package with tunable lens

Номер: US0010539507B2

An analyte detection package includes a chamber, a surface-enhanced luminescence analyte stage within the chamber, and a tunable lens integrated with the package to focus radiation onto the analyte stage.

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03-05-2022 дата публикации

SELS nano finger sidewall coating layer

Номер: US0011320379B2

A surface enhanced luminescence (SELS) sensor may include a substrate and nano fingers projecting from the substrate. Each of the nano fingers may include a polymer pillar having a sidewall and a top, a coating layer covering the sidewall and a metal cap supported by and in contact with the top of the pillar.

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15-06-2021 дата публикации

Integrated circuits

Номер: US0011038033B2

The present subject matter relates to an integrated circuit. The integrated circuit includes a first metal layer and a second metal layer capacitively coupled to the first metal layer through a dielectric layer. Further, the second metal layer includes an electron leakage path to provide for leakage of charge from the second metal layer in a predetermined leak time period.

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16-03-2021 дата публикации

Particulate build material

Номер: US0010946584B2

The present disclosure is drawn to a particulate build material for three-dimensional printing. The particulate build material can include a plurality of particulates, wherein individual particulates include a particulate core having a photosensitive coating applied to a surface of the particulate core. The particulate core includes a metal, a ceramic, or both a metal and a ceramic. The photosensitive coating includes a polymer having a photosensitive agent suspended or attached therein.

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26-01-2021 дата публикации

Micro light-emitting diode display with 3D orifice plating and light filtering

Номер: US0010903194B2

A micro light-emitting diode (LED) display assembly includes a backplane, a passivation layer on the backplane, a micro LED on the passivation layer, and a non-transparent metal housing on the passivation layer. The housing includes a base portion on the passivation layer, a sidewall portion upwardly extending from the base portion, a cap portion connected at a top of the sidewall portion, an orifice in the cap portion, and a notch in the cap portion and adjacent to the orifice. The assembly also includes a translucent filter positioned in the notch and covering the orifice, and a pocket defined by an enclosed area in between the sidewall portion, the cap portion, the filter, and the passivation layer. The micro LED is encased within the pocket such that light transmitted from the micro LED directly hits and passes through the filter.

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27-09-2018 дата публикации

FOCAL ADJUSTMENT FOR ANALYTE DETECTION PACKAGE

Номер: US20180275065A1
Принадлежит:

An analyte detection system includes an analyte detection package to be presented to a reading device, and a focus mechanism to adjust a focal point of the analyte detection package relative to the reading device, with the analyte detection package including a surface-enhanced luminescence analyte stage, the reading device including optics to receive scattered radiation emitted luminescence from the analyte stage, and the focus mechanism to adjust the focal point relative to the optics.

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17-11-2020 дата публикации

Producing instructions that control three-dimensional printing from voxels

Номер: US0010838401B2

In some examples, a data representation is received that includes voxels relating to a volumetric property and a functional property of portions of a three-dimensional (3D) object to be formed by a 3D printing system, and trajectory voxels containing information to guide operation of a machine that manipulates portions of the 3D object during 3D printing. Information of the voxels relating to the volumetric property and the functional property and the information of the trajectory voxels are combined to produce instructions that control the 3D printing system to build the 3D object.

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03-08-2017 дата публикации

MEMRISTOR APPARATUS WITH VARIABLE TRANSMISSION DELAY

Номер: US20170221558A1
Принадлежит:

In an example, a memristor apparatus with variable transmission delay may include a first memristor programmable to have one of a plurality of distinct resistance levels, a second memristor, a transistor connected between the first memristor and the second memristor, and a capacitor having a capacitance, in which the capacitor is connected between the first memristor and the transistor. In addition, application of a reading voltage across the second memristor is delayed by a time period equivalent to the programmed resistance level of the first memristor and the capacitance of the capacitor.

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17-07-2018 дата публикации

Memristors with oxide switching layers

Номер: US0010026894B2

An example memristor includes a first conductive layer, a switching layer, and a second conductive layer. The first conductive layer may include a first conductive material and a second conductive material. The second conductive material may have a higher diffusivity than the first conductive material. The switching layer may be coupled to the first conductive layer and may include a first oxide having the first conductive material and a second oxide having the second conductive material. The second conductive layer may be coupled to the switching layer.

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28-06-2012 дата публикации

SHORT-RANGE WIRELESS RELAY METHOD AND SYSTEM

Номер: US20120165008A1
Автор: GE NING, MENG ZHIWEI, Zhang Yi
Принадлежит: BEIJING GREEN STONE TECHNOLOGY LIMITED

A wireless relay apparatus is provided. The wireless relay apparatus includes a first wireless module configured to couple with a wireless access network to receive a phone call, and a second wireless module coupled to the first wireless module to process the phone call and configured to wirelessly connect to a mobile terminal such that the telephone call is forwarded to the mobile terminal over a short-range wireless link. Further, the second wireless module is configured to operate in one of a transparent mode and a translation mode so as to exchange voice data with the mobile terminal. 1. A wireless relay apparatus , comprising:a first wireless module configured to couple with a wireless access network to receive a phone call; anda second wireless module coupled to the first wireless module to process the phone call and configured to wirelessly connect to a mobile terminal such that the telephone call is forwarded to the mobile terminal over a short-range wireless link,wherein the second wireless module is configured to operate in one of a transparent mode and a translation mode so as to exchange voice data with the mobile terminal.2. The wireless relay apparatus according to claim 1 , wherein:The short-range wireless link is a Bluetooth wireless link.3. The wireless relay apparatus according to claim 1 , wherein:The first wireless module supports a cellular wireless link.4. The wireless relay apparatus according to claim 1 , wherein:the second wireless module uses standard modem commands supported by the first wireless module to exchange control data corresponding to the phone call with the mobile terminal when operating in the transparent mode; andthe second wireless module uses abstract telephony protocol (ATP) commands to exchange control data corresponding to the phone call with the mobile terminal when operating in the translation mode, and translates the ATP commands into the standard modem commands supported by the first wireless module.5. The wireless ...

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01-11-2012 дата публикации

COUPLED SHORT-RANGE WIRELESS MOBILE TERMINAL AND RELAY

Номер: US20120276912A1
Принадлежит: BEIJING GREEN STONE TECHNOLOGY LIMITED

A wireless communication system is provided. The wireless communication system includes a wireless relay and a mobile terminal. The wireless relay is coupled to a phone network. The mobile terminal is physically coupled to the wireless relay to make a voice communication with the phone network via the wireless relay. Further, the mobile terminal and the wireless relay exchange control data and voice data corresponding to the voice communication over a short-range wireless link based on one of a transparent mode and a translation mode. A signaling connection is established on an asynchronous connection-oriented logical (ACL) transport channel between the mobile terminal and the wireless relay for exchanging the control data, and a voice connection is established on a synchronous connection oriented (SCO) channel between the mobile terminal and the wireless relay for exchanging the voice data. 1. A wireless communication system , comprising:a wireless relay coupled to a phone network; anda mobile terminal physically coupled to the wireless relay to make a voice communication with the phone network via the wireless relay,wherein the mobile terminal and the wireless relay exchange control data and voice data corresponding to the voice communication over a short-range wireless link based on one of a transparent mode and a translation mode, anda signaling connection is established on an asynchronous connection-oriented logical (ACL) transport channel between the mobile terminal and the wireless relay for exchanging the control data, and a voice connection is established on a synchronous connection oriented (SCO) channel between the mobile terminal and the wireless relay for exchanging the voice data.2. The wireless communication system according to claim 1 , wherein:the short-range wireless link is a Bluetooth wireless link.3. The wireless communication system according to claim 1 , wherein:the wireless relay is configured as a casing for the mobile terminal.4. The ...

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14-03-2013 дата публикации

FLUID EJECTION DEVICE HAVING FIRST AND SECOND RESISTORS

Номер: US20130063527A1
Принадлежит:

A fluid ejection device comprises a first resistor layer that comprises at least a first resistor for heating fluid and a second resistor layer that comprises at least a second resistor for heating fluid. There is an electrically insulating layer between the first and second resistor layers. A print cartridge for a printer comprises a fluid container and a printhead, at least one nozzle, a first resistor layer that comprises at least a first resistor for pre-heating or thermally ejecting fluid, a second resistor layer that comprises at least a second resistor for pre-heating or thermally ejecting fluid, and an electrically insulating layer between the first and second resistor layers. 1. A thermal fluid ejection device comprising:a first resistor layer comprising at least a first resistor thermally coupled to a chamber to heat a fluid;a second resistor layer comprising at least a second resistor thermally coupled to the chamber to heat the fluid; andan electrically insulating layer between said first and second resistor layers.2. The fluid ejection device of wherein said first and second resistors have different resistances.3. The fluid ejection device of wherein said first and second resistors have the same resistance.4. The fluid ejection device of wherein the first and second resistor layers have different thicknesses.5. The fluid ejection device of wherein the first and second resistor layers are formed from different materials.6. The fluid ejection device of wherein the first and second resistors are stacked such that said second resistor at least partially overlaps said first resistor with at least said electrically insulating layer between the first and second resistors.7. The fluid ejection device of wherein the first and second resistor layers comprise metals selected from the group comprising TaAl claim 1 , WSiN and TaSiN.8. The fluid ejection device of wherein the first resistor layer comprises a first conductive layer and a second conductive layer; the ...

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01-01-2015 дата публикации

APPARATUSES INCLUDING A PLATE HAVING A RECESS AND A CORRESPONDING PROTRUSION TO DEFINE A CHAMBER

Номер: US20150001321A1
Принадлежит:

An example provides an apparatus including a plate having a nozzle orifice, a flat portion, and a first surface having a recess forming a corresponding protrusion extending from a second surface, opposite first surface, of the plate. A substrate may be in spaced relation to the flat portion of the plate such that the protrusion extends toward the substrate and such that the flat portion and the substrate define, at least in part, a chamber. 1. A fluid ejection apparatus comprising:a plate including a nozzle orifice, a flat portion, and a first surface having a recess forming a corresponding protrusion extending from a second surface, opposite the first surface, of the plate; anda substrate in spaced relation to the flat portion of the plate such that the protrusion extends toward the substrate and such that the flat portion and the substrate define, at least in part, a firing chamber.2. The apparatus of claim 1 , wherein the protrusion extends toward a fluid feed slot of the substrate claim 1 , the fluid feed slot to provide a fluid to the firing chamber and the protrusion to filter particles in the fluid from entering the firing chamber.3. The apparatus of claim 1 , wherein the plate includes a plurality of other protrusions extending from the first surface of the plate and wherein the flat portion and the substrate define a plurality of other firing chambers claim 1 , the plurality of other protrusions to filter particles from entering corresponding ones of the plurality of other firing chambers.4. The apparatus of claim 1 , wherein the flat portion and the substrate define a plurality of other firing chambers claim 1 , the protrusion to filter particles from entering corresponding ones of the plurality of other firing chambers.5. The apparatus of claim 1 , further comprising a barrier layer coupling the flat portion of the plate to the substrate and further defining the firing chamber.6. The apparatus of claim 1 , wherein the substrate includes a circuit pattern ...

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02-01-2020 дата публикации

FILTER ASSEMBLY WITH CHARGE ELECTRODES

Номер: US20200001306A1

In an example, an air filter assembly includes an air filter to remove particulates from air flowing through the air filter, sense electrodes coupled to the air filter, the sense electrodes spaced apart in a direction that is transverse to a direction of a flow of the air, a sense interconnects to couple the sense electrodes to a first power source to drive a sense electrode of the sense electrodes to a sense power, charge electrodes coupled to the air filter, where the charge electrodes are spaced apart from and adjacent to the sense electrodes, and charge interconnects to couple the charge electrodes to a second power source to drive a charge electrode of the charge electrodes to a charge power different from the sense power. 1. An air filter assembly , comprising:an air filter to remove particulates from air flowing through the air filter;sense electrodes coupled to the air filter, the sense electrodes spaced apart in a direction that is transverse to a direction of a flow of the air;a sense interconnects to couple the sense electrodes to a first power source to drive a sense electrode of the sense electrodes to a sense power;charge electrodes coupled to the air filter, wherein the charge electrodes are spaced apart from and adjacent to the sense electrodes; andcharge interconnects to couple the charge electrodes to a second power source to drive a charge electrode of the charge electrodes to a charge power different from the sense power.2. The air filter assembly of claim 1 , wherein the sense electrodes include a first sense electrode and a second sense electrode claim 1 , and wherein the charge electrodes include a first charge electrode and a second charge electrode spaced apart from and adjacent to the first sense electrode and the second sense electrode claim 1 , respectively.3. The air filter assembly of claim 1 , wherein the charge electrodes are positioned at a location off center on the air filter to attract particulates to the off-center location.4. ...

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01-01-2015 дата публикации

FRAME IMAGE QUALITY AS DISPLAY QUALITY BENCHMARK FOR REMOTE DESKTOP

Номер: US20150002681A1
Принадлежит:

A method is provided to measure an overall image quality score for a remote desktop on a first computer and accessed from a second computer. The method includes playing a video timestamp on the remote desktop at the first computer where the video timestamp includes unique timestamps, screen capturing first computer frames of the remote desktop at the first computer and second computer frames of the remote desktop at the second computer at the same time, determining a frame image quality score for each second computer frame by comparing the client screen to a corresponding baseline first computer frame, and determining the overall image quality score for the remote desktop from frame image quality scores of the second computer frames. 1. A method to measure an overall image quality score for a remote desktop on a first computer and accessed from a second computer , the method comprising:playing a video timestamp on the remote desktop at the first computer, the video timestamp comprising unique timestamps;screen capturing first computer frames of the remote desktop at the first computer and second computer frames of the remote desktop at the second computer at the same time;determining a frame image quality score for each second computer frame by comparing the client screen to a corresponding baseline first computer frame; anddetermining the overall image quality score for the remote desktop from frame image quality scores of the second computer frames.2. The method of claim 1 , wherein the determining a frame image quality score for each second computer frame comprises:selecting a target first computer frame that has a same timestamp as the second computer frame;when the target first computer frame is equal to a previous first computer frame and a next first computer frame in the first computer frames, selecting the target first computer frame as the baseline first computer frame; determining three frame image quality scores by comparing the second computer frame to ...

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06-01-2022 дата публикации

REDUCING CURRENT IN CROSSBAR ARRAY CIRCUITS WITH LARGE OUTPUT RESISTANCE

Номер: US20220005526A1
Автор: GE NING, Hu Miao
Принадлежит: TETRAMEM INC.

Methods of using large output resistance with adjusted conductance mapping value to reduce the current in crossbar array circuit are disclosed. An example method of simulating a crossbar array circuit having a crossbar array, includes steps of: S1. testing the crossbar array; S2. calibrating a simulation model; S3. simulating the crossbar array with the simulation model, wherein a simulation result is generated after the S3; S4. determining a fixed ratio of ideal current from the simulation result; S5. adjusting conductance mapping value to let the crossbar array pass the fixed ratio of ideal current and generating a conductance matrix; S6. programming the conductance matrix to the crossbar array; S7. passing an input signal to the crossbar array and generating a computing result; and S8. checking the quality of computing results. 1. A method of simulating a crossbar array circuit having a crossbar array , comprising steps of:S1. testing the crossbar array;S2. calibrating a simulation model;S3. simulating the crossbar array with the simulation model, wherein a simulation result is generated after the S3;S4. determining a fixed ratio of ideal current from the simulation result;S5. adjusting conductance mapping value to let the crossbar array pass the fixed ratio of ideal current and generating a conductance matrix;S6. programming the conductance matrix to the crossbar array;S7. passing an input signal to the crossbar array and generating a computing result; andS8. checking the quality of computing results; if the computing results are qualified, transmitting the computing results; if the computing results are not qualified, adjusting the conductance mapping value with consideration of programming errors and defects, and returning to S5.2. The method as claimed in claim 1 , wherein the crossbar array circuit further comprises:one or many of cross-point devices;{'sub': 'out', 'an output resistance Rconnected to the crossbar array; and'}an ADC configured to receive ...

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06-01-2022 дата публикации

LOW CURRENT RRAM-BASED CROSSBAR ARRAY CIRCUITS IMPLEMENTED WITH INTERFACE ENGINEERING TECHNOLOGIES

Номер: US20220006008A1
Автор: GE NING, Zhang Minxian
Принадлежит: TETRAMEM INC.

Interface engineering technologies relating to low current RRAM-based crossbar array circuits are disclosed. An apparatus, in some implementations, includes: a substrate; a bottom electrode formed on the substrate; a first geometric confining layer formed on the bottom electrode. The first geometric confining layer comprises a first plurality of pin-holes. The apparatus further comprises a base oxide layer formed on the first geometric confining layer and connected to a first top surface of the bottom electrode via the first pin-holes; and a top electrode formed on the base oxide layer. The base oxide layer comprises one of: TaO, HfO, TiO, ZrO, or a combination thereof; the first geometric confining layer comprises AlO, SiO, SiN, YO, GdO, SmO, CeO, ErO, or a combination thereof. 1. An apparatus comprising:a substrate;a bottom electrode formed on the substrate;a first geometric confining layer formed on the bottom electrode, wherein the first geometric confining layer comprises a first plurality of pin-holes;a base oxide layer formed on the first geometric confining layer and connected to a first top surface of the bottom electrode via the first pin-holes; and{'sub': x', 'x', 'x', 'x', '2', '3', '2', '3', '4', '2', '3', '2', '3', '2', '3', '2', '2', '3, 'a top electrode formed on the base oxide layer, wherein the base oxide layer comprises one of: TaO, HfO, TiO, ZrO, or a combination thereof, and wherein the first geometric confining layer comprises AlO, SiO, SiN, YO, GdO, SmO, CeO, ErO, or a combination thereof.'}2. The apparatus as claimed in claim 1 , wherein the base oxide layer is at least three times as thick as the first geometric confining layer.3. The apparatus as claimed in claim 1 , further comprising:a second geometric confining layer formed on the base oxide layer, wherein the second geometric confining layer comprises a second plurality of pin-holes, and the top electrode is formed on the second geometric confining layer and is connected to a second top ...

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07-01-2016 дата публикации

DEVICES TO DETECT A SUBSTANCE AND METHODS OF PRODUCING SUCH A DEVICE

Номер: US20160003732A1

Devices to detect a substance and methods of producing such a device are disclosed. An example device to detect a substance includes an orifice plate defining a first chamber. A substrate is coupled to the orifice plate. The substrate includes nanostructures positioned within the first chamber. The nanostructures are to react to the substance when exposed thereto. A seal is to enclose at least a portion of the first chamber to protect the nanostructures from premature exposure. 1. A device to detect a substance , comprising:an orifice plate defining a first chamber;a substrate coupled to the orifice plate, the substrate comprising nanostructures positioned within the first chamber, the nanostructures to react to the substance when exposed thereto; anda seal to enclose at least a portion of the first chamber to protect the nanostructures from premature exposure.2. The device of claim 1 , wherein the orifice plate comprises at least one of nickel claim 1 , gold claim 1 , platinum claim 1 , palladium claim 1 , or rhodium.3. The device of claim 1 , wherein the nanostructures comprise at least one of pillar structures or conical structures.4. The device of claim 1 , wherein the orifice plate is electroplated with at least one of gold claim 1 , palladium claim 1 , or rhodium.5. The device of claim 1 , wherein the seal comprises at least one of a polymer material claim 1 , a flexible material claim 1 , or a removable material.6. The device of claim 1 , wherein the seal comprises a hermetic seal.7. The device of claim 1 , wherein the seal comprises at least one of polymer tape claim 1 , plastic claim 1 , foil claim 1 , a membrane claim 1 , wax claim 1 , or Polydimethylsiloxane.8. The device of claim 1 , wherein the substrate comprises at least one of a Surface Enhanced Raman spectroscopy substrate claim 1 , a self actuating Surface Enhanced Raman spectroscopy substrate claim 1 , an Enhanced Fluorescence spectroscopy substrate claim 1 , or an Enhanced Luminescence ...

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02-01-2020 дата публикации

FLUID LEVEL SENSOR

Номер: US20200003601A1

A fluid reservoir may include a number of metal traces along a wall of the fluid reservoir, and a number of fuse circuits along a length of the metal traces. Each of the fuse circuits may include a fuse along a length of a respective metal trace, and a number of parasitic resistive elements in parallel to the fuse. The parasitic resistive elements reduce current flow through the fuse in the presence of a fluid contained within the fluid reservoir. 1. A method of forming a fluid level sensor comprising:forming a number of metal traces along a wall of a fluid reservoir; forming a fuse along a length of a respective metal trace; and', 'forming a number of parasitic resistive elements in parallel to the fuse, the parasitic resistive elements reducing current flow through the fuse in the presence of a fluid contained within the fluid reservoir., 'forming a number of fuse circuits along a length of the metal traces, wherein forming the fuse circuits comprises, for each of the fuse circuits2. The method of claim 1 , wherein:the parasitic resistive elements increase the current flow through the fuse when the parasitic resistive elements are not in the presence of the fluid, andthe fuse trips in response to the increase in current flow.3. The method of claim 1 , wherein forming the number of metal traces along the wall of the fluid reservoir comprises forming the number of metal traces using laser direct structuring (LDS).4. The method of claim 1 , wherein a location of the number of fuse circuits within the fluid reservoir define a corresponding number of levels of fluid within the fluid reservoir.5. The method of claim 1 , wherein a width within the fuses claim 1 , a width of the metal traces claim 1 , a thickness of the metal traces claim 1 , a design of the parasitic resistive elements within the fuse circuits claim 1 , or combinations thereof define a breaking capacity of the fuse circuit.6. A fluid reservoir comprising:a number of metal traces along a wall of the fluid ...

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13-01-2022 дата публикации

Low current rram-based crossbar array circuit implemented with switching oxide engineering technologies

Номер: US20220013720A1
Автор: Minxian Zhang, Ning Ge
Принадлежит: Tetramem Inc

Switching oxide engineering technologies relating to low current RRAM-based crossbar array circuits are disclosed. An apparatus, in some implementations, includes: a substrate; a bottom electrode formed on the substrate; a switching oxide stack formed on the bottom electrode. The switching oxide stack includes one or more base oxide layers and one or more discontinuous oxide layers alternately stacked; An apparatus further includes a top electrode formed on the switching oxide stack. The base oxide layer includes TaO x , HfO x , TiO x , ZrO x , or a combination thereof. The discontinuous oxide layer includes Al 2 O 3 , SiO 2 , Si 3 N 4 , Y 2 O 3 , Gd 2 O 3 , Sm 2 O 3 , CeO 2 , Er 2 O 3 , or the combination thereof.

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01-01-2015 дата публикации

RELATIVE FRAME RATE AS DISPLAY QUALITY BENCHMARK FOR REMOTE DESKTOP

Номер: US20150007029A1
Принадлежит:

A method is provided to measure a relative frame rate of a remote desktop on a first computer and accessed by a second computer. The method includes playing a video timestamp on the remote desktop at the first computer where the video timestamp includes unique timestamps, screen capturing the remote desktop at the first computer and the second computer, determining a first frame rate at the second computer based on the screen capturing the remote desktop at the second computer, determining a second frame rate at the first computer based on the screen capturing the remote desktop at the first computer, and determining the relative frame rate as a ratio between the first and the second frame rates. 1. A method to measure a relative frame rate of a remote desktop on a first computer and accessed by a second computer , the method comprising:playing a video timestamp on the remote desktop at the first computer, the video timestamp comprising unique timestamps;screen capturing the remote desktop at the first computer and the second computer;determining a first frame rate at the second computer based on the screen capturing the remote desktop at the second computer;determining a second frame rate at the first computer based on the screen capturing the remote desktop at the first computer; anddetermining the relative frame rate as a ratio between the first and the second frame rates.2. The method of claim 1 , wherein each timestamp comprises a block of black and white pixels that represent a unique number.3. The method of claim 2 , further comprising reading each timestamp on frames captured at the second computer by determining a brightness of each pixel in the timestamp and binarizing the pixel based on the brightness.4. The method of claim 1 , wherein the first frame rate is equal to a total number of unique frames captured at the second computer divided by a time duration based on a last timestamp on a last frame captured at the second computer and a first timestamp on ...

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11-01-2018 дата публикации

SENSING A PROPERTY OF A FLUID

Номер: US20180009224A1

In an example, a device for sensing a property of a fluid may include an ion-sensitive field effect transistor (ISFET) having a gate, a source, and a drain. The device may also include a first metal element in contact with the gate and a switching layer in contact with the first metal layer. A resistance state of the switching layer is to be modified through application of an electrical field of at least a predefined strength through the switching layer and is to be retained in the switching layer following removal of the electrical field. The device may also include a metal plate in contact with the switching layer, in which the metal plate is to directly contact the fluid for which the property is to be sensed. 1. A device for sensing a property of a fluid , said device comprising:an ion-sensitive field effect transistor (ISFET) having a gate, a source, and a drain;a first metal element in contact with the gate;a switching layer in contact with the first metal layer, wherein a resistance state of the switching layer is to be modified through application of an electrical field of at least a predefined strength through the switching layer, and wherein the switching layer is to retain the resistance state following removal of the electrical field; anda metal plate in contact with the switching layer, wherein the metal plate is to directly contact the fluid for which the property is to be sensed.2. The device according to claim 1 , wherein the switching layer is formed of a switching material that has a first resistance state in which the switching layer has a first resistance level and a second resistance state in which the switching layer has a second resistance level claim 1 , wherein the first resistance level is lower than the second resistance level claim 1 , and wherein in the first resistance state claim 1 , the switching layer prevents a selected voltage from being established in the ISFET.3. The device according to claim 2 , wherein the switching layer is ...

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11-01-2018 дата публикации

Memory including Bi-polar Memristor

Номер: US20180012654A1

A memory cell includes an input coupled to a read line, an output coupled to a circuit ground, a bi-polar memristor, and at least one address switch coupled to an address line to select the memory cell. A memory includes the bi-polar memristor and a one-way current conducting device, wherein the one-way current conducting device is positioned between the memristor cell output and the circuit ground, or between the read line and the memristor cell input. 1. A memory circuit including:a memory cell including an input coupled to a read line, an output coupled to a circuit ground, a bi-polar memristor and at least one address switch coupled to an address line to select the memory cell; anda one-way current conducting device to prevent resetting of the bi-polar memristor;wherein the one-way current conducting device is positioned between the memristor cell output and the circuit ground, or between the read line and the memristor cell input.2. The memory circuit of wherein the one-way current conducting device is a diode.3. The memory circuit of wherein a breakdown voltage of the diode is at least 10V.4. The memory circuit of wherein the one-way current conducting device is a transistor including a gate and a drain claim 1 , wherein the gate of the transistor is coupled to the drain of the transistor.5. The memory circuit of wherein the memory circuit includes a plurality of memory cells claim 1 , each memory cell being connected to a common line to a circuit ground and wherein the one-way current conducting device is positioned on the common line to the circuit ground to prevent resetting of the plurality of memory cells.6. The memory circuit of wherein the memory circuit includes a plurality of blocks claim 5 , each block including a plurality of bi-polar memristors claim 5 , each bi-polar memristor associated with a respective column switch and all bi-polar memristors in a block sharing a common row switch;wherein a plurality of row switches connect to a common line to ...

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11-01-2018 дата публикации

INTEGRATED CIRCUITS

Номер: US20180012900A1

The present subject matter relates to an integrated circuit comprising an erasable programmable read only memory (EPROM) array having a plurality of EPROM cells disposed in rows and columns, wherein one or more EPROM cells located at predetermined positions in the EPROM array are selectively dischargeable. The one or more EPROM cells comprise a EPROM transistor having a first conductive layer to store electrons upon the EPROM transistor being programmed and a control metal oxide semiconductor field-effect transistor (MOSFET) electrically connected to the first conductive layer to provide an electron leakage path to dissipate the electrons stored in the first conductive layer in a predetermined leak time period. 1. A selectively dischargeable erasable programmable read only memory (EPROM) cell comprising:a semiconductor substrate having a first source region and a first drain region;a floating gate separated from the semiconductor substrate by a first dielectric layer;an input gate capacitively coupled to the floating gate through a second dielectric layer disposed between the floating gate and the input gate; anda control metal oxide semiconductor field-effect transistor (MOSFET) connected to the floating gate, the control MOSFET being operable to provide an electron leakage path to provide for leakage of charge from the floating gate in a predetermined leak time period.2. The selectively dischargeable EPROM cell as claimed in claim 1 , wherein the MOSFET comprises:a control gate capacitively coupled to a second source region and a second drain region provided in the semiconductor substrate, wherein one of the second source region and the second drain region is connected to ground and the other of the second source region and the second drain region is coupled to the floating gate,such that a voltage applied at the control gate is to bias a region of the semiconductor substrate between the second source region and the second drain region to allow the leakage of ...

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18-01-2018 дата публикации

CARTRIDGES COMPRISING SENSORS INCLUDING GROUND ELECTRODES EXPOSED TO FLUID CHAMBERS

Номер: US20180015729A1
Принадлежит:

In some examples, a cartridge includes a printhead comprising a fluid feed slot, a fluid chamber formed between a nozzle layer and a passivation layer, the fluid chamber fluidically coupling the fluid feed slot and a nozzle of the nozzle layer, and a printhead-integrated sensor to sense a property of a fluid in the fluid chamber, the sensor including a ground electrode exposed to the fluid chamber through an opening in the passivation layer. 1. A cartridge comprising: a fluid feed slot;', 'a fluid chamber formed between a nozzle layer and a passivation layer, the fluid chamber fluidically coupling the fluid feed slot and a nozzle of the nozzle layer; and', 'a printhead-integrated sensor to sense a property of a fluid in the fluid chamber, the sensor including a ground electrode exposed to the fluid chamber through an opening in the passivation layer., 'a printhead comprising2. The cartridge of claim 1 , wherein the ground electrode comprises a first metal layer and a second metal layer on the first metal layer claim 1 , the second metal layer connected to a ground path claim 1 , and wherein the opening in the passivation layer exposes a portion of the first metal layer.3. The cartridge of claim 2 , wherein the second metal layer is shielded from the fluid chamber by the passivation layer.4. The cartridge of claim 2 , wherein the first metal layer comprises tantalum aluminum.5. The cartridge of claim 2 , wherein the second metal layer comprises aluminum copper.6. The cartridge of claim 1 , wherein the sensor comprises an ink level sensor (PILS) to sense a fluid level of the fluid in the fluid chamber claim 1 , the PILS comprising a sense capacitor whose capacitance changes with a level of fluid in the fluid chamber claim 1 , and the sense capacitor including a metal plate claim 1 , wherein the passivation layer is between the metal plate and the fluid chamber.7. The cartridge of claim 6 , further comprising another PILS to sense a fluid level of another fluid chamber ...

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18-01-2018 дата публикации

DYNAMIC LOGIC MEMCAP

Номер: US20180017870A1

An integrated circuit may include a substrate with a plurality of transistors formed in the substrate. The plurality of transistors may be coupled to a first metal layer formed over the plurality of transistors. A plurality of high dielectric nanometer capacitors may be formed of memristor switch material between the first metal layer and a second metal layer formed over the plurality of high dielectric capacitors. The plurality of high dielectric capacitors may operate as memory storage cells in dynamic logic. 1. An integrated circuit , comprising:a substrate with a plurality of transistors formed in the substrate, the plurality of transistors coupled to a first metal layer formed over the plurality of transistors; anda plurality of high dielectric nanometer capacitors formed of memristor switch material creating an active region between the first metal layer and a second metal layer formed over the plurality of high dielectric memcaps, wherein the plurality of high dielectric memcaps are to operate as memory storage cells in dynamic logic.2. The integrated circuit of claim 1 , wherein the memristor switch material is formed of memristor switch oxide of the first metal layer and additionally operational as memristors.3. The integrated circuit of wherein the memristor switch material active region is formed of memristor switch elemental or compound semiconductor and doped with mobile dopants to allow for memristor operation.4. The integrated circuit of claim 2 , further comprising a second plurality of transistors coupled between respective plurality of high dielectric nanometer memcaps and a programming source to allow for programming the memristors.5. The integrated circuit of wherein the dynamic logic is to operate as a set of shift registers.6. The integrated circuit of wherein the set of shift registers is to control a set of fluid jet resistors.7. The integrated circuit of wherein the set of shift registers have set/reset functionality by programming the ...

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16-01-2020 дата публикации

FLUID OPERATION CELL WITH ON-CHIP ELECTRICAL FLUID OPERATION COMPONENTS

Номер: US20200018773A1

In one example in accordance with the present disclosure, a fluid operation cell is described. The fluid operation cell includes a micro-electro-mechanical housing. The housing includes an inlet and an outlet through which fluid flows and electrodes disposed on an interior of the housing to couple to a controller. The fluid operation cell also includes a silicon-based substrate disposed inside, and electrically coupled to, the housing. The substrate includes an on-chip electrical fluid operation component formed thereon. The electrical fluid operation component uses an electrical signal to operate on bypassing fluid. The fluid operation cell includes a dedicated address to be individually activated by the controller. 1. A fluid operation cell comprising: passages through which fluid flows; and', 'electric traces disposed on an interior of the housing to couple to a controller;, 'a microelectromechanical housing comprising the substrate comprises an on-chip electrical fluid operation component formed thereon;', 'the electrical fluid operation component uses an electrical signal to operate on bypassing fluid; and', 'the fluid operation cell includes a dedicated address to be individually activated by the controller., 'a semiconductive substrate disposed inside, and electrically coupled to the housing, wherein2. The cell of claim 1 , wherein the cell is a microfluidic operational device.3. The cell of claim 1 , wherein the housing further comprises a common electrical interface on an external surface to electrically interconnect the fluid operation cell with other fluid operation cells and the controller.4. The cell of claim 1 , wherein the housing further comprises a common mechanical interface on an external surface to mechanically interconnect the fluid operation cell with other fluid operation cells and the controller.5. The cell of claim 1 , wherein the housing is a printed housing.6. The cell of claim 1 , wherein the housing is an enclosed shape.7. The cell of ...

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26-01-2017 дата публикации

FLUID EJECTION DEVICE WITH INTEGRATED INK LEVEL SENSOR

Номер: US20170021626A1

In an embodiment, a fluid ejection device includes an ink slot formed in a printhead die. The fluid ejection device also includes a printhead-integrated ink level sensor (PILS) to sense an ink level of a chamber in fluid communication with the slot, and a clearing resistor circuit disposed within the chamber to clear the chamber of ink. 1. A fluid ejection device comprising:a slot formed in a fluid ejection die;an integrated fluid level sensor to sense a fluid level in a chamber that is in fluid communication with the slot; anda fluid clearing device disposed within the chamber to clear the chamber of fluid.2. The fluid ejection device of claim 1 , wherein the fluid clearing device comprises a clearing resistor.3. The fluid ejection device of claim 2 , wherein the clearing resistor comprises a circuit of four resistors surrounding a sense capacitor plate of the fluid level sensor claim 2 , each resistor adjacent to and aligned parallel with a different side of the sense capacitor plate.4. The fluid ejection device of claim 2 , wherein the fluid level sensor comprises multiple sensors to sense fluid levels in multiple chambers in fluid communication with the slot claim 2 , the fluid ejection device further comprising a shift register to select between the multiple sensors for output onto a common data line.5. The fluid ejection device of claim 4 , wherein the multiple sensors comprise four sensors around a single slot claim 4 , each of the four sensors located at a different end-corner of the slot.6. The fluid ejection device of claim 4 , further comprising a sense capacitor plate in each sensor claim 4 , wherein each sense capacitor plate is a minimum safe distance of about 40 to about 50 microns from an end of the slot.7. The fluid ejection device of claim 4 , further comprising a controller to control activation of the clearing resistor circuit and to control the shift register to select between the multiple sensors for output onto the common data line.8. The ...

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16-01-2020 дата публикации

ELECTRONIC DEVICE AND COMMUNICATION METHOD

Номер: US20200021342A1
Принадлежит: SONY CORPORATION

The present disclosure relates to an electronic device and communication method. The electronic device comprising a RF link unit radiating a data stream in form of electromagnetic wave radiation onto a phase shifter; a processing circuitry configured to determine an analog precoding matrix; phase shifters, each of which for performing analog precoding on the received signal of the electromagnetic wave radiation according to the determined analog precoding matrix, and an antenna array, each of antenna elements of which transmits the analog precoded signal, wherein the number of the phase shifters is the same as the number of the antenna elements of the antenna array, and the phase shifters and the antenna elements are in one-to-one correspondence. 1. An electronic device comprisinga RF link unit radiating a data stream in form of electromagnetic wave radiation onto a phase shifter;a processing circuitry configured to determine an analog precoding matrix;phase shifters, each of which for performing analog precoding on the received signal of the electromagnetic wave radiation according to the determined analog precoding matrix, andan antenna array, each of antenna elements of which transmits the analog precoded signal, wherein the number of the phase shifters is the same as the number of the antenna elements of the antenna array, and the phase shifters and the antenna elements are in one-to-one correspondence.2. The electronic device according to claim 1 , wherein the processing circuitry is further configured to determine the analog precoding matrix based on a channel matching rule for matching a channel response.3. The electronic device according to claim 1 , wherein the processing circuitry is further configured to determine the analog precoding matrix by considering phase change caused by propagation of the electromagnetic wave signal between an electromagnetic wave radiating end corresponding to each data stream and each of the antenna elements of the antenna ...

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25-01-2018 дата публикации

PRINTHEADS WITH EPROM CELLS HAVING ETCHED MULTI-METAL FLOATING GATES

Номер: US20180022103A1

In one example in accordance with the present disclosure a printhead with a number of EPROM cells is described. The printhead deposits fluid onto a print medium. The printhead also includes a number of EPROM cells. Each EPROM cell includes a substrate having a source and a drain disposed therein, a floating gate separated from the substrate by a first dielectric layer. The floating gate includes a multi-metal layer that is a metal etched layer. Each EPROM cell also includes a control gate separated from the multi-metal layer of the floating gate by a second dielectric layer. 1. A printhead with a number of erasable programmable read only memory (EPROM) cells , the printhead comprising: a firing chamber to hold the amount of fluid;', 'an opening to dispense the amount of fluid onto the print medium; and', 'an ejector to eject the amount of fluid through the opening; and, 'a number of nozzles to deposit an amount of fluid onto a print medium, each nozzle comprising a substrate having a source and a drain disposed therein;', the floating gate comprises a multi-metal layer; and', 'the multi-metal layer is a metal etched layer; and, 'a floating gate separated from the substrate by a first dielectric layer, in which, 'a control gate separated from the multi-metal layer of the floating gate by a second dielectric layer,, 'a number of EPROM cells, each EPROM cell comprising2. The printhead of claim 1 , in which the fluid is inkjet ink.3. The printhead of claim 1 , in which the floating gate further comprises a polysilicon layer electrically coupled to the multi-metal layer.4. The printhead of claim 1 , in which the multi-metal layer comprises a first sub-layer disposed underneath a second sub-layer claim 1 , in which a portion of the second sub-layer is etched to expose a portion of the first sub-layer.5. The printhead of claim 4 , in which the second dielectric layer is formed by oxidation of the exposed portion of the first sub-layer.6. The printhead of claim 4 , in which ...

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28-01-2016 дата публикации

DEVICES TO DETECT A SUBSTANCE AND METHODS OF PRODUCING SUCH A DEVICE

Номер: US20160025635A1
Принадлежит:

Devices to detect a substance and methods of producing such a device are disclosed. An example device to detect a substance includes a housing defining a first chamber and a substrate coupled to the housing. The substrate includes nanostructures positioned within the first chamber. The nanostructures are to react to the substance when exposed thereto. The device includes a first heater positioned within the first chamber. The heater is to heat at least a portion of the substance to ready the device for analysis. 1. A device to detect a substance , comprising:a housing defining a first chamber;a substrate coupled to the housing, the substrate comprising nanostructures positioned within the first chamber, the nanostructures to react to the substance when exposed thereto; anda first heater positioned within the first chamber, the heater to heat at least a portion of the substance to ready the device for analysis.2. The device of claim 1 , wherein the first heater comprises a resistor.3. The device of claim 1 , further comprising a sensor positioned within the first chamber claim 1 , the sensor to measure a parameter value of the substance claim 1 , the sensor different than the nanostructures.4. The device of claim 3 , wherein the sensor comprises a capacitor.5. The device of claim 3 , wherein the parameter value comprises at least one of impedance or capacitance.6. The device of claim 1 , further comprising a seal to enclose at least a portion of the first chamber to protect the nanostructures from premature exposure.7. The device of claim 6 , wherein the seal comprises at least one of a transparent material claim 6 , a flexible material claim 6 , a removable material claim 6 , or a polymer material.8. The device of claim 1 , wherein the housing comprises nickel claim 1 , gold claim 1 , platinum claim 1 , palladium claim 1 , or rhodium.9. The device of claim 1 , wherein the housing comprises an orifice plate.10. The device of claim 1 , wherein the housing is ...

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10-02-2022 дата публикации

PATTERNING OXIDATION RESISTANT ELECTRODE IN CROSSBAR ARRAY CIRCUITS

Номер: US20220045271A1
Автор: GE NING, Zhang Minxian
Принадлежит:

An example method includes: forming a bottom electrode on a substrate and forming a patterned mask layer on the bottom electrode; thermal oxidizing the bottom electrode layer via the patterned mask layer by applying a thermal process and a first plasma; removing a gaseous status of the bottom electrode oxide using a first vacuum purge; removing a solid status of the bottom electrode oxide by applying a second plasma; removing the gaseous status and the solid status of the bottom electrode oxide using a second vacuum purge to form a patterned bottom electrode; removing the patterned mask layer; forming a filament forming layer on the patterned bottom electrode; and a top electrode on the filament forming layer. The filament forming layer is configured to form a filament within the filament forming layer responsive to a switching voltage being applied to the filament forming layer. 1. A method of manufacturing an RRAM-based crossbar array circuit comprising:providing a substrate;forming a bottom electrode on the substrate;forming a patterned mask layer on the bottom electrode;thermal oxidizing the bottom electrode layer via the patterned mask layer by applying a thermal process and a first plasma;removing a gaseous status of the bottom electrode oxide by a first vacuum purge;removing a solid status of the bottom electrode oxide by applying a second plasma;removing the gaseous status of the bottom electrode oxide and the solid status of the bottom electrode oxide by a second vacuum purge to form a patterned bottom electrode;removing the patterned mask layer;forming a filament forming layer on the patterned bottom electrode; andforming a top electrode on the filament forming layer, wherein the filament forming layer is configured to form a filament within the filament forming layer when applying a switching voltage upon the filament forming layer.2. The method as claimed in claim 1 , wherein the first plasma comprises an oxygen plasma.3. The method as claimed in claim 1 ...

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28-01-2021 дата публикации

INCREASING SELECTOR SURFACE AREA IN CROSSBAR ARRAY CIRCUITS

Номер: US20210028229A1
Автор: GE NING, Zhang Minxian
Принадлежит: TETRAMEM INC.

Technologies relating to increasing the surface area of selectors in crossbar array circuits are provided. An example apparatus includes: a substrate; a first line electrode formed on the substrate; an RRAM stack formed on the first line electrode, wherein the RRAM stack; an isolation layer formed beside the RRAM stack, wherein the isolation layer includes an upper surface and a sidewall, and a height from the upper surface to the first line electrode is 100 nanometers to 10 micrometers; a selector stack formed on the RRAM stack, the sidewall, and the upper surface; and a second line electrode formed on the selector stack. 1. An apparatus comprises:a substrate;a first line electrode formed on the substrate;an RRAM stack formed on the first line electrode, wherein the RRAM stack;an isolation layer formed beside the RRAM stack, wherein the isolation layer comprises an upper surface and a sidewall, and a height from the upper surface to the first line electrode is 100 nanometers to 10 micrometers;a selector stack formed on the RRAM stack, the sidewall, and the upper surface; anda second line electrode formed on the selector stack.2. The apparatus as claimed in claim 1 , wherein the substrate comprises Si claim 1 , SiO claim 1 , SiN claim 1 , AlO claim 1 , AN claim 1 , gallium arsenide claim 1 , or glass.3. The apparatus as claimed in claim 1 , wherein the first line electrode and the second line electrode comprise Pt claim 1 , Ti claim 1 , TiN claim 1 , Pd claim 1 , Ir claim 1 , W claim 1 , Ta claim 1 , Hf claim 1 , Nb claim 1 , V claim 1 , TaN claim 1 , NbN claim 1 , or a combination thereof claim 1 , or an alloy of one or more conductive materials and Pt claim 1 , Ti claim 1 , TiN claim 1 , Pd claim 1 , Ir claim 1 , W claim 1 , Ta claim 1 , Hf claim 1 , Nb claim 1 , V claim 1 , TaN claim 1 , NbN claim 1 , or a combination thereof.4. The apparatus as claimed in claim 1 , wherein the RRAM stack comprises a first bottom electrode claim 1 , an RRAM oxide layer claim 1 , ...

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28-01-2021 дата публикации

CROSSBAR ARRAY CIRCUIT WITH 3D VERTICAL RRAM

Номер: US20210028230A1
Автор: GE NING, Zhang Minxian
Принадлежит: TETRAMEM INC.

Provided are 3D One-Transistor-N-RRAM (1TNR) structures and One-Selector-One-RRAM (1S1R) structures and methods for manufacturing the same. An example 3D 1TNR structure comprises: a plurality of gate lines; and a plurality of crossbar arrays (e.g., a first crossbar array and a second crossbar array). The first and second crossbar arrays are positioned on a first vertical plane and a second vertical plane, respectively. Each crossbar array in the plurality of crossbar arrays includes a first plurality of bit lines and a second plurality of word lines; Each word line in the second plurality of word lines is connected to a source and a destination of a second transistor; and each gate line in the plurality of gate lines is connected to a gate of a first transistor located in the first crossbar array and a gate of a second transistor located in the second crossbar array. 1. A 3D One-Transistor-N-RRAM (1TNR) structure comprising:a plurality of gate lines; and the first crossbar array is positioned on a first vertical plane;', 'the second crossbar array is positioned on a second vertical plane different from the first vertical plane;', 'each crossbar array in the plurality of crossbar arrays includes a first plurality of bit lines and a second plurality of word lines;', 'each word line in the second plurality of word lines is connected to a source and a destination of a second transistor;', 'each gate line in the plurality of gate lines is connected to a gate of a first transistor located in the first crossbar array and a gate of a second transistor located in the second crossbar array., 'a plurality of crossbar arrays, including a first crossbar array and a second crossbar array, wherein'}2. The 3D One-Transistor-N-RRAM (1TNR) structure of claim 1 , wherein the plurality of crossbar arrays includes a third crossbar array positioned on a third vertical plane different from both the first crossbar array and the second crossbar array.3. The 3D One-Transistor-N-RRAM (1TNR) ...

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31-01-2019 дата публикации

3D PRINTER WITH TUNED FUSING RADIATION EMISSION

Номер: US20190030798A1

According to an example, a three-dimensional (3D) printer may include a first delivery device to selectively deposit first liquid droplets onto a layer of build materials, in which the first liquid has a fusing radiation absorption property. The 3D printer may also include a fusing radiation generator to selectively emit fusing radiation at multiple ranges of wavelengths and at selected locations to selectively fuse the build materials and a controller to tune a range of wavelengths at which the fusing radiation generator is to emit fusing radiation based upon the fusing radiation absorbing property of the deposited first liquid, to determine the selected locations at which the fusing radiation at the tuned range of wavelengths is to be emitted, and to control the fusing radiation generator to selectively emit fusing radiation at the tuned range of wavelengths and onto the selected locations. 1. A three-dimensional (3D) printer comprising:a first delivery device to selectively deposit first liquid droplets onto a layer of build materials, wherein the first liquid has a fusing radiation absorbing property;a fusing radiation generator to selectively emit fusing energy at multiple ranges of wavelengths and at selected locations to selectively fuse the build materials; anda controller to tune a range of wavelengths at which the fusing radiation generator is to emit fusing radiation based upon the fusing radiation absorbing property of the deposited first liquid, to determine the selected locations at which the fusing radiation at the tuned range of wavelengths is to be emitted, and to control the fusing radiation generator to selectively emit fusing radiation at the tuned range of wavelengths and onto the selected locations.2. The 3D printer according to claim 1 , wherein the controller is to tune the range of wavelengths to be a range of wavelengths that is identified to enhance a fusing radiation absorbing rate of the fusing radiation by the build materials upon which ...

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09-02-2017 дата публикации

FLUID EJECTION DEVICE WITH INTEGRATED INK LEVEL SENSORS

Номер: US20170036452A1
Автор: GE NING, Leonard Patrick

In an embodiment, a fluid ejection device includes a fluid feed slot formed in a printhead die and a plurality of printhead-integrated ink level sensors (PILS). A fluid ejection device may include a first PILS to sense an ink level of a first chamber in fluid communication with the fluid feed slot, the first PILS to detect an empty ink level of the first chamber when the fluid ejection device is at a first ink level state, and a second PILS to sense an ink level of a second chamber in fluid communication with the fluid feed slot, the second PILS to detect an empty ink level of the second chamber when the fluid ejection device is at a second ink level state, different than the first ink level state 1. A fluid ejection device comprising:a fluid feed slot formed in a printhead die;a first printhead-integrated ink level sensor (PILS) to sense an ink level of a first chamber in fluid communication with the fluid feed slot, the first PILS to detect an empty ink level of the first chamber when the fluid ejection device is at a first ink level state; anda second PILS to sense an ink level of a second chamber in fluid communication with the fluid feed slot, the second PILS to detect an empty ink level of the second chamber when the fluid ejection device is at a second ink level state, different than the first ink level state.2. The fluid ejection device of claim 1 , wherein the first PILS includes a first sense capacitor plate having a first plate length claim 1 , and wherein the second PILS includes a second sense capacitor plate having a second plate length different than the first plate length.3. The fluid ejection device of claim 2 , wherein the first sense capacitor plate and the second sense capacitor plate are at a same distance from an edge of the fluid feed slot.4. The fluid ejection device of claim 2 , wherein the first sense capacitor plate is at a first distance from an edge of the fluid feed slot claim 2 , and wherein the second sense capacitor plate is at a ...

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07-02-2019 дата публикации

PRINTHEAD CLEANING SYSTEM

Номер: US20190039312A1

According to an example, an apparatus may include a printhead to deliver a printing liquid from firing chambers through a plurality of bores arranged along a surface of the printhead. The apparatus may also include a cleaning system to apply a pressurized cleaning fluid onto the surface of the printhead while preventing application of the pressurized cleaning fluid into the firing chambers through the plurality of bores. 1. An apparatus comprising:a printhead to deliver a printing liquid from firing chambers through a plurality of bores arranged along a surface of the printhead; anda cleaning system to apply a pressurized cleaning fluid onto the surface of the printhead while preventing application of the pressurized cleaning fluid into the firing chambers through the plurality of bores.2. The apparatus according to claim 1 , wherein the printhead is movable between a printing position and a cleaning position claim 1 , wherein in the printing position claim 1 , the printhead delivers the printing liquid and in the cleaning position claim 1 , the cleaning system applies the pressurized cleaning fluid to the printhead.3. The apparatus according to claim 2 , wherein the cleaning system includes a pressurizing device and a plurality of nozzles claim 2 , the pressurizing device being to pressurize the cleaning fluid to be sprayed out of the plurality of nozzles.4. The apparatus according to claim 3 , said plurality of nozzles being aligned with sections of the surface outside of the plurality of bores when the printhead is in the cleaning position claim 3 , wherein the plurality of nozzles are angled to direct the pressurized cleaning fluid in directions away from respective sets of the plurality of bores.5. The apparatus according to claim 1 , wherein the cleaning system includes a plurality of pivotable nozzles claim 1 , wherein the plurality of pivotable nozzles are to be rotated to apply the pressurized cleaning fluid onto multiple sections of the surface outside of ...

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07-02-2019 дата публикации

Display

Номер: US20190042026A1
Принадлежит: Hewlett Packard Development Co LP

A display may include a substrate, an array of thin film transistors, an array of micro-light-emitting diode elements supported by the substrate and an array of sensing elements supported by the substrate. Each sensing element may include a continuous conductive layer functioning as part of the sensing element and extending along the substrate as an electrically conductive trace connected to one of the thin film transistors.

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06-02-2020 дата публикации

SILICON STAMP WITH ETCHED PITS

Номер: US20200043761A1

A stamp for picking and placing multiple components in fixed separations to each other includes: a silicon substrate with a plurality of etched pits, wherein the etched pits correspond to a size and geometry of the components and a metal layer covering an inner surface of the plurality of etched pits. 1. A stamp for picking and placing multiple components in fixed separations to each other , the stamp comprising:a silicon substrate comprising, a plurality of etched pits, wherein the etched pits correspond to a size and geometry of the components; anda metal layer covering an inner surface of the plurality of etched pits.2. The stamp of claim 1 , wherein the metal layers of each pit are electrically isolatable from each other.3. The stamp of claim 1 , wherein the pits limit the orientation of the components in one axis.4. The stamp of claim 1 , wherein a <1 0 0> plane of the silicon substrate forms a surface of an etched pit of the plurality of etched pits claim 1 , the plurality of etched pits being formed with an an-isotropic etch.5. The stamp of claim 1 , further comprising a plurality of logics to regulate a potential of the metal layer in individual pits.6. The stamp of claim 1 , further comprising a liquid in the plurality of pits claim 1 , the liquid adhering components to the tool in the pits.7. The stamp of claim 1 , further comprising a thermal resistor positioned to heat the metal layer.8. A method of picking and placing claim 1 , comprising:bringing a tool into proximity with a plurality of components;attracting the components to the tool via electrostatic interaction between a plurality of transfer surfaces of the tool and the plurality of components, wherein the plurality of transfer surfaces are recessed relative to adjacent portions of the tool; anddropping the plurality of components from the plurality of transfer surfaces of the tool onto a substrate.9. The method of claim 8 , further comprising claim 8 , applying a static charge to a metal layer ...

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14-02-2019 дата публикации

NANO FINGERS WITH ASYMMETRIC MATERIAL COMPOSITION

Номер: US20190049386A1

A surface enhanced luminescence (SEL) sensor may include a substrate and nano fingers projecting from the substrate. The nano fingers may include a nano finger extending along an axis. The nano finger may include a plasmonically active cap and a pillar supporting the plasmonically active cap. The pillar may have an asymmetric material composition with respect to the axis. 1. A surface enhanced luminescence (SEL) sensor comprising:a substrate;nano fingers projecting from the substrate, the nano fingers comprising a nano finger extending along an axis and comprising:a plasmonically active cap; anda pillar supporting the plasmonically active cap, the pillar having an asymmetric material composition with respect to the axis.2. The sensor of claim 1 , wherein the pillar comprises:a central portion of a first material extending along the axis and having a side wall and a top; anda coating of a second material asymmetrically covering the sidewall with respect to the axis.3. The sensor of claim 1 , wherein the pillar comprises:a central portion extending along the axis formed from a first material; anda second portion extending along the axis formed from a second material, the second material comprising an altered composition of the first material.4. The sensor of claim 1 , wherein the pillar comprises:a first material extending on a first side of the axis having a first coefficient of thermal expansion; anda second material extending on a second side of the axis having a second coefficient of thermal expansion different than the first coefficient of thermal expansion.5. The sensor of claim 1 , wherein the pillar comprises:a first material extending on a first side of the axis having a first coefficient of absorption of thermal energy; anda second material extending on a second side of the axis having a second coefficient of absorption of thermal energy different than the first coefficient of absorption of thermal energy.6. The sensor of claim 1 , wherein the nano fingers ...

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23-02-2017 дата публикации

INTEGRATED CIRCUITS

Номер: US20170053993A1

The present subject matter relates to an integrated circuit. The integrated circuit includes a first metal layer and a second metal layer capacitively coupled to the first metal layer through a dielectric layer. Further, the second metal layer includes an electron leakage path to provide for leakage of charge from the second metal layer in a predetermined leak time period. 1. An integrated circuit comprising:a first metal layer;a dielectric layer; anda second metal layer capacitively coupled to the first metal layer through the dielectric layer, wherein the second metal layer comprises an electron leakage path to provide for leakage of charge from the second metal layer in a predetermined leak time period.2. The integrated circuit as claimed in claim 1 , wherein a cross-sectional area of the electron leakage path determines the predetermined leak time period.3. The integrated circuit as claimed in claim 1 , wherein the second metal layer comprises a bulk electron portion coupled to an adjacent portion through the electron leakage path claim 1 , and wherein the electron leakage path provides for leakage of charge from the bulk electron portion to the adjacent portion.4. The integrated circuit as claimed in claim 3 , wherein the second metal layer comprises an intermediate portion comprising the electron leakage path claim 3 , the intermediate portion extending from the second metal layer to one of the first metal layer and the dielectric layer.5. The integrated circuit as claimed in claim 3 , wherein the electron leakage path comprises at least one metal stringer connecting the bulk electron portion to the adjacent portion.6. The integrated circuit as claimed in claim 1 , wherein the integrated circuit is an electrically programmable read only memory (EPROM) chip.7. The integrated circuit as claimed in claim 1 , wherein the integrated circuit may include a plurality of bits claim 1 , and where the electron leakage path is provided for each of the plurality of bits ...

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21-02-2019 дата публикации

PRODUCING INSTRUCTIONS THAT CONTROL THREE-DIMENSIONAL PRINTING FROM VOXELS

Номер: US20190056716A1

In some examples, a data representation is received that includes voxels relating to a volumetric property and a functional property of portions of a three-dimensional (3D) object to be formed by a 3D printing system, and trajectory voxels containing information to guide operation of a machine that manipulates portions of the 3D object during 3D printing. Information of the voxels relating to the volumetric property and the functional property and the information of the trajectory voxels are combined to produce instructions that control the 3D printing system to build the 3D object. 1. A method of a system comprising a processor , comprising: voxels relating to a volumetric property and a functional property of portions of a three-dimensional (3D) object to be formed by a 3D printing system, and', 'trajectory voxels containing information to guide operation of a machine that manipulates portions of the 3D object during 3D printing; and, 'receiving a data representation that comprisescombining information of the voxels relating to the volumetric property and the functional property and the information of the trajectory voxels to produce instructions that control the 3D printing system to build the 3D object.2. The method of claim 1 , wherein the data representation further comprises curve size voxels relating to sizes of curves to be formed claim 1 , and wherein the combining further comprises combining information of the curve size voxels with the information of the functional voxels and the information of the trajectory voxels to produce the instructions.3. The method of claim 1 , wherein the machine that manipulates the portions of the 3D object during 3D printing comprises a machine that makes physical contact with the portions of the 3D object to manipulate the portions along trajectories.4. The method of claim 3 , wherein the information of the trajectory voxels to guide operation of the machine in manipulating the portions of the 3D object comprises ...

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10-03-2022 дата публикации

Resistive random-access memory devices with multi-component electrodes and discontinuous interface layers

Номер: US20220077389A1
Автор: Minxian Zhang, Ning Ge
Принадлежит: Tetramem Inc

The present disclosure relates to resistive random-access memory (RRAM) devices. An RRAM device may include a first electrode, a first interface layer fabricated on the first electrode; a switching oxide layer fabricated on the first interface layer; and a second electrode fabricated on the switching oxide layer. The switching oxide layer includes a transition metal oxide. The first interface layer includes a discontinuous film of a first material that is more chemically stable than the transition metal oxide. The RRAM device may further include a second interface layer positioned between the switching oxide layer and the second electrode. The second interface layer includes a discontinuous film of a second material that is more chemically stable than the transition metal oxide. The second electrode may include multiple electrode components that may include an alloy, a first layer of a first metallic material, and/or a second layer of a second metallic material.

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20-02-2020 дата публикации

Crossbar array with reduced disturbance

Номер: US20200058352A1
Автор: Ning Ge
Принадлежит: Tetramem Inc

Crossbar arrays with reduced disturbance and methods for programming the same are disclosed. In some implementations, an apparatus comprises: a plurality of rows; a plurality of first columns; a plurality of second columns; a plurality of devices. Each of the plurality of devices is connected among one of the plurality of rows, one of the plurality of first columns, and one of the plurality of second columns. The device further comprises a shared end on the plurality of first columns or the plurality of the second columns connecting to the plurality of the devices in the same row or column; the shared end is grounding or holds a stable voltage potential. In some implementations, one of the devices is: a RRAM, a floating date, a phase change device, an SRAM, a memristor, or a device with tunable resistance. In some implementations the stable voltage potential is a constant DC voltage.

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02-03-2017 дата публикации

REGULATING MEMRISTOR SWITCHING PULSES

Номер: US20170062048A1
Принадлежит:

A device for regulating memristor switching pulses is described. The device includes a voltage source to supply a voltage to a memristor. The device also includes a voltage detector to detect a memristor voltage. The memristor voltage is based on an initial resistance state of the memristor and the voltage supplied by the voltage source. The device also includes a comparator to compare the memristor voltage with a target voltage value for the memristor. The device also includes a feedback loop to indicate to a control switch when the memristor voltage is at least equal to the target voltage value. The device also includes a control switch to cut off the memristor from the voltage source when the memristor voltage is at least equal to the target voltage value. 1. A device for regulating memristor switching pulses , the device comprising:a voltage source to supply a voltage to a memristor;a voltage detector to detect a memristor voltage, in which the memristor voltage is based on an initial resistance state of the memristor and the voltage supplied by the voltage source;a comparator to compare the memristor voltage with a target voltage value for the memristor;a feedback loop to indicate to a control switch when the memristor voltage is at least equal to the target voltage value; anda control switch to cutting off the memristor from the voltage source when the memristor voltage is at least equal to the target voltage value.2. The device of claim 1 , further comprising a target voltage module to establish the target voltage value for the memristor.3. The device of claim 2 , in which the target voltage module comprises a digital-to-analog converter (DAC).4. The device of claim 2 , in which the target voltage value is established based on a number of characteristics of the memristor.5. The device of claim 1 , further comprising a control module claim 1 , in which the control module:detects when a memristor is malfunctioning based on the target voltage value; andprovides ...

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04-03-2021 дата публикации

REDUCING DISTURBANCE IN CROSSBAR ARRAY CIRCUITS

Номер: US20210065793A1
Автор: GE NING
Принадлежит: TETRAMEM INC.

Technologies relating to using a slew rate controller to reduce disturbance in a crossbar array circuit are disclosed. An example crossbar array circuit includes: one or more bit lines; one or more word lines; one or more 1T1R cells connected between the bit lines and the word lines; one or more ADCs connected to the one or more bit lines; one or more DACs connected to the one or more word lines; one or more access controls connected to the one or more 1T1R cells and configured to select a 1T1R cell in the one or more 1T1R cells and to program the selected 1T1R cell; and a slew rate controller connected to the DACs, wherein the slew rate controller is configured to receive an input signal. The slew rate controller may be configured to transform a step function input signal into a slew rate input signal. 1. A crossbar array circuit comprising:one or more bit lines;one or more word lines;one or more cell devices connected between the bit lines and the word lines;one or more ADCs connected to the one or more bit lines;one or more DACs connected to the one or more word lines;one or more access controls connected to the one or more cell devices; andconfigured to select a cell device in the one or more cell devices and to program the selected cell device; anda slew rate controller connected to the DACs, wherein the slew rate controller is configured to receive an input signal.2. The crossbar array circuit as claimed in claim 1 , wherein a cell device in the one or more cell devices is a 1T1R cell.3. The crossbar array circuit as claimed in claim 2 , wherein the 1T1R cell in the one or more cell devices comprises a transistor and an RRAM device.4. The crossbar array circuit as claimed in claim 2 , wherein the slew rate controller is configured to transform a step function input signal into a slew rate input signal.5. The crossbar array circuit as claimed in claim 2 , wherein a cell device in the one or more cell devices is a 2T1R cell.6. The crossbar array circuit as ...

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04-03-2021 дата публикации

RRAM CROSSBAR ARRAY CIRCUITS WITH SPECIALIZED INTERFACE LAYERS FOR LOW CURRENT OPERATION

Номер: US20210066589A1
Автор: GE NING, Zhang Minxian
Принадлежит: TETRAMEM INC.

Technologies relating to RRAM crossbar array circuits with specialized interface layers for the low current operations are disclosed. An example apparatus includes: a substrate; a bottom electrode formed on the substrate; a first layer formed on the bottom electrode; an RRAM oxide layer formed on the first layer and the bottom electrode; and a top electrode formed on the RRAM oxide layer. The first layer may be a continuous layer or a discontinuous layer. The apparatus may further comprise a second layer formed between the RRAM oxide layer and the top electrode. The second layer may be a continuous layer or a discontinuous layer. 1. An apparatus comprising:a substrate;a bottom electrode formed on the substrate;a first layer formed on the bottom electrode;a RRAM oxide layer formed on the first layer and the bottom electrode; anda top electrode formed on the RRAM oxide layer.2. The apparatus as claimed in claim 1 , wherein the substrate is made of one or more of the following materials: Si claim 1 , SiO claim 1 , SiN claim 1 , AlO claim 1 , AlN claim 1 , or glass.3. The apparatus as claimed in claim 1 , wherein the bottom electrode is made of one or more of the following materials: Pd claim 1 , Pt claim 1 , Ir claim 1 , W claim 1 , Ta claim 1 , Hf claim 1 , Nb claim 1 , V claim 1 , Ti claim 1 , TiN claim 1 , TaN claim 1 , NbN claim 1 , a combination thereof claim 1 , or an alloy of any of these materials with any other conductive materials.4. The apparatus as claimed in claim 1 , wherein the RRAM oxide layer is made of one or more of the following materials: TaO(where x≤2.5) claim 1 , HfO(where x≤2) claim 1 , TiO(where x≤2) claim 1 , ZrO(where x≤2) claim 1 , or a combination thereof.5. The apparatus as claimed in claim 1 , wherein the first layer is a discontinuous layer.6. The apparatus as claimed in claim 1 , wherein the first layer is made of one or more of the following materials: AlO claim 1 , SiO claim 1 , SiN claim 1 , AlN claim 1 , or a combination thereof.7. ...

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17-03-2022 дата публикации

SEMANTIC REPRESENTATION METHOD AND SYSTEM BASED ON AERIAL SURVEILLANCE VIDEO AND ELECTRONIC DEVICE

Номер: US20220083780A1
Принадлежит: TSINGHUA UNIVERSITY

A semantic representation method and system based on an aerial surveillance video, and an electronic device are provided. The semantic representation method includes: taking a pedestrian and a vehicle in the aerial surveillance video as a target for tracking; inputting a coordinate track of the target into a first semantic classifier to output a first semantic result of the target; performing semantic merging on the first semantic result, and inputting an obtained semantic merging result into a second semantic classifier to output a second semantic result of the target; and performing cluster analysis on the first semantic result to obtain a target group of the target, and according to the target group of the target, the obtained scene analysis result and the second semantic result, determining semantics of the aerial surveillance video. 1. A semantic representation method based on an aerial surveillance video , comprising the following steps:1) tracking a target in the aerial surveillance video, and determining tracking data of the target; wherein, the target refers to a pedestrian or a running vehicle;2) inputting a coordinate track of the target into a first semantic classifier to output a first semantic result of the target; wherein, the first semantic result represents a behavior of the target in an interval lower than a preset time;3) performing semantic merging on the first semantic result to obtain a semantic merging result, and inputting the semantic merging result into a second semantic classifier to output a second semantic result of the target; wherein, the second semantic result represents a steering situation of the target in an interval no less than the preset time;4) analyzing a scene in the aerial surveillance video to obtain a scene analysis result, according to the tracking data of the target and a preset tab in the aerial surveillance video; and5) performing cluster analysis on the first semantic result to obtain a target group of the target, and ...

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09-03-2017 дата публикации

EPROM CELL WITH MODIFIED FLOATING GATE

Номер: US20170069639A1

An electronically programmable read-only memory (EPROM) cell includes a semiconductor substrate having source and drain regions; a floating gate, adjacent to the source and drain regions and separated from the semiconductor substrate by a first dielectric layer, the floating gate including: a polysilicon layer formed over the first dielectric layer; a first metal layer electrically connected to the polysilicon layer, where the surface area of the first metal layer is less than 1000 μm; and a control gate comprising a second metal layer, capacitively coupled to the first metal layer through a second dielectric material disposed therebetween. 1. An electronically programmable read-only memory (EPROM) cell , comprising:a semiconductor substrate having source and drain regions; a polysilicon layer formed over the first dielectric layer;', {'sup': '2', 'a first metal layer electrically connected to the polysilicon layer, where the surface area of the first metal layer is less than 1000 μm; and'}], 'a floating gate, adjacent to the source and drain regions and separated from the semiconductor substrate by a first dielectric layer, the floating gate comprisinga control gate comprising a second metal layer, capacitively coupled to the first metal layer through a second dielectric material disposed therebetween.2. The EPROM cell of claim 1 , wherein the surface area of the first metal layer is between about 500 μmand 250 μm.3. The EPROM cell of claim 1 , wherein the surface area of he first metal layer is less than 400 μm.4. The EPROM cell of claim 1 , wherein the second metal layer has a surface area at least equal to a surface area of the EPROM cell.5. The EPROM cell of claim 1 , wherein a coupling ratio defined as C/(C+C) is about 0.6 claim 1 , where Cis capacitance between the second metal layer and the first metal layer and Cis capacitance between the floating gate and the semiconductor substrate.6. An electronically programmable read-only memory (EPROM) cell claim 1 , ...

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16-03-2017 дата публикации

SELECTORS WITH OXIDE-BASED LAYERS

Номер: US20170077179A1
Принадлежит:

A selector with an oxide-based layer includes an oxide-based layer that has a first region and a second region. The first region contains a metal oxide in a first oxidation state, and the second region contains the metal oxide in a second oxidation state. The first region also forms a part of each of two opposite faces of the oxide-based layer. 1. A selector , comprising an oxide-based layer , wherein:the oxide-based layer comprises a first region having a metal oxide in a first oxidation state and a second region having the metal oxide in a second oxidation state; andthe first region forms a part of each of two opposite faces of the oxide-based layer.2. The selector of claim 1 , wherein the second region has two pads sandwiching the first region in a lateral direction of the oxide-based layer.3. The selector of claim 1 , wherein the metal oxide in the second oxidation state is less conducting than the metal oxide in the first oxidation state.4. The selector of claim 1 , wherein the selector exhibits nonlinear current-voltage behavior in a voltage range of interest.5. The selector of claim 1 , wherein the metal oxide has a metal selected from the group consisting of Nb claim 1 , V claim 1 , Ti claim 1 , W claim 1 , Ta claim 1 , Mo claim 1 , Zn claim 1 , and Cr.6. The selector of claim 1 , wherein the metal oxide has Nb claim 1 , the first oxidation state is NbO claim 1 , and the second oxidation state is NbO.7. A memory device claim 1 , comprising a selector with an oxide-based layer coupled to a memristor claim 1 , wherein:the oxide-based layer comprises a first region having a metal oxide in a first oxidation state and a second region having the metal oxide in a second oxidation state;the first region forms a part of each of two opposite faces of the oxide-based layer;the metal oxide in the second oxidation state is less conducting than the metal oxide in the first oxidation state; andthe memristor is coupled to at least a portion of the first region of the ...

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14-03-2019 дата публикации

SAMPLE SUBSTANCE MOLECULAR BONDS BREAKDOWN AND SEL COLLECTION

Номер: US20190079008A1
Автор: GE NING
Принадлежит:

A sample comprising a first substance and a second substance is modified by breaking down molecular bonds of the second substance of the sample to form a modified sample having altered surface enhanced luminescence (SEL) characteristics to reduce overlapping of SEL characteristics of the first substance in the second substance. Surface enhanced luminescence data resulting from excitation of the modified sample is collected. Characteristics of the first substance based upon the collected surface enhanced luminescence data are identified. 1. An apparatus comprising:a first laser source having a first emission wavelength to excite a sample to a state of surface enhanced luminescence (SEL); anda second laser source having a second emission wavelength to break molecular bonds of a substance of the sample to alter SEL resulting from excitation of the sample; anda SEL collector to collect SEL resulting from excitation of the sample.2. The apparatus of claim 1 , wherein the second emission wavelength length and dose leaves the substance with the broken molecular bonds as part of the sample without vaporization of a majority of the substance.3. The apparatus of claim 1 , wherein the second emission length vaporizes a majority of the substance.4. The apparatus of further comprising a controller to output control signals causing the second laser source to apply photons to the sample claim 1 , the applied photons having wavelengths sweeping across a range of emission wavelengths including the second emission wavelength.5. The apparatus of further comprising a controller to:command the first laser source to excite the sample and to receive first SEL data from the SEL collector;after receipt of the SEL data, command the second laser source to apply first photons having the second emission wavelength to the sample to break molecular bonds of a substance of the sample to alter SEL resulting from excitation of the substance;after the application of the photons having the second ...

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12-03-2020 дата публикации

IMPLEMENTING A MULTI-LAYER NEURAL NETWORK USING CROSSBAR ARRAY

Номер: US20200082252A1
Автор: GE NING
Принадлежит: TETRAMEM INC.

Systems and methods for implementing a multi-layer neural network using crossbar arrays are disclosed. In some implementations, an apparatus comprises: a plurality of first devices, a plurality of second devices, and a plurality of first flow controllers connecting the plurality of first devices and the plurality of second devices. Each flow controller in the plurality of first flow controllers is independently controlled from other flow controller in the plurality of first flow controllers. In some implementations, the apparatus further comprises: a plurality of third devices; a plurality of second flow controllers connecting the plurality of second devices and the plurality of third devices; and a first common ground line separating the plurality of first flow controllers and the plurality of second flow controllers. Each of the plurality of second flow controllers is independent of each of the plurality of first flow controllers. 1. An apparatus comprising:a plurality of first devices;a plurality of second devices; and 'each flow controller in the plurality of first flow controllers is independently controlled from other flow controller in the plurality of first flow controllers.', 'a plurality of first flow controllers connecting the plurality of first devices and the plurality of second devices, wherein'}2. The apparatus as claimed in claim 1 , wherein one of the plurality of first devices and/or one of the plurality of second devices is one of: a memristor device claim 1 , a memristive device claim 1 , a floating gate claim 1 , a Phase Change Random Access Memory (PCRAM) device claim 1 , a Resistive Random-Access Memory (RRAM or ReRAM) claim 1 , a Magnetoresistive Random-Access Memory (MRAM) claim 1 , a Dynamic random-access memory (DRAM) claim 1 , a Static Random-Access Memory (static RAM or SRAM) claim 1 , or other devices with tunable resistance.3. The apparatus as claimed in claim 1 , further comprising:a plurality of third devices;a plurality of second ...

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20-04-2017 дата публикации

Addressing an eprom on a printhead

Номер: US20170106648A1
Принадлежит: Hewlett Packard Development Co LP

Addressing an EPROM on a printhead is described. In an example, a printhead includes an electronically programmable read-only memory (EPROM) having a bank of cells arranged in rows and columns, each of the cells having a addressing port, a row select port, and a column select port. A conductor is coupled to the addressing portion of each of the cells. A shift register circuit is coupled to at least one of the row select port and the column select port of each of the cells, the shift register circuit storing samples of an input signal responsive to a plurality of clock signals. A decoder is coupled to the shift register circuit to provide the input signal based on a logical combination of a plurality of data signals and at least a portion of the clock signals.

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30-04-2015 дата публикации

FORMING MEMRISTORS ON IMAGING DEVICES

Номер: US20150114927A1

Forming memristors on imaging devices can include forming a printhead body comprising a first conductive material, forming a memory on the printhead body by performing an oxidation process to form a switching oxide material on the first conductive material, and forming a second conductive material on the switching oxide material. 1. A method of forming a printhead with a memristor , comprising:forming a printhead body comprising a first conductive material;forming a memory with the printhead body by performing thermal oxidation to form a switching oxide material on the first conductive material; andforming a second conductive material on the switching oxide material, wherein the first conductive material comprises a first electrode of the memory and the second conductive material comprises a second electrode of the memory.2. The method of claim 1 , wherein performing thermal oxidation to form the switching oxide material includes performing a furnace oxidation process.3. The method of claim 1 , wherein performing thermal oxidation to form the switching oxide material includes performing a rapid thermal processing method.4. The method of claim 1 , wherein performing thermal oxidation to form the switching oxide material includes performing a rapid thermal processing method.5. The method of claim 1 , wherein forming the memory comprises etching the oxide material claim 1 , the switching oxide material claim 1 , and the second conductive material.6. A method of forming a printhead with a memristor claim 1 , comprising:forming a printhead body by depositing a first conductive material on a number of material materials; andforming a memory on the printhead body, wherein the memory includes the first conductive material as a first electrode, a second conductive material as a second electrode, and a switching oxide material formed by plasma oxidation, between the first and second conductive materials.7. The method of claim 6 , wherein forming the printhead body further ...

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28-04-2016 дата публикации

Fluid ejection device

Номер: US20160114580A1
Принадлежит: Hewlett Packard Development Co LP

A fluid ejection device is described. In an example, a device includes a substrate having a chamber formed thereon to contain a fluid. A metal layer includes a resistor under the chamber having a surface thermally coupled to the chamber. At least one layer is deposited on the metal layer. A polysilicon layer is under the metal layer comprising a polysilicon structure under the resistor to change topography of the resistor such that the surface is uneven.

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09-04-2020 дата публикации

NON-REWRITABLE CODE COMPARATORS WITH MEMRISTORS AND SERIAL RESISTORS

Номер: US20200110909A1
Автор: GE NING
Принадлежит: TETRAMEM INC.

Systems and methods for providing a non-rewritable code comparator using a memristor and a serial resistor are disclosed. An example apparatus comprises: a plurality of first terminals; a plurality of second terminals; and a plurality of two-terminal device pairs formed between the plurality of first terminals and the plurality of second terminals. Each two-terminal device pair in the plurality of two-terminal device pairs include at least one memristor and at least one resistor; each two-terminal device pair is configured to be switched to a subsequent state once and only once. In some implementations, a two-terminal device pair is configured to remain in the subsequent state regardless of whether an input signal to the apparatus matches a reference signal to the apparatus. 1. An apparatus comprising:a plurality of first terminals;a plurality of second terminals; anda plurality of two-terminal device pairs formed between the plurality of first terminals and the plurality of second terminals, wherein each two-terminal device pair in the plurality of two-terminal device pairs include at least one memristor and at least one resistor and is configured to be switched to a subsequent state once and only once.2. The apparatus as claimed in claim 1 , wherein the two-terminal device pair is configured to remain in the subsequent state regardless of whether an input signal to the apparatus matches a reference signal to the apparatus.3. The apparatus as claimed in claim 1 , wherein each two-terminal device pair in the plurality of two-terminal device pairs includes two memristors and two resistors connected to the two memristors.4. The apparatus as claimed in claim 1 , wherein each two-terminal device pair in the plurality of two-terminal device pairs includes a memristor and two resistors connected to the memristor.5. The apparatus as claimed in claim 1 , wherein each two-terminal device pair in the plurality of two-terminal device pairs includes two memristors and a ...

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09-04-2020 дата публикации

CODE COMPARATORS WITH NONPOLAR DYNAMICAL SWITCHES

Номер: US20200111518A1
Автор: GE NING
Принадлежит: TETRAMEM INC.

Code comparators with nonpolar dynamical switches are provided. An example apparatus comprises: a plurality of row wires; a plurality of column wires; one or more cross-point devices, and a nonpolar volatile two-terminal device formed within a plurality of cross-point devices. Each cross-point device in the plurality of cross-point devices is located at a cross-point between a row in the plurality of row wires and a column in the plurality of column wires; the nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device. The nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device. 1. An apparatus comprising:a plurality of row wires;a plurality of column wires; 'each cross-point device in the plurality of cross-point devices is located at a cross-point between a row in the plurality of row wires and a column in the plurality of column wires; and', 'a plurality of cross-point devices, wherein'} 'the nonpolar volatile two-terminal device is configured to automatically revert from an ON state to an OFF state, in response to a removal of a bias or signal applied on the nonpolar volatile two-terminal device.', 'a nonpolar volatile two-terminal device formed within the plurality of cross-point devices, wherein'}2. The apparatus as claimed in claim 1 , wherein the automatically reverts from the ON state to the OFF state within between 100 picoseconds and 100 milliseconds after the bias or signal applied on the nonpolar volatile two-terminal device is removed.3. The apparatus as claimed in claim 1 , wherein the nonpolar volatile two-terminal device has a nonlinearity ratio higher than 10 claim 1 , wherein the nonlinearity ratio is defined as a first current obtained on the device ...

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24-07-2014 дата публикации

INK LEVEL SENSOR AND RELATED METHODS

Номер: US20140204148A1
Принадлежит:

In an embodiment, a method of sensing an ink level includes applying a pre-charge voltage Vp to a sense capacitor to charge the sense capacitor with a charge Q, sharing Q between the sense capacitor and a reference capacitor, causing a reference voltage Vg at the gate of an evaluation transistor, and determining a resistance from drain to source of the evaluation transistor that results from Vg. 1. An ink level sensor comprising:a sense capacitor whose capacitance changes with a level of ink in a chamber;{'b': '2', 'a switch T to apply a voltage Vp to the sense capacitor, placing a charge on the sense capacitor;'}{'b': '3', 'a switch T to share the charge between the sense capacitor and a reference capacitor, resulting in a reference voltage Vg; and'}an evaluation transistor configured to provide a drain to source resistance in proportion to the reference voltage.2. An ink level sensor as in claim 1 , wherein the sense capacitor comprises:a metal plate;a passivation layer over the metal plate; andsubstance within a chamber above the passivation layer.3. An ink level sensor as in claim 2 , wherein the substance is selected from the group consisting of ink claim 2 , ink and air claim 2 , and air.4. An ink level sensor as in claim 1 , wherein the reference capacitor comprises gate capacitance of the evaluation transistor.520-. (canceled)21. An ink level sensor as in claim 1 , further comprising a sense structure that includes the sense capacitor claim 1 , the chamber claim 1 , a nozzle claim 1 , a metal plate firing element disposed within the fluid chamber claim 1 , a passivation layer over the firing element claim 1 , and an insulating layer on a silicon substrate.22. An ink level sensor as in claim 1 , further comprising a clearing resistor to purge ink residue from the chamber.23. An ink level sensor as in claim 2 , wherein the metal plate comprises a resistor firing element.24. An ink level sensor as in claim 2 , further comprising a parasitic elimination element ...

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12-05-2016 дата публикации

Fluid Ejection Apparatuses Including a Substrate with a Bulk Layer and a Epitaxial Layer

Номер: US20160129690A1

Examples of fluid ejection apparatuses and methods for making fluid ejection apparatuses are described. An example method may include forming a fluid feed slot in a bulk layer of a substrate, forming a plurality of ink feed channels in at least an epitaxial layer of the substrate, each of the ink feed channels fluidically coupled to the fluid feed slot, and forming a plurality of drop generators over the substrate such that the epitaxial layer of the substrate is between the plurality of drop generators and the bulk layer and such that the each of the drop generators is fluidically coupled to the fluid feed slot by at least one of the ink feed channels.

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07-08-2014 дата публикации

CIRCUIT THAT SELECTS EPROMS INDIVIDUALLY AND IN PARALLEL

Номер: US20140218436A1
Принадлежит:

An integrated circuit including a first EPROM, a second EPROM, and a circuit. The first EPROM is configured to provide a first state and a second state. The second EPROM is configured to provide a third state and a fourth state. The circuit is configured to select the first EPROM and the second EPROM individually and in parallel with each other. 1. An integrated circuit , comprising:a first EPROM configured to provide a first state and a second state;a second EPROM configured to provide a third state and a fourth state; anda circuit configured to select the first EPROM and the second EPROM individually and in parallel with each other.2. The integrated circuit of claim 1 , wherein the first EPROM has a first channel width and the second EPROM has a second channel width that is different than the first channel width.3. The integrated circuit of claim 1 , wherein the first EPROM is a first type of EPROM and the second EPROM is a second type of EPROM that is different than the first type of EPROM.4. The integrated circuit of claim 1 , wherein the first state corresponds to a first un-programmed resistance claim 1 , the second state corresponds to a first programmed resistance claim 1 , the third state corresponds to a second un-programmed resistance claim 1 , and the fourth state corresponds to a second programmed resistance claim 1 , wherein each resistance of the first un-programmed resistance claim 1 , the first programmed resistance claim 1 , the second un-programmed resistance claim 1 , and the second programmed resistance is a different resistance value than each of the other three resistances.5. The integrated circuit of claim 4 , comprising:a third EPROM configured to provide a fifth state and a sixth state, wherein the fifth state corresponds to a third un-programmed resistance and the sixth state corresponds to a third programmed resistance and each resistance of the first un-programmed resistance, the first programmed resistance, the second un-programmed ...

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17-05-2018 дата публикации

Printhead assembly

Номер: US20180134037A1
Принадлежит: Hewlett Packard Development Co LP

The present subject matter relates to a printhead assembly comprising a plurality of print nozzles in a nozzle array. Each of the plurality of print nozzles is coupled to a printhead firing resistor, the printhead firing resistor being individually addressable. A print control circuit is to actuate the printhead firing resistor. In accordance with one example implementation of the present subject matter, the print control circuit comprises pull-down resistors made of Tantalum-Aluminum (Ta—Al).

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03-06-2021 дата публикации

P-TYPE SEMICONDUCTOR LAYERS COUPLED TO N-TYPE SEMICONDUCTOR LAYERS

Номер: US20210167118A1

A device includes a P-N junction comprising a monolithic N-type semiconductor layer coupled to a monolithic P-type semiconductor layer. The monolithic N-type semiconductor layer includes a first portion and a second portion. The first portion has a first surface and the second portion has a second surface facing away from the first surface. The monolithic P-type semiconductor layer includes a third portion and a fourth portion. The third portion has a third surface and the fourth portion has a fourth surface facing away from the third surface. 1. A device comprising:a P-N junction comprising a monolithic N-type semiconductor layer coupled to a monolithic P-type semiconductor layer,wherein the monolithic N-type semiconductor layer includes a first portion and a second portion, the first portion having a first surface and the second portion having a second surface facing away from the first surface, andwherein the monolithic P-type semiconductor layer includes a third portion and a fourth portion, the third portion having a third surface and the fourth portion having a fourth surface facing away from the third surface.2. The device of claim 1 , further comprising:a first contact coupled to the first surface;a second contact coupled to the second surface;a third contact coupled to the third surface; anda fourth contact coupled to the fourth surface.3. The device of claim 1 , wherein the monolithic N-type semiconductor layer and the monolithic P-type semiconductor layer form a first light emitting diode (LED) having a first orientation and a second LED having a second orientation opposite to the first orientation.4. The device of claim 1 , wherein the monolithic N-type semiconductor layer and the monolithic P-type semiconductor layer form a first photon sensing diode having a first orientation and a second photon sensing diode having a second orientation opposite to the first orientation.5. The device of claim 1 , wherein the first surface is parallel to the fourth ...

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17-05-2018 дата публикации

STRUCTURES FOR SURFACE ENHANCED RAMAN

Номер: US20180136135A1
Принадлежит:

In one example, a structure for surface enhanced Raman spectroscopy includes a cluster of metal nanoparticles in a hole. 1. A structure for surface enhanced Raman spectroscopy , comprising a cluster of metal nanoparticles in a hole.2. The structure of claim 1 , where the hole is tapered and the cluster of nanoparticles includes a nanoparticle in a narrower part of the hole and multiple nanoparticles in a broader part of the hole.3. The structure of claim 2 , where the nanoparticles are clustered in layers.4. The structure of claim 3 , where a layer at a narrow part of the hole includes a single nanoparticle.5. The structure of claim 1 , comprising a single hole and a cluster of gold claim 1 , silver or copper nanoparticles in the hole.6. The structure of claim 1 , comprising multiple holes and a cluster of gold claim 1 , silver or copper nanoparticles in each of the holes.7. The structure of claim 1 , comprising a reflective material lining the hole.8. The structure of claim 7 , comprising a dielectric coating the reflective lining to electrically insulate the metal nanoparticles from the reflective lining.9. A structure for surface enhanced Raman spectroscopy claim 7 , comprising:a substrate having a tapered hole therein and a surface surrounding the hole; anda cluster of metal nanoparticles in the hole and not on the surface surrounding the hole.10. The structure of claim 9 , where the tapered hole is cone shaped or pyramid shaped.11. The structure of claim 10 , where the nanoparticles are clustered in the hole in two layers or in three layers.12. The structure of claim 11 , where the cluster includes a total of more than two nanoparticles and fewer than ten nanoparticles across a broadest part of the hole.13. A process to make a structure for surface enhanced Raman spectroscopy claim 11 , the process comprising drawing a solution containing metal nanoparticles over a hole in a substrate to deposit metal nanoparticles in the hole.14. The process of claim 13 , ...

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03-06-2021 дата публикации

CMOS IMAGE SENSORS WITH INTEGRATED RRAM-BASED CROSSBAR ARRAY CIRCUITS

Номер: US20210168321A1
Автор: GE NING, Yin Wenbo
Принадлежит: TETRAMEM INC.

Technologies relating to CMOS image sensors with integrated Resistive Random-Access Memory (RRAMs) units that provide energy efficient analog storage, ultra-high speed analog storage, and in-memory computing functions are disclosed. An example CMOS image sensor with integrated RRAM crossbar array circuit includes a CMOS image sensor having multiple pixels configured to receive image signals; a column decoder configured to select the pixels in columns to read out; a row decoder configured to select the pixels in rows to read out; an amplifier configured to amplify first signals received from the CMOS image sensor; a multiplexer configured to sequentially or serially read out second signals received from the amplifier; and a first RRAM crossbar array circuit configured to store third signals received from the multiplexer. 1. An apparatus comprising:a CMOS image sensor having multiple pixels configured to receive image signals;a column decoder configured to select the pixels in columns to read out;a row decoder configured to select the pixels in rows to read out;an amplifier configured to amplify first signals received from the CMOS image sensor;a multiplexer configured to sequentially or serially read out second signals received from the amplifier; anda first RRAM crossbar array circuit configured to store and process third signals received from the multiplexer.2. The apparatus as claimed in claim 1 , wherein the first RRAM crossbar array circuit comprises one or more of row lines claim 1 , one or more column lines claim 1 , and one or more RRAM cells connected between row lines and column lines.3. The apparatus as claimed in claim 1 , wherein the RRAM cell comprises a one-transistor-one-memristor (1T1R) RRAM cell.4. The apparatus as claimed in claim 1 , wherein the amplifier comprises a three-stage source follower amplifier.5. The apparatus as claimed in claim 4 , wherein the three-stage operational amplifier comprises a first stage comprising an input stage claim 4 ...

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08-09-2022 дата публикации

REDUCING CURRENT IN CROSSBAR ARRAY CIRCUITS UTILIZING LARGE INPUT RESISTANCE

Номер: US20220284956A1
Автор: GE NING, Hu Miao
Принадлежит: TetraMem, Inc.

Aspects of the present disclosure provides a crossbar array circuit including: a crossbar array; a digital-to-analog converter (DAC) configured to receive an input signal to be applied to the crossbar array; a large input resistance connected to the DAC and the crossbar array; and an analog-to-digital converter (ADC) configured to generate output signals of the crossbar array circuit. The crossbar array includes a plurality of cross-point devices connecting a plurality of word lines and a plurality of bit lines. In some embodiments, the crossbar array circuit includes a large output resistance connected to the crossbar array. 1. A crossbar array circuit , comprising:a crossbar array comprising a plurality of cross-point devices;a digital-to-analog converter (DAC) configured to receive an input signal to be applied to the crossbar array;an input resistance connected to the DAC and the crossbar array; andan analog-to-digital converter (ADC) configured to generate output signals of the crossbar array circuit.2. The crossbar array circuit of claim 1 , further comprising:a trans-impedance amplifiers (TIA) connected to the crossbar array, wherein the ADC is configured to receive signals from the TIA.3. The crossbar array circuit of claim 1 , wherein the input resistance is connected to a plurality of word lines of the crossbar array claim 1 , and wherein the input signal is applied to the crossbar array via the input resistance and the word lines.4. The crossbar array circuit of claim 1 , wherein a resistance of the input resistance is between 100 ohm and 500 ohm claim 1 , and wherein the crossbar array comprises 128×128 or 256×256 crossing point devices.5. The crossbar array circuit of claim 1 , further comprising a switch connected to the DAC claim 1 , wherein the input signal is provided to the crossbar array via the input resistance when the switch is open.6. The crossbar array circuit of claim 1 , wherein the input signal comprises a vector voltage.7. The crossbar ...

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25-05-2017 дата публикации

INK LEVEL SENSING

Номер: US20170144451A1
Принадлежит:

In some examples, a method of sensing an ink level includes applying a pre-charge voltage to a sense capacitor to charge the sense capacitor with a charge, sharing the charge between the sense capacitor and a reference capacitor, causing a reference voltage at a gate of an evaluation transistor, and determining a resistance from a drain to a source of the evaluation transistor that results from the reference voltage. 1. An apparatus comprising:a sense capacitor between a first node and ground;a first switch to couple a first voltage to the first node and charge the sense capacitor;a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node;a transistor having a drain, a gate coupled to the second node, and a source coupled to ground;a current source to inject a current at the drain; anda controller to calculate a resistance between the drain and the source of the transistor based on a voltage at the drain.2. The apparatus of claim 1 , further comprising:an analog to digital converter (ADC) to convert the resistance to a digital value.3. The apparatus of claim 1 , wherein the sense capacitor claim 1 , the first node claim 1 , the second node claim 1 , the first switch claim 1 , the second switch claim 1 , and the transistor are integrated on a printhead claim 1 , and the controller is a printer controller.4. The apparatus of claim 1 , further comprising a third switch to couple the first and second nodes to ground to discharge the sense capacitor and the reference capacitor prior to coupling the first voltage to the first node.5. The apparatus of claim 1 , further comprising a third node coupled to the first voltage through the first switch to prevent a parasitic capacitance between the first and third nodes from charging.6. The apparatus of claim 1 , wherein the sense capacitor comprises:a metal layer;a passivation layer over the metal layer; anda ...

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24-05-2018 дата публикации

ANALYTE DETECTION PACKAGE HOUSING

Номер: US20180143135A1
Принадлежит:

In one example, an analyte detection package includes a substrate, surface-enhanced luminescence (SEL) structures extending from the substrate and a low wettability housing. The SEL structures have a first wettability for a given liquid. The low wettability housing extends from the substrate to form a chamber between the housing of the substrate about the SEL structures to receive an analyte containing solution. The housing has an inner surface adjacent the chamber, wherein the inner surface has a second wettability for the given liquid less than the first wettability. 1. An analyte detection package comprising:a substrate;a surface-enhanced luminescence (SEL) structure extending from the substrate, the SEL structure having a first wettability for a given liquid;a low wettability housing extending from the substrate to form a chamber between the housing of the substrate about the SEL structure to receive an analyte containing solution, the housing having an inner surface adjacent the chamber, the inner surface having a second wettability for the given liquid less than the first wettability.2. The analyte detection package of claim 1 , wherein the inner surface has a wettability contact angle of greater than 90° as measured with ethanol.3. The analyte detection package of claim 1 , wherein the inner surface has a wettability contact angle of at least 110° as measured with ethanol.4. The analyte detection package of claim 1 , wherein the inner surface has a wettability contact angle of at least 150° as measured with ethanol.5. The analyte detection package of claim 1 , wherein the inner surface has a roughness of between 1 micrometer and 100 μm.6. The analyte detection package of claim 1 , wherein the inner surface has a secondary roughness of between 50 nanometers and 200 nm.7. The analyte detection package of claim 1 , wherein the substrate has a first surface portion formed from a high surface diffusivity metal selected from a group of metals consisting of gold ...

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24-05-2018 дата публикации

SURFACE ENHANCED LUMINESCENCE ELECTRIC FIELD GENERATING BASE

Номер: US20180143136A1
Принадлежит:

Provided in one example is an analyte detection apparatus that includes surface enhanced luminescence (SEL) structure. A dielectric layer underlies the SEL structure. An electric field generating base underlies the dielectric layer. The electric field generating base is to apply an electric field about the SEL structures to attract charged ions to the SEL structures. 1. An analyte detection apparatus comprising:a surface enhanced luminescence (SEL) structure;a dielectric layer underlying the SEL structure; andan electric field generating base underlying the dielectric layer, the electric field generating base to apply an electric field about the SEL structure to attract charged ions to the SEL structure.2. The analyte detection package of further comprising a metal floor from which the SEL structure extends claim 1 , wherein the dielectric layer underlies the metal floor.3. The analyte detection apparatus of further comprising a housing above the metal floor and over the SEL structure claim 2 , the housing supporting a counter electrode to facilitate the generation of the electric field.4. The analyte detection apparatus of claim 1 , wherein the electric field generating base comprises an integrated transistor.5. The analyte detection apparatus of claim 1 , wherein the electric field generating base comprises a floating gate.6. The analyte detection apparatus of claim 1 , wherein the electric field generating base comprises an erasable programmable read-only memory (EPROM) chip.7. The analyte detection apparatus of claim 1 , wherein the electric field generating base comprises:a substrate;a source electrode supported by the substrate;a drain electrode supported by the substrate;a channel material between the source electrode in the drain electrode; anda floating gate spaced opposite the channel material between the source electrode and the drain electrode, wherein the dielectric layer is between the floating gate and the SEL structure.8. An apparatus comprising:an ...

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25-05-2017 дата публикации

INK LEVEL SENSING

Номер: US20170146383A1
Принадлежит:

In some examples, an ink level sensor includes a sense capacitor between a first node and ground, a first switch to couple a first voltage to the first node and charge the sense capacitor, a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node, and a transistor having a drain, a gate coupled to the second node, and a source coupled to ground, the transistor to provide a drain to source resistance in proportion to the second voltage. 1. An ink level sensor comprising:a sense capacitor between a first node and ground;a first switch to couple a first voltage to the first node and charge the sense capacitor;a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node;a transistor having a drain, a gate coupled to the second node, and a source coupled to ground, the transistor to provide a drain to source resistance in proportion to the second voltage.2. The ink level sensor of claim 1 , wherein the drain is coupled to a current source.3. The ink level sensor of claim 1 , further comprising a third switch to couple the first and second nodes to ground to discharge the sense capacitor and the reference capacitor prior to coupling the first voltage to the first node.4. The ink level sensor of claim 1 , further comprising a third node coupled to the first voltage through the first switch to prevent a parasitic capacitance between the first and third nodes from charging.5. The ink level sensor of claim 1 , wherein the sense capacitor comprises:a metal layer;a passivation layer over the metal layer; anda substance within a chamber above the passivation layer.6. The ink level sensor of claim 5 , wherein the substance comprises a fluid in the chamber.7. The ink level sensor of claim 5 , wherein the metal layer is part of a resistor firing ...

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25-05-2017 дата публикации

CIRCUIT THAT SELECTS EPROMS INDIVIDUALLY AND IN PARALLEL

Номер: US20170147212A1

An integrated circuit including a first EPROM, a second EPROM, and a circuit. The first EPROM is configured to provide a first state and a second state. The second EPROM is configured to provide a third state and a fourth state. The circuit is configured to select the first EPROM and the second EPROM individually and in parallel with each other. 1. A method of multiple level EPROM encoding , comprising:providing a first EPROM and a second EPROM;selecting one of the first EPROM, the second EPROM, and the parallel combination of the first EPROM and the second EPROM; andmeasuring resistance through the selected one of the first EPROM, the second EPROM, and the parallel combination of the first EPROM and the second EPROM.2. The method of claim 1 , comprising:setting the first EPROM to one of a first un-programmed resistance and a first programmed resistance; andsetting the second EPROM to one of a second un-programmed resistance and a second programmed resistance, wherein each resistance of the first un-programmed resistance, the first programmed resistance, the second un-programmed resistance, and the second programmed resistance is different than each of the other three resistances.3. The method of claim 1 , comprising:providing a third EPROM;selecting one of the first EPROM, the second EPROM, the third EPROM, and each parallel combination of two or more of the first EPROM and the second EPROM and the third EPROM; andmeasuring resistance through the selected one of the first EPROM, the second EPROM, the third EPROM, and each parallel combination of two or more of the first EPROM and the second EPROM and the third EPROM. This patent application is a divisional of Ser. No. 14/343,133 filed Mar. 6, 2014, which is a 371 national stage of PCT/US2011/053488 with international filing date of Sep. 27, 2011, entitled “CIRCUIT THAT SELECTS EPROMS INDIVIDUALLY AND IN PARALLEL,” which is incorporated herein by reference.In inkjet printheads, fuse technology has been used in N- ...

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31-05-2018 дата публикации

ADDRESSING AN EPROM

Номер: US20180147839A1

Addressing an EPROM on a printhead is described. In an example, a printhead includes an electronically programmable read-only memory (EPROM) having a plurality of cells arranged in rows and columns, each of the cells having a addressing port, a row select port, and a column select port. A conductor is coupled to the addressing portion of each of the plurality of cells. A column shift register is coupled to the column select ports of the plurality of cells, the column shift register having a register location for each column of the plurality of cells and having an input to receive a first input signal. A row shift register is coupled to row select ports of the plurality of cells, the row shift register having a register location for each row of the plurality of cells and having an input to receive a second input signal. 1. An electronically programmable read-only (EPROM) system to output data from an EPROM memory unit , the system , comprising:the EPROM memory unit comprising a plurality of cells arranged in rows and columns, each of the cells to store a data bit, and each of the cells having a addressing port, a row select port, and a column select port;a data line coupled to the addressing port of each of the plurality of cells;a column shift register coupled to the column select ports of the plurality of cells, the column shift register having a register location for each column of the plurality of cells and having an input to receive a first input signal; anda row shift register coupled to row select ports of the plurality of cells, the row shift register having a register location for each row of the plurality of cells and having an input to receive a second input signal.2. The EPROM system of claim 1 , wherein each of the plurality of cells is addressable in the EPROM memory unit using the first input signal and the second input signal claim 1 , and wherein a logic state of an addressed cell in the plurality of cells is readable using the data line.3. The EPROM ...

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17-06-2021 дата публикации

THREE-DIMENSIONAL (3D) PRINTING

Номер: US20210178483A1

In an example of a 3D printing method, build material particles are applied to form a layer. Each build material particle includes a metal core and a metal oxide outer shell. The layer is patterned by selectively applying a reactive chemical on at least a portion of the layer to initiate a redox reaction with the metal oxide outer shells of the build material particles in contact with the reactive chemical, which reduces the metal oxide outer shells of the build material particles in contact with the reactive chemical and exposes the metal cores of the build material particles in contact with the reactive chemical. The patterned layer is exposed to rapid thermal processing to sinter the exposed metal cores to form a part layer. Any intact build material particles remain unsintered. 1. A three-dimensional (3D) printing method , comprising:applying build material particles to form a layer, each build material particle including a metal core and a metal oxide outer shell;patterning the layer by selectively applying a reactive chemical on at least a portion of the layer to initiate a redox reaction with the metal oxide outer shells of the build material particles in contact with the reactive chemical, thereby reducing the metal oxide outer shells of the build material particles in contact with the reactive chemical and exposing the metal cores of the build material particles in contact with the reactive chemical; andexposing the patterned layer to rapid thermal processing, thereby sintering the exposed metal cores to form a part layer and wherein any intact build material particles remain unsintered.2. The 3D printing method as defined in wherein:the metal core is aluminum and the metal oxide outer shell is aluminum oxide; orthe metal core is titanium and the metal oxide outer shell is titanium dioxide; or{'sub': 3', '4, 'the metal core is iron and the metal oxide outer shell is iron oxide (FeO); or'}the metal core is copper and the metal oxide outer shell is copper (II ...

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16-05-2019 дата публикации

ACTIVATABLE SURFACE ENHANCED RAMAN SPECTROSCOPY SENSOR STAGE

Номер: US20190145897A1

An activatable SEL sensor stage may include a substrate, cation metal-based material masses supported by the substrate and isolated from one another and dielectric capping layer over the cation metal-based material masses to inhibit oxidation of the cation metal-based material masses. 1. A surface enhanced luminescence (SEL) sensing system comprising: a substrate;', 'cation metal-based material masses supported by the substrate;', 'diffusion barriers separating and isolating the cation metal-based masses; and', 'dielectric capping layer over the cation metal-based material masses to inhibit oxidation of the cation metal-based material masses., 'an activatable SEL sensor stage comprising2. The SEL sensing system of claim 1 , wherein the diffusion barriers comprise voids separating the cation metal-based material masses.3. The SEL sensing system of claim 1 , wherein the activatable SEL sensor stage further comprises wells containing the cation metal-based material masses claim 1 , wherein the diffusion barriers comprise well sidewall liners.4. The SEL sensing system of claim 3 , wherein the cation metal-based material of each of the masses has a first diffusivity through the well sidewall layers in response to a stimulus and a second diffusivity through the dielectric capping layer in response to the stimulus claim 3 , the second diffusivity being greater than the first diffusivity.5. The SEL sensing system of claim 4 , wherein the first diffusivity is zero.6. The SEL sensing system of claim 4 , wherein each well further comprises a floor and wherein the diffusion barriers further comprise well floor liners claim 4 , wherein the cation metal-based material of each of the masses has a third diffusivity through the well floor liners in response to the stimulus claim 4 , the third diffusivity being less than the second diffusivity.7. The SEL sensing system of claim 1 , wherein the diffusion barriers each comprise at least one diffusion barrier material having a diffusion ...

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01-06-2017 дата публикации

FLUID EJECTION APPARATUS INCLUDING A PARASITIC RESISTOR

Номер: US20170151783A1

An example provides a fluid ejection apparatus including a first firing resistor and a second firing resistor to selectively cause fluid to be ejected through a single nozzle, and a parasitic resistor arranged to add a parasitic resistance to the first firing resistor. 1. A fluid ejection apparatus comprising:a first firing resistor and a second firing resistor to selectively cause fluid to be ejected through a single nozzle; anda parasitic resistor arranged to add a parasitic resistance to the first firing resistor.2. The fluid ejection apparatus of claim 1 , wherein the first firing resistor and the second firing resistor have different resistances.3. The fluid ejection apparatus of claim 2 , wherein the second firing resistor has a resistance greater than a resistance of the first firing resistor.4. The fluid ejection apparatus of claim 1 , wherein the first firing resistor is a low drop-weight resistor and the second firing resistor is a high drop-weight resistor.5. The fluid ejection apparatus of claim 1 , wherein the first firing resistor is to produce a fluid drop having a first size and the second firing resistor is to produce a fluid drop having a second size greater than the first size.6. The fluid ejection apparatus of claim 1 , wherein the first firing resistor and the second firing resistor are arranged to receive a same firing voltage.7. The fluid ejection apparatus of claim 1 , wherein the parasitic resistor comprises polysilicon.8. The fluid ejection apparatus of claim 1 , wherein the first firing resistor comprises at least one metal selected from the group comprising TaAl claim 1 , WSiN claim 1 , and TaSiN.9. The fluid ejection apparatus of claim 1 , wherein the second firing resistor comprises at least one metal selected from the group comprising TaAl claim 1 , WSiN claim 1 , and TaSiN.10. A fluid ejection system comprising:a fluid reservoir; a nozzle;', 'a fluid chamber fluidically coupled to the fluid reservoir;', 'a first firing resistor to ...

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15-09-2022 дата публикации

AUTO-CALIBRATING CROSSBAR-BASED APPARATUSES

Номер: US20220293173A1
Автор: GE NING, Hu Miao
Принадлежит:

Aspects of the present disclosure provide a method for calibrating crossbar-based apparatuses. The method includes obtaining output data of a crossbar-based apparatus may include a plurality of cross-point devices with tunable conductance, where the output data of the crossbar-based apparatus represents computing results of at least one operation performed by the crossbar-based apparatus, and where the output data corresponding to a plurality of settings of a plurality of analog components of the crossbar-based apparatus. The method also includes obtaining, by a processing device, one or more calibration parameters based on the output data of the crossbar-based apparatus, where the one or more calibration parameters correspond to one or more errors associated with one or more of the analog components of the crossbar-based apparatus. The method further includes calibrating the crossbar-based apparatus using the one or more calibration parameters. 1. A method , comprising:obtaining output data of a crossbar-based apparatus comprising a plurality of cross-point devices with tunable conductance, wherein the output data of the crossbar-based apparatus represents computing results of at least one operation performed by the crossbar-based apparatus, and wherein the output data corresponding to a plurality of settings of a plurality of analog components of the crossbar-based apparatus;obtaining, by a processing device, one or more calibration parameters based on the output data of the crossbar-based apparatus, wherein the one or more calibration parameters correspond to one or more errors associated with one or more of the analog components of the crossbar-based apparatus; andcalibrating the crossbar-based apparatus using the one or more calibration parameters to compensate for deviations of the computing results of the at least one operation performed by the crossbar-based apparatus from expected results of the at least one operation.2. The method of claim 1 , wherein the ...

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17-06-2021 дата публикации

FLUIDIC CONDUCTIVE TRACE BASED RADIO-FREQUENCY IDENTIFICATION

Номер: US20210182647A1

In some examples, a fluidic conductive trace based radio-frequency identification device may include a flexible substrate layer including a channel, and a trace formed of a conductive fluid that is disposed substantially within the channel. The fluidic conductive trace based radio-frequency identification device may further include a sealing layer disposed on the flexible substrate layer and the trace to seal the conductive fluid in a liquid state within the channel. 1. A fluidic conductive trace based radio-frequency identification device comprising:a flexible substrate layer including a channel;a trace formed of a conductive fluid that is disposed substantially within the channel; anda sealing layer disposed on the flexible substrate layer and the trace to seal the conductive fluid in a liquid state within the channel.2. The fluidic conductive trace based radio-frequency identification device according to claim 1 , whereinthe conductive fluid includes a predetermined conductivity based on a predetermined conductive fluid property, andthe predetermined conductive fluid property includes a predetermined change over a predetermined time period based on an interaction of the conductive fluid with the sealing layer.3. The fluidic conductive trace based radio-frequency identification device according to claim 1 , whereinthe conductive fluid includes deionized water including a predetermined conductivity based on a predetermined deionized water property, andthe predetermined deionized water property includes a predetermined change over a predetermined time period based on an interaction of the deionized water with the sealing layer.4. The fluidic conductive trace based radio-frequency identification device according to claim 1 , whereinthe conductive fluid includes a predetermined conductivity based on a predetermined conductive fluid property,the sealing layer includes a predetermined sealing layer property that causes a predetermined change in the predetermined ...

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17-06-2021 дата публикации

PRINTING CONDUCTIVE TRACES

Номер: US20210185827A1

In an example implementation, a conductive trace printing system includes a conductive trace application station to apply a conductive trace onto a media substrate. The printing system also includes a conductive trace enhancement station to expose the conductive trace to an electroless metal plating solution to generate an enhanced conductive trace. 1. A conductive trace printing system comprising:a conductive trace application station to apply a conductive trace onto a media substrate; and,a conductive trace enhancement station to expose the conductive trace to an electroless metal plating solution to generate an enhanced conductive trace.2. A printing system as in claim 1 , wherein the conductive trace application station comprises a liquid electro-photographic device to develop the conductive trace onto a charged roller claim 1 , transfer the conductive trace to a transfer roller claim 1 , and transfer the conductive trace from the transfer roller to the media substrate.3. A printing system as in claim 1 , wherein the conductive trace application station comprises a fluid jetting device to jet a conductive trace solution onto a transfer roller to be transferred to the media substrate.4. A printing system as in claim 1 , wherein the conductive trace enhancement station comprises a solution applicator selected from the group consisting of a sponge applicator claim 1 , a liquid bath applicator claim 1 , and a roll-to-roll applicator.5. A printing system as in claim 1 , further comprising an overprint layer station to apply a protective overprint layer over the enhanced conductive trace.6. A printing system as in claim 5 , wherein the overprint layer station comprises a coating device selected from the group consisting of a flexography coating device claim 5 , a gravure coating device claim 5 , a reverse-roll coating device claim 5 , a knife-over-roll coating device claim 5 , a Meyer rod coating device claim 5 , a slot die coating device claim 5 , an immersion ...

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23-05-2019 дата публикации

HEATED NANO FINGER COLLAPSE FOR CAPTURE OF MOLECULES IN GAS FOR SENSING

Номер: US20190154587A1

A gas conduit directs a flow of gas from a gas flow source. A surface enhanced luminescence (SEL) stage is within the conduit and includes a substrate and nano fingers projecting from the substrate. A heater heats the nano fingers to a temperature so as to soften the nano fingers such that the nano fingers collapse towards each other to capture molecules entrained in the gas therebetween. 1. An apparatus comprising:a gas flow source;a gas conduit to direct a flow of gas from the gas flow source; a substrate; and', 'nano fingers projecting from the substrate; and, 'a surface enhanced luminescence (SEL) stage within the conduit, the stage comprisinga heater to heat the nano fingers to a temperature so as to soften the nano fingers such that the nano fingers collapse towards each other to capture molecules entrained in the gas therebetween for being sensed.2. The apparatus of claim 1 , wherein the nano fingers are arranged in a two-dimensional array on the substrate.3. The apparatus of claim 1 , wherein the heater is located below the nano fingers.4. The apparatus of further comprising:a light emitter to impinge the nano fingers with light; anda light sensor to be illuminated by light from the nano fingers.5. The apparatus of further comprising:a second light emitter to direct light along a centerline of the conduit; anda second light sensor to receive light scattered from particles in gas in the conduit, the second light sensor facing in a direction nonparallel to the centerline of the conduit.6. The apparatus of further comprising a filter across the conduit between the light sensor and the second light sensor.7. The apparatus of further comprising:a first electrode on a first side of the nano fingers;a second electrode on a second side of the nano fingers, wherein the first electrode and the second electrode apply static field to bias particles towards the nano fingers.8. A method comprising:directing gas with molecules across nano fingers;heating the nano fingers ...

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24-06-2021 дата публикации

PRINTABLE AMMONIUM-BASED CHALCOGENOMETALATE FLUIDS

Номер: US20210189165A1

In one example in accordance with the present disclosure, a printable ammonium-based chalcogenometalate fluid is described. The fluid includes an ammonium-based chalcogenometalate precursor. The printable ammonium-based chalcogenometalate fluid also includes an aqueous solvent and water. The printable ammonium-based chalcogenometalate fluid is printed onto a substrate. In the presence of heat, the aqueous solvent, water, and ammonium-based chalcogenometalate precursor break down to form a transition metal dichalcogenide having the form MX. 1. A printable ammonium-based chalcogenometalate fluid comprising:an ammonium-based chalcogenometalate precursor;an aqueous solvent; andwater; the printable ammonium-based chalcogenometalate fluid is printed onto a substrate; and', {'sub': '2', 'in the presence of heat, the aqueous solvent, water, and ammonium-based chalcogenometalate precursor dissipate to form a transition metal dichalcogenide having the form MX.'}], 'wherein2. The fluid of claim 1 , wherein the ammonium-based chalcogenometalate precursor has the form (NH)MXwherein:M is a transition metal; andX is a chalcogen.3. The fluid of claim 1 , wherein the ammonium-based chalcogenometalate precursor is selected from the group consisting of:ammonium tetrathiotungstate; andammonium tetrathiomolybdate.4. The fluid of claim 1 , wherein: dimethyl sulfoxide;', 'dimethylformamide;', 'N-methyl-2-pyrrolidone; and', '1, 2-hexanediol; and, 'the aqueous solvent is selected from the group consisting of molybdenum disulfide; and', 'tungsten disulfide., 'the transition metal dichalcogenide is selected from the group consisting of5. The fluid of claim 1 , wherein the transition metal dichalcogenide is transparent.6. The fluid of claim 1 , wherein the aqueous solvent and the water are present in a 2-to-3 ratio.7. A method comprising:combining an ammonium-based chalcogenometalate precursor, an aqueous solvent, and water to form a first printable ammonium-based chalcogenometalate fluid; ...

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23-05-2019 дата публикации

SPLIT MEMORY BANK

Номер: US20190156892A1

A split memory bank may comprise a number of memory matrices forming a memory bank and a shift register in which the shift register physically separates the matrices. An integrated circuit may comprise a number of shift registers and a plurality of memory matrices forming a memory bank in which the matrices are spatially separated by the shift register. An integrated printhead may comprise a number of memory banks each comprising a plurality of memory matrices and a number of shift registers in which each shift register spatially separates a number of the matrices. 1. A memory bank comprising:a plurality of memory matrices forming a memory bank; anda multiplexing signal generator;in which the multiplexing signal generator physically separates the matrices; andin which the multiplexing signal generator comprises a group of 8 electrical connection outputs from a row select and in which that group of 8 electrical connection outputs branch out into two groups of 4 electrical connections.2. The memory bank of claim 1 , in which the memory is an EPROM.3. The memory bank of claim 1 , in which the matrices each comprises multiple rows and a double number of columns relative to the rows.4. The memory bank of claim 1 , in which the memory bank is electrically coupled to a number of memory banks.5. The memory bank of claim 1 , in which the multiplexing signal generator comprises a single group of 8 electrical connection outputs from a column select and in which that single group of 8 electrical connection outputs branch out into two groups of 8 electrical connections running perpendicular to the single group of 8 electrical connection outputs and connecting to corresponding column select inputs on the number of matrices.6. The memory bank of claim 1 , in which the two groups of 4 electrical connections run perpendicular to the group of 8 electrical connection outputs and electrically couple to corresponding row select inputs on the number of matrices.7. The memory bank of ...

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24-06-2021 дата публикации

SELS NANO FINGER SIDEWALL COATING LAYER

Номер: US20210190687A1
Принадлежит:

A surface enhanced luminescence (SELS) sensor may include a substrate and nano fingers projecting from the substrate. Each of the nano fingers may include a polymer pillar having a sidewall and a top, a coating layer covering the sidewall and a metal cap supported by and in contact with the top of the pillar. 1. A surface enhanced luminescence (SELS) sensor comprising:a substrate; a polymer pillar having a sidewall and a top;', 'a coating layer covering the sidewall; and', 'a metal cap supported by and in contact with the top of the pillar., 'nano fingers projecting from the substrate, each of the nano-fingers comprising2. The sensor of claim 1 , wherein the metal comprises gold or silver claim 1 , Cu claim 1 , In claim 1 , Pt claim 1 , Rh and combinations thereof as alloys or multilayer systems.3. The sensor of claim 1 , wherein the coating layer has a thickness of at least 1 nm and less than or equal to 20 nm.4. The sensor of claim 1 , wherein the coating layer comprises polytetrafluoroethylene.5. The sensor of claim 1 , wherein the coating layer comprises at least one material selected from a group of materials consisting of SiOand SiN.6. The sensor of claim 1 , wherein the coating layer is not covered by the metal cap and wherein the metal cap has an exposed top surface not covered by the coating layer.7. The sensor of claim 1 , wherein the coating layer has a first thickness proximate the top and a second thickness claim 1 , less than the first thickness claim 1 , proximate the substrate.8. The sensor of claim 1 , wherein the polymer material comprises a polymer selected from a group of polymers consisting of methacrylate claim 1 , propylene claim 1 , ethylene claim 1 , vinylidene difluoride claim 1 , vinylidene chloride claim 1 , styrene claim 1 , acrylonitrile claim 1 , tetrafluoroethylene claim 1 , and vinyl acetate.9. A method for forming a surface enhanced luminescence (SELS) sensor claim 1 , the method comprising:forming a coating layer on sidewalls of ...

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24-06-2021 дата публикации

SURFACE ENHANCED RAMAN SCATTERING NANO FINGER HEATING

Номер: US20210190694A1

A surface enhanced Raman scattering (SERS) sensor may include a substrate, an electrically conductive layer having a first portion spaced from a second portion by a gap, an electrically resistive layer in contact with and extending between the first portion and the second portion of the electrically conductive layer to form an electrically resistive bridge across the gap that heats the nano fingers in response to electrical current flowing across the bridge from the first portion to the second portion and nano fingers extending upward from the bridge. 1. A surface enhanced Raman scattering (SERS) sensor comprising:a substrate;an electrically conductive layer having a first portion spaced from a second portion by a gap;an electrically resistive layer in contact with and extending between the first portion and the second portion of the electrically conductive layer to form an electrically resistive bridge across the gap that heats the nano fingers in response to electrical current flowing across the bridge from the first portion to the second portion; andnano fingers extending upward from the bridge.2. The sensor of further comprising a passivation layer between the electrically resistive bridge and the nano fingers.3. The sensor of further comprising a pulse voltage supply electrically connected to the first portion.4. The sensor of further comprising a controller to control the pulse voltage supply so as to supply electrical current across the electrically resistive bridge to heat regions about the nano fingers to a temperature of at least a glass transition temperature of the nano fingers.5. The sensor of claim 3 , wherein the nano fingers each comprise a pillar formed from material that softens in response to reaching a temperature and wherein the controller controls the pulse voltage supply to heat each pillar to the temperature.6. The sensor of claim 3 , wherein the controller is to control the pulse voltage supply to pre-clean the nano fingers by applying ...

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24-06-2021 дата публикации

ANNEALING DEVICES INCLUDING THERMAL HEATERS

Номер: US20210193488A1

An annealing device may include an array of thermal heaters, each thermal heater comprising a resistive element formed into a cavity and wherein each of the thermal heaters within the array of thermal heaters are selectively activated to anneal an annealable material deposited into the cavities. 1. An annealing device , comprising:an array of thermal heaters, each thermal heater comprising a resistive element formed into a cavity; andwherein each of the thermal heaters within the array of thermal heaters are selectively activated to anneal an annealable material deposited into the cavities.2. The annealing device of claim 1 , wherein the thermal heaters of the array of thermal heaters are arranged in a two-dimensional plane.3. The annealing device of claim 1 , wherein the thermal heaters comprise a layer of resistive metal and a passivation layer.4. The annealing device of claim 1 , further comprising a material deposition device to deposit an amount of annealable material into the cavity.5. The annealing device of claim 4 , where the array of thermal heaters is sacrificial by acid etching revealing an annealed version of the annealable material after selective heating of the thermal heaters.6. The annealing device of claim 1 , wherein the material is heated to an annealing temperature and a layer of polydimethylsiloxane is applied and cured to remove the annealed material from the array of thermal heaters and transfer the annealed material to a substrate.7. A method of annealing an annealable material claim 1 , comprising:with a deposition device, depositing an amount of annealable material into a cavity of a thermal resistive element of an array of thermal resistive elements; andselectively activating the thermal resistive element to anneal the annealable material.8. The method of claim 7 , comprising iteratively depositing and annealing a plurality of annealable materials in subsequent layers.9. The method of claim 7 , comprising layering the array of thermal ...

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24-06-2021 дата публикации

ELECTRONIC DEVICE AND COMMUNICATION METHOD

Номер: US20210194742A1
Принадлежит: SONY CORPORATION

An electronic device and communication method are disclosed. The electronic device comprises a processing circuit configured to perform a pre-processing operation on a first one-dimensional sequence of modulation symbols, the pre-processing operation including: performing a dimension-increasing conversion to convert the first one-dimensional sequence of modulation symbols into a first multi-dimensional modulation symbol block; transforming the first multi-dimensional modulation symbol block into a second multi-dimensional modulation symbol block with a first transformation, wherein the first transformation couples each symbol in the first multi-dimensional modulation symbol block with each other; and performing a dimension-decreasing conversion to convert the second multi-dimensional modulation symbol block into a second one-dimensional sequence of modulation symbols, wherein the dimension-decreasing conversion is an inverse process of the dimension-increasing conversion. The processing circuit is also configured to transmit the second one-dimensional sequence of modulation symbols. 1. An electronic device , characterized in that , the electronic device comprising: [ performing a dimension-increasing conversion to convert the first one-dimensional sequence of modulation symbols into a first multi-dimensional modulation symbol block;', 'transforming the first multi-dimensional modulation symbol block into a second multi-dimensional modulation symbol block with a first transformation, wherein the first transformation couples each symbol in the first multi-dimensional modulation symbol block with each other; and', 'performing a dimension-decreasing conversion to convert the second multi-dimensional modulation symbol block into a second one-dimensional sequence of modulation symbols, wherein the dimension-decreasing conversion is an inverse process of the dimension-increasing conversion; and, 'perform a pre-processing operation on a first one-dimensional sequence of ...

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01-07-2021 дата публикации

PRINTHEAD ASSEMBLY WITH LIGHT EMISSION DEVICES AND PHOTON DETECTORS

Номер: US20210197487A1

According to examples, an apparatus may include a printhead assembly containing a housing supporting a printhead. The printhead may have nozzles that are to fire droplets of a functional agent onto a layer of build material particles along respective flight paths to form sections of a 3D object from the build material particles, an array of light emission devices to direct respective light beams in the respective flight paths, and an array of photon detectors to detect respective light beams directed from a light source of the array of light emission devices, the light emission devices and the photon detectors being supported on the housing. The apparatus may also include a controller to determine whether any of the nozzles is operating improperly based upon whether the photon detectors detected the light beams and to output an instruction regarding an improperly operating nozzle in response to a determination that the nozzle is operating improperly. 1. An apparatus comprising: a housing;', 'a printhead supported on the housing, the printhead having nozzles that are to fire droplets of a functional agent onto a layer of build material particles along respective flight paths to form sections of a three-dimensional (3D) object from the build material particles;', 'an array of light emission devices to direct respective light beams in the respective flight paths;', 'an array of photon detectors, wherein each photon detector of the array of photon detectors is to detect a light beam directed from a light emission device of the array of light emission devices, the light emission devices and the photon detectors being supported on the housing; and, 'a printhead assembly containinga controller to determine whether any of the nozzles is operating improperly based upon whether the photon detectors detected the light beams and to output an instruction regarding an improperly operating nozzle in response to a determination that the nozzle is operating improperly.2. The ...

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21-05-2020 дата публикации

LARGE-SCALE CROSSBAR ARRAYS WITH REDUCED SERIES RESISTANCE

Номер: US20200161546A1
Автор: GE NING
Принадлежит: TETRAMEM INC.

Technologies for reducing series resistance are disclosed. An example method may comprise: forming a first layer on a temporary substrate; forming a second layer on the first layer; etching the first layer and the second layer to form a trench; electroplating a top electrode via the trench, wherein the top electrode partially formed on a top surface of the second layer; removing the first layer and the second layer; forming a curable layer on the temporary substrate and the top electrode; removing the temporary substrate from the curable layer and the top electrode; forming a cross-point device on the curable layer and the top electrode; forming a bottom electrode on the cross-point device; and forming a flexible substrate on the bottom electrode. 1. An apparatus comprising:a plurality of top electrodes; anda plurality of cross-point devices connecting the plurality of top electrodes, wherein each of the plurality of top electrodes includes a top portion and a tail portion, the top portion is wider than the tail portion.2. The apparatus as claimed in claim 1 , wherein the plurality of top electrodes comprises a plurality of row electrodes and/or a plurality of column electrodes.3. The apparatus as claimed in claim 1 , wherein the top portion is of a dome shape.4. The apparatus as claimed in claim 1 , wherein the tail portion is of a trapezoid shape.5. The apparatus as claimed in claim 1 , wherein each of the plurality of top electrodes is of a nail shape.6. The apparatus as claimed in claim 1 , further comprises:a bottom electrode formed on the plurality of cross-point devices.7. The apparatus as claimed in claim 1 , wherein a bottom width of the tail portion is nanoscale to microscale claim 1 , and a height of each of the plurality of top electrodes is microscale.8. The apparatus as claimed in claim 6 , wherein a ratio of the bottom width of the tail portion to the height of each of the plurality of top electrode is less than 1.9. The apparatus as claimed in claim ...

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01-07-2021 дата публикации

TOUCH-SENSITIVE ILLUMINATING DISPLAY

Номер: US20210200370A1

In an example implementation, a touch-sensitive illuminating display includes a transparent flexible touch layer, a transparent top conductive layer adjacent the flexible touch layer, a bottom conductive layer, and an electroluminescent layer and variable-thickness dielectric layer sandwiched between the top and bottom conductive layers. Pressure against the flexible touch layer is to reduce the dielectric layer thickness and bring the top and bottom conductive layers closer together, causing the electroluminescent layer to emit light where the pressure is applied. 1. A touch-sensitive illuminating display comprising:a transparent flexible touch layer;a transparent top conductive layer adjacent the flexible touch layer;a bottom conductive layer; and,an electroluminescent layer and a variable-thickness dielectric layer sandwiched between the top and bottom conductive layers;wherein pressure against the flexible touch layer is to reduce the dielectric layer thickness and bring the top and bottom conductive layers closer together, causing the electroluminescent layer to emit light where the pressure is applied.2. A display as in claim 1 , further comprising:a voltage source coupled between the top and bottom conductive layers to generate an electric field through the dielectric layer, wherein the electric field becomes strong enough to cause the electroluminescent layer to emit light when the pressure is applied.3. A display as in claim 1 , wherein:the electroluminescent layer is positioned adjacent to the top conductive layer and the dielectric layer is positioned between the electroluminescent layer and the bottom conductive layer.4. A display as in claim 3 , further comprising:an adhesive applied to the electroluminescent layer and to the bottom conductive layer to bond the electroluminescent layer and the bottom conductive layer through the reduced thickness of the dielectric layer where the pressure is applied.5. A display as in claim 1 , wherein:the ...

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22-06-2017 дата публикации

Fluid ejection device with ground electrode exposed to fluid chamber

Номер: US20170173969A1
Принадлежит: Hewlett Packard Development Co LP

An example provides a fluid ejection device including a fluid feed slot, a fluid chamber between a nozzle layer and a passivation layer, and a printhead-integrated sensor to sense a property of a fluid in the fluid chamber. The sensor may include a ground electrode exposed to the fluid chamber through a via in the passivation layer.

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01-07-2021 дата публикации

Micro light-emitting diode with magnet electrodes and micro light-emitting diode panel

Номер: US20210202799A1
Принадлежит: Hewlett Packard Development Co LP

In some examples, a micro light-emitting diode (μLED) panel may include a μLED including at least two electrodes (or bond pads), and a ferromagnetic material included in the at least two electrodes (or bond pads) and/or disposed on the at least two electrodes (or bond pads). The μLED panel may further include a panel substrate including ferromagnetic material selectively disposed at least at two locations corresponding to locations of the at least two electrodes (or bond pads) to align a plurality of μLEDs including the μLED onto the panel substrate.

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06-06-2019 дата публикации

SERS SENSOR

Номер: US20190170650A1

A surface enhanced Raman spectroscopy (SERS) sensor may include a nano structured surface and a nonstoichiometric oxide layer. The nano structured surfers may include a first peak, a second peak and a valley between the first peak and the second peak. The non-stoichiometric oxide layer may include a first portion on the first peak and a second portion on the second peak. 1. A surface enhanced Raman spectroscopy (SERS) sensor comprising:a nano structured surface having a first peak, a second peak and a valley between the first peak and the second peak; anda non-stoichiometric oxide layer having a first portion on the first peak and a second portion on the second peak.2. The SERS sensor of claim 1 , wherein the non-stoichiometric oxide layer continuously extends from the first peak claim 1 , across the valley claim 1 , to the second peak.3. The SERS sensor of claim 1 , wherein valley omits the non-stoichiometric oxide layer such that the first portion and the second portion of the non-stoichiometric layer are spaced from one another by the valley.4. The SERS sensor of claim 3 , wherein the nano structured surface comprises a first pillar forming the first peak and a second pillar forming the second peak.5. The SERS sensor of claim 4 , wherein the first pillar and the second pillar are part of a pattern of pillars claim 4 , each of the pillars of the pattern having a controlled predetermined spacing with respect to other pillars of the pattern.6. The SERS sensor of claim 1 , wherein the first portion and the second portion of the nonstoichiometric oxide layer on the first peak and the second peak claim 1 , respectively claim 1 , are uncovered.7. The SERS sensor of claim 1 , wherein the non-stoichiometric oxide layer comprises a material selected from a group of materials consisting of iron claim 1 , tungsten claim 1 , the actinide series claim 1 , rare earth and transition metals and the lanthanide series.8. A method for forming a surface enhanced Raman spectroscopy ...

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22-06-2017 дата публикации

MEMRISTIVE DOT PRODUCT ENGINE FOR VECTOR PROCESSING

Номер: US20170178725A1
Принадлежит:

A memristive dot-product system for vector processing is described. The memristive dot-product system includes a crossbar array having a number of memory elements. Each memory element includes a memristor. Each memory element includes a transistor. The system also includes a vector input register. The system also includes a vector output register. 1. A memristive dot product system for vector processing , comprising:a crossbar array having a number of memory elements, each memory element comprising a memristor and a transistor;a vector input register; anda vector output register.2. The system of claim 1 , in which the crossbar array comprises N rows claim 1 , M columns and N×M memory elements.3. The system of claim 2 , in which the input register comprises N voltage inputs to the crossbar array and the output register receives M voltage outputs from the crossbar array.4. The system of claim 2 , in which the N×M memory elements correspond with values contained in an N×M matrix.5. The system of claim 1 , further comprising a normally ON depletion mode transistor at each memory element.6. A memristive dot-product engine for vector processing claim 1 , comprising:a crossbar array comprising a number of memory locations, each memory location comprising a memory element to store information corresponding to a value contained in an N×M matrix and a transistor to control current flow through the memory element;an input register comprising N voltage inputs, each voltage input corresponding to a value contained in a vector having N values; andan output register comprising M voltage outputs.7. The dot-product engine of claim 6 , wherein the transistors are normally ON transistors.8. The dot-product engine of claim 7 , further comprising M bias voltage wires claim 7 , in which jwire (j=1 claim 7 ,M) is connected to the gates of the normally ON transistors comprising at column of memory locations.9. The dot-product engine of claim 8 , in which the normally ON transistors are ...

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08-07-2021 дата публикации

Memristor code comparator to compare wake up signals to reference signals

Номер: US20210211983A1
Принадлежит: Hewlett Packard Development Co LP

One example of a device includes an antenna, a memristor code comparator, and a controller. The antenna is to receive a wake up signal. The memristor code comparator is to compare the wake up signal to a reference signal. The controller is to provide a trigger signal to wake up the device in response to the wake up signal matching the reference signal.

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15-07-2021 дата публикации

SURFACE ENHANCED LUMINESCENCE SENSOR NANO FINGER

Номер: US20210215612A1

A surface enhanced luminescence (SEL) sensor may include a substrate and nano fingers extending from the substrate. In one implementation, the nano fingers may be arranged in a cluster of at least three nano fingers extending from the substrate. The nano fingers of the cluster having different geometries so as to bend into a closed state such that each of the nano fingers of the cluster are linked to one another. 1. A surface enhanced luminescence (SEL) sensor comprising:a substrate;a cluster of at least three nano fingers extending from the substrate, the nano fingers of the cluster having different geometries so as to bend into a closed state such that each of the nano fingers of the cluster are linked to one another.2. The sensor of claim 1 , wherein the at least three nano fingers of the cluster comprise a nano finger extending along an axis claim 1 , the nano finger having an asymmetric cross sectional shape relative to the axis claim 1 , wherein the shape changes along the axis.3. The sensor of claim 2 , wherein the nano finger comprises a first side on a first side of the axis forming an angle greater than 90° with the substrate and a second side on a second side of the axis forming an angle of less than or equal to 90° with the substrate.4. The sensor of claim 2 , wherein the nano finger comprises a first side on a first side of the axis forming an angle less than 90° with the substrate and a second side on a second side of the axis forming an angle of at least 90° with the substrate.5. The sensor of claim 2 , wherein the axis extends perpendicular to the substrate.6. The sensor of claim 2 , wherein the axis extends obliquely with respect to the substrate.7. The sensor of claim 1 , wherein the at least three nano fingers of the cluster comprise:a first nano finger having a first width;a second nano finger having a second width and spaced from the first nano finger by a first distance; anda third nano finger having a third width, greater than the first width ...

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20-06-2019 дата публикации

Memcapacitive cross-bar array for determining a dot product

Номер: US20190189180A1

A method of obtaining a dot product includes applying a programming signal to a number of capacitive memory devices coupled at a number of junctions formed between a number of row lines and a number of column lines. The programming signal defines a number of values within a matrix. The method further includes applying a vector signal. The vector signal defines a number of vector values to be applied to the capacitive memory devices.

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