THIAZOLIDINONE COMPOUNDS AND USE THEREOF

A pharmaceutical composition containing a compound of Formula (I) for treating an opioid receptor-associated condition. Also disclosed is a method for treating an opioid receptor-associated condition using such a compound. Further disclosed are two sets of thiazolidinone compounds of formula (I): (i) compounds each having an enantiomeric excess greater than 90% and (ii) compounds each being substituted with deuterium.

Video image distribution method

A video image distribution method used in a mobile electronic device is disclosed to include the step of controlling the video camera and starting image capture execution command, the step of temporarily storing original video camera images, the step of enabling the proprietary camera layer to use resource images for the creation of an image processing chain, the step of allocating hardware and software resources and constructing an image processing node Then enabling image processing chain to add source images to multiple processed images for storage, and the step of creating an application user linked service execution command and distributing temporarily stored multiple images to multiple application users. As long as the hardware and software resources permit, the method of the invention can serve multiple application users to meet different needs of different application users for different format settings, achieving optimal results, and facilitating operation of the mobile electronic ...

Automatic angle-measured apparatus and method using the same

An automatic angle-measured apparatus includes a driving unit coupled with a clamping plate and a driving seat, an encoding unit located at an end of the driving unit facing the driving seat and signally connected to the driving unit, at least one attitude sensor located at the driving seat, and a control unit signally connected to the encoding unit and the attitude sensor. The attitude sensor senses the un-rotated and the rotated driving seat to generate a first and a second signals, respectively. The control unit bases on the first and the second signals to calculate an offset. The control unit controls the driving unit to rotate a predetermined angle. The encoding unit bases on the predetermined angle to generate location information. The control unit bases on the first signal, the second signal and the location information to calculate angle information and compensation for performing a correction procedure.

Projection device

The invention provides a projection device, comprising an illumination system, a light valve, a light guide element, an optical module and a projection lens. The optical module comprises a fixed portion, a first frame body, at least one first driving element and an optical element. The first frame body is pivoted to the fixed portion and comprises a first side and other three second sides. The first driving element is configured on at least one of the other three second sides and configured to drive the first frame body to oscillate back and forth. A first virtual plane of the projection lens intersects with a second virtual plane of the light valve to form a virtual line segment. The distance between the first side and the virtual line segment is shorter than the distance between the other three second sides and the virtual line segment.

Illumination system and projection apparatus

An illumination system including a first excitation light source, a wavelength conversion wheel, and a filter wheel is provided. The first excitation light source is configured to emit a first excitation beam. The wavelength conversion wheel includes a wavelength conversion region and a first optical region. The wavelength conversion region and the first optical region alternately enter a transmission path of the first excitation beam. The first excitation beam is converted into a conversion beam by the wavelength conversion region when the wavelength conversion region enters the transmission path of the first excitation beam. The filter wheel includes a first region, a second region, and a blocking region. An angle covered by the second region in a circumferential direction is smaller than an angle covered by the first optical region. A projection apparatus is also provided.

BIASING CIRCUIT FOR SETTING BIAS VOLATGES OF CURRENT SOURCE CIRCUIT AND CURRENT SINK CIRCUIT IN CHARGE PUMP OF PHASE-LOCKED LOOP CIRCUIT BY USING CURRENT DIGITAL-TO-ANALOG CONVERTER AND LOW-PASS FILTER

A charge pump of a phase-locked loop (PLL) circuit includes a current source circuit, a current sink circuit, and a biasing circuit. The biasing circuit includes a current digital-to-analog converter (IDAC) and a low-pass filter (LPF). The IDAC provides a reference current in response to a current value setting, wherein a first voltage is established due to the reference current. The LPF applies low-pass filtering to the first voltage to generate a filter output as a second voltage, wherein bias voltages of the current source circuit and the current sink circuit are controlled by the second voltage.

PROJECTION DEVICE

The invention provides a projection device, comprising an illumination system, a light valve, a light guide element, an optical module and a projection lens. The optical module comprises a fixed portion, a first frame body, at least one first driving element and an optical element. The first frame body is pivoted to the fixed portion and comprises a first side and other three second sides. The first driving element is configured on at least one of the other three second sides and configured to drive the first frame body to oscillate back and forth. A first virtual plane of the projection lens intersects with a second virtual plane of the light valve to form a virtual line segment. The distance between the first side and the virtual line segment is shorter than the distance between the other three second sides and the virtual line segment. 1. A projection device , comprises:an illumination system, configured to provide an illumination beam;a light valve, configured on the transmission path of the illumination beam and configured to convert the illumination beam into an image beam;a light guide element, configured on the transmission path of the image beam and located between the illumination system and the light valve; a fixed portion;', 'a first frame body, pivoted to the fixed portion, wherein the first frame body comprises a first side and other three second sides;', 'at least one first driving element, configured on at least one of the other three second sides of the first frame body and configured to drive the first frame body to oscillate back and forth; and', 'an optical element, configured in the first frame body and configured to allow the image beam to pass; and, 'an optical module, configured on the transmission path of the image beam, and the optical module comprisesa projection lens, configured on the transmission path of the image beam and configured to convert the image beam into a projection beam, wherein a first virtual plane of the projection lens ...

ILLUMINATION SYSTEM AND PROJECTION APPARATUS

An illumination system including a first excitation light source, a wavelength conversion wheel, and a filter wheel is provided. The first excitation light source is configured to emit a first excitation beam. The wavelength conversion wheel includes a wavelength conversion region and a first optical region. The wavelength conversion region and the first optical region alternately enter a transmission path of the first excitation beam. The first excitation beam is converted into a conversion beam by the wavelength conversion region when the wavelength conversion region enters the transmission path of the first excitation beam. The filter wheel includes a first region, a second region, and a blocking region. An angle covered by the second region in a circumferential direction is smaller than an angle covered by the first optical region. A projection apparatus is also provided.

Optical module and projector

An optical module and a projector including the optical module are provided. The optical module includes a base, a first frame body disposed in the base, an optical element disposed in the first frame body, and at least one driving assembly disposed between the base and the first frame body. The first frame body is configured to swing relative to the base through a magnetic force generated by the at least one driving assembly, and each of the at least one driving assembly includes a coil and a magnetic structure that is separated from the coil and includes a magnetic permeable plate, a separation medium, and a magnet element. The separation medium is located on one side of the magnetic permeable plate facing the coil. The magnet element is disposed on the side of the magnetic permeable plate facing the coil and is separated by the separation medium.

Machine tool collision avoidance method and system using the same

A machine tool collision avoidance method includes: loading multiple processing codes; simulating multiple path traces corresponding to the processing codes; estimating multiple execution periods for running the path traces; selecting the shortest execution period from the execution periods; determines whether the distance between the trace point points on any two of the path traces is less than a safety distance within the shortest execution period; if the distance between a first trace point on a first path trace and a second trace point on a second path trace is less than the safety distance, estimating a first time point at which a first turret runs to the first trace point and a second time point at which the second turret runs to the second trace point; generating a collision warning if the difference between the first time point and the second time point is lower than a tolerance value.

RECONFIGURABLE WIRELESS RECEIVER USING FILTERS WITH DIFFERENT FILTER ARCHITECTURE, OSCILLATORS WITH DIFFERENT OSCILLATOR ARCHTECTURE, AND/OR TIME-SHARING PHASE-LOCKED LOOP CORE

A sub-circuit of a reconfigurable wireless receiver includes a down-conversion circuit and a plurality of filters. The down-conversion circuit applies down-conversion to a first signal, and generates and outputs a plurality of second signals each derived from down-converting the first signal. The filters are coupled to the down-conversion circuit, and apply filtering to the second signals for generating a plurality of filter outputs, respectively, wherein the filters includes a first filter and a second filter, and the first filter and the second filter have different filter architecture.

Projection apparatus and imaging module thereof

An imaging module includes a display element and an image displacement device. The display element includes an active display surface adapted to receive an illumination beam, convert the illumination beam into an image beam, and transmit the image beam. The image displacement device includes an optical element located on a transmission path of the image beam and adapted to allow the image beam to pass therethrough, a carrier, a base and at least one actuator, wherein the optical element is disposed on the carrier, the at least one actuator is disposed on the base, one end of the at least one actuator is connected to the carrier to drive the optical element on the carrier to swing relative to the base, and an orthographic projection area of the at least one actuator on a reference plane does not overlap with an orthographic projection area of the active display surface.

PROJECTION DEVICE

A projection device including a lens module and an actuating module is provided. The lens module includes at least one lens and is used for transferring an image beam. The actuating module is disposed beside the lens module, and is relatively close to the at least one lens. The actuating module includes a frame, a transparent element and at least one actuator. The transparent element is fixed on the frame. The actuator is disposed on at least one side edge of the frame, and is connected to the frame. In a light emission direction of the lens module, an orthographic projection of the actuator on a first reference plane does not overlap with an orthographic projection of the at least one lens on the first reference plane.

OPTICAL MODULE AND PROJECTION APPARATUS

An optical module and a projection apparatus using the optical module are provided. The optical module includes a base, a first frame, an optical element and at least one driving assembly. The first frame is disposed in the base. The optical element is disposed in the first frame. The at least one driving assembly is disposed between the base and the first frame. The first frame is configured to move relative to the base by a magnetic force generated by the at least one driving assembly. Each of the at least one driving assembly includes a coil and a Halbach array magnet structure, the coil and the Halbach array magnet structure face each other along a first direction, a width of the Halbach array magnet structure in the first direction is W1, and a width of the coil in the first direction is W2, and 0.7≤W1/W2≤2. 1. An optical module comprising a base , a first frame , an optical element and at least one driving assembly , whereinthe first frame is disposed in the base,the optical element is disposed in the first frame, andthe at least one driving assembly is disposed between the base and the first frame, wherein the first frame is configured to move relative to the base by a magnetic force generated by the at least one driving assembly, each of the at least one driving assembly comprises a coil and a Halbach array magnet structure, the coil and the Halbach array magnet structure face each other along a first direction, a width of the Halbach array magnet structure in the first direction is W1, and a width of the coil in the first direction is W2, and 0.7≤W1/W2≤2.2. The optical module as claimed in claim 1 , wherein each of the at least one driving assembly further comprises a magnetic permeable plate claim 1 , the magnetic permeable plate is disposed on the coil claim 1 , and the coil is located between the magnetic permeable plate and the Halbach array magnet structure.3. The optical module as claimed in claim 1 , wherein each of the at least one driving assembly ...

Projector and lens module

The invention discloses a projector, including a light source, a light engine module and a lens module. The lens module includes a plate, a lens, at least two sliding components and a first position adjustment device. The sliding components are disposed between the plate and a light engine housing and located respectively at a first position and a second position of the light engine housing. Each of the sliding components has a sliding member and a distance adjustment member. The plate is movably disposed on the light engine housing via the sliding member. The distance adjustment members are in contact with the sliding members respectively. The first position adjustment device is movably disposed between the plate and the light engine housing. The invention further discloses a lens module. The invention can improve movement accuracy and imaging stability of a projector and a lens module.

Thiazolidinone compounds and use thereof

A pharmaceutical composition containing a compound of Formula (I) for treating an opioid receptor-associated condition. Also disclosed is a method for treating an opioid receptor-associated condition using such a compound. Further disclosed are two sets of thiazolidinone compounds of formula (I): (i) compounds each having an enantiomeric excess greater than 90% and (ii) compounds each being substituted with deuterium.

PHASE-LOCKED LOOP CIRCUIT USING HYBRID LOOP CALIBRATION SCHEME AND ADAPTIVELY UPDATED LOOKUP TABLES AND ASSOCIATED CLOCK GENERATING METHOD

A phase-locked loop (PLL) circuit includes a PLL core circuit, at least one lookup table, and a control circuit. The PLL core circuit generates an output clock under an open-loop calibration phase and a closed-loop calibration phase. The control circuit loads PLL parameters that are derived from the at least one lookup table to the PLL core circuit, performs open-loop calibration upon a first part of the PLL parameters under the open-loop calibration phase of the PLL core circuit, and performs closed-loop calibration upon a second part of the PLL parameters under the closed-loop calibration phase of the PLL core circuit.

Method and system for predicting collision of machining path

A method for predicting collision of a machining path includes: a step of reading an NC program; a step of translating a plurality of block information in the NC program; a step of, prior to perform interpolation upon each of the plurality of block information, calculating a safety distance of a next block information with respect to a block information to be interpolated; a step of searching a number of individual block information having an accumulated distance greater than or equal to the safety distance; and a step of performing an anti-collision detection upon each of the individual block information contributing the accumulated distance. In addition, a system for predicting collision of a machining path is also provided.

METHOD FOR ADAPTIVELY DRIVING DATA TRANSMISSION AND COMMUNICATION DEVICE USING THE SAME

A method for adaptively driving data transmission and a communication device using the same are provided. The proposed method includes following procedures. Detection result is generated after detecting a receiving signal on a receiving path of the communication device. Driving parameter is generated according to the detection result. Finally, a transmitting signal on a transmitting path is adjusted according to the driving parameter. 1. A method for adaptively driving transmission data , suitable for a communication device , comprising:detecting a receiving signal on a receiving path of the communication device and generating detection result;generating a driving parameter according to the detection result; andadjusting a transmitting signal on a transmitting path according to the driving parameter.2. The method for adaptively driving transmission data of claim 1 , wherein the detection result comprises a first amplitude level and a first emphasis level.3. The method for adaptively driving transmission data as claimed in claim 1 , wherein the driving parameter comprises a second amplitude level and a second emphasis level.4. The method for adaptively driving transmission data of claim 1 , wherein the receiving path and the transmitting path are disposed in the same transmission line.5. The method for adaptively driving transmission data of claim 1 , wherein the detection result is a frequency energy value.6. The method for adaptively driving transmission data of claim 1 , further comprising:after generating the driving parameter, starting to adjust the transmitting signal on the transmitting path based on the driving parameter when a receiver equalizer connected to the transmitting path completes its training.7. The method for adaptively driving transmission data of claim 1 , wherein the step of generating the driving parameter according to the detection result is generating the driving parameter after comparing the detection result with a preset mapping table.8. A ...

Projection device

A projection device including a lens module and an actuating module is provided. The lens module includes at least one lens and is used for transferring an image beam. The actuating module is disposed beside the lens module, and is relatively close to the at least one lens. The actuating module includes a frame, a transparent element and at least one actuator. The transparent element is fixed on the frame. The actuator is disposed on at least one side edge of the frame, and is connected to the frame. In a light emission direction of the lens module, an orthographic projection of the actuator on a first reference plane does not overlap with an orthographic projection of the at least one lens on the first reference plane.

OPTICAL MODULE AND PROJECTOR

An optical module and a projector including the optical module are provided. The optical module includes a base, a first frame body disposed in the base, an optical element disposed in the first frame body, and at least one driving assembly disposed between the base and the first frame body. The first frame body is configured to swing relative to the base through a magnetic force generated by the at least one driving assembly, and each of the at least one driving assembly includes a coil and a magnetic structure that is separated from the coil and includes a magnetic permeable plate, a separation medium, and a magnet element. The separation medium is located on one side of the magnetic permeable plate facing the coil. The magnet element is disposed on the side of the magnetic permeable plate facing the coil and is separated by the separation medium. 1. An optical module , comprising a base , a first frame body , an optical element , and at least one driving assembly , wherein:the first frame body is disposed in the base;the optical element is disposed in the first frame body; and the magnetic permeable plate comprises a long side and a short side;', 'the separation medium is located on one side of the magnetic permeable plate facing the coil; and', 'the magnet element is disposed on the one side of the magnetic permeable plate facing the coil and is separated by the separation medium., 'the at least one driving assembly is disposed between the base and the first frame body, the first frame body is configured to swing relative to the base through a magnetic force generated by the at least one driving assembly, and each of the at least one driving assembly comprises a coil and a magnetic structure, wherein the magnetic structure is separated from the coil, and the magnetic structure comprises a magnetic permeable plate, a separation medium, and a magnet element, wherein2. The optical module according to claim 1 , wherein the separation medium extends along an ...

Method for fabricating solid electrolytic capacitors

The instant disclosure relates to an improved method for the production of solid electrolytic capacitor, comprising the following steps. First, provide an insulating substrate. Next, form a plurality of conducting gels including aluminum powder on the insulating substrate. Thirdly, execute a high-temperature sintering process to metalize the conducting gels to form a plurality of aluminum plates. Next, form a dielectric layer on every aluminum plate. Then form an isolation layer on every dielectric layer to define an anodic region and a cathodic region. Lastly, form a conductive layer on the dielectric layer of every cathodic region, thus defining a solid electrolytic capacitor unit.

Optical module and projection apparatus

An optical module and a projection apparatus using the optical module are provided. The optical module includes a base, a first frame, an optical element and at least one driving assembly. The first frame is disposed in the base. The optical element is disposed in the first frame. The at least one driving assembly is disposed between the base and the first frame. The first frame is configured to move relative to the base by a magnetic force generated by the at least one driving assembly. Each of the at least one driving assembly includes a coil and a Halbach array magnet structure, the coil and the Halbach array magnet structure face each other along a first direction, a width of the Halbach array magnet structure in the first direction is W1, and a width of the coil in the first direction is W2, and 0.7≤W1/W2≤2.

Method for adaptively driving data transmission and communication device using the same

A method for adaptively driving data transmission and a communication device using the same are provided. The proposed method includes following procedures. Detection result is generated after detecting a receiving signal on a receiving path of the communication device. Driving parameter is generated according to the detection result. Finally, a transmitting signal on a transmitting path is adjusted according to the driving parameter.

Unmanned aerial vehicle

VIBRATION OPTICAL MODULE AND PROJECTOR

A vibration optical module includes a base, a first frame, an optical component, and an actuating assembly. The first frame has at least one first shaft portion. The first frame is connected to the base at least by the at least one first shaft portion. The optical component is disposed in the first frame. The actuating assembly is disposed on the base. The Young's modulus of the material of the base is higher than that of the material of the at least one first shaft portion. The actuating assembly drives the first frame to drive the optical component to vibrate back and forth relatively to the base within an angle by elastic deformation of the at least one first shaft portion. The vibration optical module can save configuration space. A projector having the vibration optical module is also provided. The vibration optical module of the projector can save configuration space. 1. A vibration optical module , comprising a base , a first frame , an optical component , and an actuating assembly , wherein ,the first frame has at least one first shaft portion, wherein the first frame is connected to the base at least by the at least one first shaft portion,the optical component is disposed in the first frame, andthe actuating assembly is disposed on the base,wherein the Young's modulus of the material of the base is higher than the Young's modulus of the material of the at least one first shaft portion, and the actuating assembly drives the first frame to drive the optical component to vibrate back and forth relatively to the base within an angle by elastic deformation of the at least one first shaft portion.2. The vibration optical module according to claim 1 , wherein the vibration optical module further comprises a second frame claim 1 , wherein the first frame is disposed in the second frame and connected to the second frame by the at least one first shaft portion claim 1 , the second frame has at least one second shaft portion claim 1 , the second frame is connected to ...

Manufacturing method for metal gate

A manufacturing method for a metal gate includes providing a substrate having a dielectric layer and a polysilicon layer formed thereon, the polysilicon layer, forming a protecting layer on the polysilicon layer, forming a patterned hard mask on the protecting layer, performing a first etching process to etch the protecting layer and the polysilicon layer to form a dummy gate having a first height on the substrate, forming a multilayered dielectric structure covering the patterned hard mask and the dummy gate, removing the dummy gate to form a gate trench on the substrate, and forming a metal gate having a second height in the gate trench. The second height of the metal gate is substantially equal to the first height of the dummy gate.

Mos transistor and process thereof

A MOS transistor includes a gate structure and a spacer. The gate structure is located on a substrate. The spacer is located on the substrate beside the gate structure, and the spacer includes an L-shaped inner spacer and an outer spacer, wherein the outer spacer is located on the L-shaped inner spacer, and the two ends of the L-shaped inner spacer protrude from the outer spacer. Moreover, the present invention also provides a MOS transistor process for forming the MOS transistor.

Stamping head used for pressing anisotropic conductive film onto ceramic substrate

A stamping head includes a stamping portion and a connection portion connected to the stamping portion. The stamping portion includes a top surface and four side surfaces. The stamping head defines a jag extending from a junction between a specific one of the side surfaces and the top surface toward a centre of the top surface. The jag passes through the specific side surface. When the stamping head presses a ACF onto a ceramic substrate, a residual air between the ACF and the ceramic substrate flows outside through the jag.

Image sensor module and camera module using same

An image sensor module includes a ceramic substrate, an image sensor, a conductive film, a flexible print circuit board (FPCB), and a stiffening plate. The ceramic substrate includes an upper surface and a lower surface opposite to the upper surface, the ceramic substrate defines a transparent hole on the upper surface and a receiving recess on the lower surface. The transparent hole communicates with the receiving recess. The image sensor is received in the receiving recess and is electrically connected to the ceramic substrate. The FPCB is electrically connected to the lower surface of the ceramic substrate by the conductive film. The stiffening plate is positioned on one side of the FPCB opposite to the ceramic substrate.

Apparatus for assembling camera modules

An apparatus for assembling camera modules to flexible printed circuit boards (PCBs) includes a number of trays, a surface mounting device used in surface mount technology (SMT) for PCBs, and a hot pressing device. Workpieces, each of which includes a flexible PCB (FPCB) and a lens module positioned on the FPCB, are received in the trays. Each tray is sent to the surface mounting device. The surface mounting device loads and pastes a stiffener onto a FBCB, opposite to a lens module. The hot pressing device hot presses each stiffener to the respective workpiece, which is received in each tray sent from the surface mounting device, to fixedly secure the stiffener to the respective workpiece to form a camera module.

Transistor

A method for fabricating a transistor device including the following processes. First, a semiconductor substrate having a first transistor region is provided. A low temperature deposition process is carried out to form a first tensile stress layer on a transistor within the first transistor region, wherein a temperature of the low temperature deposition process is lower than 300 degree Celsius (° C.). Then, a high temperature annealing process is performed, wherein a temperature of the high temperature annealing process is at least 150° C. higher than a temperature of the low temperature deposition process. Finally, a second tensile stress layer is formed on the first tensile stress layer, wherein the first tensile stress layer has a lower tensile stress than the second tensile stress layer.

PROJECTION APPARATUS AND IMAGING MODULE THEREOF

An imaging module includes a display element and an image displacement device. The display element includes an active display surface adapted to receive an illumination beam, convert the illumination beam into an image beam, and transmit the image beam. The image displacement device includes an optical component located on a transmission path of the image beam and adapted to allow the image beam to pass therethrough, a carrier, a base and at least one actuator, wherein the optical component is disposed on the carrier, the at least one actuator is disposed on the base, one end of the at least one actuator is connected to the carrier to drive the optical element on the carrier to swing relative to the base, and an orthographic projection area of the at least one actuator on a reference plane does not overlap with an orthographic projection area of the active display surface. 1. An imaging module , comprising:a display element, comprising an active display surface, the active display surface adapted to receive an illumination beam and convert the illumination beam into an image beam, and the image beam transmitted by the active display surface; andan image displacement device, comprising an optical component, a carrier, a base and at least one actuator, wherein the optical component is disposed on the carrier, the optical component is located on a transmission path of the image beam and is adapted to allow the image beam to pass therethrough, the at least one actuator is disposed on the base, one end of the at least one actuator is connected to the carrier to drive the optical element on the carrier to swing relative to the base, a plane where the active display surface is located is a reference plane, and an orthographic projection area of the at least one actuator on the reference plane does not overlap with an orthographic projection area of the active display surface.2. The imaging module according to claim 1 , wherein a distance from the active display surface to ...

CAMERA MODULE

A camera module includes an image sensor, a circuit board, and a stiffener. The stiffener is located one side of the circuit board and includes a bottom plate grounded. The image sensor is located on another side of the circuit board. The stiffener includes a sidewall extending from the bottom plate. The sidewall and the bottom plate cooperatively hold the circuit board. An insulative coating is coated on the sidewall to avoid short circuiting. 1. A camera module , comprising:an image sensor;a circuit board; anda stiffener locating on one side of the circuit board, the stiffener comprising a bottom plate configured for being grounded, the image sensor located on another side of the circuit board, wherein the stiffener comprises at least one sidewall extending from the bottom plate, the at least one sidewall and the bottom plate cooperatively hold the circuit board, the stiffener comprises an insulative coating coated on the at least one sidewall of the stiffener to avoid short circuiting.2. The camera module of claim 1 , comprising a lens module claim 1 , the lens module located on the circuit board and covering the image sensor.3. The camera module of claim 1 , comprising a conductive adhesive claim 1 , the conductive adhesive positioned on the bottom plate of the stiffener to make the stiffener connect with the circuit board.4. The camera module of claim 3 , wherein the conductive adhesive is anisotropic conductive film.5. The camera module of claim 1 , wherein the material of the insulative coating is printing ink.6. The camera module of claim 1 , wherein the material of the stiffener is selected from the group consisting of copper claim 1 , copper alloy claim 1 , and plastic.7. The camera module of claim 1 , wherein the bottom plate is in a square shape.8. The camera module of claim 1 , wherein the bottom plate is in a circular shape. 1. Technical FieldThe present disclosure relates to camera modules and, particularly, to a camera module having performance of ...

SEMICONDUCTOR DEVICE HAVING SILICON-GERMANIUM LAYER ON FIN AND METHOD FOR MANUFACTURING THE SAME

A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30. 1. A method for manufacturing a semiconductor device , comprising:providing a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer;epitaxially growing a silicon-germanium (SiGe) layer on the top surface and the pair of lateral sidewalls of the fin, wherein the SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30; andforming a gate stack on the isolation layer and across the top surface and the pair of lateral sidewalls of the fin, wherein the fin extends along a first direction, and the gate stack extends along a second direction different from the first direction.2. The method according to claim 1 , wherein the first thickness of the SiGe layer is a maximum thickness of the SiGe layer formed on the top surface of the fin claim 1 , and the second thickness of the SiGe layer is a maximum thickness of the SiGe layer formed on said lateral sidewall of the fin.3. The method according to claim 1 ...

PORTABLE ELECTRICAL DEVICE

A portable electrical device includes a tablet PC, a bottom plate, a support arm and a pivot portion. The tablet PC includes a breach and a first magnetic inducing member arranged inside the breach. One end of the support arm is pivoted to the bottom plate, and the other end of the support arm is pivoted to the pivot portion, and the other end of the pivot portion is with a second magnetic inducing member. When the second magnetic inducing member is moved into the breach to magnetize the first magnetic inducing member, the tablet PC is securely coupled with the pivot portion so that the tablet PC can be rotated; on the contrary, when the second magnetic inducing member is removed from the breach, the tablet PC can be totally independent to the support arm and the bottom plate. 1. A portable electrical device , comprising:a tablet PC comprising a breach and at least one first magnetic inducing member arranged inside the breach;a bottom plate comprising an input interface;at least one support arm comprising a first end and a second end opposite to each other, wherein the first end is pivoted to the bottom plate; andat least one pivot portion comprising a third end and a fourth end opposite to each other, wherein the third end is pivoted to the second end of the support arm, and the fourth end is provided with a second magnetic inducing member,wherein when the second magnetic inducing member is moved into the breach to magnetize the first magnetic inducing member, the tablet PC is securely coupled with the pivot portion so that the tablet PC can be rotated relative to the support arm,when the second magnetic inducing member is removed from the breach, the tablet PC can be totally independent to the support arm.2. The portable electrical device of claim 1 , wherein the second magnetic inducing member comprises two adjacent surfaces respectively magnetizing two of the at least one first magnetic inducing members.3. The portable electrical device of claim 1 , wherein the ...

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.

Semiconductor device and method for fabricating the same

A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure; forming a mask layer on the first fin-shaped structure; and performing a first anneal process so that the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature.

METHOD OF FABRICATION TRANSISTOR WITH NON-UNIFORM STRESS LAYER WITH STRESS CONCENTRATED REGIONS

A method of fabrication a transistor device with a non-uniform stress layer including the following processes. First, a semiconductor substrate having a first transistor region is provided. A low temperature deposition process is carried out to form a first tensile stress layer on a transistor within the first transistor region, wherein a temperature of the low temperature deposition process is lower than 300 degree Celsius (° C.) . Then, a high temperature annealing process is performed, wherein a temperature of the high temperature annealing process is at least 150° C. higher than a temperature of the low temperature deposition process. Finally, a second tensile stress layer is formed on the first tensile stress layer, wherein the first tensile stress layer has a tensile stress lower than a tensile stress of the second tensile stress layer. 1. A method of fabrication a transistor with a non-uniform stress layer , comprising:providing a semiconductor substrate having a first transistor region;forming at least a transistor within the first transistor region;performing a low temperature deposition process to form a first tensile stress layer on the transistor, wherein a temperature of the low temperature deposition process is lower than 300 degree Celsius (° C.);after performing the low temperature deposition process, performing a high temperature annealing process, wherein a temperature of the high temperature annealing process is at least 150° C. higher than a temperature of the low temperature deposition process; andforming a second tensile stress layer on the first tensile stress layer, wherein the first tensile stress layer has a tensile stress lower than a tensile stress of the second tensile stress layer.2. The method according to claim 1 , wherein the transistor comprises a gate structure located on the semiconductor substrate claim 1 , and the first tensile stress layer respectively encompasses the gate structure and covers the semiconductor substrate in ...

AUTOMATIC ANGLE-MEASURED APPARATUS AND METHOD USING THE SAME

An automatic angle-measured apparatus includes a driving unit coupled with a clamping plate and a driving seat, an encoding unit located at an end of the driving unit facing the driving seat and signally connected to the driving unit, at least one attitude sensor located at the driving seat, and a control unit signally connected to the encoding unit and the attitude sensor. The attitude sensor senses the un-rotated and the rotated driving seat to generate a first and a second signals, respectively. The control unit bases on the first and the second signals to calculate an offset. The control unit controls the driving unit to rotate a predetermined angle. The encoding unit bases on the predetermined angle to generate location information. The control unit bases on the first signal, the second signal and the location information to calculate angle information and compensation for performing a correction procedure. 1. An automatic angle-measured apparatus , comprising:a clamping plate;a driving seat;a driving unit, coupled with the clamping plate and the driving seat; 'signally connected to the driving unit;', 'an encoding unit, located at an end of the driving unit facing the driving seat,'}at least one attitude sensor, located at the driving seat; anda control unit, signally connected to the encoding unit and the attitude sensor;wherein the attitude sensor senses the driving seat in an un-rotation state to generate a first signal, the attitude sensor senses the driving seat after a rotation by a predetermined angle to generate a second signal, the control unit bases on the first signal and the second signal to calculate an offset, the control unit controls the driving unit to rotate a predetermined angle, the encoding unit bases on the predetermined angle of the driving unit to generate location information, the control unit bases on the first signal, the second signal and the location information to calculate angle information and compensation, and a correction ...

Epitaxial structure of semiconductor device and manufacturing method thereof

An epitaxial structure of semiconductor device includes a substrate, a recess, a first epitaxial layer, a second epitaxial layer, and a third epitaxial layer. The recess is formed in the substrate and disposed near a surface of the substrate, wherein the recess has a recess depth. The first epitaxial layer is disposed on surfaces of a sidewall and a bottom of the recess. The second epitaxial layer is disposed on the surface of the first epitaxial layer, wherein the Ge concentration of the second epitaxial layer is greater than the Ge concentration of the first epitaxial layer. The third epitaxial layer is disposed on the surface of the second epitaxial layer, wherein the Ge concentration of the third epitaxial layer is greater than the Ge concentration of the second epitaxial layer, and the depth of the third epitaxial layer is about ½ to about ¾ of the recess depth.

PROJECTOR AND LENS MODULE

The invention discloses a projector, including a light source, a light engine module and a lens module. The lens module includes a plate, a lens, at least two sliding components and a first position adjustment device. The sliding components are disposed between the plate and a light engine housing and located respectively at a first position and a second position of the light engine housing. Each of the sliding components has a sliding member and a distance adjustment member. The plate is movably disposed on the light engine housing via the sliding member. The distance adjustment members are in contact with the sliding members respectively. The first position adjustment device is movably disposed between the plate and the light engine housing. The invention further discloses a lens module. The invention can improve movement accuracy and imaging stability of a projector and a lens module. 1. A projector , comprising:a light source, providing an illumination beam; a light engine housing; and', 'a light valve, accommodated in the light engine housing and used to convert the illumination beam into an image beam; and, 'a light engine module, comprising a plate;', 'a lens, fixed to the plate, wherein the image beam becomes a projection beam after passing through the lens;', 'at least two sliding components, disposed between the plate and the light engine housing, and at least located respectively at a first position and a second position of the light engine housing, wherein each of the at least two sliding components has a sliding member and a distance adjustment member, the plate is movably disposed on the light engine housing via the sliding members, and the distance adjustment members are in contact with the sliding members respectively, so that a distance between the first position and the lens module is equal to a distance between the second position and the lens module; and', 'a first position adjustment device, movably disposed between the plate and the light ...

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

The present invention provides a method for forming a semiconductor structure, including: first, a substrate is provided. Next, at least two gate structures are formed on the substrate, each gate structure including two spacers disposed on two sides of the gate structure. Afterwards, a dry etching process is performed to remove parts of the substrate, so as to form a recess in the substrate, and a wet etching process is performed, to etch partial sidewalls of the recess, so as to form at least two tips on two sides of the recess respectively. In addition, parts of the spacer are also removed through the wet etching process, and each spacer includes a rounding corner disposed on a bottom surface of the spacer. 1. A method for forming a semiconductor structure , comprising:providing a substrate;forming at least two gate structures on the substrate, each gate structure including two spacers disposed on two sides of the gate structure;performing a dry etching process, to remove parts of the substrate, so as to form a recess in the substrate; andperforming a wet etching process, to etch partial sidewalls of the recess, so as to form at least two tips on two sides of the recess respectively, in addition, parts of the spacer are also removed through the wet etching process, and each spacer comprises a rounding corner disposed on a bottom surface of the spacer.2. The method of claim 1 , further comprising performing an ion implantation process on a bottom surface of the recess after the dry etching process is performed.3. The method of claim 2 , wherein the wet etching process is performed after the ion implantation process is performed.4. The method of claim 2 , wherein the ions used in the ion implantation process comprise boron ions claim 2 , phosphate ions claim 2 , arsenic ions claim 2 , germanium ions claim 2 , argon ions or a combination thereof.5. The method of claim 1 , wherein the recess is disposed in the substrate and between the two gate structures.6. The ...

FIELD-EFFECT TRANSISTOR

A semiconductor device includes a semiconductor substrate, a gate structure formed over the semiconductor substrate, and an epitaxial structure formed partially within the semiconductor substrate. The gate structure includes a gate dielectric layer formed over the semiconductor substrate, a gate electrode formed over the gate dielectric layer, and a spacer formed on side surfaces of the gate dielectric layer and the gate electrode. A laterally extending portion of the epitaxial structure extends laterally at an area below a top surface of the semiconductor substrate in a direction toward an area below the gate structure. A lateral end of the laterally extending portion is below the spacer. 1. A semiconductor device , comprising:a semiconductor substrate; a gate dielectric layer formed over the semiconductor substrate;', 'a gate electrode formed over the gate dielectric layer; and', 'a spacer formed onside surfaces of the gate dielectric layer and the gate electrode; and, 'a gate structure formed over the semiconductor substrate, wherein the gate structure includesan epitaxial structure, as one of a source or drain region corresponding to the gate structure, formed partially within the semiconductor substrate, a laterally extending portion of the epitaxial structure extending laterally at an area below a top surface of the semiconductor substrate in a direction toward an area below the gate structure, wherein a lateral end of the laterally extending portion is below the spacer.2. The semiconductor device of claim 1 , wherein a vertically extending portion of the epitaxial structure extends vertically above the top surface of the semiconductor substrate in an area adjacent the gate structure.3. The semiconductor device of claim 2 , further comprising:an interlayer dielectric layer between a side surface of the vertically extending portion of the epitaxial structure and a side surface of the gate structure.4. The semiconductor device of claim 3 , wherein a top surface ...

SEMICONDUCTOR PROCESS FOR MANUFACTURING EPITAXIAL STRUCTURES

A semiconductor process includes the steps of providing a substrate with fin structures formed thereon, performing an epitaxy process to grow an epitaxial structure on each fin structure, forming a conformal cap layer on each epitaxial structure, where adjacent conformal cap layers contact each other, and performing an etching process to separate contacting conformal cap layers. 1. A semiconductor process for manufacturing epitaxial structures , comprising:providing a substrate with fin structures spaced apart from each other;performing an epitaxy process to grow an epitaxial structure on each said fin structure;forming a conformal cap layer on each said epitaxial structure, wherein adjacent said conformal cap layers contact each other; andperforming an etching process to separate said contacting conformal cap layers.2. The semiconductor process according to claim 1 , wherein said epitaxial structure is a hexagonal structure covering on the top surface and a portion of the sidewall of said fin structure.3. The semiconductor process according to claim 1 , wherein said epitaxial structure comprises a top surface and two side surfaces tilted down from two sides of said top surface.4. The semiconductor process according to claim 1 , wherein said conformal cap layer comprises a top portion and two side portions tilted down from two sides of said top portion claim 1 , and adjacent said side portions of said conformal cap layers contact each other.5. The semiconductor process according to claim 4 , wherein the etching rate of said etching process on said side portion of said conformal cap layer is larger than the etching rate of said etching process on said top portion of said conformal cap layer.64. The semiconductor process according to claim. claim 4 , wherein said side portions of said conformal cap layers are thinner by said etching process so that said contacting side portions of said conformal cap layers are separated.7. The semiconductor process according to claim ...

Manufacturing method of semiconductor structure for improving quality of epitaxial layers

A manufacturing method of a semiconductor structure for improving quality of an epitaxial layer is provided in the present invention. The manufacturing method includes the following steps. A gate structure is formed on a semiconductor substrate, and two lightly doped regions are formed in the semiconductor substrate at two sides of the gate structure. A capping layer is formed on the gate structure and the lightly doped regions. Two epitaxial layers are formed at the two sides of the gate structure after the step of forming the capping layer. An oxide film formed on the lightly doped regions will influence the growth condition of the epitaxial layers. A removing process is performed to remove the oxide film on the lightly doped regions before the step of forming the capping layer so as to improve the quality of the epitaxial layers.

METHOD FOR FABRICATING SOLID ELECTROLYTIC CAPACITORS

The instant disclosure relates to an improved method for the production of solid electrolytic capacitor, comprising the following steps. First, provide an insulating substrate. Next, form a plurality of conducting gels including aluminum powder on the insulating substrate. Thirdly, execute a high-temperature sintering process to metalize the conducting gels to form a plurality of aluminum plates. Next, form a dielectric layer on every aluminum plate. Then form an isolation layer on every dielectric layer to define an anodic region and a cathodic region. Lastly, form a conductive layer on the dielectric layer of every cathodic region, thus defining a solid electrolytic capacitor unit. 1. A method for improving fabrication of solid electrolytic capacitors comprising the steps of:providing an insulating substrate;forming a plurality of aluminum powder containing conductive gel bodies on the insulating substrate, wherein two adjacent conductive gel bodies define a scribe line therebetween;employing a high temperature sintering process to metalize the conductive gel bodies into a plurality of aluminum substrates;forming a dielectric layer on each of the surface of the aluminum substrate;forming an isolation layer on each of the dielectric layer to define an anodic region and a cathodic region; andcovering the dielectric layer of the cathodic region with a conductive layer.2. The method as recited in claim 1 , wherein the step of covering the conductive layer includes steps of: forming a conductive polymer layer on the dielectric layer of the cathodic region; forming a carbon gel layer on the conductive polymer layer; and forming a silver gel layer on the carbon gel layer.3. The method as recited in claim 2 , wherein the carbon gel layer is formed by one of the following: a conductive carbon gel claim 2 , and a carbon based paste.4. The method as recited in claim 1 , wherein the aluminum powder containing conductive gel bodies comprises:a thermosetting resin presented ...

CLOUD-BASED FONT SERVICE SYSTEM

Disclosed is a cloud-based font service system to be installed in a cloud server, comprising: a glyph construction module to allow users to construct a plurality of glyph patterns in order to form a computer font; a font management module allowing users to add, modify or delete glyph patterns of computer fonts and including a font shelving tool to allow an administrator of a computer font to determine trading conditions; and a font application module to display particular glyphs of the computer font for trading. The invention allows users to select glyphs from existing computer fonts and modify them to form new computer fonts for trading. 1. A cloud-based font service system installed in a cloud server , comprisinga glyph construction module comprising a glyph construction tool and a glyph input interface, to allow users to input graphic materials to construct glyph patterns corresponding to a plurality of symbols, letters or characters and to convert said graphic materials to digital glyphs in a particular format for construction of a computer font;a font management module comprising a font edition tool that allows users to add, modify or delete glyph patterns of said computer font and a font shelving interface that allows an administrator of said computer font to determine access rights and method of display of the computer font; anda font application module comprising a computer font trading interface to display particular glyphs of the computer font in a particular format, for consumers' selection, download or use of the computer fonts;wherein the font edition module allows users to select glyphs from a plurality of computer fonts in the cloud-based font service system to form a new computer font for displaying in the computer font trading interface.2. The cloud-based font service system of claim 1 , wherein a computer font is represented by digital information describing glyph patterns and glyph codes of a particular number of glyphs included in the computer ...

METHOD OF FORMING SEMICONDUCTOR DEVICE

A method of forming a semiconductor device is disclosed. At least one gate structure is provided on a substrate, wherein the gate structure includes a first spacer formed on a sidewall of a gate. A first disposable spacer material layer is deposited on the substrate covering the gate structure. The first disposable spacer material layer is etched to form a first disposable spacer on the first spacer. A second disposable spacer material layer is deposited on the substrate covering the gate structure. The second disposable spacer material layer is etched to form a second disposable spacer on the first disposable spacer. A portion of the substrate is removed, by using the first and second disposable spacers as a mask, so as to form two recesses in the substrate beside the gate structure. A stress-inducing layer is formed in the recesses. 1. A method of forming a semiconductor device , comprising:providing at least one gate structure on a substrate, wherein the gate structure comprises a first spacer formed on a sidewall of a gate;depositing a first disposable spacer material layer on the substrate covering the gate structure;etching the first disposable spacer material layer to form a first disposable spacer on the first spacer;depositing a second disposable spacer material layer on the substrate covering the gate structure;etching the second disposable spacer material layer to form a second disposable spacer on the first disposable spacer;removing a portion of the substrate by using the first and second disposable spacers as a mask, so as to form two recesses in the substrate beside the gate structure; andforming a stress-inducing layer in the recesses.2. The method of claim 1 , wherein the step of depositing the first disposable spacer material layer comprises performing an ALD process claim 1 , a CVD process claim 1 , a PVD process or a sputter deposition process.3. The method of claim 1 , wherein the step of etching the first disposable spacer material layer ...

CONTROL METHOD FOR A PORTABLE ELECTRONIC DEVICE COMING WITH AN EXTERNAL CONTROL MODULE

The disclosure is related to a control method for a portable electronic device coming with an external control module. A main body of the control module has a built-in circuit system and a power supplying unit. The circuit system has a processor, and the power supplying unit provides power to the circuit system and the processor required. Then, the processor is electronically connected with an electronic connector. The processor may acquire a controlling authority for the operating system (iOS or Android) of the default portable electronic device by electronically connecting the electronic connector to the default portable electronic device outside (which may be a smart-phone, a tablet or a notebook), to achieve the purpose for providing electronic signals transmission and storing between the control module and the default portable electronic device, and to reduce the operating steps and procedures when the default portable electronic device transmits the electronic signals. 1. A control method for a portable electronic device coming with an external control module , said external control module comprising a main body and an electronic connector , said main body comprising a built-in circuit system with a processor and a power supplying unit for providing power to said circuit system and said processor required , said processor of said main body electronically connected to said electronic connector and said electronic connector exposed out of said main body to connect electronically with said default portable electronic device to enable said processor to acquire a control authority for said operation system of said portable electronic device , said control method comprising steps:(A) electronically connecting said electronic connector of said main body with an electronic connector interface of said default portable electronic device;(B) activating said main body;(C) using said processor of said main body to detect whether said control authority for said operating ...

Device for assembling camera module having anisotropic conductive film

A device for assembling a camera module includes a support base, a pressing head, a buffer tape, a winding device, a driver, and a controller. The support base is for supporting the camera module. The camera module includes a ceramic substrate positioned on the support base and an anisotropic conductive film (ACF) pasted on the ceramic substrate. The pressing head is positioned above the ACF and is configured to pressing the ACF. The buffer tape is positioned between the pressing head and the ACF. The winding device includes a winding-out roller and a winding-in roller. The buffer tape is wound on the winding-out roller. The controller is configured to control the driver to drive the winding device to wind the buffer tape out from the winding-out roller and into the winding-in roller in a predetermined manner.

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure; forming a mask layer on the first fin-shaped structure; and performing a first anneal process so that the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature. 1. A method for fabricating semiconductor device , comprising:providing a substrate having a first region and a second region;forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region;forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure;forming a mask layer on the first fin-shaped structure; andperforming a first anneal process so that the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature.2. The method of claim 1 , further comprising:forming an insulating layer around the first fin-shaped structure and the second fin-shaped structure;removing part of the insulating layer to form the STI.3. The method of claim 1 , wherein the mask layer comprises silicon nitride.4. The method of claim 1 , wherein a top surface of each of the first fin-shaped structure and the second fin-shaped structure comprises a planar surface.5. The method of claim 4 , further comprising performing the first anneal process to transform a top surface of the second fin-shaped structure into a first curve.6. The method of claim 5 , further comprising removing the mask layer after performing the first anneal process.7. The method of claim 6 , further comprising performing a second anneal process after removing the mask layer to transform a top surface of the first fin-shaped ...

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE MADE THEREBY

A method for fabricating a semiconductor device, and a semiconductor device made with the method are described. In the method, a cavity is formed in a substrate, a first epitaxy process is performed under a pressure higher than 65 torr to form a buffer layer in the cavity, and a second epitaxy process is performed to form a semiconductor compound layer on the buffer layer in the cavity. In the semiconductor device, the ratio (S/Y) of the thickness S of the buffer layer on a lower sidewall of the cavity to the thickness Y of the buffer layer at the bottom of the cavity ranges from 0.6 to 0.8. 1. A method for fabricating a semiconductor device , comprising:forming a cavity in a substrate;performing a first epitaxy process under a pressure higher than 65 torr to form a buffer layer in the cavity; andperforming a second epitaxy process to form a semiconductor compound layer on the buffer layer in the cavity2. The method of claim 1 , wherein a reaction gas introduced in the first epitaxy process contains a Si-containing gas and a Ge-containing gas claim 1 , and a flow rate ratio of the Si-containing gas to a carrier gas of the first epitaxy process is within a range of 0.01 to 0.03.3. The method of claim 2 , wherein the silicon-containing gas comprises dichlorosilane (DCS) or silane.4. The method of claim 2 , wherein the carrier gas comprises H5. The method of claim 2 , wherein an etching gas is also introduced in the first epitaxy process claim 2 , and a flow rate ratio of the etching gas to the reaction gas is within a range of 0.12 to 0.25.6. The method of claim 5 , wherein the etching gas comprises HCl claim 5 , HBr or HF.7. The method of claim 1 , wherein the buffer layer comprises SiGe having a germanium content less than 30 wt %.8. The method of claim 7 , wherein the semiconductor compound layer comprises SiGe having a germanium content in a range of 10 to 30 wt %.9. The method of claim 8 , further comprising performing a third epitaxy process to form a silicon ...

Machine tool collision avoidance method and system using the same

A machine tool collision avoidance method includes: loading multiple processing codes; simulating multiple path traces corresponding to the processing codes; estimating multiple execution periods for running the path traces; selecting the shortest execution period from the execution periods; determines whether the distance between the trace point points on any two of the path traces is less than a safety distance within the shortest execution period; if the distance between a first trace point on a first path trace and a second trace point on a second path trace is less than the safety distance, estimating a first time point at which a first turret runs to the first trace point and a second time point at which the second turret runs to the second trace point; generating a collision warning if the difference between the first time point and the second time point is lower than a tolerance value.

SEMICONDUCTOR PROCESS FOR MODIFYING SHAPE OF RECESS

A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface. 1. A semiconductor process , comprising:forming a gate on a substrate;forming a recess in the substrate beside the gate;forming a seeding layer covering on the recess;after forming the seeding layer, performing a surface modification process on the recess by importing at least a depositing gas and at least an etching gas; andforming an epitaxial structure in the recess.2. The semiconductor process according to claim 1 , further comprising:forming the epitaxial structure in the recess after the surface modification process is performed.3. The semiconductor process according to claim 1 , wherein the epitaxial structure comprises a silicon germanium epitaxial structure.4. The semiconductor process according to claim 1 , wherein the surface modification process comprises an etching and depositing synchronous process.5. The semiconductor process according to claim 4 , wherein the etching rate of the etching and depositing synchronous process to the surface is larger than the depositing rate of the etching and depositing synchronous process to the surface.6. The semiconductor process according to claim 4 , wherein the etching and depositing synchronous process has germanium gas and hydrogen chloride gas imported.7. The semiconductor process according to claim 6 , wherein the ratio of the germanium gas to the hydrogen chloride gas is adjusted as the etching and depositing synchronous process is performed for controlling the shape of the recess.8. The semiconductor process according to claim 4 , wherein the etching and depositing synchronous process further has dichlorosilane gas imported.9. The semiconductor process according to claim 4 , wherein the processing temperature of the etching ...

SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME

A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall. 1. A method for fabricating semiconductor device , comprising:forming a gate structure on a substrate;forming a first spacer and a second spacer around the gate structure;forming a recess adjacent to two sides of the second spacer;performing a cleaning process to trim the second spacer for forming a void between the first spacer and the substrate; andforming an epitaxial layer in the recess.2. The method of claim 1 , wherein the first spacer comprises an L-shape and the second spacer comprises an I-shape.3. The method of claim 1 , wherein the first spacer comprises silicon oxide and the second spacer comprises silicon nitride.4. The method of claim 1 , further comprising forming a third spacer around the gate structure before forming the first spacer.5. The method of claim 4 , wherein the third spacer comprises an I-shape.6. The method of claim 1 , further comprising performing the cleaning process to remove part of the second spacer so that a bottom surface of the second spacer is higher than a bottom surface of the first spacer.7. The method of claim 1 , further comprising a cap layer on the epitaxial layer while filling the void.8. The method of claim 7 , wherein the cap layer comprises silicon.9. The method of claim 7 , wherein the cap layer comprises a planar top surface and an inclined sidewall.10. The method of claim 9 , wherein the cap ...

SEMICONDUCTOR PROCESS

A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface. 1. A semiconductor process , comprising:forming a gate on a substrate;forming a recess in the substrate beside the gate; andperforming a surface modification process on a surface of the recess to modify the shape of the recess and change the contents of the surface.2. The semiconductor process according to claim 1 , further comprising:forming an epitaxial structure in the recess after the surface modification process is performed.3. The semiconductor process according to claim 2 , wherein the epitaxial structure comprises a silicon germanium epitaxial structure.4. The semiconductor process according to claim 1 , wherein the surface modification process comprises an etching and depositing synchronous process.5. The semiconductor process according to claim 4 , wherein the etching rate of the etching and depositing synchronous process to the surface is larger than the depositing rate of the etching and depositing synchronous process to the surface.6. The semiconductor process according to claim 4 , wherein the etching and depositing synchronous process comprises importing at least a depositing gas and at least an etching gas.7. The semiconductor process according to claim 6 , further comprising:forming an epitaxial structure in the recess after the surface modification process is performed, wherein the depositing gas is common to one of the elements that make up the composition of the epitaxial structure.8. The semiconductor process according to claim 6 , wherein the etching and depositing synchronous process has germanium gas and hydrogen chloride gas imported.9. The semiconductor process according to claim 8 , wherein the ratio of the germanium gas to the hydrogen chloride gas is ...

Semiconductor device formed with nanowire

A semiconductor device is provided. The semiconductor device includes a substrate; a first nanowire disposed over the substrate; a second nanowire disposed over the substrate; a first pad formed at first ends of the first and second nanowires, a second pad formed at second ends of the first and second nanowires, wherein the pads comprise different materials than the nanowires; and a gate surrounding at least a portion of each of the first and second nanowires.

Semiconductor structure and method for manufacturing the same

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor includes a substrate, two source/drain regions, a gate structure and two salicide layers. The two source/drain regions are partially disposed in the substrate each with a substantially flat top surface higher than a top surface of the substrate, and the two source/drain regions are separated from each other. The two source/drain regions are formed of an epitaxial material. The gate structure is disposed on the substrate between the two source/drain regions. The two salicide layers are disposed on the substantially flat top surfaces of the two source/drain regions, respectively.

Optical touch device, correction element, and correction method therefor

An optical touch device configured to cause a display surface to from a touch surface. The optical touch device includes a non-visible lighting element, a non-visible sensing element, and a correction element. The non-visible lighting element is adjacent to the display surface and forms a non-visible light curtain in front of the display surface. The non-visible lighting element is disposed in front of the display surface and has a sensing area covering the display surface. The correction element is disposed on the display surface and includes a bottom layer placed on the display surface and a plurality of reflecting blocks disposed on the top surface of the bottom layer. The correction element of the optical touch device has long-life. A correction method for an optical touch device is also provided.

METHOD FOR FABRICATING A CURVE ON SIDEWALLS OF A FIN-SHAPED STRUCTURE

A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a liner on the fin-shaped structure; and removing the liner and part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve. Moreover, the method includes forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed. 1. A method for fabricating semiconductor device , comprising:forming a fin-shaped structure on a substrate;forming a shallow trench isolation (STI) around the fin-shaped structure; andremoving part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve.2. The method of claim 1 , further comprising:forming a liner on the fin-shaped structure; andremoving the liner and part of the fin-shaped structure to form the curve.3. The method of claim 2 , further comprising:{'sub': 4', '2', '2, 'using an etching gas to remove the liner completely and part of the fin-shaped structure, wherein the etching gas is selected from the group consisting of CHand CHF.'}4. The method of claim 2 , wherein the liner comprises silicon oxide.5. The method of claim 1 , further comprising forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed.6. The method of claim 5 , further comprising using a gas selected from the group consisting of dichlorosilane (DCS) claim 5 , GeH claim 5 , and HCl to form the epitaxial layer.7. The method of claim 5 , further comprising using a gas selected from the group consisting of SiH claim 5 , GeH claim 5 , and HCl to form the epitaxial layer.8. The method of claim 5 , wherein the epitaxial layer comprises an inner sidewall overlapping the sidewall of the fin-shaped structure and an outer sidewall opposite to the inner sidewall.9. ...

Manufacturing method of semiconductor device

A semiconductor device includes a substrate including a plurality of transistor devices formed thereon, at least an epitaxial structure formed in between the transistor devices, and a tri-layered structure formed on the epitaxial structure. The epitaxial structure includes a first semiconductor material and a second semiconductor material, and a lattice constant of the second semiconductor material is larger than a lattice constant of the first semiconductor material. The tri-layered structure includes an undoped epitaxial layer, a metal-semiconductor compound layer, and a doped epitaxial layer sandwiched in between the undoped epitaxial layer and the metal-semiconductor compound layer. The undoped epitaxial layer and the doped epitaxial layer include at least the second semiconductor material.

Light emitting diode packaging structure and camera module using the same

The present disclosure illustrates a light emitting diode packaging structure and a camera module having the same. The light emitting diode packaging structure comprises a transparent package member, a plurality of light emitting diodes, and a plurality of conductive wires. The transparent package member has a geometrical shape with an opening located at the center thereof. The opening tightly fits with lens module. The plurality of light emitting diodes are located in the transparent package member. The plurality of light emitting diodes are electrically connected with the plurality of conductive wires, and parts of the plurality of conducting wires are exposed to outside of the transparent package for receiving electric power to provide driving power to the plurality of light emitting diodes. The camera module comprises an image sensor, a lens module, and the light emitting diode packaging structure.

Wafer-level camera module and manufacturing method thereof

The present disclosure illustrates a wafer-level camera module for an endoscope and manufacturing method thereof. The wafer-level camera module includes substrate, image sensor unit, light emitting units, lens module, and transparent package member. The substrate has a first area and a plurality of second areas. The image sensor unit and the light emitting units are located at the first area and the plurality of second areas, respectively. The image sensor unit is covered by the lens module, but the plurality of light emitting units are not covered by the lens module. The transparent package member is disposed above the plurality of plurality of light emitting units and around the lens module. The light generated from the light emitting units transmits through the transparent package to outer environment. An opaque material is coated between the lens module and the transparent package member.

Video image distribution method

A video image distribution method used in a mobile electronic device is disclosed to include the step of controlling the video camera and starting image capture execution command, the step of temporarily storing original video camera images, the step of enabling the proprietary camera layer to use resource images for the creation of an image processing chain, the step of allocating hardware and software resources and constructing an image processing node Then enabling image processing chain to add source images to multiple processed images for storage, and the step of creating an application user linked service execution command and distributing temporarily stored multiple images to multiple application users. As long as the hardware and software resources permit, the method of the invention can serve multiple application users to meet different needs of different application users for different format settings, achieving optimal results, and facilitating operation of the mobile electronic device.

SEMICONDUCTOR DEVICE WITH METAL GATES

A semiconductor device includes at least a substrate, fin-shaped structures, a protection layer, epitaxial layers, and a gate electrode. The fin-shaped structures are disposed in a first region and a second region of the substrate. The protection layer conformally covers the surface of the substrate and the sidewalls of fin-shaped structures. The epitaxial layers respectively conformally and directly cover the fin-shaped structures in the first region. The gate electrode covers the fin-shaped structures in the second region, and the protection layer is disposed between the gate electrode and the fin-shaped structures. 1. A semiconductor device , comprising:a substrate, having a first region and a second region;a plurality of fin-shaped structures, respectively disposed in the first region and the second region;a protection layer, conformally covering the surface of the substrate and the sidewalls of the fin-shaped structures in the first region and the second region;a plurality of epitaxial layers, respectively conformally disposed on and in direct contact with the fin-shaped structures in the first region; anda gate electrode, covering the fin-shaped structures in the second region, wherein the protection layer is disposed between the gate electrode and the fin-shaped structures.2. The semiconductor device of claim 1 , wherein the protection layer is a gate oxide layer.3. The semiconductor device of claim 1 , wherein sidewalls and top surfaces of the fin-shaped structures in the second region are completely covered by the protection layer.4. The semiconductor device of claim 1 , wherein each of the fin-shaped structures in the first region comprises stair-shaped sidewalls.5. The semiconductor device of claim 1 , the semiconductor device further comprising a shallow trench isolation structure disposed on the substrate claim 1 , wherein each of the fin-shaped structures in the first region comprises a tread being level with a top surface of the shallow trench ...

METHOD AND SYSTEM FOR PREDICTING COLLISION OF MACHINING PATH

A method for predicting collision of a machining path includes: a step of reading an NC program; a step of translating a plurality of block information in the NC program; a step of, prior to perform interpolation upon each of the plurality of block information, calculating a safety distance of a next block information with respect to a block information to be interpolated; a step of searching a number of individual block information having an accumulated distance greater than or equal to the safety distance; and a step of performing an anti-collision detection upon each of the individual block information contributing the accumulated distance. In addition, a system for predicting collision of a machining path is also provided. 1. A method for predicting collision of a machining path , applicable to a machine tool including a controller , the controller including a processing unit , the method for predicting collision of a machining path comprising the steps of:(a) reading an NC program;(b) translating a plurality of block information in the NC program;(c) prior to perform interpolation upon each of the plurality of block information, calculating a safety distance of a next block information with respect to a block information to be interpolated, wherein the safety distance is obtained by calculating a system response time and a stop distance with respect to the each of the plurality of block information;(d) searching a number of individual block information having an accumulated distance greater than or equal to the safety distance, wherein the accumulated distance is obtained by orderly calculating and accumulating the stop distances with respect the individual block information; and(e) performing an anti-collision detection upon each of the individual block information contributing the accumulated distance.2. The method for predicting collision of a machining path of claim 1 , wherein the step (c) includes the steps of:(c1) calculating the stop distance for the ...

FIELD-EFFECT TRANSISTOR AND METHOD OF MAKING THE SAME

A semiconductor device includes a semiconductor substrate, a gate structure formed over the semiconductor substrate, and an epitaxial structure formed partially within the semiconductor substrate. A vertically extending portion of the epitaxial structure extends vertically above a top surface of the semiconductor substrate in an area adjacent the gate structure. A laterally extending portion of the epitaxial structure extends laterally at an area below the top surface of the semiconductor substrate in a direction toward an area below the gate structure and beyond an area where the epitaxial structure extends vertically. The device further includes an interlayer dielectric layer between a side surface of the vertically extending portion of the epitaxial structure and a side surface of the gate structure. A top surface of the laterally extending portion of the epitaxial structure directly contacts the interlayer dielectric layer. 111-. (canceled)12. A method for forming a semiconductor device , comprising:forming a gate structure over a semiconductor substrate;forming a capping layer over the semiconductor substrate and the gate structure;implanting arsenic into the semiconductor substrate, through the capping layer and using the gate structure as a mask, to form an implanted region in the semiconductor substrate;completely removing the capping layer;forming an etching spacer on a side surface of the gate structure; andetching the implanted region, using the gate structure and the etching spacer as a mask, to form a recess in the semiconductor substrate, the recess including an undercut region directly beneath the etching spacer.13. The method of claim 12 , further comprising:forming an epitaxial structure in the recess as one of a source or drain region corresponding to the gate structure;removing the etching spacer; andforming an interlayer dielectric layer over the epitaxial layer.14. The method of claim 13 , wherein forming the epitaxial structure includes forming ...

Semiconductor device and method for fabricating the same

A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.

Clutch applied between transmission shaft and wheel of an electric cart

A clutch to be applied between a transmission shaft and a wheel of an electric cart, comprising a bushing for fixing to the shaft and a hub rotatably covered on the bushing, wherein the hub is adapted to have the wheel securely mounted thereto. A collar is mounted on the outer ends of the bushing and the hub to engage the bushing with the hub. The hub and the bushing, which are concentric annuluses, have matching slots on their outer ends, respectively, and the collar is provided with matching collar protrusions for engagement therewith. A stud is cased within the collar and secured to the outer end of the transmission shaft via a screw, which also slidably secures the collar to the shaft via a spring which sits on the shoulder in the inner wall of the collar. The hub can be easily disengaged from the bushing by simply pulling the collar and compressing the spring and rotating the collar so that the protrusions are no longer aligned with the slots and sit on the outer face of the hub and the bushing.

Epitaxial process

一種磊晶製程，包含有下述步驟。首先，形成一凹槽於一基底中。接著，形成一晶種層覆蓋凹槽的一表面。接續，形成一緩衝層於晶種層上。續之，進行一蝕刻製程於緩衝層以塑形緩衝層。繼之，形成一磊晶層於緩衝層上。

Semiconductor device with metal gates

A semiconductor device includes at least a substrate, fin-shaped structures, a protection layer, epitaxial layers, and a gate electrode. The fin-shaped structures are disposed in a first region and a second region of the substrate. The protection layer conformally covers the surface of the substrate and the sidewalls of fin-shaped structures. The epitaxial layers respectively conformally and directly cover the fin-shaped structures in the first region. The gate electrode covers the fin-shaped structures in the second region, and the protection layer is disposed between the gate electrode and the fin-shaped structures.

Control circuit push-control and display apparatus for multi-purpose power leisure car

This invention relates to a push-control circuit control and display apparatus for multi-purpose power leisure car, and particularly to a display panel including automatic display control circuit and turning-left, turning-right display and buttons; 6-block shift display and buttons; voltage automatic charge warning and LED warning signal buzzer indication and buttons; headlamp button and LED; solenoid brake release LED display and button; horn button, etc. such multiple functions for leisure power car. It comprises a leisure car main body, an automatic display control circuit display panel mounted in the front part of the main body; the automatic control circuit display panel having turning-left, turning-right signal LED, obstacle LED, shift LED, voltage automatic charge warning LED and release buzzer LED, headlamp LED, solenoid brake release LED; the buttons which are made of light-transmission film, if intended for automatic display of the aforesaid functions during running, the user only needs to press down the markings on the panel as desired and therefore easy operation and leisure function can be achieved hereof.

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device includes the steps of first forming a gate structure on a substrate, forming a first spacer adjacent to the gate structure, forming a second spacer adjacent to the first spacer, forming an epitaxial layer adjacent to the second spacer, forming a second cap layer on the epitaxial layer, and then forming a first cap layer on the second cap layer. Preferably, a top surface of the first cap layer includes a V-shape and the first cap layer and the second cap layer are made of different materials.

Method for fabricating a curve on sidewalls of a fin-shaped structure

A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a liner on the fin-shaped structure; and removing the liner and part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve. Moreover, the method includes forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed.

Thiazolidinone compounds and use thereof

A pharmaceutical composition containing a compound of Formula (I) for treating an opioid receptor-associated condition. Also disclosed is a method for treating an opioid receptor-associated condition using such a compound. Further disclosed are two sets of thiazolidinone compounds of formula (I): (i) compounds each having an enantiomeric excess greater than 90% and (ii) compounds each being substituted with deuterium.

Apparatus for assembling camera modules

An apparatus for assembling camera modules to flexible printed circuit boards (PCBs) includes a number of trays, a surface mounting device used in surface mount technology (SMT) for PCBs, and a hot pressing device. Workpieces, each of which includes a flexible PCB (FPCB) and a lens module positioned on the FPCB, are received in the trays. Each tray is sent to the surface mounting device. The surface mounting device loads and pastes a stiffener onto a FBCB, opposite to a lens module. The hot pressing device hot presses each stiffener to the respective workpiece, which is received in each tray sent from the surface mounting device, to fixedly secure the stiffener to the respective workpiece to form a camera module.

Epitaxial process

An epitaxial process includes the following step. A recess is formed in a substrate. A seeding layer is formed to cover a surface of the recess. A buffer layer is formed on the seeding layer. An etching process is performed on the buffer layer to homogenize and shape the buffer layer. An epitaxial layer is formed on the homogenized flat bottom shape buffer layer.

視訊影像分配方法

本發明係提供一種視訊影像分配方法，係利用電子裝置之硬體平台為通過作業系統之攝影機代理層配合驅動程式經由影像擷取介面接收攝影機所傳輸之影像，並進行控制攝影機及影像取得執行命令後，便可藉由攝影機代理層來將原始攝影機影像進行暫存，以及建立與應用程式用戶連結的服務執行命令，並通過硬體平台藉由指定參數及分配軟硬體資源針對攝影機傳輸之來源影像動態建立影像處理鏈進行處理成所要求之格式加入至已完成處理的多重影像進行暫存後，再將該暫存的多重影像輸出分配至多個應用程式用戶使用，藉此滿足應用程式用戶對於影像不同格式的設定需求達到最佳化之效果。

相機模組組裝裝置

本發明提供一種相機模組組裝裝置，其包括一用於承載一相機模組的承載座、一用於壓合該相機模組的壓頭、一設置於該相機模組與該壓頭之間的緩衝帶、一用於卷送該緩衝帶且包括一卷出輪及一捲入輪的卷送機構、一驅動裝置及一用於控制該驅動裝置驅動該卷送機構以使該緩衝帶以預定的時間間隔、預定速度及預定的行程從該卷出輪卷出並捲入該捲入輪的控制器。如此，該相機模組組裝裝置可以自動將該緩衝帶老化的部分更換為未使用的部分，提高效率，另外操作標準統一，有利於保證品質。

Method and circuitry for extracting clock in clock data recovery system

Semiconductor device and method for fabricating the same

A method for fabricating semiconductor device includes the steps of providing a substrate having a first region and a second region, forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region, and forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure. Preferably, the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature and a center of curvature of the first fin-shaped structure is lower than a top surface of the STI and a center of curvature of the second fin-shaped structure is higher than the top surface of the STI.

Device for assembling camera module having anisotropic conductive film

A device for assembling a camera module includes a support base, a pressing head, a buffer tape, a winding device, a driver, and a controller. The support base is for supporting the camera module. The camera module includes a ceramic substrate positioned on the support base and an anisotropic conductive film (ACF) pasted on the ceramic substrate. The pressing head is positioned above the ACF and is configured to pressing the ACF. The buffer tape is positioned between the pressing head and the ACF. The winding device includes a winding-out roller and a winding-in roller. The buffer tape is wound on the winding-out roller. The controller is configured to control the driver to drive the winding device to wind the buffer tape out from the winding-out roller and into the winding-in roller in a predetermined manner.

Method for fabricating semiconductor device

A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.

Thiazolidinone compounds and use thereof

Improved structure for pliable swaying ornament of crystal ball

Video image distribution method

Network device and network connection method

A network device includes a processor circuit and transceiver circuits. The transceiver circuits are connected to a wireless access point via a base channel based on a control of the processor circuit. The wireless access point is connected to a first device. The processor circuit determines whether a tunneled direct link setup link (TDLS) throughput of the base channel is higher than or equal to a threshold value; if the TDLS throughput is higher than or equal to the threshold value, performs an auto channel selection algorithm to determine whether to establish an off channel; and if the off channel is established, performs one of a dual-band concurrent mode and a multi-channel concurrent mode according to a number of antennas corresponding to the transceiver circuits, in order to control at least one of the transceiver circuits to be connected to the first device via the off channel.

固態電解電容器之改良製法

可攜式電子裝置之部分

【物品用途】;本設計物品，係可用以提供通訊或多媒體播放功能之可攜式電子裝置。;【設計說明】;圖式所揭露之虛線部分，為本案不主張設計之部分。

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.

可攜式電子裝置之部分

【物品用途】;本設計物品，係可用以提供通訊或多媒體播放功能之可攜式電子裝置。;【設計說明】;圖式所揭露之虛線部分，為本案不主張設計之部分。

影像感測器封裝用之壓頭

一種壓頭，其用於在影像感測器模組封裝時，將一異方性導電膜壓合在一陶瓷基板上。所述壓頭包括一衝壓部，所述衝壓部包括一頂面與四個側面。所述衝壓部於所述頂面與所述四個側面中之至少一個側面之交界處向所述頂面之中心部延伸開設有一缺口。所述缺口貫穿所述側面。

Modified electrode, manufacturing method thereof and use thereof

A modified electrode, manufacturing method thereof and use thereof are provided. The manufacturing method includes steps of: mixing a carbon nanomaterial with 2,2′-azino-bis(3-ethylbenzothiazoline-6-sulfonic acid), followed by drop-casting on a screen-printed carbon electrode, to obtain carbon material modified electrodes; and electrochemically pre-treating the carbon material modified electrodes by cyclic voltammetry technique, constant potential technique, or constant current technique to obtain a modified electrode. 3-Ethyl-6-sulfonate benzothiazolinone imine and 3-ethyl-6-sulfonate benzothiazolone compound are formed on a surface of the modified electrode, and the modified electrode is used for protein analysis, protein immobilization and related biosensor, electrochemical catalysis or biofuel cells.

Method of forming conductive layer of semiconductor device

A method of forming a conductive layer of a semiconductor device is described. The method includes forming a hard mask layer on a metal layer overlying a substrate, in which the metal layer includes tungsten. The method further includes patterning the hard mask layer until portions of the metal layer are exposed from the patterned hard mask layer. The method further includes performing a plasma process to the metal layer through the patterned hard mask layer until portions of the substrate are exposed from the etched metal layer, in which a process gas mixture used in the plasma process includes a fluorine based gas, a chlorine based gas, and oxygen.

Method for fabricating semiconductor device

A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.

可刺激穴位之穿戴裝置及其運作方法

一種可刺激穴位之穿戴裝置及其運作方法，該穿戴裝置包括：穿戴本體、至少一電極及控制器，其中，穿戴本體供穿戴於使用者身上，該穿戴本體包括用於緊附於該使用者之皮膚之穿戴部以及用於固定該穿戴部之固定部，至少一電極係設置於該穿戴本體上，用於提供微電流，控制器係設置於該穿戴本體上，透過導線連接至該至少一電極，控制器可接收來自外部電子裝置所傳送之控制指令，並將其分析後產生電路控制訊號，該電路控制訊號可用於控制該至少一電極來產生微電流。本發明之可刺激穴位之穿戴裝置可穿戴於使用者身上，透過其上之至少一電極來對使用者之穴位提供微電流，藉此達到持續且多種型態之刺激穴位效果。

行動電話之部分

【物品用途】;本設計物品，用以通訊。;【設計說明】;本設計之設計特點在於物品之部分之形狀，且圖式所揭露之虛線部分，為本案不主張設計之部分。本設計之機體呈一具四邊弧角的矩形體，且在機體的正面設有一矩形顯示區，機體背蓋的角落處於設有一攝像鏡頭，且在攝像鏡頭之旁設有兩組長條型的淺狀凹槽，其中各組的淺狀凹槽彼此平行，且兩組淺狀凹槽的延伸方向互相傾斜，如是構成整體外觀具特異視覺效果之設計。

Semiconductor device and method for fabricating the same

A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.

可攜式電子裝置之部分

【物品用途】;本設計物品，係可用以提供通訊或多媒體播放功能之可攜式電子裝置。;【設計說明】;圖式所揭露之虛線部分，包含可攜式電子裝置正面顯示幕上方的揚聲孔、側邊框體上的按鍵/孔洞、以及背面的鏡頭，皆為本案不主張設計之部分。

晶圓級相機模組及其製造方法

本發明揭露一種用於內視鏡之晶圓級相機模組及其製造方法，此晶圓級相機模組包含一基板、一影像感測元件、複數個發光元件、一透鏡模組以及一透明封裝件。基板包含第一區域以及複數個第二區域。影像感測元件與複數個發光元件係分別設置於第一區域及複數個第二區域上。透鏡模組係覆蓋於影像感測元件之上方，且不覆蓋複數個發光元件。透明封裝件係位於複數個發光元件之上方以及透鏡模組之周圍，複數個發光元件所發出的光係穿透過透明封裝件至外部。透鏡模組與透明封裝件之間係塗佈不透光材料。