19-05-2016 дата публикации
Номер: US20160142051A1
Принадлежит:
A circuit of an output stage of a push-pull driver having dynamic biasing may include a stacked configuration of field effect transistors (PFETs) having a first PFET, a second PFET, and a third PFET, whereby the first PFET is connected to a first supply voltage, the third PFET is connected to an output of a switchable voltage bias generator circuit, and the second PFET is electrically connected between the first PFET and the third PFET. A transmission gate may be connected to a second supply voltage, whereby the transmission gate electrically connects the second supply voltage to an electrical connection between the first PFET and the second PFET based on a first operating state for preventing a voltage breakdown condition associated with the stacked configuration of PFETs. The third PFET is bias controlled via the switching of the output of the switchable voltage bias generator circuit. 1. A circuit of an output stage of a push-pull driver having dynamic biasing , the circuit comprising:a first stacked configuration of p-type field effect transistors (PFETs) having a first PFET, a second PFET, and a third PFET, wherein the first PFET is connected to a first supply voltage, the third PFET is connected to an output of a first switchable voltage bias generator circuit, and the second PFET is electrically connected between the first PFET and the third PFET; anda first transmission gate connected to a second supply voltage, wherein the first transmission gate electrically connects the second supply voltage to an electrical connection between the first PFET and the second PFET based on a first operating state for preventing a first voltage breakdown condition associated with the first stacked configuration of PFETs, and wherein the third PFET is bias controlled via the switching of the output of the first switchable voltage bias generator circuit.2. The circuit of claim 1 , further comprising:a second stacked configuration of n-type field effect transistors (NFETs) ...
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