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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 17. Отображено 17.
14-01-2021 дата публикации

RESISTIVE SWITCHING NONVOLATILE RANDOM ACCESS MEMORY DEVICE

Номер: US20210013405A1
Автор: DAO HWEE GRAYSON WONG, KAZUTAKA YAMANE, JU DY LIM, DINGGUI ZENG, CHIM SENG SEET, WONG DAO HWEE GRAYSON, YAMANE KAZUTAKA, LIM JU DY, ZENG DINGGUI, SEET CHIM SENG, WONG, DAO HWEE GRAYSON, YAMANE, KAZUTAKA, LIM, JU DY, ZENG, DINGGUI, SEET, CHIM SENG
Принадлежит:

The disclosure relates generally to resistive switching nonvolatile random access memory (ReRAM) devices, and more generally to structures and methods of fabricating multiple conductive elements in ReRAM devices. A resistive memory device is presented, the device comprising a first electrode having a first work function, and a second electrode having a second work function, the first work function being different from the second work function. A dielectric layer is disposed between the first and second electrodes. The device further comprises a set of nanocrystal structures distributed in the dielectric layer. A conductive layer is also disposed in the dielectric layer. 1. A resistive memory device comprising:a first electrode having a first work function;a second electrode having a second work function, wherein the first work function is different from the second work function;a dielectric layer disposed between the first and second electrodes;a set of nanocrystal structures distributed in the dielectric layer; anda conductive layer disposed in the dielectric layer.2. The resistive memory device of claim 1 , wherein the set of nanocrystal structures is a first set of nanocrystal structures and the conductive layer is a second set of nanocrystal structures.3. The resistive memory device of claim 1 , wherein the conductive layer is a metal layer.4. The resistive memory device of further comprising a third set of nanocrystal structures distributed in the dielectric layer.5. The resistive memory device of further comprising a metal layer disposed in the dielectric layer.6. The resistive memory device of claim 3 , further comprising a second metal layer disposed in the dielectric layer.7. The resistive memory device of further comprising:a fourth set of nanocrystal structures distributed in the dielectric layer anda fifth set of nanocrystal structures distributed in the dielectric layer;wherein the first and fifth sets of nanocrystal structures have at least one ...

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Номер записи: 1
05-11-2019 дата публикации

Magnetic random access memory structures and integrated circuits with cobalt anti-parallel layers, and methods for fabricating the same

Номер: US0010468457B1
Автор: Dinggui Zeng, Kah Wee Gan, Kazutaka Yamane, ZENG DINGGUI, GAN KAH WEE, YAMANE KAZUTAKA, Zeng, Dinggui, Gan, Kah Wee, Yamane, Kazutaka
Принадлежит: GLOBALFOUNDRIES SINGAPORE PTE. LTD., GLOBALFOUNDRIES SG PTE LTD, Globalfoundries Singapore Pte. Ltd.

Spin transfer torque magnetic random access memory structures, integrated circuits, and methods for fabricating integrated circuits are provided. An exemplary spin transfer torque magnetic random access memory structure has a perpendicular magnetic orientation, and includes a bottom electrode and a base layer over the bottom electrode. The spin transfer torque magnetic random access memory structure further includes a fixed layer over the base layer. The fixed layer includes anti-parallel layers including cobalt tungsten/platinum (CoW/Pt) bilayers, cobalt molybdenum/platinum (CoMo/Pt) bilayers, or bilayers including a combination of at least two materials selected from cobalt (Co), tungsten (W), molybdenum (Mo), platinum (Pt), palladium (Pd) or iridium (Ir). Also, the spin transfer torque magnetic random access memory structure includes a magnetic tunnel junction (MTJ) element with a perpendicular orientation over the fixed layer and a top electrode over the MTJ element.

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Номер записи: 2
07-04-2023 дата публикации

Memory device and preparation method thereof

Номер: CN115942754A
Автор: WANG XIAOGUANG, ZENG DINGGUI, LI HUIHUI, CAO KANYU
Принадлежит:

The invention relates to a memory device and a preparation method thereof. The memory device comprises a substrate, a common source line, a plurality of gate word lines, a plurality of columnar structures and a gate dielectric layer. The common source line is arranged on the substrate. The plurality of gate word lines are arranged above the common source line in parallel and at intervals, and the gate word lines extend along a first direction. The plurality of columnar structures are arranged on the common source line in an array mode and penetrate through the grid word line. The columnar structures of adjacent rows are staggered in the row direction, and the columnar structures of adjacent columns are staggered in the column direction. The gate dielectric layer is located between the columnar structure and the gate word line. According to the memory device and the preparation method thereof, the storage integration density of the memory device can be further improved, and the memory device ...

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Номер записи: 3
04-04-2023 дата публикации

Preparation method of semiconductor structure, semiconductor structure and semiconductor memory

Номер: CN115915903A
Автор: CAO KANYU, WANG XIAOGUANG, LI HUIHUI, ZENG DINGGUI, DENG JIEFANG
Принадлежит:

The embodiment of the invention discloses a preparation method of a semiconductor structure, the semiconductor structure and a semiconductor memory. The preparation method comprises the following steps: providing a substrate; sequentially forming an MTJ structure and a first mask structure on the substrate; patterning the first mask structure to form a first pattern extending along the first direction; forming a second mask structure over the first pattern; patterning the second mask structure to form a second pattern extending along a second direction; wherein the first direction is intersected with the second direction, and the first direction is not perpendicular to the second direction; patterning the first pattern by using the second pattern to form a honeycomb pattern; the honeycomb pattern is transferred to the MTJ structure to form a honeycomb MTJ array. Therefore, the honeycomb MTJ array has high density, so that the storage density of the semiconductor memory can be improved when ...

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Номер записи: 4
16-05-2023 дата публикации

Semiconductor structure and preparation method thereof

Номер: CN116133438A
Автор: WANG XIAOGUANG, ZENG DINGGUI, LI HUIHUI, DENG JIEFANG, CAO KANYU
Принадлежит:

The invention relates to a semiconductor structure and a preparation method thereof. The semiconductor structure comprises a substrate; the transistor comprises a control end, a first end and a second end; the first end and the second end are located in the substrate, and the control end is located between the first end and the second end; the bottom electrode of the first magnetic storage structure is electrically connected with the first end of the transistor; the top electrode of the second magnetic storage structure is electrically connected with the first end of the transistor, and the bottom electrode of the first magnetic storage structure and the bottom electrode of the second magnetic storage structure are located on the same layer; the first bit line is electrically connected with the top electrode of the first magnetic storage structure; the second bit line is electrically connected with the bottom electrode of the second magnetic storage structure; and the selection line is ...

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Номер записи: 5
02-04-2024 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US11948616B2
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate; a transistor, including a control terminal, a first terminal, and a second terminal; a first magnetic memory structure, a bottom electrode of which is electrically connected to the first terminal of the transistor; a second magnetic memory structure, a top electrode of which is electrically connected to the first terminal of the transistor, the bottom electrode of the first magnetic memory structure is located in a same layer with a bottom electrode of the second magnetic memory structure; a first bit line, electrically connected to a top electrode of the first magnetic memory structure; a second bit line, electrically connected to the bottom electrode of the second magnetic memory structure; and a selection line, electrically connected to a second terminal of the transistor.

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Номер записи: 6
02-03-2023 дата публикации

Method for manufacturing semiconductor structure, semiconductor structure and semiconductor memory

Номер: US20230061322A1
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

A method for manufacturing a semiconductor structure includes the following: providing a substrate; forming an MTJ structure and a first mask structure in sequence on the substrate; performing a patterning process on the first mask structure to form a first pattern extending in a first direction; transferring the first pattern to the MTJ structure; forming a second mask structure on the MTJ structure; performing a patterning process on the second mask structure to form a second pattern extending in a second direction, the first direction intersecting the second direction and being not perpendicular to the second direction; and performing a patterning process on the MTJ structure by utilizing the second pattern to form a cellular MTJ array, the first pattern and the second pattern together forming a cellular pattern.

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Номер записи: 7
02-03-2023 дата публикации

Method for manufacturing semiconductor structure, semiconductor structure, and semiconductor memory

Номер: US20230063767A1
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

A method for manufacturing a semiconductor structure, a semiconductor structure and a semiconductor memory are provided. The method includes: providing a substrate; forming an MTJ structure and a first mask structure sequentially on the substrate; patterning the first mask structure to form a first pattern extending in a first direction; forming a second mask structure on the first pattern; patterning the second mask structure to form a second pattern extending in a second direction, in which the first direction intersects the second direction, and is not perpendicular to the second direction; patterning the first pattern by utilizing the second pattern to form a cellular pattern; and transferring the cellular pattern to the MTJ structure to form a cellular MTJ array.

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Номер записи: 8
02-03-2023 дата публикации

Semiconductor structure and manufacturing method thereof, and memory

Номер: US20230068461A1
Автор: Dinggui Zeng, Huihui Li, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

Embodiments of the present disclosure provide a semiconductor structure and a manufacturing method thereof, and a memory. The semiconductor structure may at least include: a plurality of transistors arranged in a staggered manner, wherein the transistors share one source plate, a channel of the transistor is located on the source plate, and a channel length direction of the transistor is perpendicular to a surface of the source plate, and a material of the channel includes an oxide semiconductor; a plurality of drain contact members, electrically connected to drains of the transistors, wherein an odd number of transistors share one drain contact member, and the transistors sharing the same drain contact member are driven by a same word line; and a plurality of magnetic tunnel junctions, located on the drain contact members, wherein the magnetic tunnel junctions are electrically connected to the drain contact members in a one-to-one corresponding manner.

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Номер записи: 9
02-03-2023 дата публикации

Memory device and preparing method thereof

Номер: US20230065326A1
Автор: Dinggui Zeng, Huihui Li, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

The present application relates to a memory device and a preparing method thereof. The memory device includes: a substrate, and a plurality of memory cells disposed in an array on the substrate. Memory cells in adjacent rows are staggered in a row direction, and a distance between two adjacent memory cells in any row is a first distance. Memory cells in adjacent columns are staggered in a column direction, and a staggered distance is less than the first distance.

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Номер записи: 10
02-03-2023 дата публикации

Semiconductor structure, manufacturing method therefor and memory

Номер: US20230061246A1
Автор: Dinggui Zeng, Huihui Li, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

A semiconductor structure, a manufacturing method therefor and a memory are provided. The semiconductor structure may at least include: a plurality of aligned transistors, in which the transistors share a same source plate, channels of the transistors are located above the source plate, the channel length direction of the transistors is perpendicular to a surface of the source plate, and a material of the channels includes a single crystal semiconductor; a plurality of drain contacts, electrically connected with drains of the transistors, in which even number of the transistors share one same drain contact; and a plurality of magnetic tunnel junctions, located on the drain contacts and electrically connected with the drain contacts in one-to-one correspondence.

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Номер записи: 11
23-11-2023 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US20230380191A1
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, XIAOGUANG WANG
Принадлежит: Changxin Memory Technologies Inc

The present disclosure relates to a semiconductor structure and a manufacturing method thereof, including: a substrate; a plurality of transistors, arranged based on a first preset pattern; a plurality of transistor contact structures, corresponding to the transistors, the bottom portions of the transistor contact structures are arranged based on the first preset pattern, and top portions of which are arranged based on the shape of a regular hexagon; a plurality of memory cells, corresponding to the transistor contact structures, the memory cells are arranged based on the shape of a regular hexagon; and a plurality of memory contact structures, corresponding to the memory cells, the bottom portions of the memory contact structures are arranged based on the shape of a regular hexagon, top portions of which are arranged based on a second preset pattern, and the second preset pattern is different from the first preset pattern.

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Номер записи: 12
02-03-2023 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US20230067509A1
Автор: Dinggui Zeng, Huihui Li, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate. A plurality of vertical transistors arranged in an aligned manner are formed on the substrate, wherein a channel material of the vertical transistor includes an oxide semiconductor. A plurality of staggered contact pads connected to upper ends of the vertical transistors are formed on the vertical transistors, wherein a single contact pad is connected to the upper ends of an even number of vertical transistors. A magnetic tunnel junction is formed on the contact pad.

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Номер записи: 13
02-03-2023 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US20230066016A1
Автор: Dinggui Zeng, Huihui Li, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a plurality of memory cells alternately arranged on a substrate, the memory cell including an odd number of vertical transistors, a connection pad connected to one end of each of the odd number of vertical transistors, and a magnetic tunnel junction located on the connection pad; wherein a material of a channel of the vertical transistor includes a monocrystalline semiconductor.

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Номер записи: 14
30-03-2023 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US20230094859A1
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, Kanyu Cao, XIAOGUANG WANG
Принадлежит: Beijing Superstring Academy of Memory Technology, Changxin Memory Technologies Inc

The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate, having a first surface; a plurality of memory cells, located on the first surface of the substrate and arranged according to a first preset pattern; and a plurality of memory contact structures, corresponding to the memory cells in a one-to-one manner, where bottom portions of the memory contact structures are in contact with top portions of the memory cells, and top portions of the memory contact structures are arranged according to a second preset pattern. The bottom portion of the memory contact structure is arranged opposite to the top portion of the memory contact structure.

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Номер записи: 15
23-11-2023 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US20230377644A1
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, XIAOGUANG WANG
Принадлежит: Changxin Memory Technologies Inc

The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a transistor; a first phase change memory structure, a bottom electrode of the first phase change memory structure being electrically connected to a first terminal (source or drain) of the transistor; a second phase change memory structure, a top electrode of the second phase change memory structure being electrically connected to the first terminal of the transistor; a first bit line, electrically connected to a top electrode of the first phase change memory structure; and a second bit line, electrically connected to a bottom electrode of the second phase change memory structure.

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Номер записи: 16
23-07-2024 дата публикации

Semiconductor structure and manufacturing method thereof

Номер: US12046280B2
Автор: Dinggui Zeng, Huihui Li, Jiefang DENG, XIAOGUANG WANG
Принадлежит: Changxin Memory Technologies Inc

The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a transistor; a first phase change memory structure, a bottom electrode of the first phase change memory structure being electrically connected to a first terminal (source or drain) of the transistor; a second phase change memory structure, a top electrode of the second phase change memory structure being electrically connected to the first terminal of the transistor; a first bit line, electrically connected to a top electrode of the first phase change memory structure; and a second bit line, electrically connected to a bottom electrode of the second phase change memory structure.

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Номер записи: 17