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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Форма поиска

Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 64. Отображено 55.
27-02-2018 дата публикации

Method of manufacturing an electronic device and electronic device manufactured thereby

Номер: US0009905440B1

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.

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28-09-2017 дата публикации

EMBEDDED DIE IN PANEL METHOD AND STRUCTURE

Номер: US20170278810A1
Принадлежит:

Methods for an embedded die panel are disclosed and may include fabricating a first layered structure by: forming first redistribution layers on a first carrier, forming a first dielectric layer on the first redistribution layers and carrier, forming a mask pattern on the first dielectric layer exposing a portion of the first dielectric layer, forming a second dielectric layer on the exposed portion of the first dielectric layer, forming vias in the first and second dielectric layers, and forming second redistribution layers on the second dielectric layer. The mask pattern may be removed forming a die cavity defined by the second dielectric layer. A second layered structure coupled to the first layered structure may be formed comprising a second carrier, a third dielectric layer, third and fourth redistribution layers on opposite surfaces of the third dielectric layer, and a semiconductor die. 151-. (canceled)52. A semiconductor package comprising:a first layered structure, comprising a first pre-formed dielectric film and a first conductive layer;a semiconductor die on a first surface of the first layered structure;a second layered structure, comprising a second pre-formed dielectric film, on the semiconductor die and the first layered structure;a third layered structure, comprising a third pre-formed dielectric film and a second conductive layer, on the second layered structure; andelectrical paths electrically coupling the first layered structure to the third layered structure.53. The semiconductor package of claim 52 , wherein the second layered structure comprises the electrical paths.54. The semiconductor package of claim 52 , comprising electrical interconnects on a second surface of the first layered structure claim 52 , wherein the second surface is opposite the first surface.55. The semiconductor package of claim 54 , wherein at least one of the electrical interconnects is electrically coupled to the first conductive layer.56. The semiconductor package of ...

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31-01-2017 дата публикации

Semiconductor product with interlocking metal-to-metal bonds and method for manufacturing thereof

Номер: US0009559075B1
Принадлежит: Amkor Technology, Inc., AMKOR TECHNOLOGY INC

A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding.

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18-05-2017 дата публикации

Encapsulated Semiconductor Package and Method of Manufacturing Thereof

Номер: US20170140988A1
Принадлежит:

Encapsulated semiconductor packages and methods of production thereof. As a non-limiting example, a semiconductor package may be produced by partially dicing a wafer, molding the partially diced wafer, and completely dicing the molded and partially diced wafer. 1. A method of making a semiconductor device , the method comprising:securing a semiconductor wafer to a carrier, the semiconductor wafer comprising a plurality of semiconductor dies;while the semiconductor wafer is secured to the carrier, partially dicing the semiconductor wafer;encapsulating the partially diced semiconductor wafer; anddicing the encapsulated partially diced semiconductor wafer.2. The method of claim 1 , wherein said securing a semiconductor wafer to a carrier comprises attaching the semiconductor wafer to a thermal release tape.3. The method of claim 1 , wherein said partially dicing the semiconductor wafer comprises partially etching the semiconductor wafer.4. The method of claim 3 , wherein said partially etching the semiconductor wafer comprises:etching completely through the semiconductor wafer along first portions of a first singulation street; andrefraining from etching the semiconductor wafer along second portions of the first singulation street.56-. (canceled)7. The method of claim 1 , wherein said encapsulating the partially diced semiconductor wafer comprises encapsulating the partially diced semiconductor wafer in molding compound.8. The method of claim 1 , wherein said dicing the encapsulated partially diced semiconductor wafer comprises cutting through wafer material of the partially diced semiconductor wafer and through encapsulant.9. The method of claim 1 , wherein said dicing the encapsulated partially diced semiconductor wafer comprises forming a cut line that is narrower than an etch line formed during said partially dicing the semiconductor wafer.10. The method of claim 1 , comprising releasing the encapsulated partially diced semiconductor wafer from the carrier prior to ...

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21-02-2017 дата публикации

Embedded die in panel method and structure

Номер: US0009576917B1
Принадлежит: Amkor Technology, Inc., AMKOR TECHNOLOGY INC

Methods for an embedded die panel are disclosed and may include fabricating a first layered structure by: forming first redistribution layers on a first carrier, forming a first dielectric layer on the first redistribution layers and carrier, forming a mask pattern on the first dielectric layer exposing a portion of the first dielectric layer, forming a second dielectric layer on the exposed portion of the first dielectric layer, forming vias in the first and second dielectric layers, and forming second redistribution layers on the second dielectric layer. The mask pattern may be removed forming a die cavity defined by the second dielectric layer. A second layered structure coupled to the first layered structure may be formed comprising a second carrier, a third dielectric layer, third and fourth redistribution layers on opposite surfaces of the third dielectric layer, and a semiconductor die.

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06-07-2017 дата публикации

SEMICONDUCTOR PRODUCT WITH INTERLOCKING METAL-TO-METAL BONDS AND METHOD FOR MANUFACTURING THEREOF

Номер: US20170194274A1
Принадлежит: Amkor Technology Inc

A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding.

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22-09-2016 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20160276174A1
Принадлежит:

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias. 1. A method of manufacturing a semiconductor package , the method comprising: a carrier; and', 'a carrier dielectric layer on the carrier;, 'providing a carrier structure comprising an interposer dielectric layer; and', 'an interposer conductive layer;, 'forming an interposer structure on a first side of the carrier structure, the interposer structure comprisingafter said forming an interposer structure, removing the carrier from the carrier structure; andattaching a semiconductor die to the interposer structure.2. The method of claim 1 , wherein:the carrier structure is on a first side of the interposer structure; andsaid attaching a semiconductor die to the interposer structure comprises, after said removing the carrier from the carrier structure, attaching the semiconductor die on the first side of the interposer structure.3. The method of claim 1 , wherein after said attaching a semiconductor die to the interposer structure claim 1 , the carrier dielectric layer is between the semiconductor die and the interposer structure.4. The method of claim 1 , comprising:forming an opening through the carrier dielectric layer to expose the interposer conductive layer; andforming a conductive interconnection structure, a first end of which directly contacts the interposer conductor layer, and a second end of which comprises a die interconnection pad.5. The method of claim 1 , wherein the carrier comprises a silicon carrier.6. The method of claim 5 , wherein the carrier dielectric layer comprises an inorganic dielectric layer claim 5 , and the interposer dielectric layer comprises an organic dielectric layer.7. The method of claim 6 , wherein the ...

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22-08-2017 дата публикации

Encapsulated semiconductor package and method of manufacturing thereof

Номер: US0009741617B2

Encapsulated semiconductor packages and methods of production thereof. As a non-limiting example, a semiconductor package may be produced by partially dicing a wafer, molding the partially diced wafer, and completely dicing the molded and partially diced wafer.

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02-01-2020 дата публикации

SEMICONDUCTOR DEVICE WITH INTEGRATED HEAT DISTRIBUTION AND MANUFACTURING METHOD THEREOF

Номер: US20200006300A1
Принадлежит:

A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die. 1. A semiconductor package , comprising: a first semiconductor die;', 'an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface; and', 'an internal heat distribution layer on a top surface of the first semiconductor die, the internal heat distribution layer extending to the side surface of the first semiconductor device;, 'a first semiconductor device comprisinga second semiconductor device comprising a second semiconductor die stacked on the top surface of the first semiconductor device; and covering an external surface of the second semiconductor device and the side surface of the first semiconductor device; and', 'contacting the internal heat distribution layer along the side surface of the first semiconductor device., 'an external heat distribution layer2. The semiconductor package of claim 1 , further comprising a plurality of fins projecting from the external heat distribution layer.3. The semiconductor package of claim 2 , wherein the internal heat distribution layer claim 2 , the ...

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16-01-2020 дата публикации

Semiconductor product with interlocking metal-to-metal bonds and method for manufacturing thereof

Номер: US20200020654A1

A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding.

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21-01-2021 дата публикации

Semiconductor device with optically-transmissive layer and manufacturing method thereof

Номер: US20210020813A1

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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17-02-2022 дата публикации

METHOD OF MANUFACTURING AN ELECTRONIC DEVICE AND ELECTRONIC DEVICE MANUFACTURED THEREBY

Номер: US20220051909A1
Принадлежит:

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material. 120-. (canceled)21. An electronic device comprising:an interposer comprising an upper interposer side, a lower interposer side, and a lateral interposer side;a semiconductor die comprising an upper die side, a lower die side, and a lateral die side, where the lower die side is coupled to the upper interposer side;an encapsulating material comprising an upper encapsulant side, a lower encapsulant side, and a lateral encapsulant side, where the encapsulating material laterally surrounds the semiconductor die, and covers at least a portion of the upper interposer side;an upper layer (UL) comprising an upper UL side, a lower UL side, and a lateral UL side, where the upper layer (UL) covers the encapsulating material and the semiconductor die, and an entirety of the upper layer (UL) is vertically higher than the encapsulating material and the semiconductor die; anda lower signal distribution structure (SDS) comprising an upper SDS side, a lower SDS side, and a lateral SDS side, where the lower interposer side is coupled to the upper SDS side.22. The electronic device of claim 21 , wherein the lateral UL side claim 21 , the lateral encapsulant side claim 21 , and the lateral SDS side are coplanar.23. The electronic device of claim 21 , wherein the upper die side is exposed from the encapsulating material claim 21 , and the upper layer (UL) contacts the upper die side and the upper encapsulant side.24. The electronic device of claim 21 , comprising a second semiconductor die coupled to the upper interposer side claim 21 , where the encapsulating material laterally surrounds the second semiconductor die claim 21 ...

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01-03-2018 дата публикации

Method of manufacturing an electronic device and electronic device manufactured thereby

Номер: US20180061674A1
Принадлежит: Amkor Technology Inc

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.

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08-03-2018 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20180069163A1
Принадлежит:

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface. 1. A method of manufacturing a semiconductor package , the method comprising:forming a first redistribution structure on an optically-transmissive carrier structure, the first redistribution structure comprising a conductive layer and a dielectric layer on the conductive layer;attaching a semiconductor die comprising an optical device to the first redistribution structure such that a bottom surface of the semiconductor die faces the first redistribution structure and the semiconductor die is electrically coupled through the dielectric layer to the conductive layer; andfilling a region, between the bottom surface of the semiconductor die and the first redistribution structure, with an optically-transmissive underfill material.2. The method of claim 1 , further comprising:forming a second redistribution structure over a top surface of the semiconductor die; andattaching a conductive interconnection structure to a conductive layer of the second redistribution structure to form an external connector of the semiconductor package.3. The method of claim 1 , wherein the optically-transmissive carrier comprises a lens configured to direct light to or from the optical device.4. The method of claim 1 , further comprising attaching another semiconductor die comprising another optical device to the first redistribution structure such that a bottom surface of the another semiconductor die faces the first redistribution structure.5. (canceled)6. The method of claim 1 , further comprising:forming a plurality of pads connected through the dielectric layer to the conductive layer of the first ...

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12-06-2014 дата публикации

Method And System For Semiconductor Packaging

Номер: US20140162407A1
Принадлежит:

Methods and systems for semiconductor packaging are disclosed and may include bonding a semiconductor wafer to a support structure, separating the wafer into discrete die, removing the die from the support structure, and attaching at least a subset of the die to a second support structure. Mold material may be placed in voids between the die utilizing a compression molding process, thereby generating a molded wafer, which may be demounted before depositing redistribution lines on the die and the mold material. Conductive balls may be placed on the redistribution lines before separating into molded packages. The molded wafer may be planarized utilizing a post-mold cure on a heated vacuum chuck after removing it from the second support structure. The redistribution lines may be electrically isolated utilizing polymer layers. The conductive balls may be placed on copper redistribution lines with a surface oxide layer at least 20 angstroms thick. 1. A method for semiconductor packaging , the method comprising:bonding a semiconductor wafer to a support structure;separating the wafer into a plurality of discrete die;removing said plurality of discrete die from said support structure;attaching at least a subset of said plurality of discrete die to a second support structure;placing mold material in voids between said attached at least a subset of said plurality of discrete die utilizing a compression molding process, thereby generating a molded wafer;removing said molded wafer from said second support structure;forming a first dielectric layer on said at least a subset of plurality of discrete die and on said mold material;depositing redistribution lines on said at least a subset of plurality of discrete die and said first dielectric layer;forming a second dielectric layer on a native oxide layer that is on the deposited redistribution lines, where the native oxide layer has a thickness of at least 20 angstroms;placing conductive balls on at least a subset of said ...

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22-03-2018 дата публикации

Encapsulated Semiconductor Package and Method of Manufacturing Thereof

Номер: US20180082896A1
Принадлежит: Amkor Technology Inc

Encapsulated semiconductor packages and methods of production thereof. As a non-limiting example, a semiconductor package may be produced by partially dicing a wafer, molding the partially diced wafer, and completely dicing the molded and partially diced wafer.

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12-03-2020 дата публикации

Semiconductor device and manufacturing method thereof

Номер: US20200083418A1

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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15-07-2021 дата публикации

ELECTRONIC DEVICE WITH ADAPTIVE VERTICAL INTERCONNECT AND FABRICATING METHOD THEREOF

Номер: US20210217631A1
Принадлежит:

Electronic components and an electronic device comprising one or more of the electronic components, and a method of manufacturing the electronic components and an electronic device comprising one or more of the electronic components. As non-limiting examples, various aspects of this disclosure provide vertical interconnect components and various other vertical electronic components, and a method of manufacturing thereof, and an electronic device comprising one or more of the vertical interconnect components and various other vertical electronic components, and a method of manufacturing thereof. 120-. (canceled)21. An electronic device comprising:a substrate having a first side and a second side; a top component side, a bottom component side, and lateral component sides extending between the top component side and the bottom component side, wherein the bottom component side is mounted to the first side of the substrate;', 'at least one row of a plurality of vertical vias extending between the top component side and the bottom component side; and', 'a molding material laterally surrounding each of the plurality of vertical vias, wherein the lateral component sides comprise only the molding material;, 'a first component comprisinga semiconductor die having a top die side, a bottom die side, and lateral die sides extending between the top die side and the bottom die side, the bottom die side coupled to the first side of the substrate; anda molded package body comprising a molding compound covering at least a portion of the first side of the substrate, at least a portion of the lateral die sides, and at least a portion of the lateral component sides.22. The electronic device of claim 21 , wherein the substrate comprises a conductive layer that electrically connects a die pad of the semiconductor die to a first end of at least one of the plurality of vertical vias.23. The electronic device of claim 22 , wherein:the substrate comprises a dielectric layer comprising a first ...

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05-07-2018 дата публикации

Method of manufacturing an electronic device and electronic device manufactured thereby

Номер: US20180190514A1
Принадлежит: Amkor Technology Inc

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.

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20-06-2019 дата публикации

SEMICONDUCTOR DEVICE WITH INTEGRATED HEAT DISTRIBUTION AND MANUFACTURING METHOD THEREOF

Номер: US20190189599A1
Принадлежит:

A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die. 19-. (canceled)10. The method of claim 12 , wherein said covering further comprises forming a plurality of fins that project from the external heat distribution layer.11. The method of claim 12 , further comprising forming the internal heat distribution layer from one or more of the following thermally conductive materials: copper (Cu) claim 12 , nickel (Ni) claim 12 , gold (Au) claim 12 , silver (Ag) claim 12 , platinum (Pt) claim 12 , cobalt (Co) claim 12 , titanium (Ti) claim 12 , chromium (Cr) claim 12 , zirconium (Zr) claim 12 , molybdenum (Mo) claim 12 , ruthenium (Ru) claim 12 , hafnium (Hf) claim 12 , tungsten (W) claim 12 , rhenium (Re) claim 12 , graphite claim 12 , and carbon black.12. A method of forming a semiconductor package claim 12 , the method comprising: a first semiconductor die;', 'an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the top surface; and', 'an internal heat distribution layer that extends to the side surface of the first semiconductor device;, 'forming a first ...

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11-06-2020 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20200185317A1
Принадлежит:

An electronic device and a method of manufacturing an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing metal studs to further set a semiconductor die into the encapsulant. 120-. (canceled)21. A method of manufacturing a semiconductor device comprising:providing a semiconductor wafer having an active side, an inactive side opposite the active side, and lateral sides between the active and inactive sides, wherein the active side comprises a passivation layer on a semiconductor material, and a first bond pad exposed from the passivation layer;forming a first metal post on the first bond pad, the first metal post having a wafer post side, a distal post side, and a lateral post side between the wafer and distal post sides;forming a dielectric layer (DL) having a wafer DL side coupled to the active side, a distal DL side, and a lateral DL side between the wafer DL side and the distal DL side, wherein the first metal post coupled the first bond pad extends vertically through the dielectric layer from the first bond pad to the distal DL side, and the distal post side of the first metal post is coplanar with the distal DL side;mounting a semiconductor die to a carrier via an adhesive layer, the semiconductor die comprising singulated portions of the semiconductor material, of the passivation layer, of the dielectric layer, the first bond pad, and the first metal post;encapsulating the semiconductor die mounted to the carrier with encapsulating material, the encapsulating material contacting and surrounding lateral sides of the semiconductor material and the lateral DL sides to form a reconstituted substrate in a wafer or panel format, the encapsulating material comprising a first encapsulant side, a second encapsulant side, and lateral encapsulant sides between the first and second encapsulant sides;releasing the ...

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19-08-2021 дата публикации

SEMICONDUCTOR DEVICE WITH INTEGRATED HEAT DISTRIBUTION AND MANUFACTURING METHOD THEREOF

Номер: US20210257346A1
Принадлежит:

A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die. 120-. (canceled)21. A semiconductor package , comprising:a substrate comprising a substrate top side and a substrate bottom side;a semiconductor component comprising a component top side, a component bottom side coupled to the substrate top side, and a component sidewall between the component top side and the component bottom side;an internal heat distribution layer comprising an internal heat distribution layer top side, an internal heat distribution layer bottom side thermally coupled to the component top side, and an internal heat distribution layer sidewall between the internal heat distribution layer top side and the internal heat distribution layer bottom side;an encapsulant comprising an encapsulant top side, an encapsulant bottom side covering portions of the substrate top side, and an encapsulant sidewall between the encapsulant top side and the encapsulant bottom side, wherein the encapsulant encapsulates the semiconductor component; and traverses and contacts the encapsulant sidewall;', 'traverses the component sidewall; and', 'contacts the internal heat ...

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16-08-2018 дата публикации

Semiconductor device and manufacturing method thereof

Номер: US20180233641A1
Принадлежит: Amkor Technology Inc

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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01-08-2019 дата публикации

Semiconductor device with tiered pillar and manufacturing method thereof

Номер: US20190237343A1
Принадлежит: Amkor Technology Inc

A semiconductor device having one or more tiered pillars and methods of manufacturing such a semiconductor device are disclosed. The semiconductor device may include redistribution layers, a semiconductor die, and a plurality of interconnection structures that operatively couple a bottom surface of the semiconductor die to the redistribution layers. The semiconductor device may further include one or more conductive pillars about a periphery of the semiconductor die. The one or more conductive pillars may be electrically connected to the redistribution layers and may each comprise a plurality of stacked tiers.

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09-09-2021 дата публикации

SEMICONDUCTOR PRODUCT WITH INTERLOCKING METAL-TO-METAL BONDS AND METHOD FOR MANUFACTURING THEREOF

Номер: US20210280542A1
Принадлежит:

A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding. 120-. (canceled)21. A method of manufacturing an electronic device , the method comprising: an upper substrate; and', 'an upper metal contact structure (UMCS) that comprises a metal, the upper metal contact structure (UMCS) comprising an upper UMCS side coupled to the upper substrate, and a lower UMCS side;, 'providing an upper assembly comprising a lower substrate; and', 'a lower metal contact structure (LMCS) comprising the metal, the lower metal contact structure (LMCS) comprising a lower LMCS side coupled to the lower substrate, and an upper LMCS side; and, 'providing a lower assembly comprising positioning the upper assembly directly on the lower assembly, such that there is a vertical gap between the lower UMCS side and the upper LMCS side; and', 'after said positioning, reducing or eliminating the vertical gap by, at least in part, applying heat to the upper and lower assemblies., 'forming a metal-to-metal solderless bond between the lower UMCS side and the upper LMCS side, said forming comprising22. The method of claim 21 , wherein a portion of the vertical gap is directly above a center of the upper LMCS side.23. The method of claim 21 , wherein a portion of the vertical gap is directly above a peripheral edge of the upper LMCS side.24. The method of claim 21 , wherein the upper metal contact structure (UMCS) comprises a UMCS lateral width claim 21 , and the lower metal contact structure (LMCS) comprises an LMCS lateral width that is greater than the UMCS lateral width.25. The method of claim 21 , wherein:the upper assembly comprises a UMCS oxide layer that laterally surrounds the upper metal contact structure (UMCS); andthe lower assembly comprises an LMCS oxide layer that laterally ...

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06-08-2020 дата публикации

Method of manufacturing an electronic device and electronic device manufactured thereby

Номер: US20200251354A1

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.

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27-09-2018 дата публикации

SEMICONDUCTOR DEVICE WITH TIERED PILLAR AND MANUFACTURING METHOD THEREOF

Номер: US20180277394A1
Принадлежит:

A semiconductor device having one or more tiered pillars and methods of manufacturing such a semiconductor device are disclosed. The semiconductor device may include redistribution layers, a semiconductor die, and a plurality of interconnection structures that operatively couple a bottom surface of the semiconductor die to the redistribution layers. The semiconductor device may further include one or more conductive pillars about a periphery of the semiconductor die. The one or more conductive pillars may be electrically connected to the redistribution layers and may each comprise a plurality of stacked tiers. 1. A method of manufacturing a semiconductor device , the method comprising:electrically connecting a semiconductor die to an interposer, the semiconductor die having a top surface, a bottom surface, and one or more side surfaces adjoining the top surface to the bottom surface;forming a first tier of a conductive pillar such that the first tier is peripherally beyond the one or more side surfaces of the semiconductor die and the first tier is electrically connected to the interposer; andforming a second tier of the conductive pillar such that the second tier is on and electrically connected to the first tier of the pillar.2. The method of claim 1 , further comprising forming another interposer on and electrically connected to the second tier of the conductive pillar.3. The method of claim 2 , further comprising electrically attaching another semiconductor device to the other interposer.4. The method of claim 1 , further comprising forming a conductive interconnection structure on the interposer.5. The method of claim 1 , wherein said electrically connecting the semiconductor die to the interposer comprises attaching micro bumps of the semiconductor to micro pads of the interposer.6. The method of claim 5 , further comprising filling a region between the bottom surface of the semiconductor die and the interposer with an underfill material.7. The method of claim ...

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17-09-2020 дата публикации

Semiconductor device with tiered pillar and manufacturing method thereof

Номер: US20200294815A1

A semiconductor device having one or more tiered pillars and methods of manufacturing such a semiconductor device are disclosed. The semiconductor device may include redistribution layers, a semiconductor die, and a plurality of interconnection structures that operatively couple a bottom surface of the semiconductor die to the redistribution layers. The semiconductor device may further include one or more conductive pillars about a periphery of the semiconductor die. The one or more conductive pillars may be electrically connected to the redistribution layers and may each comprise a plurality of stacked tiers.

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25-10-2018 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20180308712A1
Принадлежит:

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias. 120-. (canceled)21. A method of manufacturing a semiconductor package , the method comprising: a carrier; and', 'an S1 dielectric layer directly on the carrier,', 'wherein the first structure comprises a first S1 side facing away from the carrier, a second S1 side opposite the first S1 side and at least one lateral S1 side that extends between the first S1 side and the second S1 side;, 'providing a first structure (S1) comprising an SDS dielectric layer; and', 'an SDS conductive layer that laterally routes electrical signals;, 'forming a signal distribution structure (SDS) on a first side of the first structure, the signal distribution structure comprisingafter said forming a signal distribution interposer structure, removing the carrier; andattaching a semiconductor die to a side of the signal distribution structure from which the carrier was removed.22. The method of claim 21 , wherein said attaching the semiconductor die to the side of the signal distribution structure comprises claim 21 , after said removing the carrier claim 21 , attaching the semiconductor die directly to the side of the signal distribution structure.23. The method of claim 21 , wherein said forming the signal distribution structure comprises sequentially forming the SDS conductive layer and the SDS dielectric layer after said providing the first structure.24. The method of claim 21 , wherein the first S1 dielectric layer of the provided first structure has no apertures.251. The method of claim claim 21 , wherein the signal distribution structure is TSV-less.261. The method of claim claim 21 , wherein the carrier comprises glass.27. A method of manufacturing a ...

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03-10-2019 дата публикации

ELECTRONIC DEVICE WITH ADAPTIVE VERTICAL INTERCONNECT AND FABRICATING METHOD THEREOF

Номер: US20190304807A1
Принадлежит:

Electronic components and an electronic device comprising one or more of the electronic components, and a method of manufacturing the electronic components and an electronic device comprising one or more of the electronic components. As non-limiting examples, various aspects of this disclosure provide vertical interconnect components and various other vertical electronic components, and a method of manufacturing thereof, and an electronic device comprising one or more of the vertical interconnect components and various other vertical electronic components, and a method of manufacturing thereof. 1. A method of manufacturing an electronic device , the method comprising: a first molded layer;', 'a component conductive layer on a first side of the first molded layer; and', 'a second molded layer on the first side of the first molded layer and on the component conductive layer;, 'receiving a first component, the first component comprisingmounting a bottom side of a semiconductor die to a top side of a substrate;mounting the first component to the top side of the substrate such that the first side of the first molded layer faces laterally; andforming a molded package layer comprising a molding compound, wherein the molding compound comprises a bottom side that covers at least a portion of the top side of the substrate, and the molding compound covers at least a portion of lateral sides of the semiconductor die, and at least a portion of the first and second molded layers of the first component.2. The method of claim 1 , further comprising removing the substrate.3. The method of claim 1 , further comprising forming a signal distribution structure (SDS) over at least the molding compound claim 1 , the semiconductor die claim 1 , and the first component.4. The method of claim 3 , wherein the signal distribution structure comprises an SDS conductive layer that electrically connects a die pad of the semiconductor die to a first end of the component conductive layer.5. The ...

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08-10-2020 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20200321222A1
Принадлежит:

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias. 120-. (canceled)21. A method of manufacturing a semiconductor package , the method comprising:{'b': '1', 'claim-text': a carrier; and', {'b': '1', 'an S dielectric layer directly on the carrier,'}, {'b': 1', '1', '1, 'wherein the first structure comprises a first S side facing away from the carrier, and a second S side opposite the first S side;'}], 'providing a first structure (S) comprising{'b': 1', '1', '1', '1, 'forming a first signal distribution structure (SDS) on the first S side by, at least in part, sequentially forming a first plurality of layers of the first signal distribution structure on the first S side in a first direction, the first plurality of layers comprising a first SDS conductive layer that laterally routes electrical signals;'}after said forming the first signal distribution structure, removing the carrier from the first structure;coupling a semiconductor die to the first signal distribution structure in the first direction; and{'b': 2', '2, 'after said coupling the semiconductor die and said removing the carrier from the first structure, forming a second signal distribution structure (SDS) on the first signal distribution structure by, at least in part, sequentially forming a second plurality of layers of the second signal distribution structure in a second direction opposite the first direction, the second signal distribution structure comprising a first SDS conductive layer that laterally distributes electrical signals.'}2211. The method of claim 21 , wherein said forming the first signal distribution structure on the first S side comprises claim 21 , after said providing the first structure claim 21 , forming the ...

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22-10-2020 дата публикации

STACKABLE VIA PACKAGE AND METHOD

Номер: US20200337152A1
Принадлежит:

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A Подробнее

07-12-2017 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20170352613A1
Принадлежит:

An electronic device and a method of manufacturing an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing metal studs to further set a semiconductor die into the encapsulant. 1. A semiconductor device comprising:a semiconductor die having a top die side, a bottom die side comprising a bond pad, and lateral die sides between the top and bottom die sides;a dielectric layer (DL) having a top DL side coupled to the bottom die side, a bottom DL side, and lateral DL sides between the top and bottom DL sides;a metal post having a top post side attached to the bond pad, a bottom post side, and a lateral post surface between the top and bottom post sides, where the metal post extends vertically through the dielectric layer from the bond pad to the bottom DL side; andan encapsulating material contacting and surrounding the lateral die sides and the lateral DL sides, the encapsulating material having a top encapsulant side, a bottom encapsulant side, and lateral encapsulant sides between the top and bottom encapsulant sides.2. The semiconductor device of claim 1 , comprising a fan-out redistribution (RD) structure coupled to the bottom DL side and the bottom encapsulant side claim 1 , and connected to the bottom post side.3. The semiconductor device of claim 2 , wherein the fan-out RD structure comprises multiple layers of lateral signal routing.4. The semiconductor device of claim 2 , wherein the volume between the semiconductor die and the RD structure is free of lateral signal routing.5. The semiconductor device of claim 1 , wherein the bottom post side is coplanar with the bottom DL side and the bottom encapsulant side.6. The semiconductor device of claim 5 , comprising a redistribution (RD) structure comprising a first conductive layer claim 5 , a top surface of which is connected directly to the bottom post side and ...

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24-05-2005 дата публикации

Fully-molded leadframe stand-off feature

Номер: US6897550B1
Принадлежит: Amkor Technology Inc

A memory card comprising a leadframe having at least one die pad, a plurality of contacts, and a plurality of conductive traces extending from respective ones of the contacts toward the die pad. The traces are bent in a manner wherein the die pad and the contacts extend along respective ones of spaced, generally parallel frame planes. Disposed on and extending from the die pad and the traces is a plurality of stand-offs. At least one semiconductor die is attached to the die pad and electrically connected to at least one of the traces. A body at least partially encapsulates the leadframe and the semiconductor die such that the contacts are exposed in a bottom surface defined by the body.

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14-02-2006 дата публикации

Front edge chamfer feature for fully-molded memory cards

Номер: US6998702B1
Принадлежит: Amkor Technology Inc

A memory card comprising a leadframe having a plurality of contacts. Electrically connected to the leadframe is at least one semiconductor die. A body at least partially encapsulates the leadframe and includes opposed top and bottom surfaces, an opposed pair of longitudinal sides, and an opposed pair of lateral sides. Each of the contacts of the leadframe is exposed in the bottom surface of the body and includes a chamfer portion which extends to one of the lateral sides thereof.

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28-08-2018 дата публикации

Encapsulated semiconductor package and method of manufacturing thereof

Номер: US10062611B2
Принадлежит: Amkor Technology Inc

Encapsulated semiconductor packages and methods of production thereof. As a non-limiting example, a semiconductor package may be produced by partially dicing a wafer, molding the partially diced wafer, and completely dicing the molded and partially diced wafer.

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11-07-2023 дата публикации

Stackable via package and method

Номер: US11700692B2

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

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28-01-2020 дата публикации

Stackable via package and method

Номер: US10548221B1

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<½×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

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06-09-2022 дата публикации

Semiconductor device with transmissive layer and manufacturing method thereof

Номер: US11437552B2

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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17-07-2012 дата публикации

Stackable via package and method

Номер: US8222538B1
Принадлежит: Amkor Technology Inc

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C< ½ ×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

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02-04-2024 дата публикации

Semiconductor device and manufacturing method thereof

Номер: US11948808B2

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

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26-03-2024 дата публикации

Semiconductor device with transmissive layer and manufacturing method thereof

Номер: US11942581B2

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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13-02-2024 дата публикации

Semiconductor device with integrated heat distribution and manufacturing method thereof

Номер: US11901343B2

A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die.

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11-11-2019 дата публикации

具有互鎖的金屬至金屬接合的半導體產物及製造其之方法

Номер: TWI677064B

本揭示內容提供一種用於在電子裝置中實施金屬至金屬接合的結構及方法。舉例來說,而且沒有任何限制意義,本揭示內容的各項觀點提供一種運用被配置成用以增強金屬至金屬接合的互鎖結構的結構及方法。

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21-11-2023 дата публикации

Method of manufacturing an electronic device and electronic device manufactured thereby

Номер: US11823913B2

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.

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02-11-2023 дата публикации

Stackable via package and method

Номер: US20230354523A1

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

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09-03-2023 дата публикации

Semiconductor device with optically-transmissive layer and manufacturing method thereof

Номер: US20230074157A1

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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14-03-2024 дата публикации

Method of manufacturing an electronic device and electronic device manufactured thereby

Номер: US20240087914A1

An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material.

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18-06-2024 дата публикации

Semiconductor product with interlocking metal-to-metal bonds and method for manufacturing thereof

Номер: US12015000B2

A structure and method for performing metal-to-metal bonding in an electrical device. For example and without limitation, various aspects of this disclosure provide a structure and method that utilize an interlocking structure configured to enhance metal-to-metal bonding.

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18-08-2020 дата публикации

Semiconductor device with tiered pillar and manufacturing method thereof

Номер: US10748786B2
Принадлежит: Amkor Technology Inc

A semiconductor device having one or more tiered pillars and methods of manufacturing such a semiconductor device are disclosed. The semiconductor device may include redistribution layers, a semiconductor die, and a plurality of interconnection structures that operatively couple a bottom surface of the semiconductor die to the redistribution layers. The semiconductor device may further include one or more conductive pillars about a periphery of the semiconductor die. The one or more conductive pillars may be electrically connected to the redistribution layers and may each comprise a plurality of stacked tiers.

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09-07-2024 дата публикации

Stackable via package and method

Номер: US12035472B2

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

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29-08-2024 дата публикации

Semiconductor device with integrated heat distribution and manufacturing method thereof

Номер: US20240290761A1

A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die.

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03-10-2024 дата публикации

Semiconductor device and manufacturing method thereof

Номер: US20240332032A1

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

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01-05-2018 дата публикации

Semiconductor device and manufacturing method thereof

Номер: US09960328B2
Принадлежит: Amkor Technology Inc

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.

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08-08-2017 дата публикации

Stackable via package and method

Номер: US09730327B1
Принадлежит: Amkor Technology Inc

A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

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