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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Применить Всего найдено 16553. Отображено 100.
05-01-2012 дата публикации

Method for fabricating semiconductor thin film using substrate irradiated with focused light, apparatus for fabricating semiconductor thin film using substrate irradiated with focused light, method for selectively growing semiconductor thin film using substrate irradiated with focused light, and semiconductor element using substrate irradiated with focused light

Номер: US20120001302A1
Автор: Hisashi Matsumura, Kazuyoshi Itoh, Shunro Fuke, Yasuo Kanematsu
Принадлежит: Osaka University NUC

An apparatus ( 100 ) for fabricating a semiconductor thin film includes: substrate surface pretreatment means ( 101 ) for pretreating a surface of a substrate; organic layer coating means ( 102 ) for coating, with an organic layer, the substrate thus pretreated; focused light irradiation means ( 103 ) for irradiating, with focused light, the substrate coated with the organic layer, and for forming a growth-mask layer while controlling layer thickness; first thin film growth means ( 104 ) for selectively growing a semiconductor thin film over an area around the growth-mask layer; substrate surface treatment means ( 105 ) for, after exposing the surface of the substrate by removing the growth-mask layer, modifying the exposed surface of the substrate; and second thin film growth means ( 106 ) for further growing the semiconductor thin film and growing a semiconductor thin film over the modified surface of the substrate.

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Номер записи: 1
05-01-2012 дата публикации

Vapor-phase process apparatus, vapor-phase process method, and substrate

Номер: US20120003142A1
Автор: Eiryo Takasuka, Masaki Ueno, Toshio Ueda, Toshiyuki Kuramoto
Принадлежит: Sumitomo Electric Industries Ltd

A vapor-phase process apparatus and a vapor-phase process method capable of satisfactorily maintaining quality of processes even when different types of processes are performed are obtained. A vapor-phase process apparatus includes a process chamber, gas supply ports serving as a plurality of gas introduction portions, and a gas supply portion (a gas supply member, a pipe, a flow rate control device, a pipe, and a buffer chamber). The process chamber allows flow of a reaction gas therein. The plurality of gas supply ports are formed in a wall surface (upper wall) of the process chamber along a direction of flow of the reaction gas. The gas supply portion can supply a gas into the process chamber at a different flow rate from each of one gas supply port and another gas supply port different from that one gas supply port among the plurality of gas supply ports.

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Номер записи: 2
19-01-2012 дата публикации

Semiconductor light emitting device and method for manufacturing same

Номер: US20120012814A1
Автор: Hajime Nago, Koichi Tachibana, Shinya Nunoue, Tomonari SHIODA, Toshiki Hikosaka, Yoshiyuki Harada
Принадлежит: Toshiba Corp

According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.

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Номер записи: 3
02-02-2012 дата публикации

Method for fabricating group iii-nitride semiconductor

Номер: US20120028446A1
Автор: Hao-Chung Kuo, Ming-Hua Lo, Yuh-Jen Cheng
Принадлежит: Individual

A method of fabricating a group III-nitride semiconductor includes the following steps of forming a first patterned mask layer with a plurality of first openings deposited on an epitaxial substrate; epitaxially growing a group III-nitride semiconductor layer over the epitaxial substrate and covering at least part of the first patterned mask layer; etching the group III-nitride semiconductor layer to form a plurality of second openings, which are substantially at least partially aligned with the first openings; and epitaxially growing the group III-nitride semiconductor layer again.

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Номер записи: 4
23-02-2012 дата публикации

Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device

Номер: US20120043645A1
Автор: Hidenori Mikami, Keiji Ishibashi, Naoki Matsumoto
Принадлежит: Sumitomo Electric Industries Ltd

A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 μm-10 μm thick edge process-induced degradation layer.

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Номер записи: 5
22-03-2012 дата публикации

High-Purity Tellurium Dioxide Single Crystal and Manufacturing Method Thereof

Номер: US20120070366A1
Автор: Guoging Wu, Hanbin Zhao, Linyao Tang, Lizhen Gu, Xueji Yin, Yong Zhu, Zengwei Ge
Принадлежит: RESEARCH AND DEVELOPEMENT CENTER SHANGHAI INSTITUTE OF CERAMICS, Shanghai Institute of Ceramics of CAS

A high-purity tellurium dioxide (TeO 2 ) single crystal and its manufacturing method are provided. The method comprises the following procedures: firstly performing a first single crystal growth, and then dissolving the resulting single crystal again, thereafter adding a precipitation agent to form powder, and finally performing a second single crystal growth of as-prepared powder to obtain the high purity single crystal. The TeO 2 single crystal prepared according to present invention is of high purity, especially with a content of radioactive impurities such as U and Th decreased to a level of 10 −13 g/g.

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Номер записи: 6
22-03-2012 дата публикации

Method for fabricating wafer product and method for fabricating gallium nitride based semiconductor optical device

Номер: US20120070929A1
Автор: Hideaki Nakahata, Katsushi Akita, Kensaku Motoki, Shin Hashimoto, Shinsuke Fujiwara
Принадлежит: Koha Co Ltd, Sumitomo Electric Industries Ltd

Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S 105 , a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11 a of a gallium oxide substrate 11 . After the growth of the buffer layer 13 , while supplying a gas G 2 , which contains hydrogen and nitrogen, into a growth reactor 10 , the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.

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Номер записи: 7
12-04-2012 дата публикации

Heterogeneous substrate, nitride-based semiconductor device using same, and manufacturing method thereof

Номер: US20120086017A1
Автор: Hyung Do YOON, Jae Hyoun Park, Kwang Hyeon BAIK, Sung Min Hwang, Yong Gon SEO
Принадлежит: KOREA ELECTRONICS TECHNOLOGY INSTITUTE

Provided are a heterogeneous substrate, a nitride-based semiconductor device using the same, and a manufacturing method thereof to form a high-quality non-polar or semi-polar nitride layer on a non-polar or semi-polar plane of the heterogeneous substrate by adjusting a crystal growth mode. A base substrate having one of a non-polar plane and a semi-polar plane is prepared, and a nitride-based nucleation layer is formed on the plane of the base substrate. A first buffer layer is grown faster in the vertical direction than in the lateral direction on the nucleation layer. A lateral growth layer is grown faster in the lateral direction than in the vertical direction on the first buffer layer. A second buffer layer is formed on the lateral growth layer. A silicon nitride layer having a plurality of holes may be formed between the lateral growth layer on the first buffer layer and the second buffer layer.

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Номер записи: 8
19-04-2012 дата публикации

Low-temperature synthesis of colloidal nanocrystals

Номер: US20120090533A1
Автор: Jacqueline T. Siy, Michael H. Bartl
Принадлежит: University of Utah Research Foundation UURF

Low-temperature organometallic nucleation and crystallization-based synthesis methods for the fabrication of semiconductor and metal colloidal nanocrystals with narrow size distributions and tunable, size- and shape-dependent electronic and optical properties. Methods include (1) forming a reaction mixture in a reaction vessel under an inert atmosphere that includes at least one solvent, a cationic precursor, an anionic precursor, and at least a first surface stabilizing ligand while stirring at a temperature in a range from about 50° C. to about 130° C. and (2) growing nanocrystals in the reaction mixture for a period of time while maintaining the temperature, the stirring, and the inert-gas atmosphere.

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Номер записи: 9
19-04-2012 дата публикации

IN-SITU DEFECT REDUCTION TECHNIQUES FOR NONPOLAR AND SEMIPOLAR (Al, Ga, In)N

Номер: US20120091467A1
Автор: Arpan Chakraborty, James S. Speck, Kwang-Choong Kim, Steven P. DenBaars, Umesh K. Mishra
Принадлежит: UNIVERSITY OF CALIFORNIA

A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiN x ) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiN x nanomask layer.

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Номер записи: 10
03-05-2012 дата публикации

Group iii nitride semiconductor element and epitaxial wafer

Номер: US20120104433A1
Автор: Fumitake Nakanishi, Masaki Ueno, Yohei Enya, Yusuke Yoshizumi
Принадлежит: Sumitomo Electric Industries Ltd

A primary surface 23 a of a supporting base 23 of a light-emitting diode 21 a tilts by an off-angle of 10 degrees or more and less than 80 degrees from the c-plane. A semiconductor stack 25 a includes an active layer having an emission peak in a wavelength range from 400 nm to 550 nm. The tilt angle “A” between the (0001) plane (the reference plane S R3 shown in FIG. 5 ) of the GaN supporting base and the (0001) plane of a buffer layer 33 a is 0.05 degree or more and 2 degrees or less. The tilt angle “B” between the (0001) plane of the GaN supporting base (the reference plane S R4 shown in FIG. 5 ) and the (0001) plane of a well layer 37 a is 0.05 degree or more and 2 degrees or less. The tilt angles “A” and “B” are formed in respective directions opposite to each other with reference to the c-plane of the GaN supporting base.

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Номер записи: 11
03-05-2012 дата публикации

Iii nitride semiconductor substrate, epitaxial substrate, and semiconductor device

Номер: US20120104558A1
Автор: Keiji Ishibashi
Принадлежит: Sumitomo Electric Industries Ltd

In a semiconductor device 100 , it is possible to prevent C from piling up at a boundary face between an epitaxial layer 22 and a group III nitride semiconductor substrate 10 by the presence of 30×10 10 pieces/cm 2 to 2000×10 10 pieces/cm 2 of sulfide in terms of S and 2 at % to 20 at % of oxide in terms of O in a surface layer 12 . By thus preventing C from piling up, a high-resistivity layer is prevented from being formed on the boundary face between the epitaxial layer 22 and the group III nitride semiconductor substrate 10 . Accordingly, it is possible to reduce electrical resistance at the boundary face between the epitaxial layer 22 and the group III nitride semiconductor substrate 10 , and improve the crystal quality of the epitaxial layer 22 . Consequently, it is possible to improve the emission intensity and yield of the semiconductor device 100.

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Номер записи: 12
10-05-2012 дата публикации

Generating and detecting radiation

Номер: US20120113417A1
Автор: Alexander Giles Davies, Christopher Wood, David Graham Moodie, Edmund Linfield, John Cunningham, Michael James Robertson, Paul John Cannard, Xin Chen
Принадлежит: Individual

A method of generating radiation comprises: manufacturing a structure comprising a substrate supporting a layer of InGaAs, InGaAsP, or InGaAlAs material doped with a dopant, said manufacturing comprising growing said layer such that said dopant is incorporated in said layer during growth of the layer; illuminating a portion of a surface of the structure with radiation having photon energies greater than or equal to a band gap of the doped InGaAs, InGaAsP, or InGaAlAs material so as to create electron-hole pairs in the layer of doped material; and accelerating the electrons and holes of said pairs with an electric field so as to generate radiation. In certain embodiments the dopant is Fe. Corresponding radiation detecting apparatus, spectroscopy systems, and antennas are described.

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Номер записи: 13
07-06-2012 дата публикации

High pressure chemical vapor deposition apparatuses, methods, and compositions produced therewith

Номер: US20120138952A1
Автор: Nikolaus Dietz
Принадлежит: Georgia State University Research Foundation Inc

A composition, reactor apparatus, method, and control system for growing epitaxial layers of group III-nitride alloys. Super-atmospheric pressure is used as a process parameter to control the epitaxial layer growth where the identity of alloy layers differ within a heterostructure stack of two or more layers.

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Номер записи: 14
07-06-2012 дата публикации

Compound semiconductor device and method of manufacturing the same

Номер: US20120138956A1
Автор: Atsushi Yamada, Kenji Imanishi, Sanae Shimizu, Toyoo Miyajima
Принадлежит: Fujitsu Ltd

A compound semiconductor device includes: a substrate; an electron transit layer formed over the substrate; an electron supply layer formed over the electron transit layer; and a buffer layer formed between the substrate and the electron transit layer and including Al x Ga 1-x N(0≦x≦1), wherein the x value represents a plurality of maximums and a plurality of minimums in the direction of the thickness of the buffer layer, and the variation of x in any area having a 1 nm thickness in the buffer layer is 0.5 or less.

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Номер записи: 15
14-06-2012 дата публикации

Quaternary chalcogenide wafers

Номер: US20120145970A1
Автор: Alex Sergey Ionkin, Brian M. Fish
Принадлежит: EI Du Pont de Nemours and Co

Disclosed herein are processes for making quaternary chalcogenide wafers. The process comprises heating a mixture of quaternary chalcogenide crystals and flux and then cooling the mixture to form a solidified mixture comprising ingots of quaternary chalcogenide and flux. The process also comprises isolating one or more ingots of quaternary chalcogenide from the solidified mixture and mounting at least one ingot in a polymer binder to form a quaternary chalcogenide-polymer composite. The process also comprises optionally slicing the quaternary chalcogenide-polymer composite to form one or more quaternary chalcogenide-polymer composite wafers. The quaternary chalcogenide wafers are useful for forming solar cells.

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Номер записи: 16
21-06-2012 дата публикации

Semiconductor Device And Method Of Manufacturing The Same

Номер: US20120153261A1
Автор: Hyun-gi Hong, Jun-Youn Kim, Su-hee Chae, Young-jo Tak
Принадлежит: SAMSUNG ELECTRONICS CO LTD

Example embodiments relate to a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device may include a pre-seeding layer and a nucleation layer. The pre-seeding layer may include a first material for pre-seeding and a second material for masking so as to reduce tensile stress.

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Номер записи: 17
28-06-2012 дата публикации

Epitaxial substrate and method for manufacturing epitaxial substrate

Номер: US20120161152A1
Автор: Makoto Miyoshi, Mikiya Ichimura, Mitsuhiro Tanaka, Shigeaki Sumiya, Sota Maehara
Принадлежит: NGK Insulators Ltd

Provided is a crack-free epitaxial substrate having a small amount of warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes a (111) single crystal Si substrate, a buffer layer, and a crystal layer. The buffer layer is formed of a first lamination unit and a second lamination unit being alternately laminated. The first lamination unit includes a composition modulation layer and a first intermediate layer. The composition modulation layer is formed of a first unit layer and a second unit layer having different compositions being alternately and repeatedly laminated so that a compressive strain exists therein. The first intermediate layer enhances the compressive strain existing in the composition modulation layer. The second lamination unit is a second intermediate layer that is substantially strain-free.

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Номер записи: 18
05-07-2012 дата публикации

Light emitting diode chip and method for manufacturing the same

Номер: US20120168797A1
Автор: Po-Min Tu, Shih-Cheng Huang
Принадлежит: Advanced Optoelectronic Technology Inc

A method for manufacturing a light emitting diode chip, comprising steps: providing a substrate with a first patterned blocking layer formed thereon; growing a first n-type semiconductor layer on the substrate between the constituting parts of first patterned blocking layer, and stopping the growth of the first n-type semiconductor layer before the first n-type semiconductor layer completely covers the first patterned blocking layer; removing the first patterned blocking layer, whereby a plurality of first holes are formed at position where the first patterned blocking layer is originally existed; continuing the growth of the first n-type semiconductor layer until the first holes are completely covered by the first n-type semiconductor layer; and forming an active layer and a p-type current blocking layer on the first n-type semiconductor layer successively.

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Номер записи: 19
26-07-2012 дата публикации

Semiconductor Device

Номер: US20120187374A1
Автор: Jae-won Lee, Jun-Youn Kim, Young-jo Tak
Принадлежит: SAMSUNG ELECTRONICS CO LTD

According to example embodiments, a semiconductor device includes a first layer and second layer. The first layer includes a nitride semiconductor doped with a first type dopant. The second layer is below the first layer and includes a high concentration layer. The high concentration layer includes the nitride semiconductor doped with the first type dopant and has a doping concentration higher than a doping concentration of the first layer.

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Номер записи: 20
26-07-2012 дата публикации

Method for lift-off of light-emitting diode substrate

Номер: US20120190148A1
Автор: Jiansen Zheng, Jyh-Chiarng Wu, Kang-Wei Peng, Kechuang Lin, Sheng-Hsien Hsu, Su-Hui Lin
Принадлежит: Xiamen Sanan Optoelectronics Technology Co Ltd

The present invention discloses a method for lift-off of an LED substrate. By eroding the sidewall of a GaN epitaxial layer, cavity structures are formed, which may act in cooperation with a non-fully filled patterned sapphire substrate from epitaxial growth to cause the GaN epitaxial layer to separate from the sapphire substrate. The method according to an embodiment of the present invention can effectively reduce the dislocation density in the growth of a GaN-based epitaxial layer; improve lattice quality, and realize rapid lift-off of an LED substrate, and has the advantages including low cost, no internal damage to the GaN film, elevated performance of the photoelectric device and improved luminous efficiency.

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Номер записи: 21
26-07-2012 дата публикации

Method for making gallium nitride substrate

Номер: US20120190172A1
Автор: Jian-Shihn Tsang
Принадлежит: Hon Hai Precision Industry Co Ltd

A method for making a GaN substrate for growth of nitride semiconductor is provided. The method first provides a GaN single crystal substrate. Then an ion implanting layer is formed inside the GaN single crystal substrate, which divides the GaN single crystal substrate into a first section and a second section. After that, the GaN single crystal substrate is connected with an assistant substrate through a connecting layer. Thereafter, the GaN single crystal substrate is heated whereby the ion implanting layer is decompounded. Finally, the second section is separated from the first section. The first section left on a surface of the assistant substrate is provided for growth of nitride semiconductor thereon.

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Номер записи: 22
09-08-2012 дата публикации

Method for Growth of Indium-Containing Nitride Films

Номер: US20120199952A1
Автор: Christiane Poblenz, Mark P. D'Evelyn, Michael R. Krames
Принадлежит: Soraa Inc

A method for growth of indium-containing nitride films is described, particularly a method for fabricating a gallium, indium, and nitrogen containing material. On a substrate having a surface region a material having a first indium-rich concentration is formed, followed by a second thickness of material having a first indium-poor concentration. Then a third thickness of material having a second indium-rich concentration is added to form a sandwiched structure which is thermally processed to cause formation of well-crystallized, relaxed material within a vicinity of a surface region of the sandwich structure.

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Номер записи: 23
30-08-2012 дата публикации

Nitride based light emitting device with excellent crystallinity and brightness and method of manufacturing the same

Номер: US20120217470A1
Автор: JOO Jin, Kun Park
Принадлежит: Semimaterials Co Ltd

Disclosed is a nitride-based light emitting device having an inverse p-n structure in which a p-type nitride layer is first formed on a growth substrate. The light emitting device includes a growth substrate, a powder type seed layer for nitride growth formed on the growth substrate, a p-type nitride layer formed on the seed layer for nitride growth, a light emitting active layer formed on the p-type nitride layer, and an n-type ZnO layer formed on the light emitting active layer. The p-type nitride layer is first formed on the growth layer and the n-type ZnO layer having a relatively low growth temperature is then formed thereon instead of an n-type nitride layer, thereby providing excellent crystallinity and high brightness. A method of manufacturing the same is also disclosed.

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Номер записи: 24
20-09-2012 дата публикации

Production method, production vessel and member for nitride crystal

Номер: US20120237431A1
Автор: Makiko Kiyomi, Toru Ishiguro, Yoshihiko Yamamura, Yuji Kagamitani, Yutaka Mikawa
Принадлежит: Japan Steel Works Ltd, Mitsubishi Chemical Corp, Tohoku University NUC

To provide a production method for a nitride crystal, where a nitride crystal can be prevented from precipitating in a portion other than on a seed crystal and the production efficiency of a gallium nitride single crystal grown on the seed crystal can be enhanced. In a method for producing a nitride crystal by an ammonothermal method in a vessel containing a mineralizer-containing solution, out of the surfaces of said vessel and a member provided in said vessel, at least a part of the portion coming into contact with said solution is constituted by a metal or alloy containing one or more atoms selected from the group consisting of tantalum (Ta), tungsten (W) and titanium (Ti), and has a surface roughness (Ra) of less than 1.80 μm.

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Номер записи: 25
27-09-2012 дата публикации

method for reducing internal mechanical stresses in a semiconductor structure and a low mechanical stress semiconductor structure

Номер: US20120241755A1
Автор: Alexey Romanov, Maxim A. Odnoblyudov, Vladislav E. Bougrov
Принадлежит: Optogan Oy

A semiconductor structure with low mechanical stresses, formed of nitrides of group III metals on a (0001) oriented foreign substrate ( 1 ) and a method for reducing internal mechanical stresses in a semiconductor structure formed of nitrides of group III metals on a (0001) oriented foreign substrate ( 1 ). The method comprises the steps of; growing nitride on the foreign substrate ( 1 ) to form a first nitride layer ( 2 ); patterning the first nitride layer ( 2 ) by selectively removing volumes of it to a predetermined depth from the upper surface of the first nitride layer ( 2 ), for providing relaxation of mechanical stress σ in the remaining portions of the layer between the removed volumes; and growing, on the first nitride layer ( 2 ), additional nitride until a continuous second nitride layer ( 8 ) is formed, the second nitride layer ( 8 ) enclosing voids ( 7 ) from the removed volumes under the second nitride layer ( 8 ) inside the semiconductor structure.

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Номер записи: 26
27-09-2012 дата публикации

Heterostructure for electronic power components, optoelectronic or photovoltaic components

Номер: US20120241821A1
Автор: Chris Werkhoven, Fabrice Letertre, Ionut Radu, Jean-Marc Bethoux, Oleg Kononchuck
Принадлежит: Soitec SA

A heterostructure that includes, successively, a support substrate of a material having an electrical resistivity of less than 10 −3 ohm·cm and a thermal conductivity of greater than 100 W·m −1 ·K −1 , a bonding layer, a first seed layer of a monocrystalline material of composition Al x In y Ga (1-x-y) N, a second seed layer of a monocrystalline material of composition Al x In y Ga (1-x-y) N, and an active layer of a monocrystalline material of composition Al x In y Ga (1-x-y) N, and being present in a thickness of between 3 and 100 micrometers. The materials of the support substrate, the bonding layer and the first seed layer are refractory at a temperature of greater than 750° C., the active layer and second seed layer have a difference in lattice parameter of less than 0.005 Å, the active layer is crack-free, and the heterostructure has a specific contact resistance between the bonding layer and the first seed layer that is less than or equal to 0.1 ohm·cm 2 .

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Номер записи: 27
11-10-2012 дата публикации

Epitaxial growth method and devices

Номер: US20120256191A1
Автор: Anton Devilliers, Erik Byers, Scott Sills
Принадлежит: Individual

Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

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Номер записи: 28
25-10-2012 дата публикации

GaN FILM STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

Номер: US20120267638A1
Автор: Joo-ho Lee, Jun-hee Choi, Mi-Jeong Song, Sang-Hun Lee
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A method of fabricating a gallium nitride (GaN) thin layer structure includes forming a sacrificial layer on a substrate, forming a first buffer layer on the sacrificial layer, forming an electrode layer on the first buffer layer, forming a second buffer layer on the electrode layer, partially etching the sacrificial layer to form at least two support members configured to support the first buffer layer and define at least one air cavity between the substrate and the first buffer layer, and forming a GaN thin layer on the second buffer layer.

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Номер записи: 29
01-11-2012 дата публикации

Epitaxial substrate for electronic device and method of producing the same

Номер: US20120273759A1
Автор: Jo Shimizu, Tetsuya Ikuta, Tomohiko Shibata
Принадлежит: Dowa Electronics Materials Co Ltd

An epitaxial substrate for an electronic device, in which a lateral direction of the substrate is defined as a main current conducting direction and a warp configuration of the epitaxial substrate is adequately controlled, as well as a method of producing the epitaxial substrate. Specifically, the epitaxial substrate for an electron device, including: a Si single crystal substrate; and a Group III nitride laminated body formed by epitaxially growing plural Group III nitride layers on the Si single crystal substrate, wherein a lateral direction of the epitaxial substrate is defined as a main current conducting direction, is characterized in that the Si single crystal substrate is a p-type substrate having a specific resistance value of not larger than 0.01 Ω·cm.

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Номер записи: 30
22-11-2012 дата публикации

Methods For Monitoring Growth Of Semiconductor Layers

Номер: US20120293813A1
Автор: Eric M. Rehder, Matthew Youngers, Peter Rice
Принадлежит: Kopin Corp

Deposition of a thin film is monitored by illuminating the thin film with an incident beam during deposition of the thin film, wherein at least a portion of the incident beam reflects off the thin film to yield a reflected beam; measuring intensity of the reflected beam from the thin film during growth of the thin film to obtain reflectance; and curve-fitting at least part of an oscillation represented by the reflectance data to obtain information about at least one of thickness, growth rate, composition, and doping of the thin film.

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Номер записи: 31
06-12-2012 дата публикации

Nitride semiconductor light emitting element and method for manufacturing the same

Номер: US20120305934A1
Автор: Mayuko Fudeta
Принадлежит: Sharp Corp

A nitride semiconductor light emitting element has: a substrate for growth; an n-type nitride semiconductor layer formed on the substrate for growth; a light emitting layer formed on the n-type nitride semiconductor layer; and a p-type nitride semiconductor layer formed on the light emitting layer, wherein pipe holes are formed at a density of 5000 pipe holes/cm 2 or less, each of which extends substantially vertically from a surface of the n-type nitride semiconductor layer on the light emitting layer side toward the substrate and has a diameter of 2 to 200 nm.

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Номер записи: 32
13-12-2012 дата публикации

Light emitting device

Номер: US20120313110A1
Автор: Tae Yun Kim
Принадлежит: Individual

Disclosed are a light emitting device. A light emitting diode comprises a light emitting device comprises a plurality of N-type semiconductor layers including a first N-type semiconductor layer and a second N-type semiconductor layer on the first N-type semiconductor layer, an active layer on the second N-type semiconductor layer, and a P-type semiconductor layer on the active layer, wherein the first N-type semiconductor layer comprises a Si doped Nitride layer and the second N-type semiconductor layer comprises a Si doped Nitride layer, and wherein the first and second N-type semiconductor layers have a Si impurity concentration different from each other.

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Номер записи: 33
20-12-2012 дата публикации

Method for manufacturing nitride semiconductor device, nitride semiconductor light-emitting device, and light-emitting apparatus

Номер: US20120319162A1
Автор: Masahiko Sakata, Masahiro Araki, Takaaki Utsumi
Принадлежит: Sharp Corp

Provided is a method for manufacturing a nitride semiconductor device, including the steps of: forming an AlNO buffer layer containing at least aluminum, nitrogen, and oxygen on a substrate; and forming a nitride semiconductor layer on the AlNO buffer layer, wherein, in the step of forming the AlNO buffer layer, the AlNO buffer layer is formed by a reactive sputtering method using aluminum as a target in an atmosphere to and from which nitrogen gas and oxygen gas are continuously introduced and exhausted, and the atmosphere is an atmosphere in which a ratio of a flow rate of the oxygen gas to a sum of a flow rate of the nitrogen gas and the flow rate of the oxygen gas is not more than 0.5%.

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Номер записи: 34
20-12-2012 дата публикации

Chemical vapor deposition apparatus

Номер: US20120322168A1
Автор: Evgeny Vladimirovich Yakovlev, Heng Liu
Принадлежит: Individual

System and method for forming one or more materials. The system includes a susceptor component configured to rotate around a central axis, and a showerhead component that is located above the susceptor component and not in direct contact with the susceptor component. Additionally, the system includes one or more substrate holders located on the susceptor component and configured to rotate around the central axis and also rotate around corresponding holder axes respectively, and a central component. Moreover, the system includes one or more first inlets formed within the central component, one or more second inlets, and one or more third inlets formed within the showerhead component and located farther away from the central component than the one or more second inlets.

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Номер записи: 35
03-01-2013 дата публикации

Device and method for producing bulk single crystals

Номер: US20130000552A1
Автор: Jason SCHMITT
Принадлежит: NITRIDE SOLUTIONS Inc

The disclosure provides a device and method used to produce bulk single crystals. In particular, the disclosure provides a device and method used to produce bulk single crystals of a metal compound by an elemental reaction of a metal vapor and a reactant gas by an elemental reaction of a metal vapor and a reactant gas.

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Номер записи: 36
10-01-2013 дата публикации

Methods for depositing thin films comprising gallium nitride by atomic layer deposition

Номер: US20130012003A1
Автор: Antti Niskanen, Suvi Haukka, Viljami J. Pore
Принадлежит: Individual

Atomic layer deposition (ALD) processes for forming thin films comprising GaN are provided. In some embodiments, ALD processes for forming doped GaN thin films are provided. The thin films may find use, for example, in light-emitting diodes.

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Номер записи: 37
17-01-2013 дата публикации

Method for producing a group iii nitride semiconductor light-emitting device

Номер: US20130017639A1
Автор: Shinya Boyama, Yasuhisa Ushida
Принадлежит: Toyoda Gosei Co Ltd

The present invention is a method for producing a light- emitting device whose p contact layer has a p-type conduction and a reduced contact resistance with an electrode. On a p cladding layer, by MOCVD, a first p contact layer of GaN doped with Mg is formed. Subsequently, after lowering the temperature to a growth temperature of a second p contact layer being formed in the subsequent process, which is 700° C., the supply of ammonia is stopped and the carrier gas is switched from hydrogen to nitrogen. Thereby, Mg is activated in the first p contact layer, and the first p contact layer has a p-type conduction. Next, the second p contact layer of InGaN doped with Mg is formed on the first p contact layer by MOCVD using nitrogen as a carrier gas while maintaining the temperature at 700° C. which is the temperature of the previous process.

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Номер записи: 38
24-01-2013 дата публикации

Nitride electronic device and method for manufacturing the same

Номер: US20130020649A1
Автор: Chull Won JU, Eun Soo Nam, Hae Cheon Kim, Ho Kyun Ahn, Jae Kyoung Mun, Jong-Won Lim, Sang Choon KO, Sung Bock Kim, Sung Bum Bae, Woo Jin Chang, Young Rak PARK
Принадлежит: Electronics and Telecommunications Research Institute ETRI

The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.

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Номер записи: 39
24-01-2013 дата публикации

Chemical vapor deposition and method of manufacturing light-emitting device using chemical vapor deposition

Номер: US20130023080A1
Автор: Bum-Joon Kim, Doek-gil Ko, Eui-joon Jeong, Jin-young Lim, Ki-Sung Kim, Young-sun Kim
Принадлежит: SAMSUNG ELECTRONICS CO LTD

A chemical vapor deposition (CVD) method includes forming a first semiconductor layer on a substrate that is mounted on a satellite disk at a first process temperature; and forming a second semiconductor layer on the first semiconductor layer at a second process temperature. Also, a method of manufacturing a light-emitting device (LED) includes: forming a quantum well layer on a substrate that is mounted on a satellite disk at a first process temperature; and forming a quantum barrier layer on the quantum well layer at a second process temperature.

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Номер записи: 40
31-01-2013 дата публикации

GaN BONDED SUBSTRATE AND METHOD OF MANUFACTURING GaN BONDED SUBSTRATE

Номер: US20130029472A1
Автор: Bo Hyun Lee, Bongmo Park, Jun Sung Choi, Kwang Je Woo, Seung Yong Park
Принадлежит: Samsung Corning Precision Materials Co Ltd

A gallium nitride (GaN) bonded substrate and a method of manufacturing a GaN bonded substrate in which a polycrystalline nitride-based substrate is used. The method includes loading a single crystalline GaN substrate and a polycrystalline nitride substrate into a bonder; raising the temperature in the bonder; bonding the single crystalline GaN substrate and the polycrystalline nitride substrate together by pressing the single crystalline GaN substrate and the polycrystalline nitride substrate against each other after the step of raising the temperature; and cooling the resultant bonded substrate.

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Номер записи: 41
21-02-2013 дата публикации

Metal chloride gas generator, hydride vapor phase epitaxy growth apparatus, and nitride semiconductor template

Номер: US20130043442A1
Автор: Hajime Fujikura, Michiko Matsuda, Taichiroo Konno
Принадлежит: Hitachi Cable Ltd

A metal chloride gas generator includes: a tube reactor including a receiving section for receiving a metal on an upstream side, and a growing section in which a growth substrate is placed on a downstream side; a gas inlet pipe arranged to extend from an upstream end with a gas inlet via the receiving section to the growing section, for introducing a gas from the upstream end to supply the gas to the receiving section, and supplying a metal chloride gas produced by a reaction between the gas and the metal in the receiving section to the growing section; and a heat shield plate placed in the reactor to thermally shield the upstream end from the growing section. The gas inlet pipe is bent between the upstream end and the heat shield plate.

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Номер записи: 42
28-02-2013 дата публикации

Deposition methods for the formation of iii/v semiconductor materials, and related structures

Номер: US20130049012A1
Автор: Christophe Figuet, Pierre Tomasini
Принадлежит: Soitec SA

Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.

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Номер записи: 43
07-03-2013 дата публикации

Metal Oxide Semiconductor Films, Structures, and Methods

Номер: US20130056691A1
Автор: Henry W. White, Tae-Seok Lee, Yungryel Ryu
Принадлежит: Moxtronics Inc

Materials and structures for improving the performance of semiconductor devices include ZnBeO alloy materials, ZnCdOSe alloy materials, ZnBeO alloy materials that may contain Mg for lattice matching purposes, and BeO material. The atomic fraction x of Be in the ZnBeO alloy system, namely, Zn 1-x Be x O, can be varied to increase the energy band gap of ZnO to values larger than that of ZnO. The atomic fraction y of Cd and the atomic fraction z of Se in the ZnCdOSe alloy system, namely, Zn 1-y Cd y O 1-z Se z , can be varied to decrease the energy band gap of ZnO to values smaller than that of ZnO. Each alloy formed can be undoped, or p-type or n-type doped, by use of selected dopant elements.

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Номер записи: 44
21-03-2013 дата публикации

Method for growing ii-vi semiconductor crystals and ii-vi semiconductor layers

Номер: US20130068156A1
Автор: Alex Fauler
Принадлежит: Albert Ludwigs Universitaet Freiburg

A method for growing II-VI semiconductor crystals and II-VI semiconductor layers as well as crystals and layers of their ternary or quaternary compounds from the liquid or gas phase is proposed. To this end, the solid starting materials are introduced into a growing chamber for the growing of crystals. Inside the growing chamber, carbon monoxide is supplied by way of reducing agent. At least certain zones of the growing chamber are heated to a temperature at which a first-order phase transition of the starting materials takes place and the starting materials pass into the liquid or gas phase. The starting materials are then cooled down accompanied by the formation of a semiconductor crystal or semiconductor layer, again with a first-order phase transition taking place. The oxygen present in the growing chamber is bound by the carbon monoxide and the formation of an oxide layer at the phase boundary of the growing semiconductor crystal or semiconductor layer is prevented.

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Номер записи: 45
21-03-2013 дата публикации

Nitride semiconductor crystal producing method, nitride semiconductor epitaxial wafer, and nitride semiconductor freestanding substrate

Номер: US20130069075A1
Автор: Hajime Fujikura, Taichiroo Konno, Yuichi Oshima
Принадлежит: Hitachi Cable Ltd

A nitride semiconductor crystal producing method, a nitride semiconductor epitaxial wafer, and a nitride semiconductor freestanding substrate, by which it is possible to suppress the occurrence of cracking in the nitride semiconductor crystal and to ensure the enhancement of the yield of the nitride semiconductor crystal. The nitride semiconductor crystal producing method includes growing a nitride semiconductor crystal over a seed crystal substrate, while applying an etching action to an outer end of the seed crystal substrate during the growing of the nitride semiconductor crystal.

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Номер записи: 46
21-03-2013 дата публикации

Compound semiconductor device and method of manufacturing the same

Номер: US20130069113A1
Автор: Atsushi Yamada
Принадлежит: Fujitsu Ltd

An embodiment of a compound semiconductor device includes: a Si substrate; a Si oxide layer formed over a surface of the Si substrate; a nucleation layer formed over the Si oxide layer, the nucleation layer exposing a part of the Si oxide layer; and a compound semiconductor stacked structure formed over the Si oxide layer and the nucleation layer.

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Номер записи: 47
11-04-2013 дата публикации

Nitride semiconductor wafer, nitride semiconductor device, and method for growing nitride semiconductor crystal

Номер: US20130087762A1
Автор: Hung Hung, Jongil Hwang, Naoharu Sugiyama, Shinya Nunoue, Tomonari SHIODA
Принадлежит: Toshiba Corp

According to one embodiment, a nitride semiconductor wafer includes a silicon substrate, a lower strain relaxation layer provided on the silicon substrate, an intermediate layer provided on the lower strain relaxation layer, an upper strain relaxation layer provided on the intermediate layer, and a functional layer provided on the upper strain relaxation layer. The intermediate layer includes a first lower layer, a first doped layer provided on the first lower layer, and a first upper layer provided on the first doped layer. The first doped layer has a lattice constant larger than or equal to that of the first lower layer and contains an impurity of 1×10 18 cm −3 or more and less than 1×10 21 cm −3 . The first upper layer has a lattice constant larger than or equal to that of the first doped layer and larger than that of the first lower layer.

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Номер записи: 48
11-04-2013 дата публикации

Epitaxial growth substrate, semiconductor device, and epitaxial growth method

Номер: US20130087807A1
Автор: Daisuke Hino, Tetsuya Ikuta, Tomohiko Shibata
Принадлежит: Dowa Electronics Materials Co Ltd

In heteroepitaxially growing a group-III nitride semiconductor on a Si single crystal substrate, the occurrence of cracks initiating in the wafer edge portion can be suppressed. Region A is an outermost peripheral portion outside the principal surface, being a bevel portion tapered. Regions B and C are on the same plane (the principal surface), region B (mirror-surface portion) being the center portion of the principal surface, and region C a region in the principal surface edge portion surrounding region B. The principal surface has a plane orientation, and in region B, is mirror-surface-finished. Region B occupies most of the principal surface of this Si single crystal substrate, and a semiconductor device is manufactured therein. Region C (surface-roughened portion) has a plane orientation as with region B, however, region B is mirror-surface-finished, whereas region C is surface-roughened.

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Номер записи: 49
18-04-2013 дата публикации

EPITAXIAL SUBSTRATE AND METHOD FOR MANUFACTURING EPITAXIAL SUBSTRATE

Номер: US20130092953A1
Автор: ICHIMURA Mikiya, MAEHARA Sota, MIYOSHI Makoto, SUMIYA Shigeaki, TANAKA Mitsuhiro
Принадлежит: NGK Insulators, Ltd.

Provided is a crack-free epitaxial substrate having a small amount of warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes: a (111) single crystal Si substrate and a buffer layer formed of a plurality of lamination units being continuously laminated. The lamination unit includes: a composition modulation layer formed of a first and a second unit layer having different compositions being alternately and repeatedly laminated such that a compressive strain exists therein; a termination layer formed on an uppermost portion of the composition modulation layer, the termination layer acting to maintain the compressive strain existing in the composition modulation layer; and a strain reinforcing layer formed on the termination layer, the strain reinforcing layer acting to enhance the compressive strain existing in the composition modulation layer. 1. An epitaxial substrate in which a group of group-III nitride layers are formed on a base substrate made of (111)-oriented single crystal silicon such that a (0001) crystal plane of said group of group-III nitride layers is substantially in parallel with a substrate surface of said base substrate , said epitaxial substrate comprising:a buffer layer formed of a plurality of lamination units being continuously laminated; anda crystal layer formed on said buffer layer, a composition modulation layer formed of a first unit layer and a second unit layer having different compositions being alternately and repeatedly laminated such that a compressive strain exists therein;', 'a termination layer formed on an uppermost portion of said composition modulation layer, said termination layer acting to maintain said compressive strain existing in said composition modulation layer; and', 'a strain reinforcing layer formed on said termination layer, said strain reinforcing layer acting to enhance said compressive strain existing in said composition modulation layer., 'said lamination unit ...

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Номер записи: 50
18-04-2013 дата публикации

Manufacturing method of solid state light emitting element

Номер: US20130095591A1
Автор: Chang-Chin Yu, Mong-Ea Lin
Принадлежит: Lextar Electronics Corp

A manufacturing method of a solid state light emitting element is provided. A plurality of protrusion structures separated to each other are formed on a first substrate. A buffer layer is formed on the protrusion structures and fills the gaps between protrusion structures. An epitaxial growth layer is formed on the buffer layer to form a first semiconductor stacking structure. The first semiconductor stacking structure is inverted to a second substrate, so that the first semiconductor epitaxial layer and the second substrate are connected to form a second semiconductor stacking structure. The buffer layer is etched by a first etchant solution to form a third semiconductor stacking structure. A second etchant solution is used to permeate through the gaps between the protrusion structures, so that the protrusion structures are etched completely. The first substrate is removed from the third semiconductor stacking structure to form a fourth semiconductor stacking structure.

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Номер записи: 51
18-04-2013 дата публикации

Method Of Manufacturing Gallium Nitride Film

Номер: US20130095641A1
Автор: Boik Park, Byungkyu Chung, Cheolmin Park, Hyun Jong Park, Joon Hoi Kim, Junsung Choi, Junyoung Bae, Seonghwan Shin, Sungkeun Lim, Wonjo Lee
Принадлежит: Samsung Corning Precision Materials Co Ltd

A method of manufacturing a gallium nitride (GaN) film in which defects in a GaN film that grows can be reduced. The method includes the step of growing a GaN nano-rod on a substrate, the nano-rod having a circumferential groove in an outer periphery thereof, and the step of growing a GaN film on the GaN nano-rod.

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Номер записи: 52
25-04-2013 дата публикации

Use of alkaline-earth metals to reduce impurity incorporation into a group-iii nitride crystal grown using the ammonothermal method

Номер: US20130099180A1
Автор: James S. Speck, Paul M. VON DOLLEN, Shuji Nakamura, Siddha Pimputkar
Принадлежит: UNIVERSITY OF CALIFORNIA

Alkaline-earth metals are used to reduce impurity incorporation into a Group-III nitride crystal grown using the ammonothermal method.

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Номер записи: 53
09-05-2013 дата публикации

SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING THE SAME

Номер: US20130112995A1
Автор: Abbondanza Giuseppe
Принадлежит: STMICROELECTRONICS S.R.L.

An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon. 18-. (canceled)9. A semiconductor wafer , comprising:a substrate of monocrystalline silicon;a layer of a material other than monocrystalline silicon disposed over the substrate; anda layer of monocrystalline silicon disposed over the layer of the material.10. The semiconductor wafer of wherein at least one of the substrate claim 9 , the layer of material claim 9 , and the layer of monocrystalline silicon includes a dopant.11. The semiconductor wafer of wherein one of the substrate claim 9 , the layer of material claim 9 , and the layer of monocrystalline silicon is bowed.12. The semiconductor wafer of wherein one of the substrate claim 9 , the layer of material claim 9 , and the layer of monocrystalline silicon has a bow in a range of approximately 20-30 μm.13. The semiconductor wafer of wherein the layer of the material has a thickness in a range of approximately 2-6 μm.14. The semiconductor wafer of wherein the material includes silicon carbide.15. The semiconductor wafer of wherein the material includes monocrystalline silicon carbide.16. The semiconductor wafer of wherein the material includes 3C silicon carbide.17. The semiconductor wafer of wherein the material includes gallium nitride.18. The semiconductor wafer of wherein the layer of monocrystalline silicon has a thickness in a range of approximately 1-3 μm.19. An integrated circuit claim 9 , comprising:a substrate of monocrystalline silicon;a layer of a material other than monocrystalline silicon disposed over the substrate;a layer of monocrystalline silicon disposed over the layer of the material; anda device ...

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Номер записи: 54
16-05-2013 дата публикации

Large area nitride crystal and method for making it

Номер: US20130119401A1
Автор: Derrick S. Kamber, Douglas W. Pocius, James S. Speck, Mark P. D'Evelyn
Принадлежит: Soraa Inc

Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors.

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Номер записи: 55
16-05-2013 дата публикации

NITRIDE COMPOUND SEMICONDUCTOR ELEMENT AND PRODUCTION METHOD THEREFOR

Номер: US20130122693A1
Автор: ANZUE Naomi, HASEGAWA Yoshiaki, YOKOGAWA Toshiya
Принадлежит: Panasonic Corporation

A nitride compound semiconductor element according to the present invention is a nitride compound semiconductor element including a substrate having an upper face and a lower face and a semiconductor multilayer structure supported by the upper face of the substrate such that the substrate and the semiconductor multilayer structure have at least two cleavage planes. At least one cleavage inducing member which is in contact with either one of the two cleavage planes is provided, and a size of the cleavage inducing member along a direction parallel to the cleavage plane is smaller than a size of the upper face of the substrate along the direction parallel to the cleavage plane. 1. A method for fabricating a nitride compound semiconductor device , the method comprising steps of:(a) preparing a flat wafer formed of gallium nitride;(b) forming projections only at intersections of first lines and second lines included in a surface of the flat wafer prepared in the step (a); whereinthe first lines and the second lines are perpendicular to a normal line of the flat wafer;each first line is parallel to other first lines;each second line is parallel to other second lines;each first line is perpendicular to each second line;a part of the projections are disposed periodically in the longitudinal direction of the first lines;another part of the projections are disposed periodically in the longitudinal direction of the second lines;each projection has an area of not less than 50 square micrometers and not more than 1,800 square micrometers;(c) growing a nitride semiconductor stacking structure on the flat wafer where the projections have been formed in the step (b); and(d) cleaving the wafer along the first lines and along the second lines after the step (c), so as to fabricating the nitride compound semiconductor device comprising the cleaved wafer and the nitride semiconductor stacking structure grown thereon.2. The method according to claim 1 , wherein each projection has a ...

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Номер записи: 56
16-05-2013 дата публикации

Semiconductor substrate, semiconductor device, and manufacturing methods thereof

Номер: US20130122694A1
Автор: Sakai Shiro
Принадлежит: Seoul Opto Device Co., Ltd.

Exemplary embodiments of the present invention provide a method of fabricating a semiconductor substrate, the method including growing a first compound semiconductor layer on a first surface of a substrate, etching the first compound semiconductor layer using HF, KOH, or NaOH to roughen a first surface of the first compound semiconductor layer, forming cavities in the first compound semiconductor layer, separating the first compound semiconductor layer from the first surface of the substrate, flattening the first surface of the substrate after separating the first compound semiconductor layer, and growing a second compound semiconductor layer on the flattened first surface of the substrate. 1. A method of fabricating a semiconductor substrate , the method comprising:growing a first compound semiconductor layer on a first surface of a substrate;etching the first compound semiconductor layer using HF, KOH, or NaOH to roughen a first surface of the first compound semiconductor layer;forming cavities in the first compound semiconductor layer;separating the first compound semiconductor layer from the first surface of the substrate;flattening the first surface of the substrate after separating the first compound semiconductor layer; andgrowing a second compound semiconductor layer on the flattened first surface of the substrate.2. The method of claim 1 , wherein the flattening of the first surface of the substrate is performed using a reactive ion etching (RIE) process.3. The method of claim 1 , wherein the forming the cavities comprises removing a patterned layer disposed on the first compound semiconductor layer.4. The method of claim 3 , wherein the patterned layer comprises an oxide region.5. The method of claim 4 , wherein the patterned layer comprises a metallic material.6. The method of claim 1 , wherein the substrate comprises GaN and sapphire.7. The method of claim 6 , further comprising forming a third compound semiconductor layer on the first surface of the ...

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Номер записи: 57
23-05-2013 дата публикации

DIAMOND GaN DEVICES AND ASSOCIATED METHODS

Номер: US20130126903A1
Автор: Sung Chien-Min
Принадлежит:

Semiconductor devices and methods of making thereof are provided. In one aspect, for example, a method for making a semiconductor device can include polishing a working surface of a diamond layer to a substantially flat surface, depositing a buffer layer on the working surface of the diamond layer, and depositing a semiconductor layer on the buffer layer. In one specific aspect, the c-axis of the buffer layer is oriented perpendicular to the working surface of the diamond layer. 1. A method of making a semiconductor device , comprising:polishing a working surface of a diamond layer to a substantially flat surface;depositing a buffer layer on the working surface of the diamond layer; anddepositing a semiconductor layer on the buffer layer.2. The method of claim 1 , wherein the buffer layer c-axis is oriented perpendicular to the working surface of the diamond layer.3. The method of claim 1 , wherein the buffer layer is a member selected from the group consisting of a carbide claim 1 , an oxide claim 1 , a nitride claim 1 , and combinations thereof claim 1 , and wherein the buffer layer is domain matched with the diamond layer.4. The method of claim 1 , wherein the buffer layer is a member selected from the group consisting of TiC claim 1 , ZrC claim 1 , graphene claim 1 , AlN claim 1 , (B claim 1 ,Al)N claim 1 , TiN claim 1 , TaN claim 1 , ZnO claim 1 , NiO claim 1 , and combinations thereof.5. The method of claim 1 , wherein the substantially flat surface has an RA that is from about 1 nm to about 10 nm.6. The method of claim 1 , wherein the diamond layer is a layer of CVD diamond deposited on a silicon substrate.7. The method of claim 1 , wherein the semiconductor layer is a member selected from the group consisting of GaN claim 1 , (B claim 1 ,Al)N claim 1 , AlN claim 1 , and combinations thereof.8. The method of claim 1 , further comprising doping at least one of the diamond layer and the semiconductor layer.9. The method of claim 1 , wherein the diamond layer is ...

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Номер записи: 58
27-06-2013 дата публикации

Semiconductor devices including substrate layers and overlying semiconductor layers having closely matching coefficients of thermal expansion, and related methods

Номер: US20130161637A1
Автор: Chantal Arena, Christiaan J. Werkhoven
Принадлежит: Soitec SA

Embodiments relate to semiconductor structures and methods of forming semiconductor structures. The semiconductor structures include a substrate layer having a CTE that closely matches a CTE of one or more layers of semiconductor material formed over the substrate layer. In some embodiments, the substrate layers may comprise a composite substrate material including two or more elements. The substrate layers may comprise a metal material and/or a ceramic material in some embodiments.

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Номер записи: 59
11-07-2013 дата публикации

GALLIUM NITRIDE-BASED LED FABRICATION WITH PVD-FORMED ALUMINUM NITRIDE BUFFER LAYER

Номер: US20130174781A1
Автор: Agrawal Vivek, NALAMASU Omkaram, Patibandla Nag B., ZHU MINGWEI
Принадлежит:

Fabrication of gallium nitride-based light emitting diodes (LEDs) with physical vapor deposition (PVD) formed aluminum nitride buffer layers is described. 1. A multi-chamber system , comprising:a physical vapor deposition (PVD) chamber having a target comprising aluminum; anda chamber adapted to deposit un-doped or n-type gallium nitride, or both.2. The system of claim 1 , wherein the target of the PVD chamber comprises aluminum nitride.3. The system of claim 1 , wherein the chamber adapted to deposit un-doped or n-type gallium nitride comprises a metal-organic chemical vapor deposition (MOCVD) chamber.4. The system of claim 1 , wherein the chamber adapted to deposit un-doped or n-type gallium nitride comprises a hydride vapor phase epitaxy (HVPE) chamber.5. The system of claim 1 , wherein the PVD chamber and the chamber adapted to deposit un-doped or n-type gallium nitride are included in a cluster tool arrangement.6. The system of claim 1 , wherein the PVD chamber and the chamber adapted to deposit un-doped or n-type gallium nitride are included in an in-line tool arrangement.7. The system of claim 1 , further comprising:a rapid thermal processing (RTP) chamber or a laser annealing chamber.8. A multi-chamber system claim 1 , comprising:a physical vapor deposition (PVD) chamber having a target comprising aluminum;a first metal-organic chemical vapor deposition (MOCVD) chamber to deposit un-doped or n-type gallium nitride;a second MOCVD chamber to deposit a multiple quantum well (MQW) structure; anda third MOCVD chamber to deposit p-type aluminum gallium nitride or p-type gallium nitride, or both.9. The system of claim 8 , wherein the PVD chamber having the aluminum nitride target is for non-reactive sputtering of aluminum nitride.10. The system of claim 9 , wherein the PVD chamber is for non-reactive sputtering of aluminum nitride at a temperature approximately in the range of 20-200 degrees Celsius.11. The system of claim 9 , wherein the PVD chamber is for non- ...

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Номер записи: 60
11-07-2013 дата публикации

COMPOSITE GaN SUBSTRATE, METHOD FOR MANUFACTURING COMPOSITE GaN SUBSTRATE, GROUP III NITRIDE SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR DEVICE

Номер: US20130175543A1
Автор: Kiyama Makoto, Matsubara Hideki, Okahisa Takuji
Принадлежит: Sumitomo Electric Industries, Ltd.

A composite GaN substrate of the present invention includes: a conductive GaN substrate having a specific resistance of less than 1 Ωcm; and a semi-insulative GaN layer disposed on the conductive GaN substrate, having a specific resistance of 1×10Ωcm or more, and having a thickness of 5 μm or more. A group III nitride semiconductor device of the present invention includes: the above-described composite GaN substrate; and at least one group III nitride semiconductor layer disposed on the semi-insulative GaN layer of the composite GaN substrate. In this way, there can be obtained the composite GaN substrate and the group III nitride semiconductor device each having a high characteristic with reasonable cost. 1. A composite GaN substrate comprising:a conductive GaN substrate having a specific resistance of less than 1 Ωcm; and{'sup': '4', 'a semi-insulative GaN layer disposed on said conductive GaN substrate, having a specific resistance of 1×10Ωcm or more, and having a thickness of 5 μm or more.'}2. The composite GaN substrate according to claim 1 , wherein said semi-insulative GaN layer contains at least one kind of atoms selected from a group consisting of C claim 1 , Fe claim 1 , Cr claim 1 , and V claim 1 , as an impurity.3. The composite GaN substrate according to claim 1 , wherein said semi-insulative GaN layer contains C atoms as an impurity at a concentration of not less than 1×10cmand not more than 5×10cm.4. A group III nitride semiconductor device comprising:{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the composite GaN substrate recited in ; and'}at least one group III nitride semiconductor layer disposed on said semi-insulative GaN layer of said composite GaN substrate.5. The group III nitride semiconductor device according to claim 4 , wherein said group III nitride semiconductor layer includes an electron transit layer and an electron supply layer.6. A method for manufacturing a composite GaN substrate claim 4 , comprising the steps of:preparing a ...

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Номер записи: 61
11-07-2013 дата публикации

SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Номер: US20130175544A1
Автор: HANGAI Masatake, Nakayama Masatoshi, Oishi Toshiyuki, Otsuka Hiroshi, YAMANAKA Koji, Yamauchi Kazuhisa
Принадлежит: Mitsubishi Electric Corporation

It is an object to attain both high gain and a broad band (that is, to attain both reduction in a gate-drain capacitance and reduction in a source-drain capacitance). Provided is a semiconductor device, including: a GaN channel layer () through which electrons travel; a barrier layer () which is provided on the GaN channel layer in order to form two-dimensional electron gas in the GaN channel layer and which contains at least any one of In, Al, and Ga and contains N; a gate electrode (), a source electrode (), and a drain electrode (); and a plate () formed of a material having polarization, which is provided between the gate electrode () and the drain electrode (), the plate being held in contact with a part of the barrier layer (). 1. A semiconductor device , comprising:a GaN channel layer through which electrons travel;a barrier layer which is provided on the GaN channel layer in order to form two-dimensional electron gas in the GaN channel layer and which contains at least any one of In, Al, and Ga and contains N;a gate electrode, a source electrode, and a drain electrode; anda plate formed of a material having polarization, which is provided between the gate electrode and the drain electrode, the plate being held in contact with a part of the barrier layer.2. A semiconductor device according to claim 1 , wherein:the gate electrode has a T-shaped structure in which a length of a portion thereof held in contact with the barrier layer is smaller than a length of an upper portion thereof; anda part of the plate is placed under the upper portion of the gate electrode.3. A semiconductor device according to claim 1 , wherein the plate is connected to the source electrode by wiring.4. A semiconductor device according to claim 1 , wherein the plate is divided into two or more portions and provided.5. A semiconductor device according to claim 1 , wherein the plate is formed of a material which is any one or more of a nitride semiconductor and a PbTiO3-based pyroelectric ...

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Номер записи: 62
11-07-2013 дата публикации

Methods for processing a semiconductor wafer, a semiconductor wafer and a semiconductor device

Номер: US20130175671A1
Автор: Philippe Renaud, Roland Serrano
Принадлежит: FREESCALE SEMICONDUCTOR INC

A semiconductor wafer, comprising multiple active areas suitable for providing semiconductor devices or circuits. Inactive areas separate the active areas from each other. The wafer has a stressed layer with a first surface, and another layer which is in contact with the stressed layer along a second surface of the stressed layer, opposite to the first surface. Multiple trench lines, extend in parallel to the first surface of the stressed layer in an inactive area and have a depth less than the thickness of the semiconductor wafer.

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Номер записи: 63
11-07-2013 дата публикации

METHOD FOR MANUFACTURING GALLIUM NITRIDE WAFER

Номер: US20130178050A1
Автор: Kim Doo-Soo, KIM Yong-Jin, Lee Dong-Kun, Lee Ho-jun, Lee Kye-Jin
Принадлежит:

A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer. 1. A method for manufacturing a gallium nitride (GaN) wafer , the method comprising:forming an etch stop layer on a substrate;forming a first GaN layer on the etch stop layer;etching a portion of the first GaN layer with a silane gas;forming a second GaN layer on the etched first GaN layer; andforming a third GaN layer on the second GaN layer;wherein, in the etching of a portion of the first GaN layer with the silane gas, an etching process is performed using a silicon nitride (SixNy) random mask.2. A method for manufacturing a GaN wafer , the method comprising:forming an etch stop layer on a substrate;forming a first GaN layer on the etch stop layer;etching a portion of the first GaN layer with a silane gas to form a concave portion having a predetermined angle; andforming a second GaN layer on the etched first GaN layer.3. The method of claim 2 , wherein claim 2 , in the etching of a portion of the first GaN layer with the silane gas claim 2 , an etching process is performed without an etching mask.4. The method of claim 2 , wherein a pyramidal-shaped damage region is formed in the etched first GaN layer.5. The method of claim 4 , wherein claim 4 , in the forming of the second GaN layer on the etched first GaN layer claim 4 , the second GaN layer is formed to include a pyramidal-shaped profile between the first GaN layer and the second GaN layer. The present application is a divisional and claims the priority benefit of U.S. patent application No. 13/019,146 filed Feb. 1, 2011, which claims the priority benefit of Korean patent application number ...

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Номер записи: 64
18-07-2013 дата публикации

METHODS FOR DEPOSITING GROUP III-V LAYERS ON SUBSTRATES

Номер: US20130183815A1
Автор: BAO XINYU, HUANG YI-CHIAU, SANCHEZ ERROL ANTONIO C.
Принадлежит: Applied Materials, Inc.

Methods for depositing a group III-V layer on a substrate are disclosed herein. In some embodiments a method includes depositing a first layer comprising at least one of a first Group III element or a first Group V element on a silicon-containing surface oriented in a <111> direction at a first temperature ranging from about 300 to about 400 degrees Celsius; and depositing a second layer comprising second Group III element and a second Group V element atop the first layer at a second temperature ranging from about 300 to about 600 degrees Celsius. 1. A method of depositing a group III-V layer on a substrate , comprising:depositing a first layer comprising at least one of a first Group III element or a first Group V element on a silicon-containing surface oriented in a <111> direction at a first temperature ranging from about 300 to about 400 degrees Celsius; anddepositing a second layer comprising a second Group III element and a second Group V element atop the first layer at a second temperature ranging from about 300 to about 600 degrees Celsius.2. The method of claim 1 , wherein the first Group III element is the same as the second Group III element.3. The method of claim 1 , wherein the first Group V element is the same as the second Group V element.4. The method of claim 1 , further comprising:etching a silicon-containing substrate having a surface oriented in a direction other than the <111> direction until the silicon-containing surface having the <111> direction is reached.5. The method of claim 1 , further comprising:etching a silicon-containing substrate having a surface oriented in a direction other than the <111> direction to etch out a source/drain region in the silicon-containing substrate; andgrowing the silicon-containing surface having the <111> direction in the etched out source/drain region.6. The method of claim 1 , wherein the second layer further comprises at least one of a third Group III element or a third Group V element.7. The method of ...

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Номер записи: 65
01-08-2013 дата публикации

Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets

Номер: US20130193482A1
Автор: Bahman Hekmatshoartabari, Davood Shahrjerdi, Devendra K. Sadana, Ghavam G. Shahidi
Принадлежит: International Business Machines Corp

Improved Fin Field Effect Transistors (FinFET) are provided, as well as improved techniques for forming fins for a FinFET. A fin for a FinFET is formed by forming a semi-insulating layer on an insulator that gives a sufficiently large conduction band offset (ΔE e ) ranging from 0.05-0.6 eV; patterning an epitaxy mask on the semi-insulating layer, wherein the epitaxy mask has a reverse image of a desired pattern of the fin; performing a selective epitaxial growth within the epitaxy mask; and removing the epitaxy mask such that the fin remains on the semi-insulating layer. The semi-insulating layer comprises, for example, a III-V semiconductor material and optionally further comprises a Si δ-doping layer to supply electron carriers to the III-V channel.

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Номер записи: 66
01-08-2013 дата публикации

Method for manufacturing a group iii nitride substrate using a chemical lift-off process

Номер: US20130193558A1
Автор: Dae Woo Jeon, Hwa Seop Oh, Hyung Jo Park, Ja Yeon Kim, Jin Woo Ju, Jong Hyeob Baek, Sang Hern Lee, Tae Hoon Chung, Tak Jung, Yoon Seok Kim
Принадлежит: Korea Photonics Technology Institute

The non-polar or semi-polar group III nitride layer disclosed in a specific example of the present invention can be used for substrates for various electronic devices, wherein problems of conventional polar group III nitride substrates are mitigated or solved by using the nitride substrate of the invention, and further the nitride substrate can be manufactured by a chemical lift-off process.

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Номер записи: 67
01-08-2013 дата публикации

Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets

Номер: US20130196488A1
Автор: Bahman Hekmatshoartabari, Davood Shahrjerdi, Devendra K. Sadana, Ghavam G. Shahidi
Принадлежит: International Business Machines Corp

Improved Fin Field Effect Transistors (FinFET) are provided, as well as improved techniques for forming fins for a FinFET. A fin for a FinFET is formed by forming a semi-insulating layer on an insulator that gives a sufficiently large conduction band offset (ΔE c ) ranging from 0.05-0.6 eV; patterning an epitaxy mask on the semi-insulating layer, wherein the epitaxy mask has a reverse image of a desired pattern of the fin; performing a selective epitaxial growth within the epitaxy mask; and removing the epitaxy mask such that the fin remains on the semi-insulating layer. The semi-insulating layer comprises, for example, a III-V semiconductor material and optionally further comprises a Si δ-doping layer to supply electron carriers to the III-V channel.

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Номер записи: 68
15-08-2013 дата публикации

METHODS OF FORMING REVERSE SIDE ENGINEERED III-NITRIDE DEVICES

Номер: US20130210220A1
Автор: Chu Rongming, Lal Rakesh K., Mishra Umesh
Принадлежит: TRANSPHORM INC.

Group III-nitride devices are described that include a stack of III-nitride layers, passivation layers, and conductive contacts. The stack includes a channel layer with a 2DEG channel, a barrier layer and a spacer layer. One passivation layer directly contacts a surface of the spacer layer on a side opposite to the channel layer and is an electrical insulator. The stack of III-nitride layers and the first passivation layer form a structure with a reverse side proximate to the first passivation layer and an obverse side proximate to the barrier layer. Another passivation layer is on the obverse side of the structure. Defected nucleation and stress management layers that form a buffer layer during the formation process can be partially or entirely removed.

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Номер записи: 69
22-08-2013 дата публикации

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20130214287A1
Автор: Minoura Yuichi, OKAMOTO Naoya
Принадлежит: FUJITSU LIMITED

A semiconductor device is provided with: a GaN layer; an anode electrode that forms a Schottky junction with a Ga face of the GaN layer; and an InGaN layer positioned between at least a part of the anode electrode and the GaN layer. 1. A semiconductor device , comprising:a GaN layer;an anode electrode that forms a Schottky junction with a Ga face of the GaN layer; andan InGaN layer positioned between at least a part of the anode electrode and the GaN layer.2. The semiconductor device according to claim 1 , wherein the InGaN layer is positioned below an outer peripheral end of the anode electrode in a plan view.3. The semiconductor device according to claim 2 , further comprising a metal layer formed over the InGaN layer and having a work function higher than that of the anode electrode claim 2 ,wherein the anode electrode covers at least a part of the metal layer.4. The semiconductor device according to claim 1 , further comprising:a cathode electrode that forms an ohmic junction with the GaN layer; anda second InGaN layer formed in a same layer as the InGaN layer between the anode electrode and the cathode electrode in a plan view.5. The semiconductor device according to claim 1 , further comprising:a cathode electrode that forms an ohmic junction with the GaN layer; andan AlGaN layer or an InAlN layer formed over the InGaN layer between the anode electrode and the cathode electrode in a plan view.6. The semiconductor device according to claim 1 , further comprising a transistor that uses the GaN layer as an electron transit layer.7. The semiconductor device according to claim 1 , further comprising:a second GaN layer containing an n-type impurity whose concentration is higher than that of the GaN layer, and positioned below the GaN layer; anda cathode electrode that forms an ohmic junction with the second GaN layer.8. The semiconductor device according to claim 1 , further comprising a cathode electrode provided below the GaN layer.9. A semiconductor device claim ...

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Номер записи: 70
22-08-2013 дата публикации

Method for Manufacturing Optical Element

Номер: US20130214325A1
Автор: Kazuya Takada, Toru Kinoshita
Принадлежит: Tokuyama Corp

A method for manufacturing an optical element includes a step wherein an aluminum nitride single crystal layer is formed on an aluminum nitride seed substrate having an aluminum nitride single crystal surface as the topmost surface. A laminated body for an optical element is manufactured by forming an optical element layer on the aluminum nitride single crystal layer, and the aluminum nitride seed substrate is removed from the laminated body. An optical element having, as a substrate, an aluminum nitride single crystal layer having a high ultraviolet transmittance and a low dislocation density is provided.

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Номер записи: 71
22-08-2013 дата публикации

Fabrication method of nitride forming on silicon substrate

Номер: US20130217212A1
Автор: Chih-Chung Yang, Chih-Yen Chen
Принадлежит: National Taiwan University NTU

The invention is directed to a method for forming a nitride on a silicon substrate. In the method of the present invention, a silicon substrate is provided and a buffer layer is formed on the silicon substrate. The formation of the buffer layer includes a multi-level temperature modulation process having a plurality temperature levels and a plurality of temperature modulations. For each of the temperature modulations, the temperature is gradually decreased. A nitride is formed on the buffer layer.

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Номер записи: 72
12-09-2013 дата публикации

Method for manufacturing nitride semiconductor layer

Номер: US20130237036A1
Автор: Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue, Toshiki Hikosaka, Yoshiyuki Harada
Принадлежит: Toshiba Corp

According to one embodiment, a method for manufacturing a nitride semiconductor layer is disclosed. The method can include forming a first lower layer on a major surface of a substrate and forming a first upper layer on the first lower layer. The first lower layer has a first lattice spacing along a first axis parallel to the major surface. The first upper layer has a second lattice spacing along the first axis larger than the first lattice spacing. At least a part of the first upper layer has compressive strain. A ratio of a difference between the first and second lattice spacing to the first lattice spacing is not less than 0.005 and not more than 0.019. A growth rate of the first upper layer in a direction parallel to the major surface is larger than that in a direction perpendicular to the major surface.

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Номер записи: 73
19-09-2013 дата публикации

Nitride semiconductor device

Номер: US20130240901A1
Автор: Masahiro Ishida, Shinichi Kohda, Yasuhiro Yamada
Принадлежит: Panasonic Corp

A nitride semiconductor device includes a substrate, and a first nitride semiconductor layer, a second nitride semiconductor layer, a third nitride semiconductor layer, and a fourth nitride semiconductor layer sequentially formed on the substrate. A channel is formed in the third nitride semiconductor layer, and includes carriers accumulated near an interface between the third nitride semiconductor layer and the fourth nitride semiconductor layer. The second nitride semiconductor layer has a band gap larger than that of the third nitride semiconductor layer. The first nitride semiconductor layer has a band gap equal to or larger than that of the second nitride semiconductor layer, and has a carbon concentration higher than that of the second nitride semiconductor layer.

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Номер записи: 74
19-09-2013 дата публикации

Fabrication method and fabrication apparatus of group iii nitride crystal substance

Номер: US20130244406A1
Автор: Fumitaka Sato, Hideyuki Ijiri, Hitoshi Kasai, Kensaku Motoki, Koji Uematsu, Naoki Matsumoto, Ryu Hirota, Seiji Nakahata, Shunsuke Fujita, Takuji Okahisa
Принадлежит: Sumitomo Electric Industries Ltd

A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

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Номер записи: 75
19-09-2013 дата публикации

METHODS OF FORMING BULK III-NITRIDE MATERIALS ON METAL-NITRIDE GROWTH TEMPLATE LAYERS, AND STRUCTURES FORMED BY SUCH METHODS

Номер: US20130244410A1
Автор: Arena Chantal, Bertram Ronald Thomas, Lindow Ed
Принадлежит: SOITEC

Bulk III-nitride semiconductor materials are deposited in an HPVE process using a metal trichloride precursor on a metal nitride template layer of a growth substrate. Deposition of the bulk III-nitride semiconductor material may be performed without ex situ formation of the template layer using a MOCVD process. In some embodiments, a nucleation template layer is formed ex situ using a non-MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In additional embodiments, a nucleation template layer is formed in situ using an MOCVD process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. In further embodiments, a nucleation template layer is formed in situ using an HVPE process prior to depositing bulk III-nitride semiconductor material on the template layer using an HVPE process. 1. A method of depositing bulk III-nitride semiconductor material on a growth substrate , comprising:forming a metal-nitride nucleation template layer on a substrate to form the growth substrate; and decomposing at least one of a metal trichloride and a metal tetrachloride to form a metal chloride Group III precursor vapor, and', 'reacting the metal chloride Group III precursor vapor with a Group V precursor vapor to form the bulk III-nitride semiconductor material on the growth substrate., 'depositing the bulk III-nitride semiconductor material on the growth substrate using a halide vapor phase epitaxy (HVPE) process, depositing the bulk III-nitride semiconductor material on the growth substrate comprising2. The method of claim 1 , wherein forming the metal-nitride nucleation template layer on the substrate comprises using a non-metallorganic chemical vapor deposition (MOCVD) process to form the metal-nitride nucleation template layer.3. The method of claim 1 , wherein forming the metal-nitride nucleation template layer on the substrate comprises using a plasma-enhanced ...

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Номер записи: 76
26-09-2013 дата публикации

SEMICONDUCTOR DEVICE, NITRIDE SEMICONDUCTOR CRYSTAL, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR CRYSTAL

Номер: US20130248872A1
Автор: Imanishi Kenji, ISHIGURO Tetsuro, MIYAJIMA TOYOO, Nakamura Norikazu, Yamada Atsushi
Принадлежит: FUJITSU LIMITED

A semiconductor device includes: a nucleation layer formed over a substrate; a buffer layer formed over the nucleation layer; a first nitride semiconductor layer formed over the buffer layer; and a second nitride semiconductor layer formed over the first nitride semiconductor layer, wherein the ratio of yellow luminescence emission to band edge emission in photoluminescence is 400% or less and the twist value in an X-ray rocking curve is 1,000 arcsec or less. 1. A semiconductor device comprising:a nucleation layer formed over a substrate;a buffer layer formed over the nucleation layer;a first nitride semiconductor layer formed over the buffer layer; anda second nitride semiconductor layer formed over the first nitride semiconductor layer, whereinthe ratio of yellow luminescence emission to band edge emission in photoluminescence is 400% or less and the twist value in an X-ray rocking curve is 1,000 arcsec or less.2. The semiconductor device according to claim 1 , whereinthe substrate is a silicon substrate.3. The semiconductor device according to claim 1 , whereinthe nucleation layer is formed from a material containing AlN.4. The semiconductor device according to claim 1 , whereinthe buffer layer includes a plurality of layers in which composition ratios of AlGaN are different from each other, andamong the plurality of layers, the amount of carbon contained in a layer near the first nitride semiconductor layer is larger than the amount of carbon contained in a layer near the nucleation layer.5. The semiconductor device according to claim 1 , whereinthe first nitride semiconductor layer is formed from a material containing GaN.6. The semiconductor device according to claim 1 , whereinthe second nitride semiconductor layer is formed from a material containing AlGaN.7. The semiconductor device according to claim 1 , further comprisinga gate electrode, a source electrode, and a drain electrode are formed over the second nitride semiconductor layer.8. The semiconductor ...

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Номер записи: 77
26-09-2013 дата публикации

Group iii nitride substrate, semiconductor device comprising the same, and method for producing surface-treated group iii nitride substrate

Номер: US20130249060A1
Автор: Keiji Ishibashi
Принадлежит: Sumitomo Electric Industries Ltd

A group III nitride substrate in one embodiment has a surface layer. The surface layer contains 3 at. % to 25 at. % of carbon and 5×10 10 atoms/cm 2 to 200×10 10 atoms/cm 2 of a p-type metal element. The group III nitride substrate has a stable surface.

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Номер записи: 78
03-10-2013 дата публикации

Compound semiconductor device and method of manufacturing the same

Номер: US20130256682A1
Автор: Atsushi Yamada, Kenji Imanishi, Norikazu Nakamura, Tetsuro ISHIGURO
Принадлежит: Fujitsu Ltd

An embodiment of a method of manufacturing a compound semiconductor device includes: forming an initial layer over a substrate; forming a buffer layer over the initial layer; forming an electron transport layer and an electron supply layer over the buffer layer; and forming a gate electrode, a source electrode and a gate electrode over the electron supply layer. The forming an initial layer includes: forming a first compound semiconductor film with a flow rate ratio being a first value, the flow rate ratio being a ratio of a flow rate of a V-group element source gas to a flow rate of a III-group element source gas; and forming a second compound semiconductor film with the flow rate ratio being a second value different from the first value over the first compound semiconductor film. The method further includes forming an Fe-doped region between the buffer layer and the electron transport layer.

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Номер записи: 79
03-10-2013 дата публикации

PRODUCTION METHOD FOR GROUP III NITRIDE SEMICONDUCTOR AND GROUP III NITRIDE SEMICONDUCTOR

Номер: US20130256743A1
Автор: Amano Hiroshi, Okuno Koji, OSHIO Takahide, Shibata Naoki
Принадлежит: TOYODA GOSEI CO., LTD.

A method for producing a Group III nitride semiconductor comprising forming mesas on a main surface of a substrate, and growing Group III nitride semiconductor in a c-axis direction thereof, wherein the plane most parallel to the side surfaces of the mesas or the dents among the low-index planes of growing Group III nitride semiconductor is a m-plane (1-100), and when a projected vector obtained by orthogonally projecting a normal vector of the processed side surface to the main surface is defined as a lateral vector, an angle between the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less. 1. A method for producing a Group III nitride semiconductor comprising forming mesas and dents on a main surface of a substrate , and growing Group III nitride semiconductor in a c-axis direction of the Group III nitride semiconductor on the top surfaces of the mesas and the bottom surfaces of the dents , whereinside surfaces of the mesas and the dents are formed so as to satisfy the following conditions:a plane, which is most parallel to the side surfaces among low-index planes of the growing Group III nitride semiconductor, is a m-plane (1-100); andwhen a projected vector obtained by orthogonally projecting a normal vector of the side surface to the main surface is defined as a lateral vector, an angle formed by the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less.2. A method for producing a Group III nitride semiconductor according to claim 1 , wherein the substrate comprises a hexagonal crystal structure claim 1 , a main surface thereof is a c-plane (0001) of hexagonal crystal claim 1 , and an angle between the lateral vector and a projected vector obtained by orthogonally ...

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Номер записи: 80
03-10-2013 дата публикации

System and process for high-density, low-energy plasma enhanced vapor phase epitaxy

Номер: US20130260537A1
Автор: Hans Von Känel
Принадлежит: Sulzer Metco AG

A process for epitaxial deposition of compound semiconductor layers includes several steps. In a first step, a substrate is removably attached to a substrate holder that may be heated. In a second step, the substrate is heated to a temperature suitable for epitaxial deposition. In a third step, substances are vaporized into vapor particles, such substances including at least one of a list of substances, comprising elemental metals, metal alloys and dopants. In a fourth step, the vapor particles are discharged to the deposition chamber. In a fifth step, a pressure is maintained in the range of 10̂-3 to 1 mbar in the deposition chamber by supplying a mixture of gases comprising at least one gas, wherein vapor particles and gas particles propagate diffusively. In a sixth optional step, a magnetic field may be applied to the deposition chamber. In a seventh step, the vapor particles and gas particles are activated by a plasma in direct contact with the sample holder. In an eighth step, vapor particles and gas particles are allowed to react, so as to form a uniform epitaxial layer on the heated substrate by low-energy plasma-enhanced vapor phase epitaxy.

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Номер записи: 81
03-10-2013 дата публикации

METHOD FOR PRODUCING Ga-CONTAINING GROUP III NITRIDE SEMICONDUCTOR

Номер: US20130260541A1
Автор: Hiroshi Amano, Koji Okuno, Naoki Shibata, Takahide Oshio
Принадлежит: Toyoda Gosei Co Ltd

A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer.

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Номер записи: 82
17-10-2013 дата публикации

NITRIDE-BASED SEMICONDUCTOR ELEMENT AND METHOD FOR FABRICATING THE SAME

Номер: US20130270574A1
Автор: ANZUE Naomi, Inoue Akira, KATO Ryou, YOKOGAWA Toshiya
Принадлежит:

A nitride-based semiconductor element according to an embodiment of the present disclosure includes: a p-type contact layer, of which the growing plane is an m plane; and an electrode which is arranged on the growing plane of the p-type contact layer. The p-type contact layer is a GaN-based semiconductor layer which has a thickness of 26 nm to 60 nm and which includes oxygen at a concentration that is equal to or higher than Mg concentration of the p-type contact layer. In the p-type contact layer, the number of Ga vacancies is larger than the number of N vacancies. 1. A nitride-based semiconductor element comprising:a p-type contact layer, of which the growing plane is an m plane; andan electrode which is arranged on the growing plane of the p-type contact layer,wherein the p-type contact layer is a GaN-based semiconductor layer which has a thickness of 26 nm to 60 nm and which includes oxygen at a concentration that is equal to or higher than Mg concentration of the p-type contact layer, andwherein in the p-type contact layer, the number of Ga vacancies is larger than the number of N vacancies.2. The nitride-based semiconductor element of claim 1 , wherein the p-type contact layer is an AlGaInN (where x+y+z=1 claim 1 , x≧0 claim 1 , y≧0 claim 1 , and z≧0) semiconductor layer.3. The nitride-based semiconductor element of claim 1 , wherein the p-type contact layer has a thickness of 30 nm to 45 nm.4. The nitride-based semiconductor element of claim 1 , wherein the p-type contact layer includes Mg at a concentration of 4×10cmto 2×10cm.5. The nitride-based semiconductor element of claim 1 , comprising an Mg-precipitated layer on the growing plane of the p-type contact layer.6. The nitride-based semiconductor element of claim 1 , wherein the p-type contact layer includes oxygen at a concentration of 4×10cmor less.7. The nitride-based semiconductor element of claim 1 , wherein the electrode includes a first layer which contacts with the p-type contact layer claim 1 , ...

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Номер записи: 83
17-10-2013 дата публикации

SEMICONDUCTOR WAFER COMPRISING GALLIUM NITRIDE LAYER HAVING ONE OR MORE SILICON NITRIDE INTERLAYER THEREIN

Номер: US20130270575A1
Автор: Humphreys Colin, Kappers Menno, Liu Zhenyu, McAleese Clifford, Zhu Dandan
Принадлежит:

A semiconductor wafer comprising a substrate layer and a first GaN layer having one or more SiNx interlayers therein, wherein in the first GaN layer at least one SiNx interlayer has GaN penetrated through one or more portions of said SiNx interlayer and preferably has a thickness of from 0.5 to 10 nm. 1. A semiconductor wafer comprising:a substrate layer; and{'sub': x', 'x', 'x, 'a first GaN layer having one or more SiNinterlayers therein; and wherein in the first GaN layer at least one SiNinterlayer has GaN penetrated through one or more portions of said SiNinterlayer and preferably has a thickness of from 0.5 to 10 nm.'}2. The semiconductor wafer according to claim 1 , further comprising a AlGaN layer between the substrate layer and the first GaN layer.3. The semiconductor wafer according to claim 2 , further comprising an AlN layer between the substrate layer and the AlGaN layer.4. The semiconductor wafer according to claim 2 , wherein the AlGaN layer is compositionally graded so that the amount of aluminium decreases across the thickness of the layer away from the silicon substrate layer.5. The semiconductor wafer according to claim 2 , comprising two or more AlGaN layers between the substrate layer and the first GaN layer claim 2 , wherein each layer has the formula AlGaN and the value of x in each layer is from 0.01 to 0.9.6. The semiconductor wafer according to claim 2 , wherein the first GaN layer is not intentionally doped.7. A semiconductor wafer according to claim 2 , wherein the first GaN layer has two or more SiNinterlayers therein.8. A semiconductor wafer according to claim 2 , wherein GaN penetrates through one or more portions of at least one SiNinterlayer to form discrete crystalline structures within the GaN enclosing the SiNinterlayer.9. A semiconductor wafer according to claim 2 , wherein the GaN penetrates through a plurality of portions of said SiNinterlayer across said interlayer.10. The semiconductor wafer according to claim 2 , wherein the ...

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Номер записи: 84
24-10-2013 дата публикации

NITRIDE SEMICONDUCTOR STRUCTURE, NITRIDE SEMICONDUCTOR LIGHT EMITTING ELEMENT, NITRIDE SEMICONDUCTOR TRANSISTOR ELEMENT, METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR STRUCTURE, AND METHOD OF MANUFACTURING NITRIDE SEMICONDUCTOR ELEMENT

Номер: US20130277684A1
Автор: Araki Masahiro, Funaki Takeshi, Hoteida Masayuki, Kinoshita Takao, Murata Tohru, Ogawa Atsushi, Takiguchi Haruhisa, YOSHIDA Shinya
Принадлежит:

A nitride semiconductor structure in which a first nitride semiconductor underlying layer is provided on a substrate having a recess portion and a projection portion provided between the recess portions at a surface thereof, the first nitride semiconductor underlying layer has at least 6 first oblique facet planes surrounding the projection portion on an outer side of the projection portion, and a second nitride semiconductor underlying layer buries the first oblique facet planes, a nitride semiconductor light emitting element, a nitride semiconductor transistor element, a method of manufacturing a nitride semiconductor structure, and a method of manufacturing a nitride semiconductor element are provided. 1. A nitride semiconductor structure , comprising:a substrate having a recess portion and a projection portion provided between said recess portions at its surface;a nitride semiconductor intermediate layer provided on said substrate;a first nitride semiconductor underlying layer provided on said nitride semiconductor intermediate layer; anda second nitride semiconductor underlying layer provided on said first nitride semiconductor underlying layer,said substrate being composed of trigonal corundum or hexagonal crystal,said first nitride semiconductor underlying layer having at least 6 first oblique facet planes surrounding said projection portion on an outer side of said projection portion,said second nitride semiconductor underlying layer having a lower surface in contact with said first oblique facet plane of said first nitride semiconductor underlying layer, andsaid second nitride semiconductor underlying layer having a flat upper surface.2. The nitride semiconductor structure according to claim 1 , whereinsaid first oblique facet plane is inclined with respect to an m axis of a nitride semiconductor having a hexagonal structure.3. The nitride semiconductor structure according to claim 1 , wherein said projection portion is arranged along a <11-20> direction of ...

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Номер записи: 85
07-11-2013 дата публикации

METAL NITRIDES AND PROCESS FOR PRODUCTION THEREOF

Номер: US20130295363A1
Автор: TSUJI Hideto
Принадлежит:

A method for producing a metal nitride by employing a container made of a nonoxide material, wherein reaction or adhesion of a raw metal or metal nitride to be formed to the container can be avoided and inclusion of oxygen derived from the material of the container can be prevented; by securing a certain or larger supply amount and a certain or higher flow rate of the nitrogen source gas, the raw metal can be converted into a nitride with an extremely high conversion, and a metal nitride having a small amount of an unreacted raw metal remaining and containing a metal and nitrogen in a stoichiometric constant can be obtained with a high yield; a metal nitride having small amounts of unreacted raw metal remaining and oxygen included can be obtained with a high yield and is very useful as a raw material for bulk crystal growth. 1. A metal nitride containing a metal element of Group 13 of the Periodic Table , characterized by the metal nitride having an oxygen content of less than 0.07 wt % and a specific surface area of at most 0.5 m/g.2. The metal nitride according to claim 1 , which has a content of a zero valent metal element of less than 5 wt %.3. The metal nitride according to claim 1 , which contains nitrogen in an amount of at least 47 atomic %.4. The metal nitride according to claim 1 , which has a color tone claim 1 , wherein the color tone measured by a color difference meter is such that L is at least 60 claim 1 , “a” is at least −10 and at most 10 claim 1 , and “b” is at least −20 and at most 10.5. The metal nitride according to claim 1 , which has a maximum length of primary particles in a major axis direction of at least 0.05 μm and at most 1 mm.6. The metal nitride according to claim 1 , wherein the metal element of Group 13 of the Periodic Table is gallium.7. A metal nitride molded product claim 1 , which is pellets or a block obtained by molding the metal nitride as defined in .8. A method for producing metal nitride bulk crystals claim 1 , comprising ...

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Номер записи: 86
07-11-2013 дата публикации

METHODS FOR FORMING SEMICONDUCTOR MATERIALS BY ATOMIC LAYER DEPOSITION USING HALIDE PRECURSORS

Номер: US20130295708A1
Автор: Werkhoven Christiaan J.
Принадлежит:

Methods of depositing a III-V semiconductor material on a substrate include sequentially introducing a gaseous precursor of a group III element and a gaseous precursor of a group V element to the substrate by altering spatial positioning of the substrate with respect to a plurality of gas columns. For example, the substrate may be moved relative to a plurality of substantially aligned gas columns, each disposing a different precursor. Thermalizing gas injectors for generating the precursors may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. Deposition systems for forming one or more III-V semiconductor materials on a surface of the substrate may include one or more such thermalizing gas injectors configured to direct the precursor to the substrate via the plurality of gas columns. 1. A method of depositing a semiconductor material , comprising:sequentially exposing a surface of a substrate to a group III element precursor and a group V element precursor in at least one atomic layer deposition (ALD) growth cycle and forming a first III-nitride semiconductor material over the surface of the substrate; andexposing a surface of the III-nitride semiconductor material to one or more metal halide precursors and a group V element precursor and forming a second group III-nitride semiconductor material over the first III-nitride semiconductor material.2. The method of claim 1 , wherein forming the first III-nitride semiconductor material over the surface of the substrate comprises forming aluminum nitride over the surface of the substrate.3. The method of claim 2 , wherein forming aluminum nitride over the surface of the substrate comprises forming a layer of aluminum nitride directly on the surface of the substrate.4. The method of claim 3 , further comprising selecting the substrate to comprise a sapphire substrate.5. The method of claim 4 , wherein forming the second group III-nitride semiconductor ...

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Номер записи: 87
21-11-2013 дата публикации

PASSIVATION OF GROUP III-NITRIDE HETEROJUNCTION DEVICES

Номер: US20130306978A1
Автор: Chen Jing, HUANG Sen, JIANG Qimeng, Tang Zhikai
Принадлежит: THE HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY

Passivation of group III-nitride heterojunction devices is described herein. The passivation facilitates simultaneous realization of effective/high current collapse suppression and low leakage current without the use of a sophisticated multiple-field plate technique. The passivation can be achieved by growing a charge-polarized AlN thin film on the surface of a group III-nitride based heterojunction device by plasma-enhanced atomic layer deposition such that positive polarization charges are induced at the interface to compensate for a majority of negative charges at the interface. 1. An apparatus , comprising:a group III-nitride heterojunction device; and {'sup': 13', '−2, 'wherein the interface between the group III -nitride heterojunction device and the charge-polarized AlN film comprises a density of positive polarization charges on an order of at least about 10cm.'}, 'a charge-polarized aluminum nitride (AlN) film on the surface of the group III-nitride heterojunction device,'}2. The apparatus of claim 1 , wherein the charge-polarized AlN film has a thickness of about 10 nm or less.3. The apparatus of claim 1 , wherein the charge-polarized AlN film comprises a single-crystalline arrangement or a polycrystalline atomic arrangement.4. The apparatus of claim 1 , wherein the density of positive polarization charges is greater than the density of negative charges at the interface from the group III-nitride heterojunction device.5. The apparatus of claim 1 , further comprising a stacked passivation structure comprising the AlN film and a second dielectric material.6. A method claim 1 , comprising:growing a charge-polarized aluminum nitride (AlN) thin film with a thickness of about 10 nm or less on the surface of a group III-nitride based heterojunction device by plasma-enhanced atomic layer deposition; andinducing positive polarization charges in the charge-polarized AlN thin film at the interface between the AlN thin film and the surface of the group III-nitride ...

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Номер записи: 88
21-11-2013 дата публикации

SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR SUBSTRATE

Номер: US20130306979A1
Автор: IWAMI Masayuki, KOKAWA Takuya
Принадлежит: ADVANCED POWER DEVICE RESEARCH ASSOCIATION

A GaN-based semiconductor is epitaxially grown on a silicon substrate with a surface orientation of (111). The difference between the lattice constant of the GaN and the silicon (111) surface is approximately 17%, which is quite large. Therefore, the dislocation density of the grown GaN exceeds 10cm. Screw dislocation density causes the leak current of the transistor using GaN to increases. Furthermore, the mobility of the transistor is reduced. Provided is a semiconductor substrate comprising a silicon substrate and a nitride semiconductor layer that is epitaxially grown on a (150) surface of the silicon substrate. 1. A semiconductor substrate comprising:a silicon substrate; anda nitride semiconductor layer that is epitaxially grown on a (150) surface of the silicon substrate.2. The semiconductor substrate according to claim 1 , further comprising a silicon nitride layer that is formed between the silicon substrate and the nitride semiconductor layer.3. The semiconductor substrate according to claim 2 , whereinthe silicon nitride layer has a thickness of two atom layers or less.4. The semiconductor substrate according to claim 1 , whereinthe nitride semiconductor layer is formed of one of GaN, AlGaN, and AlN, or is formed by layering GaN, AlGaN, and AlN.5. The semiconductor substrate according to claim 1 , whereina growth surface of the nitride semiconductor layer is a (0001) surface.6. The semiconductor substrate according to claim 1 , whereinthe silicon substrate is carved from monocrystalline silicon grown using a CZ technique.7. A semiconductor device formed on the semiconductor substrate according to .8. The semiconductor device according to claim 7 , whereinthe nitride semiconductor layer is an electron transit layer through which electrons transit, andthe semiconductor device is a field effect transistor.9. The semiconductor device according to claim 8 , wherein{'sup': '2', 'mobility is greater than or equal to 1400 cm/Vs.'}10. The semiconductor device ...

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Номер записи: 89
21-11-2013 дата публикации

Semiconductor device and method for manufacturing semiconductor device

Номер: US20130307023A1
Автор: Makoto Utsumi, Masayuki Iwami, Sadahiro KATOU, Takuya Kokawa
Принадлежит: ADVANCED POWER DEVICE RESEARCH ASSOCIATION

Provided is a semiconductor device that has a buffer layer with which a dislocation density is decreased. The semiconductor device includes a substrate, a buffer region formed over the substrate, an active layer formed on the buffer region, and at least two electrodes formed on the active layer. The buffer region includes at least one composite layer in which a first semiconductor layer having a first lattice constant, a second semiconductor layer having a second lattice constant that is different from the first lattice constant and formed in contact with the first semiconductor layer, and a third semiconductor layer having a third lattice constant that is between the first lattice constant and the second lattice constant are sequentially laminated.

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Номер записи: 90
21-11-2013 дата публикации

MANUFACTURING METHOD OF GaN-BASED SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

Номер: US20130307063A1
Автор: Akinobu Teramoto, Hiroshi Kambayashi, Tadahiro Ohmi
Принадлежит: ADVANCED POWER DEVICE RESEARCH ASSOCIATION, Tohoku University NUC

Provided is a method of manufacturing a gallium-nitride-based semiconductor device, comprising forming a first semiconductor layer of a gallium-nitride-based semiconductor; and forming a recessed portion by dry etching a portion of the first semiconductor layer via a microwave plasma process using a bromine-based gas.

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Номер записи: 91
21-11-2013 дата публикации

Silicon-on-Insulator High Power Amplifiers

Номер: US20130307626A1
Автор: Chen Jing-Hwa, Helmi Sultan R., Mohammadi Saeed, Pajouhi Hossein
Принадлежит:

Illustrative embodiments of power amplifiers and associated methods are disclosed. In at least one embodiment, a method may include fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers; removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; and securing the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate. 1. A method comprising:fabricating a power amplifier in a first silicon layer of a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises the first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first and second silicon layers;removing at least some of the second silicon layer from the SOI substrate, after fabricating the power amplifier; andsecuring the SOI substrate, after removing at least some of the second silicon layer, to an electrically non-conductive and thermally conductive substrate.2. The method of claim 1 , wherein securing the SOI substrate to the electrically non-conductive and thermally conductive substrate comprises securing the SOI substrate to an aluminum nitride (AlN) substrate.3. The method of claim 2 , wherein:removing at least some of the second silicon layer comprises removing all of the second silicon layer from the SOI substrate; andsecuring the SOI substrate to the AlN substrate comprises securing the buried oxide layer of the SOI substrate to the AlN substrate.4. The method of claim 2 , wherein securing the SOI substrate to the AlN substrate comprises bonding the SOI substrate to the AlN substrate using an adhesive layer.5. The method of claim 2 , wherein securing the SOI substrate to the AlN substrate comprises depositing AlN ...

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Номер записи: 92
28-11-2013 дата публикации

GaN Epitaxy With Migration Enhancement and Surface Energy Modification

Номер: US20130313566A1
Автор: Boris BORISOV, Philip A. Kraus, Sandeep Nijhawan, Thai Cheng Chua, Yoga Saripalli
Принадлежит: Intermolecular Inc

Methods and apparatus for depositing thin films incorporating the use of a surfactant are described. Methods and apparatuses include a deposition process and system comprising multiple isolated processing regions which enables rapid repetition of sub-monolayer deposition of thin films. The use of surfactants allows the deposition of high quality epitaxial films at lower temperatures having low values of surface roughness. The deposition of Group III-V thin films such as GaN is used as an example.

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Номер записи: 93
28-11-2013 дата публикации

BASE SUBSTRATE, GALLIUM NITRIDE CRYSTAL MULTI-LAYER SUBSTRATE AND PRODUCTION PROCESS THEREFOR

Номер: US20130313567A1
Автор: Azuma Masanobu, Furuya Hiroshi, Okada Narihito, Tadatomo Kazuyuki
Принадлежит:

A GaN crystal multi-layer substrate having surfaces with various crystal orientations formed on a sapphire base substrate, such as a substrate whose principal surface is a <11-20> plane which is the a-plane, a <1-100> plane which is the m-plane, or a <11-22> plane having a low threading dislocation density and high crystal quality of a GaN crystal, and a production process therefor. 1. A gallium nitride crystal multi-layer substrate comprising a sapphire base substrate and a gallium nitride crystal layer which is firmed by crystal growth on the substrate , wherein{'sup': 8', '2, 'the gallium nitride crystal layer is formed by lateral crystal growth from the sidewalls of a plurality of grooves formed in the principal surface of the sapphire base substrate in such a manner that the surface thereof is parallel to the principal surface, and the dark-spot density of the gallium nitride crystal is less than 2×10/cm.'}2. The gallium nitride crystal multi-layer substrate according to claim 1 , wherein the dark-spot density of the gallium nitride crystal is not more than 1.4×10/cm.3. The gallium nitride crystal multi-layer substrate according to claim 1 , wherein the gallium nitride crystal layer has a surface with a nonpolar or semipolar orientation.4. The gallium nitride crystal multi-layer substrate according to claim 1 , wherein the sidewalls which are the starting points of lateral crystal growth are each the c-plane of a sapphire single crystal.5. A process for manufacturing a gallium nitride crystal multi-layer substrate claim 1 , comprising the steps of:forming a plurality of grooves, each having sidewalls inclined with respect to the principal surface of a sapphire base substrate, in the sapphire base substrate; andlaterally growing a gallium nitride crystal selectively from the sidewalls of the grooves, whereinthe width (d) of an area for growing a gallium nitride crystal on the sidewalls is set to 10 to 750 nm.6. The process for manufacturing a gallium nitride ...

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Номер записи: 94
05-12-2013 дата публикации

PROCESS FOR PRODUCING DOPED GALLIUM ARSENIDE SUBSTRATE WAFERS HAVING LOW OPTICAL ABSORPTION COEFFICIENT

Номер: US20130320242A1
Автор: Börner Frank, EICHLER Stefan, Kretzer Ulrich, Kropfgans Frieder
Принадлежит: FREIBERGER COMPOUND MATERIALS GMBH

A process is disclosed for producing a doped gallium arsenide single crystal by melting a gallium arsenide starting material and subsequently solidifying the gallium arsenide melt, wherein the gallium arsenide melt contains an excess of gallium relative to the stoichiometric composition, and wherein it is provided for a boron concentration of at least 5×10′cmin the melt or in the obtained crystal. The thus obtained crystal is characterized by a unique combination of low dislocation density, high conductivity and yet excellent, very low optic absorption, particularly in the range of the near infrared. 1. A gallium arsenide single crystal , comprising a charge carrier concentration of at least 1×10cmand at most 1×10cm , wherein an optical absorption coefficient of the gallium arsenide single crystal is at most 2.5 cmat a wavelength of 1000 nm , at most 1.8 cmat a wavelength of 1100 nm and at most 1.0 cmat a wavelength of 1200 nm , and wherein the area density of etch pitches on cross-sections perpendicular to the crystal axis does not exceed 1500 cm.2. A gallium arsenide single crystal comprising an electron concentration of at least 1×10cmand at most 1×10cm , wherein an optical absorption coefficient of the gallium arsenide single crystal is at most 2.0 cmat a wavelength of 1000 nm , at most 1.4 cmat a wavelength of 1100 nm and at most 0.8 cmat a wavelength of 1200 nm , and wherein the area density of etch pitches on cross-sections perpendicular to the crystal axis does not exceed 1500 cm.3. A gallium arsenide single crystal according to claim 1 , comprising a charge carrier concentration of at most 5×10cm.4. A gallium arsenide single crystal according to claim 1 , comprising an n-type conductivity claim 1 , wherein the charge carrier concentration corresponds to the electron concentration.5. A gallium arsenide single crystal according to claim 1 , comprising a boron content of at least 5×10cm.6. A gallium arsenide single crystal according to claim 1 , comprising a ...

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Номер записи: 95
05-12-2013 дата публикации

Heterojunction semiconductor device and manufacturing method

Номер: US20130320400A1
Автор: Andreas Bernardus Maria Jansman, Godefridus Adrianus Maria Hurkx, Jan Sonsky, Jeroen Antoon CROON, Johannes Josephus Theodorus Marinus Donkers, Markus Mueller, Stephan Heil, Stephen John SQUE, Tim BOETTCHER
Принадлежит: NXP BV

Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each conductively coupled to a different area of the heterojunction, said Schottky electrode comprising a central region and an edge region, wherein the element comprises a conductive barrier portion located underneath said edge region only of the Schottky electrode for locally increasing the Schottky barrier of the Schottky electrode. A method of manufacturing such a semiconductor device is also disclosed.

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Номер записи: 96
05-12-2013 дата публикации

PROCESS FOR LARGE-SCALE AMMONOTHERMAL MANUFACTURING OF SEMIPOLAR GALLIUM NITRIDE BOULES

Номер: US20130323490A1
Автор: "DEvelyn Mark P.", DOWNEY BRADLEY C., Ehrentraut Dirk, Kamber Derrick S.
Принадлежит:

Methods for large-scale manufacturing of semipolar gallium nitride boules are disclosed. The disclosed methods comprise suspending large-area single crystal seed plates in a rack, placing the rack in a large diameter autoclave or internally-heated high pressure apparatus along with ammonia and a mineralizer, and growing crystals ammonothermally. A bi-faceted growth morphology may be maintained to facilitate fabrication of large area semipolar wafers without growing thick boules. 1. A gallium-containing nitride crystal , comprising:a crystalline substrate member having a length greater than about 5 millimeters;at least one large-area surface having a semipolar orientation, wherein the semipolar orientation is miscut from each of the m-plane orientation and the c-plane orientation by at least about 5 degrees; and{'sup': 16', '−3, 'an impurity concentration greater than about 10cmof at least one impurity selected from O, H, Li, Na, K, F, Cl, Br, I, Si, Ge, Cu, Mn, and Fe, wherein the at least one impurity has a distribution along a direction parallel at least one large-area surface of the crystal comprising at least 4 alternating bands of a higher impurity concentration and a lower impurity concentration of the at least one impurity, wherein the higher impurity concentration is between about 1.05 times higher than and about 40 times higher than the lower impurity concentration.'}2. The crystal of claim 1 , wherein the semipolar orientation is within about 3 degrees of one of {6 0 −6 ±1} claim 1 , {5 0 −5 ±1} claim 1 , {4 0 −4 ±1} claim 1 , {3 0 −3 ±1} claim 1 , {5 0 −5 ±2} claim 1 , {2 0 −2 ±1} claim 1 , {3 0 −3 ±2} claim 1 , {4 0 −4 ±3} claim 1 , and {5 0 −5 ±4}.3. The crystal of claim 1 , wherein the length is greater than about 25 millimeters.4. The crystal of claim 1 , wherein a dislocation density of at least one large-area surface is below about 10cm.5. The crystal of claim 1 , wherein a full width at half maximum of a symmetric x-ray rocking curve corresponding ...

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Номер записи: 97
12-12-2013 дата публикации

Temperature-controlled purge gate valve for chemical vapor deposition chamber

Номер: US20130327266A1
Автор: Chantal Arena, Christiaan Werkhoven
Принадлежит: Soitec SA

The present invention relates to methods and apparatus that are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the methods relate to substantially preventing the formation of unwanted materials on an isolation valve fixture within a chemical vapor deposition (CVD) reactor. In particular, the invention provides apparatus and methods for limiting deposition/condensation of GaCl 3 and reaction by-products on an isolation valve that is used in the system and method for forming a monocrystalline Group III-V semiconductor material by reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber.

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Номер записи: 98
12-12-2013 дата публикации

GALLIUM NITRIDE BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Номер: US20130328054A1
Автор: CHOI Hyo-ji, KIM Jae-kyun, KIM Jun-youn, LEE Jae-won, TAK Young-jo
Принадлежит: SAMSUNG ELECTRONICS CO., LTD.

A gallium nitride based semiconductor device includes a silicon-based layer doped simultaneously with boron (B) and germanium (Ge) at a relatively high concentration, a buffer layer on the silicon-based layer, and a nitride stack on the buffer layer. A doping concentration of boron (B) and germanium (Ge) may be higher than 1×10/cm. 1. A semiconductor device comprising:a silicon-based layer doped with boron (B) and germanium (Ge);a buffer layer on the silicon-based layer; anda nitride stack on the buffer layer.2. The semiconductor device of claim 1 , wherein a doping concentration of the boron (B) and the germanium (Ge) is higher than 1×10/cm.3. The semiconductor device of claim 1 , wherein the boron (B) and the germanium (Ge) are doped in the silicon-based layer such that a resistivity of the silicon-based layer is equal to or less than about 1 Ωcm.4. The semiconductor device of claim 1 , wherein the buffer layer has one of a single layer structure formed of one of AlN claim 1 , SiC claim 1 , AlO claim 1 , AlGaN claim 1 , AlInGaN claim 1 , AlInBGaN claim 1 , AlBGaN claim 1 , GaN claim 1 , and XY claim 1 , and a multi-layer structure thereof claim 1 , wherein X includes at least one of titanium (Ti) claim 1 , chromium (Cr) claim 1 , zirconium (Zr) claim 1 , hafnium (Hf) claim 1 , niobium (Nb) claim 1 , and tantalum (Ta) claim 1 , and Y is one of nitrogen (N) and boron (B claim 1 , B).5. The semiconductor device of claim 1 , wherein the nitride stack includes:a plurality of nitride semiconductor layers;at least one masking layer between the plurality of nitride semiconductor layers; andat least one intermediate layer between the plurality of nitride semiconductor layers.6. The semiconductor device of claim 5 , wherein the plurality of nitride semiconductor layers are formed of AlInGaN (where 0≦x claim 5 ,y≦1 claim 5 , x+y<1).7. The semiconductor device of claim 5 , wherein the at least one masking layer is formed of one of silicon nitride (SiNx) and titanium nitride ( ...

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Номер записи: 99
19-12-2013 дата публикации

SUPERLATTICE STRUCTURE, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

Номер: US20130334495A1
Автор: KIM Jae-kyun, KIM Joo-sung, LIM Dae-ho, TAK Young-jo
Принадлежит:

A superlattice structure, and a semiconductor device including the same, include a plurality of pairs of layers are in a pattern repeated at least two times, in which a first layer and a second layer constitute a pair, the first layer is formed of AlInGaN (where 0≦x and y≦1), the second layer is formed of AlInGaN (where 0≦a, b≦1 and x≠a), the first and second layers have the same thickness, and a total thickness of each of the plurality of pairs of layers is different than each other. 1. A superlattice structure , comprising:a plurality of pairs of layers in a pattern repeated at least two times,wherein a first layer and a second layer of the plurality of pairs of layers constitute a pair,{'sub': x', 'y', '1-x-y, 'the first layer is formed of AlInGaN (where 0≦x and y≦1),'}{'sub': a', 'b', '1-a-b, 'the second layer is formed of AlInGaN (where 0≦a, b≦1 and x≠a), and'}the first layer has a thickness equal to a thickness of the second layer, anda total thickness of each of the plurality of pairs of layers is different than each other.2. The superlattice structure of claim 1 , wherein the total thickness of each of the plurality of pairs of layers increases in a direction in which the plurality of pairs of layers are stacked.3. The superlattice structure of claim 2 , wherein the total thickness of each of the plurality of pairs of layers increases linearly in the direction in which the plurality of pairs of layers are stacked.4. The superlattice structure of claim 1 , wherein a composition ratio of aluminum (Al) in the first layer is greater than a composition ratio of Al in the second layer claim 1 , andwherein a composition ratio of Al in each layer in the plurality of pairs of layers decreases, or an average composition ratio of Al in each of the plurality of pairs of layers decreases, in a direction in which the plurality of pairs of layers are stacked.5. The superlattice structure of claim 4 , wherein a composition ratio of Al in each layer of the plurality of pairs ...

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