Monolithische integrierte Photonik mit lateralem Bipolar und Bicmos

Nach einem Bilden eines ersten Grabens, der sich durch eine obere Halbleiterschicht und eine vergrabene Isolator-Schicht hindurch und in ein Handhabungssubstrat eines Halbleiter-auf-Isolator(SOI)-Substrats hinein erstreckt, wird innerhalb des ersten Grabens ein Stapel aus Material für einen dielektrischen Wellenleiter gebildet, der eine untere dielektrische Mantelschicht, eine Kernschicht sowie eine obere dielektrische Mantelschicht beinhaltet. Als nächstes wird in einem verbliebenen Teilbereich der oberen Halbleiterschicht wenigstens ein lateraler Bipolartransistor (BJT) gebildet, der aus einem pnp-BJT, einem npn-BJT oder einem Paar von komplementären pnp-BJT und npn-BJT bestehen kann. Nach einem Bilden eines zweiten Grabens, der sich durch den Stapel aus Material für den dielektrischen Wellenleiter hindurch erstreckt, um einen Teilbereich einer Bodenfläche des ersten Grabens wieder freizulegen, wird in dem zweiten Graben eine Laserdiode gebildet.

Manufacturing method and device for thin flim transistor substrate

Disclosed are a method and equipment for manufacture of a thin film transistor substrate. In the method, after grids (31a, 31b) and a grid insulation layer (32) of a thin film transistor are formed, a semiconductor layer (33) and a first protection layer (34) are sequentially deposited; and after a first protection layer (34) is patterned, the patterned first protection layer (34) is used as a photomask to pattern the semiconductor layer (33), in order to form the semiconductor channel of the thin film transistor. In this way, the number of photomasks can be reduced, and the method and device is conducive to lower cost.

The liquid crystal display device and manufacturing method thereof

Display base plate and manufacturing method and display panel thereof

Array substrate and preparation method thereof, display device

An array substrate and method of making the same, display panel, display device

Flexible display panel and bending preparation method GOA area thereof

Based on IGZO - TFT liquid crystal panel of the BOA of the structure and the manufacturing method

METHOD FOR PRODUCING A DISPLAY DEVICE WITH LED MATRIX

METHOD OF RELIEVING [...] MECHANICAL CROSS IN THE ACTIVE REGION OF A MOS TRANSISTOR, AND AN INTEGRATED CIRCUIT ARRANGEMENT

Procédé de relaxation des contraintes mécaniques transversales dans la région active d'un transistor MOS (TR). Le procédé comprend une réalisation d'au moins une incitation (IN01,... IN07) isolante dans la région active du transistor séparant en deux parties chacune des régions de drain (RD01,..., RD08), de source (RS08,..., RS08) et de canal du transistor. L'invention concerne également le circuit intégré comprenant le transistor.

유리 기판의 제조 방법, 유리 기판 및 디스플레이용 패널

... 유리 기판의 제조 방법은, 유리 표면에 요철을 형성하는 표면 처리를 행하는 표면 처리 공정을 갖는다. 표면 처리 공정에서는, 유리 표면에, 그의 조도 곡선의 평균선으로부터의 높이가 1㎚ 이상인 볼록부가 분산되어 형성된다. 표면 처리 공정에서는, 볼록부 면적 비율이 0.5％ 내지 10％가 되도록 표면 처리가 행해진다. 볼록부 면적 비율은 임의의 직사각형 영역의 면적에서 차지하는 볼록부의 면적의 비율이다. 직사각형 영역은 1변의 길이가 1㎛인 정방형의 형상을 갖는다. 표면 처리 공정에서는, 정방형의 형상을 갖는 적어도 100개의 분할 영역으로 직사각형 영역이 균등하게 분할되는 경우에 있어서, 볼록부 함유 비율이 80％ 이상이 되도록 표면 처리가 행해진다. 볼록부 함유 비율은, 직사각형 영역에 포함되는 분할 영역의 수에서 차지하는, 볼록부를 갖는 분할 영역의 수의 비율이다.

DISPLAY DEVICE MAINTAINING A BENT STATE AND A MANUFACTURING METHOD THEREOF

PURPOSE: A display device and a manufacturing method thereof are provided to include a flexible display panel which is able to be steadily bent. CONSTITUTION: A display device(101) comprises a flexible display panel(100), functional plates(200,300), and a hardening resin layer(500). The flexible display panel indicates an image. The flexible functional plate is formed on the flexible display panel. The hardening resin layer is arranged between the flexible display panel and the functional plate. COPYRIGHT KIPO 2013 ...

Device, manufacturing method thereof, and electronic device

LOW TEMPERATURE POLY-SILICON TFT SUBSTRATE STRUCTURE AND MANUFACTURE METHOD THEREOF

A method for manufacturing a LTPS TFT substrate is provided. Buffer layers are respectively provided in a drive TFT area and a display TFT area and have different thicknesses, such that the thickness of the buffer layer in the drive TFT area is larger than the thickness of the buffer layer in the display TFT area so that different temperature grades are formed in a crystallization process of poly-silicon to achieve control of the grain diameters of crystals. A poly-silicon layer that is formed in the drive TFT area in the crystallization process has a large lattice dimension to increase electron mobility thereof. Fractured crystals can be formed in a poly-silicon layer of the display TFT area in the crystallization process for ensuring the uniformity of the grain boundary and increasing the uniformity of electrical current. Accordingly, the electrical property demands for different TFTs can be satisfied.

Array Substrate and Manufacturing Method Thereof, and Display Device

An array substrate and a manufacturing method thereof, and a display device. The array substrate includes: a base substrate, including a first surface and a second surface opposite to each other, and a through-hole penetrating the base substrate from the first surface to the second surface; a data line on the first surface of the base substrate, the data line being at least partially filled in the through-hole; a thin film transistor on the second surface of the base substrate, the thin film transistor including a source electrode and a drain electrode, and the source electrode being electrically connected to the data line ...

THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, ARRAY SUBSTRATE AND DISPLAY DEVICE

The present disclosure provides a Thin Film Transistor and a method for manufacturing the same, an array substrate and a display device, so as to increase on-state currents of the Thin Film Transistor and improve current characteristics of the Thin Film Transistor. The Thin Film Transistor includes a base substrate, a gate insulating layer and a gate disposed above the base substrate; wherein a conductive layer is also disposed between the gate insulating layer and the gate; wherein the projection of the conductive layer on the base substrate is larger than the projection of the gate on the base substrate.

DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE

The present application proposes a display panel, a manufacturing method for the display panel, and a display module. The display panel includes an array substrate. The array substrate includes a substrate and a thin film transistor and a storage capacitor on the substrate. The storage capacitor includes a first electrode on the substrate, a first insulating layer on the first electrode, a second electrode on the first insulating layer, a second insulating layer on the second electrode, and a third electrode on the second insulating layer. An orthogonal projection of the second electrode on the second insulating layer is on the second insulating layer.

Thin film transistor array substrate, display apparatus, and method of manufacturing thin film transistor array substrate

A thin film transistor array substrate includes: a first conductive layer including first lines for transmitting data signals to the thin film transistors; a second conductive layer disposed on the first conductive layer and including second lines for supplying a driving voltage to the thin film transistors; a first insulating layer disposed between a semiconductor layer and the first conductive layer and including a first material layer; a second insulating layer disposed between the first conductive layer and the second conductive layer and including a second material layer having a dielectric constant greater than that of the first material layer; and a contact plug penetrating the second insulating layer and the first insulating layer, and connecting the second conductive layer to the semiconductor layer. A taper angle of the contact plug in the second material layer is greater than that of the contact plug in the first material layer.

Driving substrate and display device

A driving substrate includes: a protective layer including an etching surface; and a film layer including one or more convex portions on a surface thereof, the film layer being in contact with a rear surface of the protective layer, the one or more convex portions each having a surface being flush with the etching surface.

Semiconductor device and method for manufacturing the same

A semiconductor device includes a pixel electrode and a transistor which includes a first gate electrode, a first insulating layer over the first gate electrode, a semiconductor layer over the first insulating layer, a second insulating layer over the semiconductor layer, and a second gate electrode. The pixel electrode and the second gate electrode are provided over the second insulating layer. The first gate electrode has a region overlapping with the semiconductor layer with the first insulating layer provided therebetween. The second gate electrode has a region overlapping with the semiconductor layer with the second insulating layer provided therebetween. A first region is at least part of a region where the second gate electrode overlaps with the semiconductor layer. A second region is at least part of a region where the pixel electrode is provided. The second insulating layer is thinner in the first region than in the second region.

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

The present disclosure provides an array substrate. The array substrate includes a plurality of shielding layers disposed on a glass substrate and arranged at intervals; a dielectric layer spread on the glass substrate and covering the shielding layers, wherein the dielectric layer includes a plurality of dielectric patterns, the dielectric patterns include main dielectric patterns and auxiliary dielectric patterns disposed on at least one side of the main dielectric patterns; and a gate insulating layer disposed on the dielectric layer.

DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

A display apparatus includes a substrate partitioned into a central area and a peripheral area disposed adjacent to the central area. The central area includes a display area; a first insulating layer corresponding to the peripheral area of the substrate; at least one slit corresponding to a region of the first insulating layer; and a cladding layer, which covers the at least one slit, on the first insulating layer.

DISPLAY DEVICE AND TILED DISPLAY DEVICE INCLUDING THE SAME

Provided is a display device. The display device comprises a first substrate, wherein a first contact hole is defined in the first substrate, a barrier layer on the first substrate, wherein a second contact hole is defined in the barrier layer and connected to the first contact hole, a first connection line on the barrier layer and inserted into the second contact hole, a second substrate covering the first connection line and the barrier layer, and a thin-film transistor layer on the second substrate and including at least one thin-film transistor. The thin-film transistor layer further includes a second connection line connected between the first connection line and the at least one thin-film transistor. 1. A display device comprising:a first substrate, wherein a first contact hole is defined in the first substrate;a barrier layer disposed on the first substrate, wherein a second contact hole is defined in the barrier layer and is connected to the first contact hole;a first connection line disposed on the barrier layer and inserted into the second contact hole;a second substrate covering the first connection line and the barrier layer; anda thin-film transistor layer disposed on the second substrate and including at least one thin-film transistor,wherein the thin-film transistor layer further has a second connection line connected between the first connection line and the at least one thin-film transistor.2. The display device of claim 1 , wherein the thin-film transistor layer further includes:a gate insulating layer disposed on the second substrate; andan interlayer insulating film disposed on the gate insulating layer,wherein the second connection line is disposed on the interlayer insulating film and connected to the first connection line through a third contact hole passing through the interlayer insulating film, the gate insulating layer and the second substrate.3. The display device of claim 1 , wherein the first and second substrates include polyimide ...

DISPLAY APPARATUS HAVING A SUBSTRATE INCLUDING A POLYMER RESIN AND METHOD OF MANUFACTURING THE SAME

A display apparatus includes a substrate including a polymer resin. A portion of the substrate including an upper surface of the substrate is doped with 1×1020 to 1×1023 dopants per 1 cm3. A barrier layer is positioned above the upper surface of the substrate. A buffer layer is positioned above the barrier layer. A thin film transistor is positioned above the buffer layer. A display device is electrically connected to the thin film transistor.

Thin film transistor and a manufacturing method thereof, array substrate and a manufacturing method thereof, display device

A thin film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display device are disclosed. The manufacturing method of the array substrate includes depositing an amorphous silicon thin film layer on a base substrate; performing a patterning process on the amorphous silicon thin film layer, so as to form a pattern with multiple small pores at a surface of the amorphous silicon thin film layer. With this method, when a laser annealing treatment of amorphous silicon is performed, the molten silicon after melting fills the space of small pores at a surface of the amorphous silicon thin film layer firstly, thereby avoiding forming a protruded grain boundary that is produced because the excess volume of polysilicon is squeezed.

Array substrate and method of manufacturing the same

The present application provides an array substrate and a method of manufacturing the same. The array substrate includes a first substrate having a drain electrode protruding from a side of the first substrate; a planarization layer at the side of the first substrate where the drain electrode protrudes, the planarization layer being provided with a stepped hole on the drain electrode, and a diameter of the stepped hole decreasing along a direction from a side of the planarization layer facing away the first substrate towards a side of the planarization layer facing the first substrate; a pixel electrode at the stepped hole and connected with the drain electrode; a passivation layer covering the planarization layer and the pixel electrode; and a common electrode on the passivation layer.

Light emitting structure

A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.

Pixel structure and fabricating method thereof

A pixel structure includes a scan line, a data line, a bump, an active device, and a pixel electrode electrically connected to the active device. The active device includes a gate, a semiconductor layer, a gate insulation layer between the gate and the semiconductor layer, a source, and a drain. The bump has a top surface and side surfaces in periphery of the top surface. The gate covers the bump and electrically connects the scan line. The semiconductor layer is on the top surface and the side surfaces. The source is on at least one of the side surfaces, in contact with the semiconductor layer, and electrically connected to the data line. The drain is on the top surface and in contact with the semiconductor layer, and the drain does not cover the semiconductor layer on a corner section of the bump between the top surface and the side surfaces.

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THEREOF, AND DISPLAY DEVICE

The present invention discloses an array substrate and a method for manufacturing thereof, and a display device, wherein the method comprises: preparing a laminated structure and an anodic layer on a substrate sequentially; preparing a photoresist layer with a receiving cavity and a concave structure on the laminated structure and the anode layer; preparing an organic light emitting device in the receiving cavity; and preparing a reflective cathode layer on the organic light emitting device and the photoresist layer. By the above-described manner, the present invention can avoid the light leakage phenomenon caused by the reflective cathode layer and enhance panel display quality.

Array substrate and the preparation method thereof, liquid crystal panel

The present invention discloses an array substrate, which comprises a substrate; a gate line and a gate connected to the gate line on the substrate; a first insulating layer covering the gate line and the gate; an active layer on the first insulating layer; an organic layer on the first insulating layer, which exposes the active layer; a source, a drain, and a data line connected with the source on the organic layer, the source and the drain being respectively connected with the active layer, the data line and the gate line being overlapped; a second insulating layer covering the source, the drain, the data line, and the active layer; a contact hole in the second insulating layer, the contact hole exposing the drain; and a pixel electrode on the second insulating layer, the pixel electrode being contacted with the drain through the contact hole.

DISPLAY PANEL AND MANUFACTURING METHOD THEREOF

The display panel includes a first substrate, first signal lines, second signal lines, third signal lines, thin film transistors, pixel electrodes, and at least one driving circuit. The first signal lines respectively intersect with the second signal lines to define multiple pixel regions. At least one of the pixel regions has one of the third signal lines diposed therein. The second signal lines and the third signal lines are electrically connected to the at least one driving circuit. Each of the first signal lines is electrically connected to one of the gate and the source of at least one of the thin film transistors. Each of the second signal lines is electrically connected to the other one of the gate and the source of at least one of the thin film transistors. Each of the third signal lines is electrically connected to one of the first signal lines.

Thin film transistor array substrate and method of manufacturing the same

A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer.

Manufacturing method of TFT substrate, TFT substrate, and OLED display panel

This disclosure discloses a manufacturing method of a TFT substrate, a TFT substrate, and an OLED display panel. The manufacturing method of the TFT substrate includes sequentially forming a gate electrode, a gate insulating layer, a polysilicon layer, and a barrier layer on the substrate, the polysilicon layer including a source region, a drain region, and a channel region; the barrier layer above the source and drain regions is etched by a photomask so that the thickness of the barrier layer allows ions to pass through and is not zero; and then the polysilicon layer is ion implanted; through the method, the polysilicon layer of the source and drain regions can be ion implanted without exposing the polysilicon layer, the damage of the polysilicon layer during the process can be avoided, and the stability of the TFT substrate can be improved, thereby improving the display quality.

Array substrate and manufacturing method thereof

The present invention provides an array substrate and a manufacturing method thereof. The array substrate of the present invention includes: a base plate (1), a TFT layer (2) arranged on the base plate (1), a quantum dot layer (3) arranged on the TFT layer (2), and a protective filter layer (4) arranged on the quantum dot layer (3). The arrangement of the quantum dot layer (3) helps compensate the insufficiency of color displaying of an existing color filter layer and expands the range of color gamut. The arrangement of the protective filter layer (4) helps overcome the issues of poor efficiency and stability of the prior art quantum dot.

ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING SAME

The present disclosure provides an array substrate and a method for manufacturing the same. By disposing hybrid TFT on the substrate which includes disposing an oxide TFT in a display driving area and disposing an LTPS TFT in a non-display driving area, not only can a driving current of an LCD gate driving circuit be improved, but a leakage current can also be diminished when LCD display pixels are driven. When manufacturing a hybrid TFT structure, a second active layer in the display driving area is disposed on a first active layer, and a semiconductor insulation layer is disposed between the first active layer and the second active layer, so that patterns of the first active layer and the second active layer can be formed by etching through one mask during an etching process, thus reducing manufacturing cost.

Array substrate, display panel and method of manufacturing the same

The present application relates to an array substrate, a display panel and a method of manufacturing the same, the array substrate comprising a substrate, a plurality of active switches, a color filter layer, a spacer unit layer, and an electrode layer formed on the color filter layer and the spacer unit layer.

Display device and method of manufacturing the same

A display device includes a pixel circuit, a first insulating layer covering the pixel circuit, a first electrode disposed on the first insulating layer, a second electrode disposed on the first insulating layer and spaced apart from the first electrode in a first direction, and a light emitting element electrically connected to the first electrode and the second electrode and disposed between the first electrode and the second electrode. A recess is provided in a first region of the first insulating layer between the first electrode and the second electrode when viewed in a plan view, and a width of the recess in the first direction is greater than a length of the light emitting element in the first direction. The first electrode and the second electrode do not overlap the recess when viewed in a plan view.

Display panel and method of fabricating the same

A display panel includes a base layer having a first region and a bent second region. An inorganic layer is disposed on the base layer. A lower groove is formed within the inorganic layer and overlaps the second region. A first thin-film transistor is disposed on the inorganic layer and includes a silicon semiconductor pattern overlapping the first region. A second thin-film transistor is disposed on the inorganic layer and includes an oxide semiconductor pattern overlapping the first region. Insulating layers overlap the first and second regions. An upper groove is formed within the insulating layers. A signal line electrically connects the second thin-film transistor. An organic layer overlaps the first and second regions and is disposed in the lower and upper grooves. A luminescent device is disposed on the organic layer and overlaps the first region.

DISPLAY MODULE INCLUDING GLASS SUBSTRATE HAVING SIDE WIRINGS, AND DISPLAY MODULE MANUFACTURING METHOD

A display module includes a glass substrate having a TFT layer and a driver circuit disposed on surfaces thereof, LEDs electrically connected to the TFT layer; first connection pads formed in an edge region of the front surface; second connection pads formed in an edge region of the rear surface; and side wirings in recessed grooves arranged at intervals on a side of the glass substrate so that the side wirings are located at concave positions from the side of the glass substrate, the side wirings electrically connecting the first and second connection pads, wherein the first and second connection pads are spaced a predetermined distance inward from the side of the glass substrate, and the recessed grooves are arranged so that opposite ends of the recessed grooves are located at positions corresponding to the first and second connection pads, respectively.

ＳＯＩ基板の作製方法

ДИСПЛЕЙНОЕ УСТРОЙСТВО И ЭЛЕКТРОННОЕ УСТРОЙСТВО

Manufacture method of IPS TFT-LCD array substrate and IPS TFT-LCD array substrate

Array substrate, display panel, and manufacturing method for array substrate

Array substrate, display panel, and manufacturing method for array substrate

An array substrate (10), display panel (1), and a manufacturing method for the array substrate (10); the array substrate (10) having a plurality of low-temperature polysilicon thin film transistors in a matrix, the array substrate (10) comprising: a substrate (101); a low-temperature polysilicon layer (104) disposed on the same surface as the substrate (101), a source electrode (107), a drain electrode (108) and a first conductive layer (112); the low-temperature polysilicon layer (104) is disposed at the middle of a surface of the substrate (101), the source electrode (107) and the drain electrode (108) are disposed at two sides of the low-temperature polysilicon layer (104), one end of the source electrode (107) is electrically connected to one end of the low-temperature polysilicon layer (104), one end of the drain electrode (108) is electrically connected to another end of the low-temperature polysilicon layer (104), and another end of the drain electrode (108) is electrically connected ...

Integrated circuit manufacturing process

A process for manufacturing a plurality of Integrated Circuits (ICs) comprising: depositing a flexible substrate of uniform thickness on a carrier 1; patterning the substrate to define IC areas; removing a portion of the thickness of the substrate between the IC areas to form channels 11 separating a plurality of IC substrate units 5; and, forming an IC 9 directly on top of at least one of the IC substrate units. A portion of the IC may be formed on the IC areas prior to the removing step. The removing step may involve removing the entire thickness, a partial thickness or defining perforation lines. The edge of the IC units may comprise indentations. The substrate may comprise a layered structure of two polymers spaced apart by an interlayer. The IC units may be singulated by releasing them from the carrier.

Display substrate, manufacturing method thereof and display device comprising display substrate

Semiconductor device and display device

TRANSPARENT SUBSTRATE WITH LIGHT BLOCKING EDGE EXCLUSION ZONE

Embodiments of the present disclosure generally relate to an optically transparent substrate, comprising a major surface having a peripheral edge region with an orientation feature formed therein, and a texture formed on the peripheral edge region, the texture having an opacity that is greater than an opacity of the major surface.

반도체 장치 및 반도체 장치의 제조 방법

... 본 발명의 일 목적은 반도체 장치의 제조 코스트를 저감하는 것이다. 본 발명의 일 목적은 반도체 장치의 개구율을 향상시키는 것이다. 본 발명의 일 목적은 반도체 장치의 표시부가 보다 고해상의 화상을 표시하도록 하는 것이다. 또한, 본 발명의 일 목적은 고속 구동이 가능한 반도체 장치를 제공하는 것이다. 반도체 장치는 1개의 기판 위에 구동 회로부와 표시부를 포함한다. 상기 구동 회로부는, 소스 전극 및 드레인 전극은 금속을 이용하여 형성되고 채널 층은 산화물 반도체를 이용하여 형성된 구동 회로용 TFT와, 금속을 이용하여 형성된 구동 회로용 배선을 포함한다. 상기 표시부는, 소스 전극 및 드레인 전극은 산화물 도전체를 이용하여 형성되고 반도체층은 산화물 반도체를 이용하여 형성된 화소용 TFT와, 산화물 도전체를 이용하여 형성된 표시부용 배선을 포함한다.

DISPLAY DEVICE

The present invention relates to a display device having flexibility. According to the present invention, the display device has a flexible substrate on which a thin film transistor is disposed. The flexible substrate has a plurality of organic films and at least one conductive film disposed between the organic films so that the flexible substrate can secure elasticity and rigidity. Therefore, the flexible substrate can be applied to the display device. COPYRIGHT KIPO 2018 ...

ORGANIC LIGHT EMITTING DISPLAY DEVICE INCLUDING MULTI-TYPE THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING ORGANIC LIGHT EMITTING DISPLAY DEVICE

The present invention relates to an organic light emitting display including a multi-type thin film transistor. The organic light emitting display device of the present invention includes a substrate defined by a display region and a non-display region, an LTPS thin film transistor and an oxide semiconductor thin film transistor located on the display region, the active layer of an oxide semiconductor thin film transistor disposed on the substrate, a shield layer which completely covers the active layer to prevent the exposure of the active layer, and a source electrode and a drain electrode of the LTPS thin film transistor disposed on the active layer of the LTPS thin film transistor. The source electrode and the drain electrode of the LTPS thin film transistor, and the active layer of the oxide semiconductor thin film transistor are arranged on different planes. It is possible to prevent severe damage to an oxide semiconductor layer. COPYRIGHT KIPO 2018 ...

Display device and method of manufacturing the same

TFT array substrate manufacturing method and display device manufacturing method

Flexible substrate

A flexible substrate which is highly flexible and has excellent gas barrier properties. A flexible substrate (100) is provided with a base (20) composed of inorganic glass (10) and resin layers (11, 11') arranged on opposite sides, respectively, of the inorganic glass (10), and also with an inorganic thin film (12) provided to that side of one (11) of the resin layers (11, 11') to which the inorganic glass (10) is not provided. The inorganic thin film (12) is formed on the peripheral edge of at least one side of the base (20).

Method for fabricating thin film transistor of liquid crystal display device

A method for fabricating a thin film transistor for an LCD device is presented that uses six mask processes. Portions of a semiconductor layer formed on a substrate are doped with first and second impurities in different regions. A conductive layer is deposited and the conductive and semiconductor layers patterned together by diffraction exposure using a diffraction pattern mask to define source and drain regions and an activate region. Ashing is performed and portions of the conductive layer removed to form the source, drain and channel. A gate insulating layer is formed on the substrate and gates are formed on the gate insulating layer. A passivation film is formed on the substrate and a pixel contact hole exposing one of the drains is etched. A pixel electrode is then deposited such that the pixel electrode is connected to the drain through the pixel contact hole.

Display device and method of manufacturing the same

DISPLAY SUBSTRATE, METHOD OF MANUFACTURING DISPLAY SUBSTRATE, AND DISPLAY DEVICE INCLUDING DISPLAY SUBSTRATE

A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.

METHOD OF MANUFACTURING FLEXIBLE DISPLAY DEVICE

Disclosed is a flexible display device and method of manufacturing the same in which a method of manufacturing a flexible display device may include forming a sacrificial layer on a support substrate, the sacrificial layer including at least one barrier layer and a separation layer, the barrier layer having a higher hydrogen content than that of the separation layer; forming a first flexible substrate on the support substrate provided with the sacrificial layer; forming a plurality of device elements on the first flexible substrate; and irradiating a laser onto the sacrificial layer through the support substrate and separating the support substrate from the first substrate.

SEMICONDUCTOR DEVICE AND ACTIVE MATRIX SUBSTRATE USING SEMICONDUCTOR DEVICE

According to one embodiment, a semiconductor device includes an insulating substrate including a pixel area and a peripheral circuit area around the pixel area, a first insulating layer which is provided on the insulating substrate and includes at least nitrogen, a second insulating layer at least provided on the first insulating layer of the peripheral circuit area, a first thin-film transistor which is provided above the first insulating layer of the pixel area and includes a first oxide semiconductor layer, and a second thin-film transistor which is provided on the second insulating layer of the peripheral circuit area and includes a second oxide semiconductor layer. The second insulating layer in the pixel area is thinner than that in the peripheral circuit area.

Display panel including roof layer having reduced thickness at opening thereof, and method of manufacturing the same

A display panel includes a substrate, a gate line, a color filter and a roof layer. The substrate includes a thin film transistor disposed thereon. The gate line extends along a first direction on the substrate and is connected to the thin film transistor. The color filter is disposed on the substrate. The roof layer is disposed on the color filter and is configured to define a tunnel-shaped cavity between the roof layer and the color filter. The tunnel-shaped cavity extends along a second direction crossing the first direction. A cross-sectional thickness of an area of the roof layer adjacent to the gate lines is smaller than a cross-sectional thickness of another area of the roof layer spaced apart from the gate lines.

Method of manufacturing display panel substrate

A method of manufacturing a display panel substrate includes a transparent conductive film formation step of forming a transparent conductive film on a flattening film that covers a switching component disposed on a substrate, a metallic film formation step of forming a metallic film so as to cover the transparent conductive film after the transparent conductive film formation step, a line formation step of forming a line by etching the metallic film after the metallic film formation step, and a transparent electrode formation step of forming a transparent electrode that is connected to the line by etching the transparent conductive film after the wire formation step.

Liquid crystal display device comprising an alignment film that includes a first alignment film formed of a precursor of polyamide acid or polyamide acid ester and a second alignment film underlying the first alignment film wherein the first alignment film accounts for between 30% and 60% of the alignment film

This invention enables forming a photo-alignment film having a large LC anchoring strength in an IPS type liquid crystal display device. An alignment film is adapted to have a two-layer structure including a photo-alignment film and an alignment film with enhanced film strength. The photo-alignment film is formed of a precursor of polyamide acid ester, 80 percent or more of which is polyamide acid ester including cyclobutane. The alignment film with enhanced film strength is formed of a precursor of polyamide acid. After irradiating the substrate with ultraviolet light for photo-alignment, the substrate is heated. Thus, it is possible to achieve a high LC anchoring strength of the alignment film as the whole for photo-alignment, without degrading the mechanical strength of the alignment film with enhanced film strength.

Display device and method for manufacturing the same

A method for producing a display device includes locating a substrate, including a plurality of pixels, on a jig including a magnet; locating a plate formed of a magnetic material on the substrate to secure the substrate; and folding back an end portion of the substrate in a state where the substrate is held between the jig and the plate.

ARRAY SUBSTRATE AND MANUFACTURE METHOD THEREOF, LIQUID CRYSTAL DISPLAY PANEL

The disclosure provides an array substrate, including a substrate, a common line, a separation layer, a gate line layer, a first insulation layer, a data line layer, a second insulation layer, a first transparent electrode, a third insulation layer and a second transparent electrode overlapped in sequence, a first via hole is defined in the separation layer, a second via hole is defined in the first insulation layer, a third via hole and a fourth via hole communicated with the second via hole are defined in the second insulation layer, the first transparent electrode penetrates the first via hole, the second via hole and the fourth via hole to connect with the common line, a fifth via hole communicated with the third via hole is defined in the third insulation layer, the second transparent electrode is connected to the data line layer.

Liquid crystal display device and method for manufacturing the same in which a light shielding layer is over the gate electrode or a gate electrode is in a trench

A liquid crystal display device includes a substrate, a gate electrode on the substrate, a light shielding layer over the gate electrode and the substrate, an insulating layer over the light shielding layer and the substrate, a semiconductor layer having a channel region on the insulating layer over the gate electrode, source and drain electrodes over first and second portions of the semiconductor layer, respectively, and an ohmic contact layer between the semiconductor layer and each of the source and drain electrodes.

THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Method of manufacturing flexible display

A method of manufacturing a flexible display is disclosed. In one aspect, the method includes attaching a protective film to a flexible display panel. The flexible display panel includes a bending region along which the flexible display panel is configured to be bent. The method also includes removing a portion of the protective film that corresponds to the bending region and bending the flexible display panel along the bending region.

MICRO LED DISPLAY DEVICE AND METHOD FOR MANUFACTURING SAME

The present application relates to a micro LED display device and, a method for manufacturing the same. The method includes the following steps. First, a plurality of LED chips are formed on a supplying substrate. Next, a first substrate defining a plurality of groups of printed circuits is provided. Then the supplying substrate is overlaid in an inverted manner on the first substrate in such a manner that the LED chips are aligned with and attached onto the groups of printed circuits correspondingly. After the LED chips are detached from the supplying substrate, the supplying substrate is removed. Then a sol-gel glass is filled into gaps among the LED chips. Finally a second substrate is bonded with the first substrate. The present disclosure is capable of improving the yield rate and the reliability.

Array substrate and manufacturing method thereof, display panel, and display device

There is provided an array substrate, a manufacturing method therefor, a display panel, and a display device. The array substrate includes: a base substrate, and a gate metal pattern, a gate insulating layer and a source-drain metal pattern which are sequentially disposed on the base substrate. The gate metal pattern includes a signal line and a gate electrode, the signal line is in the peripheral area, the gate insulating layer is provided with a first via hole penetrating the gate insulating layer, the orthogonal projection of the first via hole on the base substrate and the orthogonal projection of the signal line on the base substrate have an overlapping area, the source-drain metal pattern includes a source-drain electrode wire, and the source-drain electrode wire is electrically connected to the signal line through the first via hole. The present disclosure achieves the function of protecting the signal line.

DISPLAY PANEL, ARRAY SUBSTRATE AND MANUFACTURING METHOD FOR THE SAME

A display panel, an array substrate and a manufacturing method are disclosed. The method includes steps of: providing a substrate; disposing a thin-film transistor on the substrate; disposing R color resist layer, G color resist layer, a blue B color resist layer and a white W color resist layer on the thin-film transistor; forming a planarization layer on the R color resist layer, the G color resist layer, the B color resist layer and the W color resist layer, and through a multi-tone mask to form a first protection layer, a spacer layer and a vias having different thicknesses. The present invention forms the first protection layer, the spacer layer and the vias only through one process so as to reduce the manufacturing process to reach the purpose of simplifying the process. Besides, the present invention also manufactures a W color resist layer to increase the transmittance and brightness. 1. A manufacturing method for an array substrate , comprising steps of:providing a substrate;disposing a thin-film transistor on the substrate;disposing a red (R) color resist layer, a green (G) color resist layer, a blue (B) color resist layer and a white (W) color resist layer on the thin-film transistor;forming a planarization layer on the R color resist layer, the G color resist layer, the B color resist layer and the W color resist layer, and through a multi-tone mask to form a first protection layer, a spacer layer and a vias, wherein, the first protection layer, the spacer layer and the vias have different thicknesses.2. The manufacturing method according to claim 1 , wherein claim 1 , the step of disposing a thin-film transistor on the substrate comprises steps of:sequentially disposing a gate electrode layer, a gate insulation layer, a semiconductor layer, a source electrode layer, a drain electrode layer and a second protection layer in a stacked arrangement;wherein, the vias reveals the source electrode layer or the drain electrode layer;wherein, the method further ...

Flexible substrate with electronic devices formed thereon

A method of manufacturing an electronic device (10) provides a substrate (20) that has a plastic material. A particulate material (16) is embedded in at least one surface of the substrate. A layer of thin-film semiconductor material is deposited onto the substrate (20).

DISPLAY DEVICE AND PRODUCTION METHOD THEREOF

A display device includes gate lines, data lines, pixel electrodes, thin film transistors each of which is disposed near each of intersection portions of the data lines and the gate lines, a slope signal generator and a voltage adjuster. The slope signal generator that generates a slope signal to generate a falling waveform of a gate signal, the slope signal including a first voltage change period and a second voltage change period, the first voltage change period being sloped from a first voltage at which the thin film transistors are put into an on state to a second voltage lower than the first voltage, the second voltage change period being sloped from the second voltage to a third voltage at which the thin film transistors are put into an off state; and the voltage adjuster that adjusts the second voltage.

THIN FILM TRANSISTOR, MANUFACTURING METHOD OF THE SAME, AND DISPLAY DEVICE WITH THE THIN FILM TRANSISTOR

A thin film transistor includes an insulating pattern disposed on a substrate, a gate electrode disposed on the insulating pattern, a gate insulating layer disposed on the gate electrode, a semiconductor layer disposed on the gate insulating layer, and a source electrode and a drain electrode, the source electrode and the drain electrode being disposed on the semiconductor layer and distanced apart from each other. The gate electrode surrounds an upper surface and a side surface of the insulating pattern and overlaps a first portion of a substrate surface.

METHOD FOR MANUFACTURING DISPLAY APPARATUS, DISPLAY APPARATUS, AND TERMINAL

Provided are a method for manufacturing a display apparatus, a display apparatus, and a terminal, pertaining to the field of displays. The display apparatus includes a flexible substrate, the flexible substrate including a first face and a second face that are opposite to each other, a display element being on the first face, a protective film layer being on the second face. The method includes: providing a mask; and irradiating towards one side of the protective film layer away from the flexible substrate through the mask by using light to form a groove on the protective film layer, such that the flexible substrate is bendable in a region corresponding to the groove.

THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR PRODUCING THIN FILM TRANSISTOR SUBSTRATE

Cracking or chipping in a substrate can be prevented while improving durability of a TFT with respect to external force caused by bending, winding, and the like. In a flexible substrate, a recessed portion is formed in a second surface opposite to a first surface in which a thin film transistor is formed, and the recessed portion is disposed at a position not overlapping with the thin film transistor as viewed in a first direction substantially orthogonal to the first surface.

ARRAY SUBSTRATE AND FABRICATION METHOD THEREOF, AND DISPLAY DEVICE

An array substrate includes a base substrate, a transistor on the base substrate, a planarization layer on a side of the transistor away from the base substrate, a recessed portion on the planarization layer, and a light blocking portion in the recessed portion. The light blocking portion is configured to prevent a light from being incident upon an active layer.

Thin film transistor having gate insulating layer including different types of insulating layers, method of manufacturing the same, and display device comprising the same

A thin film transistor includes an active layer on a substrate, a gate electrode configured to be spaced from the active layer and partially overlapped with the active layer, and a gate insulating layer, at least a part of the gate insulating layer being disposed between the active layer and the gate electrode, wherein the gate insulating layer includes a first gate insulating layer between the active layer and the gate electrode, and a second gate insulating layer configured to have a dielectric constant (k) which is different from a dielectric constant of the first gate insulating layer, and disposed in a same layer as the first gate insulating layer, and wherein at least a part of the second gate insulating layer is disposed between the active layer and the gate electrode.

Organic light emitting diode display, driving method thereof, and manufacturing method thereof

An organic light emitting diode display includes a semiconductor pattern which includes a plurality of channel regions. A first gate insulating layer is on the semiconductor pattern, a first gate conductive layer is on the first gate insulating layer, a second gate insulating layer is on the first gate conductive layer, and a second gate conductive layer is on the second gate insulating layer. The channel regions include a first channel region that overlaps the first gate conductive layer and a second channel region that does not overlap the first gate conductive layer. The first channel region and the second channel region have different doping concentrations.

Z-INVERSION TYPE DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To provide a semiconductor device that reduces the manufacturing cost thereof, reduces an aperture ratio, causes a display device thereof to have high definition and achieves a high-speed driving. SOLUTION: The semiconductor device has a drive circuit and a display unit provided on the same substrate. The drive circuit may have a TFT for drive circuit in which a source electrode and a drain electrode are made of metal and a channel layer is made of an oxide semiconductor, and a wiring for drive circuit which is made of metal. Also, the display unit may have a TFT for pixel in which a source electrode and a drain electrode are formed of an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a wiring for display unit which is formed of an oxide conductor. COPYRIGHT: (C)2011,JPO&INPIT ...

Liquid crystal panel and manufacturing method therefor

A curved liquid crystal panel and a manufacturing method therefor are provided. The curved liquid crystal panel includes an array substrate (10) provided with thin film transistors (11), and a color filter substrate (20) provided with main spacers (23) and sub spacers (24). The main spacers (23) and the thin film transistors (11) are oppositely arranged. The segment differences between the sub spacers (24) and the main spacers (23) are gradually decreased from the middle of the liquid crystal panel to the edge. The area between the two substrates (10, 11) is filled with liquid crystal and is sealed. The segment differences of unequal height between the main spacers (23) and the sub spacers (24) are designed, so that the decline of optical taste due to the fact that box thickness of the curved liquid crystal panel in different areas is uneven is prevented.

Manufacturing method for IPS TFT-LCD array substrate, and IPS TFT-LCD array substrate

A manufacturing method for a TFT-LCD array substrate: manufacturing pixel electrodes (17) and common electrodes (18) using the same layer of transparent electrically conductive material, an insulating protection layer (16) below the pixel electrodes (17) and the common electrodes (18) being provided with a plurality of parallel strip-shaped channels (162), the pixel electrodes (17) and the common electrodes (18) being alternately distributed on bosses along the two sides of the channels in each pixel region, and extending onto the side walls of the channels (162), thereby greatly increasing the area of the pixel electrodes (17) and the common electrodes (18) in the direction perpendicular to the substrate, increasing the horizontal electric field, and increasing the storage capacitance, thus improving the display quality of the liquid crystal panel.

Manufacturing method for IPS TFT-LCD array substrate, and IPS TFT-LCD array substrate

Integrated circuit manufacturing process

An array substrate and manufacturing method thereof, display device

Electric connection structure, manufacturing method, TFT array substrate and preparation method thereof

Array substrate, display panel and fabrication method

Thin film transistor, manufacturing method thereof, array substrate and manufacturing method thereof

Display apparatus and method of manufacturing the same

Array substrate and its manufacturing method

An array substrate and manufacturing method thereof, display device

The low-temperature polysilicon TFT substrate structure and its manufacturing method

표면조화방법

... 본 발명은, 기판 상에 또는 기판보다 상방의 층 상에 무기입자(a1)와 유기수지(a2)를 포함하는 조성물(a3)을 도포하고 건조와 경화를 행해 유기수지층(A)을 형성하는 제1 공정과, 이 기판의 상방으로부터 에칭을 행해 동일기판의 표면을 조화하는 제2 공정을 포함하는 표면조화방법에 관한 것이다.

어레이 기판과 그 제조 방법, 및 표시 장치

... 어레이 기판은 베이스 기판(10)과 이 베이스 위에 제공된 게이트 라인(11) 및 데이터 라인(12)을 포함하고, 게이트 라인(11)과 데이터 라인(12)은 화소 단위를 정의하고, 이 화소 단위에, 박막 트랜지스터(13)가 제공되고, 이 박막 트랜지스터(13)는 게이트 전극(131), 게이트 절연층(132), 활성층(133), 소스 전극(134) 및 드레인 전극(135)을 포함한다. 게이트 전극(132)은 제1 게이트 절연 부분(1321)과 제2 게이트 절연 부분(1322)을 포함하고, 게이트 전극(131)은 제1 게이트 절연 부분(1321)과 제2 게이트 절연 부분(1322) 사이에 위치하고, 제2 게이트 절연 부분(1322)은 게이트 전극(131)과 활성층(133) 사이에 위치한다. 어레이 기판은 도전성 패드(114)를 더 포함하고, 이 도전성 패드(114)에 대응하는 제1 비아(15)가 게이트 라인(11)의 양쪽에 게이트 절연층(132)에 제공되고, 데이터 라인(12)은 제1 비아(15)를 통하여 도전성 패드(114)에 연결된다. 어레이 기판은 표시 장치의 해상도, 분해능 및 개구율을 향상시킬 수 있다. 어레이 기판의 제조 방법 및 그러한 어레이 기판을 포함하는 표시 장치도 개시되어 있다.

DISPLAY APPARATUS AND METHOD FOR MANUFACTURING SAME

An embodiment of the present invention relates to a display device which includes a center region having at least a display region on a substrate, and a peripheral region arranged around the center region. The display device includes a first insulating layer which corresponds to at least the peripheral region on the substrate, a slit which corresponds to the peripheral region of the insulating layer, and a cladding layer which is formed on the first insulating layer to cover the slit. So, image quality can be improved. COPYRIGHT KIPO 2016 ...

Nonplanar display device and method of manufacturing the same

In one embodiment, a nonplanar display devise includes an array substrate and a counter substrate formed of non-glass material. The array substrate includes a polishing stopper layer formed on a glass substrate. A ground layer is formed on a polishing layer. A switching element is arranged on the ground layer, and a pixel electrode is connected to the switching element. The nonplanar display device is manufactures as follows. First, the glass substrate is removed from the display cell. Then, the polishing stopper layer of the array substrate is removed. Finally, the nonplanar display device is manufactured by attaching an exposed ground layer of the array substrate and an insulating layer formed of the non-glass material in the display cell.

Display device structure and manufacturing method thereof

A display device structure includes an active device, a passivation layer, a pixel electrode and a first conductive material. The passivation layer covers the active device and has a first through hole exposing a portion of the active device. The pixel electrode is disposed on the passivation layer, and the pixel electrode is a non-thin-film electrode constituted by a plurality of micro-conductive structures. The first conductive material is filled in the first through hole and electrically connected to the exposed active device. The pixel electrode is electrically connected to the first conductive material.

Semiconductor device

Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor ( 105 ), a charge equivalent to a threshold value of a TFT ( 104 ) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor ( 105 ) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT ( 101 ). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT ( 101 ).

Transferred thin film transistor and method for manufacturing the same

Provided are a transferred thin film transistor and a method of manufacturing the same. The method includes: forming a source region and a drain region that extend in a first direction in a first substrate and a channel region between the source region and the drain region; forming trenches that extend in a second direction in the first substrate to define an active layer between the trenches, the second direction intersecting the first direction; separating the active layer between the trenches from the first substrate by performing an anisotropic etching process on the first substrate inside the trenches; attaching the active layer on a second substrate; and forming a gate electrode in the first direction on the channel region of the active layer.

Semiconductor device, method for producing the semiconductor device, substrate for semiconductor element and method for producing the substrate

A semiconductor device is provided with a porous structure layer formed by silicone resin between a substrate and a semiconductor element. Alternatively, a porous layer having a density of 0.7 g/cm 3 or less, formed by a compound obtained by hydrolyzing and condensing at least one type of alkoxysilane selected from a group consisting of monoalkoxysilane, dialkoxysilane, and trialkoxysilane, and tetraalkoxysilane is provided between the substrate and the semiconductor element. As a further alternative, an adhesion layer formed by a compound obtained by hydrolyzing and condensing an alkoxysilane is provided on a resin substrate, and a porous layer having a density of 0.7 g/cm 3 or less, formed by a compound obtained by hydrolyzing and condensing an alkoxysilane, is provided on the adhesion layer.

Trench forming method, metal wiring forming method, and method of manufacturing thin film transistor array panel

A method of forming a thin film transistor array panel includes: forming a first insulating layer on a substrate; forming an amorphous carbon layer on the first insulating layer; forming a second insulating layer on the amorphous carbon layer; forming an opening in the amorphous carbon layer by patterning the second insulating layer and the amorphous carbon layer; and forming a trench in the first insulating layer by etching the first insulating layer, the etching the first insulating layer using the amorphous carbon layer including the opening as a mask.

Manufacturing method of semiconductor device

It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.

LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

In the liquid crystal display device in which a guest-host liquid crystal layer is provided between a first substrate having a reflective film which is a pixel electrode layer (also referred to as a first electrode layer) and a second substrate having a common electrode layer (also referred to as a second electrode layer), the reflective film which is a pixel electrode layer is projected into the liquid crystal layer, and a micron-sized first unevenness and a nano-sized second unevenness on the first unevenness are provided. 1. A manufacturing method of a display device , comprising the steps of:preparing a substrate;forming a photosensitive organic resin layer over the substrate, the photosensitive organic resin layer having a first unevenness on a face of the photosensitive organic resin layer;performing a plasma treatment on the photosensitive organic resin layer, whereby forming a second unevenness on a face of the first unevenness; andforming a reflective pixel electrode layer over the photosensitive organic resin layer, the reflective pixel electrode layer having a third unevenness formed in accordance with the first unevenness and the second unevenness.2. The manufacturing method of a display device according to claim 1 , wherein the plasma treatment is performed on the photosensitive organic resin layer under an oxygen gas atmosphere.3. The manufacturing method of a display device according to claim 1 , wherein the first unevenness has a size of greater than or equal to 1.5 μm and less than or equal to 20 μm in a planar direction claim 1 , andwherein the second unevenness has a size of greater than or equal to 0.1 μm and less than or equal to 1 μm in the planar direction.4. The manufacturing method of a display device according to claim 1 , wherein the first unevenness has a height of greater than or equal to 0.1 μm and less than or equal to 20 μm claim 1 , andwherein the second unevenness has a height of greater than or equal to 0.1 μm and less than or ...

Semiconductor device

Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor ( 105 ), a charge equivalent to a threshold value of a TFT ( 104 ) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor ( 105 ) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT ( 101 ). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT ( 101 ).

COLOR FILTER SUBSTRATE MANUFACTURING METHOD, DISPLAY DEVICE MANUFACTURING METHOD, COLOR FILTER SUBSTRATE, AND DISPLAY DEVICE

The present invention provides a color filter substrate manufacturing method which can prevent the occurrence of color mixing between adjacent pixels despite of the use of an inkjet method, and which are unlikely to cause flicker when used for displays such as televisions. The prevent invention is a color filter substrate manufacturing method including: a first inkjet step of applying inks simultaneously to at least two of a plurality of regions separated by a grid-shaped partition; and a second inkjet step of applying an ink to at least one of regions to which the inks are not applied in the first inkjet step, wherein at least one of inks applied in the first inkjet step is a first ink that is applied to a first target region without applying inks to regions vertically and horizontally adjacent to the first target region, and at least one of the other inks applied in the first inkjet step is a second ink that is applied to a second target region while another ink is applied to one of regions vertically and horizontally adjacent to the second target region. 1. A color filter substrate manufacturing method comprising:a first inkjet step of applying inks simultaneously to at least two of a plurality of regions separated by a grid-shaped partition; anda second inkjet step of applying an ink to at least one of regions to which the inks are not applied in the first inkjet step,wherein at least one of inks applied in the first inkjet step is a first ink that is applied to a first target region without applying inks to regions vertically and horizontally adjacent to the first target region, andat least one of the other inks applied in the first inkjet step is a second ink that is applied to a second target region while another ink is applied to one of regions vertically and horizontally adjacent to the second target region.2. The color filter substrate manufacturing method according to comprising claim 1 , between the first inkjet step and the second inkjet step claim 1 , ...

LIQUID CRYSTAL DISPLAY DEVICE

A liquid crystal display device includes a TFT substrate having a first alignment film and an opposing substrate having a second alignment film with liquid crystals sandwiched therebetween. One of the first and second alignment films, comprises a first polyimide produced via polyamide acid ester containing cyclobutane as a precursor and a second polyimide produced via polyamide acid as a precursor. The polyamide acid has a higher polarity than that of the polyamide acid ester. The one of the first and second alignment films is responsive to photo-alignment. A first side of the one of the first and second alignment films is adjacent to the liquid crystals, and a second side thereof is closer to one of the TFT substrate and the counter substrate than the first side. The first side contains more of the first polyimide and less of the second polyimide than the second side. 1. A method for fabricating a liquid crystal display device including a TFT substrate having a photo-alignment film formed over a pixel electrode and a common electrode;an opposing substrate which faces the TFT substrate; anda liquid crystal layer sandwiched between the TFT substrate and the opposing substrate;whereinthe method comprising steps of:forming a mixture material that is a material of the photo-alignment film on the TFT substrate,imidizing the mixture material so that a precursor contained in the mixture material is imidized,irradiating a polyimide formed from the imidized precursor with ultraviolet light for photo-alignment without heating; andheating the polyimide to form the alignment film after the irradiation.2. The method for fabricating a liquid crystal display device according to claim 1 ,wherein an irradiance level of the ultraviolet light is from 2000 to 5000 mJ/cm2, a temperature at which the TFT substrate and the opposing substrate are heated after the ultraviolet light irradiation is not less than 230° C., and an interval after the ultraviolet light irradiation until heating ...

METHOD FOR PRODUCING FUNCTIONAL DEVICE AND APPARATUS FOR PRODUCING FUNCTIONAL DEVICE

According to the present invention, a method of producing a functional device includes the imprinting step and the functional solid material layer formation step. In the imprinting step, a functional solid material precursor layer obtained from a functional solid material precursor solution as a start material is imprinted so that a first temperature of a heat source for supplying heat to the functional solid material precursor layer is higher than a second temperature of the functional solid material precursor layer in at least part of a time period while a mold for forming an imprinted structure is pressed against the functional solid material precursor layer. In the functional solid material layer formation step, after the imprinting step, the functional solid material precursor layer is heat treated at a third temperature higher than the first temperature in an atmosphere containing oxygen to form a functional solid material layer from the functional solid material precursor layer. 1. A method of producing a functional device , the method comprising:the imprinting step of imprinting a functional solid material precursor layer obtained from a functional solid material precursor solution as a start material so that a first temperature of a heat source for supplying heat to the functional solid material precursor layer is higher than a second temperature of the functional solid material precursor layer in at least part of a time period while a mold for forming an imprinted structure is pressed against the functional solid material precursor layer; andthe functional solid material layer formation step of forming, after the imprinting step, a functional solid material layer from the functional solid material precursor layer by heat treating the functional solid material precursor layer at a third temperature higher than the first temperature in an atmosphere containing oxygen.2. The method of producing a functional device according to claim 1 , whereinthe first ...

Liquid crystal display and manufacturing method thereof

A liquid crystal display including: a substrate; a thin film transistor disposed on the substrate; a pixel electrode connected to the thin film transistor; a lower insulating layer facing the pixel electrode; and a touch sensor disposed on the lower insulating layer, the touch sensor including a first transparent conductive layer and a second transparent conductive layer. A plurality of microcavities is formed between the pixel electrode and the lower insulating layer. The microcavities form a liquid crystal layer including a liquid crystal material, the lower insulating layer has a matrix shape including a horizontal portion and a vertical portion, and the second transparent conductive layer overlaps the vertical portion of the lower insulating layer.

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

A provided is a liquid crystal display device with a high definition screen and less color mixture. On an array substrate, a pixel is formed between the adjacent video signal lines, a color filter is formed within the pixel, a flattening film is formed on the color filter, a lower layer is formed on the flattening film, and an upper layer having a slit is formed on the lower layer with an interlayer insulating film interposed therebetween; and on the array substrate, an opposite substrate is arranged with a liquid crystal layer interposed therebetween. When a distance from the top of the video signal line working as a light shielding film to the bottom of the liquid crystal layer is defined as d and a space between the centers of the video signal lines separating the pixel is defined as w, a relation of d≦0.3 w is satisfied. 1. A liquid crystal display device with an array substrate on which scanning lines are respectively extended in a first direction and aligned in a second direction , video signal lines are respectively extended in the second direction and aligned in the first direction , pixels are respectively formed in areas surrounded by the scanning lines and the video signal lines , and an opposite substrate arranged in a way of facing the array substrate through a liquid crystal layer ,wherein a color filter is formed on the pixel of the array substrate, an overcoat film is formed on the color filter, a lower layer ITO is formed on the overcoat film, an interlayer insulating film is formed to cover the lower layer ITO, and an upper layer ITO with slit is formed on the interlayer insulating film,the video signal line is a light shielding film, andwhen a distance between centers of the adjacent video signal lines separating the pixel in the first direction is defined as w, anda distance from the top of the video signal line to the bottom of the liquid crystal layer is defined as d,an expression of d≦0.3w is satisfied.2. The device according to claim 1 , ...

DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE

A display panel, a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposing substrate which are disposed opposite to each other; the array substrate includes a first base substrate and a source electrode, a drain electrode and an active layer which are disposed on the first base substrate, and a passivation layer disposed on the source electrode, the drain electrode and the active layer; the opposing substrate includes a second base substrate and a gate electrode disposed on the second base substrate; the active layer includes a source electrode region, a drain electrode region and a channel region between the source electrode region and the drain electrode region, the gate electrode is disposed opposite to and spaced apart from the passivation layer at a position where the channel region is located. 1. A display panel , comprising:an array substrate, comprising a first base substrate and a source electrode, a drain electrode and an active layer which are disposed on the first base substrate, and a passivation layer disposed on the source electrode, the drain electrode and the active layer; andan opposing substrate, disposed opposite to and spaced apart from the array substrate and comprising a second base substrate,wherein the active layer comprises a source electrode region, a drain electrode region and a channel region between the source electrode region and the drain electrode region, the opposing substrate further comprises a gate electrode disposed on the second base substrate, the gate electrode is disposed opposite to and spaced apart from the passivation layer at a position where the channel region is located.2. The display panel according to claim 1 , wherein the display panel is configured to be curved so as to decrease a space between the gate electrode and the passivation layer at the position where the channel region is located.3. The display panel according to claim 1 , wherein the ...

HYBRID HIGH-K DIELECTRIC MATERIAL FILM STACKS COMPRISING ZIRCONIUM OXIDE UTILIZED IN DISPLAY DEVICES

Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes. 1. A thin film transistor structure comprising:gate, source and drain electrodes formed in a thin film transistor on a transparent substrate;an insulating layer disposed below the gate electrode; and{'sup': '2', 'sub': 2', '3', '2', '3, 'a capacitor layer formed in direct contact with the gate electrode and the insulating layer, wherein the capacitor layer comprises a hybrid film stack having an interface layer disposed between a dielectric layer and a top layer, the dielectric layer comprising an amorphous doped zirconium containing material, wherein the dielectric layer has a thickness of 250 Å to 900 Å and a current leakage of less than 1 E-8 A/cm, wherein the interface layer is at least one of aluminum oxide (AlO), aluminum nitride (AlN), titanium oxide (AlTiO), aluminum zirconium oxide (AlZrO), aluminum oxynitride (AlON), or yttrium oxide (YO).'}2. The structure of claim 1 , wherein the dielectric layer comprises a dielectric constant greater than 15 and less than 25.3. The structure of claim 1 , wherein the top layer is disposed directly on the interface layer of the hybrid film stack claim 1 , and the top layer comprises a silicon containing material.4. The structure of claim 3 , wherein the silicon containing material is silicon oxide or silicon nitride.5. The structure of claim 1 , wherein the dielectric layer is a doped ZrOlayer.6. The structure of claim ...

GLASS SUBSTRATE AND DISPLAY DEVICE COMPRISING THE SAME

Disclosed herein are methods for making a thin film device and/or for reducing warp in a thin film device, the methods comprising applying at least one metal film to a convex surface of a glass substrate, wherein the glass substrate is substantially dome-shaped. Other methods disclosed include methods of determining the concavity of a glass sheet. The method includes determining the orientation of the concavity and measuring a magnitude of the edge lift of the sheet when the sheet is supported by a flat surface and acted upon by gravity. Thin film devices made according to these methods and display devices comprising such thin film devices are also disclosed herein. 1. A method for making a thin film device , comprising applying at least one metal film to a convex surface of a glass substrate at a first temperature to form the thin film device , and cooling the thin film device to a second temperature.2. The method of claim 1 , wherein the at least one metal film is chosen from copper claim 1 , silicon claim 1 , amorphous silicon claim 1 , polysilicon claim 1 , ITO claim 1 , IGZO claim 1 , IZO claim 1 , ZTO claim 1 , zinc oxide claim 1 , other metal oxides and doped metals and oxides thereof claim 1 , and combinations thereof.3. The method of claim 1 , wherein the at least one metal film has a thickness ranging from about 1 claim 1 ,000 Å to about 10 claim 1 ,000 Å.4. The method of claim 1 , wherein the at least one metal film has a width ranging from about 1 claim 1 ,000 Å to about 10 claim 1 ,000 Å.5. The method of claim 1 , wherein the glass substrate has a thickness of less than about 3 mm.6. The method of claim 1 , wherein the glass substrate has a thickness of between 0.2 mm and less than about 1 mm.7. The method of claim 1 , wherein the glass substrate is substantially dome-shaped or bowl-shaped.8. The method of claim 1 , wherein the glass substrate has a substantially constant thickness over a length and width of the glass substrate.9. The method of claim 1 ...

DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME

A display substrate and a method of manufacturing a display substrate, the display substrate including a base substrate; a gate electrode on the base substrate; an insulation layer on the gate electrode; a source electrode and a drain electrode on the insulation layer and overlapping the gate electrode; and a pixel electrode electrically connected to the drain electrode, wherein a cavity is formed between the gate electrode and the insulation layer. 1. A display substrate , comprising:a base substrate;a gate electrode on the base substrate;an insulation layer on the gate electrode;a source electrode and a drain electrode on the insulation layer and overlapping the gate electrode; anda pixel electrode electrically connected to the drain electrode,wherein a cavity is formed between the gate electrode and the insulation layer.2. The display substrate as claimed in claim 1 , wherein:the gate electrode includes a nano-imprint pattern in an upper surface thereof, andthe cavity is defined by the nano-imprint pattern in the upper surface of the gate electrode and the insulation layer overlapping the gate electrode.3. The display substrate as claimed in claim 2 , wherein a width of the cavity is equal to or greater than 10 nanometers and is equal to or less than 100 nanometers.4. The display substrate as claimed in claim 3 , wherein a height of the cavity is equal to or greater than 10 nanometers and is equal to or less than 1 claim 3 ,000 nanometers.5. The display substrate as claimed in claim 1 , wherein:the insulation layer includes a nano-imprint pattern in a portion of a lower surface thereof that overlaps the gate electrode, andthe cavity is defined by the gate electrode and the nano-imprint pattern in the lower surface of the insulation layer.6. The display substrate as claimed in claim 5 , wherein a width of the cavity is equal to or greater than 10 nanometers and is equal to or less than 100 nanometers.7. The display substrate as claimed in claim 5 , wherein a ...

RESIN FILM, DISPLAY COMPRISING SAME, AND PRODUCTION METHODS FOR SAME

A resin film used as a support substrate of a thin film transistor is described where the resin film contains a heat-resistant resin and a predetermined face of the resin film has a sheet resistance of more than 1×10Ω and less than 1×10Ω. The resin film is less likely to have foreign substances stuck thereto, and thus, can inhibit damage caused to a TFT element by gas emitted from foreign substances in high-temperature processes. The resin film can also be provided as a support substrate of a thin film transistor in a display. 1. A resin film to be used as a support substrate of a thin film transistor , comprisinga heat-resistant resin,{'sup': 12', '16, 'wherein a predetermined resin film face of said resin film has a sheet resistance of more than 1×10Ω and less than 1×10Ω.'}2. The resin film according to claim 1 , further comprising electroconductive particles.3. The resin film according to claim 2 , wherein said electroconductive particles are carbon particles.4. The resin film according to claim 2 , wherein the amount of the electroconductive particles is 0.01 parts by mass or more and 3 parts by mass or less with respect to 100 parts by mass of said heat-resistant resin.5. The resin film according to claim 1 , wherein said resin film has a film thickness of 4 μm or more and 40 μm or less.6. The resin film according to claim 1 , wherein said predetermined resin film face has an arithmetic mean roughness of 10 nm or less.7. A display comprising said resin film according to .8. A method of producing a resin film for producing said resin film according to claim 1 , said method comprising:a coating step of coating a support with a resin composition containing a heat-resistant resin or a precursor of said heat-resistant resin and a solvent; anda heating step of heating a coating film obtained by said coating step, to obtain a resin film.9. The method of producing a resin film according to claim 8 , comprising a polishing step of polishing the heated resin film.10. The ...

Array substrate, method for manufacturing the same and display panel

An array substrate, a method for manufacturing the same and a display panel are provided. The array substrate comprises: a substrate; a bare chip fixed on the substrate, the bare chip comprising pins; a buffer layer and a first metallic layer disposed sequentially on the bare chip, the first metallic layer comprising outer leads in one-to-one correspondence with the pins of the bare chip, the outer leads being connected electrically to the pins corresponding thereto of the bare chip, and the outer leads being electrically insulated from each other; a thin film transistor; and a first signal wire and a first connecting wire disposed in a same layer as a gate electrode of the thin film transistor, and a second signal wire and a second connecting wire disposed in a same layer as a source electrode and a drain electrode of the thin film transistor.

ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY PANEL

The disclosure discloses an array substrate, a method for manufacturing the same, and a display panel, and the array substrate includes a gate, an active layer, a source, and a drain arranged on a base substrate in that order; and further includes: a light blocking layer, where a positive projection of the active layer onto the base substrate overlaps with both of a positive projection of the light blocking layer onto the base substrate, and a positive projection of the gate onto the base substrate; the positive projection of the active layer onto the base substrate lies in positive projections of the light blocking layer and the gate onto the base substrate; and an area of the positive projection of the gate onto the base substrate is smaller than an area of the positive projection of the active layer onto the base substrate. 1. An array substrate , comprising a gate , an active layer , a source , and a drain arranged on a base substrate in that order; wherein the array substrate further comprises: a light blocking layer;a positive projection of the active layer onto the base substrate overlaps with both of a positive projection of the light blocking layer onto the base substrate, and a positive projection of the gate onto the base substrate;the positive projection of the active layer onto the base substrate lies in positive projections of the light blocking layer and the gate onto the base substrate; andan area of the positive projection of the gate onto the base substrate is smaller than an area of the positive projection of the active layer onto the base substrate.2. The array substrate according to claim 1 , wherein the positive projection of the gate onto the base substrate partially overlaps claim 1 , or does not overlap claim 1 , with the positive projection of the light blocking layer onto the base substrate.3. The array substrate according to claim 1 , wherein the light blocking layer is located between the base substrate and the gate.4. The array ...

METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING ARRAY SUBSTRATE, ARRAY SUBSTRATE AND DISPLAY DEVICE

A method for manufacturing a thin film transistor, a method for manufacturing an array substrate, an array substrate, and a display device are provided. The method for manufacturing the thin film transistor includes: forming an active layer on a base substrate; forming a metal layer on the surface of the active layer; and processing the metal layer using a patterning process for one time and an oxidation treatment process, so that the metal layer forms a source electrode, a drain electrode and a passivation layer; wherein the source electrode and the drain electrode are in contact with the active layer, and the passivation layer is formed on a side of the source electrode and the drain electrode away from the active layer. 1. A method for manufacturing a thin film transistor , comprising:forming an active layer on a base substrate;forming a metal layer on a surface of the active layer;processing the metal layer using a patterning process for one time and an oxidation treatment process to form a source electrode, a drain electrode and a passivation layer;wherein the source electrode and the drain electrode are in contact with the active layer, and the passivation layer is formed on a side of the source electrode and the drain electrode away from the active layer.2. The method for manufacturing the thin film transistor according to claim 1 , wherein claim 1 , the processing the metal layer using the patterning process for one time and the oxidation treatment process to form the source electrode claim 1 , the drain electrode and the passivation layer comprises:forming a photoresist layer on a surface of the metal layer;processing the photoresist layer using the patterning process for one time to form a photoresist completely-removed region, photoresist partly-reserved regions and a photoresist completely-reserved region; wherein the photoresist partly-reserved regions are connected to the photoresist completely-reserved region;performing a complete oxidation treatment ...

METHOD FOR MANUFACTURING ARRAY SUBSTRATE

A method for manufacturing an array substrate is provided. The method includes the following. A signal transmission line and a gate electrode are formed on an underlayment, and are separated with a gap therebetween. A gate insulation layer and an active layer are formed on the signal transmission line and the gate electrode. An organic insulation layer is formed on the gate insulation layer and the active layer. The organic insulation layer is patterned to form a penetration hole corresponding to the signal transmission line. Then the gate insulation layer is etched to expose the signal transmission line by using the patterned organic insulation layer as a mask. A first conductive layer is formed on the penetration hole to be electrically connected with the signal transmission line. 1. A method for manufacturing an array substrate , comprising:forming a signal transmission line and a gate electrode on an underlayment, the signal transmission line and the gate electrode being separated with a gap therebetween;forming a gate insulation layer and an active layer on the signal transmission line and the gate electrode;forming an organic insulation layer on the gate insulation layer and the active layer;patterning the organic insulation layer to form a penetration hole corresponding to the signal transmission line;etching the gate insulation layer to expose the signal transmission line by using the organic insulation layer subjected to patterning as a mask; andforming a first conductive layer on the penetration hole to be electrically connected with the signal transmission line.2. The method of claim 1 , wherein the patterning the organic insulation layer to form a penetration hole corresponding to the signal transmission line further comprises:forming a blind hole corresponding to the active layer;wherein the method further comprises:removing the organic insulation layer with a preset thickness, whereby the blind hole becomes a through hole to expose the active layer; ...

Foldable display design

A display device comprises a substrate having a foldable first region and a second region adjacent to the foldable first region, wherein a folding axis overlaps the foldable first region. The display device further comprises a first transistor overlapping the foldable first region and having a first channel region with a first dimension along a first direction that is substantially perpendicular to the folding axis. The display device further comprises a second transistor overlapping the second region and having a second channel region with a second dimension along the first direction, wherein the first dimension is less than the second dimension.

Display Device and Method for Manufacturing the Same

Provided are a display device and a method for manufacturing the same. The display device includes: a connection source electrode and a connection drain electrode connected to a first source electrode a the first drain electrode, respectively by penetrating an isolation insulating layer and a second interlayer dielectric layer to enhance a characteristic of an element and reliability of the display device. 1. A display device comprising:a first thin film transistor including a first active layer, a first insulating layer on the first active layer, and a first source electrode and a first drain electrode connected to the first active layer through a first contact hole formed in the first insulating layer;a second thin film transistor including a second active layer on the first insulating layer, a second insulating layer on the second active layer, and a second source electrode and a second drain electrode connected to the second active layer through a second contact hole formed in the second insulating layer; anda connection source electrode and a connection drain electrode connected to the first source electrode and the first drain electrode, respectively through a third contact hole formed in the second insulating layer.2. The display device of claim 1 , further comprising:an isolation insulating layer between the first thin film transistor and the second thin film transistor,wherein the connection source electrode and the connection drain electrode are connected to the first source electrode and the first drain electrode, respectively through the third contact hole formed in the isolation insulating layer and the second insulating layer.3. The display device of claim 1 , wherein the first active layer is made of low temperature polycrystalline silicon (LTPS) claim 1 , andthe second active layer is made of an oxide semiconductor.4. The display device of claim 1 , wherein at least one of the first source electrode and the first drain electrode is in contact with a ...

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a base substrate; a first conductive layer located on the base substrate, including a source electrode of a switching element; and a color filter layer located on the first conductive layer, wherein the source electrode of the switching element and the color filter layer are abutted in a direction perpendicular to the base substrate. 1. An array substrate , comprising:a base substrate,a first conductive layer located on the base substrate, the first conductive layer comprising a source electrode of a switching element, anda color filter layer located on the first conductive layer,wherein, the source electrode of the switching element and the color filter layer are abutted in a direction perpendicular to the base substrate.2. The array substrate according to claim 1 , further comprising:a second conductive layer located on the color filter layer, the second conductive layer comprising a common electrode,wherein, the color filter layer and the common electrode are further abutted in the direction perpendicular to the base substrate.3. The array substrate according to claim 2 , wherein the first conductive layer further comprises a data line connected to the source electrode of the switching element claim 2 , and the second conductive layer further comprises a common line connected to the common electrode claim 2 , and the color filter layer is configured to electrically isolate the data line from the common line at an intersection of the data line and the common line.4. The array substrate according to claim 1 , wherein claim 1 ,the color filter layer comprises a first color filter pattern, a second color filter pattern and a first opening located between the first color filter pattern and the second color filter pattern and passing through the color filter layer, the first color filter pattern and the second color filter pattern being adjacent to each ...

DISPLAY DEVICE

A display device includes a light source generating light and a thin film transistor array panel including a pixel electrode and a common electrode. The display includes an upper panel and a quantum rod layer positioned between the thin film transistor array panel and the upper panel. The display includes an upper polarizer attached outside of the upper panel, in which the quantum rod layer includes quantum rods, and an arrangement direction of the quantum rods is controlled by an electric field generated by the pixel electrode and the common electrode, light is polarized according to the controlled arrangement direction, and the polarizer controls the transmission degree of the polarized light from the quantum rods according to the arrangement direction of the quantum rods. 1. A display device , comprising:a light source;a thin film transistor array panel comprising a pixel electrode and a common electrode;an upper panel;a quantum rod layer positioned between the thin film transistor array panel and the upper panel; anda polarizer attached outside of the upper panel, wherein the quantum rod layer comprises quantum rods, and an arrangement direction of the quantum rods is controlled by an electric field generated by the pixel electrode and the common electrode,wherein light is polarized according to the controlled arrangement direction, andwherein the polarizer is configured to control the transmission degree of the polarized light from the quantum rods according to the arrangement direction of the quantum rods.2. The display device of claim 1 , wherein the quantum rod layer comprises a first quantum rod claim 1 , a second quantum rod claim 1 , and a third quantum rod.3. The display device of claim 2 , wherein the first quantum rod is configured to polarize red light claim 2 , the second quantum rod is configured to polarize green light claim 2 , and the third quantum rod is configured to polarize blue light.4. The display device of claim 3 , wherein thicknesses of ...

Flexible substrate

There is provided a flexible substrate having excellent flexibility and gas barrier properties. A flexible substrate 100 according to the present invention includes: a base material 20 including an inorganic glass 10 and resin layers 11 and 11′ placed on both sides of the inorganic glass 10; and an inorganic thin film 12 placed on a side of one of the resin layers where the inorganic glass is not placed, wherein the inorganic thin film 12 is formed on at least a peripheral edge of one surface of the base material.

LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING SAME

A method for manufacturing a liquid crystal display, including: preparing a substrate on which a switching element, laminating a conductive material layer and a conductive metal layer, forming a first photosensitive film pattern on the conductive metal layer, the first photosensitive film pattern comprising a first region having a first thickness and a second region having a second thickness greater than the first thickness, forming a conductive metal pattern by etching the conductive metal layer using the first photosensitive film pattern as a mask, forming a second photosensitive film pattern that exposes a part of the conductive metal pattern by removing the first region of the first photosensitive film pattern, forming a common electrode by etching the conductive material layer by using the conductive metal pattern as a mask and forming an auxiliary electrode by etching the exposed conductive metal pattern using the second photosensitive film pattern as a mask. 1. A method for manufacturing a liquid crystal display , the method comprising:preparing a substrate on which a switching element covered with a first insulating film is formed;laminating a conductive material layer and a conductive metal layer on the first insulating film;forming a first photosensitive film pattern on the conductive metal layer, the first photosensitive film pattern comprising a first region having a first thickness and a second region having a second thickness greater than the first thickness;forming a conductive metal pattern by etching the conductive metal layer by using the first photosensitive film pattern as a mask;forming a second photosensitive film pattern that exposes a part of the conductive metal pattern by removing the first region of the first photosensitive film pattern;after forming the second photosensitive film pattern, forming a common electrode by etching the conductive material layer by using the conductive metal pattern as a mask; andforming an auxiliary electrode ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

The present invention provides a display device including a substrate including a plurality of pixel areas, a thin film transistor formed on the substrate, a common electrode and a pixel electrode formed on the thin film transistor, a liquid crystal layer filling a microcavity formed on the common electrode and the pixel electrode, a lower insulating layer formed to be spaced apart from the common electrode and the pixel electrode, a roof layer formed on the lower insulating layer, an intermediate insulating layer formed on the roof layer, a first touch sensing electrode formed on the intermediate insulating layer, an injection hole partially exposing the microcavity formed in the roof layer, the intermediate insulating layer, and the first touch sensing electrode, an overcoat formed on the first touch sensing electrode to cover the injection hole and sealing the microcavity, and a second touch sensing electrode formed on the overcoat. 1. A display device , comprising:a substrate including a plurality of pixel areas;a thin film transistor formed on the substrate;a common electrode and a pixel electrode formed on the thin film transistor to overlap each other;an insulating layer interposed between the common electrode and a pixel electrode;a liquid crystal layer filling a microcavity formed on the common electrode and the pixel electrode;a lower insulating layer formed to be spaced apart from the common electrode and the pixel electrode, the microcavity formed between the pixel electrode and the lower insulating layer;a roof layer formed on the lower insulating layer;an intermediate insulating layer formed on the roof layer;a first touch sensing electrode formed on the intermediate insulating layer;an injection hole partially exposing the microcavity formed on the roof layer, the intermediate insulating layer, and the first touch sensing electrode;an overcoat formed on the first touch sensing electrode to cover the injection hole and sealing the microcavity; anda ...

Array substrate and manufacturing method thereof, display device and manufacturing method thereof

The present disclosure discloses an array substrate, a display device and manufacturing methods thereof. The array substrate comprises: a base, a gate metal layer, an active layer, a source/drain metal layer, and a pixel electrode layer, wherein the array substrate has a storage capacitor region; in the storage capacitor region, the gate metal layer, the active layer, the source/drain metal layer and the pixel electrode layer comprise respective patterns; wherein, the projections of the gate metal layer storage pattern, the active layer storage pattern, the source/drain metal layer storage pattern, and the pixel electrode layer storage pattern on the base at least partially overlap, and the pixel electrode layer storage pattern is electrically connected to the gate metal layer storage pattern to form a first electrode of the storage capacitor, the active layer storage pattern is electrically connected to the source/drain metal layer storage pattern to form a second electrode.

ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE

An array substrate according to an embodiment of the present disclosure may include a base substrate, a gate electrode, a gate insulating layer and an active layer arranged on the base substrate in a laminated way. The array substrate may further include a passivation layer arranged on the active layer, a source electrode, a drain electrode, a first electrode and a second electrode arranged on the passivation layer and on a same layer. A first via hole may be arranged in the passivation layer, and the first via hole may include two sloped lateral faces arranged opposite to each other. The first electrode may at least partially cover one lateral face of the first via hole, the second electrode may at least partially cover the other lateral face of the first via hole. The second electrode may be electrically connected to a common electrode lead. A second via hole may be further arranged in the passivation layer. The source electrode and the drain electrode may be connected to the active layer through the second via hole. And the first electrode may be electrically connected to the source electrode or the drain electrode. 1. An array substrate , comprising:a base substrate; anda gate electrode, a gate insulating layer and an active layer arranged on the base substrate in a laminated way,the array substrate further comprising:a passivation layer arranged on the active layer; anda source electrode, a drain electrode, a first electrode and a second electrode arranged on the passivation layer and on a same layer,wherein a first via hole is arranged in the passivation layer, and the first via hole comprises two sloped lateral faces arranged opposite to each other, the first electrode at least partially covers one lateral face of the first via hole, the second electrode at least partially covers the other lateral face of the first via hole, the second electrode is electrically connected to a common electrode lead; andwherein a second via hole is further arranged in the ...

Array Substrate and Manufacturing Method Thereof, Display Device

An array substrate and manufacturing method thereof, a display device are provided. The array substrate includes a display region and a non-display region; the non-display region includes a first laminated structure and a second laminated structure that are separately disposed on a base substrate, a gap between the first laminated structure and the second laminated structure constitutes a connecting hole; the first laminated structure includes a first via hole provided for exposing a first metal layer, the second laminated structure includes a second via hole provided for exposing a second metal layer, the first via hole and the second via hole are connected to a connecting hole via breaches on corresponding walls, and the first metal layer and the second metal are electrically connected with a conductive film.

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, DISPLAY APPARATUS

The present invention provides an array substrate and a manufacturing method thereof, and a display apparatus. The array substrate comprises a gate layer, a gate insulating layer, an active layer, a source and drain layer, a scanning line and a signal line formed on a substrate, the signal line is provided in a same layer as the gate layer, the scanning line is provided in a same layer as the source and drain layer, the gate insulating layer is provided between the gate layer, the signal line and the active layer. The array substrate further comprises a first through hole and a second through hole penetrating through the gate insulating layer, the signal line is connected to the source and drain layer via the first through hole, and the scanning line is connected to the gate layer via the second through hole. 112-. (canceled)13. An array substrate , comprising a gate layer , a gate insulating layer , an active layer , a source and drain layer , a scanning line and a signal line formed on a substrate , whereinthe signal line is provided in a same layer as the gate layer, the scanning line is provided in a same layer as the source and drain layer, the gate insulating layer is provided between the gate layer, the signal line and the active layer;the array substrate further comprises a first through hole and a second through hole penetrating through the gate insulating layer, the signal line is connected to the source and drain layer via the first through hole, and the scanning line is connected to the gate layer via the second through hole.14. The array substrate of claim 13 , further comprises an etching stop layer provided above the active layer and the gate insulating layer.15. The array substrate of claim 14 , wherein a first via-hole and a second via-hole are formed in the etching stop layer claim 14 , a source electrode and a drain electrode of the source and drain layer are respectively in contact with both sides of the active layer through the first via-hole ...

Array Substrate and Manufacturing Method Thereof, Display Panel and Display Device

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, an active layer, and a first polarization structure. The active layer is disposed on the base substrate; the first polarization structure is disposed on a side of the active layer facing the base substrate, and an orthographic projection of the first polarization structure on the base substrate is at least partially overlapped with an orthographic projection of the active layer on the base substrate. 1. An array substrate , comprising:a base substrate;an active layer, disposed on the base substrate;a first polarization structure, disposed on a side of the active layer facing the base substrate, and an orthographic projection of the first polarization structure on the base substrate being at least partially overlapped with an orthographic projection of the active layer on the base substrate;a second polarization structure, laminated on the base substrate, and disposed on the side of the active layer facing the base substrate,wherein a polarization direction of the first polarization structure is substantially perpendicular to a polarization direction of the second polarization structure, and both of the orthographic projections of the active layer and the first polarization structure on the base substrate fall within an orthographic projection of the second polarization structure on the base substrate.2. The array substrate of claim 1 , wherein the first polarization structure is provided between the base substrate and the active layer.3. The array substrate of claim 1 , wherein the orthographic projection of the active layer on the base substrate falls within the orthographic projection of the first polarization structure on the base substrate.4. The array substrate of claim 3 , wherein the orthographic projection of the active layer on the base substrate substantially coincides with the orthographic projection of the first ...

ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes a first conductive pattern, an insulation layer covering the first conductive pattern, and a second conductive pattern arranged on the insulation layer. The insulation layer includes a via-hole through which the first conductive pattern is connected to the second conductive pattern. A conductive post connected to the first conductive pattern and the second conductive pattern is formed in the via-hole. 1. An array substrate , comprising a first conductive pattern , an insulation layer covering the first conductive pattern , and a second conductive pattern arranged on the insulation layer , wherein the insulation layer comprises a via-hole through which the first conductive pattern is connected to the second conductive pattern , and the array substrate further comprises a conductive post arranged in the via-hole and connected to the first conductive pattern and the second conductive pattern.2. The array substrate according to claim 1 , wherein an upper surface of the conductive post has a horizontal level that is not lower than that of an upper surface of the insulation layer.3. The array substrate according to claim 1 , wherein the upper surface of the conductive post has a horizontal level that is identical to that of the upper surface of the insulation layer.4. The array substrate according to claim 1 , wherein the conductive post is made of an organic conductive polymer or a metal.5. The array substrate according to claim 1 , wherein the conductive post comprises a resin column object and a conductive material enclosing the resin column object.6. The array substrate according to claim 1 , wherein an outer surface of the conductive post is in contact with an entire inner surface of the via-hole.7. The array substrate according to claim 1 , wherein the first conductive pattern is a drain electrode of a thin film transistor (TFT) claim 1 , and the second ...

Method for Manufacturing Semiconductor Device and Manufacturing Apparatus of Semiconductor Device

A semiconductor device including an oxide semiconductor and an organic resin film is manufactured in the following manner. Heat treatment is performed on a first substrate provided with an organic resin film over a transistor including an oxide semiconductor in a reduced pressure atmosphere; handling of the first substrate is performed in an atmosphere containing moisture as little as possible in an inert gas (e.g., nitrogen) atmosphere with a dew point of lower than or equal to −60° C., preferably with a dew point of lower than or equal to −75° C. without exposing the first substrate after the heat treatment to the air; and then, the first substrate is bonded to a second substrate that serves as an opposite substrate. 1. (canceled)2. A method for manufacturing a display device comprising the steps of:preparing a first substrate having a transistor and an organic planarization film over the transistor;preparing a second substrate having an organic film;heating the first substrate and the second substrate in a reduced pressure atmosphere;applying a sealing material over the second substrate;attaching the first substrate and the second substrate to each other with the sealing material positioned therebetween in a reduced pressure atmosphere; andcuring the sealing material,wherein the steps from heating the first substrate and the second substrate to curing the sealing material are performed in the reduced pressure atmosphere or an inert gas atmosphere without exposure to the air.3. The method for manufacturing the display device according to claim 2 , wherein the transistor includes an oxide semiconductor layer.4. The method for manufacturing the display device according to claim 2 , wherein the sealing material serves as a solid sealing.5. A method for manufacturing a display device comprising the steps of:preparing a first substrate having a transistor and an organic planarization film over the transistor;preparing a second substrate;heating the first substrate in a ...

Photomask and method for manufacturing active switch array substrate using same

This application relates to a photomask and a method for manufacturing an active switch array substrate using same. The photomask includes: a light penetration region, including a light penetration substrate; a translucent region, disposed on the light penetration substrate and formed of chromium or a chromium compound; a light shielding region, disposed on the light penetration substrate; and reflective material layers of a plurality of fine lines, disposed between the translucent region and the light shielding region and formed of chromium or a chromium compound, where the light penetration rate of the photomask is regulated according to doping and a distribution density of a low reflective material, so that the light penetration rate of the translucent region is lower than the light penetration rate of the light transmitting region and is higher than the light penetration rate of the light shielding region.

ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE

A method for manufacturing an array substrate which includes: depositing a gate metal film on a base substrate, and forming a first pattern including the gate electrode by a first patterning process; depositing a gate insulating film, a first transparent conductive film, a source/drain metal film and a doped a-Si film sequentially, and forming a second pattern including the pixel electrode, the source electrode, the drain electrode and a doped semiconductor layer by a second patterning process; depositing an a-Si film, and forming a third pattern including a TFT channel, the semiconductor layer and a gate insulating layer via-hole by a third patterning process; depositing a passivation layer film, and forming a fourth pattern including a passivation layer via-hole by a fourth patterning process, the passivation layer via-hole being arranged at a position corresponding to the gate insulating layer via-hole; and depositing a second transparent conductive film on the base substrate with the fourth pattern, and forming a fifth pattern including an electrical connector by a fifth patterning process. 1. A method for manufacturing an array substrate , the array substrate comprising a gate electrode , an active layer , a source electrode , a drain electrode and a pixel electrode , the method comprising:Step 1: depositing a gate metal film on a base substrate, and forming a first pattern including the gate electrode by a first patterning process;Step 2: depositing a gate insulating film, a first transparent conductive film, a source/drain metal film and a doped a-Si film sequentially on the base substrate with the first pattern, and forming a second pattern including the pixel electrode, the source electrode, the drain electrode and a doped semiconductor layer by a second patterning process;Step 3: depositing an a-Si film on the base substrate with the second pattern, and forming a third pattern including a TFT channel, the semiconductor layer and a gate insulating layer via ...

PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF

The present invention provides a pixel structure and a manufacturing method thereof. The pixel structure includes: a transparent substrate (), a gate line formed on the transparent substrate (), a thin-film transistor formed on the transparent substrate (), a data line () formed on the transparent substrate (), a pixel electrode () formed on the transparent substrate () and the thin-film transistor, a passivation layer () formed on the pixel electrode (), the transparent substrate (), and the data line (), and a common electrode () formed on the passivation layer (). The passivation layer () includes: a first portion () located on the data line (), a second portion () located on the pixel electrode (), and a third portion () located on the transparent substrate () and arranged on two opposite sides of the data line (). The first portion () of the passivation layer () has a thickness greater than a thickness of the second portion (). 1. A pixel structure , comprising: a transparent substrate , a gate line formed on the transparent substrate , a thin-film transistor formed on the transparent substrate , a data line formed on the transparent substrate , a pixel electrode formed on the transparent substrate and the thin-film transistor , a passivation layer formed on the pixel electrode , the transparent substrate , and the data line , and a common electrode formed on the passivation layer , the passivation layer comprising: a first portion located on the data line , a second portion located on the pixel electrode , and a third portion that is located on the transparent substrate and arranged on two opposite sides of the data line , the first portion of the passivation layer having a thickness that is greater than a thickness of the second portion , the pixel electrode and the common electrode partly overlapping so as to form a storage capacitance.2. The pixel structure as claimed in claim 1 , wherein the thickness of the first portion of the passivation layer is ...

METHOD FOR MANUFACTURING ARRAY SUBSTRATE AND METHOD FOR FORMING THROUGH HOLE

A method for manufacturing an array substrate and a method for forming a through hole are provided. The method for manufacturing the array substrate comprise: coating photoresist in an insulating layer through-hole region on a substrate; depositing an insulating layer on the substrate provided with the photoresist in the insulating layer through-hole region; and stripping off the photoresist in the insulating layer through-hole region to form an insulating layer through hole. The manufacturing method simplifies the process of forming the insulating layer through hole. 1. A method for forming a through hole , comprising:coating photoresist in an insulating layer through-hole region on a substrate;depositing an insulating layer on the substrate provided with the photoresist in the insulating layer through-hole region; andstripping off the photoresist in the insulating layer through-hole region to form an insulating layer through hole.2. A method for manufacturing an array substrate , comprising:coating photoresist in an insulating layer through-hole region on a substrate;depositing an insulating layer on the substrate provided with the photoresist in the insulating layer through-hole region; andstripping off the photoresist in the insulating layer through-hole region to form an insulating layer through hole.3. The method for manufacturing the array substrate according to claim 2 , comprising:depositing a metal layer on a substrate;coating photoresist on the substrate provided with the metal layer;performing complete exposure and development on the photoresist in a metal layer etch region to remove the photoresist in the metal layer etch region, taking the insulating layer through-hole region as a non-exposed region, and performing half-exposure and development on the photoresist outside of the insulating layer through-hole region to reduce the thickness of the photoresist outside of the insulating layer through-hole region;etching the metal layer in the metal layer ...

METHOD OF MANUFACTURING THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING DISPLAY SUBSTRATE HAVING THE SAME

A method of manufacturing a thin film transistor and a method of manufacturing a display substrate having the same are disclosed. In one aspect, the method of manufacturing a thin film transistor comprises forming an oxide semiconductor layer over a substrate, plasma-treating the oxide semiconductor layer with a plasma generated from a nitrogen gas or a nitric oxide gas so as to decrease defects in the oxide semiconductor layer, and annealing the plasma-treated oxide semiconductor layer to form a channel layer. 1. A method of manufacturing a thin film transistor for a display device , comprising:forming an oxide semiconductor layer on a substrate;plasma-treating the oxide semiconductor layer with a plasma generated from a nitrogen gas or a nitric oxide gas so as to decrease defects in the oxide semiconductor layer; andannealing the plasma-treated oxide semiconductor layer to form a channel layer.2. The method of claim 1 , wherein the oxide semiconductor layer comprises an amorphous oxide semiconductor material and the channel layer comprises the amorphous oxide semiconductor material.3. The method of claim 2 , wherein the annealing is performed at a temperature of about 400° C. or less.4. The method of claim 2 , wherein the oxide semiconductor layer is formed of indium claim 2 , gallium claim 2 , zinc claim 2 , tin claim 2 , or an oxide thereof.5. The method of claim 1 , wherein the forming of the oxide semiconductor layer and the plasma-treating of the oxide semiconductor layer are performed using a plasma enhanced chemical vapor deposition apparatus.6. The method of claim 1 , further comprising:forming a gate electrode on the channel layer; andforming source and drain electrodes electrically connected to the channel layer.7. The method of claim 1 , further comprising:forming a gate electrode on the substrate before the forming of the oxide semiconductor layer; andforming source and drain electrodes electrically connected to the channel layer.8. The method of claim ...

MATRIX DEVICE AND MANUFACTURING METHOD OF MATRIX DEVICE

In a matrix device having two or more systems of electrode groups such as X and Y systems, the one or more electrode groups are grouped into groups each consisting of a plurality of pixel electrodes, connection wires are branched off and connected to the pixel electrodes so that the same signal is not supplied to the pixel electrodes of the same group but the same signal is supplied to one pixel electrode of two or more groups, switching elements are provided corresponding to the individual pixel electrodes, and a gate electrode and a gate insulating film of the switching elements are used in common in the same group. Accordingly, in the matrix device and manufacturing of the matrix device, the number of connection wires and driver ICs is reduced. 1. A matrix device comprising:at least two systems of electrode groups each consisting of a plurality of pixel electrodes that are elongated and do not intersect each other, the pixel electrodes of the electrode group of one system intersecting those of the other system,whereinthe electrode group of at least one system is grouped into a plurality of groups each consisting of a plurality of the pixel electrodes, branched wires connected to the pixel electrodes of the system divided into the plurality of groups so that the same signal is not supplied to the pixel electrodes of the same group but the same signal is supplied to one pixel electrode of each group, and', 'switching elements using a semiconductor which are provided corresponding to the individual pixel electrodes of the system divided into the plurality of groups, and, 'the matrix device includes'}a gate electrode and a gate insulating film of the switching elements are common to the switching elements corresponding to the pixel electrodes of the same group.2. The matrix device according to claim 1 ,wherein the gate electrode of the switching elements and the pixel electrodes of the electrode group of the system different from that of the electrode group ...

THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE

A TFT substrate includes: a first semiconductor layer made of a-Si, disposed on a gate insulation layer, facing to a first gate electrode; a first and a second contact layers made of oxide having semiconductor characteristics and each partially disposed in contact with the first semiconductor layer; a first and a second electrodes connected with the first and the second contact layers, respectively; a second semiconductor layer having the same composition as the first contact layer, disposed on the gate insulation layer, facing to a second gate electrode; a third and a fourth electrodes having the same composition as the first electrode and each partially disposed in contact with the second semiconductor layer; and a pixel electrode made of oxide having conductive characteristics and the same composition as the first contact layer, disposed on an insulation layer in a first region, connected with the second electrode. 1. A thin film transistor substrate comprising:a first gate electrode made of a first conductive film and disposed in a predetermined first region on a substrate;a second gate electrode made of the first conductive film having a composition same as a composition of the first gate electrode and disposed in a predetermined second region on the substrate;a gate insulation layer disposed on the substrate and covering the first gate electrode and the second gate electrode;a first semiconductor layer made of amorphous silicon, disposed on the gate insulation layer, and overlapping the first gate electrode in plan view;a first contact layer made of oxide having semiconductor characteristics, a part of the first contact layer being disposed in contact with a surface of the first semiconductor layer;a second contact layer made of the oxide having the semiconductor characteristics and a composition same as a composition of the first contact layer, and disposed separately from the first contact layer, a part of the second contact layer being disposed in contact ...

Display Substrate, Method of Fabricating the Same, Display Panel and Pressure Welding Device

The present disclosure provides a display substrate and a method of fabricating the same, a display panel and a pressure welding device. The display substrate includes a flexible substrate having a first surface and a second surface opposite to each other, and the first surface includes a first area and a second area. The method includes forming thin film transistors and light-emitting elements in the first area, forming a lead for circuit-bonding in the second area, forming a curable material layer on the second surface, and performing a curing process on a part of the curable material layer corresponding to the second area to form a cured layer. The technical solutions of the present disclosure improves the stability of pressure welding during a pressure welding process of circuit component, and lowers the possibility of occurrence of wire defect. 1. A method of fabricating a display substrate , the display substrate comprising a flexible substrate having a first surface and a second surface opposite to each other , and the first surface comprising a first area and a second area ,the method comprising:forming thin film transistors and light-emitting elements in the first area;forming a lead for circuit-bonding in the second area;forming a curable material layer on the second surface; andperforming a curing process on a part of the curable material layer corresponding to the second area to form a cured layer.2. The method of claim 1 , wherein the curable material layer comprises an ultraviolet-curable material claim 1 , and the step of performing the curing process on the part of the curable material layer corresponding to the second area comprises:performing an ultraviolet-curing process on the part of the curable material layer corresponding to the second area.3. The method of claim 1 , wherein the curable material layer comprises a heat-curable material claim 1 , and the step of performing the curing process on the part of the curable material layer ...

Array Substrate and Manufacturing Method Thereof, and Display Device

An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes a base substrate; a planarization layer, located on the base substrate; a first electrode layer, located on a side of the planarization layer away from the base substrate; and an insulating layer, located on a side of the planarization layer and the first electrode layer away from the base substrate, the insulating layer includes a plurality of first pores. 1. An array substrate , comprising:a base substrate;a planarization layer, located on the base substrate;a first electrode layer, located on a side of the planarization layer away from the base substrate; andan insulating layer, located on a side of the planarization layer and the first electrode layer away from the base substrate,wherein the insulating layer comprises a plurality of first pore structures.2. The array substrate according to claim 1 , wherein each of the first pore structures has a shape of ellipse.3. The array substrate according to claim 2 , wherein long axis directions of adjacent ones of the first pore structures are perpendicular to each other.4. The array substrate according to claim 1 , wherein each of the first pore structures has a shape of rectangle.5. The array substrate according to claim 4 , wherein long edge directions of adjacent ones of the first pore structures are perpendicular to each other.6. The array substrate according to claim 1 , further comprising:a second electrode layer, located on a side of the insulating layer away from the first electrode layer, and comprising a plurality of openings,wherein an orthographic projection of the second electrode layer on the base substrate is at least partially overlapped with an orthographic projection of the first electrode layer on the base substrate, in an overlapped region of the orthographic projections of the first electrode layer on the base substrate and the second electrode layer on the base substrate, an ...

Organic Light-Emitting Diode (OLED) Array Substrate and Manufacturing Method Thereof and Display Device

An organic light-emitting diode array substrate and a manufacturing method thereof and a display device are provided. The OLED array substrate includes a base substrate, a power line and a pixel structure disposed on the base substrate. The power line is disposed under the pixel structure and is at least partially overlapped with the pixel structure; an insulating layer is disposed between the power line and the pixel structure, and a first via hole structure is disposed in the insulating layer; and the power line is connected with a driving transistor in the pixel structure through the first via hole structure. 1. An organic light-emitting diode (OLED) array substrate , comprising:a base substrate;a power line and a pixel structure disposed on the base substrate;wherein the power line is disposed under the pixel structure and is at least partially overlapped with the pixel structure; an insulating layer is disposed between the power line and the pixel structure, and a first via hole structure is disposed in the insulating layer; and the power line is connected with a driving transistor in the pixel structure through the first via hole structure.2. The OLED array substrate according to claim 1 , wherein the driving transistor is a top-gate thin-film transistor claim 1 , and the power line is overlapped with an active layer of the top-gate thin-film transistor to shield the active layer from light irradiation.3. The OLED array substrate according to claim 1 , wherein the power line is in a planar structure made of metal mesh.4. The OLED array substrate according to claim 3 , wherein each column of the pixel structures correspond to one power line of the planar structure.5. The OLED array substrate according to claim 1 , further comprising a gate line and a data line disposed on the base substrate claim 1 ,wherein the pixel structure is disposed within an area defined by an intersection of the gate line and the data line; the power line is provided with a hollow ...

DISPLAY SUBSTRATE ASSEMBLY AND METHOD OF MANUFACTURING THE SAME, AND DISPLAY APPARATUS

In embodiments of the present disclosure, there is provided a display substrate assembly including: a base substrate; a light shielding layer on the base substrate; and an active layer of a thin film transistor, above the base substrate. An orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer includes an ion-doped amorphous silicon layer. In embodiments of the present disclosure, there is also provided a method of manufacturing a display substrate assembly and a display apparatus including the display substrate assembly. 1. A display substrate assembly , comprising:a base substrate;a light shielding layer on the base substrate; andan active layer of a thin film transistor, above the base substrate;wherein an orthographic projection of the active layer on the base substrate in a thickness direction of the base substrate is within an orthographic projection of the light shielding layer on the base substrate in the thickness direction of the base substrate, and the light shielding layer comprises an ion-doped amorphous silicon layer.2. The display substrate assembly of claim 1 , further comprising:a buffer layer on the base substrate;a first insulating layer on the buffer layer; anda second insulating layer on the light shielding layer;wherein, the light shielding layer is between the first insulating layer and the second insulating layer, and the second insulating layer is between the light shielding layer and the active layer.3. The display substrate assembly of claim 2 , wherein orthogonal projections of the active layer claim 2 , the first insulating layer claim 2 , the light shielding layer and the second insulating layer on the base substrate in the thickness direction of the base substrate are completely overlapped substantially.4. The ...

DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME

A method of manufacturing a display device includes preparing a carrier substrate, forming a first substrate layer on the carrier substrate, forming a first, second, and third through holes in the first substrate layer, forming a first intermediate conductive layer having a first exposed portion and a second exposed portion, forming a second intermediate conductive layer having a third exposed portion, forming a second substrate layer on the first substrate layer to cover the first intermediate conductive layer and the second intermediate conductive layer, forming a fourth through hole in the second substrate layer, forming a wiring on the second substrate layer, separating the first substrate layer from the carrier substrate, arranging a first electronic device on a surface of the first substrate layer, and arranging a second electronic device on the surface of the first substrate layer. 1. A method of manufacturing a display device , the method comprising:preparing a carrier substrate;forming a first substrate layer on the carrier substrate;forming a first through hole, a second through hole, and a third through hole, which are sequentially arranged and spaced apart from each other, in the first substrate layer;forming a first intermediate conductive layer having a first exposed portion exposed to the outside of the first substrate layer through the first through hole and a second exposed portion exposed to the outside of the first substrate layer through the second through hole, and a second intermediate conductive layer that is spaced apart from the first intermediate conductive layer and has a third exposed portion exposed to the outside of the first substrate layer through the third through hole, above the first substrate layer;forming a second substrate layer on the first substrate layer to cover the first intermediate conductive layer and the second intermediate conductive layer;forming a fourth through hole in the second substrate layer such that a portion ...

ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, DISPLAY DEVICE

An array substrate includes a base substrate, a plurality of signal lines disposed at a side of the base substrate, and an organic layer disposed at a side of the plurality of signal lines facing away from the base substrate. The organic layer includes at least one auxiliary portion and a reference portion surrounding the at least one auxiliary portion, and a thickness of each auxiliary portion is less than a thickness of the reference portion. 1. An array substrate , comprising:a base substrate;a plurality of signal lines disposed at a side of the base substrate; andan organic layer disposed at a side of the plurality of signal lines facing away from the base substrate, whereinthe organic layer includes at least one auxiliary portion and a reference portion surrounding the at least one auxiliary portion, and a thickness of each auxiliary portion is less than a thickness of the reference portion.2. The array substrate according to claim 1 , wherein an orthographic projection of each auxiliary portion on the base substrate is located outside a range of an orthographic projection of the plurality of signal lines on the base substrate.3. The array substrate according to claim 2 , further comprising at least one electrode disposed at a side of the organic layer facing away from the base substrate.4. The array substrate according to claim 3 , wherein the thickness of each auxiliary portion is less than or equal to one third of the thickness of the reference portion.5. The array substrate according to claim 3 , wherein the thickness of each auxiliary portion is less than or equal to a value in a range of 0.8 μm to 1.2 μm.6. The array substrate according to claim 3 , wherein the reference portion is coupled to the at least one auxiliary portion.7. The array substrate according to claim 3 , wherein the at least one auxiliary portion includes a plurality of auxiliary portions claim 3 , and thicknesses of the auxiliary portions are the same.8. The array substrate according to ...

SLOT DIE COATING APPARATUS AND COATING METHOD USING THE SAME

A slot die coater planarizing an upper surface of an encapsulation layer and a coating method using the same. The slot die coater includes a slit nozzle configured to supply a coating solution. The slit nozzle includes a hole vertically penetrating a center portion thereof, a first bottom surface disposed at a movement direction side of the slit nozzle with reference to the hole, and a second bottom surface disposed at an opposite direction side of the movement direction of the slit nozzle with reference to the hole. A width of the first bottom surface is different from the width of the second bottom surface. 1. A slot die coater comprising:a slit nozzle configured to supply a coating solution,wherein: a hole vertically penetrating a center portion thereof;', 'a first bottom surface positioned at a movement direction side of the slit nozzle with reference to the hole; and', 'a second bottom surface positioned at an opposite direction side of the movement direction of the slit nozzle with reference to the hole; and, 'the slit nozzle comprisesthe width of the first bottom surface is different from the width of the second bottom surface.2. The slot die coater of claim 1 , wherein the width of the first bottom surface is less than the width of the second bottom surface.3. The slot die coater of claim 2 , wherein the first bottom surface is disposed above the second bottom surface.4. The slot die coater of claim 1 , wherein the width of the second bottom surface is less than the width of the first bottom surface.5. The slot die coater of claim 4 , wherein the first bottom surface is disposed above the second bottom surface.6. The slot die coater of claim 1 , wherein the first bottom surface is disposed above the second bottom surface.7. The slot die coater of claim 1 , wherein:the first bottom surface has a width of 0.1 mm to 0.9 mm; andthe second bottom surface has a width of 0.1 mm to 0.9 mm.8. A display device comprising:a thin film transistor formed on a substrate;a ...

PHOTOSENSITIVE RESIN COMPOSITION FOR THIN FILM TRANSISTORS, CURED FILM, THIN FILM TRANSISTOR, LIQUID CRYSTAL DISPLAY DEVICE OR ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE, METHOD FOR PRODUCING CURED FILM, METHOD FOR MANUFACTURING THIN FILM TRANSISTOR, AND METHOD FOR MANUFACTURING LIQUID CRYSTAL DISPLAY DEVICE OR ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE

The purpose of the present invention is to provide a photosensitive resin composition for thin film transistors, a cured film of which generates an extremely small amount of an outgas, and which is capable of forming an insulating layer for thin film transistors having excellent drive performance. In order to achieve the above-described purpose, the present invention has the configuration described below. Namely, a photosensitive resin composition for thin film transistors, which contains (A) an alkali-soluble resin having an amide group and/or an imide group, (B) a photosensitive compound and (C) organic solvents, and wherein the content of an organic solvent having nitrogen atoms in the organic solvents (C) is 1% by mass or less relative to the total mass of the organic solvents. 1. A photosensitive resin composition for thin film transistors , comprising (A) an amide group- and/or imide group-containing alkali-soluble resin , (B) a photosensitive compound , and (C) an organic solvent , wherein the organic solvent (C) contains 1% by mass or less of a nitrogen atom-containing organic solvent based on the organic solvent in total.2. The photosensitive resin composition for thin film transistors according to claim 1 , wherein the organic solvent (C) contains 80% by mass or more of an organic solvent satisfying the following (1) and (2) based on the organic solvent in total:{'sup': 3', '1/2, '(1) a solubility parameter of 8.0 or more and 11.0 or less [unit: (cal/cm)]; and'}(2) an organic compound composed of a carbon atom, a hydrogen atom, and an oxygen atoms.3. The photosensitive resin composition for thin film transistors according to claim 1 , wherein the organic solvent (C) contains 0.01% by mass or more and 1% by mass or less of the nitrogen atom-containing organic solvent based on the organic solvent in total.4. The photosensitive resin composition for thin film transistors according to claim 1 , wherein the organic solvent (C) contains 0.01% by mass or more and ...

Manufacture Method Of Low Temperature Poly Silicon, Manufacturing Method Of TFT Substrate Utilizing The Method, And TFT Substrate Structure

The present invention provides a manufacture method of Low Temperature Poly Silicon, a manufacture method of a TFT substrate utilizing the method and a TFT substrate structure. The manufacture method of Low Temperature Poly Silicon comprises steps of: step 1, providing a substrate ( 1 ); step 2, depositing a buffer layer ( 2 ) on the substrate ( 1 ); step 3, patterning the buffer layer ( 2 ) to form a convex part ( 21 ) and a concave part ( 23 ) having different thicknesses; step 4, depositing an amorphous silicon layer ( 3 ) on the buffer layer ( 2 ) comprising the convex part ( 21 ) and the concave part ( 23 ); step 5, implementing a pretreatment of an excimer laser anneal to the amorphous silicon layer ( 3 ); step 6, implementing the excimer laser anneal to the amorphous silicon layer ( 3 ), and a laser beam scans an entire surface of the amorphous silicon layer ( 3 ) to melt the amorphous silicon layer ( 3 ) to recrystallize as a poly silicon layer ( 4 ). The method is capable of effectively controlling the locations and the directions of the recrystallization.

METHOD FOR FORMING A THIN-FILM LAYER PATTERN, DISPLAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

A method for forming a thin-film layer pattern, a display substrate and a manufacturing method thereof, and a display device are provided. The method for forming the thin-film layer pattern comprises: forming a first thin-film layer to be patterned on a substrate; forming a first overcoat (OC) layer on a surface of the first thin-film layer; forming a first overcoat layer pattern by beam melting; and removing the first thin-film layer not covered by the first overcoat layer pattern to form a first thin-film layer pattern. The method adopts beam melting process and hence can improve the accuracy and the resolution of the display substrate, improve the product quality and reduce the manufacturing cost. 1. A method for manufacturing a thin-film layer pattern , comprising:forming a first thin-film layer to be patterned on a substrate;forming a first overcoat layer on a surface of the first thin-film layer;forming a first overcoat layer pattern by beam melting; andremoving the first thin-film layer not covered by the first overcoat layer pattern to form a first thin-film layer pattern.2. The method for forming the thin-film layer pattern according to claim 1 , after forming the first thin-film layer pattern claim 1 , further comprising: removing the first overcoat layer pattern.3. The method for forming the thin-film layer pattern according to claim 1 , after forming the first thin-film layer pattern claim 1 , further comprising:forming a second thin-film layer to be patterned;forming a second overcoat layer on a surface of the second thin-film layer;forming a second overcoat layer pattern by beam melting; andremoving the second thin-film layer not covered by the second overcoat layer pattern to form a second thin-film layer pattern.4. The method for forming the thin-film layer pattern according to claim 3 , after forming the second thin-film layer pattern claim 3 , further comprising:removing the second overcoat layer pattern, or removing residual first overcoat layer ...

ULTRA HIGH DENSITY THIN FILM TRANSISTOR SUBSTRATE HAVING LOW LINE RESISTANCE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

A display device is described that has reduced resistance in one or more of the gate, common, data electrical lines that control the operation of the pixels of the display device. Reduced resistance is achieved by forming additional metal and/or metal-alloy layers on the gate, common, and/or data lines in such a manner so that the cross-sectional area of those lines is increased. As a consequence, each such line is formed so as to be thicker than could otherwise be achieving without causing defects in the rubbing process of an alignment layer. Additionally, no widening of these lines is needed, thus preserving the aspect ratio of the device. The gate insulating and semiconducting layers that in part make up the thin film transistors that help control the operation of the pixels of the device may also be designed to take into account the increased thickness of the lines. 1. A display device comprising:a gate line, a common line, and an additional data line (ADL) formed on a substrate;a gate insulating layer formed on a portion of the gate line and a portion of the ADL;a semiconductor layer formed on at least a portion of the gate insulating layer;a data line formed on a portion of the ADL not covered by the gate insulating layer;an additional gate line (AGL) formed on a portion of the gate line not covered by the gate insulating layer;an additional common line (ACL) formed on the common line; anda transistor comprising a gate coupled to the gate line, a source coupled to the data line, a drain, and a portion of the semiconductor layer at least partially located between the source and the drain.2. The display device of wherein a combined thickness of the data line and the ADL is between 12 claim 1 ,000-16 claim 1 ,000 Å.3. The display device of wherein a combined thickness of the gate line and the AGL is between 12 claim 1 ,000-16 claim 1 ,000 Å.4. The display device of wherein a combined thickness of the common line and the ACL is between 12 claim 1 ,000-16 claim 1 , ...

Display device and method of manufacturing the same

A display device capable of reducing the number of manufacturing processes and manufacturing costs and a method of manufacturing the display device are provided, the display device including: a first substrate; a gate transmission member and a pixel electrode on the first substrate; a gate insulating layer on the gate transmission member and the pixel electrode; a semiconductor layer on the gate insulating layer, the semiconductor layer overlapping a gate electrode of the gate transmission member; and a source electrode and a drain electrode on the semiconductor layer, wherein the gate transmission member includes a first conductive layer pattern and a second conductive layer pattern on the first conductive layer pattern, the first conductive layer pattern including a material the same as a material forming the pixel electrode.

MANUFACTURING METHOD OF TFT SUBSTRATE STRUCTURE

The present invention provides a manufacturing method of a TFT substrate structure, which includes sequentially forming a first passivation layer, a planarization layer, and a first transparent conductive film and then first subjecting the first transparent conductive film to patterning to form a first pixel electrode and thereafter, a photolithographic process is applied to the planarization layer for exposure and thus forming a first via located above and corresponding to a drain terminal, followed by using the planarization layer as a self-aligning mask to apply dry etching to the first passivation layer for etching to form a second via that corresponds to the first via, whereby residues of the first transparent conductive film in the first and second vias can be effectively prevented and product yield is enhanced. Further, on mask can be saved to prevent reduction of aperture ratio caused by misalignment thereby improving the production efficiency, reducing production cost, and increasing cost-related competition power of products. 1. A manufacturing method of a thin-film transistor (TFT) substrate structure , comprising the following steps:(1) providing a base plate and depositing a buffer layer on the base plate and depositing a first metal layer on the buffer layer and subjecting the first metal layer to patterning to form a gate terminal;(2) depositing a gate insulation layer on the buffer layer and the gate terminal and depositing an oxide semiconductor on the gate insulation layer and subjecting the oxide semiconductor to patterning to form an island-like semiconductor layer;(3) depositing a second metal layer on the gate insulation layer and the island-like semiconductor layer and subjecting the second metal layer to patterning to form a source terminal and a drain terminal;(4) depositing a first passivation layer on the gate insulation layer, the island-like semiconductor layer, the source terminal, and the drain terminal;(5) forming a planarization ...

METHOD FOR MANUFACTURING ARRAY SUBSTRATE AND ARRAY SUBSTRATE MANUFACTURED THEREFOR

A method for manufacturing an array substrate is disclosed and includes steps of: sequentially forming a first metal layer, an insulating layer and a second metal layer on a glass substrate; forming a passivation layer on the second metal layer; performing a first etching process on the passivation layer to obtain a first groove and a second groove; performing a second etching process on the passivation layer to obtain a third groove; and forming a pixel electrode layer on the passivation layer. The method saves one photomask and a photolithography step, thereby reducing the cost and improving the efficiency. 1. A method for manufacturing an array substrate , comprising steps of:providing a glass substrate, and sequentially forming a first metal layer and an insulating layer on the glass substrate, wherein the first metal layer includes a plurality of scanning lines;forming a second metal layer on the insulating layer, wherein the second metal layer includes a plurality of data lines;forming a passivation layer on the second metal layer;performing a first etching process on the passivation layer to obtain a first groove and a second groove;performing a second etching process on the passivation layer to obtain a third groove; andforming a pixel electrode layer on the passivation layer; whereinthe first groove and the second groove obtained via the first etching process have the same etching depth; a sum of an etching depth of the third groove and the etching depth of the first groove in the first etching process is greater than or equal to a thickness of the passivation layer.2. The method for manufacturing an array substrate as claimed in claim 1 , wherein the step of performing a second etching process on the passivation layer to obtain a third groove is to perform the second etching process with respect to a position for forming the third groove and a position corresponding to the first groove on the passivation layer to obtain the third groove and expose the ...

INTEGRATED FLOWABLE LOW-K GAP-FILL AND PLASMA TREATMENT

Provided are methods of depositing a film in high aspect ratio (AR) structures with small dimensions. The method provides flowable deposition for seamless gap-fill, film densification by low temperature inductively coupled plasma (ICP) treatment (<600° C.), optional film curing, and etch back to form a low-k dielectric film having a dielectric constant, k-value less than 3. 1. A processing method comprising:forming a dielectric film on a substrate surface through a process cycle, the process cycle comprising depositing a flowable low-k dielectric layer on the substrate surface and densifying the flowable low-k dielectric layer and form the dielectric film; andremoving a portion of the dielectric film.2. The method of claim 1 , wherein dielectric film has a dielectric constant (k) of less than about 3.3. The method of claim 1 , wherein the plasma comprises one or more of nitrogen (N) claim 1 , argon (Ar) claim 1 , helium (He) claim 1 , hydrogen (H) claim 1 , carbon monoxide (CO) claim 1 , carbon dioxide (CO) claim 1 , nitrous oxide (NO) claim 1 , ammonia (NH) claim 1 , or oxygen (O).4. The method of claim 1 , wherein densifying the flowable low-k dielectric layer comprises treating the flowable low-k dielectric layer with inductively coupled plasma (ICP) at a temperature less than about 600° C.5. The method of claim 1 , wherein the method is performed in a processing chamber without breaking vacuum.6. The method of claim 1 , where the substrate surface has a plurality of fins claim 1 , a plurality of gates claim 1 , and at least one feature thereon.7. The method of claim 6 , wherein the at least one feature comprises a bottom surface and at least one sidewall.8. The method of claim 7 , wherein the flowable low-k dielectric layer is deposited on the bottom surface and the at least one sidewall of the at least one feature.9. The method of claim 6 , wherein the plurality of fins comprise alternating layers of silicon germanium (SiGe) and silicon (Si).10. The method of ...

ARRAY SUBSTRATE, MANUFACTURING METHOD OF THE ARRAY SUBSTRATE, AND DISPLAY PANEL

The present application discloses a array substrate, a manufacturing method of the array substrate, and a display panel, the manufacture procedure includes the following steps: sequentially forming a buffer layer and a photoresist layer on a glass substrate; placing the substrate into an activation agent for activation, and forming an activation liquid particle layer with a first preset pattern at a corresponding position where the activation agent is in contact with the photoresist layer, and forming an activation liquid particle layer with a second preset pattern at a corresponding position where the activation agent is in contact with the buffer layer; removing the photoresist layer and the activation liquid particle layer with the first preset pattern; and performing chemical plating to form a first metal layer at a position corresponding to the activation liquid particle layer with the second preset pattern in contact with the buffer layer. 1. A manufacturing method of an array substrate , comprising:forming a buffer layer on a glass substrate;forming a photoresist layer with a first preset pattern on the buffer layer;placing the glass substrate provided with the photoresist layer with the first preset pattern into an activation agent for activation, and forming an activating particle layer with the first preset pattern at a corresponding position where the activation agent is in contact with the photoresist layer with the first preset pattern, and forming an activating particle layer with a second preset pattern at a corresponding position where the activation agent is in contact with the buffer layer;removing the photoresist layer with the first preset pattern and the activating particle layer with the first preset pattern;performing chemical plating to form a first metal layer with the second preset pattern at a position corresponding to the activating particle layer with the second preset pattern; andsequentially forming an insulating layer, an active layer ...

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

A method for producing a display device includes locating a substrate, including a plurality of pixels, on a jig including a magnet; locating a plate formed of a magnetic material on the substrate to secure the substrate; and folding back an end portion of the substrate in a state where the substrate is held between the jig and the plate. 1. A method for producing a display device , comprising:locating a substrate, including a plurality of pixels, on a jig including a magnet;locating a plate formed of a magnetic material on the substrate to secure the substrate by a magnetic force; andfolding back an end portion of the substrate in a state where the substrate is held between the jig and the plate.2. The method for producing a display device according to claim 1 , wherein folding back the end portion of the substrate includes folding back the substrate with a spacer being held inside.3. The method for producing a display device according to claim 2 , wherein:the substrate has a first marker and a second marker provided thereon at different positions from each other; andthe end portion of the substrate is folded while being positionally aligned by use of the first marker and the second marker.4. The method for producing a display device according to claim 1 , wherein:the jig includes a protrusion for positional alignment;the plate has a hole having a size sufficiently large to allow the protrusion to be inserted thereinto; andthe plate is located on the substrate such that the protrusion is fit into the hole.5. The method for producing a display device according to claim 1 , wherein the substrate is located on the jig while being positionally aligned by use of a marker or a recessed portion provided on or in the jig.6. The method for producing a display device according to claim 1 , wherein:the plate has a recessed portion formed therein; andthe plate is located on the substrate such that a part of the substrate is fit into the recessed portion.7. The method for ...

DISPLAY PANEL, ITS MANUFACTURING METHOD, AND DISPLAY DEVICE

The present disclosure provides a display panel, its manufacturing method and a display device. The manufacturing method of the display panel comprises: forming, on a substrate, a thin film transistor comprising a gate electrode, an active layer, a source electrode and a drain electrode; forming a hydrogen diffusion barrier layer that covers the entire substrate, wherein the hydrogen diffusion barrier layer is electrically conductive and is electrically connected to the drain electrode; and forming a photosensitive structure layer on the hydrogen diffusion barrier layer. 1. A method for manufacturing a display panel , comprising steps of:forming, on a substrate, a thin film transistor comprising a gate electrode, an active layer, a source electrode and a drain electrode;forming a hydrogen diffusion barrier layer that covers the entire substrate, wherein the hydrogen diffusion barrier layer is electrically conductive and is electrically connected to the drain electrode; andforming a photosensitive structure layer on the hydrogen diffusion barrier layer.2. The method according to claim 1 , wherein the step of forming the photosensitive structure layer on the hydrogen diffusion barrier layer comprises:depositing an N-type amorphous silicon thin film on the hydrogen diffusion barrier layer by adopting a plasma enhanced chemical vapor deposition process;depositing an intrinsic amorphous silicon thin film on the N-type amorphous silicon thin film; andsubjecting the intrinsic amorphous silicon thin film to ion implantation, and subjecting the ion-implanted intrinsic amorphous silicon thin film to activation treatment to form a P-type amorphous silicon thin film on an upper layer of the intrinsic amorphous silicon thin film.3. The method according to claim 1 , further comprising:depositing a first conductive thin film on the photosensitive structure layer; andpatterning the hydrogen diffusion barrier layer, the photosensitive structure layer and the first conductive thin ...

DISPLAY SUBSTRATE, METHOD FOR FABRICATING THE SAME, DISPLAY PANEL

A display substrate, a method for fabricating the same, and a display panel are disclosed. The method comprises forming a TFT on a substrate. The TFT comprises a gate, a gate insulating layer, an active layer, an ohmic contact layer, a source and a drain which are formed on the substrate in sequence. After forming the active layer, and prior to forming the ohmic contact layer, the method comprises forming a first pattern in a non-TFT region. The first pattern in the non-TFT region covers the gate insulating layer. 1. A method for fabricating a display substrate , comprising forming a TFT on a substrate ,wherein forming the TFT comprises forming a gate, a gate insulating layer, an active layer, an ohmic contact layer, a source and a drain on the substrate in sequence,wherein after forming the active layer, and prior to forming the ohmic contact layer, the method further comprises forming a first pattern in a non-TFT region which is configured to cover the gate insulating layer.2. The method of claim 1 , further comprising: forming a second pattern in a channel region of the active layer by using a same insulating material as the first pattern and at a same time as forming the first pattern in the non-TFT region.3. The method of claim 2 , wherein at a same time as forming the ohmic contact layer claim 2 , partially etching the second pattern to partially retain a thickness of the second pattern and form a protection insulating layer pattern.4. The method of claim 3 , wherein the protection insulating layer pattern has a thickness of 5-15 nm.5. The method of claim 3 , wherein forming the ohmic contact layer claim 3 , the protection insulating layer pattern claim 3 , the source and the drain comprises:forming the first pattern and the second pattern on the substrate on which the active layer has been formed;forming an ohmic contact transitional pattern on the substrate on which the first pattern and the second pattern have been formed, wherein the ohmic contact ...

Array substrate, manufacturing method thereof, and display apparatus

The present disclosure provides an array substrate, its manufacturing method, and a display apparatus containing the array substrate. The array substrate includes: a substrate; a plurality of gate lines and a plurality of data lines, disposed over the substrate and arranged in rows and columns respectively; and a plurality of pixel regions, each arranged in an area defined by crossing gate lines and data lines and comprising a pixel electrode. The plurality of data lines are configured such that in each pixel region, orthographic projection of any one of the plurality of data lines on the substrate and orthographic projection of a corresponding pixel electrode on the substrate has an overlapping area having a width of ≥0 μm.

ARRAY SUBSTRATE, MANUFACTURING METHOD FOR THE SAME AND DISPLAY PANEL

The present invention discloses an array substrate, manufacturing method for the same and display panel. The present invention adopts a vertical superposition method to connect the QLED device with the TFT. When applying a voltage, the first semiconductor pattern and the second semiconductor pattern respectively generate electron holes and electrons to move toward the QLED device. The electron holes and electrons are recombined in the light-emitting layer to emit a light such that the light can be emitted right above the QLED device in order to realize a light-emitting at a TFT region, and increase the aperture ratio of the display panel. 1. An array substrate , comprising:a substrate;a first gate electrode pattern formed on the substrate and a first insulation layer covered on the first gate electrode pattern;a first semiconductor pattern formed on the first insulation layer, wherein, the first semiconductor pattern is located right above the first gate electrode pattern for generating electron holes when applying with a voltage;a bank layer that covers the first semiconductor pattern, wherein, the bank layer is provided with a concave slot and two first contact holes located outside the concave slot, the concave slot and the two first contact holes all reveal a surface of the first semiconductor pattern;a QLED device formed in the concave slot and contacted with the first semiconductor pattern;a second semiconductor pattern formed on the bank layer for generating electrons when applying with a voltage, wherein, the second semiconductor pattern directly covers on the QLED device and the two first contact holes, and electrically connected to the first semiconductor pattern through the two first contact holes;a second insulation layer covered on the second semiconductor pattern, wherein, the second insulation layer is provided with two second contact holes that reveal a surface of the second semiconductor pattern;source electrode pattern and a drain electrode pattern ...

FLEXIBLE DISPLAY SUBSTRATE, FLEXIBLE DISPLAY DEVICE, AND METHOD FOR REPAIRING THE SAME

A flexible display substrate, a flexible display device, and a method for repairing the same are disclosed in embodiments of the disclosure, all belonging to a technical field of display. The flexible display substrate comprises: an underlying substrate; and a plurality of flexible structure assemblies provided on the underlying substrate, each of which is electrically conductive; at least one of the plurality of flexible structure assemblies comprises at least one repairing layer formed by a first conductive material which is repairable and at least one circuit device layer formed by a second conductive material, the circuit device layer and the repairing layer being provided to overlap with each other. 1. A flexible display substrate , comprising:an underlying substrate; anda plurality of flexible structure assemblies provided on the underlying substrate, each of which is electrically conductive;wherein at least one of the plurality of flexible structure assemblies comprises at least one repairing layer formed by a first repairable conductive material which is repairable and at least one circuit device layer formed by a second conductive material, the circuit device layer and the repairing layer being provided to overlap with each other.2. The flexible display substrate according to claim 1 , wherein the at least one repairing layer and the at least one circuit device layer which are provided adjacent to each other are in complete contact and electrical communication with each other.3. The flexible display substrate according to claim 1 , wherein the at least one of the plurality of flexible structure assemblies further comprises one of a gap and an intermediate dielectric layer claim 1 , located between the at least one repairing layer and the at least one circuit device layer which are provided adjacent to but apart from each other; andwherein the at least one repairing layer and the at least one circuit device layer are in electrical communication with each ...

ARRAY SUBSTRATE, DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME

The present application relates to an array substrate, a display panel and a method of manufacturing the same, the array substrate comprising a substrate, a plurality of active switches, a color filter layer, a spacer unit layer, and an electrode layer formed on the color filter layer and the spacer unit layer. 1. An array substrate , comprising:a substrate including a display region and a non-display region;a plurality of active switches arrayed on the substrate;a color filter layer arrayed on the substrate and formed on the plurality of active switches;a spacer unit layer formed on the color filter layer; and,an electrode layer formed on the color filter layer and the spacer unit layer, the electrode layer including a first electrode layer located in the display region and a second electrode layer located in the non-display region.2. The array substrate according to claim 1 , wherein the spacer unit layer includes a plurality of spacer units claim 1 , and the first electrode layer includes a first electrode region overlying the spacer unit.3. The array substrate according to claim 2 , wherein the first electrode overlying the spacer unit includes: the first electrode region overlies a side surface and/or an upper end surface of the spacer unit.4. The array substrate according to claim 2 , wherein the first electrode region is formed on at least a portion of the spacer unit.5. The array substrate according to claim 2 , wherein a plurality of color resist unit is formed on the substrate to arranged to constitute the color filter layer claim 2 , and the first electrode layer further includes a second electrode region formed on the color resist unit claim 2 , the second electrode region connecting with the first electrode region.6. The array substrate according to claim 1 , wherein the second electrode layer is insulated from the first electrode layer.7. The array substrate according to claim 1 , wherein the active switch is a thin film transistor layer including a ...

DISPLAY DEVICE, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC DEVICE

A liquid crystal display device with a high aperture ratio is provided. A liquid crystal display device with low power consumption is provided. A display device includes a transistor and a capacitor. The transistor includes a first insulating layer, a first semiconductor layer in contact with the first insulating layer, a second insulating layer in contact with the first semiconductor layer, and a first conductive layer electrically connected to the first semiconductor layer via an opening portion provided in the second insulating layer. The capacitor includes a second conductive layer in contact with the first insulating layer, the second insulating layer in contact with the second conductive layer, and the first conductive layer in contact with the second insulating layer. The second conductive layer includes a composition similar to that of the first semiconductor layer. The first conductive layer and the second conductive layer are configured to transmit visible light. 1. A display device comprising: a first insulating layer;', 'a first semiconductor layer comprising a channel region over and in contact with the first insulating layer;', 'a second insulating layer over the first semiconductor layer; and', 'a first conductive layer electrically connected to the first semiconductor layer via an opening portion in the second insulating layer; and, 'a transistor comprising a second conductive layer over and in contact with the first insulating layer;', 'the second insulating layer over the second conductive layer; and', 'the first conductive layer over the second insulating layer,, 'a capacitor comprisingwherein the first conductive layer serves as one electrode of the capacitor and one of a source electrode and a drain electrode of the transistor,wherein the second insulating layer serves as a dielectric layer of the capacitor and a channel protective layer of the transistor, andwherein the first conductive layer and the second conductive layer comprise a metal ...

PEELING METHOD AND MANUFACTURING METHOD OF FLEXIBLE DEVICE

A peeling method at low cost with high mass productivity is provided. A silicon layer having a function of releasing hydrogen by irradiation with light is formed over a formation substrate, a first layer is formed using a photosensitive material over the silicon layer, an opening is formed in a portion of the first layer that overlaps with the silicon layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the silicon layer, the silicon layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other. 1. (canceled)2. A semiconductor device comprising:a resin layer over a substrate and a silicon layer;an insulating layer over the resin layer;a transistor comprising an oxide semiconductor layer over the insulating layer; anda conductive layer in an opening of the resin layer and the insulating layer,wherein the conductive layer is overlapped with the silicon layer.3. A semiconductor device comprising:a resin layer over a substrate;an insulating layer over the resin layer;a transistor comprising an oxide semiconductor layer over the insulating layer; anda conductive layer in an opening of the resin layer and the insulating layer,wherein the opening is not overlapped with the substrate.4. The semiconductor device according to claim 2 ,wherein the resin layer has a thickness greater than a thickness of the silicon layer.5. The semiconductor device according to claim 2 ,wherein the conductive layer comprises a same material as a source electrode or a drain electrode of the transistor.6. The semiconductor device according to claim 2 ,wherein the resin layer comprises a thermosetting material.7. The semiconductor device according to claim 2 , further comprising a bonding layer ...

Method for Manufacturing Semiconductor Device and Manufacturing Apparatus of Semiconductor Device

A semiconductor device including an oxide semiconductor and an organic resin film is manufactured in the following manner. Heat treatment is performed on a first substrate provided with an organic resin film over a transistor including an oxide semiconductor in a reduced pressure atmosphere; handling of the first substrate is performed in an atmosphere containing moisture as little as possible in an inert gas (e.g., nitrogen) atmosphere with a dew point of lower than or equal to −60° C., preferably with a dew point of lower than or equal to −75° C. without exposing the first substrate after the heat treatment to the air; and then, the first substrate is bonded to a second substrate that serves as an opposite substrate.

METHOD FOR MANUFACTURING GLASS SUBSTRATE, GLASS SUBSTRATE, AND PANEL FOR DISPLAY

A method for manufacturing a glass substrate comprises a surface processing step of performing surface processing for forming unevenness on a glass surface. In the surface processing step, protruded portions having a height of 1 nm or more from an average line of a roughness curve are dispersedly formed on the glass surface. In the surface processing step, the surface processing is performed such that a protruded portion area ratio is 0.5 to 10%. The protruded portion area ratio is a ratio of an area of the protruded portions with respect to an area of any rectangular region. The rectangular region has a square shape with a side length of 1 μm. In the surface processing step, in a case where the rectangular region is equally divided into at least one hundred divided regions having a square shape, the surface processing is performed such that a protruded portion content ratio is 80% or more. The protruded portion content ratio is a ratio of the number of divided regions having the protruded portions with respect to the number of divided regions included in the rectangular region. 1. A method for manufacturing a glass substrate for a display , comprising:a manufacturing step of manufacturing a glass substrate; anda surface processing step of performing surface processing for forming unevenness on a glass surface that is one main surface of the glass substrate,wherein in the surface processing step, protruded portions having a height of 1 nm or more from an average line of a roughness curve are dispersedly provided on the glass surface,the surface processing is performed such that a protruded portion area ratio is 0.5 to 10%, the protruded portion area ratio being a ratio of an area of the protruded portions with respect to an area of any rectangular region that has a square shape with a side length of 1 μm and occupies a portion of the glass surface, andin a case where the rectangular region is equally divided into at least one hundred divided regions having a square ...

BOA LIQUID CRYSTAL DISPLAY PANEL AND MANUFACTURING METHOD THEREOF

The present invention provides a BOA liquid crystal display panel and a manufacturing method thereof. The BOA liquid crystal display panel is structured to have a TFT (T) entirely located on a first black matrix () and further, a second black matrix () is arranged between the TFT (T) and the passivation protection layer () such that the second black matrix () and the first black matrix () completely enclose the TFT (T) to block light emitting from a backlight module located under an array substrate () in a direction toward an active layer () and also to block reflecting light irradiating the active layer () from lateral sides and a top side to better prevent light irradiating the active layer of the TFT for preventing photo leakage current, ensuring stable performance of the TFT device, and improving image displaying quality. The manufacturing method of the BOA liquid crystal display panel of the present invention can overcome the issue of photo leakage current induced by backlighting irradiating the active layer of the TFT the active layer and also helps reduce the number of masks used, shorten the manufacturing time, and increase the manufacturing efficiency. 1. A black matrix on array (BOA) liquid crystal display panel , comprising an array substrate and a color filter (CF) substrate opposite to each other and a liquid crystal layer interposed between the array substrate and the CF substrate;wherein the array substrate comprises a lower substrate, a first black matrix formed on the lower substrate, a thin-film transistor (TFT) that is entirely located on the first black matrix, a passivation protection layer covering the TFT, the first black matrix, and the lower substrate, and a pixel electrode formed on the passivation protection layer and in contact with source/drain terminals of the TFT; andthe CF substrate comprises an upper substrate, a color resist layer formed on a surface of the upper substrate that faces the array substrate, and a common electrode ...

SEMICONDUCTOR DEVICE, DISPLAY PANEL, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING DISPLAY PANEL, AND INFORMATION PROCESSING DEVICE

To provide a novel semiconductor device that is highly convenient or reliable, a novel display panel that is highly convenient or reliable, or a method for manufacturing a novel semiconductor device that is highly convenient or reliable. The semiconductor device includes an insulating film having an opening, a first connection portion penetrating the opening, a terminal that is in contact with one surface of the insulating film and is electrically connected to the first connection portion, and a circuit that is electrically connected to the first connection portion on the opposite surface of the insulating film. The terminal has a region embedded in the insulating film and a region not covered with the insulating film. The circuit includes a semiconductor element. 1. A semiconductor device comprising:an insulating film;a first connection portion;a terminal; anda circuit,wherein the insulating film comprises an opening,wherein the first connection portion penetrates the opening,wherein the terminal is in contact with one surface of the insulating film and is electrically connected to the first connection portion,wherein the circuit is electrically connected to the first connection portion on an opposite surface of the insulating film,wherein the terminal comprises a region embedded in the insulating film and a region not covered with the insulating film, andwherein the circuit comprises a semiconductor element.2. The semiconductor device according to claim 1 , wherein the insulating film has a thickness of greater than or equal to 3 nm and less than or equal to 1500 nm.3. The semiconductor device according to claim 1 , further comprising a base comprising a region overlapping with the insulating film claim 1 ,wherein the base comprises a flexible region or a bent region, andwherein the circuit is provided between the insulating film and the flexible region or between the insulating film and the bent region.4. A display panel comprising the semiconductor device ...

THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF

A thin film transistor array panel includes: a substrate; a gate line and a common voltage line electrically separated from each other and elongated parallel with each other on the substrate; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connection member on the second passivation layer and electrically separated from each other. The connection member is elongated in a horizontal direction parallel with the gate line and connects the common voltage line and the common electrode to each other. 1. A thin film transistor array panel comprising:a substrate;a gate line and a common voltage line electrically separated from each other and extended parallel with each other on the substrate;a gate insulating layer on the gate line and the common voltage line;a first passivation layer on the gate insulating layer;a common electrode on the first passivation layer;a second passivation layer on the common electrode; anda pixel electrode and a connection member on the second passivation layer and electrically separated from each other,whereinthe connection member is elongated in a horizontal direction parallel with the gate line and connects the common voltage line and the common electrode to each other.2. The thin film transistor array panel of claim 1 , whereinthe pixel electrode contacts a drain electrode of a thin film transistor via a first contact hole, andthe connection member contacts the common voltage line via a second contact hole and contacts the common electrode via a third contact hole.3. The thin film transistor array panel of claim 2 , whereinthe first contact hole is defined in the first and second passivation layers,the second contact hole is defined in the gate insulating layer, the first passivation layer and the second passivation layer, andthe third ...

Thin film transistor array panel and manufacturing method thereof

A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.

Display device and method of fabricating the same

An array substrate for a display device includes a first base substrate; a thin film transistor disposed on the first base substrate that includes a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a first passivation layer that covers the thin film transistor and that includes an inorganic insulating material; a second passivation layer disposed on the first passivation layer that includes an exposure hole that exposes the first passivation layer on the drain electrode; a common electrode disposed on the second passivation layer; a third passivation layer that covers the common electrode and that includes a contact hole inside the exposure hole to expose the drain electrode; a cavity between the first passivation layer and the third passivation layer on the drain electrode; and a pixel electrode disposed on the third passivation layer and connected with the drain electrode.

ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE

An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate includes: a gate electrode of a TFT and a gate insulation layer sequentially formed on a base substrate; a semiconductor active layer, an etch stop layer and a source electrode and a drain electrode of the TFT sequentially formed on a part of the gate insulation layer that corresponds to the gate electrode of the TFT, the source and drain electrodes of the TFT are respectively in contact with the semiconductor active layer by way of via holes. The array substrate further includes: a first insulation layer formed between the gate electrode of the TFT and the gate insulation layer and the gate electrode is in contact with the gate insulation layer at a channel region of the TFT between the source electrode and the drain electrode of the TFT. 1. An array substrate , comprising:a gate electrode of a TFT and a gate insulation layer sequentially formed on a base substrate;a semiconductor active layer, an etch stop layer and a source electrode and a drain electrode of the TFT sequentially formed on a part of the gate insulation layer that corresponds to the gate electrode of the TFT, wherein the source and drain electrodes of the TFT are respectively in contact with the semiconductor active layer by way of via holes; a first insulation layer formed between the gate electrode of the TFT and the gate insulation layer, wherein the first insulation layer corresponds to at least one of the source electrode and the drain electrode of the TFT; and', 'the gate electrode is in contact with the gate insulation layer at a channel region of the TFT between the source electrode and the drain electrode of the TFT., 'the array substrate further comprising2. The array substrate of claim 1 , further comprising:a second insulation layer formed between the base substrate and the gate electrode of the TFT, wherein the second insulation layer corresponds to the TFT channel and a sum of ...

ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE

An array substrate, manufacturing method thereof and display device are provided. The array substrate includes a plurality of scan lines, a plurality of data lines intersecting with the plurality of scan lines to as to define a plurality of pixel areas; a plurality of auxiliary segments, and each scan line and/or each data line respectively corresponding to at least a auxiliary segment, the scan line and/or data line and the corresponding auxiliary segment forming capacitive coupling to reduce signal delay on the scan line and/or data line. As such, the signal delay on the scan line and/or data line is reduced, and the charging rate and display effect are improved. 1. A liquid crystal display (LCD) device , comprising an array substrate , wherein the array substrate comprising:a plurality of scan lines;a plurality of data lines, intersecting with the plurality of scan lines so as to define a plurality of pixel areas;a plurality of auxiliary segments, wherein each of the plurality of scan lines and/or each of the plurality of data lines corresponding respectively to at least an auxiliary segment, the scan lines and/or data lines forming capacitive coupling with corresponding auxiliary segments to reduce signal delay on the scan lines and/or data lines;wherein the auxiliary segment comprising a first auxiliary segment and a second auxiliary segment, wherein the first auxiliary segment being parallel to the data line, and disposed at the same layer as the scan line; and the second segment being parallel to the scan line, and disposed at the same layer as the data line;the auxiliary segment being in a floating mode so as to form capacitive coupling with the scan line or the data line.2. The LCD display device as claimed in claim 1 , wherein a part of each scan line corresponding to inside of a pixel area corresponds to a second auxiliary segment claim 1 , and the length of the second auxiliary segment is less than the part of each scan line corresponding to inside of a ...

HYBRID HIGH-K DIELECTRIC MATERIAL FILM STACKS COMPRISING ZIRCONIUM OXIDE UTILIZED IN DISPLAY DEVICES

Embodiments of the disclosure generally provide methods of forming a hybrid film stack that may be used as a capacitor layer or a gate insulating layer with a high dielectric constant as well as film qualities for display applications. In one embodiment, a thin film transistor structure include gate, source and drain electrodes formed on a substrate, and an insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes. 1. A thin film transistor structure comprising:gate, source and drain electrodes formed on a substrate; andan insulating layer formed on a substrate, wherein the insulating layer is a hybrid film stack having a dielectric layer comprising a zirconium containing material disposed on an interface layer formed above or below the gate, source and drain electrodes.2. The structure of claim 1 , further comprising:a capacitor layer formed on the gate electrode, wherein the capacitor layer is a hybrid film stack having a dielectric constant greater than 15.31. The structure of clam claim 1 , wherein the hybrid film stack has a dielectric constant greater than 15.4. The structure of claim 1 , wherein the interface layer is at least one of aluminum oxide (AlO) claim 1 , aluminum nitride (AlN) claim 1 , aluminum titanium oxide (AlTiO) claim 1 , aluminum zirconium oxide (AlZrO) claim 1 , AlON claim 1 , or YO.5. The structure of claim 1 , wherein the interface layer of the hybrid film comprises a silicon containing material.6. The structure of claim 5 , wherein the silicon containing material is silicon oxide or silicon nitride.7. The structure of claim 1 , wherein the dielectric layer comprising the zirconium containing material comprises aluminum in an amorphous structure.8. The structure of claim 7 , wherein the dielectric layer is an aluminum doped ZrOlayer having a ...

ARRAY SUBSTRATE, PREPARATION METHOD THEREOF AND DISPLAY DEVICE

The present invention provides an array substrate comprising a substrate, a metal conductive film layer, and an anti-reflective film layer located between the substrate and the metal conductive film layer, and a method for manufacturing the same, as well as a display device. The method comprises step S1: forming an anti-reflective film layer on a substrate by adjusting the reaction power and/or reactive gas flow during the formation of film by the chemical vapor deposition process; and step S2: forming a metal conductive film layer on the substrate finished in step S1. Through the preparation method of the array substrate, the anti-reflective film layer can have a sand-like granulation structure, such that light reflected from the metal conductive film layer can be blocked, thereby weakening or avoiding the light reflected from the surface of the metal conductive film layer, further improving the display effect of the array substrate. 1. A method for manufacturing an array substrate , characterized by comprising:step S1: forming an anti-reflective film layer on a substrate, wherein the anti-reflective film layer has a sand-like granulation structure by adjusting the reaction power and/or reactive gas flow during the chemical vapor deposition process; andstep S2; forming a metal conductive film layer on the anti-reflective film layer.2. The method for manufacturing an array substrate according to claim 1 , characterized in that claim 1 , the step “forming an anti-reflective film layer on a substrate by adjusting the reaction power during the chemical vapor deposition process” includes a first stage and a second stage claim 1 , in which the first stage and the second stage are carried out continuously claim 1 , and the reaction power of the first stage is higher than that of the second stage by 50% or more claim 1 , and alternatively the reaction power of the first stage is lower than that of the second stage by 50% or more.3. The method for manufacturing an array ...

FLAT PANEL DISPLAY APPARATUS AND METHOD FOR MANUFACTURING THE SAME

A flat panel display apparatus for reducing a bezel size and a method for manufacturing the same. The flat panel display apparatus includes a lower substrate having a display area and a peripheral area surrounding the display area, an upper substrate corresponding to the lower substrate, a sealing member disposed along the peripheral area of the lower substrate and bonding the lower substrate and the upper substrate, a first flexible layer disposed on a surface of the lower substrate in a direction facing the upper substrate, in the peripheral area of the lower substrate, the first flexible layer extending to an outside of the lower substrate, and a first wiring disposed between the lower substrate and the sealing member and extending to the outside of the lower substrate and along the first flexible layer. 1. A flat panel display apparatus , comprising:a lower substrate comprising a display area and a peripheral area surrounding the display area;an upper substrate facing the lower substrate;an sealing member disposed along the peripheral area of the lower substrate and bonding the lower substrate to the upper substrate;a first flexible layer disposed on a surface of the lower substrate, in the peripheral area, and extending outside of the lower substrate, the surface of the lower substrate facing the upper substrate; anda first wiring disposed between the lower substrate and the sealing member, the first wiring extending outside of the lower substrate on the first flexible layer.2. The flat panel display apparatus of claim 1 , wherein the first wiring extends outside of the lower substrate along a surface of the first flexible layer claim 1 , the surface of the first flexible layer extending away from the lower substrate.3. The flat panel display apparatus of claim 1 , wherein:the lower substrate comprises a first surface that faces the upper substrate, and an opposing second surface which faces away from the upper substrate; anda thickness of the lower substrate ...

Device, manufacturing method thereof, and electronic device

A wiring having excellent electrical characteristics is provided. A wiring having stable electrical characteristics is provided. A device is manufactured through the steps of forming a first insulating film over a substrate, forming a second insulating film over the first insulating film, removing part of the first insulating film and part of the second insulating film to form a first opening, forming a first conductor in the first opening and over a top surface of the second insulating film, and forming a second conductor by planarizing a surface of the first conductor so as to remove part of the first conductor.

Array Substrate and Display Device

An array substrate and a display device are provided. The array substrate includes a base substrate, and a first conductive layer and a second conductive layer which are sequentially disposed on the base substrate, and at least two passivation layers are continuously arranged between the first conductive layer and the second conductive layer in a direction perpendicular to the base substrate. 1. An array substrate , comprising: a base substrate , a first conductive layer and a second conductive layer which are sequentially disposed on the base substrate , wherein at least two passivation layers are continuously arranged between the first conductive layer and the second conductive layer in a direction perpendicular to the base substrate.2. The array substrate according to claim 1 , further comprising a third conductive layer claim 1 , wherein the third conductive layer is arranged between the base substrate and the first conductive layer claim 1 , and the third conductive layer is electrically insulated from the first conductive layer and the second conductive layer.3. The array substrate according to claim 1 , wherein the first conductive layer comprises a plurality of first conductive elements which are insulated from each other claim 1 , the second conductive layer comprises a plurality of second conductive elements which are insulated from each other claim 1 , the plurality of first conductive elements and the plurality of second conductive elements correspond to each other in one-to-one manner claim 1 , and each of the second conductive elements is electrically connected with its corresponding first conductive element through a via hole penetrating through the at least two passivation layers.4. The array substrate according to claim 3 , further comprising a groove claim 3 , wherein the groove penetrates through at least one passivation layer close to the plurality of second conductive elements among the at least two passivation layers claim 3 , the groove does ...

Method of Manufacturing Array Substrate and Method of Manufacturing Display Device

The present disclosure provides a method of manufacturing an array substrate and a method of manufacturing a display device. The method of manufacturing an array substrate includes steps of: forming a planarization layer above a base substrate; forming an electrode layer above the planarization layer; forming a metal functional layer above the electrode layer; patterning the metal functional layer by using a multi-greyscale mask layer as a mask; forming an insulating protection layer on a portion of the electrode layer not being covered by the patterned metal functional layer; performing an ashing process on the multi-greyscale mask layer; patterning the electrode layer by using the metal functional layer as a mask; further patterning the metal functional layer by using the multi-greyscale mask layer subjected to the ashing process as a mask. 1. A method of manufacturing an array substrate , comprising steps of:forming a planarization layer above a base substrate;forming an electrode layer above the planarization layer;forming a metal functional layer above the electrode layer;patterning the metal functional layer by using a multi-greyscale mask layer as a mask;forming an insulating protection layer on a portion of the electrode layer not being covered by the patterned metal functional layer;performing an ashing process on the multi-greyscale mask layer;patterning the electrode layer by using the metal functional layer as a mask; andfurther patterning the metal functional layer by using the multi-greyscale mask layer subjected to the ashing process as a mask.2. The method of manufacturing an array substrate according to claim 1 , wherein the step of forming the insulating protection layer further comprises:forming a metal layer on the electrode layer; andperforming an oxidation process on the metal layer to obtain a transparent and insulating metal oxide layer serving as the insulating protection layer.3. The method of manufacturing an array substrate according to ...

Display panel and manufacturing method thereof

A display panel and a manufacturing method thereof are provided. The display panel includes a color resist layer, a protective layer and a light-shielding layer. The color resist layer is formed with a first channel having a first color resist block and a second color resist block therein. The light-shielding layer has a base, a first protrusion corresponding to the first color resist block, and a second protrusion corresponding to the second color resist block. The first protrusion is configured as a main photo spacer. The second protrusion is configured as a sub photo spacer. The protective layer is formed with a second channel corresponding to the second color resist block. The sub photo spacer is directly connected to the second color resist block. 1. A display panel , comprising:a substrate layer;a first metal layer formed on the substrate layer, wherein the first metal layer comprises a gate line;a first insulating layer formed on the first metal layer;a second metal layer formed on the first insulating layer, wherein the second metal layer and the gate line form a thin film transistor;a color resist layer formed on the second metal layer, wherein a first channel is formed on the color resist layer corresponding to the gate line, the first channel having a first color resist block and a second color resist block therein, and the first color resist block and the second color resist block are spaced apart from each other;a protective layer formed on the color resist layer and configured to protect the color resist layer; anda light-shielding layer formed on the protective layer and aligned with the first channel, wherein the light-shielding layer comprises a base, a first protrusion corresponding to the first color resist block, and a second protrusion corresponding to the second color resist block, the first protrusion is configured as a main photo spacer, the second protrusion is configured as a sub photo spacer, and a height difference between the main photo ...

MANUFACTURING METHOD OF ARRAY SUBSTRATE AND ARRAY SUBSTRATE

Disclosed is a manufacturing method of an array substrate, comprising steps of: depositing a first metal layer on a substrate; depositing a gate insulating layer on the substrate and the first metal layer, and forming a first via hole in the in-plane region of the gate insulating layer; depositing a second metal layer in an in-plane region and an out-of-plane of the gate insulating layer, wherein the second metal layer located in the in-plane region fills the first via hole; depositing a passivation layer on the second metal layer and the gate insulating layer, and forming a second via hole in the in-plane region of the passivation layer; forming a third via hole and a fourth via hole in the out-of plane region of the passivation layer, respectively; depositing a transparent conductive layer in the in-plane region and in the out-of-plane region of the passivation layer, respectively. 1. A manufacturing method of an array substrate , comprising steps of:depositing a first metal layer on an in-plane region and an out-of-plane region of the substrate;depositing a gate insulating layer on the substrate and the first metal layer, and forming a first via hole in the in-plane region of the gate insulating layer, wherein the first via hole directly reaches a surface of the first metal layer of the in-plane region;depositing a second metal layer in the in-plane region and the out-of-plane region of the gate insulating layer, wherein the second metal layer located in the in-plane region fills the first via hole;depositing a passivation layer on the second metal layer and the gate insulating layer, and forming a second via hole in the in-plane region of the passivation layer, which directly reaches a surface of the second metal layer of the in-plane region; forming a third via hole in the out-of plane region of the passivation layer, which directly reaches a surface of the second metal layer of the out-of plane region, and forming a fourth via hole in the out-of plane region ...

SUBSTRATE PROCESSING METHOD

A substrate processing method includes loading an operation list of substrate, the operation list including an operation site bar, an inspection site bar, and an operation flag record enabling bar, the operation site bar including a plurality of operation sites, and the inspection site bar including an inspection site; loading a substrate onto a production line; when the substrate flows to an operation site on the production line, inquiring the operation site at the operation site bar of the operation list, and judging whether the operation site is provided with an inspection site at the inspection site bar; if the operation site is provided with an inspection site at the inspection site bar, verifying whether a current operation flag of the substrate matches the inspection site; if the current operation flag of the substrate matches the inspection site, processing the substrate at the operation site. 1. A substrate processing method , comprising:loading an operation list of substrate, wherein the operation list comprises an operation site bar, an inspection site bar, and an operation flag record enabling bar, the operation site bar comprises a plurality of operation sites, and the inspection site bar comprises an inspection site;loading a substrate onto a production line;when the substrate flows to an operation site on the production line, inquiring the operation site at the operation site bar of the operation list, and judging whether the operation site is provided with an inspection site at the inspection site bar;if the operation site is provided with an inspection site at the inspection site bar, verifying whether a current operation flag of the substrate matches the inspection site;if the current operation flag of the substrate matches the inspection site, processing the substrate at the operation site;wherein the inspection site is an operation site which the substrate needs to run through prior to the operation site at the operation site bar;wherein the ...

MANUFACTURING METHOD OF TFT ARRAY SUBSTRATE, TFT ARRAY SUBSTRATE AND DISPLAY DEVICE

Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The TFT array substrate comprises a thin film transistor and a pixel electrode formed on a base substrate, the pixel electrode is electrically connected with a drain electrode of the thin film transistor. The array substrate further comprises an light-shielding pattern provided above the thin film transistor. 1. A TFT array substrate , comprising a thin film transistor and a pixel electrode formed on a base substrate , the pixel electrode being electrically connected with a drain electrode of the thin film transistor , wherein the array substrate further comprises a light-shielding pattern provided above the thin film transistor.2. The array substrate according to claim 1 , further comprising a passivation layer via hole claim 1 , wherein a light-shielding conductive metal layer formed of a same material as the light-shielding pattern is provided in the passivation layer via hole claim 1 , and the pixel electrode is electrically connected with the drain electrode of the thin film transistor through the light-shielding conductive metal layer.3. The array substrate according to claim 2 , wherein the light-shielding pattern and the light-shielding conductive metal layer are made from molybdenum claim 2 , aluminum claim 2 , copper claim 2 , or combinations thereof.4. The array substrate according to claim 1 , wherein the light-shielding pattern is made from a light-shielding conductive metal.5. The array substrate according to claim 4 , wherein the light-shielding conductive metal comprises molybdenum claim 4 , aluminum claim 4 , copper claim 4 , or combinations thereof.6. The array substrate according to claim 1 , wherein the light-shielding pattern is only formed directly above the thin film transistor.7. The array substrate according to claim 1 , further comprising a color filter layer claim 1 , wherein the color filter layer and the ...

ARRAY SUBSTRATE, METHOD OF MANUFACTURING THE ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL

The present application discloses an array substrate, a method of manufacturing an array substrate, and a liquid crystal display panel. The array substrate includes a substrate; a channel layer; a first insulating layer; a gate electrode; a second insulating layer have a first through hole and a second through hole; a source electrode electrically connected to the channel layer through the first through hole; a drain electrode electrically connected to the channel layer through the second through hole; a planarization layer has a third through hole; a common electrode; a passivation layer has HfOand a fourth through hole communication with the third through hole; and a pixel electrode electrically connected to the drain electrode through the third through hole and the fourth through hole, and the pixel electrode is disposed corresponding to the common electrode, the pixel electrode, the passivation layer and the common electrode constitute a storage capacitor. 1. An array substrate , comprising:a substrate;a channel layer disposed adjacent to the surface of the substrate;a first insulating layer covered the channel layer;a gate electrode disposed on the surface of the first insulating layer remote from the channel layer;a second insulating layer covered the gate electrode and a first through hole and a second through hole are disposed spaced apart in the second insulating layer;a source electrode disposed on the second insulating layer, and the source electrode electrically connected to the channel layer through the first through hole;a drain electrode disposed on the second insulating layer, and the drain electrode is electrically connected to the channel layer through the second through hole;a planarization layer covered the source electrode and the drain electrode, and a third through hole disposed in the planarization layer corresponding to the drain electrode;a common electrode disposed on the planarization layer;{'sub': '2', 'a passivation layer covered the ...

Semiconductor device

Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor ( 105 ), a charge equivalent to a threshold value of a TFT ( 104 ) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor ( 105 ) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT ( 101 ). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT ( 101 ).

FLEXIBLE DISPLAY DEVICE WITH WIRE HAVING REINFORCED PORTION AND MANUFACTURING METHOD FOR THE SAME

There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display. 1. An flexible display , comprising:a substantially flat portion having a thin-film transistor (TFT) disposed on a base layer and a buffer layer interposed between the base layer and a semiconductor layer of the TFT;a bend portion having a protruded area and a recessed area, wherein the protruded area includes the buffer layer disposed on the base layer and the recessed areas has the base layer without the buffer layer disposed thereon; anda conductive line trace having a portion laid in the substantially flat portion of the flexible display and another portion laid in the bend portion of the flexible display.2. The flexible display of claim 1 , wherein the buffer layer is formed of one or more layers of an inorganic material.3. The flexible display of claim 2 , wherein the buffer layer in the substantially flat portion of the flexible display is thicker than the buffer layer disposed in the bend portion of the flexible display.4. The flexible display of claim 3 , wherein the buffer layer disposed in the substantially flat portion of the flexible display includes at least one additional sub-layer than the buffer layer disposed in the bend portion of the flexible display.5. The flexible display of claim 4 , wherein the thickness of the buffer layer in the bend portion of the flexible display ranges from about 100 Å to about 2000 Å.6. The flexible display of claim 5 , wherein the base layer at the recessed area has a lower thickness than that of the base layer at the protruded area.7. The flexible display of claim 6 , wherein the conductive line trace in the bend portion includes a plurality of sub-traces that split and merge at predetermined angles away from a tangent vector of the curvature of the bend portion.8. The flexible display of claim 7 , ...

DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

A display device including a substrate including a display area and a non-display area, a common electrode line in the non-display area, and a protective layer coating at least a part of an end portion of the common electrode line. 1. A display device comprising:a substrate comprising a display area and a non-display area;a common electrode line in the non-display area; anda protective layer coating at least a part of an end portion of the common electrode line.2. The display device of claim 1 , wherein the common electrode line comprises a metal.3. The display device of claim 1 , wherein the display area comprises at least one thin film transistor comprising a gate electrode claim 1 , a semiconductive layer claim 1 , a source electrode claim 1 , and a drain electrode claim 1 , and wherein the common electrode line comprises substantiality the same material as the source and drain electrodes.4. The display device of claim 1 , wherein the protective layer overlaps with one side-edge of the common electrode line.5. The display device of claim 4 , wherein a length of the protective layer is greater than or equal to a length of one side of the display area.6. The display device of claim 1 , wherein the protective layer comprises a first protective layer and a second protective layer that are separated from each other along a direction of the common electrode line.7. The display device of claim 6 , wherein a distance between the first protective layer and the second protective layer is in a range of about 20 μm to about 2000 μm.8. The display device of claim 6 , wherein the first protective layer coats at least a part of the end portion of the common electrode line located away from the display area claim 6 , and the second protective layer does not coat an end portion of the common electrode line claim 6 , the first and second protective layers being alternately arranged.9. The display device of claim 1 , wherein the protective layer has a width in a range of about 20 μ ...

METHOD OF FABRICATING METAL WIRING AND THIN FILM TRANSISTOR SUBSTRATE

A method of fabricating metal wiring, including: sequentially forming first and second conductive layers on a substrate; forming a first photosensitive film pattern on the first and second conductive layers; forming first and second conductive patterns by etching parts of the first and second conductive layers by using the first photosensitive film pattern as a mask; forming a second photosensitive film pattern positioned inside the first photosensitive film pattern by a predetermined interval by ashing the first photosensitive film pattern; etching an exposed first conductive pattern by using the second photosensitive film pattern as a mask; and removing the second photosensitive film pattern. 1. A method of fabricating metal wiring , comprising:sequentially forming first and second conductive layers on a substrate;forming a first photosensitive film pattern on the first and second conductive layers;etching parts of the first and second conductive layers by using the first photosensitive film pattern as a mask to form first and second conductive patterns;forming a second photosensitive film pattern positioned inside the first photosensitive film pattern by a predetermined interval by ashing the first photosensitive film pattern;etching an exposed first conductive pattern by using the second photosensitive film pattern as a mask; andremoving the second photosensitive film pattern.2. The method of claim 1 , wherein the first conductive layer comprises titanium (Ti) claim 1 , and the second conductive layer comprises copper (Cu).3. The method of claim 1 , wherein the etching of the exposed first conductive pattern comprises plasma-processing the substrate claim 1 , on which the second photosensitive film pattern is formed claim 1 , within a vacuum chamber having a helium (He) gas atmosphere.4. The method of claim 3 , wherein the helium gas (He) atmosphere in the vacuum chamber comprises any one of SFand CF claim 3 , with helium (He) gas as a base.5. The method of ...

FLEXIBLE DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

Disclosed is a flexible display substrate and a method for manufacturing the same which can avoid break and peeling of film layers disposed on a flexible base and further reduce degree of a warpage occurred in the flexible base when separating the support substrate from the flexible base located above the support substrate. The flexible display substrate comprises the flexible base, a first buffer layer and a second buffer layer disposed on an upper surface and a lower surface of the flexible base, respectively, and a plurality of display modules disposed on the first buffer layer, each display module includes at least one thin film transistor and at least one electrode corresponding to the thin film transistor. 1. A flexible display substrate comprising:a flexible base;a first buffer layer and a second buffer layer disposed on an upper surface and a lower surface of the flexible base, respectively; anda plurality of display modules disposed on the first buffer layer, each display module including at least one thin film transistor and at least one electrode corresponding to the thin film transistor.2. The flexible display substrate according to claim 1 , wherein the first buffer layer and the second buffer layer are made of the same material and have the same thickness.3. The flexible display substrate according to claim 2 , whereinany one of the first buffer layer and the second buffer layer includes at least one buffer film layer; andall the buffer film layers of the first buffer layer and all the buffer film layers of the second buffer layer are symmetrically disposed with respect to the flexible base, respectively.4. The flexible display substrate according to claim 2 , wherein a thickness of each of the first buffer layer and the second buffer layer is set between 1000 and 5000 Å.5. The flexible display substrate according to claim 1 , wherein a plurality of auxiliary film layers are disposed on one side of the second buffer layer which is away from the ...

ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, DISPLAY PANEL, AND DISPLAY DEVICE

An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed. The manufacturing method includes: forming a first metal wiring, an interlayer insulating film, a second metal wiring and a protecting layer in sequence on a substrate, the second metal wiring is parallel with the first metal wiring and has an overlapped area therewith which is defined as a first zone, and portions of the first and second metal wiring except the first zone are defined as a second zone and a third zone respectively; at least thinning a portion of the interlayer insulating film and/or the protecting layer corresponding to the first zone while leaving portions except those corresponding to the first, second and third zones un-thinned. The manufacturing method can mitigate Zara mura. 1. An array substrate , comprising:a first metal wiring located on a base substrate;an interlayer insulating film covering the first metal wiring;a second metal wiring located on the interlayer insulating film, the second metal wiring being parallel to and overlapped with the first metal wiring; anda protecting layer covering the second metal routing layer,whereinone of the first metal wiring and the second metal wiring being a common line and the other one being a data line; a portion of the first metal wiring overlapping with the second metal wiring being a first zone, a portion of the first metal wiring except the first zone being a second zone, and a portion of the second metal wiring except the first zone being a third zone; andthe array substrate further comprising at least one of:at least a portion of the interlayer insulating film corresponding to the first zone having a thickness smaller than that of portions of the interlayer insulating film except those corresponding to the first zone, second zone and third zone; andat least a portion of the protecting layer corresponding to the first zone having a thickness smaller than that of portions of the protecting layer ...

DISPLAY DEVICE, ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

A display device, array substrate and manufacturing method thereof are provided. The array substrate includes an active area and a non-active area, and the active area includes a plurality of scan lines and a plurality of data lines intersecting with the plurality of scan lines, and a plurality of pixel units formed by the intersecting plurality of scan lines and plurality of data lines; the non-active area includes a driving circuit providing scan signals to the scan lines, and the driving circuit is located along an extension direction of the data lines so as to reduce area size of the non-active area along an extension direction of the scan lines to achieve narrowing border size. As such, the ultra-narrow border for display device is achieved. 1. An array substrate , comprising: an active area and a non-active area , wherein the active area being disposed with a plurality of scan lines and a plurality of data lines intersecting with the plurality of scan lines , and a plurality of pixel units formed by the intersecting plurality of scan lines and plurality of data lines; the non-active area being disposed with a driving circuit providing scan signals to the scan lines , wherein the driving circuit being disposed along an extension direction of the data lines so as to reduce area size of the non-active area along an extension direction of the scan lines to achieve narrowing border size.2. The array substrate as claimed in claim 1 , wherein the array substrate further comprises a plurality of first connection lines claim 1 , for connecting the driving circuit and the scan lines.3. The array substrate as claimed in claim 2 , wherein the first connection lines and the scan lines are disposed at the same layer claim 2 , and the first connection lines and the data lines are disposed in parallel;the array substrate further comprises second connection lines, and the second connection lines are dispose above the scan lines and the first connection lines;each first ...

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

An array substrate and manufacturing method thereof are provided. The array substrate includes: a substrate; a first gate electrode insulating layer disposed on the substrate, wherein the first gate electrode insulating layer has a recess therein; a gate electrode layer disposed in the recess of the first gate electrode insulating layer; a second gate electrode insulating layer covering the first gate electrode insulating layer and the gate electrode layer; and an active layer disposed on the second gate electrode insulating layer. 1. An array substrate , comprising:a substrate;a first gate electrode insulating layer disposed on the substrate, wherein the first gate electrode insulating layer has a recess therein;a gate electrode layer disposed in the recess of the first gate electrode insulating layer;a second gate electrode insulating layer covering the first gate electrode insulating layer and the gate electrode layer; andan active layer disposed on the second gate electrode insulating layer.2. The array substrate of claim 1 , further comprising:a source or drain electrode layer disposed on the active layer;a planarization layer disposed on the source or drain electrode layer; anda pixel defined layer disposed on the planarization layer.3. The array substrate of claim 1 , wherein the gate electrode layer has a copper material; and wherein a range of a thickness of the gate electrode layer is from 200 nm to 5000 nm.4. The array substrate of claim 1 , wherein each of the first gate electrode insulating layer and the second gate electrode insulating layer has at least one or at least two of a corresponding nitrogen oxide material claim 1 , a corresponding silicon oxide material claim 1 , and a corresponding silicon nitride material; and wherein a range of a thickness of the first gate electrode insulating layer is from 100 nm to 500 nm claim 1 , and a range of a thickness of the second gate electrode insulating layer is from 100 nm to 500 nm.5. The array substrate ...

DISPLAY DEVICE AND TILED DISPLAY DEVICE INCLUDING THE SAME

A display device includes a substrate including a first contact hole, an etching stopper disposed on a surface of the substrate and including the first contact hole, a metal pattern disposed on another surface opposite to the surface of the substrate and surrounding the first contact hole in a plan view, a first pad unit overlapping a part of the metal pattern and inserted into the first contact hole, a lead line disposed on the another surface of the substrate and electrically connected to another part of the metal pattern, a second pad unit disposed on the another surface of the substrate and electrically connected to the lead line, a protective film overlapping the another surface of the substrate and the lead line, and a protection part overlapping the first pad unit. 1. A display device comprising:a substrate including a first contact hole;an etching stopper disposed on a surface of the substrate and including the first contact hole;a metal pattern disposed on another surface opposite to the surface of the substrate and surrounding the first contact hole in a plan view;a first pad unit overlapping a part of the metal pattern and inserted into the first contact hole;a lead line disposed on the another surface of the substrate and electrically connected to another part of the metal pattern;a second pad unit disposed on the another surface of the substrate and electrically connected to the lead line;a protective film overlapping the another surface of the substrate and the lead line; anda protection part overlapping the first pad unit.2. The display device of claim 1 , further comprising:a flexible film disposed on the second pad unit; anda source driver that supplies a source voltage to the first pad unit, the source driver being disposed on the flexible film.3. The display device of claim 1 , whereinthe metal pattern includes a metal oxide having a wet etching resistance, anda wet etching rate of the metal pattern is lower than a wet etching rate of the ...