УСТРОЙСТВО УПРАВЛЕНИЯ ВЫСОКОВОЛЬТНЫМ ТРАНЗИСТОРОМ, В ЧАСТНОСТИ, МОП-ТРАНЗИСТОРОМ ВЫСОКОВОЛЬТНОГО РАДИОЧАСТОТНОГО ГЕНЕРАТОРА ДЛЯ УПРАВЛЯЕМОГО ЗАЖИГАНИЯ ДВИГАТЕЛЯ ВНУТРЕННЕГО СГОРАНИЯ

... 1. Устройство управления высоковольтным транзистором, в частности, МОП-транзистором высоковольтного радиочастотного генератора, характеризующееся тем, что содержит входной контакт (IN) для приема логического сигнала управления, выходной контакт (OUT) для передачи выходного сигнала управления высоковольтным транзистором, первый nМОП-транзистор (Q6) управления с низким внутренним сопротивлением, который соединен между массой и указанным выходным контактом, и затвор которого соединен с указанным входным контактом, второй рМОП-транзистор (Q5) управления, который соединен между контактом питания и выходным контактом, и затвор которого соединен с указанным выходным контактом при помощи биполярного транзистора (Q2), выполненного по принципу монтажа с общей базой и с подачей тока на его эмиттер, управляемой емкостной схемой соединения (С2, Q1, R2). ! 2. Устройство по п.1, в котором внутреннее сопротивление первого nМОП-транзистора управления (Q6) меньше 1 Ом, предпочтительно меньше 0,5 Ом. ! 3.

Miniaturisiertes Schaltnetzteil mit Gateansteuerung mit programmiertem Niveau

Complementary transistor stage for driving capacitive loads and use thereof

To drive capacitive loads in switched mode, particularly field-effect transistors (FT), a complementary transistor stage (T1, T2) is used between the input and output of which a bipolar voltage sink (D1, D2; ZD1, ZD2) is arranged. Such a stage leads to shorter switching times of the field-effect transistors (FT) and lowers their switching losses (Fig. 2). ...

Geschaltete Brückenanordnung.

Anpassungsfähige Gate-Ladeschaltung für Leistungs-Fets

Schaltungsanordnung

Eine Schaltungsanordnung umfasst einen Leistungsinverter (INV), einen Potentialschieber (LSHIFT) und einen Leistungstreiber (DRIV). Der Leistungsinverter (INV) stellt ausgangsseitig ein Sperrsignal (LSIG) niederohmig und invers zu einem pulsweitenmodulierten Ansteuersignal (PWM) bereit. Der Potentialschieber (LSHIFT) ist abhängig von dem Sperrsignal (LSIG) aktivierbar und deaktivierbar. Der Potentialschieber (LSHIFT) stellt ausgangsseitig ein Schaltsignal (SSIG) nur dann bereit, wenn der Potentialschieber (LSHIFT) durch das Sperrsignal aktiviert ist. Der Leistungstreiber (DRIV) ist ausgangsseitig mit einem oberen Schalter (X2) koppelbar zum Ansteuern des oberen Schalters (X2). Der Leistungstreiber (DRIV) schaltet den oberen Schalter (X2) ein abhängig von dem Schaltsignal (SSIG). Der Leistungstreiber (DRIV) schaltet den oberen Schalter (X2) ferner aus, wenn der Potentialschieber (LSHIFT) durch das Sperrsignal (LSIG) deaktiviert wird.

Circuit for controlling pulse output stage e.g. for pulse diode laser

The invention relates to a circuit configuration for driving a pulse output stage which comprises a MOSFET power stage and a drive circuit (5) which is connected to the drain of the MOSFET (1) as the sole power supply. The parameters of the circuit configuration are designed in such a manner that the voltage drop on the drain of the MOSFET (1) does not exceed the admissible maximum voltage at the gate of the MOSFET (1). The supplied current flowing from the drain of the MOSFET to the drive circuit preferably contributes to the load current.

INTELLIGENTER ELEKTRONISCHER SCHALTER

Hierin wird eine integrierte Schaltung, die als intelligenter Schalter eingesetzt werden kann, beschrieben. Gemäß einer Ausführungsform enthält die integrierte Schaltung einen zwischen einen Versorgungs-Pin und einen ersten Ausgangs-Pin gekoppelten ersten Leistungstransistor und einen zwischen den Versorgungs-Pin und einen zweiten Ausgangs-Pin gekoppelten zweiten Leistungstransistor. Der erste und der zweite Leistungstransistor besitzen jeweils eine intrinsische Body-Diode, die ein Rückwärts-Leiten erlaubt. Die integrierte Schaltung enthält weiterhin eine Steuerschaltung, die dazu ausgebildet ist, ein Einschalten und Ausschalten des ersten und des zweiten Leistungstransistors basierend auf einem ersten Eingangssignal bzw. einem zweiten Eingangssignal auszulösen. Darüber hinaus enthält die integrierte Schaltung eine Schutzschaltung, die dazu ausgebildet ist, für den ersten und den zweiten Leistungstransistor einen Übergang von einem rückwärts-leitenden Zustand in einen vorwärts-leitenden ...

Schaltungsanordnung zur Ansteuerung einer kapazitiven Last

Schutzschaltungsanordnung für Permanent-Magnet Synchronmotor im Feldschwächbereich

Ansteuerungsvorrichtung für eine elektrische Last und Verfahren zu dessen Verwendung

Bei einer Ansteuervorrichtung (1) wird für eine elektrische Last im Falle einer Ausgabebetriebsart mit hohem Pegel ein Ausgangs-FET (41), wenn dieser auf einer Seite mit höherem Potential als eine Last (5) verschaltet ist, an seinem Gate mit einer oberhalb einer Batteriespannung (VB) befindlichen verstärkten Spannung (VCP) in Reaktion auf ein Steuersignal versorgt, das aus zwei Steuersignalen (Aa, Ba) durch ein Umschaltsignal (Ca) ausgewählt wird. Im Falle einer Ausgabebetriebsart mit niedrigem Pegel wird der FET (41), wenn er auf einer Seite mit geringerem Potential verschaltet ist, als die Last (5), an seinem Gate mit der Spannung (VB) in Reaktion auf das ausgewählte Signal versorgt. Diese Fälle werden in Reaktion auf ein Signal (Fa) umgeschaltet, welches den Bitwert in den Ausgabebetriebsarteinstellungsdaten anzeigt, die im voraus in einem nichtflüchtigen Speicher (11) gespeichert sind.

DRIVE CIRCUIT

Power supply switching circuit for a compact portable telephone set

An isolated high side drive circuit

ELECTRONIC SWITCH ARRANGEMENT

SWITCHING CONFIGURATION WITH A SCHALTTRANSISTOR, A CONTROL CIRCUIT AS WELL AS A SUPPLY CIRCUIT

CONTROL DEVICE OF AN ELECTRONIC ACHIEVEMENT DISCONNECTING SWITCH AND SUCH A DEVICE OF COMPREHENSIVE STATIC INVERTERS

GATE ELECTRODE DRIVER

Gate drive for insulated gate power semiconductors

GATE DRIVE FOR INSULATED GATE POWER SEMICONDUCTORS

A method of control of the current and voltage switching trajectories of insulated gate power semiconductor switches, more specifically MOSFETs and insulated gate bipolar transistor devices (IGBTs), is disclosed. MOSFETs and IGBTs are used in switch mode power supplies because of their easy driving ability and their ability to handle high currents and voltages at high- switching frequencies. However, the switching trajectories for both types of devices are responsible for both common-mode electromagnetic emissions generated by the drain current waveform and power losses in the commutation cell. These two characteristics represent opposing design objectives for power converters. The current invention uses a hybrid voltage/current gate signal source with feedback of the gate charge (or discharge) current to dynamically and independently control the drain current and drain voltage of an insulated semiconductor device. The rate of change of drain current is controlled by the voltage source ...

ELECTRONIC SWITCHES

An electronic switch is disclosed for switching relatively high voltages, such as telecommunications voltages of the order of -48 volts, in response to logic levels of typically 0 to 5 volts. The switch comprises a MOSFET having a source-drain switching path and a gate; a control transistor controlled from a logic level control terminal; and a potential divider MOSFET source and the control transistor and having a tapping point coupled to the MOSFET gate. The potential divider includes a zener diode and/or a resistor connected between the MOSFET source and gate. The switch can be used with a current sensing resistor and a monostable circuit to form an automatically-reset circuit interrupter or electronic fuse.

Intelligenter Taster für eine Gebäudeinstallation.

Die Erfindung betrifft einen intelligenten Taster (1) für eine Gebäudeinstallation. Der Taster (1) weist eine für die Gebäudeinstallation geeignete vorgegebene Grösse auf und elektrische Anschlüsse (1224) auf, an welche wahlweise eine elektrische Lichtquelle oder ein elektrischer Motor anschliessbar sind, wobei der Taster ausgebildet ist zum Ein-/Ausschalten und allenfalls Dimmen der anschliessbaren Lichtquelle und zum Betreiben des anschliessbaren elektrischen Motors.

Load driving device

CONTROL CIRCUIT OF GRID Of a TRANSISTOR MOS OF POWER FUNCTIONING IN COMMUTATION

La présente invention concerne un circuit de commande de grille d'un transistor MOS de puissance 1 dont une première électrode principale D est connectée à une tension haute VC C par l'intermédiaire d'une charge L, dont une deuxième électrode principale S est connectée à la masse et dont la grille G est connectée, pendant la durée de fermeture, à une source de tension basse VD D , comprenant des moyens S1 pour relier au moment de la fermeture du transistor MOS de puissance sa première électrode principale à sa grille. The present invention relates to a gate control circuit of a power MOS transistor 1 of which a first main electrode D is connected to a high voltage VC C via a load L, of which a second main electrode S is connected. to ground and the gate G of which is connected, during the closing time, to a low voltage source VD D, comprising means S1 for connecting, when the power MOS transistor is closed, its first main electrode to its gate.

Dispositif de relais bistable statique pour charges de puissance en courant continu

L'objet de l'invention concerne un dispositif de relais bistable statique pour charges de puissance en courant continu. Il est constitue par la combinaison de montage comportant un transistor de puissance 7, canal P des transistors de commutation 8, 9, une diode silicium courant faible 10 et quatre resistances de valeur normalisees 3, 4, 5, 6 avec entrees 1, 2. Il est destine a associer toutes les caracteristiques necessaires a une compatibilite avec les technologies de l'electronique moderne cote commande, aux proprietes classiques des relais en particulier, des relais bistables, vu du cote charge.

Electronic switch for ultrasonic system - has four diode bridge with opposite connections to transducer and generator

STANDBY CIRCUIT AND ELECTRIC APPLIANCE COMPRISING SUCH A CIRCUIT

The present invention relates to an electric standby circuit (4) for an electric appliance. The circuit comprises a switch (41) adapted to open and close an electric connection between a first input (IN1) and an output (OUT) of the circuit (4), and a bistable circuit electrically connected to the switch in order to control the opening and closing thereof. The bistable circuit comprises a first BJT transistor (Q19) of the pnp type and a second BJT transistor (Q12) of the npn type. The first transistor (Q19) is connected to the first input (IN1) through the emitter, and the collector of the first transistor (Q19) is connected to the base of the second transistor (Q12) through a first resistor (R39). The collector of the second transistor (Q12) is connected to the switch (41) and to a second input (IN3) through a second resistor (R40). The base of the first transistor (Q19) is connected to the second input (IN3) through a third resistor (R38).

Circuit for driving a semiconductor element

A drive circuit is provided for driving a voltage-driven semiconductor element by producing a drive signal depending upon an input signal. The drive circuit comprises an output stage and a current-suppressing circuit. The output stage includes two semiconductor elements connected in series. The voltage-driven semiconductor element is connected to a common connection point of the two semiconductor elements. The current-suppressing circuit controls one of the two semiconductor elements to provide an output current flowing through either one of the two semiconductor elements if a voltage applied to the voltage-driven semiconductor element reaches a limit level, which is in excess of a level for conducting the voltage-driven semiconductor element by a predetermined voltage.

Gate control circuit for a switching power MOS transistor

A gate control circuit for a power MOS transistor (1), the first main electrode (D) of which is connected to a high voltage (VCC) through a load (L), the second main electrode (S) of which is grounded and the gate (G) of which is connected, during the switching ON period, to a low voltage source (VDD), comprises a switch (S1) for connecting at the switching ON of the power MOS transistor its first main electrode to its gate.

Optic floating deck modulator

An optical floating deck modulator to modulate a control element of an electron device, such as the grid of a Klystron tube or traveling wave tube, having two high power MOSFET switching devices connected in series between a high positive and a high negative voltage source (which also supply the high voltage to the electron device) with the control element coupled between the MOSFET devices. This arrangement provides a low resistance path between the two voltage potentials and the control element being modulated, as the two MOSFET devices are switched alternately ON and OFF and thus achieves fast rise and fall times over a very high voltage swing. Each MOSFET device has a separate drive circuit (deck) and each deck comprises a photo diode information receiver coupled to a transimpedance amplifier, the output of which is amplified by a bipolar transistor amplifier and a FET amplifier. Total isolation between the decks and the information source is achieved by an optic link therebetween.

Switching circuit using semiconductor switching element

A switching circuit includes a semiconductor switching element having a control electrode and a source-drain current path, the source-drain current path being connected between a voltage source and a load circuit, a parallel circuit formed by first and second transistors having respective collector-emitter paths connected between the control electrode of the semiconductor switching element and a reference potential point, a first resistor connected to the second transistor in series, a differential circuit connected between a control signal terminal and the base of the first transistor and a second resistor connected between the control signal terminal and the base of the second transistor. The first transistor is made conductive by a signal obtained by differentiating a control signal and subsequently the second transistor is made conductive to control the semiconductor switching element for ON/OFF.

SWITCHING CIRCUIT DEVICE AND CONTROL CIRCUIT

A switching circuit device has a first transistor which has a drain coupled to a high-potential terminal, a source coupled to a low-potential power supply, and, a driving circuit, which outputs, to a gate of the first transistor in response to an input control signal, a pulse having a potential higher than a threshold voltage of the first transistor and a potential of the low-potential power supply, wherein the driving circuit has a first inverter including a second transistor provided between the gate and the source of the first transistor, wherein when the first transistor changes from on to off due to the pulse, the second transistor conducts and short-circuits the gate and the source of the first transistor.

Circuit arrangement

A switched bridge circuit

Verfahren und Vorrichtung zum Steuern eines elektrischen Stromkreises

ELEKTRISCHE SCHALTUNGSANORDNUNG IN VERBINDUNG MIT EINEM KFZ-STEUERGERAET

Verfahren sowie elektrische Schaltung zum Betreiben eines elektrischen Leistungshalbleiter-Bauelements

Es wird ein Verfahren zum Betreiben eines elektrischen Leistungshalbleiter-Bauelements (11) beschrieben. Dem Leistungshalbleiter-Bauelement (11) ist eine Endstufe (12) mit einer programmierbaren Logik zugeordnet. Der Endstufe (12) werden Ansteuersignale für das Leistungshalbleiter-Bauelement (11) gesendet. Das Leistungshalbleiter-Bauelement (11) wird von der Endstufe (12) in Abhängigkeit von den Ansteuersignalen beeinflusst. Die Art und Weise der Beeinflussung des Leistungshalbleiter-Bauelements (11) ist durch die Programmierung der Logik festlegt. Der Endstufe (12) können Programmiersignale gesendet werden, die von einem Prozessor der Endstufe (12) verarbeitet werden. Die Programmierung der Logik wird von dem Prozessor in Abhängigkeit von den Programmiersignalen verändert.

FET electronic power stage - feeds energising signal to FET control electrode via emitter-follower stage

The energising signal (3) is supplied to the power stage control electrode (5) of the FET (1) via an emitter-follower stage (4). The inverted energising signal (3') is supplied to a control electrode (8) of a further FET (9). The latter connects the power stage control electrode to the reference potential. Between the emitter of the emitter-follower stage and the power stage control electrode is pref. incorporated a current limiting resistor (6). Between the control electrode of the power stage and the second FET may be incoorporated a further current limiting resistor (11). USE/ADVANTAGE - Magneto-optical recording appts. Low-cost switching for shortest possible OFF interval.

LASTTREIBERVORRICHTUNG

Bidirektionaler MOSFET-Schalter und Multiplexer

Die Erfindung betrifft einen bidirektionalen MOSFET-Schalter, aufweisend einen Eingang (A) und einen Ausgang (B) und zwei MOSFET-Transistoren (T1, T2), die mit ihren Source- und Gate-Anschlüssen miteinander verbunden sind, wobei der Eingang (A) und der Ausgang (B) mit jeweils einem Drain-Anschluss der zwei MOSFET-Transistoren (T1, T2) verbunden ist, einen mittels einer Potentialtrennung (I1) galvanisch isolierten Steuereingang (D), der mit einer Steuereinheit (C1) verbunden ist, welche eingerichtet ist, über einen weiteren MOSFET-Transistor (T4) einen Steuerstrom für einen FET-Transistor (T3) zu schalten, der eingerichtet ist, durch den Steuerstrom eine Gate-Spannung Vgs zwischen Gate (G) und Source (S) an den zwei MOSFET-Transistoren (T1, T2) zum Schalten derselben zu erzeugen, und einer potentialfreien Spannungsquelle (V1), welche mit dem Anschluss (A) galvanisch verbunden ist und eingerichtet ist, einen Gate-Steuerstrom für die zwei MOSFET-Transistoren (T1, T2) zu erzeugen.

Pufferschaltung und Halbleitervorrichtung

Es wird eine Methode für eine stabil betreibbare single-ended-push-pull- (SEPP-) Schaltung bereitgestellt. Eine Pufferschaltung umfasst Folgendes: einen NPN-Transistor (Q1) und einen PNP-Transistor (Q2), welche eine komplementäre SEPP-Schaltung bilden; einen ersten Widerstand; einen zweiten Widerstand; ein erstes Lastelement, dessen eines Ende mit einem Gate eines Halbleiterschaltelements (3) verbunden ist und dessen anderes Ende mit einer Basis des NPN-Transistors (Q1) verbunden ist; und ein zweites Lastelement, dessen eines Ende mit dem Gate des Halbleiterschaltelements (3) verbunden ist und dessen anderes Ende mit einer Basis des PNP-Transistors (Q2) verbunden ist.

Steuerschaltung für einen zwangskommutierten Leistungstransistor

SCHALTUNGSANORDNUNG ZUR ANSTEUERUNG EINER IMPULSENDSTUFE

An isolated high side driver

A high-side transistor driver module comprising one transformer and two ICs A high-side semiconductor switch, such as a FET,IGBT or BJT, may be turned on and off by applying positive and negative pulses respectively through a transformer to a drive circuit on the secondary side, a pulse detection circuit being powered by the pulses and the state being maintained by a latch. The positive supply for the secondary circuit may be provided at power-up, while keeping the switch off, by applying negative pulses to charge the supply through an inverting charge pump (C11,D14,D18, figure 14). The power supply in the secondary circuit may be maintained, for example during drive of bipolar transistor switches, by applying low-amplitude pulses. With Q5 enabled, the switch may be turned on or off by applying pulses of greater amplitude to the transformer. The high-side devices in the arms of the transformer- driving bridge may be driven through a capacitor, a bias management circuit ( figures 19 and ...

Voltage conversion circuit

SWITCHES

Turn-off control for a bipolar transistor

To reduce turn-off time in a bipolar transistor the base drive current is controlled to avoid excess stored charge at the desired instant of turn-off. The base current drive waveform may be adjusted in dependence on collector voltage so that the transistor remains in saturation or quasi-saturation at the end of the collector current conduction period. The width or slope (figure 21) of the base current pulse in a conduction cycle may be varied in dependence on the collector voltage in a previous cycle so that the transistor's collector-emitter voltage is low during the earlier part of the pulse but with base charge at the instant of turn-off being just sufficient to support the collector current. The desaturation time may be measured by sensing edges in the collector voltage or the reverse base current, and it may be controlled by adjusting the base drive (figures 34-36). The technique may be applied to IGBTs or BJTs.

MINIATURIZED SWITCH POWER PACK WITH UNIDIRECTIONAL POINT FILTER.

PROTECTIVE CIRCUIT ARRANGEMENT FOR PERMANENT MAGNET SYNCHRONOUS MOTOR WITHIN THE FIELD WEAKENING RANGE

DEVICE FOR THE CONTROLLING OF A HIGH VOLTAGE TRANSISTOR, IN PARTICULAR A MOS OF TRANSISTOR OF A HIGH VOLTAGE OF RADIO FREQUENCY GENERATOR TO THE ZUNDUNG OF A COMBUSTION ENGINE

DRIVER UNIT FOR A HALF BRIDGE STATIC FREQUENCY CHANGER

SWITCH WITH A WHEN SOURCE FOLLOWER CLAIMANT MIS-FET.

Circuit configuration for driving a pulse output stage

PRECHARGE MOS-BIPOLAR OUTPUT BUFFER

LOW POWER HIGH VOLTAGE DRIVER CIRCUIT

A LOW POWER HIGH VOLTAGE DRIVER CIRCUIT A low quiescent power circuit for driving an output between two voltage states in response to a control signal is disclosed. The circuit comprises a first switch (15) including first (16) and second (18) terminals that provides a conductive path from a first source of potential (19) to an output terminal (22) when the potential difference between the control terminals is less than a threshold value and for electrically isolating the first source of potential (19) from the output terminal 122) when the potential difference between the control terminals is greater than the threshold value, and a second switch (20) that provides a conductive path between a second source of potential (21) and the output terminal (23) when the first switch (15| electrically isolates the first source of potential (19). The second switch (20) electrically isolates the output terminal from the second source of potential (21) when the first switch (15) is conductive. The circuit ...

GATE DRIVE CIRCUITRY FOR NON-ISOLATED GATE SEMICONDUCTOR DEVICES

One embodiment is a gate drive circuitry (60) for switching a semiconductor device (62) having a non-isolated input, the gate drive circuitry (60) having a first circuitry (64) configured to turn-on the semiconductor device (62) by imposing a current on a gate of the semiconductor device (62) so as to forward bias an inherent parasitic diode of the semiconductor device (62). There is a second circuitry (66) configured to turn--off the semiconductor device (62) by imposing a current on the gate of the semiconductor device (62) so as to reverse bias the parasitic diode of the semiconductor device (62) wherein the first circuitry (64) and the second circuitry (66) are coupled to the semiconductor device (62) respectively through a first switch and a second switch.

Electronic Switches

PRECHARGE MOS?BIPOLAR OUTPUT BUFFER

CONTROL DEVICE Of a SWITCH OF POWER AND VARIATOR INCLUDING/UNDERSTANDING SUCH a DIPOSITIF.

GATE CONTROL CIRCUIT OF A POWER MOS TRANSISTOR OPERATING IN SWITCHING

CONTROL DEVICE Of a SWITCH OF POWER AND VARIATOR INCLUDING/UNDERSTANDING SUCH a DIPOSITIF.

La présente invention concerne un dispositif de commande d'un interrupteur électronique de puissance de type JFET (15) réalisé en carbure de silicium, le dispositif de commande comprenant un circuit principal de commande de grille (30) alimenté par une source principale d'énergie (11) pour piloter la grille de l'interrupteur JFET. Le dispositif de commande comporte un organe de commutation (41,51) commutable entre deux états, un circuit auxiliaire de commande (40,50) de l'organe de commutation, et une source auxiliaire d'énergie (25) dont la borne négative est connectée à la grille de l'interrupteur JFET sans passer par ledit circuit de commande de grille (30) dans l'un des deux états de l'organe de commutation, et dont la borne positive est connectée à la source de l'interrupteur JFET. L'organe de commutation est un commutateur électromagnétique ou électronique.

ADAPTIVE GATE DISCHARGE CIRCUIT FOR POWER FETS

SIGNAL OUTPUT DEVICE AND A TEST DEVICE, CAPABLE OF OUTPUTTING AN OUTPUT SIGNAL HAVING A HIGH VOLTAGE SWING

PURPOSE: A signal output device and a test device are provided to switch high voltage by using an electric field effect transistor such as a switching device of low prices. CONSTITUTION: A switching circuit(14) of high voltage stage opens or makes the gap of a first terminal connected to a reference voltage generating port and a second terminal connected to a second terminal a short circuit. A switching circuit(16) of high voltage stage opens or makes a first terminal connected to the output port and a second terminal a short circuit. If the switching circuit of the low voltage state is a short circuit, a controller(18) opens the switching circuit of the high voltage stage, and if the switching circuit of the high voltage state is a short circuit, a controller opens the switching circuit of the high voltage. COPYRIGHT KIPO 2010 ...

전력용 MOSFET 게이트 구동회로

... 본 발명은 전력용 MOSFET의 게이트 구동회로에 관한 것으로, PWM 제어부에서 출력된 펄스폭 제어신호에 따라, 전력 스위치의 턴 온(turn on) 동작을 구동하기 위한 제1 구동전류를 생성하는 제1 구동회로; 상기 펄스폭 제어신호에 따라, 상기 전력 스위치의 턴 오프(turn off) 동작을 구동하기 위한 제2 구동전류를 생성하는 제2 구동회로; 상기 턴 온 동작 시, 상기 전력 스위치의 스위칭 손실을 감소하기 위한 제1 보조 구동전류를 추가로 생성하는 제1 보조 구동회로; 및 상기 턴 오프 동작 시, 상기 전력 스위치의 스위칭 손실을 감소하기 위한 제2 보조 구동전류를 추가로 생성하는 제2 보조 구동회로를 포함하는 게이트 구동회로를 포함한다.

Switching control circuit with voltage sensing function and photo-flash capacitor charger thereof

A switching control circuit is utilized to control a switch to turn on/off. The switch is coupled between a primary winding of a transformer of a photo-flash capacitor charger and ground. The switching control circuit includes a voltage-clamping buffer circuit, a set driving circuit, a reset driving circuit, and a reset-dominated latch. The voltage-clamping buffer circuit is coupled to the primary winding for reducing the switching voltage on the primary winding. The set and the reset driving circuits generate a set signal and a reset signal respectively according to the reduced switching voltage. The reset-dominated latch controls the switch to turn on/off according to the set signal and the reset signal.

Switch control circuit with voltage sensing function and camera flash capacitor charger thereof

A switch control circuit has a voltage sensing function. The switch control circuit includes a voltage-clamping buffer, a set driver, a reset driver, and an R-dominant SR latch. The voltage-clamping buffer shifts a switch voltage to generate a down-shifted switch voltage. The set driver generates a set signal according to the down-shifted switch voltage. The reset driver generates a reset signal according to the down-shifted switch voltage. The R-dominant SR latch comprises a set end for receiving the set signal, a reset end for receiving the reset signal, an output end for outputting a switch control signal for controlling conductance of a first transistor coupled to a primary winding of a transformer, and an output bar end for outputting an inverted switch control signal.

Drive control circuit for a junction field-effect transistor

A drive control circuit for a junction field-effect transistor having a gate terminal, a drain terminal and a source terminal as well as a gate leakage current and a maximally permissible gate current, includes a current supply which feeds the gate and produces a control current which is greater than the gate leakage current and smaller than the maximally permissible gate current for turning the junction field-effect transistor off.

Power MOSFET driver with cross-conduction current reduction

An output circuit includes a totem-pole output circuit for driving a power MOSFET. A pull-up circuit and a pull-down circuit drive the output node low or high as required. The circuit prevents the pull-up and pull-down circuits from simultaneously conducting current. The pull-up circuit has a pull-up threshold voltage and the pull-down circuit has a pull-down threshold voltage such that the pull-up circuit is turned off before the pull-down circuit is activated when the output node is switched from a high state to a low state and further wherein the pull-down circuit is turned off before the pull-up circuit is activated when the output node switches from a low state to a high state. The pull-up circuit is held off when the output node is switched from a high state to a low state by two diodes from the output node to an input of the pull-up circuit. The diodes are connected in series, one diode having its anode coupled to the output node and the cathode of the other diode coupled to the ...

SEMICONDUCTOR DEVICE FOR WIRELESS COMMUNICATION

Provided is a semiconductor device for wireless communication which achieves a reduction in leakage power and allows an improvement in power efficiency. For example, to external terminals, an antenna driver section for driving an antenna and a rectifying section for rectifying input power from the antenna are coupled. The antenna driver section includes pull-up PMOS transistors and pull-down NMOS transistors. In the rectifying section, a power supply voltage generated by a full-wave rectifying circuit is boosted by a voltage boosting circuit. For example, when a supply of a power supply voltage from a battery is stopped, a power supply voltage resulting from the boosting by the voltage boosting circuit is supplied to the bulk of each of the pull-up PMOS transistors.

Gate drive circuit

A gate drive circuit in an aspect of the present disclosure includes a modulated signal generation circuit that generates a first modulated signal, a first isolator that isolatedly transmits the first modulated signal, and a first rectifier circuit that generates a first output signal by rectifying the first modulated signal. The first modulated signal includes a first amplitude, a second amplitude larger than the first amplitude, and a third amplitude larger than the second amplitude. The first output signal includes a first output voltage value according to the first amplitude, a second output voltage value according to the second amplitude, and a third output voltage value according to the third amplitude.

Drive circuit of semiconductor device

CIRCUIT CONFIGURATION FOR DRIVING A PULSE OUTPUT STAGE

The invention relates to a circuit configuration for driving a pulse output stage which comprises a MOSFET power stage and a drive circuit (5) which is connected to the drain of the MOSFET (1) as the sole power supply. The parameters of the circuit configuration are designed in such a manner that the voltage drop on the drain of the MOSFET (1) does not exceed the admissible maximum voltage at the gate of the MOSFET (1). The supplied current flowing from the drain of the MOSFET to the drive circuit preferably contributes to the load current.

DRIVE CIRCUITRY FOR A MOS FIELD EFFECT TRANSISTOR

In order to drive a MOS field effect transistor as a voltage cutter in a direct voltage converter which works according to the chopping principle, a circuit arrangement has an input transistor (T1) for driving a current source at the input side with a low voltage swing, a phase inverter transistor (T2) connected downstream thereof and a complementary stage formed of first and second supplementary transistors (T3, T4) with interconnected collectors. An auxiliary voltage is added to the input voltage to be regulated. Thanks to different current switching thresholds for the first supplementary transistor (T3) and for the phase inverter transistor (T2) that drives the second supplementary transistor (T4), the complementary stage switches without overlapping. In addition, it switches with a switching-on delay, so that the switching time of a series-connected switching regulator component can be increased up to 100 %. The own current requirements of the circuitry are thus very low.

Steuerschaltung mit keinem Vorspannungsstrom für einen Low-Side-Treiber

LEISTUNGS-MOSFET-TREIBER MIT REDUZIERUNG DES QUERSTROMS

Switching device for switching during high operating voltage, has controlled switching element with control port and two main connections for forming switching line

The switching device has a controlled switching element with a control port and two main connections for forming a switching line. The switching line is switched in a conducting or closing manner by a control switch.

Verfahren zur Herstellung von N-substituierten 3-(beta-Aminoaethyl)-cumaronen

Bipolar transistor drivers

An isolated high side driver

A high-side transistor driver module comprising one transformer and two ICs A high-side semiconductor switch, such as a FET,IGBT or BJT, may be turned on and off by applying positive and negative pulses respectively through a transformer to a drive circuit on the secondary side, a pulse detection circuit being powered by the pulses and the state being maintained by a latch. The positive supply for the secondary circuit may be provided at power-up, while keeping the switch off, by applying negative pulses to charge the supply through an inverting charge pump (C11,D14,D18, figure 14). The power supply in the secondary circuit may be maintained, for example during drive of bipolar transistor switches, ...

An isolated high side drive circuit

MINIATURIZED SWITCH POWER PACK WITH GATE CONTROL WITH PROGRAMMED LEVEL

CIRCUIT TO SCOLDED A VOLTAGE-CONTROLLED TRANSISTOR

GATE DRIVE CIRCUITRY FOR NON-ISOLATED GATE SEMICONDUCTOR DEVICES

One embodiment is a gate drive circuitry (60) for switching a semiconductor device (62) having a non-isolated input, the gate drive circuitry (60) having a first circuitry (64) configured to turn-on the semiconductor device (62) by imposing a current on a gate of the semiconductor device (62) so as to forward bias an inherent parasitic diode of the semiconductor device (62). There is a second circuitry (66) configured to turn--off the semiconductor device (62) by imposing a current on the gate of the semiconductor device (62) so as to reverse bias the parasitic diode of the semiconductor device (62) wherein the first circuitry (64) and the second circuitry (66) are coupled to the semiconductor device (62) respectively through a first switch and a second switch.

BIDIRECTIONAL MOSFET SWITCH AND MULTIPLEXER

The invention relates to a bidirectional MOSFET switch, comprising an input (A) and an output (B) and two MOSFET transistors (T1, T2), which are connected to one another by their source and gate terminals, wherein the input (A) and the output (B) are connected to a respective drain terminal of the two MOSFET transistors (T1, T2), and comprising a control input (D) galvanically isolated by means of a potential isolation (11), said control input being connected to a control unit (C1) configured to switch a control current for a FET transistor (T3) via a further MOSFET transistor (T4), said FET transistor being configured to generate, by means of the control current, a gate voltage Vgs between gate (G) and source (S) at the two MOSFET transistors (T1, T2) for the switching thereof, and a floating voltage source (V1), which is galvanically connected to the input (A) and is configured to generate a gate control current for the two MOSFET transistors (T1, T2).

POWER SUPPLY SWITCHING CIRCUIT FOR A COMPACT PORTABLE TELEPHONE SET

In order to reduce volume and weight of a power supply of a compact portable telephone set and thus reduce the volume and weight of the compact portable telephone set itself, a P-channel power MOSFET is used as a power switching element, and a negative voltage, for example -11 volts, is applied across a source and a gate from a DC/DC converter to turn on the P-channel power MOSFET so that power is supplied from a battery which serves as one power supply. When the gate and the source of the power MOSFET are maintained at the same potential, the power MOSFET is turned off and power is supplied from another power supply.

SOLID STATE AC SWITCH WITH SELF-SYNCHRONIZING MEANS FOR STEALING OPERATING POWER

A solid state power switching circuit for alternating current loads, in which operating power for the circuit is diverted from the switched current during power stealing intervals self-synchronized with the alternating current waveform. During periods in which current to the load is commanded, a load current switch is maintained in a low impedance state except for the duration of a short power stealing interval each half-cycle of the supplied alternating current. Self-synchronization is achieved with a current detector which senses whether or not the magnitude of the current diverted during each power stealing interval exceeds a current threshold, and pulse generator logic which shifts the power stealing intervals in time relative to the alternating current waveform in response to the previously sensed current magnitude.

Drive device

ORDER Of a TRANSISTOR MOS

CONTROL CIRCUIT Of a LIFTING CIRCUIT OF TENSION, CONTROL DEVICE AND SYSTEM OF REGULATION CORRESPONDENTS.

Ce circuit de commande d'un circuit élévateur de tension (2) comprenant : - un premier transistor PNP (4) dont l'émetteur (E1) est raccordé à une tension d'entrée (Vin); - un deuxième transistor NPN (6) dont le collecteur (C2) est raccordé au collecteur (C1) du premier transistor (4), l'émetteur (E2) du deuxième transistor (6) étant raccordé à une masse, et caractérisé en ce que l'émetteur (E2) dudit deuxième transistor (6) est raccordé à la masse à travers une première résistance (12) et sa base (B2) est raccordée à la masse à travers au moins une diode (14, 16, 18).

Gate to field effect

Circuit de commande de grille d'un transistor MOS de puissance fonctionnant en commutation

La presente invention concerne un circuit de commande de grille d'un transistor MOS de puissance 1 dont une premiere electrode principale D est connectee a une tension haute VCC par l'intermediaire d'une charge L, dont une deuxieme electrode principale S est connectee a la masse et dont la grille G est connectee, pendant la duree de fermeture, a une source de tension basse VDD, comprenant des moyens S1 pour relier au moment de la fermeture du transistor MOS de puissance sa premiere electrode principale a sa grille.

Dispositif automatique de polarisation pour transistor à effet de champ.

L'invention concerne un dispositif automatique de polarisation pour transistor à effet de champ (11), comprenant: - un circuit (10) de génération du courant de drain (ID) de ce transistor; - une boucle (12) automatique de surveillance de la tension de grille de ce transistor. Application notamment au domaine des amplificateurs à transistors à effet de champ.

High voltage transistor i.e. metal oxide semiconductor transistor, control device i.e. driver, for vehicle, has transistor whose grid is connected to terminal by bipolar transistor arranged on base arrangement and controlled by current

L'invention concerne un dispositif de commande d'un transistor (MHT), comprenant notamment une borne d'entrée, une borne de sortie, et un premier transistor PMOS de commande (Q5). Le dispositif selon l'invention comprend un deuxième transistor NMOS de commande (Q6) connecté entre une borne d'alimentation négative (VDD_n) et la borne de sortie et dont la grille est connectée à la borne d'entrée par l'intermédiaire d'un deuxième transistor bipolaire (Q9) agencé en montage base commune et commandé en courant sur son émetteur.

CONTROL DEVICE Of a SWITCH OF POWER ORDERS IN TENSION

L'invention concerne un dispositif de commande d'un commutateur commandé en tension, comprenant deux circuits (1, 17) respectivement de mise à niveau haut et de mise à niveau bas d'une borne de commande du commutateur commandé en tension, l'un au moins desdits circuits comportant : un transistor de puissance (2, 18) apte à relier ladite borne de commande à un potentiel haut (Vh), respectivement bas (Vl) ; un transistor bipolaire de commande (3, 20) ayant son émetteur, respectivement son collecteur, relié à la borne de commande du transistor de puissance, la base du transistor de commande (3) étant susceptible de recevoir un courant de commande ; une première diode (D1, D2) reliée entre un premier potentiel prédéterminé (Von, Voff) inférieur au potentiel haut (Vh), et la base du transistor de commande (3).

Switching Gate Drive

본 발명은 게이트 드라이버 제어신호를 제공받아 전달하는 토템플 회로; 적어도 하나의 가변 저항을 구비하며, 상기 토템플 회로에서 제공되는 구동 제어신호를 IGBT 소자의 구동 제어신호로 전달하는 저항부; 상기 IGBT 소자에 인가되는 전압을 제공받아 상기 가변 저항 값을 제어하기 위한 가변저항 제어신호를 상기 저항부로 출력하는 전압 검침부; 및 상기 토템플 회로 및 상기 전압 검침부의 구동전압을 제공하기위한 구동전원부를 포함하는 스위칭 게이트 드라이버를 제공한다. The present invention relates to a saturation circuit for receiving and transmitting a gate driver control signal; A resistive part having at least one variable resistor and transferring a drive control signal provided from the earthed circuit to a drive control signal of the IGBT element; A voltage measuring unit for receiving a voltage applied to the IGBT element and outputting a variable resistance control signal for controlling the variable resistance value to the resistance unit; And a driving power source for supplying the driving voltage of the saturation current and the voltage measuring unit.

HIGH IMPEDANCE LOAD DETECTION

The present invention provides for a method of detecting a high impedance load condition and to a related load detector, in which current to the said load (12) and to a reference load (24) by way of main (20) and sense (22) cells respectively of a FET device (18), and wherein it is determined whether the impedance of the said load exceeds a threshold value such that the determination remains within the impedance/resistance domain, and with the threshold value being determined from the value of the impedance of the reference load divided by the ratio of the said main cells to the sense cells of, the FET device and such that the threshold value can then be readily selected by the user through selection of the reference load, which can comprise an external resistor.

MINIATURIZED SWITCHING POWER SUPPLY WITH PROGRAMMED LEVEL GATE DRIVE

A miniaturized switching power supply has an output circuit for supplying gate drive to a power FET (54). The output circuit incorporates a pair of series connected transistors (44, 46) with a zender diode (52) connected to the base of one of the transistors (44) to limit the gate drive to the FET (54).

Circuit arrangement for controlling a pulse output stage

A specification is given of a circuit arrangement for controlling a pulse output stage, which comprises a MOS-FET power stage and a controller stage. The controller circuit (5) is connected to the drain of the MOS-FET (1) as the sole voltage supply, and the parameters of the circuit arrangement are designed such that the voltage drop across the drain of the MOS-FET (1) does not exceed the permissible voltage maximum at the gate of the MOSFET (1). The supply current flowing from the drain of the MOS-FET to the controller circuit preferably contributes to the load current.

Low power high voltage driver circuit

A circuit for driving an output between two voltage states in response to a control signal is disclosed. The circuit requires a very small amount of power in its quiescent state. The circuit comprises a first switch including first and second control terminals that provides a conductive path from a first source of potential to an output terminal when the potential difference between the control terminals is less than a first predetermined threshold value and for electrically isolating the first source of potential from the output terminal when the potential difference between the control terminals is greater than the first predetermined threshold value, and a second switch that provides a conductive path between a second source of potential and the output terminal when the first switch electrically isolates the first source of potential from the output terminal. The second switch electrically isolates the output terminal from the second source of potential when the first switch provides ...

Cascode Switch with Robust Turn On and Turn Off

A cascode switch includes a first power transistor configured to be coupled to a load and a second power transistor coupled in series with the first power transistor so that the second power transistor is between ground and the first power transistor. The second power transistor is operable to switch on and off responsive to a pulse source coupled to a gate of the second power transistor. The first power transistor is operable to switch on and off responsive to the same pulse source as the second power transistor or a DC source coupled to a gate of the first power transistor. Alternatively or in addition, a transistor device is coupled to the gate of the first power transistor and operable to actively turn off the first power transistor independent of the load current.

Semiconductor device arrangement and method

A semiconductor device arrangement and a method. One embodiment includes at least one power transistor and at least one gate resistor located between a gate of the power transistor and a connecting point in the drive circuit of the power transistor. The semiconductor device arrangement includes a switchable element between the connecting point and a source of the power transistor.

Supply voltage control

A disconnect device for a switched-mode power supply, including an activation device for a first transistor for generating a transformable voltage. The device includes a second transistor of the PNP type and a third transistor of the NPN type, the base of the second transistor being connected to the collector of the third transistor and the base of the third transistor being connected to the collector of the second transistor. The emitter of the third transistor is connected to ground. The emitter of the second transistor is connected to a control voltage terminal of the activation device, the control voltage terminal being configured for suppressing the generation of the voltage by the first transistor, if the control voltage terminal is connected to ground, so that the generation of the voltage is suppressed if the base of the third transistor is acted upon by a voltage exceeding a predetermined threshold value.

DRIVER CIRCUIT OF SCHOTTKY TRANSISTOR

A driver circuit includes an output terminal connected to a gate of a Schottky transistor, a reference transistor formed in the same manner as the Schottky transistor, a resistor connected between a first power source line and a gate of the reference transistor, a voltage generator configured to supply a second node with a voltage equal to or lower than a voltage at a first node between the resistor and the reference transistor, and a switching element configured to transmit the voltage at the second node to the output terminal in response to a signal inputted to an input terminal. 1. A driver circuit of a Schottky transistor comprising:an input terminal configured to receive an inputted signal;an output terminal connected to a gate of the Schottky transistor;a first power source line;a second power source line having lower potential than the first power source line;a reference transistor formed in a same manner as the Schottky transistor, at least one of a source and a drain of the reference transistor being connected to the second power source line;a resistor connected between the first power source line and a gate of the reference transistor;a voltage generator connected to a first node between the resistor and the gate of the reference transistor and configured to supply a second node with a voltage being equal to or lower than a voltage at the first node; anda switching element configured to transmit the voltage at the second node to the output terminal in response to the signal inputted to the input terminal.2. The driver circuit of a Schottky transistor according to claim 1 , whereinthe voltage generator is made of a MOS transistor,a source of the MOS transistor is connected to the first power source line,a drain of the MOS transistor is connected to the second node, anda gate of the MOS transistor is connected to the first node.3. The driver circuit of a Schottky transistor according to claim 1 , wherein the reference transistor and the Schottky transistor ...

ELECTROMAGNETIC COIL DRIVE DEVICE

An electromagnetic coil drive device has a semiconductor switch connected in series with an electromagnetic coil for controlling a current supplied to the coil; a capacitor; a comparator for comparing a voltage to charge and discharge the capacitor with two different voltages, for generating a signal to operate on-off of the semiconductor switch in accordance with a result of a comparison; a first charging circuit to charge the capacitor based on a voltage applied to the coil; and a discharging circuit to discharge the capacitor. The first charging circuit has a first resistor and at least one compensating circuit connected in parallel with the first resistor; and a resistor and a Zener diode are connected in series in the compensating circuit. 1. An electromagnetic coil drive device , comprising:a semiconductor switch connected in series with an electromagnetic coil for controlling a current supplied to the coil;a capacitor;a comparator for comparing a voltage to charge and discharge the capacitor with two different voltages, for generating a signal to operate on-off of the semiconductor switch in accordance with a result of a comparison;a first charging circuit to charge the capacitor based on a voltage applied to the coil; anda discharging circuit to discharge the capacitor;wherein the first charging circuit has a first resistor and at least one compensating circuit connected in parallel with the first resistor, anda resistor and a Zener diode are connected in series in the compensating circuit.2. An electromagnetic coil drive device according to claim 1 , further comprising a second charging circuit to charge the capacitor based on a stabilized voltage.3. An electromagnetic coil drive device according to claim 1 , wherein the compensating circuit has:a first compensating circuit in which a second resistor and a first Zener diode are connected in series, anda second compensating circuit in which a third resistor and a second Zener diode are connected in series; ...

PREVENTING VOLTAGE PULSE PROPAGATION IN A DISABLED CAPACITIVE FEEDBACK SLEW-CONTROLLED SWITCH

Transient voltages are not propagated through a P-channel MOSFET used as a switch with output slew rate control feedback, by connecting a low or near-zero impedance across the source and gate terminals of the device whenever the MOSFET is supposed to be off. The low or near-zero impedance is provided by a second P-channel MOSFET connected across the source and gate of the MOSFET switch.

FIELD-EFFECT TRANSISTOR DRIVER

A field-effect transistor (FET) driver is provided that includes an input modulator and an isolating capacitor. The input modulator is configured to output an alternating current (AC) signal. The isolating capacitor is configured to receive the AC signal as an input and to store a charge based on the AC signal in a filter capacitor. The filter capacitor is configured to drive a capacitor-driven FET based on the stored charge. 1. A field-effect transistor (FET) driver , comprising:an input modulator configured to output an alternating current (AC) signal; andan isolating capacitor configured to receive the AC signal as an input, to store a charge based on the AC signal in a filter capacitor, and to drive a capacitor-driven FET based on the stored charge.2. The FET driver of claim 1 , wherein the input modulator comprises an AND gate configured to receive a clock signal and a digital signal and to pass the clock signal based on the digital signal to generate the AC signal.3. The FET driver of claim 1 , wherein:the capacitor-driven FET comprises a FET coupled between a load and a driver stage, anda first node of the amplifier is coupled to the isolating capacitor, a second node of the amplifier is coupled to a gate of the FET, and a third node of the amplifier is coupled to a source of the FET.4. The FET driver of claim 1 , wherein:the capacitor-driven FET comprises a first FET and a second FET coupled in series between a load and a driver stage, anda first node of the amplifier is coupled to the isolating capacitor, a second node of the amplifier is coupled to a gate of the first FET and a gate of the second FET, and a third node of the amplifier is coupled to a source of the first FET and a source of the second FET.5. A field-effect transistor (FET) driver claim 1 , comprising:an amplifier configured to receive a clock signal and a digital signal and to generate an amplified output based on the clock signal and the digital signal;a filter capacitor configured to ...

INTELLIGENT GATE DRIVE UNIT

An intelligent gate drive unit and related method for controlling one or more semiconductor switches of one or more power modules, the intelligent gate drive unit comprises at least a gate driver and an analog measuring circuit, wherein the gate driver facilitates control of the one or more semiconductor switches and wherein the analog measuring circuit facilitates measuring the switch voltage when the one or more semiconductor switches are in a conducting mode. 1. An intelligent gate drive unit for controlling one or more semiconductor switches of one or more power modules , the intelligent gate drive unit comprises at least a gate driver and an analog measuring circuit ,wherein the gate driver is configured for control of the one or more semiconductor switches, andwherein the analog measuring circuit is configured for measuring a switch voltage when the one or more semiconductor switches are in a conducting mode.2. The intelligent gate drive unit according to claim 1 , wherein the analog measuring circuit further facilitates measuring the switch voltage in a switching mode.3. The intelligent gate drive unit according to claim 1 , wherein the analog measuring circuit further facilitates measuring the switching voltage in a non-conducting mode.4. The intelligent gate drive unit according to claim 3 , wherein said analog measuring circuit includes means such as a semiconductor device for blocking the high voltage across the semiconductor switch claim 3 , which preferably is an IGBT claim 3 , during the non-conducting mode.5. The intelligent gate drive unit according to claim 1 , wherein the measurements from the analog measuring circuit include measuring power module output current and/or DC-link voltage.6. The intelligent gate drive unit according to claim 1 , wherein the intelligent gate drive unit further comprise a data processor facilitating calculation of semiconductor switch junction temperature at the intelligent gate drive unit.7. The intelligent gate drive ...

SEMICONDUCTOR DEVICE FOR WIRELESS COMMUNICATION

Provided is a semiconductor device for wireless communication which achieves a reduction in leakage power and allows an improvement in power efficiency. For example, to external terminals, an antenna driver section for driving an antenna and a rectifying section for rectifying input power from the antenna are coupled. The antenna driver section includes pull-up PMOS transistors and pull-down NMOS transistors. In the rectifying section, a power supply voltage generated by a full-wave rectifying circuit is boosted by a voltage boosting circuit. For example, when a supply of a power supply voltage from a battery is stopped, a power supply voltage resulting from the boosting by the voltage boosting circuit is supplied to the bulk of each of the pull-up PMOS transistors. 1. A semiconductor device for wireless communication , comprising:a first power supply voltage to which an external power supply is supplied;a second power supply voltage;a first terminal for coupling to an antenna;a p-channel first MISFET having a source-drain path coupled between the first terminal and the first power supply voltage to drive the antenna;an n-channel second MISFET having a source-drain path coupled between the first terminal and the second power supply voltage to drive the antenna; anda rectifying circuit section coupled to the first terminal,wherein the rectifying circuit section uses an alternating current signal inputted to the first terminal via the antenna to generate a third power supply voltage having a value higher than that of the first power supply voltage and higher than that of the high-potential voltage occurring at the first terminal when the alternating current signal has a maximum amplitude, andwherein the third power supply voltage is used as a bulk voltage of the first MISFET.2. A semiconductor device for wireless communication according to claim 1 ,wherein the first MISFET includes:a p-type first semiconductor layer; andan n-type second semiconductor layer which is ...

SMART ELECTRONIC SWITCH

An integrated circuit that may be employed as a smart switch is described herein. The integrated circuit may include a first power transistor coupled between a supply pin and a first output pin and a second power transistor coupled between the supply pin and a second output pin. The first and the second power transistors each having an intrinsic body diode which allows reverse conduction. The integrated circuit further includes a control circuit that is configured to trigger a switch-on and switch-off of the first and the second power transistors based on a first input signal and a second input signal, respectively. Furthermore, the integrated circuit includes a protection circuit configured to detect, for the first and the second power transistors, a transition from a reverse conducting state into a forward conducting state, and vice versa, and to generate an error signal in response to certain detections. 1. An integrated circuit comprising:a first power transistor coupled between a supply pin and a first output pin,a second power transistor coupled between the supply pin and a second output pin, the first and the second power transistors each having an intrinsic body diode which allows reverse conduction;a control circuit configured to trigger a switch-on and switch-off of the first and the second power transistors based on a first input signal and a second input signal, respectively; anda protection circuit configured to detect, for the first and the second power transistors, a transition from a reverse conducting state into a forward conducting state, and vice versa, and to generate an error signal when detecting a transition from a reverse conducting state into a forward conducting state for the second power transistor and a transition from a forward conducting state into a reverse conducting state for the first power transistor.2. The integrated circuit of claim 1 ,wherein the protection circuit is configured to generate the error signal when detecting the ...

SWITCH CIRCUIT, RADIO-FREQUENCY MODULE, AND COMMUNICATION DEVICE

A switch circuit includes first and second switches. The first switch includes a first common terminal and at least two first selection terminals selectively connected to the first common terminal. The second switch includes at least one second common terminal and at least one second selection terminal selectively connected to the at least one second common terminal. One of the at least two first selection terminals and the at least one second common terminal are connected to each other via a path passing through a first multiplexer. Another one of the at least two first selection terminals and the at least one second common terminal are connected to each other via a bypass path bypassing the first multiplexer. 1. A switch circuit comprising:a first switch including a first common terminal and at least two first selection terminals selectively connected to the first common terminal; anda second switch including at least one second common terminal and at least one second selection terminal selectively connected to the at least one second common terminal; whereinone of the at least two first selection terminals and the at least one second common terminal are connected to each other via a path passing through a first multiplexer, the first multiplexer being a filter that separates one signal into a plurality of signals of different frequency bands or integrates a plurality of signals of different frequency bands into one signal; andanother one of the at least two first selection terminals and the at least one second common terminal are connected to each other via a bypass path bypassing the first multiplexer.2. The switch circuit according to claim 1 , wherein the at least one second selection terminal includes a second selection terminal connected to a terminating resistor.3. The switch circuit according to claim 1 , wherein a matching circuit is disposed between the at least two first selection terminals and the at least one second common terminal.4. The switch ...

RELAY CIRCUITRY WITH SELF REGULATING CHARGING

A system may include a power source. The power source supplies a first voltage. The system may also include a voltage regulator that receives the first voltage and supply a second voltage. Additionally, the system may include a microcontroller that receives the second voltage and output the second voltage via an output pin. Further, the system may include a switching element that receives the second voltage from the output pin of the controller at a first terminal and receives the first voltage from the power supply at a second terminal. The switching element selectively charges a first capacitor based on a difference between the first voltage and the second voltage.

Power source input circuit and inverter-integrated electric compressor for vehicle comprising said circuit

There is provided a power source input circuit capable of suppressing an oscillation phenomenon of an input current without any trouble. The power source input circuit includes a current detection resistor 21 which detects a current on the basis of a voltage generated thereacross, and a transistor Q 3 whose collector is connected to a gate of a power switching element Q 2 . The transistor Q 3 changes the voltage of a base thereof according to the voltage generated across the current detection resistor 21 and adjusts the voltage of the gate of the power switching element Q 2 to allow a constant current operation to be performed. Further, a capacitor 28 is connected between the base and collector of the transistor Q 3.

HIGH-VOLTAGE OUTPUT DRIVER FOR A SENSOR DEVICE WITH REVERSE CURRENT BLOCKING

A high-voltage output driver () for a sensor device () with reverse current blocking comprises a supply node (SN) to apply a supply voltage (VHV) and an output node (OP) to provide an output signal (OS) of the high-voltage output driver (). The high-voltage output driver () comprises a driver transistor (MP) being disposed between the supply node (SN) and the output node (OP). The high-voltage output driver () further comprises a bulk control circuit () to apply a bulk control voltage (Vwell) to a bulk node (BMP) of the driver transistor (MP), and a gate control circuit () to apply a gate control voltage (GCV) to thegate node (GMP) of the driver transistor (MP). 1. A high-voltage output driver for a sensor device with reverse current blocking , comprising:a supply node to apply a supply voltage,an output node to provide an output signal of the high-voltage output driver,a driver transistor being disposed between the supply node and the output node,a bulk control circuit to apply a bulk control voltage to a bulk node of the driver transistor,a gate control circuit to apply agate control voltage to the gate node of the driver transistor.2. The high-voltage output driver of claim 1 ,wherein the high-voltage output driver is operated in a first operation mode in which the potential at the output node is lower than the supply voltage, and in a second operation mode in which the potential at the output node is higher than the supply voltage,wherein the bulk control circuit is configured to apply the level of a bulk control voltage to the bulk node of the driver transistor in dependence on operating the high-voltage output driver in the first and second operation mode,wherein the gate control circuit is configured to apply the level of the gate control voltage to the gate node of the high side driver transistor in dependence on operating the high-voltage output driver in the first and second operation mode.3. The high-voltage output driver of claim 1 ,wherein the bulk ...

GATE-SOURCE VOLTAGE GENERATION FOR PULL-UP AND PULL-DOWN DEVICES IN I/O DESIGNS

Driver and pre-driver circuitry operate in an integrated circuit with two supply voltages. In one form, a reference voltage generation circuit is operable to respond to varying voltage supply conditions in which a driver may be subject to over voltage effects by generating a reference voltage based the first supply voltage when the second supply voltage is not available, and based on the second supply voltage when the first supply voltage is not available. A first drive signal generation circuit drives a pull-up transistor gate based on a data signal, varying the gate voltage between the second supply voltage and the reference voltage. A second drive signal generation circuit drives a pull-down transistor gate with a signal varying between the second supply voltage minus the reference voltage, and zero volts. In one form, certain gate-source voltages in the driver are maintained to be equal. 1. A data transmission circuit comprising:a driver having a positive terminal, a negative terminal, an output terminal, one or more pull-up transistors coupled to the positive terminal and the output terminal, and one or more pull-down transistors coupled to the output terminal and the negative terminal;a reference voltage generation circuit for selecting, based at least upon activation of a first supply voltage, a reference voltage based on the first supply voltage or based on a predetermined fraction of a second supply voltage; and 'a first drive signal generation circuit for creating a first drive signal based on a data signal and feeding the first drive signal to a gate of one of the one or more pull-up transistors, including circuitry operable to shift a voltage level of the data signal to the second supply voltage as a digital high of the first drive signal and the reference voltage as a digital low of the first drive signal; and a second drive signal generation circuit for creating a second drive signal based on the data signal and feeding the second drive signal to a ...

LOW STATIC CURRENT SEMICONDUCTOR DEVICE

A semiconductor device includes a power transistor and a driving circuit. The driving circuit is coupled to and is configured to drive the power transistor and includes first and second stages. The second stage is coupled between the first stage and the power transistor. Each of the first and second stages includes a pair of enhancement-mode high-electron-mobility transistors (HEMTs). The construction as such lowers a static current of the driving circuit. 1. A semiconductor device comprising:a power transistor; anda driving circuit coupled to and configured to drive the power transistor and including a first stage and a second stage coupled between the first stage and the power transistor, wherein each of the first and second stages includes first and second enhancement-mode high-electron-mobility transistors (HEMTs).2. The semiconductor device of claim 1 , wherein each of the first and second enhancement-mode HEMTs is an HEMT that is in an off state at a zero gate-source voltage.3. The semiconductor device of claim 1 , wherein the driving circuit further includes a third stage that includes a depletion-mode HEMT and an enhancement-mode HEMT and the depletion-mode HEMT is an HEMT that is in an on state at a zero gate-source voltage.4. The semiconductor device of claim 3 , wherein the driving circuit further includes a fourth stage that is coupled between the first and third stages and that includes a pair of enhancement-mode HEMTs.5. The semiconductor device of claim 3 , further comprising:a package encapsulating the driving circuit; andan input pin extending into the package, wherein the enhancement-mode HEMT of the third stage has a gate terminal coupled to the input pin.6. The semiconductor device of claim 3 , further comprising a charge pump circuit having input and output terminals and configured to generate a charge pump voltage at the output terminal thereof greater than a source voltage at the input terminal thereof claim 3 , wherein the depletion-mode HEMT ...

SUPPLY VOLTAGE MODULAR PHOTODIODE BIAS

An optical communication system, circuit, and Integrated Circuit (IC) chip are disclosed. The disclosed optical communication system includes a photodiode configured to receive light energy and convert the light energy into an electrical signal, an amplifier configured to receive the electrical signal from the photodiode and output an amplified electrical signal, and a control circuit comprising a biasing network that generates a modular logic level that scales with a bias voltage of the photodiode. 1. An optical communication system , comprising:a photodiode configured to receive light energy and convert the light energy into an electrical signal;an amplifier configured to receive the electrical signal from the photodiode and output an amplified electrical signal, wherein the amplifier is driven by a supply voltage Vcc; anda control circuit comprising a biasing network having a plurality of switching elements connected in series between a photodiode biasing supply voltage Vpd and a bias resistor that is connected to a common reference voltage or ground, wherein the supply voltage Vcc is less than the photodiode biasing supply voltage Vpd, wherein the amplifier is also connected to the common reference voltage or ground, and wherein the biasing network provides a balanced high frequency ground path between the photodiode and the amplifier.2. The optical communication system of claim 1 , wherein the photodiode comprises a P-I-N diode.3. The optical communication system of claim 1 , wherein plurality of switching elements comprise at least four switching elements.4. The optical communication system of claim 1 , wherein the plurality of switching elements comprise a plurality of Bipolar Junction Transistors (BJTs) connected in series between the bias resistor and the photodiode biasing supply voltage Vpd.5. The optical communication system of claim 4 , wherein the plurality of BJTs are connected to a filter transistor that is part of a filter circuit for the amplifier. ...

AN ISOLATED HIGH SIDE DRIVE CIRCUIT

The present application relates to an isolated drive circuit, of the type commonly employed as high side drivers, for providing a drive signal to a semiconductor switch. The isolated drive circuit comprises a transformer with primary and secondary windings. The circuit further comprises a primary side circuit having a plurality of switches arranged in a bridge configuration with the primary winding positioned across the output of the bridge and a secondary side circuit connected to the secondary winding of the transformer and having a drive circuit output for providing a drive signal to the semiconductor switch. The advantage of this approach is that the entire circuit can be constructed as a module for use as a single component on a circuit board without requiring additional external components. 1. An isolated high side drive circuit for providing a drive signal to a semiconductor switch , the high side drive circuit comprising:a transformer having a primary winding and a secondary winding, the secondary winding being a single winding defined between two nodes;a primary side circuit comprising a plurality of switches arranged in a bridge configuration with the primary winding positioned within the bridge configuration and a control circuit for controlling the switches in response to an input signal;a secondary side circuit connected to the two nodes of the secondary winding of the transformer and having a drive circuit output for providing a drive signal to the semiconductor switch, wherein the control circuit is configured to operate the switches in a first mode to effect the delivery of a drive pulse of a first polarity and in a second mode to effect the delivery of a pulse with an opposite second polarity to a primary winding of the transformer, wherein the secondary side circuit is configured to respond to a first polarity pulse to effect a turn on the semiconductor switch and wherein the secondary side circuit is configured to respond to a second polarity ...

Drive circuit and drive system

Proposed is a drive circuit including: a driving NMOS transistor having a source set to a reference potential and a driving PMOS transistor having a source set to a first potential, the driving NMOS transistor and the driving PMOS transistor having a mutually common drain connected to a load; a first bipolar transistor configured to control on/off of the driving PMOS transistor; a first switching element that causes conduction or non-conduction between a gate and the source of the driving NMOS transistor; and a second switching element that causes conduction or non-conduction between a gate and the source of the driving PMOS transistor.

APPARATUS AND METHOD FOR COMPENSATING FOR PROCESS VARIATION IN ELECTRONIC DEVICE

An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit. The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit. 1. An electronic device comprising:a first circuit configured to consume a current supplied to the first circuit; anda second circuit configured to control the current supplied to the first circuit,wherein the second circuit is configured to generate a signal for controlling the current supplied to the first circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.2. The electronic device of claim 1 , wherein the second component comprises a transistor.3. The electronic device of claim 1 , further comprising a ring Voltage Controlled Oscillator (VCO) configured to generate the pulse signal.4. The electronic device of claim 1 , wherein the frequency of the pulse signal varies according to a process characteristic of the second component.5. The electronic device of claim 1 , wherein the signal for controlling the current supplied to the first circuit indicates whether to activate components for supplying the current supplied to the first circuit in a current source of the first circuit.6. The electronic device of claim 1 , wherein the signal for controlling the current supplied to the first circuit indicates a supply voltage of a regulator of the first circuit.7. The electronic device of claim 1 , wherein the first circuit comprises a Voltage Controlled Oscillator (VCO).8. The electronic device of claim 1 , wherein the second circuit is configured to determine a process ...

High frequency semiconductor switch circuit and high frequency radio system including same

A path switching FET and a shunt FET are separated from each other by a capacitor. The gates of the path switching FET and the shunt FET are controlled using an inverter circuit having a first internal power supply voltage (e.g., 2.5 V) as a power supply. The sources and drains of the path switching FET and the shunt FET are controlled using an inverter circuit having a second internal power supply voltage (e.g., 1.25 V) which is smaller than the first internal power supply voltage, as a power supply.

Driver and communication module

A driver for outputting a drive signal to drive a direct-modulation semiconductor laser includes a compensation signal generator configured to produce a compensation signal that increases a drive current value at an end of a delay period following a positive transition of an “on” period of the drive signal during which an “on” state continues.

GATE DRIVING CIRCUIT FOR INSULATED GATE-TYPE POWER SEMICONDUCTOR ELEMENT

A gate driving circuit for an insulated gate-type power semiconductor element includes an Nch MOSFET which turns on the insulated gate-type power semiconductor element, a Pch MOSFET which turns off the insulated gate-type power semiconductor element, a control circuit which turns on the Nch MOSFET by applying a positive voltage to the gate electrode of the Nch MOSFET, and which turns on the Pch MOSFET by applying a negative voltage to the gate electrode of the Pch MOSFET, and a power supply which applies a negative voltage to the drain electrode of the Pch MOSFET and to a negative-side electrode of the control circuit, which applies a positive voltage to the drain electrode of the Nch MOSFET, and which applies to a positive-side electrode of the control circuit a positive voltage whose absolute value is larger than absolute value of the positive voltage applied to the drain electrode of the Nch MOSFET. 1. A gate driving circuit for an insulated gate-type power semiconductor element , comprising:an Nch MOSFET having a source electrode, a drain electrode and a gate electrode, the source electrode being connected to a gate electrode of the insulated gate-type power semiconductor element, the Nch MOSFET being turned on to turn on the insulated gate-type power semiconductor element when a positive voltage is applied to the gate electrode of the Nch MOSFET while a positive voltage is being applied to the drain electrode of the Nch MOSFET;a Pch MOSFET having a source electrode, a drain electrode and a gate electrode, the source electrode being connected to the gate electrode of the insulated gate-type power semiconductor element, the Pch MOSFET being turned on to turn off the insulated gate-type power semiconductor element when a negative voltage is applied to the gate electrode of the Pch MOSFET while a negative voltage is being applied to the drain electrode of the Pch MOSFET;a control circuit having a control electrode, a positive-side electrode and a negative-side ...

ISOLATED UNI-POLAR TRANSISTOR GATE DRIVE

According to one aspect, a transistor gate drive comprises a first input configured to be coupled to a DC voltage source, a second input configured to receive a control signal, a third input configured to couple to a ground connection, a transformer, a first switch configured to couple the first input to a first end of a primary winding of the transformer in response to receipt of the control signal, and to decouple the first input from the first end of the primary winding in response to the receipt of the control signal, a second switch configured to couple a second end of the primary winding to the third input in response to receipt of the control signal, and to decouple the second end of the primary winding from the third input in response to the receipt of the control signal. 1. A transistor gate drive comprising:a first input configured to be coupled to a DC voltage source;a second input configured to receive a control signal;a third input configured to couple to a ground connection;a transformer having a primary winding and at least one secondary winding, the primary winding having a first end and a second end;a first switch having a control input and configured to couple the first input to the first end of the primary winding in response to receipt of the control signal having a first level, and to decouple the first input from the first end of the primary winding in response to the receipt of the control signal having a second level;a second switch having a control input and configured to couple the second end of the primary winding to the third input in response to receipt of the control signal having the first level, and to decouple the second end of the primary winding from the third input in response to the receipt of the control signal having the second level;a first diode coupled between the first switch and the first end of the primary winding and further coupled to the third input; anda second diode coupled to the first input and further coupled ...

HALF-BRIDGE CONTROL CIRCUIT, RELATED INTEGRATED CIRCUIT AND HALF-BRIDGE CIRCUIT

An embodiment half-bridge control circuit comprises an input terminal, an output terminal for providing a pulsed signal to a half-bridge driver circuit configured to drive two electronic switches connected between two supply terminals, and a feedback terminal for receiving a feedback signal indicative of the instantaneous voltage value at a switching node between the two electronic switches. A selector circuit provides a digital feedback signal. A subtractor generates an error signal by subtracting the digital feedback signal from the reference signal. An integrator generates an integration signal by integrating the value of the error signal. A down-scale circuit generates a reduced resolution integration signal by discarding one or more least significant bits of the integration signal. A sampling circuit generates a sampled integration signal by sampling the reduced resolution integration signal. A pulse generator circuit generates the pulsed signal as a function of the sampled integration signal. 1. A half-bridge control circuit comprising:positive and negative supply terminals configured to receive a supply voltage;an input terminal configured to receive a digital reference signal having a first number of bits;an output terminal configured to provide a pulsed signal to a half-bridge driver circuit configured to generate drive signals for two electronic switches connected between the positive and negative supply terminals;a feedback terminal configured to receive a feedback signal indicative of an instantaneous value of a voltage at a switching node between the two electronic switches; a non-zero value when the feedback signal is greater than a threshold value; or', 'a zero value when the feedback signal is smaller than the threshold value;, 'a selector circuit configured to provide a digital feedback signal, wherein the selector circuit is configured to select as digital feedback signala digital subtractor configured to generate an error signal by subtracting the ...

ISOLATED HIGH SPEED SWITCH

A circuit structured to drive an isolated high speed voltage metal-oxide-semiconductor field-effect transistor (MOSFET) switch, including a first MOSFET and a second MOSFET configured to operate as a switch, a capacitor, a charging component in parallel with the capacitor, a first switch in series with the charging component, and a second switch in parallel with the charging component and the capacitor. The stored voltage in the capacitor is sent to the gates of the first MOSFET and the second MOSFET when a second switch is open and a first switch is closed. 1. A circuit structured to drive an isolated high speed metal-oxide-semiconductor field-effect transistor (MOSFET) switch , comprising:a first MOSFET and a second MOSFET configured to operate as a MOSFET switch;a capacitor; anda charging component in parallel with the capacitor;a first switch in series with the charging component; anda second switch in parallel with the charging component and the capacitor.2. The circuit of claim 1 , further including a protection circuit claim 1 , the protection circuit including a third MOSFET and a transistor in parallel to the charging component.3. The circuit of claim 2 , wherein the protection circuit is configured to drain energy from the capacitor when the switching circuit is overloaded.4. The circuit of claim 1 , wherein the first switch is open and the second switch is closed when the MOSFET switch is off.5. The circuit of claim 1 , wherein the second switch is open and the first switch is closed when the MOSFET switch is on.6. The circuit of claim 1 , wherein the charging component includes an opto-battery.7. The circuit of claim 1 , wherein the stored voltage in the capacitor is sent to the gates of the first MOSFET and the second MOSFET when the second switch is open and the first switch is closed.8. The circuit of claim 7 , further including a protection circuit claim 7 , the protection circuit including a third MOSFET and a transistor in parallel to the charging ...

GATE DRIVE CIRCUIT

A gate drive circuit in an aspect of the present disclosure includes a modulated signal generation circuit that generates a first modulated signal, a first isolator that isolatedly transmits the first modulated signal, and a first rectifier circuit that generates a first output signal by rectifying the first modulated signal. The first modulated signal includes a first amplitude, a second amplitude larger than the first amplitude, and a third amplitude larger than the second amplitude. The first output signal includes a first output voltage value according to the first amplitude, a second output voltage value according to the second amplitude, and a third output voltage value according to the third amplitude. 1. A gate drive circuit comprising:a modulated signal generation circuit that modulates a radio-frequency wave, to generate a first modulated signal including a first amplitude, a second amplitude larger than the first amplitude, and a third amplitude larger than the second amplitude;a first isolator that isolatedly transmits the first modulated signal;a first rectifier circuit that rectifies the first modulated signal which has been transmitted by the first isolator, to generate a first output signal including a first output voltage value according to the first amplitude, a second output voltage value according to the second amplitude, and a third output voltage value according to the third amplitude; andan output terminal through which a driving signal is output to a semiconductor switch, the driving signal including at least part of the first output signal.2. The gate drive circuit according to claim 1 , wherein the driving signal takes three or more voltage values including the second output voltage value and the third output voltage value.3. The gate drive circuit according to claim 1 , wherein the driving signal takes the third output voltage value in a first on period claim 1 , which begins when the semiconductor switch is turned on claim 1 , and takes ...

GATE DRIVE CIRCUIT

A gate drive circuit in an aspect of the present disclosure includes: a first electromagnetic resonant coupler that isolatedly transmits a transmission signal from the primary side to the secondary side, and also isolatedly transmits a reflected signal from the secondary side to the primary side; a modulator circuit that modulates a radio-frequency wave with an input signal to generate the transmission signal; a demodulator circuit that demodulates the transmission signal to generate an output signal; a variable capacitance diode into which the transmission signal is input from the first electromagnetic resonant coupler, the variable capacitance diode disposed on the secondary side, the variable capacitance diode allowing a capacitance thereof to vary according to a monitor signal; and a reflected signal rectifier circuit that rectifies the reflected signal input to generate a monitor output signal. 1. A gate drive circuit comprising:a first electromagnetic resonant coupler that isolatedly transmits a transmission signal from a primary side of the gate drive circuit to a secondary side of the gate drive circuit, and isolatedly transmits a reflected signal from the secondary side to the primary side, the primary side and the secondary side isolated from each other, the reflected signal generated by reflecting the transmission signal on the secondary side;a modulator circuit that modulates a radio-frequency wave with an input signal to generate the transmission signal and outputs the transmission signal to the first electromagnetic resonant coupler, the modulator circuit disposed on the primary side;a demodulator circuit that demodulates the transmission signal input from the first electromagnetic resonant coupler to generate an output signal and outputs the output signal to a semiconductor switch, the demodulator circuit disposed on the secondary side;a variable capacitance diode into which the transmission signal is input from the first electromagnetic resonant ...

RELAY MODULE DEVICE

In a relay module device, a signal converting section transmits driving signals of switching elements when receiving input signals from an external device and sets a relationship between the input signals and the driving signals. The relationship includes a first mode in which the signal converting section transmits the driving signals to separately control one of the switching elements with respect to one of the input signals, and a second mode in which the signal converting section transmits the driving signals to concurrently control two or more of the switching elements with respect to one of the input signals. 1. A relay module device comprising:a circuit substrate including a plurality of switching elements, a plurality of first wiring patterns, a plurality of second wiring patterns, a plurality of terminals, and a signal converting section, the switching elements controlling a plurality of load currents supplied from a power source to a plurality of loads, the first wiring patterns transmitting driving signals from the signal converting section to the switching elements, the second wiring patterns transmitting the load currents from the switching elements to the loads, the terminals connected with the second wiring patterns, the signal converting section transmitting the driving signals when receiving input signals from an external device and setting a relationship between the input signals and the driving signals, the relationship including a first mode in which the signal converting section transmits the driving signals to separately control one of the switching elements with respect to one of the input signals, and a second mode in which the signal converting section transmits the driving signals to concurrently control two or more of the switching elements with respect to one of the input signals;a plurality of connector terminals each having an end connected with one of the terminals of the circuit substrate and another end for external connection; anda ...

Hybrid Power Devices

A device includes a first diode and a second diode connected in series between a first terminal and a second terminal of a switching element, wherein the switching element is a unidirectional device and an anode of the first diode is directly connected to an anode of the second diode, a third diode connected between the first terminal and the second terminal of the switching element and a switch connected in parallel with the first diode.

HIGH TEMPERATURE GATE DRIVER FOR SILICON CARBIDE METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR

A high temperature (HT) gate driver for Silicon Carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET) uses commercial off-the-shelf COTS discrete components, and has an integrated short-circuit or overcurrent protection circuit and under voltage lock out (UVLO) protection circuit. 1. A high temperature (HT) gate driver for silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET) , comprising: an amplifier circuit, wherein the amplifier circuit produces amplified on-state drain-source voltage for monitoring,', 'a first diode, wherein the first diode is of high voltage, and wherein the amplified on-state drain-source voltage is monitored through the first diode,', 'a second diode,', 'an emitter resistor,', 'a first high temperature (HT) transistor, wherein a base terminal of the first high temperature (HT) transistor receives actual on-state voltage, wherein an emitter terminal of the first high temperature (HT) transistor connects to a gate signal though the second diode and the emitter resistor, and wherein amplified on-state voltage information is taken from a collector terminal of the first high temperature (HT) transistor, and', 'a comparator circuit, wherein the comparator circuit comprises a plurality of high temperature (HT) transistors and a voltage divider network, wherein the voltage divider network comprises a first and a second resistor for fixing a reference voltage, and wherein a second high temperature (HT) transistor conditions output of the comparator circuit to generate an overcurrent fault status signal when the amplified on-state voltage exceeds the reference voltage;, 'an overcurrent protection circuit, wherein the overcurrent protection circuit comprises'}a voltage lock out protection circuit, wherein the voltage lock out protection circuit comprises a third high temperature (HT) transistor, wherein the third high temperature (HT) transistor compares a supplied positive gate voltage to a selected under ...

GATE DRIVER

In a gate driver for driving a first transistor with a constant current, a constant current circuit supplies the constant current to a gate of the first transistor. A second transistor has a gate supplied with a gate reference voltage as a reference for a drive voltage to turn ON the first transistor and is connected in a forward direction in a path from the constant current circuit to the gate of the first transistor. A controller drives the first transistor by operating the constant current circuit when an ON instruction is inputted. The controller sets the gate reference voltage to a first value when the ON instruction is inputted and then changes the gate reference voltage to a second value greater than the first value when a predetermined timing comes under a condition where the first transistor is not in an overcurrent state. 1. A gate driver comprising:a gate reference voltage generation circuit configured to output a gate reference voltage as a reference for a drive voltage to turn ON a first transistor, the gate reference voltage generation circuit further configured to change the gate reference voltage to be outputted between at least two values;a constant current circuit configured to supply constant current to a gate of the first transistor;a second transistor connected in a forward direction in a gate current supply path from an output terminal of the constant current circuit to the gate of the first transistor, the second transistor being an N channel or NPN transistor and having a gate supplied with the gate reference voltage;a drive controller configured to drive the gate of the first transistor with the constant current by operating the constant current circuit when an ON instruction is inputted;a voltage change controller configured to set a value of the gate reference voltage to be outputted by the gate reference voltage generation circuit to a first setting value or a second setting value greater than the first setting value, andan overcurrent ...

Low Static Current Semiconductor Device

Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs. 1. A semiconductor device comprising: a power transistor and a driving circuit coupled to the power transistor; wherein:the driving circuit comprises a first stage, a second stage, a third stage, and a fourth stage;the first stage comprises an enhancement-mode high-electron-mobility transistor (HEMT) and a depletion-mode HEMT;the second stage is coupled between the first stage and the power transistor;the third stage is coupled between the first and second stages;the fourth stage is coupled between the first and third stages.2. The semiconductor device of claim 1 , further comprising a charge pump circuit coupled to the first stage.3. The semiconductor device of claim 2 , wherein the charge pump circuit comprises a ring oscillator claim 2 , a clock generator claim 2 , and a voltage multiplier.4. The semiconductor device of claim 3 , wherein the ring oscillator comprises a feedforward oscillating module claim 3 , a feedback oscillating module claim 3 , and an enabling module.5. The semiconductor device of claim 3 , wherein the clock generator comprises a true module and a complement module.6. The semiconductor device of claim 3 , wherein the voltage multiplier is a Dickson voltage multiplier.7. The semiconductor device of claim 1 , wherein the second stage comprises a pair of enhanced-mode HEMTs.8. The semiconductor device of claim 1 , wherein the third and fourth stages each comprises a pair of enhanced-mode HEMTs.9. The semiconductor device of claim 1 , further comprising a bootstrap circuit coupled to the third stage.10 ...

DRIVER CIRCUIT FOR SWITCHING EDGE MODULATION OF A POWER SWITCH

A driver circuit for switching edge modulation of a power switch. The driver circuit includes a first driver circuit input including a downstream input node, and a power switch including an upstream first gate node. A charging path including a charging resistor is situated between the input node and the first gate node. A discharging path including a discharging resistor is situated between the input node and the first gate node. A gate path is situated between the input node and the first gate node. A power switch transistor, whose gate is connected to the first gate node, is provided. A gate path includes a gate resistor. The driver circuit is configured so that, during a switching process of the power switch, the gate path is temporarily short-circuited either via the charging path or the discharging path, to increase the slope of the switching behavior of the power switch. 16-. (canceled)7. A driver circuit for switching edge modulation of a power switch , comprising:a first driver circuit input including a downstream input node;a power switch including an upstream first gate node;a charging path situated between the input node and the first gate node, including a charging resistor;a discharging path situated between the input node and the first gate node, including a discharging resistor;a gate path situated between the input node and the first gate node, including a gate resistor; anda power switch transistor, a gate of the power switch transistor being connected to the first gate node;wherein the driver circuit being configured in such a way that, during a switching process of the power switch, the gate path is temporarily short-circuited either via the charging path or the discharging path, to increase a slope of a switching behavior of the power switch.8. The driver circuit as recited in claim 7 , wherein the driver circuit is configured in such a way that the charging path and the discharging path are blocked at a beginning and end of the switching process ...

Amplifier having switch and switch control processor controlling switch

An amplifier is provided. The amplifier includes a first resistor electrically connected to the input terminal, a second resistor electrically connected to the output terminal, a switch including a metal-oxide-semiconductor field-effect transistor (MOSFET) and electrically connected to one end of the second resistor, and a switch control processor configured to electrically connect the gate terminal of the MOSFET constituting the switch and the bulk terminal of the MOSFET constituting the switch to an impedance having an impedance value higher than a preset first threshold.

Low Static Current Semiconductor Device

Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs. 1. A semiconductor device comprising: a power transistor , a driving circuit coupled to and configured to drive the power transistor , and a charge pump circuit; wherein:the driving circuit includes a first stage and a second stage;the first stage includes an enhancement-mode high-electron-mobility transistor (HEMT);the second stage is coupled between the first stage and the power transistor and includes a pair of enhancement-mode HEMTs; andthe charge pump circuit includes input and output terminals.2. The semiconductor device of claim 1 , wherein the charge pump circuit is configured to generate a charge pump voltage at the output terminal thereof greater than a source voltage at the input terminal thereof.3. The semiconductor device of claim 1 , wherein the charge pump circuit comprises a ring oscillator claim 1 , a clock generator claim 1 , and a voltage multiplier.4. The semiconductor device of claim 3 , wherein the voltage multiplier is coupled to the input and output terminals of the charge pump circuit.5. The semiconductor device of claim 3 , wherein the ring oscillator comprises a feedforward oscillating module claim 3 , a feedback oscillating module claim 3 , and an enabling module.6. The semiconductor device of claim 5 , further comprising a package encapsulating the driving circuit and an enable pin extending into the package claim 5 , wherein the enable pin is coupled to the enabling module.7. The semiconductor device of claim 1 , further comprising a package encapsulating the driving circuit and a pair of ...

Driver for normally on iii-nitride transistors to get normally-off functionality

A semiconductor device includes a depletion mode GaN FET and an integrated driver/cascode IC. The integrated driver/cascode IC includes an enhancement mode cascoded NMOS transistor which is connected in series to a source node of the GaN FET. The integrated driver/cascode IC further includes a driver circuit which conditions a gate input signal and provides a suitable digital waveform to a gate node of the cascoded NMOS transistor. The cascoded NMOS transistor and the driver circuit are formed on a same silicon substrate.

Industrial Control Module Providing Universal I/O

An industrial control I/O module for interfacing with industrial control equipment, such as sensors and actuators, can be configured to dynamically provide differing resistances in each channel as may be required for reliably achieving particular modes of operation in the channel. Providing differing resistances in such channels flexibly allows different modes in the channel to provide universal I/O capability. Modes of operation could include, for example, digital output, digital input, analog output, analog input and the like, in the same channel, but at different times. In one aspect, a processor or voltage divider can be used to control an amplifier, with feedback, driving a transistor in a channel to dynamically adjust resistance in the channel by selectively biasing the transistor to achieve a resistance in the channel suitable for the selected mode. 1. An industrial control system input-output (I/O) module , comprising:a terminal configured to receive an electrical conductor, the terminal defining an I/O channel;a variable resistance mechanism connected to the terminal providing a resistance in an I/O channel; anda control circuit connected to the variable resistance mechanism, the control circuit being configured to control the variable resistance mechanism to adjust the resistance in the I/O channel for a given mode of operation selected from a plurality of modes of operation, wherein each mode of operation configures the variable resistance mechanism to provide a different resistance in the I/O channel, and wherein the mode of operation is selected from the group consisting of digital output, digital input, analog output and analog input.2. The module of claim 1 , wherein the terminal is selected from the group consisting of a screw terminal and a spring-cage terminal claim 1 , and wherein the variable resistance mechanism is a transistor.3. The module of claim 2 , wherein the control circuit comprises a processor connected to an amplifier claim 2 , ...

Low Static Current Semiconductor Device

Devices, systems, and methods are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.

Industrial Control Module Providing Universal I/O

An industrial control I/O module for interfacing with industrial control equipment, such as sensors and actuators, can be configured to dynamically provide differing resistances in each channel as may be required for reliably achieving particular modes of operation in the channel. Providing differing resistances in such channels flexibly allows different modes in the channel to provide universal I/O capability. Modes of operation could include, for example, digital output, digital input, analog output, analog input and the like, in the same channel, but at different times. In one aspect, a processor or voltage divider can be used to control an amplifier, with feedback, driving a transistor in a channel to dynamically adjust resistance in the channel by selectively biasing the transistor to achieve a resistance in the channel suitable for the selected mode. 1. A module for interfacing with industrial control equipment , comprising:a terminal configured to receive an electrical conductor in a channel interfacing with industrial control equipment;a variable resistance device connected to the terminal providing a resistance in the channel; anda control circuit connected to the variable resistance device,wherein the control circuit is configured to control the variable resistance device to adjust the resistance in the channel for a given mode selected from a plurality of modes, wherein each mode of the plurality of modes configures a different resistance in the channel.2. The module of claim 1 , wherein the terminal is a screw terminal claim 1 , and wherein the variable resistance device is a transistor.3. The module of claim 2 , wherein the control circuit comprises a processor connected to an amplifier claim 2 , wherein the transistor is a Field Effect Transistor (FET) claim 2 , and wherein the amplifier drives a gate of the FET.4. The module of claim 3 , further comprising a resistor for current sensing connected to the FET claim 3 , wherein the resistor is further ...

Bidirectional mosfet switch and multiplexer

A bidirectional MOSFET switch is provided. The switch includes an input terminal, an output terminal and two MOSFET transistors which are connected to one another by their source and gate terminals. The input and the output terminals are connected to a respective drain terminal of the two MOSFET transistors. The switch further includes a control input terminal that is galvanically isolated by a potential isolator and connected to a control unit configured to switch a control current for a FET transistor via a further MOSFET transistor. The FET transistor is configured to generate, by the control current, a gate voltage Vgs between the gate and the source at the two MOSFET transistors for the switching thereof, and a floating voltage source, which is galvanically connected to the input and which is configured to generate a gate control current for the two MOSFET transistors.

INSULATED GATE DEVICE DISCHARGING

A large-power insulated gate switching device (e.g., MOSFET) is used for driving relatively large surges of pulsed power through a load. The switching device has a relatively large gate capacitance which is difficult to quickly discharge. A gate charging and discharging circuit is provided having a bipolar junction transistor (BJT) configured to apply a charging voltage to charge the gate of the switching device where the BJT is configured to also discontinue the application of the charging voltage. An inductive circuit having an inductor is also provided. The inductive circuit is coupled to the gate of the switching device and further coupled to receive the charging voltage such that application of the charging voltage to the inductive circuit is with a polarity that induces a first current to flow through the inductor in a direction corresponding to charge moving away from the gate and such that discontinuation of the application of the charging voltage to the inductive circuit induces a second current flowing through the inductor in the direction corresponding to charge moving away from the gate such that the second current discharges the gate of the switching device. Faster turn off of the switching device is thus made possible and is synchronized to the discontinuation of the charging voltage. 120-. (canceled)21. A circuit adapted for charging and discharging a capacitive load , the circuit comprising:a first transistor configured to apply a charging voltage to charge the capacitive load, the first transistor having a driving terminal connected directly to the capacitive load to apply said charging voltage, the first transistor further having a driven terminal coupled to a voltage source and a control terminal operable to selectively activate and deactivate the first transistor, where deactivation of the first transistor operates to discontinue the application of the charging voltage; andan inductive circuit having an inductance, the inductive circuit being ...

CONVERSION CIRCUIT AND CONVERSION CIRCUITRY

A conversion circuit includes a main device including a first terminal, a second terminal and a control terminal, and a voltage control switching circuit including a first terminal configured to receive an first driving signal, a second terminal coupled to the control terminal of the main device and configured to transmit a second driving signal to drive the main device, and a reference terminal coupled to the second terminal of the main device. A current passing through the voltage control switching device is controlled in response to a voltage level of the reference terminal. 1. A conversion circuit , comprising:a main device, comprising a first terminal, a second terminal and a control terminal; a first terminal configured to receive a first driving signal;', 'a second terminal coupled to the control terminal of the main device, and configured to transmit a second driving signal to drive the main device; and', 'a reference terminal coupled to the second terminal of the main device, wherein a voltage level of the second driving signal is generated by the voltage control switching circuit; and, 'a voltage control switching circuit, comprisinga miller clamp circuit electrically coupled to the control terminal of the main device and the reference terminal of the voltage control switching circuit, wherein the miller clamp circuit is configured to receive the second driving signal, when the main device is turned off, the miller clamp circuit is configured to decrease a voltage level of the control terminal of the main device.2. The conversion circuit of claim 1 , wherein the miller clamp circuit comprises:an inverter circuit configured to receive the second driving signal, and output a control driving signal; andan integrate active switch electrically coupled to the control terminal of the main device and the reference terminal of the voltage control switching circuit, wherein the integrate active switch is configured to turn on according to the control driving signal ...

Load drive circuit

A load drive circuit includes a power source terminal (“PST”), a power source and a load terminal connecting a load to the power source. A semiconductor switch connects the PST to the load terminal. A control circuit includes an output terminal for opening/closing the semiconductor switch. A freewheeling circuit includes a freewheeling diode and a protection switch blocks a current from the power source to the semiconductor switch when the power source is connected in a reverse manner. A first terminal connects the control circuit to a first fixed potential and a second terminal connects an anode of the freewheeling diode to a second fixed potential. A connection circuit includes a connection switch connecting the output terminal and the first terminal. The connection circuit connects the output terminal to the first terminal when a rise in a potential difference between the first terminal and the second terminal is detected.

모오스(mos) 전께효과 트랜지스터의 구동회로(drive circuitry for a mos field effect tranststor)

본 발명은 MOS전계효과 트랜지스터의 소오스 접속이 그 스위치 상태의 기능과 다른 전위를 가산하는 쵸퍼원리의 이용에 따라 동작하는 DC/DC전압 컨버터에서 파워스위칭 요소로서 MOS전계효과 트랜지스터의 구동회로에 관한 것이다. 본 발명의 목적은 회로가 큰 입력전압 범위에서 효율적이며, 동시에 급경사 등급과 내부전류소모가 낮은 MOS전계효과 트랜지스터에 대한 제어펄스를 만드는 전술한 유형의 MOS전계효과 트랜지스터 구동회로를 제공하기 위한 것이다. 상기 회로가 제1보조전압원의 레벨에 따라 일정한 제어전류로 동작한다는 것이다. 스위치 온 지연효과는 상 반전 트랜지스터로서 동작하는 이전단의 트랜지스터의 스위칭 오프 지연효과에 의하여 만들어진다.

Current regulating circuit for an electric consumer

A so-called current-regulated end stage for electromagnetic consumers such as magnetic valves or electromagnetic final control elements is provided, in which a field effect transistor takes over the functions of the switch and of the current measuring resistor. When the field effect transistor is conductive, the voltage over a capacitor is made to follow the current flowing through the consumer, and when the field effect transistor is blocked, the flow of current through the free-running circuit is simulated via the capacitor discharge. Both a singlefold and a multiple realization are disclosed, the latter using multiple examples of an RC member and a threshold switch.

The gate driving circuit of insulated-gate type power semiconductor

防止绝缘栅型功率半导体元件的稳态损耗加剧。栅极驱动电路(2)具有：NchMOSFET(4)，其使所述绝缘栅型功率半导体元件(1)导通；PchMOSFET(5)，其使所述绝缘栅型功率半导体元件(1)截止；控制电路(6)，其通过将正电压(8b)施加于所述NchMOSFET(4)的栅电极而使所述NchMOSFET(4)导通，通过将负电压(9)施加于所述PchMOSFET(5)的栅电极而使所述PchMOSFET(5)导通；以及电源体(7)，其将负电压(9)施加于所述PchMOSFET(5)的漏电极和所述控制电路(6)的负侧电极，将正电压(8a)施加于所述NchMOSFET(4)的漏电极，将绝对值比施加于所述NchMOSFET(4)的漏电极的正电压(8a)的绝对值大的正电压(8b)施加于所述控制电路(6)的正侧电极。

Driving circuit

Over voltage protection circuit and method thereof

과전압 방지 제어 회로 및 과전압 방지 제어 방법가 개시된다. 본 발명의 실시예에 따른 과전압 방지 제어 회로는 전압 변환부, 전압 비교부 및 스위칭부를 구비한다. 전압 변환부는 전원전압을 제 1 전압 및 제 2 전압으로 변환한다. 전압 비교부는 상기 제 1 전압과 상기 제 2 전압의 크기를 비교하여 제어 신호를 생성한다. 스위칭부는 상기 제어 신호에 응답하여, 칩(chip)으로 상기 전원전압을 인가할 것인지 여부를 결정한다. 상기 과전압 방지 제어 회로는 상기 칩의 내부에 위치한다. 본 발명에 따른 과전압 방지 제어 회로는 과전압 여부를 판단하는 로직을 칩 내에 위치시킴으로써 칩 단가 및 칩 레이아웃 면적을 감소시킬 수 있는 장점이 있다. An overvoltage protection control circuit and an overvoltage protection control method are disclosed. An overvoltage protection control circuit according to an embodiment of the present invention includes a voltage converter, a voltage comparator and a switch. The voltage converter converts the power supply voltage into a first voltage and a second voltage. The voltage comparator generates a control signal by comparing the magnitudes of the first voltage and the second voltage. The switching unit determines whether to apply the power voltage to a chip in response to the control signal. The overvoltage protection control circuit is located inside the chip. The overvoltage prevention control circuit according to the present invention has an advantage of reducing chip cost and chip layout area by placing logic for determining whether overvoltage is present in a chip. 과전압 방지 제어 회로, 시스템 온 침, 다이오드, 저항 Overvoltage protection control circuit, system temperature, diode, resistor

Driving circuit of field effect transistor

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

MOSFET switch for an inductive load

The power supply control apparatus of irritability load

本发明用于降低与感应性负载并联连接的续流电路元件所产生的功耗，抑制续流电路元件的温度上升。在对与感应性负载(103)串联连接的负载开关元件(130A)进行开关控制来控制对于感应性负载(103)的供电状态的供电控制装置(100A)中以如下关系连接，即，感应性负载(103)与场效应晶体管的续流电路元件(140)并联连接，在负载开关元件(130A)闭路时，使续流电路元件(140)开路来对电容器(142)进行充电，在负载开关元件(130A)开路时，电容器(142)的充电电荷使续流电路元件(140)闭路。续流电路元件(140)的闭路导通方向以与续流电路元件内部的寄生二极管(149)的通电方向相同方向的极性进行连接，利用小容量的电容器(142)使续流电路元件(140)反向导通，从而降低电压降与温度上升。

Semiconductor device and power conversion device using the same

Circuit device with high-side back transistor

Gate drive for insulated gate power semiconductors

揭示了一种用于控制绝缘栅半导体开关(更具体来说是MOSFET和绝缘栅双极晶体管器件(IGBT))的电流和电压开关轨道的方法。在开关式电源中使用MOSFET和IGBT是因为它们易于驱动,且有能力以高开关频率处理高电流和电压。然而,这两种器件的开关轨道都导致功率变换器所产生的共模电磁发射和换向单元中的功耗。本发明使用具有栅极充电(或放电)电流反馈的混合电压/电流系统信号源,以动态地独立控制绝缘半导体器件的漏极电流和漏极电压。通过横过跨导曲线的电压源来控制漏极电流的变化速率,而通过反馈引起的电流源中的动态变化来控制漏极电压的变化速率。

Circuit arrangement for precharging intermediate circuit capacitance of high voltage on-board circuitry

본 발명은, 중간 회로 커패시턴스의 충전을 위해 사용되는 고전압 MOSFET의 스위칭 시간을 줄일 수 있는 제1 회로 어셈블리(11)를 이용해서 고전압 온보드 회로망의 중간 회로 커패시턴스를 프리차징하기 위해 고전압 MOSFET(7)을 스위칭하기 위한 회로 장치에 관한 것이다. The present invention provides a high voltage MOSFET (7) for precharging the intermediate circuit capacitance of the high voltage on-board circuitry using the first circuit assembly (11), which can reduce the switching time of the high voltage MOSFET used for charging the intermediate circuit capacitance. It relates to a circuit arrangement for switching.

Output circuit capable of outing level shifted output signal

내용 없음. No content.

Gate drive circuit

　半導体スイッチング素子を駆動するゲート駆動回路（１００）であって、高周波を入力信号で変調した送信信号を１次側から２次側に非接触伝送し、かつ、送信信号が２次側で反射されることによって生成された反射信号を２次側から１次側に非接触伝送する第一の電磁共鳴結合器（１８０）と、２次側に設けられ、外部からモニタ信号が入力されるモニタ端子（１０５）と、２次側に設けられ、モニタ端子（１０５）から入力されるモニタ信号に応じて容量が変化する可変容量ダイオード（１１０）と、１次側に設けられ、反射信号を整流することによってモニタ出力信号を生成するモニタ用整流回路（１４４）と、２次側に設けられ、送信信号を復調した出力信号を半導体スイッチング素子に出力する出力端子（１０３）とを備える。

Electronic switch for ultrasonic system - has four diode bridge with opposite connections to transducer and generator

A four diode (D1-D4) bridge (16) has four points of connection, a first terminal (C) comprising the transducer connection terminal and the opposite terminal (D) comprising a connection terminal for a transmission signal generator, the other two terminals being connected to means (18, 20) for biasing the diodes to make them alternatively conducting and blocking. A first switch (22) connects the first terminal of the bridge to the receiver terminal (12). A second switch (24) has one terminal connected to the receiver terminal (12) and the other connected to earth. Control of the biassing means and the switches is achieved by a superchronising unit.

DEVICE FOR CONTROLLING A MOS TRANSISTOR

Controlling a mos transistor

L'invention concerne un dispositif de commande (10) d'un transistor de puissance (5), ledit dispositif comportant : un dispositif d'amplification (15) pour contrôler la grille du transistor (5) via un signal de commande de sortie, ledit dispositif comprenant : une première entrée reliée au drain du transistor, le tout formant une première portion de circuit ; une deuxième entrée reliée à la source du transistor, le tout formant une deuxième portion de circuit. Le dispositif de commande comporte un moyen pour produire un courant de polarisation (I1,I2), ledit courant étant injecté dans une des dites première et deuxième entrées (NEG, POS) de manière à provoquer un décalage de la mesure de tension drain-source et conserver un régime de fonctionnement linéaire dudit signal de commande de sortie, avant l'ouverture du transistor, et un même nombre N de jonctions semi-conductrices dans les première et deuxième portions de circuit. Application notamment sur les dispositifs de chargement de batteries.

ELECTRONIC SWITCH

L'INVENTION CONCERNE UN COMMUTATEUR ELECTRONIQUE QUI N'EST PAS SUJET A DES AUTOCOMMUTATIONS DUES A DES POINTES DE TENSION. UN COMMUTATEUR A COURANT ALTERNATIF COMPORTE DEUX PAIRES DE DIODES, DONT CHACUNE 11 ET 12, 21 ET 22 COMPREND DEUX DIODES MONTEES EN OPPOSITION ET EN SERIE ENTRE L'ENTREE2 ET LA SORTIE3 DU COMMUTATEUR. LES DEUX PAIRES DE DIODES SONT MONTEES EN PARALLELE ET DANS DES SENS CONTRAIRES. UN TRANSISTOR METAL-OXYDE A EFFET DE CHAMP30 EST MONTE ENTRE LES JONCTIONS13 ET 23 DES DEUX DIODES DE CHAQUE PAIRE. UN BLOC DE COMMANDE4 PILOTE LA COMMUTATION DU TRANSISTOR30. QUAND LE TRANSISTOR EST CONDUCTEUR, LE COURANT PASSE DE L'ENTREE2 A LA SORTIE3 PAR UNE DIODE D'UNE PAIRE, LE TRANSISTOR ET UNE DIODE DE L'AUTRE PAIRE. QUAND LE TRANSISTOR30 EST NON CONDUCTEUR, LE PASSAGE DU COURANT EST BLOQUE ENTRE L'ENTREE2 ET LA SORTIE3. LE COMMUTATEUR SELON L'INVENTION EST UTILISABLE DANS UN GAMME DE TENSIONS TRES VASTE. THE INVENTION RELATES TO AN ELECTRONIC SWITCH WHICH IS NOT SUBJECT TO AUTOSWITCHES DUE TO VOLTAGE SPOTS. AN ALTERNATIVE CURRENT SWITCH INCLUDES TWO PAIRS OF DIODES, EACH OF WHICH 11 AND 12, 21 AND 22 INCLUDES TWO DIODES MOUNTED IN OPPOSITION AND IN SERIES BETWEEN INPUT2 AND OUTPUT3 OF THE SWITCH. THE TWO PAIRS OF DIODES ARE MOUNTED IN PARALLEL AND IN THE OPPOSITE DIRECTION. A CHAMP30-EFFECT METAL-OXIDE TRANSISTOR IS MOUNTED BETWEEN JUNCTIONS 13 AND 23 OF THE TWO DIODES OF EACH PAIR. A CONTROL BLOCK4 DRIVES THE SWITCHING OF THE TRANSISTOR30. WHEN THE TRANSISTOR IS CONDUCTING, THE CURRENT PASSES FROM INPUT2 TO OUTPUT3 THROUGH A DIODE OF ONE PAIR, THE TRANSISTOR AND A DIODE OF THE OTHER PAIR. WHEN THE TRANSISTOR30 IS NON CONDUCTIVE, THE PASSAGE OF CURRENT IS BLOCKED BETWEEN INPUT2 AND OUTPUT3. THE SWITCH ACCORDING TO THE INVENTION CAN BE USED IN A VERY WIDE RANGE OF VOLTAGES.

ELECTRONIC DEVICE FOR ELECTRICAL CONTROL OF AN INDUCTIVE LOAD.

La description se rapporte notamment à un dispositif électronique de commande électrique d'une charge inductive, comprenant : - un transistor de puissance (M1), - un circuit de pilotage (DRV) et - une interface (AI1) reliant le transistor de puissance (M1) au circuit de pilotage (DRV) afin de le piloter, l'interface (AI1) comprenant deux transistors (Q1, Q2) et trois résistances (R1, R2, R3).

CONTROLLING A MOS TRANSISTOR

L'invention concerne un dispositif de commande (10) d'un transistor de puissance (5), ledit dispositif comportant :- un dispositif d'amplification (15) pour contrôler la grille du transistor (5) via un signal de commande de sortie, ledit dispositif comprenant :- une première entrée reliée au drain du transistor, le tout formant une première liaison,- une deuxième entrée reliée à la source du transistor, le tout formant une deuxième liaison,caractérisé en ce qu'il comporte :- au moins un courant de polarisation (11) couplé à une des entrées, ledit courant étant destiné à effectuer un décalage de la mesure de tension drain-source pour le dispositif d'amplification (15) commande la grille du transistor (5) en régime linéaire avant de l'ouvrir, et- un même nombre N de jonctions semiconductrices entre la première et la deuxième liaisons.Application notamment sur les dispositifs de chargement de batteries. The invention relates to a device (10) for controlling a power transistor (5), said device comprising: - an amplification device (15) for controlling the gate of the transistor (5) via an output control signal , said device comprising: a first input connected to the drain of the transistor, the whole forming a first connection, a second input connected to the source of the transistor, the whole forming a second connection, characterized in that it comprises: minus a bias current (11) coupled to one of the inputs, said current being for shifting the drain-source voltage measurement for the amplification device (15) controls the gate of the transistor (5) in linear mode before opening it, and the same number N of semiconductor junctions between the first and second links. Application in particular to battery charging devices.

DEVICE FOR CONTROLLING A VOLTAGE CONTROLLED POWER SWITCH

CONTROL CIRCUIT OF A POWER TRANSISTOR USED IN FORCED SWITCHING.

CONTROL CIRCUIT FOR VOLTAGE ELEVATOR CIRCUIT, CONTROL DEVICE AND CORRESPONDING CONTROL SYSTEM.

This circuit for controlling a voltage step-up circuit (2) comprises: - a first PNP transistor (4) of which the emitter (E1) is connected to an input voltage (Vin); - a second NPN transistor (6) of which the collector (C2) is connected to the collector (C1) of the first transistor (4), the emitter (E2) of the second transistor (6) being connected to a ground, and characterized in that the emitter (E2) of said second transistor (6) is connected to the ground via a first resistor (12) and its base (B2) is connected to the ground through at least one diode (14, 16, 18).

ELECTRONIC SWITCH

ELECTRONIC DEVICE FOR ELECTRICALLY CONTROLLING AN INDUCTIVE LOAD.

La description se rapporte notamment à un dispositif électronique de commande électrique d'une charge inductive, comprenant : - un transistor de puissance (M1), - un circuit de pilotage (DRV) et - une interface (AI1) reliant le transistor de puissance (M1) au circuit de pilotage (DRV) afin de le piloter, l'interface (AI1) comprenant deux transistors (Q1, Q2) et trois résistances (R1, R2, R3). The description relates in particular to an electronic device for electrical control of an inductive load, comprising: - a power transistor (M1), - a control circuit (DRV) and - an interface (AI1) connecting the power transistor ( M1) to the control circuit (DRV) to drive it, the interface (AI1) comprising two transistors (Q1, Q2) and three resistors (R1, R2, R3).

Control circuitry for FET operating as switch in load circuit - provides voltage source dependent on control voltage of FET raising working point of controlled path by offset voltage

The control electrode of the FET is equipped with a voltage divider (R2, R3), based on a reference potential (BPS) on the secondary side of the input transformer (T) and this side is connected through the diode (D2) to the source electrode on the one hand and on the other hand to the storage capacitor (C2) connected to the reference potential. The control electrode has also, based on the reference potential, a resistance (R4) in parallel with it. Between this resistance and the voltage divider a controlled switch (S2) and a first diode (D1) are inserted. USE/ADVANTAGE - Produces negative voltage switching transistor into enhanced state without stray capacities.

METHOD AND ASSEMBLY FOR LIMITING THE DISSIPATION OF A SEMICONDUCTOR POWER SWITCH

Procédé de limitation de la dissipation d'un commutateur (1) de puissance à semi-conducteur qui a une entrée (20) de commande,- on produit un signal (8) analogique de dissipation- on compare la valeur du signal de la dissipation instantanée à une valeur d'un signal (9) de référence dans un circuit (23)- on produit un signal (10) de mise hors circuit dès que la valeur du signal (8) de dissipation est plus grande que la valeur du signal (9) de référence. A method for limiting the dissipation of a semiconductor power switch (1) having a control input (20), - producing an analog dissipation signal (8) - comparing the value of the dissipation signal instantaneous to a value of a reference signal (9) in a circuit (23) - a deactivation signal (10) is generated as soon as the value of the dissipation signal (8) is greater than the value of the signal (9) reference.

Drive device for driving voltage-driven element

The control unit of this drive device is configured in a manner so as to be able to control the voltage supplied to the gate resistor of a voltage-driven element using the voltage of a feedback element when an electrical connection is secured between the feedback element and the gate resistor of the voltage-driven element. The control unit of the drive device is further configured in a manner so as to be able to control the voltage supplied to the gate resistor of the voltage-driven element using the voltage of an output terminal when an electrical connection is not secured between the feedback element and the gate resistor of the voltage-driven element.

Circuit arrangement comprising a switching transistor, a driving circuit and a supply circuit

Switching element drive circuit

A drive circuit supplies a charging current via a charging path to drive the control terminal of a voltage-controlled switching device, with a resistor and a switching device being connected in series in the charging path. A control circuit in an integrated circuit of the drive circuit operates an internal switching device such as to selectively enable/interrupt the charging current and to regulate the voltage drop across the resistor to a fixed value. The switching device connected in the charging path can be readily changed from the internal switching device to an external switching device, in accordance with the operating requirements of the driven switching device.

Adaptive gate discharge circuit for power FETS

An adaptive gate discharge circuit for discharging the gate of a power FET transistor. The adaptive gate discharge circuit includes discharge driver circuitry which responds to the control signal by discharging the power FET gate from the initial "on" potential of the power FET to below a selected potential at which the power FET is turned off. During gate discharge, but prior to the potential of the power FET gate dropping below the selected potential, adaptive bias circuitry continues to operate to provide biasing current both to the discharge driver circuitry as well as to any other circuitry it may be biasing. However, when the potential of the power FET gate drops below the selected potential, low current biasing circuitry reduces the operating voltage of the adaptive biasing circuitry thereby turning off the adaptive biasing circuitry and any other circuitry it may be biasing.

Electronic equipment

Junction gate driver with tapped inductor current source

A junction device driver is provided that includes a current regulator, an inductor coupled with the current regulator, and a switching module coupled with the inductor. The current regulator is configured to generate a current, and the inductor is configured to store energy generated by the current produced by the current regulator. The switching module is configured to control a conduction current for a gate of a junction device. The conduction current is generated, initially, from the stored energy of the inductor to thereby provide a relatively high initial current. As the energy stored in the inductor is discharged, the current level drops to a lower level that is sufficient to maintain the junction device in an “on” state.

Apparatus and method for compensating for process variation in electronic device

An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit. The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.

Circuit arrangement and method for driving an electronic component with an output signal from a microprocessor

本发明涉及一种用于借助微处理器(MP)的输出信号(V6)来驱动电子部件的电路装置，其包括：带有控制输入端的电子部件；微处理器(MP)，该微处理器在输出端(A1)提供输出信号(V6)；其中所述电路装置此外还包括：在基极电路中的第一双极性晶体管(Q5)，其发射极与微处理器(MP)的输出端(A1)耦合；在发射极电路中的第二双极性晶体管(Q7)，其基极与第一双极性晶体管(Q5)的集电极耦合，其中第二双极性晶体管(Q7)的集电极与电子部件的控制输入端耦合。此外本发明还涉及一种用于借助微处理器(MP)的输出信号(V6)来驱动电子部件的相应方法。

Distributed driver circuitry integrated with GaN power transistors

Power switching systems are disclosed comprising driver circuitry for enhancement-mode (E-Mode) GaN power transistors with low threshold voltage. Preferably, a GaN power switch (D 3 ) comprises an E-Mode high electron mobility transistor (HEMT) with a monolithically integrated GaN driver. D 3 is partitioned into sections. At least the pull-down and, optionally, the pull-up driver circuitry is similarly partitioned as a plurality of driver elements, each driving a respective section of D 3. Each driver element is placed in proximity to a respective section of D 3, reducing interconnect track length and loop inductance. In preferred embodiments, the layout of GaN transistor switch and the driver elements, dimensions and routing of the interconnect tracks are selected to further reduce loop inductance and optimize performance. Distributed driver circuitry integrated on-chip with one or more high power E-Mode GaN switches allows closer coupling of the driver circuitry and the GaN switches to reduce effects of parasitic inductances.

CONTROL CIRCUIT FOR A POWER TRANSISTOR USING FORCED SWITCHING.

La présente invention concerne un circuit de commande d'un transistor de puissance (1) utilisé en commutation forcée, comportant un circuit d'attaque (3) de la porte (10) dudit transistor commandé par un signal de commande (4). Le circuit de commande selon l'invention est notamment remarquable en ce que ledit circuit d'attaque (3) est également commandé par deux signaux de contre-réaction, à savoir un signal proportionnel au gradient de la tension aux bornes du transistor et un signal proportionnel au gradient du courant principal du transistor. Application aux transistors de type MOS à effet de champ (MOSFET). The present invention relates to a control circuit of a power transistor (1) used in forced switching, comprising a driving circuit (3) of the gate (10) of said transistor controlled by a control signal (4). The control circuit according to the invention is notably remarkable in that said driver circuit (3) is also controlled by two feedback signals, namely a signal proportional to the gradient of the voltage at the terminals of the transistor and a signal proportional to the gradient of the main current of the transistor. Application to MOS field effect transistors (MOSFET).

Power supply switching circuit for a compact portable telephone set

In order to reduce volume and weight of a power supply of a compact portable telephone set and thus reduce the volume and weight of the compact portable telephone set itself, a P-channel power MOSFET is used as a power switching element, and a negative voltage, for example -11 volts, is applied across a source and a gate from a DC/DC converter to turn on the P-channel power MOSFET so that power is supplied from a battery which serves as one power supply. When the gate and the source of the power MOSFET are maintained at the same potential, the power MOSFET is turned off and power is supplied from another power supply.

Two-wire type switch with a power transistor

Switching circuit

一种转换电路包含一功率装置及一电压控制开关电路。功率装置包含一第一端点及一第二端点。电压控制电路包含一第一端点、一第二端点及一参考端点，其中第一端点用以接收一第一驱动信号，第二端点耦接至功率装置的控制端，并传输一第二驱动信号以驱动功率装置，参考端点耦接至功率装置的第二端点。流经电压控制切换装置的一电流经控制响应于参考端点的电压电平。

Insulated gate type power semiconductor device gate drive circuit

Lamp control device and lamp lighting system

A lamp body control apparatus controls, in accordance with an operation of a display switch that is provided on a vehicle, blinking of a lamp body that is provided on the vehicle. The lamp body control apparatus includes: an output part that outputs a blinking signal which blinks the lamp body to the lamp body from a drive output terminal based on a blinking command signal that commands a blinking timing of the lamp body; an input part that outputs a status signal of a first logic which indicates that a state of the display switch is in an ON state when a signal level from the drive output terminal is a first level and that outputs a status signal of a second logic which indicates that a state of the display switch is in an OFF state when the signal level is a second level that is different from the first level; a control part that outputs the blinking command signal to the output part when a logic of the status signal that is output from the input part is the first logic; and a self-maintaining part that maintains a logic of the status signal based on a logic of the blinking command signal when the lamp body is in a blinking state.

Gate drive circuit for a synchronous rectifier

A voltage conversion circuit is responsive to a pulse-width modulated control signal for alternately enabling the gates of first and second field effect transistors which converts a high voltage input signal to a low voltage output signal. A first state of the control signal passes the high voltage input signal through the first transistor to charge a filter, while a second state of the control signal blocks the high voltage input signal from the filter. The second state of the control signal also sources current through the second transistor to the filter to rectify the low voltage output signal. The first and second transistors have non-overlapping conduction periods.

Field-effect transistor driver

A field-effect transistor (FET) driver is provided that includes an input modulator (202) and an isolating capacitor (206, 304). The input modulator is configured to output an alternating current (AC) signal. The isolating capacitor is configured to receive the AC signal as an input and to store a charge based on the AC signal in a filter capacitor (310). The filter capacitor is configured to drive a capacitor-driven FET (102, 208, 210, 212) based on the stored charge.

Control and protection system for an output of automation equipment

The system has a static switching device (10) of a pre-actuator type electric load (C) comprising a P-channel MOS switching transistor (T5), whose source is connected to a positive voltage terminal (P) across a resistor (R5) and drain is connected to the load. The transistor switches between passing and blocked states. A limiting device (20) limits the voltage at the terminals of the resistor to a preset maximum value. A disjunction device (30) of an output channel cuts the switching of transistor to the blocked state when the current crossing the resistor exceeds a preset threshold.

Semiconductor device for wireless communication

Provided is a semiconductor device for wireless communication which achieves a reduction in leakage power and allows an improvement in power efficiency. For example, to external terminals, an antenna driver section (ADRV) for driving an antenna (ANT) and a rectifying section (RECT) for rectifying input power from the antenna are coupled. The antenna driver section includes pull-up PMOS transistors and pull-down NMOS transistors. In the rectifying section (RECT), a power supply voltage generated by a full-wave rectifying circuit (FWRCT) is boosted by a voltage boosting circuit (UPC). For example, when a supply of a power supply voltage from a battery is stopped, a power supply voltage resulting from the boosting by the voltage boosting circuit (UPC) is supplied to the bulk of each of the pull-up PMOS transistors.

Solid-state relay and regulator

An improved solid state relay and regulator having reduced turn-off time, analog or digital input, and analog or digital output, is obtained by using a depletion JFET as a variable resistance discharge path for a gate of a power MOSFET switching device wherein the gate is charged by a first set of photovoltaic cells optically coupled to but electrically isolated from an LED input. A second set of photovoltaic cells responsive to the same or a separate LED input hold the JFET in an Off state while the MOSFET gate is energized. Variable output and AND logic are obtained.

Electronic switch

The cathode of a biased diode (d1) is connected to the gate connection (G) of the switching transistor (T). Its anode is connected to the direct current voltage potential, e.g. +5V, of the switching transistor. Between the drain- (D) or source- (S) connection and the gate connection (G) a capacitor or a series circuit with a capacitor (C1) and a resistor (R) is connected.

Control of an MOS transistor

Dispositivo de control (10) de un transistor de potencia (5) formado por un canal que comprende una compuerta,una fuente y un drenaje, comprendiendo dicho dispositivo: - un dispositivo de amplificación (15) que emite una señal de control de salida para controlar la compuerta deltransistor de potencia (5), comprendiendo dicho dispositivo de amplificación: - una primera entrada (NEG) conectada al drenaje del transistor a través de una primera resistencia (R9), formandoel conjunto una primera porción de circuito; - una segunda entrada (POS) conectada a la fuente del transistor, formando el conjunto una segunda porción decircuito; - un bucle de realimentación con al menos una resistencia (R18) de la salida hacia una de las primera y segundaentradas (NEG, POS); y - un medio para producir una corriente de polarización (I1, I2), inyectándose dicha corriente en una de dichasprimera y segunda entradas (NEG, POS) de tal modo que provoque un desplazamiento de la medición de tensióndrenaje-fuente y conserve un régimen de funcionamiento lineal de dicha señal de control de salida, antes de que seabra el transistor; caracterizado porque el dispositivo de control comprende un mismo número N de uniones semiconductoras en laprimera y en la segunda porciones de circuito, siendo N un entero al menos igual a 1, y la(s) unión (uniones) en laprimera porción de circuito es del mismo tipo que la(s) de la segunda porción de circuito. Control device (10) of a power transistor (5) formed by a channel comprising a gate, a source and a drain, said device comprising: - an amplification device (15) that emits an output control signal for controlling the power transistor gate (5), said amplification device comprising: - a first inlet (NEG) connected to the drain of the transistor through a first resistor (R9), the whole forming a first circuit portion; - a second input (POS) connected to the source of the transistor, the assembly forming a second circuit portion; - a feedback loop with at least one ...

Power input circuit and inverter-integrated electric compressor for vehicle provided with same

提供了能够没有障碍地抑制输入电流的振荡现象的电源输入电路。具备：利用由于浪涌电流而在两端发生的电压来检测电流的电流检测电阻21；以及集电极连接到功率开关元件Q2的栅极的晶体管Q3，晶体管Q3的基极的电压根据在电流检测电阻21的两端发生的电压而变化，晶体管Q3调整功率开关元件Q2的栅极的电压来进行恒定电流动作，并且电容器28连接到晶体管Q3的基极和集电极之间。