Data acquisition system-in-package

This disclosure describes techniques to perform analog signal conditioning (including filtering and amplification) and analog-to-digital conversion (ADC) on a System-in-package (SIP) assembly technology. In particular, the disclosure combines a programmable gain amplifier (PGA), one or more filter circuits, and an ADC circuit onto the same SIP. These devices are coupled together on the SIP using high-accuracy and precise integrated-passive components. The SIP receives an analog signal, amplifies the analog signal with the PGA on the SIP, filters the amplified analog signal with the filter circuit(s) on the SIP, and then performs analog-to-digital conversion on the filtered amplified analog signal with the ADC circuit on the SIP, The SIP can be configured for various applications based on a variety of inputs and control mechanisms.

Two-hop wireless network communication

A system and method for providing multiple modes of communication in wireless networks includes a network manager and a plurality of network nodes. The plurality of network nodes form a wireless network with the network manager and are configured to communicate data to the network manager using respective communication links having a first bandwidth. The plurality of network nodes are further configured to transition to a two-hop mode of communication upon one or more failures in communication to the network manager. While in the two-hop mode of communication, a respective network node of the plurality of nodes is configured to transmit node data to at least one other network node over a communication link having a second bandwidth different than the first bandwidth. The other network nodes are configured to listen for communication from the respective network node and re-transmit to the network manager the node data received from the respective network node.

Interleaving method for analog to digital converters

An electronic circuit comprises multiple analog-to-digital converter (ADC) circuits and control logic circuitry. The control logic circuitry advances the multiple ADC circuits through multiple time-interleaved conversions that include time-interleaved acquisition phases, conversion phases, and tracking phases. An acquisition phase of a first ADC circuit samples the analog signal, a conversion phase of the first ADC circuit converts the sampled analog signal to a digital value, and the control logic circuitry is configured to update the first ADC circuit with most recent A/D conversion information by a different ADC circuit during a tracking phase of the first ADC circuit before the acquisition phase of the first ADC circuit.

Pipelining and parallelism for implementing a mixture model

One factor in limiting the speed of conventional implementations of mixture models is that the algorithm involves many decisions where different operations are fetched and performed depending on the outcome of the decisions. These decisions cause flushing of the pipeline, and thus prevent the realization of a highly parallel pipeline in a processor. Without parallelism, the throughput of the pipeline in the processor, i.e., the ability to process many samples of the digital input at a time, is limited. To alleviate this issue, implementation of the mixture model is reformulated, among other things, by embedding decisions into the process flow as multiplicative factors. The resulting implementation alleviates the need to use if-else statements for the decisions and reduces the number of times the pipeline has to be flushed. The implementation enables a pipeline with a higher degree of parallelism and thereby increases throughput and speed of the implementation.

Techniques for magnetic field direction based position sensor

Techniques for sensing position using a magnetic field direction sensor are provided. In an example, a system can include a magnet, a first magnetic field direction sensor, positioned between the magnet and a magnetic feature of a first structure, the sensor configured to move with the magnet and to measure a direction of a magnetic field produced by the magnet relative to a first axis (x). In certain examples, the magnetic feature is configured change position with respect to the magnetic sensor along the first axis (x) as a relative position between the magnet and the magnetic feature changes with respect to a second axis (y).

Background timing skew error measurement for RF DAC

Digital to analog conversion generates an analog output corresponding to a digital input by controlling unit elements or cells using data bits of the digital input. The unit elements or cells individually make a contribution to the analog output. Due to process, voltage, and temperature variations, the unit elements or cells may have mismatches. The mismatches can degrade the quality of the analog output. To extract the mismatches, a transparent dither can be used. The mismatches can be extracted by observing the analog output, and performing a cross-correlation of the observed output with the dither. Once extracted, the unit elements or cells can be adjusted accordingly to reduce the mismatches.

Single local oscillator in a multi-band frequency division duplex transceiver

Embodiments of the present disclosure relate to multi-band FDD transceivers. An example transceiver includes a LO, configured to generate a LO signal to be shared between a receiver and a transmitter of the transceiver. Both the receiver and the transmitter use quadrature signal processing and are configured to multi-band operation. Sharing a single LO to perform frequency conversion of different frequency bands of received and transmitted signals advantageously allows reducing the number of LOs used in a multi-band FDD transceiver.

Zero-voltage switching hybrid switched-capacitor converter

A voltage converter circuit comprises a charge pump circuit, a switching converter circuit, and a control circuit. The charge pump circuit includes multiple switch circuits connected in series. The switching converter circuit includes a first inductor coupled to an output node of the voltage converter circuit, and a second inductor coupled to a series connection of the multiple switch circuits. The control circuit is configured to control activation of the multiple switch circuits to generate a regulated voltage at the output node, and to activate each of the multiple switch circuits when a drain to source voltage of the switch circuit is zero volts.

Continuous-time sampler circuits

A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal waveform within the propagation delays. Controlling the switches corresponding to the output taps with pulses that match the propagation delays can yield a same input signal value at the output. The continuous-time sampler effectively “holds” or provides the input signal value at the output for further processing without requiring switched-capacitor circuits that sample the input signal value onto some capacitor. In some cases, the continuous-time sampler can be a recursively-connected delay line. The continuous-time sampler can be used as the front end sampler in a variety of analog-to-digital converters ...

Amplifier configurable into multiple modes

This disclosure describes techniques for selecting one of a plurality of modes in which to operate an amplifier. The techniques include configuring input routing circuitry, coupled to first and second inputs of the amplifier, based on the selected one of the plurality of modes; selectively applying a resistance to an output of the amplifier, using feedback routing circuitry, based on the selected one of the plurality of modes; and selectively applying one of a plurality of reference voltages, using reference voltage routing circuitry, coupled to the first and the second inputs of the amplifier, based on the selected one of the plurality of modes.

Soft transition techniques for H-bridge converter

Techniques for starting up and shutting down a H-bridge are provided. In an example, a method can include ramping an internal reference voltage of the H-bridge between a first level and a second level during a first interval, controlling an output voltage of each of a first half-bridge of the H-bridge and a second half-bridge of the H-bridge independently during the first interval based on the reference voltage, and controlling the first half-bridge and second half-bridge as a full H-bridge during a second timed interval.

Oscillator temperature compensation techniques

Techniques for compensating temperature-dependent aspects of oscillator circuits are provided. In an example, an oscillator circuit can include an oscillator capacitor, a comparator and overshoot compensation circuitry for providing an oscillation period insensitive to a temperature-dependent comparator overshoot. The oscillator capacitor can be charged during a charging portion of the oscillation period and can be discharged during a discharging portion of the oscillation period. The comparator can determine when the oscillator capacitor has been charged to a first threshold. The overshoot compensation circuitry can store an indication of temperature-dependent comparator overshoot and, in response, generate and apply an adjustable reference voltage or pre-charge to a terminal of the oscillator capacitor.

Multiple-phase switched-capacitor-inductor boost converter techniques

Techniques for multiple-phase, high-boost converters are provided. In an example, a multiple-phase switched-capacitor-inductor (MPSCI) boost converter can include a first phase circuit, a second phase circuit, and a capacitor. Each of the first phase circuit and the second phase circuit can include a first switch, an inductor having a first node coupled to a first supply rail, and a second switch configured to selectively couple a second node of the inductor to a second supply rail. The capacitor can be coupled between the second node of the inductor of the second phase circuit and the first switch of the second phase circuit.

ADC output drift correction techniques

Techniques are described that can be used to extract an offset and a gain of a signal chain, which can be used for digital correction of an analog-to-digital converter (ADC) output to help achieve a life time and temperature stable ADC output. For example, using various techniques, a value for a voltage reference VREF and a value for ground (GND) (or other reference voltage) can be converted, which can then be used to determine gain and offset, respectively, of the signal chain.

Apparatus and methods for system clock compensation

Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation.

High power radio frequency switches with low leakage current and low insertion loss

High power radio frequency (RF) switches with low leakage current and low insertion loss are provided. In one embodiment, an RF switch includes a plurality of transistors and is configured to selectively connect one of a transmit path or a receive path to an antenna. All of the transistors are configured to be in an on state when the RF switch operates in a high power mode and all of the transistors are configured to be in an off state when the RF switch operates in a low power mode.

Einrichtung zum Erreichen einer schnellen Fehlerdetektion in Leistungshalbleitervorrichtungen

Fehlerdetektionsschaltkreis für einen Leistungstransistor, wobei der Fehlerdetektionsschaltkreis Folgendes aufweist:einen Erfassungseingangsanschluss, der zum Detektieren einer Kollektor-Emitter-Spannung des Leistungstransistors ausgebildet ist;einen Gate-Erfassungsanschluss, der zum Detektieren einer Gate-Spannung des Leistungstransistors ausgebildet ist;einen Schutzkomparator mit einem Komparatoreingang und einem Komparatorausgang;einen Schalter, der zwischen dem Erfassungseingangsanschluss und dem Komparatoreingang gekoppelt ist, wobei der Schalter so steuerbar ist, dass er offen ist, wenn der Leistungstransistor von einem Aus-Zustand in einen Ein-Zustand übergeht, bis die Gate-Spannung eine vorbestimmte Schwelle durchquert, wobeider Fehlerdetektionsschaltkreis zum Erzeugen eines Ausgabesignals an dem Komparatorausgang, das einen Fehler angibt, basierend auf der gemessenen Kollektor-Emitter-Spannung ausgebildet ist.

Bandgap voltage reference, and a precision voltage source including such a bandgap voltage reference

A technique for improving the stability of a voltage reference is provided. The implementation of technique is simple and elegant and does not involve a noise penalty. A compensation resistor is provided on one end of a string of resistors used to set a ΔVBE in a PTAT cell and to set a gain applied to the PTAT cell voltage.

Synchronizing hiccup over-current protection of multiphase switching converters

A multiphase switching converter includes a first switching converter circuit including a power stage coupled to a DC voltage supply and a controller. The controller includes an over-current (OC) circuit that can detect an OC event and, upon detecting the OC event, set a command signal to a preset low value and provide a first hiccup signal. A synchronization circuit can generate a second hiccup signal based on the command signal of the OC circuit satisfying a first reference threshold value, and a sampled portion of an output voltage of the power stage satisfying a second reference threshold value. A hiccup timer can be triggered by one of the first hiccup signal or the second hiccup signal to start a hiccup pulse in response to being triggered.

High current nanosecond laser driver circuit with wide pulse-width adjustment range

A resonant H-bridge laser driver circuit topology is described that can achieve high current levels at narrow pulse widths while using smaller transistor sizes. The resonant H-bridge topology can utilize parasitic inductors in conjunction with an external capacitor to create a resonant circuit in parallel with the load.

Switching scheme for low offset switched-capacitor integrators

A switched-capacitor integrator is described having the contribution to offset from the charge injection mismatch of switches connected to the summing nodes mitigated by using a switching scheme that conveys basically all the charge injection to the output, thus preventing net offset from being integrated.

FUNKENSTRECKENSTRUKTUREN ZUR DETEKTION VON UND ZUM SCHUTZ VOR ELEKTRISCHEN ÜBERLASTEREIGNISSEN

Die offenbarte Technologie betrifft allgemein Elektrische-Überlast-Schutzvorrichtungen und insbesondere Elektrische-Überlast-Überwachungsvorrichtungen zum Detektieren elektrischer Überlastereignisse in Halbleitervorrichtungen. Bei einem Aspekt weist eine Elektrische-Überlast-Überwachungs- und/oder -Schutzvorrichtung zwei unterschiedliche leitfähige Strukturen, die zur elektrischen Lichtbogenbildung als Reaktion auf ein EOS-Ereignis ausgebildet sind, und einen Erfassungsschaltkreis auf, der zum Detektieren einer Änderung einer physikalischen Eigenschaft der zwei leitfähigen Strukturen ausgebildet ist, die durch das EOS-Ereignis verursacht wird. Die zwei leitfähigen Strukturen weisen einander zugewandte Oberflächen auf, die unterschiedliche Formen haben.

Magnetsperre für Stromversorgungsmodul

Elektronische Schaltungsanordnung mit einer Magnetfeldisolierung zwischen kaskadierten Reguliererschaltungsblöcken, wobei die elektronische Schaltungsanordnung Folgendes aufweist:eine Schaltreguliererschaltung, die einen ersten integrierten Schaltungsbaustein aufweist;eine Linearreguliererschaltung, die mit einem Ausgang der Schaltreguliererschaltung gekoppelt ist, wobei die Linearreguliererschaltung einen zweiten integrierten Schaltungsbaustein aufweist; undeine Magnetsperre, die zwischen dem ersten und dem zweiten integrierten Schaltungsbaustein angeordnet ist, wobei die Magnetsperre ein magnetisch permeables Material aufweist, um magnetischen Fluss aus der Kopplung zwischen der Schaltreguliererschaltung und der Linearreguliererschaltung zu unterdrücken oder zu hemmen.

Time-efficient offset cancellation for multi-stage converters

Techniques to reduce the on-time of a multi-stage ADC circuit by combining the settling time of a signal conditioning circuit, e.g., buffer circuit, and the setting time of a residue amplifier when cancelling the offset of the signal conditioning circuit. The techniques can allow the signal conditioning circuit and the residue amplifier to settle together.

Segmentierte Leistungsverstärkeranordnung mit adaptiven Vorwärts-Bias-Schaltungen

Leistungsverstärker(PA)-Anordnung, die Folgendes aufweist:ein erstes PA-Segment, das einen ersten PA und eine erste adaptive Bias-Schaltung, die dazu ausgebildet ist, ein erstes Bias-Signal für den ersten PA zu erzeugen, aufweist, wobei das erste Bias-Signal eine erste DC-Komponente, wenigstens eine erste Ton-Komponente und wenigstens eine Oberschwingung der wenigstens einen ersten Ton-Komponente aufweist;ein zweites PA-Segment, das einen zweiten PA und eine zweite adaptive Bias-Schaltung, die dazu ausgebildet ist, ein zweites Bias-Signal für den zweiten PA zu erzeugen, aufweist, wobei das zweite Bias-Signal eine zweite DC-Komponente, wenigstens eine zweite Ton-Komponente und wenigstens eine Oberschwingung der wenigstens einen zweiten Ton-Komponente aufweist, wobei eine Amplitude der wenigstens einen Oberschwingung der wenigstens einen ersten Ton-Komponente kleiner ist als eine Amplitude der wenigstens einen Oberschwingung der wenigstens einen zweiten Ton-Komponente; undeine Leistungsaufteilungsschaltung ...

Current measurement

Current measurement apparatus comprises a measurement arrangement and a signal source. The measurement arrangement is configured to measure a current signal drawn by a load. The signal source is operative to apply a reference input signal to the measurement arrangement whereby an output signal from the measurement arrangement comprises a load output signal corresponding to the load drawn current signal and a reference output signal corresponding to the reference input signal. The signal source comprises a current multiplier which defines first and second current paths and is configured such that: the first path carries a multiplier input current signal; the second path carries a multiplier output current signal which determines the reference input signal and which corresponds to the multiplier input current signal multiplied by a multiplier value determined by the current multiplier; and the multiplier input current signal and the multiplier output current signal are carried on their respective ...

Contactor with integrated memory

There is disclosed herein a contactor for production testing of an electrical product, where the contactor includes an integrated circuit with memory. The integrated circuit may store information related to the contactor in the memory that may be useful for the production testing. For example, the memory may store information that that can be used for identifying the contactor and/or determining whether maintenance of the contactor should be performed to achieve proper results of the production testing.

Signal conditioning circuit and a relay/circuit breaker control apparatus including such a signal conditioning circuit

There is a need to monitor and control the state of relays and circuit breakers within power distribution systems. The monitoring of a relay state, i.e. open or closed, is often performed by applying a monitoring signal to sensing contacts added to the relay. Manufactures of such systems have chosen many different voltages for their own monitoring systems making it difficult to interconnect dissimilar monitoring systems. A signal conditioning circuit is provided that can cope with a large input voltage range and can be configured to allow may items of equipment (which may be new item or legacy items) to be connected to a controller.

ELEKTRISCHER ÜBERLASTUNGSSCHUTZ MIT NIEDRIGEM LECKSTROM FÜR HOCHSPANNUNGSTOLERANTE HOCHGESCHWINDIGKEITSSCHNITTSTELLEN

Ein hochspannungstoleranter elektrischer Überlastungsschutz mit niedrigem Leckstrom und niedriger Kapazität wird bereitgestellt. In einer Ausführungsform umfasst ein Halbleiter-Die eine Signalkontaktfläche, eine interne Schaltung, die elektrisch mit der Signalkontaktfläche verbunden ist, eine Leistungsklemme, die elektrisch mit einem getrennten Knoten verbunden ist, und eine oder mehrere Trennsperrspannungsvorrichtungen, die elektrisch zwischen die Signalkontaktfläche und den getrennten Knoten geschaltet sind. Die eine oder mehreren Trennsperrspannungsvorrichtungen sind betriebswirksam, die Signalkontaktfläche von einer Kapazität der Leistungsklemme zu trennen. In einer weiteren Ausführungsform umfasst ein Halbleiter-Die eine Signalkontaktfläche, eine Massekontaktfläche, eine interne Hochspannungs-/Hochgeschwindigkeitsschaltung, die elektrisch mit der Signalkontaktfläche verbunden ist, und einen ersten Thyristor und einen zweiten Thyristor zwischen der Signalkontaktfläche und der Massekontaktfläche ...

Circuits and methods to reduce distortion in an amplifier

A device to reduce distortion in an amplifier includes an input transistor configured to generate a voltage based on an input signal. The device further includes a diode connected transistor that is configured to sink the current. The diode connected transistor includes an output terminal, and a control terminal, where the output terminal is coupled to a control terminal. The device further includes a current source circuit that coupled to the control terminal. The device additionally includes an impedance element that coupled to the output terminal at a first node and to the control terminal and the current source circuit at a second node.

Video line inversion for reducing impact of periodic interference signals on analog video transmission

Disclosed herein are systems and methods that use video line inversion for reducing impact of periodic interference signals on analog transmission of video signals over wired links/connections. In one aspect of the present disclosure, in certain circumstances, a transmitter may be configured to perform video line inversion on a certain subset of video lines of a video signal prior to transmitting the video signal to the receiver, and a receiver may be configured to perform a corresponding inversion for the same subset of video lines of the video signal received at the receiver. Such video line inversion performed by the transmitter and the receiver may advantageously allow reducing or eliminating the impact of periodic interference signals that might affect the video signal during transmission, resulting in an improved quality of the video rendered at the receiver side.

Correcting for a gain error resulting from the position of a pole of zero in a transfer function of a system

The response of a Rogowski coil based current measuring circuit is often proportional to frequency. To correct for this a low pass or integrating function is applied to the response to linearize it. The low pass filter is made from real resistors and capacitors, and tolerances in their values significantly affect the estimate of current. This disclosure relates to a way of addressing such problems. This allows consumers of electricity to have confidence in the accuracy of, for example, their electricity meter.

Dead-time supply voltage compensation

Techniques are provided for providing and maintaining an efficient deadtime for a switching circuit as the input voltage varies. In example, a switching circuit can include a control circuit configured to alternately switch the first switch and the second switch into and out of a low impedance state, and to prevent the first switch and the second switch from shorting the first supply rail with the second supply rail using a dead-time before a transition to the low impedance state of each of the first and second switches. The control circuit can a delay element that includes a compensation delay circuit configured to change in-kind with a change of a voltage difference between a first input supply rail and a second input supply rail of the switching circuit, and to limit a range of the dead-time over a range of the voltage difference.

ADC input circuit sensing for fault detection

A fault detection scheme can include use of a relatively high injection impedance between an input port for analog measurements from a sensor and a stimulus generation circuit controlled in coordination with analog measurement. The stimulus generation circuit can provide a stimulus signal through the injection impedance. A magnitude of the injection impedance can be specified relative to a source impedance associated with a source (e.g., a sensor or other device) coupled to the input port. For example, a magnitude of the injection impedance can be specified to be larger than the source impedance or the injection impedance magnitude can be specified to be a multiple of the source impedance.

Multisensorvorrichtung zur Gesundheitsüberwachung

Vorrichtung zum Erfassen von Messungen, die sich auf eine Gesundheit eines Patienten beziehen, aufweisend:einen Rahmen, der auf einer Haut des Patienten zu tragen ist, wobei der Rahmen einen Hauptkörper, eine erste Verlängerung, die an ein erstes Ende des Hauptkörpers gekoppelt ist, und eine zweite Verlängerung, die an ein zweites Ende des Hauptkörpers gekoppelt ist, aufweist, wobei die erste Verlängerung und die zweite Verlängerung eine Lunge des Patienten überspannen;eine erste Elektrode, die an der ersten Verlängerung befestigt ist, wobei die erste Elektrode ein elektrisches Potenzial an den Patienten anlegen soll;eine zweite Elektrode, die an der zweiten Verlängerung befestigt ist, wobei die zweite Elektrode eine durch das angelegte elektrische Potenzial verursachte Störung detektieren soll; undeinen Schallsensor, der an der ersten Verlängerung oder der zweiten Verlängerung befestigt ist, wobei der Schallsensor Herztöne des Patienten detektieren soll.

Integrated and distributed over temperature protection for power management switches

A plurality of lower voltage metal oxide semiconductor sensors are integrated and distributed in various parts of a power MOSFET to provide over temperature protection. The sensors are sensitive to temperatures of the various parts of the power MOSFET and configured to regulate the power MOSFET when a trip temperature is reached by reducing the operation of the MOSFET. A bias network is configured to set the trip temperature. In some configurations, a threshold voltage is used to monitor and control the maximum temperature.

Transistor based PUF apparatus

The present disclosure relates to a PUF apparatus and method for generating a persistent, random number. The generated number is random in that each particular instance of PUF apparatus should generate a randomly different number to all other instances of PUF apparatus, and is persistent in that each particular instance of the PUF apparatus should repeatedly generate the same number, within acceptable error correction tolerances. The persistent, random number is determined by selecting one or more PUF cells, each comprising a matched pair of transistors that are of identical design, and comparing an on-state characteristic of the pair (e.g., turn-on threshold voltage or gate-source voltage). The difference in on-state characteristic of each selected pair of transistors is caused by random manufacturing differences between the transistors. This causes the randomness between each different instance of PUF apparatus, and should be relatively stable over time to provide persistence of the generated ...

Communication receiver interface for current loop circuit

Techniques are provided for an integrated circuit, current loop interface that can receive and extract a high-frequency digital communication signal from a low-frequency analog current signal using a complex impedance circuit. The complex impedance circuit can allow for low input impedance at the lower frequencies of the analog current signal and high input impedance at the higher frequencies of the digital communication signal.

Managing the determination of a transfer function of a measurement sensor

The present disclosure relates to generating a measurement sensor profiling summary in relation to a measurement sensor of an electrical measurement system, the measurement sensor being suitable for measuring an electrical property. The profiling summary is generated by obtaining a plurality of profiling results each comprising an estimate of a transfer function of a measurement sensor of the electrical measurement system and a corresponding certainty value indicative of the accuracy of the estimate of the transfer function, wherein the plurality of profiling results are based on estimates of the transfer function of the measurement sensor and corresponding certainty values that were determined by a monitor module of the electrical measurement system during a profiling period of time; and generating a profiling summary based on at least one of the plurality of profiling results.

Leistungsschalteranordnung

Leistungsvorrichtung, die Folgendes aufweist:eine Hauptanordnung aus Transistorzellen, die dazu eingerichtet sind, als ein Leistungsschalter zu arbeiten, wobei die Transistorzellen Steuerknoten aufweisen, die parallel verbunden sind, um ein gemeinsames Steuersignal an die Transistorzellen zu empfangen; undeine Sensoranordnung aus Sensortransistorzellen, die dazu eingerichtet sind, einen oder mehrere Parameter der Hauptanordnung zu messen, wobei die Sensortransistorzellen Sensorsteuerknoten aufweisen, die parallel verbunden sind, um ein gemeinsames Sensorsteuersignal an die Sensortransistorzellen zu empfangen, wobei die Sensorsteuerknoten von den Steuerknoten der Hauptanordnung getrennt sind, wobei die Sensortransistorzellen einen gemeinsamen Transistoranschluss zu den Sensortransistorzellen aufweisen, der mit einem gemeinsamen Transistoranschluss der Transistorzellen der Hauptanordnung geteilt wird, wobei die Transistorzellen der Hauptanordnung und die Sensortransistorzellen der Sensoranordnung ...

Sensor bias circuit for improved noise performance

Techniques for improving noise performance while processing signals received from an electrochemical sensor are provided. In an example, an interface circuit can include a first amplifier configured to provide a voltage to a counter electrode of an electrochemical sensor, a second amplifier configured to receive sensor information from a working electrode of the electrochemical sensor and to provide concentration information using the sensor information. In certain examples, an input of the first amplifier can be directly coupled to an input of the second amplifier to attenuate noise, of either the first amplifier or the second amplifier, within the concentration information provided by the second amplifier.

DC arc detection and photovoltaic plant profiling system

An arc detection method includes classifying whether an arc fault is present in the power system by, for each of a plurality of bins of a current frame of a signal, marking the bin as a candidate bin if a magnitude spectrum of the bin meets first criteria; determining a number of candidate bins in the current frame; marking the number of candidate bins as candidate cluster bins if the number of candidate bins exceeds a minimum cluster size; for each of the candidate cluster bins, determining whether the candidate cluster bin is also a candidate cluster bin of a previous frame of the first signal and if so, identifying the current frame as a candidate frame and incrementing a candidate frame count; and if the candidate frame count exceeds a candidate frame count threshold, determining that an arc fault is present in the power system.

Large input current detection and fast response optical receiver

A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.

Diagnostic waveform generator for a sensor

Techniques for generating a diagnostic waveform for a sensor are provided. In an example, a control circuit for an electrochemical sensor can include power supply inputs configured to receive a supply voltage, a first signal generator configured to receive control information and to generate a first signal on a first output using the supply voltage and the control information, a second signal generator configured to receive the control information and to provide a second signal on a second output, using the supply voltage and the control information. An output voltage between the first output and the second output, in a diagnostic mode of operation of the control circuit, can include a periodic signal having a peak-to-peak voltage greater than the supply voltage.

Anpassen einer Phase einer Phasenregelschleife

Frequenzsynthesesystem, aufweisend:eine erste digitale Phasenregelschleife, die dafür ausgebildet ist, ein erstes Taktsignal auszugeben; undeine zweite digitale Phasenregelschleife, die dafür ausgebildet ist, ein zweites Taktsignal mit im Wesentlichen der gleichen Frequenz wie das erste Taktsignal auszugeben; undeine Phasenanpassungsschaltung, die dafür ausgebildet ist, eine relative Phasendifferenz zwischen dem ersten Taktsignal und dem zweiten Taktsignal zu messen und eine Angabe der relativen Phasendifferenz auszugeben, wobei die Phasenanpassungsschaltung dafür ausgebildet ist, die relative Phasendifferenz zwischen dem ersten Taktsignal und dem zweiten Taktsignal auf Grundlage zu messen von:einem ersten Signal von einem ersten Zeit-Digital-Wandler in einem Rückführungspfad der ersten digitalen Phasenregelschleife und eines zweiten Signals von einem zweiten Zeit-Digital-Wandler in einem Rückführungspfad der zweiten digitalen Phasenregelschleife; odereiner Ausgabe eines ersten Akkumulators ...

Passive intermodulation reduction with frequency shifting

A system for reducing or eliminating PIM interference in an RX signal is disclosed. The system is configured to use RX and TX signals to generate a frequency-shifted output that includes a RX carrier signal component of the RX signal, as well as first and second TX carrier signal components of the TX signal, positioned in a frequency spectrum so that a frequency spacing between the first and the second TX carrier signal components and a frequency spacing between the RX carrier signal component and a closest one of the first and the TX second carrier signal components is smaller than a frequency spacing between the first and the second TX carrier signal components in the TX signal. The system may then use the frequency-shifted output to generate an estimate of a PIM signal component in the RX signal.

Digital modulation scheme for data transfer

Various examples are directed to isolated analog-to-digital converter (ADC) circuits comprising a first side that is separated from a second side by an isolator. A first ADC positioned on the first side may be configured to convert a first analog input signal to a first side multi-bit digital signal. A digital modulator on the first side may be configured to convert the first side multi-bit digital signal to a first single-bit stream. A first filter positioned on the second side may be configured to receive the first single-bit stream across the first isolator and to generate a first reconstructed multi-bit digital signal using the first single-bit stream.

Datenkonvertersystem mit verbesserter Leistungsversorgungsgenauigkeit und -sequenzierung

Leistungsversorgungsschaltkreis mit:einem Spannungsreglerschaltkreis, der zum Ausgeben einer geregelten Ausgangsspannung ausgebildet ist, wobei der Spannungsreglerschaltkreis zum Verwenden einer Referenzspannung außer einem Massepotential als seine Referenz ausgebildet ist.

Polyphase filter (PPF) including RC-LR sections

Polyphase filters (PPFs) can be used to generate quadrature or other phase-shifted representations of an input signal provided to the PPF. In one approach, a “passive” polyphase filter can include a combination of resistive and capacitive elements. Such a topology can be referred to as an RC-PPF topology. Another passive circuit topology can be used to provide a PPF, by replacing the resistive elements with inductive elements, and by replacing the capacitive elements with resistive elements. A filter circuit can include cascaded RC-PPF and LR-PPF sections, such as in an alternating manner (e.g., an “RC-LR” topology). In this approach, a total insertion loss of cascaded LR-PPF and RC-PPF sections can be reduced as compared to using LR-PPF or RC-PPF sections, alone.

Systems and methods for transferring power across an isolation barrier using an active resonator

Systems and methods for transferring power across an isolation barrier using an active self-synchronized resonator are described. A resonator may use the isolation barrier to resonate with active devices arranged on both sides of the barrier, to provide DC to DC power conversion with high efficiency. Furthermore, by using a microfabricated transformer or microfabricated capacitor as an isolator, the entire resonator may be microfabricated and implemented on chip. The resonator is also bidirectional, allowing power transfer in either direction across the isolation barrier.

Three-phase power meter monitoring for star and delta configurations

A three-phase power meter can monitor power on both 3-wire and 4-wire power lines. The power meter measures at least two voltages between phase conductors of the power line, and at least one voltage between a phase conductor and a neutral conductor of the power line when the neutral conductor is available. Using at least some of the measured voltages, the power meter can then operate in a first mode when coupled to a 3-wire power line to determine power on the power line based on the measured voltages, or operate in a second mode when coupled to a 4-wire power line to determine power on the power line based on the measured voltages.

Low-complexity voice activity detection

Many processes for audio signal processing can benefit from voice activity detection, which aims to detect the presence of speech as opposed to silence or noise. The present disclosure describes, among other things, leveraging energy-based features of voice and insights on first and second formant frequencies of vowels to provide a low-complexity and low-power voice activity detector. A pair of two channels is provided whereby each channel is configured to detect voice activity in respective frequency bands of interest. Simultaneous activity detected in both channels can be a sufficient condition for determining that voice is present. More channels or pairs of channels can be used to detect different types of voices to improve detection and/or to detect voices present in different audio streams.

Systems and methods for analog finite impulse response filters

Systems and methods for analog finite impulse response (FIR) filters are provided. In certain embodiments, a receiver includes a cascade of a mixer, an analog FIR filter, and an analog-to-digital converter (ADC). By including the analog FIR filter along the signal path between the mixer and the ADC, design constraints of the ADC are relaxed. For example, the ADC can operate with relaxed specifications with respect to resolution and/or dynamic range when the analog FIR filter is included. The analog FIR filter can include a controllable transconductance circuit that delivers an integration current to a capacitor over an integration period, with the analog FIR filter's coefficients used to change the transconductance setting of the controllable transconductance circuit to different values over the integration period.

Background duty cycle error measurement for RF DAC

Digital to analog conversion generates an analog output corresponding to a digital input by controlling unit elements or cells using data bits of the digital input. The unit elements or cells individually make a contribution to the analog output. Due to process, voltage, and temperature variations, the unit elements or cells may have mismatches and/or errors. The mismatches and/or errors can degrade the quality of the analog output. To extract the mismatches and/or errors, a transparent dither can be used. The mismatches and/or errors can be extracted by observing the analog output, and performing a cross-correlation of the observed output with a switching bit stream of the dither. Once extracted, the unit elements or cells can be adjusted accordingly to reduce the respective mismatches and/or errors.

Coulomb counter with offset calibration

This disclosure describes techniques for compensating for amplifier drift. An amplifier is configured to generate an output that triggers a charge counter to generate a charge count value based on a charge count signal. A current digital-to-analog converter (IDAC) is coupled to the amplifier and configured to provide an offset current to a first input of the amplifier. An offset correction circuit is configured to: determine whether a duty cycle associated with the amplifier exceeds a specified threshold and generate a signal to cause the MAC to adjust the value of the offset current to compensate for amplifier drift based on determining whether the duty cycle exceeds the specified threshold.

High conversion-ratio hybrid switched power converter

A voltage converter circuit comprises a charge pump circuit, a pulse width modulation (PWM) filter stage circuit, and a control circuit. The charge pump circuit includes multiple switching transistors arranged as a switching bridge including a first bridge portion connected to a second bridge portion; a midpoint capacitor connected to a circuit node coupling the first bridge portion and the second bridge portion; and a first flying capacitor coupled to the first bridge portion and the second bridge portion. The PWM filter stage circuit is coupled to the charge pump circuit and a first input/output terminal and includes a first inductor coupled to the first flying capacitor and the second bridge portion of the switching bridge. The control circuit is configured to control activation of switching transistors of the switching bridge to generate a regulated voltage at the first input/output terminal.

Digital mobile radio with enhanced transceiver

Apparatuses and methods related to digital mobile radio (DMR) with enhanced transceiver are disclosed herein. The transceiver detects waveforms of signals received by a digital mobile station radio (MS). By detecting whether the waveforms of the signals, the transceiver allows a digital baseband processor of the MS to remain in a sleep state while the signals are being detected by the DMR, thereby reducing an amount of power used while the signals are being detected.

Radio frequency switches with controllable resonant frequency

Radio frequency (RF) switches with controllable resonant frequency are provided herein. In certain embodiments, an RF switch includes a stack of two or more field-effect transistors (FETs) electrically connected between a first terminal and a second terminal. Additionally, the RF switch further includes an inductor connected between the first terminal and the second terminal and in parallel with the stack of FETs. A first portion of the FETs are controlled to turn on or off the RF switch. Additionally, a second portion of the FETs are controlled to provide tuning to a resonant frequency of the RF switch when the RF switch is turned off.

SiC gate drive control with trench FETs from high dV\dT at drain source

A switching circuit can help reduce electrical feedback ringing at a gate terminal of a transistor. The switching circuit can include a transistor circuit to switch an electrical signal and a control circuit to provide an actuation signal to the gate terminal of the transistor device. The switching circuit can also include a booster circuit that is disposed between the control circuit and the gate terminal of the transistor device. The booster circuit can be configured to detect a signal from the control circuit to turn off the transistor device and, responsive to the detected signal, drive a current into the gate terminal of the transistor device for a specified span of time before the transistor device turns off.

Vorrichtungen und Verfahren für eine Kaskodenverstärkertopologie für Millimeterwellenleistungsanwendung

Vorrichtung, aufweisend:einen Verstärker, aufweisend:eine erste Schaltung, wobei die erste Schaltung so ausgebildet ist, dass sie ein Eingangssignal empfängt, wobei die erste Schaltung eine Neutralisierung einer parasitären Gate-Drain-Kapazität aufweist;eine zweite Schaltung, wobei die zweite Schaltung so ausgebildet ist, dass sie ein verstärktes Signal erzeugt, wobei die erste Schaltung und die zweite Schaltung zusammen eine Kaskodenschaltung bilden;einen ersten Knoten zwischen der ersten Schaltung und der zweiten Schaltung; undwobei die zweite Schaltung mindestens einen ersten Kondensator mit einer Kapazitätsgröße aufweist, die derart auf einen beabsichtigten Betriebsbereich des Verstärkers zugeschnitten ist, dass der erste Kondensator so ausgebildet ist, dass er mit einer ersten parasitären Kapazität zwischen dem ersten Knoten und einer AC-Masse in Resonanz ist, um die erste parasitäre Kapazität im Wesentlichen aufzuheben.

Electrostatic shield and shielded current sensing device assembly

Techniques for input formatting and coefficient selection for sample rate converter in parallel implementation scheme

A sample rate converter (“SRC”) for implementing a rate conversion L/M is described wherein data is input to the SRC at an input rate (“Fin”) and output from the SRC at an output rate (“Fout”) equal to Fin*L/M. The SRC includes a low pass filter (“LPF”) including P multiply-add instances, wherein P is a parallelization factor of the SRC; an input formatter for arranging samples received at the SRC in accordance with the rate conversion L/M and providing P*Tpp input samples to the filter at a given time, wherein Tpp is a number of taps per phase of the LPF; and a coefficient bank for storing a plurality of coefficients and for providing P*Tpp of the coefficients to the LPF at a given time.

Multi-channel communication using timeslots

A system and method for increasing capacity and throughput in a wireless network includes a plurality of wireless nodes configured to communicate wirelessly with one another on respective frequency channels according to a schedule. The schedule includes timeslots. For respective timeslots, first and second transmitting wireless nodes generate transmissions for a receiving wireless node. The receiving wireless node includes a receiver circuit configured to receive the transmissions from the first and the second transmitting wireless nodes simultaneously and on separate frequency channels, and a transmitter circuit configured to generate acknowledgment packets for the first and the second transmitting wireless nodes upon receipt of the transmissions by the receiving wireless node.

Künstliche Übertragungsleitung unter Verwendung von T-Spulen-Abschnitten

Elektronische Schaltung, welche eine künstliche Übertragungsleitungsstruktur definiert, umfassend zumindest zwei Einheitszellen, wobei eine jeweilige Einheitszelle unter den zumindest zwei Einheitszellen umfasst:einen ersten T-Spulen-Abschnitt, der definiert ist durch eine erste Induktivität, die gegenseitig magnetisch gekoppelt und leitend in Reihe geschaltet ist mit einer zweiten Induktivität, und einen ersten Shunt-Kondensator, der an einen Knoten zwischen der ersten Induktivität und der zweiten Induktivität gekoppelt ist; undeine dritte Induktivität, die leitend mit der zweiten Induktivität gekoppelt ist;wobei die dritte Induktivität so angeordnet ist, eine gegenseitige magnetische Kopplung mit der ersten Induktivität und der zweiten Induktivität zu unterdrücken oder zu verhindern.

Synchronous boost regulator circuit with pass-through operation control

In some boost converter applications, an input voltage normally exceeds a regulated output voltage. The operation of the boost converter in this condition can be referred to as a pass-through operation. Using various techniques, the efficiency of a pass-through operation of a synchronous boost regulator circuit can be greatly improved. For example, a synchronous boost regulator circuit can include an input voltage VIN to output voltage VOUT voltage comparator that can accurately monitor the output voltage to detect the pass-through operation. In a pass-through operation, the high-side switch can be kept ON to maintain high efficiency, and the quiescent current of the regulator circuit can be minimized by setting portions of the control circuit into a sleep mode.

Digital predistortion using coding for phased antenna arrays

Digital predistortion (DPD) arrangements that use coding to differentiate between contributions from individual power amplifiers (PAs) is disclosed. When used with a phased antenna array having N antenna elements and N corresponding PAs, the arrangements may sequentially apply N codes to input signals provided to N PAs. Each code is a vector having N elements, where each element corresponds to a different PA in that the element is a complex gain applied to an input signal for the PA. Together, the N codes may be arranged as N rows or N columns of a matrix P. The disclosed arrangements may generate N feedback signals by applying the matrix P to a signal generated by a probe antenna element sensing wireless RF signals transmitted by the N antenna elements, and to update DPD coefficients based on the N feedback signals. The N codes may be either orthogonal or non-orthogonal.

Fehlerkorrekturtechniken bei Bioimpedanzmessungen

Das Bestimmen der Bioimpedanz eines Körpers oder eines Abschnitts davon einer Versuchsperson ist zum Bestimmen von Gesundheitsmerkmalen (wie z. B. Herzkrankheiten) der Versuchsperson verwendet worden. Die hier beschriebenen Systeme und Prozeduren bzw. Verfahren können eine Korrektur und/oder Kompensation der Elektrodenkontaktimpedanz und ein genaues Bestimmen der Bioimpedanz bereitstellen. Das System kann die Impedanzempfindlichkeit und/oder die Frequenzempfindlichkeit beim Ausführen der Bestimmung der Bioimpedanz berücksichtigen, um die Bestimmung der Bioimpedanz zu verbessern.

SAR ADC with variable sampling capacitor

A successive approximation register analog-to-digital converter (SAR ADC) circuit comprises N weighted bit capacitors, wherein N is a positive integer greater than one; a sampling circuit configured to sample an input voltage onto the N weighted bit capacitors; and logic circuitry. The logic circuitry is configured to enable sampling of the input voltage onto the N weighted bit capacitors in a high-resolution mode; enable sampling of the input voltage onto N−M of the weighted bit capacitors in a low-resolution mode and sampling a common mode voltage onto the most significant M weighted bit capacitors, wherein M is a positive integer greater than zero and less than N; and initiate successive bit trials using the weighted bit capacitors to convert the sampled input voltage to a digital value.

Multi-stage conversion analog-to-digital converter

An ADC circuit that can resolve the most significant bits (MSBs) using a first circuit during a first stage of a multi-stage conversion and resolve the least significant bits (LSBs) using a second circuit during a second stage of the multi-stage conversion. This can be used, for example, in massively parallel applications where the reference level generation can be shared between thousands of converters.

Method of and apparatus for reducing the influence of a common mode signal on a differential signal and to systems including such an apparatus

Differential sampling circuits may be adversely affected by changes in common mode voltage. Changes in the common mode voltage may alter the on resistance of transistor switches which it turn may mean that small signal changes are not correctly observed against a bigger common mode signal. The present disclosure relates to a way of improving the ability to resolve small differential signal changes by varying the supply or drive voltage to a component to compensate for common mode voltage changes.

Overcurrent protection detector with dynamic threshold for power conversion switch

An electronic circuit comprises a power switch and a fault detection circuit. The power switch circuit includes a power switch transistor. The fault detection circuit includes a comparator circuit configured to monitor a voltage across the power switch transistor and compare the voltage to a varying threshold voltage that decreases with time, and produce an indication of a circuit fault when the voltage of the power switch transistor is greater than the time varying threshold voltage.

Disjoint security in wireless networks with multiple managers or access points

In a wireless mesh network having multiple network managers, the network managers maintain network security through the use of encryption keys and packet counters. To ensure that each network manager can authenticate communications with any node of the network, the authentication data is replicated in a disjoint manner in all network managers. Advantageously, network reliability is assured by providing redundant managers that can seamlessly maintain network operation even if multiple network managers fail; newly joining managers can obtain full authentication data for the network upon joining; and network throughput is increased by ensuring that any of the multiple managers can authenticate the communications of any network node. The disjoint replication of the authentication data across all network managers is performed with low data-rate manager-to-manager packets propagated through the network. The disjoint security methods and systems can advantageously be used in wireless battery monitoring ...

Fingerprint-on-display recognition

Systems and methods described herein relate to fingerprint-on-display recognition. In particular, the systems and methods described herein may recognize a fingerprint when a finger of a user is placed on a display and authenticate the user based on the recognized fingerprint. Further, the embodiments described herein may utilize multiple colors and/or secondary factors to reduce erroneous authentications of the user. The approaches may improve the accuracy of fingerprint authentication by using the multiple colors and/or secondary factors.

Position sensor with compensation for magnet movement and related position sensing method

The disclosure provides a magneto resistive field sensor for detecting position in a particular direction. The sensor includes a plurality of magneto resistive elements arranged in pairs. The elements of the same pair are arranged so that their sensitivity direction is oriented in the same direction. The elements of different pairs are oriented so that their sensitivity direction is oriented in a different direction, preferably substantially perpendicular to another pair. The magneto resistive sensors and their sensitivity directions are generally arranged in a plane, which is perpendicular to the direction of measurement of the device. The elements of each pair are arranged in series between two nodes so as to form a bridge circuit. As such, movement of the magnet in the first plane causes a substantially equal change in the elements of each pair, thereby compensating for this movement in the output signal.

Continuous-time residue generation analog-to-digital converter arrangements with programmable analog delay

An example residue generation arrangement for a continuous time or hybrid ADC includes a delay circuit having a cascade of analog delay sections, each section to provide a respective delay to an analog input signal, thus providing a delayed analog input signal at the output of the delay circuit. The delay circuit further includes a selector, configured to select an input or an output of one of the delay sections to provide as an input signal to a quantizer of a feedforward path. The quantizer may generate a digital input to a DAC of the feedforward path based on the output of the selector, and the DAC may generate a feedforward path analog output based on the digital signal generated by the quantizer. The arrangement further includes a summation node, configured to generate a residue signal based on the delayed analog input and the feedforward path analog output.

Multi-stage sigma-delta analog-to-digital converter with dither

Techniques to implement subtractive dither in a multi-stage ADC. Subtractive dither involves adding a first dither signal at a first node and adding a second dither signal at a second node (which can be the same as the first node), where the first and second dither signal combine and sum to approximately zero. By utilizing subtractive dither in a multi-stage ADC, the headroom requirements of a loop filter in a main loop of the ADC and the range requirements of a feedback DAC in the main loop can both be relaxed.

LLCC secondary overtone resonant power converter

An LLCC Secondary Overtone Resonant (LLCC-SOR) power converter obtains dramatically higher efficiency with light loads by providing a resonance in the transformer secondary that is approximately tuned to an odd order overtone of the upper primary switching frequency, an upper frequency limit of the primary switching frequency, and a secondary duty cycle control that engages once the upper primary switching frequency limit is reached. The transformer circuit resonates in an LLCC-SOR mode that regulates the output voltage when the maximum frequency limit is reached. In operation, the gain of the resonant circuit is raised above its regulation point under light loads, forcing the controller into duty cycle mode. The secondary current completes an odd number of oscillations per single oscillation of the primary current, and the primary current returns to near zero after each switching transition. Also, a zero-voltage switching condition is maintained on the primary switch.

Systems and methods for measuring a time of flight in a lidar system

A lidar system can be used to measure a distance to one or more objects in a target region, such as by transmitting light towards the target and then receiving light reflected or scattered from the target. Received light can be stored as charge on storage elements such as capacitors, where received light can be stored on different storage elements depending on a time of arrival of the received light. A reduction in the number of storage elements can be achieved by providing one or more groups of storage elements, where each group of storage elements can correspond to a digit of a time of flight, where the time of flight can be round trip travel time of a light beam travelling from the lidar system to the target region and then back to the lidar system. Each group of storage elements can be arranged in a binary tree of a decimal tree configuration. Additionally, a time of activation of each of the storage elements can be increased with an increasing time of flight, such as to compensate ...

Retaining cap

A cap for use with devices, such as sensors. The cap includes protrusions on its underside, to restrict the movement of a liquid or a gel placed under cap. The protrusions may take the form of walls or pillars, depending on the application. As such, the cap retains the liquid or gel in a specified position on the device. For example, an electrochemical sensor may require a liquid electrolyte to remain in place over one or more electrodes. The protrusions may not extend far enough to touch the device, but rather leave a small gap. However, because of the surface tension of the liquid, the liquid generally stays within the protrusions.

VCO-based continuous-time pipelined ADC

VCO ADCs consume relatively little power and require less area than other ADC architectures. However, when a VCO ADC is implemented by itself, the VCO ADC can have limited bandwidth and performance. To address these issues, the VCO ADC is implemented as a back end stage in a VCO-based continuous-time (CT) pipelined ADC, where the VCO-based CT pipelined ADC has a CT residue generation front end. Optionally, the VCO ADC back end has phase interpolation to improve its bandwidth. The pipelined architecture dramatically improves the performance of the VCO ADC back end, and the overall VCO-based CT pipelined ADC is simpler than a traditional continuous-time pipelined ADC.

Robust architecture for mode switching of a force and measure apparatus

A stabilization technique is disclosed that suppresses or inhibits glitching behavior on automated test equipment (ATE) during mode transitions. Adjustable stabilizing circuitry can be coupled to at least one of a force voltage circuit or a force current circuit is forcing voltage or current to a device under test (DUT). The adjustable stabilizing circuitry can be adjustably configurable in response to whether at least one of a current clamp or a voltage clamp is in an active clamping mode. In this manner, unwanted glitching behavior associated with mode changes can be reduced or suppressed.

Radar for weather detection and dynamic control and actuation of vehicle systems

Aspects of this disclosure relate to controlling one or more vehicle systems based on a determined weather condition. In some embodiments, a radar system can be mounted on a vehicle and can collect weather data by receiving electromagnetic signals. A weather condition can be determined based on the collected weather data, and a vehicle system can be controlled based on the determined weather condition, such as vehicle lighting, windscreen wipers, or cruise control. In some embodiments, weather conditions can include fog, sleet, or smog. The weather condition can be determined by analyzing scattered reflections from incident microwaves and/or radio waves to determine a level of attenuation of the scattered electromagnetic energy indicative of a presence or absence of particles. A map can be displayed displaying the weather condition and controlling vehicle navigation systems. The collected weather data can be compared with data from a LiDAR or camera system for reliability.

Slope compensation method for DC-DC converter

A voltage regulator circuit comprises a switching circuit, a dynamic clamp circuit, and a comparison circuit. The switching circuit adjusts a switching duty cycle to produce a regulated output voltage using an error signal representative of a difference between a target voltage value and the output voltage. The dynamic clamp circuit determines a maximum peak inductor current command value using the output voltage and an input voltage of the voltage regulator circuit. The comparison circuit sets a maximum peak inductor current value using the maximum peak inductor current command value and a slope compensation current, wherein the maximum peak inductor current value is constant for different values of output voltage. The comparison circuit compares a sensed inductor current to a peak inductor current value and enables switching of the voltage regulator system according to the comparison.

Crest factor reduction in cable communication systems

Otherwise incompatible crest factor reduction (CFR) and cable tilt compensation can be used together, such as in a cable television or other cable communication system having a frequency-dependent signal loss at higher frequencies. The CFR can be used to limit or reduce peaks of signals provided to a power amplifier, while additional tilt reference and tilt equalizer circuits are included to address deleterious peak regrowth effects that may otherwise arise by using conventional CFR together with cable tilt compensation.

Method to embed ELD DAC in SAR quantizer

Methods and devices are described for controlling excess loop delay (ELD) gain compensation in a digital-to-analog converter (DAC) of a successive approximation register (SAR) analog-to-digital converter (ADC) by using DAC unit elements in the ELD DAC and DACs for the SAR ADC efficiently. The ELD DAC and DAC partially share DAC units (e.g. capacitors or current sources) to minimize total DAC units used to limit area and power usage while maintaining operational flexibility. Different configurations provide ELD gains of less than or greater than one. A dedicated sampling capacitor is also provided to allow flexible gain control by capacitance ratio.

Adaptive toggle number compensation for reducing data dependent supply noise in digital-to-analog converters

Adaptive toggle number compensation techniques for reducing data dependent supply noise in DACs are disclosed. Various embodiments are based on setting a certain target toggle number for a plurality of DAC units used to convert at least a portion of a digital data sample and then applying various adaptive techniques to try to achieve the target toggle number in converting the data sample from digital to analog domain. Adaptive toggle number compensation techniques described herein try to reduce data dependent supply noise by deliberately limiting, to a certain target number, the number of DAC units that undergo a switch from the digital input of 1 to 0 or from 0 to 1 in converting a digital data sample. Compared to the conventional dummy signal generation approach, such adaptive toggle number compensation techniques may provide significant savings in terms of power consumption of a DAC.

Diffusion temperature shock monitor

A temperature shock monitor includes a solvent material and a diffusion material. An energy barrier between the solvent material and the diffusion material is selected to be lower than is would conventionally be used in semiconductor devices such that the diffusion material diffuses into the solvent material when exposed to a temperature above a designated temperature threshold. At a later time, electrical parameters of the temperature shock monitor that change based on the amount of diffusion of the diffusion material into the solvent material allows one to determine whether the temperature shock monitor was exposed to a temperature above the temperature threshold.

Low power measurement of skin electrical properties

Various examples are directed to a measurement system for measuring an electrical property of skin comprising an excitation circuit, a receiver circuit, and a sequencer circuit. The excitation circuit may generate a periodic excitation signal that, when provided to the skin, generates a response signal in the skin indicative of the electrical property. The sequencer circuit may be configured to activate the excitation circuit to provide the excitation signal to the skin. While the excitation circuit is activated to provide the excitation signal to the skin, the sequencer circuit may activate the receiver circuit to execute a first sample cycle to generate a first plurality of samples of the response signal. A first value for the electrical property of the skin may be determined based at least in part on the first plurality of samples of the response signal.

Radio frequency transmitter noise cancellation

Transmitter noise cancellation may be applied on a channel by channel basis to active channels of an incoming radio frequency signal received at a receiver. A noise cancellation filter may be provided for each active channel in a predetermined signal band. Applying noise cancellation on a per active channel basis instead of to the entire receive band may substantially reduce the filtering requirement and number of filter coefficients or taps to save power and reduce manufacturing costs. Channelized transmitter noise cancellers, multi transmitter-receiver cross coupling cancellers, and hybrid full signal band and channelized transmitter noise cancellers are also provided.

Switch fault detection techniques for DC-DC converters

Using various techniques, each transistor in a DC-DC converter can have a corresponding voltage detector that can compare a difference of a first voltage at a first terminal of the transistor and a second voltage at a second terminal of the transistor to a threshold voltage. Then, based on at least one comparison, a controller can detect an open circuit or a short circuit in one or more of the transistors regardless of the direction of the load current in the DC-DC converter.

Voltage regulator circuit with correction loop

Techniques that can prevent the low dropout (LDO) output voltage degradation that occurs with conventional LDO regulators, even with large LDO supply variations. An LDO regulator circuit can include another loop that is much slower than the main LDO regulator loop, concentrates the load regulation, and fixes the voltage regulation runaway problem due to the large supply variation with large frequency content. The LDO regulator circuit can include a negative feedback correction loop that corrects the LDO output by, in some examples, adding sink current to the main voltage regulation loop via a programmable current sink element.

Time-to-digital converters with low area and low power consumption

TDCs for converting time periods to digital values are disclosed. An example TDC includes a ring oscillator and a residue generation circuit. Each stage of the residue generation circuit is configured to operate on outputs from two different stages of the ring oscillator. The TDC further includes a counter for counting the number of times that an output of one of the stages of the ring oscillator switches between being at a first signal level and being at a second signal level during a time period that is being converted to a digital value. The TDC also includes a combiner for generating the digital value by combining a value indicative of the number of times counted by the counter and an output of the residue generation circuit. Such a TDC may have relatively low area and low power consumption compared to the conventional TDC designs, while yielding sufficiently linear behavior.

Shunt resistor averaging techniques

Techniques for improving current sensing via a shunt resistance are provided. In an example, an apparatus for sensing current can include a substrate, and a plurality of metal layers stacked on the substrate and separated from the substrate and from each other by an insulation material. In certain examples, a first one or more metal layers can form a sense resistance configured to pass current between a source and a load, and a second one or more metal layers can form one or more gain resistances coupled to the sense resistance and configured to couple to a current sense amplifier. In some example, a metal layer can include portions of both the sense resistance and the gain resistance to compensate for environmental anomalies, material anomalies or manufacturing anomalies.

High frequency galvanic isolators

Isolators for high frequency signals transmitted between two circuits configured to operate at different voltage domains are provided. The isolators may include resonators capable of operating at high frequencies with high transfer efficiency, high isolation rating, and a small substrate footprint. In some embodiments, the isolators may operate at a frequency not less than 20 GHz, not less than 30 GHz, not less than 65 GHz, or between 20 GHz and 100 GHz, including any value or range of values within such range. The isolators may include inductive loops with slits and capacitors integrally formed at the slits. The sizes and shapes of the inductive loops and capacitors may be configured to control the values of equivalent inductances and capacitances of the isolators. The isolators are compatible to different fabrication processes including, for example, micro-fabrication and PCB manufacture processes.

Integrated device package

A package is disclosed. The package can include a package substrate that has an opening, such as a through hole, extending from a top side to a bottom side opposite the top side of the package substrate. The package can also include a component at least partially disposed in the through hole. The component can be an electrical component. The component can be exposed at a bottom surface of the package. The package can include a bonding material that mechanically couples the component and the package substrate.

Current sensor and a method of manufacturing a current sensor

The present disclosure provides an improved Rogowski-type current sensor. The current measurement coil, and the compensation coil are provided on the same board. The measurement coil and the compensation coil are arranged such that they at least partially overlap by virtue of each repeatedly changing side of the board. This arrangement makes the current sensor far better at rejecting interference than certain other PCB Rogowski type coil arrangements.

Switching power converter frequency optimization techniques

Techniques for fine tuning efficiency of a power converter are provided. In an example, a method can include acquiring a plurality of samples of an electrical characteristic of the power converter over a range of switching frequencies of the power converter to provide a plurality of sample pairs, estimating a corner value of the electrical characteristic based on the plurality of samples pairs, estimating a corresponding frequency associated with the corner value of the electrical characteristic based on frequencies of the plurality of sample pairs, and setting a switching frequency of the power converter at the corresponding frequency.

Switched capacitor circuits

A device having a capacitive sampling structure that allows for removal of sampling noise can be implemented in a variety of applications. Noise cancellation can be achieved by storing on an auto-zero capacitor a scaled replica of kT/C noise by a mechanism of correlated sampling. In an example embodiment, a set of switches can be arranged such that, in switching, scaled thermal noise, generated in an acquisition phase in which a voltage signal is input to an input capacitor structure, is captured on an output capacitor structure and, in a conversion phase, the captured thermal noise is cancelled or compensated from an output of the output capacitor structure.

Regulator circuit package techniques

Techniques are provided for containing magnetic fields generated by an integrated switching package and for reducing electromagnetic interference generated from an integrated switching package.

RESIDUE GENERATION SYSTEM AND METHOD FOR GENERATING A RESIDUE SIGNAL IN A RESIDUE-GENERATING ANALOG-TO-DIGITAL CONVERTER