СПОСОБ ПОЛУЧЕНИЯ СУБМИКРОННЫХ КРИСТАЛЛОВ НИТРИДА АЛЮМИНИЯ

GASPHASEN-EPITAXIEVERFAHREN ZUM AUFWACHSEN VON EISENDOTIERTEN UND AUF INDIUM BASIERENDEN HALBLEITERN DER GRUPPEN III-VN.

VORRICHTUNG UND VERFAHREN ZUM ZUECHTEN VON KRISTALLEN AUS II-VI- ODER III-V-VERBINDUNGEN

MBE of a p-conductive carbon-doped InGaAs layer on an InP substrate

In the molecular beam epitaxial growth (MBE) of a p-conductive InGaAs layer from solid state sources onto an InP substrate with simultaneous carbon doping, the growing layer is also doped with aluminium. An Independent claim is also included for a carbon-doped p-conductive InGaAs layer which is also doped with aluminium from an aluminium source, preferably a source containing organically bonded aluminium (e.g. a gaseous trimethyl aluminium-containing source) or a solid state aluminium-containing source.

VERFAHREN UND VORRICHTUNG ZUM ABSCHEIDEN VON HALBLEITERSCHICHTEN

METALLORGANISCHE ADDUKTVERBINDUNGEN.

Wärmebehandlungsverfahren für Verbindungshalbleiter und Verwendung eines Suszeptors in der Wärmebehandlung

Growing monocrystal on crystallisation nucleus - immersing in metallic melt contg. dissolved substance to be crystallised

Monocrystals of pref. an AIIIBV cpd. are produced by placing the startin gmaterial, esp. impure AIIBV cpd., in the lower part of a refractory vessel horizontally partitioned with a glass frit diaphragm (pref. quartz glass); introducing into the upper part of the vessel a solvent for AIIIBV liquid at the operating temp. (above 700 degrees C); the solvent is pref. molten AIII; and immersing the crystn. nucleus into the molten AIII in the upper part of the vessel. The molten AIII penetrates through the diaphragm into the lower part of the vessel; AIIIBV dissolves in it and diffuses upwards ultimately being deposited on the surface of the crystn. nucleus to form an AIIIBV monocrystal. The operation is carried out under pure H2 or in an inert atmos. The pref. AIIIBV cpds. are GaAs and GaP (solvent Ga), InP and InSb (solvent In). A doping material can be introduced into the solvent. Monocrystals can be formed at temps. far below their m.pts. Impurities contained in ten starting material remain ...

VERFAHREN ZUR HERSTELLUNG EINER EPITAKTISCHEN SCHICHT UND NACH DIESEM VERFAHREN HERGESTELLTE EPITAKTISCHE SCHICHT

VERFAHREN ZUM AUFBRINGEN EINER HALBLEITENDEN VERBINDUNG VON ELEMENTEN DER GRUPPEN III UND V DES PERIODENSYSTEMS

n-Type gallium antimonide mfr - contg sulphur and excess gallium, and exhibiting relaxation of conductivity

... n-Type gallium antimonide is produced by seed-crystallisation from a melt of GaSb using the Czochralski method to obtain a single crystal of GaSb contg. alloy additions. Seed crystallisation is undertaken from a melt of GaSb with a Ga addn. of 0.04-0.k wt.% in excess of the stoichiometric amt. of Ga in the GaSb, and with the addn. of 0.001-0.01 wt.% of sulphur. The object is to obtain n-type GaSb (S) which exhibits relaxation of conductivity. Esp. used for the mfr. of tunnel diodes, and other electronic devices. When GaSb is cooled, e.g. to 90 degrees K, its specific electric resistance alters immediately to the equilibrium value at that temp. By using the invention, this alteration is delayed.

Halbleiterlaservorrichtung , optisches Kommunikationssystem unter Verwendung desselben und Herstellungsverfahren

Verfahren und Vorrichtung zum Abscheiden kristalliner Schichten und auf kristallinen Substraten

The invention relates to a method and device for depositing several crystalline semiconductor layers on at least one semiconductor crystalline substrate. According to said method, gaseous parent substances are introduced into a process chamber (2) of a reactor (1) by means of a gas inlet organ (7), said substances accumulating, optionally after a chemical gas phase and/or surface reaction, on the surface of a semiconductor substrate that is placed on a substrate holder (5) in the process chamber (5), thus forming the semiconductor layer. Said semiconductor layer and the semiconductor substrate form a crystal consisting of either one or several elements from main group V, elements from main groups III and V, or elements from main groups II and VI. In a first process step for depositing a first semiconductor layer, a first process gas consisting of one or several first parent substances is introduced into the process chamber (2), the decomposition products of said gas forming the crystal ...

Chemical vapor deposition reactor having multiple inlets

A chemical vapour deposition reactor has a wafer carrier which cooperates with a chamber of the reactor to facilitate laminar flow of reaction gas within the chamber and a plurality of injectors configured in flow controllable zones so as to mitigate depletion. Each zone can optionally have a dedicated flow controller. Thus, flow through each zone can be individually controllable.

A process for the production of thin semi-conducting layers from semi-conducting compounds

In a vapour-deposition process of forming a layer of a semi-conducting compound such as indium arsenide or indium antimonide on a substrate such as glass, alumina or a ferromanganese ferrite, the substrate is pretreated in such a way that the semi-conductor compound formed from separate vaporized jets of the constituent elements, is deposited in a preferred direction of growth. The pretreatment or preseeding may be effected either by wiping a readily decomposable carbon compound such as benzene on to the substrate in stripe form, the direction of wiping and of the stripes being said preferred direction or by forming grooves in the substrate in the preferred direction. Specification 852,598 is referred to.ALSO:In a vapour deposition process of forming a layer of a semi-conducting compound such as indium arsenide or indium antimonide on a substrate such as glass, alumina or a ferromanganese ferrite, the substrate is pretreated in such a way that the semi-conductor compound formed from separate ...

Method and system for manufacturing 111-V group compound semiconductor and 111-V group compound semiconductor

Cubic boron nitride grit and tools comprising same

CHEMICAL VAPOUR DEPOSITION APPARATUS AND METHOD

Method for epitaxial growth of compound semiconductor

A method for epitaxial growth of compound semiconductor containing three component elements, two component elements thereof being the same group elements, in which three kinds of compound gases each containing different one of the three component elements are cyclically introudced, under a predetermined pressure for a predetermined period respectively, onto a substrate enclosed in an evacuated crystal growth vessel so that a single crystal thin film of the compound semiconductor is formed on the substrate.

A method of growing a magnesium-doped nitride semiconductor material

A method of growing a magnesium-doped nitride semiconductor material by molecular beam epitaxy (MBE), comprises supplying ammonia gas, gallium and magnesium to an MBE growth chamber containing a substrate so as to grow a magnesium-doped nitride semiconductor material over the substrate. Magnesium is supplied to the growth chamber at a beam equivalent pressure of at least 1 x 10-9 mbar, and preferably in the range from 1 x 10-9 mbar to 1 x 10-7 mbar during the growth process. The substrate temperature during the growth process is preferably between 850{C and 1050{C. This provides p-type GaN that has a high concentration of free charge carriers and eliminates the need to activate the magnesium dopant atoms by annealing or irradiating the material.

System for manufacturing III-V group compound semiconductors

A semiconductor manufacturing system (60, fig 8) for manufacturing III-V group semiconductors comprises a feed gas supply unit (62, fig 8) and a reactor (61, fig 8)for receiving feed gas from the feed gas supply unit in order to form a thin film crystal layer on a semiconductor substrate (S, fig 8) by metalorganic CVD. The system being characterised by a lead in member 68 provided in the reactor for feeding the feed gas received from the feed gas supply unit onto the surface of the semiconductor. The lead in member including a guide passage (76, fig 10) for conducing the feed gas in a first direction and a gas nozzle 78, which may be formed with a plurality of apertures, for jetting the feed gas from the guide passage in a second direction perpendicular to the first direction in order to bathe the semiconductor. The lead in member may be formed internally with a coolant passage (74, 75, fig 10) for cooling the feed gas passing through the guide passage.

A bulk, free-standing cubic III-N substrate and a method for forming same

Production of single-crystal semiconductor material using a nanostructure template

Improved process for the purification of semi-conductor material

Arsenic is freed from vaporizable impurities by converting the arsenic wholly to oxide, removing the gaseous oxide of the impurity simultaneously produced, and reducing the arsenic oxide to the element. In a preferred embodiment arsenic trioxide is heated and entrained in a stream of reducing gas such as hydrogen which passes through a reaction chamber heated to about 800 DEG C. in which sulphur forms hydrogen sulphide and arsenic is partially reduced to metal. The reaction products pass to a condensing chamber in which arsenic and unreduced arsenic oxide are deposited, the hydrogen sulphide being carried away by the gas stream.ALSO:Arsenic is freed from vaporizable impurities by converting the arsenic wholly to oxide, removing the gaseous oxide of the impurity simultaneously produced, and reducing the arsenic oxide to the element. In a preferred embodiment arsenic trioxide is heated and entrained in a stream of reducing gas such as hydrogen which passes through a reaction chamber heated ...

METHOD FOR DETECTING VOLATILE METERIALS

... 1505745 Detecting volatile materials SIEMENS AG 25 March 1975 [27 March 1974] 12526/76 Heading A5G A method for detecting leakage of the vapour of a volatile material from a first container e.g. an ampoule comprising surrounding the first container with a gas contained under pressure in a second container, the gas comprising a gaseous substance which on contact with the vapour will therewith form a detectable product within the second container. The volatile material e.g. arsenic, phosphorus or sulphur in the first container may be in admixture with a less volatile material e.g. gallium or indium, for reaction therewith in the first container. The gaseous substance may be oxygen or carbon dioxide and may be in the form of air in admixture with an inert gas such as nitrogen or helium.

Method of growing a doped 111-V alloy laer by molecular beam epitaxy

A modified method of growing III-V alloy layers by a molecular beam process. Difficulties have been experienced using known molecular epitaxy processes for growing doped III-V alloy layers having satisfactory electrical and optical properties. The doped III-V alloy layer is grown by a molecular beam epitaxy process which has been modified so that growth proceeds through a surface containing from 5 to 20% of a monolayer of lead, a lead flux impinging on the growth surface together with fluxes of the constituent elements of the doped III-V alloy.

DEVICE AND PROCEDURE FOR SEPARATING CRYSTALLINE LAYERS ALTERNATIVELY MEANS MOCVD OR HVPE

SUBSTRATE FOR EPITAXY

PROCEDURE FOR THE PRODUCTION OF A FREE STANDING SUBSTRATE FROM MONOCRYSTALLINE SEMICONDUCTOR MATERIAL

PROCEDURE FOR THE PRODUCTION OF LUMINESZIERENDEN NANO-CRYSTALS

PROCEDURE FOR THE PRODUCTION OF A NITRIDE SINGLE CRYSTAL BY EPITAKTI GROWING UP ON A SUBSTRATE UNDER PREVENTION OF GROWTH AT THE EDGES OF SUBSTRATE

GROWTH METHOD FOR A NITRIDE SEMICONDUCTOR

Procedure for the production of semiconductor compounds

PROCEDURE AND DEVICE FOR EPITAKTI GROWING OF A MATERIAL ON A SUBSTRATE

Injection radiation source with semiconductor material and procedure for the production of such a semiconductor material

Procedure for manufacturing semiconductor components on magnetic document

Method for producing aluminum antimonide crystals for radiation detectors

HIGH RESISTIVITY ALUMINUM ANTIMONIDE RADIATION DETECTOR

HIGH PRESSURE HIGH TEMPERATURE GROWTH OF CRYSTALLINE GROUP III METAL NITRIDES

METHOD AND DEVICE FOR DEPOSITING SEMI-CONDUCTOR LAYERS

METHOD AND DEVICE FOR DEPOSITING CRYSTALLINE LAYERS ON CRYSTALLINE SUBSTRATES

METHOD AND APPARATUS FOR THE CHEMICAL VAPOR DEPOSITION OF III-V SEMICONDUCTORS UTILIZING ORGANOMETALLIC AND ELEMENTAL PNICTIDE SOURCES

SEMICONDUCTOR-NANOCRYSTAL/CONJUGATED POLYMER THIN FILMS

METHOD FOR PRODUCING NITRIDES

III-V or II-VI compound semiconductor films on graphitic substrates

A composition of matter comprising a film on a graphitic substrate, said film having been grown epitaxially on said substrate, wherein said film comprises at least one group III-V compound or at least one group II-VI compound.

Chemical Vapor Deposition Reactor and Method

Method and apparatus for epitaxially growing a material on a substrate

Method of manufacturing single crystal and apparatus for manufacturing single crystal

METHOD FOR PRODUCING SEMICONDUCTOR SINGLE CRYSTAL WAFER AND LASER PROCESSING DEVICE USED THEREFOR

A method for producing semiconductor single crystal wafer is characterized in that a plurality of semiconductor single crystal wafers (2a-2d) having a relatively small diameter that is required by prospective consumers are cut out of a semiconductor single crystal wafer (1a-1d) having a relatively large diameter. This method has a secondary advantage in that even when a semiconductor singly crystal wafer of large-diameter partially has a defect, some semiconductor single crystal wafers of small-diameter can be cut out for shipment from the portion other than the region with the defect.

PROCESS FOR THE LIQUID PHASE EPITAXIAL DEPOSITION OF A MONOCRYSTALLINE TERNARY COMPOUND

HIGH GROWTH RATE DEPOSITION FOR GROUP III/V MATERIALS

Embodiments of the invention generally relate processes for epitaxial growing Group Ill/V materials at high growth rates, such as about 30 µm/hr or greater, for example, about 40 µm/hr, about 50 µm/hr, about 55 µm/hr, about 60 µm/hr, or greater. The deposited Group Ill/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group Ill/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group Ill/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group Ill/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

DEPOSITION TECHNIQUE

DEPOSITION TECHNIQUE Devices such as photodiodes based on III-V semiconductor materials have been made utilizing a CVD epitaxial procedure. This procedure includes, for example, the use of a combination of liquid and solid chloride transport sources.

SINGLE CRYSTAL OF COMPOUND SEMICONDUCTOR OF GROUPS III-V WITH LOW DISLOCATION DENSITY

Novel single crystals of a compound semiconductor of groups III-V having low dislocation density are provided herein. At least one under-impurity and at least one over-impurity are doped in the host single crystal. From the concentrations " x1 " and " x2 ", and the replaced bond lengths " a1 " and " a2 " of the isoelectronic under- and over-impurities, an arithmetic average " a " of the bond lengths is calculated. The total concentrations of the isoelectronic impurities should be larger than 10 atoms/cm and the difference between " a " and "ao " should be less than plus or minus 2%. The size effects of the under- and over-impurities compensate each other in the double-impurity-doped crystal of the present invention.

APPARATUS FOR FORMING A GROUP II-VI OR GROUP III-V COMPOUND

AN IMPROVED APPARATUS FOR FORMING A GROUP II-VI OR GROUP III-V COMPOUND An improved apparatus for forming Group II-VI or Group III-V compounds is disclosed. The apparatus includes a high-pressure vessel. A reaction container, within the pressure vessel, holds elemental Group II or Group III material and elemental Group VI or Group V material, respectively. A heating means is provided for heating at least the Group VI or Group V material to volatilize the material. Capping the reaction container is a gaseous diffusion barrier which communicates the interior of the reaction container with the interior of the pressure vessel by means of a circuitous passageway contained therein. The diffusion barrier essentially prevents the diffusing out of gaseous Group VI or Group V element material from the reaction container to maintain the ambient therein constant with respect thereto at a fixed volatilization temperature without permitting a rupturing pressure gradient to establish across the walls ...

LPE GROWTH ON GROUP III-V COMPOUND SEMICONDUCTOR SUBSTRATES CONTAINING PHOSPHORUS

LPE GROWTH ON GROUP III-V COMPOUND SEMICONDUCTOR SUBSTATES CONTAINING PHOSPHORUS Liquid phase epitaxy (LPE) growth of a Group III-V semiconductor compound layer upon a Group III-V semiconductor compound substrate containing phosphorus is accomplished in a graphite meltholder by heating the substrate in an atmosphere of nitrogen or helium and contacting the substrate with a liquid melt, capable of growing the layer, in an atmosphere of hydrogen.

EPITAXIAL GROWTH METHOD USING LIQUID GALLIUM BATH

METHOD OF FORMING AND REGULARLY GROWING A SEMICONDUCTOR COMPOUND

APPARATUS FOR PRODUCING PHOSPHIDES

EPITAXIAL GROWING METHOD AND SUBSTRATE FOR EPITAXIAL GROWTH

An epitaxial growing method for growing a compound semiconductor layer (for example, a III-V compound semiconductor layer such as an InGaAs layer, an AlGaAs layer, an AlInAs layer, or an AlInGaAs layer) comprising three or four elements on a substrate (for example, an InP substrate) for growth held by a substrate support by an organic metal vapor phase deposition method, wherein the whole effective use region of the substrate is so polished that the angel of inclination with respect to the (100)-direction lies in the range from 0.00~ to 0.03~ or from 0.04~ to 0.24~, and the compound semiconductor layer with a thickness of 0.5 .mu.m or more is formed on the substrate for growth.

EPITAXIAL GROWTH OF IIIA-VB COMPOUNDS AT LOW TEMPERATURES

METHOD FOR PRODUCING A III/V SI TEMPLATE

Method is provided for producing monolithic template containing Si wafer having layer of III/V semiconductor that is epitaxially applied to surface of Si wafer, wherein III/V semiconductor comprises a lattice constant that deviates from the constant of Si by less than 10%, the method comprising: optionally deoxidizing surface of Si wafer; optionally epitaxially growing Si layer on the surface of the deoxidized Si wafer; optionally subjecting surface of Si wafer or Si layer to an etching and/or bake-out; epitaxially growing layer of III/V semiconductor on surface of Si wafer or surface produced previously at wafer temperature of 350-650 DEG C, growth rate of 0.1-2 [mu]m/h, and layer thickness of 1-100 nm; epitaxially growing layer made of III/V semiconductor equal to or different from III/V semiconductor applied previously on layer obtained previously at wafer temperature of 500-800 DEG C, growth rate of 0.1-10 [mu]m/h, and layer thickness of 10-150 nm.

PROCESS FOR CRYSTAL GROWTH OF III-V GROUP COMPOUND SEMICONDUCTOR

A process for crystal growth of III-V group compound semiconductor, which comprises pyrolyzing, in a gas phase, a material consisting of an organometallic compound and/or a hydride in the presence of an organic compound containing an oxygen atom-carbon atom direct bond, used as a dopant to grow a III-V group compound semiconductor crystal layer containing at least aluminum, of high electric resistance. Said process can grow a compound semiconductor layer of high electric resistance by the use of a dopant which enables the independent controls of oxygen concentration and aluminum concentration and which has a small effect of oxygen remaining.

VAPOR-PHASE EPITAXIAL GROWTH METHOD

A vapor-phase epitaxial growth method for producing a Groups III-V compound semiconductor containing arsenic by vapor-phase epitaxial growth using arsenic trihydride as an arsenic source is disclosed, wherein said arsenic trihydride has a volatile impurity concentration of not more than 1.5 molppb on a germanium tetrahydride conversion. The resulting epitaxial crystal has a low residual carrier concentration and is applicable to a field effect transistor.

PROCESS FOR PRODUCING MONOCRYSTALLINE GROUP II-VI OR GROUP III-V COMPOUNDS AND PRODUCTS THEREOF

This disclosure relates to 2 process for producing monocrystalline Group II-VI or Group III-V compounds from the polycrystalline form of said Group I I-VI or Group III-V compound, said process comprising coating the interior surface of a crucible with a powdered solid having a melting point higher than the polycrystalline form of the compound, placing an amount of polycrystalline compound into the coated crucible, heating the crucible to produce a melt while maintaining the powder in solid form and cooling the crucible to produce a solid compound. The preferred powdered solid is pyrolitic boron nitride. The process may be used to produce, inter alia, semiinsulating gallium arsenide having a neutral EL2 concentration between about 0,85 x 1016cm-3 and about 2,0 x 1016cm-3 and a dislocation density between about 500 cm-2 and about 7800 cm-2.

NITRIDE SEMICONDUCTOR GROWTH METHOD, NITRIDE SEMICONDUCTOR SUBSTRATE, AND NITRIDE SEMICONDUCTOR DEVICE

A method of growing a nitride semiconductor crystal having very few crystal defects and capable of being used as a substrate, comprising the step of forming a first selective growth mask equipped with a plurality of first windows for selectively exposing the surface of a support on the support having a main plane and including different kinds of substrates made of materials different from those of a nitride semiconductor, and the step of growing the nitride semiconductor, by using a gaseous Group III element source and a gaseous nitrogen source, until portions of the nitride semiconductor crystal growing in adjacent windows from the surface of the support exposed from the window join with one another on the upper surface of the selective growth mask.

Verfahren zum praktisch zersetzungsfreien Umschmelzen von Verbindungen

Halbleitergerät

Verfahren zum Herstellen von Mehrkomponentenstoffen

Verfahren zum Herstellen einer halbleitenden Verbindung aus zwei oder mehreren Komponenten

Anwendung des Verfahrens zum Herstellen dünner halbleitender Schichten aus halbleitenden Verbindungen

Verfahren zum Herstellen von kristallinem Borphosphid

Verfahren zum Umschmelzen eines kristallinen Mehrkomponentenstoffes in einem abgeschlossenen System

Verfahren zum Herstellen von Kristallen

Halbleitervorrichtung

Verfahren zum schichtweisen, kristallinen Niederschlagen hochreinen spröden Materials

Verfahren zur Herstellung eines Halbleitermaterials im Dampf eines Elementes

Verfahren zum Herstellen eines Kristalls einer Halbleiterverbindung

Verfahren zum Herstellen von III-V-Verbindungen in kristalliner Form

Verfahren zum epitaktischen Abscheiden von Halbleitermaterial unter Verwendung eines Spinellsubstrates

Verfahren zur Herstellung hochreiner, siliziumfreier AIII/BV-Verbindungen

Verfahren zur Herstellung eines Stabes einer Halbleiterverbindung

SEMICONDUCTOR FILM FROM COMPOUND III-V OR II-VI ON GRAPHITE SUBSTRATES

ОБ'ЄМНИЙ МОНОКРИСТАЛ НІТРИДУ ГАЛІЮ (ВАРІАНТИ) І ОСНОВА ДЛЯ ЕПІТАКСІЇ

Об'ємний монокристал нітриду галію має поперечний переріз у площині, перпендикулярній с-осі гексагональної кристалічної решітки нітриду галію, має площу поверхні більше 100 мм2, його товщина більше 1,0 мкм і його щільність поверхневих дислокацій у площині С менше 106/см2, тоді як об'єм достатній для формування щонайменше однієї придатної для подальшої обробки пластини з неполярною площиною А або площиною М, що має площу поверхні щонайменше 100 мм2. У більш загальному випадку винахід стосується об'ємного монокристала нітриду, що містить галій, причому його поперечний переріз у площині, перпендикулярній с-осі гексагональної кристалічної решітки нітриду, що містить галій, має площу поверхні більше 100 мм2, його товщина більше 1,0 мкм і його щільність поверхневих дислокацій менше 106/см2. Монокристали, відповідно до даного винаходу, придатні для епітаксіального вирощування шарів нітридного напівпровідника. Об'ємні монокристали нітриду, що містить галій, кристалізують з використанням способу ...

Preparation of semiconductor compounds

METHOD FOR REALIZATION Of INDIUM AND a GALLIUM ARSENIDE MONOCRYSTAL

Diffusion of dopant into semiconductor substrate - using open tube in gas stream contg. semiconductor component

PROCESS Of EPITAXY PER MOLECULAR BEAM WITH PREMIXING

SYSTEM AND METHOD FOR EPITAXIAL GROWTH BY MOLECULAR BEAM WITH INTRODUCTION OF HYDROGEN TO THE PROCESS

MONOCRYSTALLINE SEMICONDUCTOR RODS

Method of refining metals and intermetallic compounds such as indium antimonide

Semiconductor device

METHOD FOR DIFFUSING IMPURITIES INTO NITRIDE SEMICONDUCTOR CRYSTALS

Metal alloy monocrystal extractor - with independent electrical heaters for liq seal, volatile component evaporator and fusion crucible

Process of growing single crystals of gallium phosphide

DOPED SEMICONDUCTOR NANOCRYSTALS, METHOD FOR PREPARING SAME AND USES THEREOF

Methods of forming crystals aluminum phosphide [...] for use in semiconductor

Method for fabricating semiconductor thin film using substrate irradiated with focused light, apparatus for fabricating semiconductor thin film using substrate irradiated with focused light, method for selectively growing semiconductor thin film using substrate irradiated with focused light, and semiconductor element using substrate irradiated with focused light

An apparatus ( 100 ) for fabricating a semiconductor thin film includes: substrate surface pretreatment means ( 101 ) for pretreating a surface of a substrate; organic layer coating means ( 102 ) for coating, with an organic layer, the substrate thus pretreated; focused light irradiation means ( 103 ) for irradiating, with focused light, the substrate coated with the organic layer, and for forming a growth-mask layer while controlling layer thickness; first thin film growth means ( 104 ) for selectively growing a semiconductor thin film over an area around the growth-mask layer; substrate surface treatment means ( 105 ) for, after exposing the surface of the substrate by removing the growth-mask layer, modifying the exposed surface of the substrate; and second thin film growth means ( 106 ) for further growing the semiconductor thin film and growing a semiconductor thin film over the modified surface of the substrate.

Vapor-phase process apparatus, vapor-phase process method, and substrate

A vapor-phase process apparatus and a vapor-phase process method capable of satisfactorily maintaining quality of processes even when different types of processes are performed are obtained. A vapor-phase process apparatus includes a process chamber, gas supply ports serving as a plurality of gas introduction portions, and a gas supply portion (a gas supply member, a pipe, a flow rate control device, a pipe, and a buffer chamber). The process chamber allows flow of a reaction gas therein. The plurality of gas supply ports are formed in a wall surface (upper wall) of the process chamber along a direction of flow of the reaction gas. The gas supply portion can supply a gas into the process chamber at a different flow rate from each of one gas supply port and another gas supply port different from that one gas supply port among the plurality of gas supply ports.

Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device

A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 μm-10 μm thick edge process-induced degradation layer.

Method for fabricating wafer product and method for fabricating gallium nitride based semiconductor optical device

Provided is a method for fabricating a wafer product including an active layer grown on a gallium oxide substrate and allowing an improvement in emission intensity. In step S 105 , a buffer layer 13 comprised of a Group III nitride such as GaN, AlGaN, or AlN is grown at 600 Celsius degrees on a primary surface 11 a of a gallium oxide substrate 11 . After the growth of the buffer layer 13 , while supplying a gas G 2 , which contains hydrogen and nitrogen, into a growth reactor 10 , the gallium oxide substrate 11 and the buffer layer 13 are exposed to an atmosphere in the growth reactor 11 at 1050 Celsius degrees. A Group III nitride semiconductor layer 15 is grown on the modified buffer layer. The modified buffer layer includes, for example, voids. The Group III nitride semiconductor layer 15 can be comprised of GaN and AlGaN. When the Group III nitride semiconductor layer 15 is formed of these materials, excellent crystal quality is obtained on the modified buffer layer 14.

Low-temperature synthesis of colloidal nanocrystals

Low-temperature organometallic nucleation and crystallization-based synthesis methods for the fabrication of semiconductor and metal colloidal nanocrystals with narrow size distributions and tunable, size- and shape-dependent electronic and optical properties. Methods include (1) forming a reaction mixture in a reaction vessel under an inert atmosphere that includes at least one solvent, a cationic precursor, an anionic precursor, and at least a first surface stabilizing ligand while stirring at a temperature in a range from about 50° C. to about 130° C. and (2) growing nanocrystals in the reaction mixture for a period of time while maintaining the temperature, the stirring, and the inert-gas atmosphere.

Group iii nitride semiconductor element and epitaxial wafer

A primary surface 23 a of a supporting base 23 of a light-emitting diode 21 a tilts by an off-angle of 10 degrees or more and less than 80 degrees from the c-plane. A semiconductor stack 25 a includes an active layer having an emission peak in a wavelength range from 400 nm to 550 nm. The tilt angle “A” between the (0001) plane (the reference plane S R3 shown in FIG. 5 ) of the GaN supporting base and the (0001) plane of a buffer layer 33 a is 0.05 degree or more and 2 degrees or less. The tilt angle “B” between the (0001) plane of the GaN supporting base (the reference plane S R4 shown in FIG. 5 ) and the (0001) plane of a well layer 37 a is 0.05 degree or more and 2 degrees or less. The tilt angles “A” and “B” are formed in respective directions opposite to each other with reference to the c-plane of the GaN supporting base.

Iii nitride semiconductor substrate, epitaxial substrate, and semiconductor device

In a semiconductor device 100 , it is possible to prevent C from piling up at a boundary face between an epitaxial layer 22 and a group III nitride semiconductor substrate 10 by the presence of 30×10 10 pieces/cm 2 to 2000×10 10 pieces/cm 2 of sulfide in terms of S and 2 at % to 20 at % of oxide in terms of O in a surface layer 12 . By thus preventing C from piling up, a high-resistivity layer is prevented from being formed on the boundary face between the epitaxial layer 22 and the group III nitride semiconductor substrate 10 . Accordingly, it is possible to reduce electrical resistance at the boundary face between the epitaxial layer 22 and the group III nitride semiconductor substrate 10 , and improve the crystal quality of the epitaxial layer 22 . Consequently, it is possible to improve the emission intensity and yield of the semiconductor device 100.

Generating and detecting radiation

A method of generating radiation comprises: manufacturing a structure comprising a substrate supporting a layer of InGaAs, InGaAsP, or InGaAlAs material doped with a dopant, said manufacturing comprising growing said layer such that said dopant is incorporated in said layer during growth of the layer; illuminating a portion of a surface of the structure with radiation having photon energies greater than or equal to a band gap of the doped InGaAs, InGaAsP, or InGaAlAs material so as to create electron-hole pairs in the layer of doped material; and accelerating the electrons and holes of said pairs with an electric field so as to generate radiation. In certain embodiments the dopant is Fe. Corresponding radiation detecting apparatus, spectroscopy systems, and antennas are described.

High pressure chemical vapor deposition apparatuses, methods, and compositions produced therewith

A composition, reactor apparatus, method, and control system for growing epitaxial layers of group III-nitride alloys. Super-atmospheric pressure is used as a process parameter to control the epitaxial layer growth where the identity of alloy layers differ within a heterostructure stack of two or more layers.

Epitaxial substrate and method for manufacturing epitaxial substrate

Provided is a crack-free epitaxial substrate having a small amount of warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes a (111) single crystal Si substrate, a buffer layer, and a crystal layer. The buffer layer is formed of a first lamination unit and a second lamination unit being alternately laminated. The first lamination unit includes a composition modulation layer and a first intermediate layer. The composition modulation layer is formed of a first unit layer and a second unit layer having different compositions being alternately and repeatedly laminated so that a compressive strain exists therein. The first intermediate layer enhances the compressive strain existing in the composition modulation layer. The second lamination unit is a second intermediate layer that is substantially strain-free.

Method for making gallium nitride substrate

A method for making a GaN substrate for growth of nitride semiconductor is provided. The method first provides a GaN single crystal substrate. Then an ion implanting layer is formed inside the GaN single crystal substrate, which divides the GaN single crystal substrate into a first section and a second section. After that, the GaN single crystal substrate is connected with an assistant substrate through a connecting layer. Thereafter, the GaN single crystal substrate is heated whereby the ion implanting layer is decompounded. Finally, the second section is separated from the first section. The first section left on a surface of the assistant substrate is provided for growth of nitride semiconductor thereon.

Production method, production vessel and member for nitride crystal

To provide a production method for a nitride crystal, where a nitride crystal can be prevented from precipitating in a portion other than on a seed crystal and the production efficiency of a gallium nitride single crystal grown on the seed crystal can be enhanced. In a method for producing a nitride crystal by an ammonothermal method in a vessel containing a mineralizer-containing solution, out of the surfaces of said vessel and a member provided in said vessel, at least a part of the portion coming into contact with said solution is constituted by a metal or alloy containing one or more atoms selected from the group consisting of tantalum (Ta), tungsten (W) and titanium (Ti), and has a surface roughness (Ra) of less than 1.80 μm.

Epitaxial growth method and devices

Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice mismatch between an epitaxial material and the substrate. Devices formed by the methods described exhibit better interfacial adhesion and lower defect density than devices formed without texture. Silicon substrates are shown with gallium nitride epitaxial growth and devices such as LEDs are formed within the gallium nitride.

Methods For Monitoring Growth Of Semiconductor Layers

Deposition of a thin film is monitored by illuminating the thin film with an incident beam during deposition of the thin film, wherein at least a portion of the incident beam reflects off the thin film to yield a reflected beam; measuring intensity of the reflected beam from the thin film during growth of the thin film to obtain reflectance; and curve-fitting at least part of an oscillation represented by the reflectance data to obtain information about at least one of thickness, growth rate, composition, and doping of the thin film.

Chemical vapor deposition apparatus

System and method for forming one or more materials. The system includes a susceptor component configured to rotate around a central axis, and a showerhead component that is located above the susceptor component and not in direct contact with the susceptor component. Additionally, the system includes one or more substrate holders located on the susceptor component and configured to rotate around the central axis and also rotate around corresponding holder axes respectively, and a central component. Moreover, the system includes one or more first inlets formed within the central component, one or more second inlets, and one or more third inlets formed within the showerhead component and located farther away from the central component than the one or more second inlets.

Device and method for producing bulk single crystals

The disclosure provides a device and method used to produce bulk single crystals. In particular, the disclosure provides a device and method used to produce bulk single crystals of a metal compound by an elemental reaction of a metal vapor and a reactant gas by an elemental reaction of a metal vapor and a reactant gas.

Methods for depositing thin films comprising gallium nitride by atomic layer deposition

Atomic layer deposition (ALD) processes for forming thin films comprising GaN are provided. In some embodiments, ALD processes for forming doped GaN thin films are provided. The thin films may find use, for example, in light-emitting diodes.

Use of freestanding nitride veneers in semiconductor devices

Thin freestanding nitride veneers can be used for the fabrication of semiconductor devices. These veneers are typically less than 100 microns thick. The use of thin veneers also eliminates the need for subsequent wafer thinning for improved thermal performance and 3D packaging.

GaN BONDED SUBSTRATE AND METHOD OF MANUFACTURING GaN BONDED SUBSTRATE

A gallium nitride (GaN) bonded substrate and a method of manufacturing a GaN bonded substrate in which a polycrystalline nitride-based substrate is used. The method includes loading a single crystalline GaN substrate and a polycrystalline nitride substrate into a bonder; raising the temperature in the bonder; bonding the single crystalline GaN substrate and the polycrystalline nitride substrate together by pressing the single crystalline GaN substrate and the polycrystalline nitride substrate against each other after the step of raising the temperature; and cooling the resultant bonded substrate.

ION ETCHING OF GROWING InP NANOCRYSTALS USING MICROWAVE

High quantum yield InP nanocrystals are used in the bio-technology, bio-medical, and photovoltaic, specifically IV, III-V and III-VI nanocrystal technological applications. InP nanocrystals typically require post-generation HF treatment. Combining microwave methodologies with the presence of a fluorinated ionic liquid allows Fluorine ion etching without the hazards accompanying HF. Growing the InP nanocrystals in the presence of the ionic liquid allows in-situ etching to be achieved. The optimization of the PL QY is achieved by balancing growth and etching rates in the reaction.

Metal chloride gas generator, hydride vapor phase epitaxy growth apparatus, and nitride semiconductor template

A metal chloride gas generator includes: a tube reactor including a receiving section for receiving a metal on an upstream side, and a growing section in which a growth substrate is placed on a downstream side; a gas inlet pipe arranged to extend from an upstream end with a gas inlet via the receiving section to the growing section, for introducing a gas from the upstream end to supply the gas to the receiving section, and supplying a metal chloride gas produced by a reaction between the gas and the metal in the receiving section to the growing section; and a heat shield plate placed in the reactor to thermally shield the upstream end from the growing section. The gas inlet pipe is bent between the upstream end and the heat shield plate.

Deposition methods for the formation of iii/v semiconductor materials, and related structures

Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.

Nitride semiconductor crystal producing method, nitride semiconductor epitaxial wafer, and nitride semiconductor freestanding substrate

A nitride semiconductor crystal producing method, a nitride semiconductor epitaxial wafer, and a nitride semiconductor freestanding substrate, by which it is possible to suppress the occurrence of cracking in the nitride semiconductor crystal and to ensure the enhancement of the yield of the nitride semiconductor crystal. The nitride semiconductor crystal producing method includes growing a nitride semiconductor crystal over a seed crystal substrate, while applying an etching action to an outer end of the seed crystal substrate during the growing of the nitride semiconductor crystal.

Nitride semiconductor wafer, nitride semiconductor device, and method for growing nitride semiconductor crystal

According to one embodiment, a nitride semiconductor wafer includes a silicon substrate, a lower strain relaxation layer provided on the silicon substrate, an intermediate layer provided on the lower strain relaxation layer, an upper strain relaxation layer provided on the intermediate layer, and a functional layer provided on the upper strain relaxation layer. The intermediate layer includes a first lower layer, a first doped layer provided on the first lower layer, and a first upper layer provided on the first doped layer. The first doped layer has a lattice constant larger than or equal to that of the first lower layer and contains an impurity of 1×10 18 cm −3 or more and less than 1×10 21 cm −3 . The first upper layer has a lattice constant larger than or equal to that of the first doped layer and larger than that of the first lower layer.

Epitaxial growth substrate, semiconductor device, and epitaxial growth method

In heteroepitaxially growing a group-III nitride semiconductor on a Si single crystal substrate, the occurrence of cracks initiating in the wafer edge portion can be suppressed. Region A is an outermost peripheral portion outside the principal surface, being a bevel portion tapered. Regions B and C are on the same plane (the principal surface), region B (mirror-surface portion) being the center portion of the principal surface, and region C a region in the principal surface edge portion surrounding region B. The principal surface has a plane orientation, and in region B, is mirror-surface-finished. Region B occupies most of the principal surface of this Si single crystal substrate, and a semiconductor device is manufactured therein. Region C (surface-roughened portion) has a plane orientation as with region B, however, region B is mirror-surface-finished, whereas region C is surface-roughened.

Use of alkaline-earth metals to reduce impurity incorporation into a group-iii nitride crystal grown using the ammonothermal method

Alkaline-earth metals are used to reduce impurity incorporation into a Group-III nitride crystal grown using the ammonothermal method.

SUBSTRATE FOR EPITAXIAL GROWTH

A surface of the substrate consists in plurality of neighbouring stripe shaped flat surfaces of a width from 1 to 2000 μm. Longer edges of the flat surfaces are parallel one to another and planes of these surfaces are disoriented relatively to the crystallographic plane of gallium nitride crystal defined by Miller-Bravais indices (0001), (11-22) or (11-20). Disorientation angle of each of the flat surfaces is between 0 and 3 degree and is different for each pair of neighbouring flat surfaces. Substrate according to the invention allows epitaxial growth of a layered AlInGaN structure by MOCVD or MBE method which permits for realization of a non-absorbing mirrors laser diode emitting a light of the wavelength from 380 to 550 nm and a laser diodes array which may emit simultaneously light of various wavelengths in the range of 380 to 550 nm. 1. A substrate for epitaxial growth made of gallium nitride crystal , and having epi-ready growth surface , characterized in that the growth surface consists of set of neighbouring flat surfaces in form of stripes of a width from 1 to 2000 μm , longer edges of the stripes are parallel on to another , planes of the stripes are disoriented relatively to the crystallographic plane defined by Miller-Bravais indices (0001) , (10-10) , (11-22) or (11-20) and disorientation angle of each of the flat surfaces is from 0 to 3 degree and it is different for each of two neighbouring surfaces.2. The substrate according to claim 1 , characterized in that all the flat surfaces are disoriented relatively to the crystallographic plane defined by the Miller-Bravais indices (0001).3. The substrate according to claim 2 , characterized in that the longer edges of all the flat surfaces are parallel to a given crystallographic direction of gallium nitride crystal while the flat surfaces are delimited by said longer edges and form over the whole crystal an array of repeating sequences.4. The substrate according to claim 3 , characterized in that the ...

Large area nitride crystal and method for making it

Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors.

CRYSTAL GROWTH USING NON-THERMAL ATMOSPHERIC PRESSURE PLASMAS

A method and apparatus for bulk crystal growth using non-thermal atmospheric pressure plasmas. This method and apparatus pertains to growth of any compound crystal involving one or more crystal components in a liquid phase (also known as the melt or solution), in communication with a non-thermal atmospheric pressure plasma source comprised of one or more other crystal components. 1. A method for growing a compound crystal , comprising:growing a Group-III nitride crystal using a flux-based growth, wherein the flux-based growth includes:(1) a solution comprised of at least one Group-III metal contained within a vessel, wherein the solution and one or more surfaces of a seed upon which the Group-III nitride crystal is grown are brought into contact; and(2) a source of at least one component for the growth of the Group-III nitride crystal is a non-thermal atmospheric pressure plasma introduced to the vessel.2. The method of claim 1 , wherein the plasma is operated at a pressure between 0.5 atmospheres and 3 atmospheres.3. The method of claim 1 , wherein the non-thermal atmospheric pressure plasma is the source for nitrogen at atmospheric pressure.4. The method of claim 1 , wherein the non-thermal atmospheric pressure plasma is one or more directed streams in communication with the solution.5. The method of claim 1 , wherein the non-thermal atmospheric pressure plasma is incident above a surface of the solution.6. The method of claim 1 , wherein the non-thermal atmospheric pressure plasma is submerged within the solution.7. The method of claim 1 , wherein the non-thermal atmospheric pressure plasma is introduced within the solution by a conduit.8. The method of claim 7 , wherein the conduit includes pores that introduce only a portion of the non-thermal atmospheric pressure plasma to the Group-III nitride crystal's growth interface.9. The method of claim 7 , wherein the non-thermal atmospheric pressure plasma's interaction with the solution is modulated by altering the ...

GaN Whiskers and Methods of Growing Them from Solution

Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient.

Method for Manufacturing Optical Element

A method for manufacturing an optical element includes a step wherein an aluminum nitride single crystal layer is formed on an aluminum nitride seed substrate having an aluminum nitride single crystal surface as the topmost surface. A laminated body for an optical element is manufactured by forming an optical element layer on the aluminum nitride single crystal layer, and the aluminum nitride seed substrate is removed from the laminated body. An optical element having, as a substrate, an aluminum nitride single crystal layer having a high ultraviolet transmittance and a low dislocation density is provided.

ELECTROMAGNETIC MIXING FOR NITRIDE CRYSTAL GROWTH

A method and apparatus for bulk Group-III nitride crystal growth through inductive stirring in a sodium flux growth technique. A helical electromagnetic coil is closely wound around a non-conducting cylindrical crucible containing a conductive crystal growth solution, including both precursor gallium and sodium, wherein a nitrogen-containing atmosphere can be maintained at any pressure. A seed crystal is introduced with the crystal's growth interface submerged slightly below the solution's surface. Electrical contact is made to the coil and an AC electrical field is applied at a specified frequency, in order to create eddy currents within the conductive crystal growth solution, resulting in a steady-state flux of solution impinging on the submerged crystal's growth interface. 1. A method for growing a compound crystal , comprising:growing a Group-III nitride crystal using a flux-based growth, wherein the flux-based growth includes a solution comprised of at least one Group-III metal contained within a reactor vessel, and the solution is mixed through inductive stirring using one or more electromagnetic fields.2. The method of claim 1 , wherein:the solution is a conductive solution,the reactor vessel includes a helical electromagnetic coil wound around a non-conducting crucible containing the conductive solution, andan electrical field at a specified frequency is applied to the helical electromagnetic coil to create the electromagenetic fields, in order to create currents within the conductive solution, resulting in a flux of the conductive solution impinging on the Group-III nitride crystal's growth interface.3. The method of claim 2 , wherein the electromagnetic fields are controlled to create a directed flow of the solution towards the Group-III nitride crystal's growth interface.4. The method of claim 2 , wherein the electromagnetic fields are controlled to vary the solution's flow velocity and direction during the Group-III nitride crystal's growth.5. The method ...

Fabrication method and fabrication apparatus of group iii nitride crystal substance

A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

Group iii nitride substrate, semiconductor device comprising the same, and method for producing surface-treated group iii nitride substrate

A group III nitride substrate in one embodiment has a surface layer. The surface layer contains 3 at. % to 25 at. % of carbon and 5×10 10 atoms/cm 2 to 200×10 10 atoms/cm 2 of a p-type metal element. The group III nitride substrate has a stable surface.

System and process for high-density, low-energy plasma enhanced vapor phase epitaxy

A process for epitaxial deposition of compound semiconductor layers includes several steps. In a first step, a substrate is removably attached to a substrate holder that may be heated. In a second step, the substrate is heated to a temperature suitable for epitaxial deposition. In a third step, substances are vaporized into vapor particles, such substances including at least one of a list of substances, comprising elemental metals, metal alloys and dopants. In a fourth step, the vapor particles are discharged to the deposition chamber. In a fifth step, a pressure is maintained in the range of 10̂-3 to 1 mbar in the deposition chamber by supplying a mixture of gases comprising at least one gas, wherein vapor particles and gas particles propagate diffusively. In a sixth optional step, a magnetic field may be applied to the deposition chamber. In a seventh step, the vapor particles and gas particles are activated by a plasma in direct contact with the sample holder. In an eighth step, vapor particles and gas particles are allowed to react, so as to form a uniform epitaxial layer on the heated substrate by low-energy plasma-enhanced vapor phase epitaxy.

METAL NITRIDES AND PROCESS FOR PRODUCTION THEREOF

A method for producing a metal nitride by employing a container made of a nonoxide material, wherein reaction or adhesion of a raw metal or metal nitride to be formed to the container can be avoided and inclusion of oxygen derived from the material of the container can be prevented; by securing a certain or larger supply amount and a certain or higher flow rate of the nitrogen source gas, the raw metal can be converted into a nitride with an extremely high conversion, and a metal nitride having a small amount of an unreacted raw metal remaining and containing a metal and nitrogen in a stoichiometric constant can be obtained with a high yield; a metal nitride having small amounts of unreacted raw metal remaining and oxygen included can be obtained with a high yield and is very useful as a raw material for bulk crystal growth. 1. A metal nitride containing a metal element of Group 13 of the Periodic Table , characterized by the metal nitride having an oxygen content of less than 0.07 wt % and a specific surface area of at most 0.5 m/g.2. The metal nitride according to claim 1 , which has a content of a zero valent metal element of less than 5 wt %.3. The metal nitride according to claim 1 , which contains nitrogen in an amount of at least 47 atomic %.4. The metal nitride according to claim 1 , which has a color tone claim 1 , wherein the color tone measured by a color difference meter is such that L is at least 60 claim 1 , “a” is at least −10 and at most 10 claim 1 , and “b” is at least −20 and at most 10.5. The metal nitride according to claim 1 , which has a maximum length of primary particles in a major axis direction of at least 0.05 μm and at most 1 mm.6. The metal nitride according to claim 1 , wherein the metal element of Group 13 of the Periodic Table is gallium.7. A metal nitride molded product claim 1 , which is pellets or a block obtained by molding the metal nitride as defined in .8. A method for producing metal nitride bulk crystals claim 1 , comprising ...

GaN Epitaxy With Migration Enhancement and Surface Energy Modification

Methods and apparatus for depositing thin films incorporating the use of a surfactant are described. Methods and apparatuses include a deposition process and system comprising multiple isolated processing regions which enables rapid repetition of sub-monolayer deposition of thin films. The use of surfactants allows the deposition of high quality epitaxial films at lower temperatures having low values of surface roughness. The deposition of Group III-V thin films such as GaN is used as an example.

PROCESS FOR LARGE-SCALE AMMONOTHERMAL MANUFACTURING OF SEMIPOLAR GALLIUM NITRIDE BOULES

Methods for large-scale manufacturing of semipolar gallium nitride boules are disclosed. The disclosed methods comprise suspending large-area single crystal seed plates in a rack, placing the rack in a large diameter autoclave or internally-heated high pressure apparatus along with ammonia and a mineralizer, and growing crystals ammonothermally. A bi-faceted growth morphology may be maintained to facilitate fabrication of large area semipolar wafers without growing thick boules. 1. A gallium-containing nitride crystal , comprising:a crystalline substrate member having a length greater than about 5 millimeters;at least one large-area surface having a semipolar orientation, wherein the semipolar orientation is miscut from each of the m-plane orientation and the c-plane orientation by at least about 5 degrees; and{'sup': 16', '−3, 'an impurity concentration greater than about 10cmof at least one impurity selected from O, H, Li, Na, K, F, Cl, Br, I, Si, Ge, Cu, Mn, and Fe, wherein the at least one impurity has a distribution along a direction parallel at least one large-area surface of the crystal comprising at least 4 alternating bands of a higher impurity concentration and a lower impurity concentration of the at least one impurity, wherein the higher impurity concentration is between about 1.05 times higher than and about 40 times higher than the lower impurity concentration.'}2. The crystal of claim 1 , wherein the semipolar orientation is within about 3 degrees of one of {6 0 −6 ±1} claim 1 , {5 0 −5 ±1} claim 1 , {4 0 −4 ±1} claim 1 , {3 0 −3 ±1} claim 1 , {5 0 −5 ±2} claim 1 , {2 0 −2 ±1} claim 1 , {3 0 −3 ±2} claim 1 , {4 0 −4 ±3} claim 1 , and {5 0 −5 ±4}.3. The crystal of claim 1 , wherein the length is greater than about 25 millimeters.4. The crystal of claim 1 , wherein a dislocation density of at least one large-area surface is below about 10cm.5. The crystal of claim 1 , wherein a full width at half maximum of a symmetric x-ray rocking curve corresponding ...

Temperature-controlled purge gate valve for chemical vapor deposition chamber

The present invention relates to methods and apparatus that are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the methods relate to substantially preventing the formation of unwanted materials on an isolation valve fixture within a chemical vapor deposition (CVD) reactor. In particular, the invention provides apparatus and methods for limiting deposition/condensation of GaCl 3 and reaction by-products on an isolation valve that is used in the system and method for forming a monocrystalline Group III-V semiconductor material by reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber.

LATTICE MATCHING LAYER FOR USE IN A MULTILAYER SUBSTRATE STRUCTURE

A lattice matching layer for use in a multilayer substrate structure comprises a lattice matching layer. The lattice matching layer includes a first chemical element and a second chemical element. Each of the first and second chemical elements has a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an α-β phase transition temperature higher than the room temperature. The hexagonal close-packed structure of the first chemical element has a first lattice parameter. The hexagonal close-packed structure of the second chemical element has a second lattice parameter. The second chemical element is miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature. A lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors. 1. A lattice matching layer for use in a multilayer substrate structure , the lattice matching layer including:a first chemical element, the first chemical element having a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an α-β phase transition temperature higher than the room temperature, the hexagonal close-packed structure of the first chemical element having a first lattice parameter; anda second chemical element, the second chemical element having a hexagonal close-packed structure at room temperature with similar chemical properties to the first chemical element, the hexagonal close-packed structure of the second chemical element having a second lattice parameter, the second chemical element being miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature,wherein a lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors.2. The lattice matching layer of claim 1 , wherein a linear ...

Semiconductor Device

Provided is a semiconductor device comprising: a GaN crystal substrate defining a principal, (0001) Ga face and defining a matrix, being a majority, polarity-determining domain of the GaN crystal, and inversion domains, being domains in which the polarity in the GaN crystal's [0001] direction is inverted with respect to the matrix, the GaN substrate having a ratio S t /S, of collective area S t cm 2 of inversion domains to the total area S cm 2 of the GaN substrate principal face, of no more than 0.5, with the density along the (0001) Ga face of inversion domains whose surface area is 1 μm 2 or more being D cm −2 ; and an at least single-lamina semiconductor layer on the GaN substrate principal face, the semiconductor layer defining a semiconductor-device principal face; wherein the product S c ×D of the area S c of the semiconductor-device principal face and the inversion domain density D is less than 2.3.

Cubic boron nitride crystal, bodies comprising same and tools comprising same

A cubic boron nitride (cBN) crystal or plurality of crystals containing a chloride salt compound including an alkali metal or an alkali earth metal. For example, the chloride salt compound may be selected from potassium chloride, magnesium chloride, lithium chloride, calcium chloride or sodium chloride. The crystal or crystals may have a relatively rough surface texture.

Process for Producing Group 13 Metal Nitride, and Seed Crystal Substrate for Use in Same

A seed crystal substrate includes a supporting body , and a seed crystal film A formed on the supporting body and composed of a single crystal of a nitride of a Group 13 metal element. The seed crystal film A includes main body parts and thin parts having a thickness smaller than that of the main body parts . The main body parts and thin part are exposed to a surface of the seed crystal substrate . A nitride of a Group 13 metal element is grown on the seed crystal film A by flux method. 1. A method of producing a nitride of a Group 13 metal element by flux method using a seed crystal substrate , said seed crystal substrate comprising:a supporting body; anda seed crystal film formed on said supporting body and comprising a single crystal of a nitride of a Group 13 metal element;wherein said seed crystal film comprises main body parts and thin parts having a thickness smaller than that of said main body parts, andwherein said main body parts and said thin parts are exposed to a surface of said seed crystal substrate, the method comprising the step of growing said nitride of a Group 13 metal element on said seed crystal film by flux method.2. The method of claim 1 , wherein recesses are formed over said thin parts claim 1 , respectively claim 1 , on a surface of said seed crystal film claim 1 , and wherein steps are formed between said main body parts and said thin parts claim 1 , respectively.3. The method of claim 1 , wherein said thin parts have a thickness of 1.5 μm or smaller.4. The method of claim 1 , wherein said seed crystal substrate comprises a low temperature buffer layer provided between said seed crystal film and said supporting body claim 1 , said low temperature buffer layer comprising a nitride of a Group 13 metal element.5. The method of claim 1 , wherein chlorine and fluorine atoms are adsorbed on said thin parts.6. The method of claim 1 , wherein said nitride of a Group 13 metal element grown by flux method comprises gallium nitride.7. A seed crystal ...

Semiconductor laminate and process for production thereof, and semiconductor element

A semiconductor laminate having small electric resistivity in the thickness direction; a process for producing the semiconductor laminate; and a semiconductor element equipped with the semiconductor laminate. include a semiconductor laminate including a Ga 2 0 3 substrate; an AlGalnN buffer layer which is formed on the Ga 2 0 3 substrate; a nitride semiconductor layer which is formed on the AlGalnN buffer layer and contains Si; and an Si-rich region which is formed in an area located on the AlGalnN buffer layer side in the nitride semiconductor layer and has an Si concentration of 5×10 18 /cm 3 or more.

GROUP III ELEMENT NITRIDE CRYSTAL PRODUCING METHOD AND GROUP-III ELEMENT NITRIDE CRYSTAL

A method for producing a high-quality group-III element nitride crystal at a high crystal growth rate, and a group-III element nitride crystal are provided. The method includes the steps of placing a group-III element, an alkali metal, and a seed crystal of group-III element nitride in a crystal growth vessel, pressurizing and heating the crystal growth vessel in an atmosphere of nitrogen-containing gas, and causing the group-III element and nitrogen to react with each other in a melt of the group-III element, the alkali metal and the nitrogen so that a group-III element nitride crystal is grown using the seed crystal as a nucleus. A hydrocarbon having a boiling point higher than the melting point of the alkali metal is added before the pressurization and heating of the crystal growth vessel. 112-. (canceled)13. A group-III element nitride crystal comprising at least one dopant selected from the group consisting of Si , O , Ge , Sn , Mg , Sr , Ea , Zn and Ca , the group-III element nitride crystal having an optical absorption coefficient of 10 cmor less with respect to light having a wavelength of 400 nm or more and 620 nm or less.14. The group-III element nitride crystal according to claim 13 , whereinthe group-III element is at least one element selected from AI, Ga and In, and{'sub': '(1-s-t)', 'the group-III element nitride is a compound represented by AlsGatlnN, where 0≦s≦1, 0≦t≦1, and s+t≦1.'}15. The group-III element nitride crystal according to claim 14 , whereinthe group-III element is Ga, andthe group-III element nitride is GaN.16. A substrate for forming a semiconductor device including a group-III element nitride crystal claim 14 , wherein{'claim-ref': {'@idref': 'CLM-00013', 'claim 13'}, 'the group-III element nitride crystal is the group-III element nitride crystal according to .'}17. A semiconductor device claim 14 , whereina semiconductor layer is formed on a substrate, and{'claim-ref': {'@idref': 'CLM-00016', 'claim 16'}, 'the substrate is the ...

PRODUCTION OF A GaN BULK CRYSTAL SUBSTRATE AND A SEMICONDUCTOR DEVICE FORMED ON A GaN BULK CRYSTAL SUBSTRATE

A crystal has a diameter of 1 cm or more and shows a strongest peak in cathode luminescent spectrum at a wavelength of 360 nm in correspondence to a band edge.

Method and apparatus for producing large, single-crystals of aluminum nitride

Bulk single crystals of AlN having a diameter greater than about 25 mm and dislocation densities of about 10,000 cm −2 or less and high-quality AlN substrates having surfaces of any desired crystallographic orientation fabricated from these bulk crystals.

Large Area, Low-Defect Gallium-Containing Nitride Crystals, Method of Making, and Method of Use

An ultralow defect gallium-containing nitride crystal and methods of making ultralow defect gallium-containing nitride crystals are disclosed. The crystals are useful as substrates for light emitting diodes, laser diodes, transistors, photodetectors, solar cells, and photoelectrochemical water splitting for hydrogen generators. 1. An ultralow defect gallium-containing nitride crystal , wherein:the crystal comprises gallium and nitrogen and has a wurtzite crystal structure;the crystal comprises a first large area surface and a second large area surface, the second large area surface being on the opposite side of the crystal, and the first large area surface and the second large area surface being substantially parallel to one another and having a maximum dimension greater than about 10 millimeters; whereinthe first large-area surface comprises a crystallographic orientation that is miscut from a {10-10} m-plane by between about −60 degrees and about +60 degrees toward a [0001] +c-direction and by up to about 10 degrees toward an orthogonal <1-210> a-direction; and{'sup': 4', '−2', '−1, 'sub': 3', '4', '3', '4', '2', '4, 'at least one of the first large area surface and the second large area surface is characterized by a dislocation density below about 10cmand by a stacking fault concentration below about 10 cm, as determined by etching, in a solution comprising one or more of HPO, HPOthat has been conditioned by prolonged heat treatment to form polyphosphoric acid, and HSO, at a temperature between about 100 degrees Celsius and about 500 degrees Celsius for a time between about 5 minutes and about 5 hours; wherein the temperature and the time are selected so as to cause formation of etch pits with diameters between about 1 micrometer and about 25 micrometers.'}2. The crystal of claim 1 , wherein the second large-area surface comprises a crystallographic orientation that is miscut from a {10-10} m-plane by between about −60 degrees and about +60 degrees toward a [0001 ...

Group iii nitride wafer and its production method

The present invention discloses a group III nitride wafer such as GaN, AlN, InN and their alloys having one surface visually distinguishable from the other surface. After slicing of the wafer from a bulk crystal of group III nitride with a mechanical method such as multiple wire saw, the wafer is chemically etched so that one surface of the wafer is visually distinguishable from the other surface. The present invention also discloses a method of producing such wafers.

Group iii nitride semiconductor single crystal, method for producing the same, self-standing substrate, and semiconductor device

Objects of the present invention are to provide a method for producing a Group III nitride semiconductor single crystal, which method enables production of a Group III nitride semiconductor single crystal having a flat surface by means of a crucible having any inside diameter; to provide a self-standing substrate obtained from the Group III nitride semiconductor single crystal; and to provide a semiconductor device employing the self-standing substrate. The production method includes adding the template, a flux, and semiconductor raw materials to a crucible and growing a Group III nitride semiconductor single crystal while the crucible is rotated. In the growth of the semiconductor single crystal, the crucible having an inside diameter R (mm) is rotated at a maximum rotation speed ω (rpm) satisfying the following conditions: ω1−4≦ω≦ω1+4; ω1=10 z ; and z=−0.78× log 10 ( R )+3.1.

METHOD OF GROWING GROUP III NITRIDE CRYSTALS

The present invention provides a method of growing an ingot of group III nitride. Group III nitride crystals such as GaN are grown by the ammonothermal method on both sides of a seed to form an ingot and the ingot is sliced into wafers. The wafer including the first-generation seed is sliced thicker than the other wafers so that the wafer including the first-generation seed does not break. The wafer including the first-generation seed crystal can be used as a seed for the next ammonothermal growth. 2. A method according to claim 1 , wherein the crystal lattice orientation of the first claim 1 , second claim 1 , third claim 1 , and fourth group III nitride wafers is c-plane having a misorientation within +/−10 degrees claim 1 , and the first faces of the first claim 1 , second claim 1 , third claim 1 , and fourth group III nitride wafers face one another claim 1 , and the second faces of the first claim 1 , second claim 1 , third claim 1 , and fourth group III nitride wafers are nitrogen polar surfaces.3. A method according to claim 1 , wherein the first and second group III nitride crystals are grown simultaneously in supercritical ammonia.4. A method according to claim 1 , wherein an adhesive layer is inserted between the first layer and the second layer to adhere the layers together.5. A method according to claim 4 , wherein the adhesive layer is metallic.6. A method according to claim 5 , wherein the metal comprises gallium or indium.7. A method according to claim 1 , wherein the first and second layers composed of the group III nitride wafers are attached together by applying pressure.8. A method according to claim 1 , wherein the first layer has a long edge claim 1 , and wherein the long edge of the first layer is aligned to a-plane of the first wafer and the second wafer claim 1 , with misorientation within +/−10 degree.9. A method according to claim 1 , wherein the second layer has a long edge claim 1 , and wherein the long edge of the second layer is aligned ...

METHOD OF GROWING GROUP III NITRIDE CRYSTALS

The present invention provides a method of growing an ingot of group III nitride. Group III nitride crystals such as GaN are grown by the ammonothermal method on both sides of a seed to form an ingot and the ingot is sliced into wafers. The wafer including the first-generation seed is sliced thicker than the other wafers so that the wafer including the first-generation seed does not break. The wafer including the first-generation seed crystal can be used as a seed for the next ammonothermal growth. 1. A method of making a group III nitride composed of GaAlInN (0≦x≦1 , 0≦x+y≦1) comprising(a) growing a first group III nitride crystal on a first face and growing a second group III nitride crystal on a second face of a first-generation seed to form a first ingot of group III nitride;(b) slicing the first ingot into a first, second, and third wafer;wherein the first wafer includes the first-generation seed, and the first wafer has a thickness greater than a thickness of each of the second wafer and the third wafer, and wherein the thickness of the first wafer containing the first-generation seed is large enough to avoid breaking of the first wafer.2. A method according to and further comprising growing a third group III nitride crystal on a first face of said first wafer and a fourth group III nitride crystal on a second face of said first wafer.3. A method according to claim 2 , wherein cracks exposed on the surface of the first wafer including the first-generation seed are buried during the next growth.4. A method according to claim 1 , wherein both surfaces of the first wafer which includes the first-generation seed are covered with group III nitride crystals grown on the first-generation seed.5. A method according to claim 4 , wherein the group III nitride crystals are grown in supercritical ammonia.6. A method according to claim 1 , wherein the ingot is sliced into wafers with a multiple wire saw having a different wire pitch for the wafer which includes the first- ...

LARGE ALUMINUM NITRIDE CRYSTALS WITH REDUCED DEFECTS AND METHODS OF MAKING THEM

Reducing the microvoid (MV) density in AlN ameliorates numerous problems related to cracking during crystal growth, etch pit generation during the polishing, reduction of the optical transparency in an AlN wafer, and, possibly, growth pit formation during epitaxial growth of AlN and/or AlGaN. This facilitates practical crystal production strategies and the formation of large, bulk AlN crystals with low defect densities—e.g., a dislocation density below 10cmand an inclusion density below 10cmand/or a MV density below 10cm. 138.-. (canceled)39. An AlN single crystal having at least one of (i) an optical absorption coefficient of less than 5 cmat all wavelengths in a range spanning 500 nm to 3 ,000 nm or (ii) an optical absorption coefficient of less than 1 cmat any wavelength in a range spanning 210 nm to 4 ,500 nm.40. The AlN single crystal of claim 39 , wherein the AlN single crystal has an optical absorption coefficient of less than 5 cmat all wavelengths in a range spanning 500 nm to 3 claim 39 ,000 nm.41. The AlN single crystal of claim 40 , wherein the AlN single crystal has an optical absorption coefficient of less than 1 cmat any wavelength in a range spanning 210 nm to 4 claim 40 ,500 nm.42. The AlN single crystal of claim 39 , wherein the AlN single crystal has an optical absorption coefficient of less than 1 cmat any wavelength in a range spanning 210 nm to 4 claim 39 ,500 nm.43. The AlN single crystal of claim 39 , wherein the AlN single crystal has a microvoid density less than approximately 10cm.44. The AlN single crystal of claim 39 , wherein the AlN single crystal is substantially crack-free.45. The AlN single crystal of claim 39 , wherein the AlN single crystal is in the form of a wafer with a surface having a crystalline orientation within 2° of the (0001) c-face and an Al polarity.46. The AlN single crystal of claim 40 , wherein the AlN single crystal is in the form of a wafer with a surface having a crystalline orientation within 2° of the (0001) c ...

Method for making epitaxial structure

A method for making an epitaxial structure is provided. The method includes the following steps. A substrate having an epitaxial growth surface is provided. A buffer layer is formed on the epitaxial growth surface. A carbon nanotube layer is placed on the buffer layer. An epitaxial layer is epitaxially grown on the buffer layer. The substrate and the carbon nanotube layer are removed.

GROWTH SUBSTRATE AND LIGHT EMITTING DEVICE COMPRISING THE SAME

A growth substrate including a substrate having a growth surface including a plurality of steps inclining in a first direction; a first layer disposed on the growth surface, the first layer including an A-plane or an M-plane in an upper part thereof, a plurality of protrusions having an inclined surface on an upper surface thereof, and nitride; a mask layer including a dielectric material and having at least a portion disposed on the protrusions; and a second layer disposed on the mask layer and including nitride. 1. A growth substrate comprising:a substrate having a growth surface including a plurality of steps inclining in a first direction; an A-plane or an M-plane in an upper part thereof,', 'a plurality of protrusions having an inclined surface on an upper surface thereof, and', 'nitride;, 'a first layer disposed on the growth surface, the first layer includinga mask layer including a dielectric material and having at least a portion disposed on the protrusions; anda second layer disposed on the mask layer and including nitride.2. The growth substrate according to claim 1 , wherein a width of an inclination direction of the steps of the substrate are uniform.3. The growth substrate according to claim 1 , wherein the substrate includes a material having a hexagonal system claim 1 , andwherein a virtual line connecting ends of the steps of the substrate forms an angle of inclination in a positive (+) direction from an R plane of the substrate.4. The growth substrate according to claim 3 , wherein the angle formed by the virtual line and the R plane of the substrate is 0.2° to 0.4°.5. The growth substrate according to claim 1 , wherein the mask layer and the second layer form an air void between each other.6. The growth substrate according to claim 1 , wherein the upper surface of the first layer and an upper surface of the second layer have an identical crystal plane.7. The growth substrate according to claim 1 , wherein the mask layer comprises at least one of a ...

METHOD OF MANUFACTURING GROUP III NITRIDE CRYSTAL

A method of manufacturing a group III nitride crystal according to a first aspect includes: preparing a seed substrate; generating a group III element oxide gas; supplying the group III element oxide gas; supplying a nitrogen element-containing gas; supplying an oxidizing gas containing nitrogen element containing at least one selected from the group consisting of NO gas, NOgas, NO gas, and NOgas; and growing the group III nitride crystal on the seed substrate. 1. A method of manufacturing a group III nitride crystal comprising:preparing a seed substrate;generating a group III element oxide gas;supplying the group III element oxide gas;supplying a nitrogen element-containing gas;{'sub': 2', '2', '2', '4, 'supplying an oxidizing gas containing nitrogen element containing at least one selected from the group consisting of NO gas, NOgas, NO gas, and NOgas; and'}growing the group III nitride crystal on the seed substrate.2. The method of manufacturing a group III nitride crystal according to claim 1 , further comprising:reacting the oxidizing gas containing nitrogen element with a group III element droplet.3. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied at a partial pressure of 7.00×10atm or more and 1.75×10atm or less.4. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied at a partial pressure of 7.60×10atm or more and 1.30×10atm or less.5. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied before the seed substrate reaches a substrate maximum achieving temperature.6. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied before the seed substrate reaches the substrate temperature of 1050° C. This ...

High-pressure vessel for growing group iii nitride crystals and method of growing group iii nitride crystals using high-pressure vessel and group iii nitride crystal

Present invention discloses a high-pressure vessel of large size formed with a limited size of e.g. Ni—Cr based precipitation hardenable superalloy. Vessel may have multiple zones. For instance, the high-pressure vessel may be divided into at least three regions with flow-restricting devices and the crystallization region is set higher temperature than other regions. This structure helps to reliably seal both ends of the high-pressure vessel, at the same time, may help to greatly reduce unfavorable precipitation of group III nitride at the bottom of the vessel. Invention also discloses novel procedures to grow crystals with improved purity, transparency and structural quality. Alkali metal-containing mineralizers are charged with minimum exposure to oxygen and moisture until the high-pressure vessel is filled with ammonia. Several methods to reduce oxygen contamination during the process steps are presented. Back etching of seed crystals and a new temperature ramping scheme to improve structural quality are disclosed.

Crystal growth apparatus and manufacturing method of group iii nitride crystal

A crystal growth apparatus comprises a reaction vessel holding a melt mixture containing an alkali metal and a group III metal, a gas supplying apparatus supplying a nitrogen source gas to a vessel space exposed to the melt mixture inside the reaction vessel, a heating unit heating the melt mixture to a crystal growth temperature, and a support unit supporting a seed crystal of a group III nitride crystal inside the melt mixture.

Production of Free-Standing Crystalline Material Layers

Herein is provided a growth structure for forming a free-standing layer of crystalline material having at least one crystallographic symmetry. The growth structure includes a host substrate and a separation layer disposed on the host substrate for growth of a layer of the crystalline material thereon. The separation layer has a separation layer thickness, and is mechanically weaker than the host substrate and the crystalline material. An array of apertures is in the separation layer, each aperture extending through the separation layer thickness. 1. A growth structure for forming a free-standing layer of crystalline material having at least one crystallographic symmetry , comprising:a host substrate;a separation layer disposed on the host substrate for growth of a layer of the crystalline material on the separation layer, the separation layer having a separation layer thickness, and the separation layer being mechanically weaker than the host substrate and the crystalline material layer; andan array of apertures disposed in the separation layer, each aperture in the array extending through the separation layer thickness, the array of apertures having an array symmetry that matches a crystallographic symmetry of the crystalline material.2. The growth structure of further comprising a growth template layer disposed on the host substrate under the separation layer and exposed in the apertures of the separation layer claim 1 , wherein the growth template layer comprises a compositional component of the crystalline material.3. The growth structure of further comprising a layer of the crystalline material disposed on the separation layer.4. The growth structure of wherein the crystalline material is monocrystalline.5. The growth structure of wherein the crystalline material layer comprises a crystalline III-V semiconducting material.6. The growth structure of wherein growth template layer comprises GaN claim 2 , and further comprising a crystalline material layer of GaN ...

DEFECT REDUCTION IN SEEDED ALUMINUM NITRIDE CRYSTAL GROWTH

Bulk single crystal of aluminum nitride (AlN) having an areal planar defect density≤100 cm. Methods for growing single crystal aluminum nitride include melting an aluminum foil to uniformly wet a foundation with a layer of aluminum, the foundation forming a portion of an AlN seed holder, for an AlN seed to be used for the AlN growth. The holder may consist essentially of a substantially impervious backing plate. 138.-. (canceled)39. A bulk single crystal of AlN having a thickness greater than 0.1 mm and exhibiting a triple-crystal X-ray rocking curve of less than 50 arcsec full width at half maximum (FWHM) for a (0002) reflection.40. The bulk single crystal of claim 39 , wherein the thickness of the bulk single crystal is at least 1 mm.41. The bulk single crystal of claim 39 , wherein the thickness of the bulk single crystal is at least 5 mm.42. The bulk single crystal of claim 39 , wherein an areal planar defect density of the bulk single crystal is ≤10 cm.43. The bulk single crystal of claim 39 , wherein an areal planar defect density of the bulk single crystal is ≤1 cm.44. The bulk single crystal of claim 39 , wherein an areal density of threading dislocations in the bulk single crystal is ≤10cm.45. The bulk single crystal of claim 39 , wherein an areal density of threading dislocations in the bulk single crystal is ≤10cm.46. The bulk single crystal of claim 39 , wherein a diameter or width of the bulk single crystal is at least 25 mm.47. The bulk single crystal of claim 39 , wherein a diameter or width of the bulk single crystal is at least 50 mm.48. The bulk single crystal of claim 39 , wherein the thickness of the bulk single crystal is at most 1 mm.49. The bulk single crystal of claim 39 , wherein an areal planar defect density of the bulk single crystal is at least 1 cmand at most 100 cm.50. The bulk single crystal of claim 39 , wherein an areal density of threading dislocations in the bulk single crystal is at least 10cmand at most 10cm.51. The bulk single ...

METHOD OF FEEDING GASES INTO A REACTOR TO GROW EPITAXIAL STRUCTURES BASED ON GROUP III NITRIDE METALS AND A DEVICE FOR CARRYING OUT SAID METHOD

The invention relates to methods for the chemical application of coatings by the decay of gaseous compounds, in particular to methods for injecting gases into a reaction chamber. The invention also relates to means for feeding gases into a reaction chamber, said means providing for the regulation of streams of reactive gases, and ensures the possibility of obtaining multi-layer epitaxial structures having set parameters and based on nitrides of group III metals while simultaneously increasing the productivity and cost-effectiveness of the process of the epitaxial growth thereof. Before being fed into a reactor, all of the gas streams are sent to a mixing chamber connected to the reactor, and are then fed into the reactor via a flux former under laminar flow conditions. The mixing chamber and the flux former are equipped with means for maintaining a set temperature. As a result of these solutions, a gaseous mixture with set parameters is fed into the reactor, and the formation of vortices is simultaneously prevented. The maximum allowable volume of the mixing chamber is chosen to take into account the process parameters and the required rarity of heterojunctions. 1. A method of delivering gas into a rector for epitaxial growth of group III nitrides , comprising delivering into a reactor of at least two reactive gas flows , at least one of which is mixed with a carrier gas , using trimethylaluminum , trimethylindium , trimethylgallium , triethylgallium , and their mixtures as a reactive gas—a source of group III metals , and using ammonia as a reactive gas—a source of nitrogen , wherein the gas flows before injection into a reactor are directed to at least one connected with a reactor mixing chamber for formation of gas mixture , and then gas mixture is delivered into a reactor via flow former shaped for laminar flow conditions promotion , and the walls of mixing chamber and flow former are heated and kept at temperature of 40÷400° C. , and the internal volume of the ...

METHOD FOR GROWING NON-POLAR M-PLANE EPITAXIAL LAYER OF WURTZITE SEMICONDUCTORS ON SINGLE CRYSTAL OXIDE SUBSTRATES

The present invention relates to a method for growing a non-polar m-plane epitaxial layer on a single crystal oxide substrate, which comprises the following steps: providing a single crystal oxide with a perovskite structure; using a plane of the single crystal oxide as a substrate; and forming an m-plane epitaxial layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process, wherein the non-polar m-plane epitaxial layer may be GaN, or III-nitrides. The present invention also provides an epitaxial layer having an m-plane obtained according to the aforementioned method. 1. A method for growing a non-polar m-plane epitaxial layer on a single crystal oxide substrate , comprising the following steps:providing a single crystal oxide with a perovskite structure;using a plane of the single crystal oxide as a substrate; andforming a non-polar m-plane epitaxial layer of wurtzite semiconductors on the substrate by a vapor deposition process,wherein the non-polar m-plane epitaxial layer is III-nitrides.2. The method as claimed in claim 1 , further comprising the following steps:forming an oxide layer on the single crystal oxide;using a plane of the oxide layer as a substrate; andforming a non-polar m-plane epitaxial layer of wurtzite semiconductors on the substrate by a vapor deposition process,wherein, the compositions of the oxide layer and the single crystal oxide are the same or different.3. The method as claimed in claim 1 , wherein the lattice mismatch between the substrate and the non-polar m-plane epitaxial layer is 10% or less.4. The method as claimed in claim 1 , wherein the single crystal oxide is LaAlO claim 1 , SrTiO claim 1 , (La claim 1 , Sr)(Al claim 1 , Ta)O claim 1 , or an LaAlOalloy with a lattice constant difference of 10% or less compared to LaAlO.5. The method as claimed in claim 1 , wherein the III nitride is gallium nitride claim 1 , indium nitride claim 1 , aluminum nitride claim 1 , indium gallium nitride ...

System For Efficient Manufacturing Of A Plurality Of High-Quality Semiconductor Single Crystals, And Method Of Manufacturing Same

A system for simultaneously manufacturing more than one single crystal of a semiconductor material by physical vapor transport (PVT) includes a plurality of reactors and a common vacuum channel connecting at least a pair of reactors of the plurality of reactors. Each reactor has an inner chamber adapted to accommodate a PVT growth structure for growth of a single semiconductor crystal. The common vacuum channel is connectable to a vacuum pump system for creating and/or controlling a common gas phase condition in the inner chambers of the pair of reactors.

PROCESS FOR LARGE-SCALE AMMONOTHERMAL MANUFACTURING OF SEMIPOLAR GALLIUM NITRIDE BOULES

Methods for large-scale manufacturing of semipolar gallium nitride boules are disclosed. The disclosed methods comprise suspending large-area single crystal seed plates in a rack, placing the rack in a large diameter autoclave or internally-heated high pressure apparatus along with ammonia and a mineralizer, and growing crystals ammonothermally. A bi-faceted growth morphology may be maintained to facilitate fabrication of large area semipolar wafers without growing thick boules. 1. A method of forming a boule used to form one or more single crystal substrates , comprising performing a crystal growth process on one or more seed crystals to form one or more boules , whereinthe one or more seed crystals each have a first crystallographic orientation on a first surface, formed on the first surface of or within each of the one or more seed crystals; or', 'formed between two or more tiled crystals that form a mosaic of tiled crystals,, 'the first surface of each of the one or more seed crystals includes parallel features that aregrowth facets form during the crystal growth process between the parallel features having a second crystallographic orientation and a third crystallographic orientation, andwherein each of the second crystallographic orientation and the third crystallographic orientation are oblique with respect to the first crystallographic orientation.1. The method of claim 1 , wherein the parallel features comprise grooves on the first surface of each of the one or more seed crystals and are formed by sawing claim 1 , dry etching claim 1 , reactive ion etching claim 1 , wet etching claim 1 , laser scribing claim 1 , or grinding.2. The method of claim 2 , wherein the grooves have a depth between about one micrometer and about one millimeter and a width between about ten micrometers and about one millimeter.4. The method of claim 1 , wherein the parallel features comprise mask lines formed on the first surface of each of the one or more seed crystals claim 1 , ...

GaN SUBSTRATE WAFER AND METHOD FOR MANUFACTURING GaN SUBSTRATE WAFER

The present invention is aimed at providing: a GaN substrate wafer having an improved productivity, which can be preferably used for the production of a nitride semiconductor device in which a device structure is arranged on a GaN substrate having a carrier concentration increased by doping; and a method of producing the same. Provided is a (0001)-oriented GaN wafer which includes a first region arranged on an N-polar side and a second region arranged on a Ga-polar side via a regrowth interface therebetween. In this GaN wafer, the second region has a minimum thickness of 20 μm to 300 μm, and contains a region having a higher donor impurity total concentration than the first region. In the second region, a region within a specific length from a main surface of the Ga-polar side of the GaN substrate wafer is defined as a main doped region, and the second region may be doped such that at least the main doped region has a donor impurity total concentration of 1×10atoms/cmor higher. 1. A (0001)-oriented GaN substrate wafer , comprising a first region arranged on an N-polar side and a second region arranged on a Ga-polar side via a regrowth interface therebetween ,wherein the second region has a minimum thickness of 20 μm to 300 μm, and comprises a region having a higher donor impurity total concentration than the first region.2. The GaN substrate wafer according to claim 1 , wherein at least a portion of the region having a higher donor impurity total concentration than the first region has a carrier concentration of 1×10cmor higher.3. The GaN substrate wafer according to claim 1 , satisfying any condition selected from the following (1) to (3):(1) having a diameter of 50 mm to 55 mm and a thickness of 250 μm to 450 μm;(2) having a diameter of 100 nm to 105 mm and thickness of 350 μm to 750 μm; and(3) having a diameter of 150 mm to 155 mm and a thickness of 450 μm to 800 μm.4. The GaN substrate wafer according to claim 1 , wherein the second region comprises a main doped ...

Reducing Autodoping of III-V Semiconductors By Atomic Layer Epitaxy (ALE)

In one aspect, a method for forming a doped III-V semiconductor material on a substrate includes the steps of: (a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element; and (b) forming a doped second monolayer on a side of the first monolayer opposite the substrate, wherein the second monolayer comprises either i) at least one group V element if the first monolayer comprises at least one group III element, or ii) at least one group III element if the first monolayer comprises at least one group V element, wherein a dopant is selectively introduced only during formation of the second monolayer, and wherein steps (a) and (b) are performed using atomic layer epitaxy. Doped III-V semiconductor materials are also provided. 1. A method for forming a doped III-V semiconductor material on a substrate , the method comprising the steps of:(a) forming a first monolayer on the substrate, wherein the first monolayer comprises at least one group III or at least one group V element;(b) forming a doped second monolayer on a side of the first monolayer opposite the substrate, wherein the second monolayer comprises either i) at least one group V element if the first monolayer comprises at least one group III element, or ii) at least one group III element if the first monolayer comprises at least one group V element, wherein a dopant is selectively introduced only during formation of the second monolayer, and wherein steps (a) and (b) are performed using atomic layer epitaxy.2. The method of claim 1 , wherein the substrate comprises an indium phosphide substrate.3. The method of claim 1 , wherein the step (a) comprises the steps of:contacting the substrate with at least one group III or at least one group V element vapor phase epitaxy source under conditions sufficient to form the first monolayer on the substrate; andpurging any remaining reactants.4. The method of claim 3 , wherein the conditions ...

GROUP III NITRIDE SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR

The present invention provides a method for producing a Group III nitride semiconductor device which can relax strain between a Group III nitride semiconductor layer containing In and a semiconductor layer adjacent thereto, and a production method therefor. The well layer is a Group III nitride semiconductor layer containing In. The barrier layer is a Group III nitride semiconductor layer. The well layer and the barrier layer are brought into contact with each other in at least one of growing a well layer and growing a barrier layer. A gas containing hydrogen gas as a carrier gas is used in growing a well layer and growing a barrier layer. In growing a barrier layer, the flow rate of hydrogen gas is higher than the flow rate of hydrogen gas in growing a well layer. 1. A method for producing a Group III nitride semiconductor device , the method comprising:growing a first semiconductor layer; andgrowing a second semiconductor layer, whereinthe first semiconductor layer is a Group III nitride semiconductor layer containing In,the second semiconductor layer is a Group III nitride semiconductor layer,the second semiconductor layer has a band gap larger than a band gap of the first semiconductor layer, anda flow rate of hydrogen gas used as a carrier gas in growing a second semiconductor layer is larger than a flow rate of hydrogen gas in growing a first semiconductor layer.2. The method for producing a Group III nitride semiconductor device according to claim 1 , wherein the flow rate of the hydrogen gas is linearly increased or decreased at least one of an initial stage and a final stage of the growth of the second semiconductor layer.3. The method for producing a Group III nitride semiconductor device according to claim 1 , wherein a mixture gas of hydrogen gas and nitrogen gas is used as a carrier gas in growing a first semiconductor layer and the second semiconductor layer.4. The method for producing a Group III nitride semiconductor device according to claim 1 , ...

MANUFACTURE OF GROUP IIIA-NITRIDE LAYERS ON SEMICONDUCTOR ON INSULATOR STRUCTURES

A method is provided for forming Group IIIA-nitride layers, such as GaN, on substrates. The Group IIIA-nitride layers may be deposited on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates. The Group IIIA-nitride layers may be deposited by heteroepitaxial deposition on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates. 1. A method of forming a multilayer structure , the method comprising:forming a pattern comprising a plurality of mesa islands on a semiconductor-on-insulator structure, wherein the semiconductor-on-insulator structure comprises a single crystal semiconductor handle wafer, a dielectric layer in interfacial contact with the single crystal semiconductor handle wafer, and a single crystal semiconductor device layer in interfacial contact with the dielectric layer, and further wherein the pattern comprising the plurality of mesa islands is formed in the single crystal semiconductor device layer; andforming a Group IIIA-nitride layer on the plurality of mesa islands.2. The method of wherein the single crystal semiconductor handle wafer comprises two major claim 1 , generally parallel surfaces claim 1 , one of which is a front surface of the single crystal semiconductor handle wafer and the other of which is a back surface of the single crystal semiconductor handle wafer claim 1 , a circumferential edge joining the front and back surfaces of the single crystal semiconductor handle wafer claim 1 , a bulk region between the front and back surfaces claim 1 , and a central plane of the single crystal semiconductor handle wafer between the front and back surfaces of the single crystal semiconductor handle wafer.3. The method of wherein the single crystal semiconductor handle wafer comprises a semiconductor material selected from the group consisting of silicon claim 1 , silicon carbide claim 1 , sapphire claim 1 , and aluminum nitride.4. (canceled)5. The method of wherein the dielectric ...

MULTI-DEPOSITION PROCESS FOR HIGH QUALITY GALLIUM NITRIDE DEVICE MANUFACTURING

A group III-nitride (III-N)-based electronic device includes an engineered substrate, a metalorganic chemical vapor deposition (MOCVD) III-N-based epitaxial layer coupled to the engineered substrate, and a hybrid vapor phase epitaxy (HVPE) III-N-based epitaxial layer coupled to the MOCVD epitaxial layer. 1. A group III-nitride (III-N)-based electronic device comprising:an engineered substrate;a metalorganic chemical vapor deposition (MOCVD) III-N-based epitaxial layer coupled to the engineered substrate; anda hybrid vapor phase epitaxy (HVPE) III-N-based epitaxial layer coupled to the MOCVD epitaxial layer.2. The III-N-based electronic device of further comprising:a second MOCVD III-N-based epitaxial layer coupled to the HVPE III-N-based epitaxial layer; anda second HVPE III-N-based epitaxial layer coupled to the second MOCVD based epitaxial layer.3. The III-N-based electronic device of wherein a combined thickness of the MOCVD III-N-based epitaxial layer and the HVPE III-N-based epitaxial layer is greater than 10 μm.4. The III-N-based electronic device of further comprising a silicon layer disposed between the engineered substrate and the MOCVD III-N-based epitaxial layer.5. The III-N-based electronic device of wherein the silicon layer comprises a single crystal silicon layer.6. The III-N-based electronic device of wherein:the MOCVD III-N-based epitaxial layer comprises at least AlN, GaN, or AlGaN; andthe HVPE III-N-based epitaxial layer comprises at least AlN, GaN, or AlGaN.7. A method of fabricating a epitaxial structure claim 1 , the method comprising:providing an engineered substrate;growing a first epitaxial layer coupled to the engineered substrate using a first deposition process; andgrowing a second epitaxial layer coupled to the first epitaxial layer using a second deposition process.8. The method of further comprising:growing a third epitaxial layer coupled to the second epitaxial layer using the first deposition process; andgrowing a fourth epitaxial ...

ENCAPSULATED SUBSTRATE, MANUFACTURING METHOD, HIGH BAND-GAP DEVICE HAVING ENCAPSULATED SUBSTRATE

An encapsulated substrate includes a zinc oxide substrate and a composite barrier layer. The composite barrier layer includes a first film layer having a first material different from zinc oxide, a second film layer covered on a surface of the first film layer and having a second material different from the zinc oxide and the first material, and an active layer formed on the composite barrier layer and corresponding to an acting surface of a zinc oxide substrate and having an acting material different from the zinc oxide. 1. An encapsulated substrate , comprising:a zinc oxide substrate comprising at least one acting surface and being a zinc oxide material having a standard lattice structure of a wurtzite lattice structure; anda composite barrier layer having a thickness greater than 1 nanometer and being surroundingly covered on the zinc oxide substrate, comprising a first film layer which has a thickness greater than 0.1 nanometer and is directly covered and formed on the zinc oxide substrate comprises a first material different from zinc oxide and is provided with a lattice constant ranged between 120% and 115% or between 105% and 95% of the standard lattice structure as being in the form of the wurtzite lattice structure; a second film layer which has a thickness greater than 0.1 nanometer and is directly covered and formed on a surface of the first film layer comprises a second material different from the zinc oxide and the first material and is provided with a lattice constant ranged between 120% and 115% or between 105% and 95% of the standard lattice structure as being in the form of the wurtzite lattice structure; a plurality of accumulating film layers sequentially formed on the second film layer and each of which being different from the adjacent accumulating film layer and/or the second film layer and provided with a lattice constant ranged between 120% and 115% or between 105% and 95% of the standard lattice structure as being in the form of the wurtzite ...

Semiconductor Structure with Annealing

Semiconductor structures formed with annealing for use in the fabrication of optoelectronic devices. The semiconductor structures can include a substrate, a nucleation layer and a buffer layer. The nucleation layer and the buffer layer can be epitaxially grown and then annealed. The temperature of the annealing of the nucleation layer and the buffer layer is greater than the temperature of the epitaxial growth of the layers. The annealing reduces the dislocation density in any subsequent layers that are added to the semiconductor structures. A desorption minimizing layer epitaxially grown on the buffer layer can be used to minimize desorption during the annealing of the layer which also aids in curtailing dislocation density and cracks in the semiconductor structures. 1. A method , comprising:obtaining a substrate;epitaxially growing a nucleation layer on the substrate, the nucleation layer including a group III nitride semiconductor layer;{'b': '1', 'epitaxially growing a buffer layer directly on the nucleation layer, the buffer layer grown at a first temperature T;'}{'b': 2', '2', '1, 'annealing the epitaxially grown buffer layer and the nucleation layer at a second temperature T, wherein the second temperature T is greater than the first temperature T; and'}epitaxially growing an n-type doped semiconductor layer over the annealed buffer layer.2. A method of epitaxially growing a semiconductor structure with low dislocation density , comprising:obtaining a substrate;epitaxially growing a nucleation layer on the substrate, the nucleation layer including a group III nitride semiconductor layer;{'b': '1', 'epitaxially growing a buffer layer on the nucleation layer at a first temperature T, the buffer layer including a group III nitride semiconductor layer;'}epitaxially growing a desorption minimizing layer on the buffer layer;{'b': 2', '2', '1, 'annealing the nucleation layer, the buffer layer and the desorption minimizing layer at a second temperature T, wherein the ...

Composite of III-Nitride Crystal on Laterally Stacked Substrates

Group-III nitride crystal composites made up of especially processed crystal slices, cut from III-nitride bulk crystal, whose major surfaces are of {1-10±2}, {11-2±2}, {20-2±1} or {22-4±1} orientation, disposed adjoining each other sideways with the major-surface side of each slice facing up, and III-nitride crystal epitaxially present on the major surfaces of the adjoining slices, with the III-nitride crystal containing, as principal impurities, either silicon atoms or oxygen atoms. With x-ray diffraction FWHMs being measured along an axis defined by a <0001> direction of the substrate projected onto either of the major surfaces, FWHM peak regions are present at intervals of 3 to 5 mm width. Also, with threading dislocation density being measured along a <0001> direction of the III-nitride crystal substrate, threading-dislocation-density peak regions are present at the 3 to 5 mm intervals.

SEMICONDUCTOR SUBSTRATE MANUFACTURING METHOD

A semiconductor substrate manufacturing method includes: epitaxially growing a columnar III nitride semiconductor single crystal on a principal place of a circular substrate; removing a hollow cylindrical region at an outer peripheral edge side of the III nitride semiconductor single crystal to leave a solid columnar region at an inside of the hollow cylindrical region of the III nitride semiconductor single crystal; and slicing the solid columnar region after removing the hollow cylindrical region. The hollow cylindrical region is removed such that the shape of the III nitride semiconductor single crystal is always keeps an axial symmetry that a center axis of the III nitride semiconductor single crystal is defined as a symmetric axis. 1. A method for manufacturing a semiconductor substrate , comprising:epitaxially growing a columnar group III nitride semiconductor single crystal on a principal plane of a circular substrate;removing a hollow cylindrical region at an outer peripheral edge side of the group III nitride semiconductor single crystal to leave a solid columnar region at an inside of the hollow cylindrical region of the group III nitride semiconductor single crystal; andslicing the solid columnar region after removing the hollow cylindrical region, wherein the removing of the hollow cylindrical region is carried out such that a shape of the group III nitride semiconductor single crystal always keeps an axial symmetry that a central axis of the semiconductor crystal is defined as a symmetry axis.2. The method according to claim 1 , wherein the hollow cylindrical region comprises a region that has a concentration of an impurity that is different from that in the solid columnar region.3. The method according to claim 1 , wherein the hollow cylindrical region comprises a region formed by a crystal growth using a plane that has a different orientation from an orientation in an upper surface of the solid columnar region as a growth interface in the epitaxial ...

METHOD OF GROWING GROUP III NITRIDE CRYSTALS USING HIGH PRESSURE VESSEL

Present invention discloses a high-pressure vessel of large size formed with a limited size of e.g. Ni—Cr based precipitation hardenable superalloy. Vessel may have multiple zones. 1. A method for growing group III nitride crystals in an ammonothermal method and in a manner that exposes an alkali-metal mineralizer to minimal oxygen and moisture comprising:a. placing at least one group III-nitride seed crystal in a crystallization region of a high-pressure vessel;b. placing a group III-containing nutrient in the high-pressure vessel;c. placing an airtight container into the high-pressure vessel, wherein the airtight container comprises mineralizer and a metal covering which protects the mineralizer from water and oxygen;{'sup': '−5', 'd. reducing pressure to less than 1×10mbar after placing the airtight container into the high-pressure vessel;'}e. filling the high-pressure vessel with ammonia;f. releasing the mineralizer into the ammonia surrounding the metal covering;g. maintaining (i) a temperature of the crystallization region above 500° C. and (ii) a pressure sufficiently high that the ammonia is supercritical for a sufficient time to grow a group III-nitride crystal on said seed crystal.2. The method of wherein the airtight container was formed by pouring molten mineralizer into the metal covering and solidifying the mineralizer within the covering.3. The method of wherein the metal covering is sealed with a metal foil seal.4. The method of wherein the airtight container consists essentially of the mineralizer claim 3 , the metal foil seal claim 3 , and the metal covering.5. The method of wherein the metal covering and the metal foil seal are each formed of a metal that is stable in supercritical ammonia.6. The method of wherein the mineralizer is sodium and the group III nitride is GaN.7. The method of wherein the act of releasing the mineralizer comprises rupturing a metal foil seal on said covering so that the mineralizer exits the covering and dissolves in ...

GROWTH CONTAINER

Relates to a method of producing a semiconductor crystal having generation of a defect suppressed in the semiconductor single crystal. The production method includes the steps of: forming a boron oxide film () on the inner wall of a growth container () having a bottom section and a body section continuous to the bottom section; bringing the boron oxide film () into contact with boron oxide melt containing silicon oxide to form a boron oxide film () containing silicon oxide on the inner wall of the growth container (); forming raw material melt () above seed crystal () placed in and on the bottom section of the growth container (); and solidifying the raw material melt () from the seed crystal () side to grow a semiconductor single crystal. 118-. (canceled)19. A growth container comprising:a bottom section;a body section continuous to the bottom section; anda boron oxide film formed on an inner wall of the bottom section and the body section,the boron film containing a silicon dioxide,a concentration of the silicon dioxide in the boron oxide film being greater than or equal to 1 mol % and less than or equal to 12 mol %.20. The growth container according to claim 19 , whereinthe growth is made of boron nitride, pyrolytic boron nitride, pyrolytic graphite, graphite, glassy carbon, silicon carbide, alumina, zirconia, silicon nitride, or quartz. The present invention relates to a method of producing a semiconductor single crystal. Particularly, the present invention relates to a method of producing a semiconductor single crystal having the generation of a defect in the semiconductor single crystal suppressed.As a method of growing a semiconductor single crystal such as the III-V group compound semiconductor single crystal including GaAs, GaP, GaSb, InP, InAs, and InSb as well as the II-VI group compound semiconductor single crystal including CdTe, CdMnTe, CdZnTe, HgCdTe, ZnSe, ZnSSe and the like, various growing methods have been conventionally proposed.Typical methods ...

WAFER CARRIER AND METHOD

A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face. 1. A wafer carrier , comprising:a pocket sized and shaped to accommodate a wafer, the pocket comprising a base and a substantially circular perimeter; anda removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face,wherein the removable orientation marker further comprises a notch at a first end of the flat face.2. The wafer carrier of claim 1 , wherein the inner surface extends into a first arcuate surface at the first end of the flat face and into a second arcuate surface at a second end of the flat face claim 1 , the second end opposing the first end claim 1 , the flat face forming a chord with the first arcuate surface and the second arcuate surface.3. The wafer carrier of claim 1 , wherein the removable orientation member further comprises an additional notch arranged at a second end of the flat face claim 1 , the second end opposing the first end.4. The wafer carrier of claim 1 , wherein an arcuate section of the substantially circular perimeter comprises a depression sized and shaped to accommodate the removable orientation marker.5. The wafer carrier of claim 4 , wherein the arcuate section of the substantially circular perimeter further comprises first engaging means for engaging with the removable orientation marker.6. ...

METHOD FOR PRODUCING GaN CRYSTAL

The present invention provides a novel method for producing a GaN crystal, the method including growing GaN from vapor phase on a semi-polar or non-polar GaN surface using GaCl3 and NH3 as raw materials. Provided herein is an invention of a method for producing a GaN crystal, including the steps of: (i) preparing a GaN seed crystal having a non-polar or semi-polar surface whose normal direction forms an angle of 85° or more and less than 170° with a [0001] direction of the GaN seed crystal; and (ii) growing GaN from vapor phase on a surface including the non-polar or semi-polar surface of the GaN seed crystal using GaCl3 and NH3 as raw materials.

METHOD OF PRODUCING A TWO-DIMENSIONAL MATERIAL

A method of producing graphene or other two-dimensional material such as graphene including heating the substrate held within a reaction chamber to a temperature that is within a decomposition range of a precursor, and that allows two-dimensional crystalline material formation from a species released from the decomposed precursor; establishing a steep temperature gradient (preferably >1000° C. per meter) that extends away from the substrate surface towards an inlet for the precursor; and introducing precursor through the relatively cool inlet and across the temperature gradient towards the substrate surface. The steep temperature gradient ensures that the precursor remains substantially cool until it is proximate the substrate surface thus minimizing decomposition or other reaction of the precursor before it is proximate the substrate surface. The separation between the precursor inlet and the substrate is less than 100 mm. 1. A method of producing a two-dimensional crystalline material , the method comprising:providing a substrate having nucleation sites within a reaction chamber;introducing at a precursor entry point a precursor into the reaction chamber, the precursor being in a gas phase and/or suspended in a gas;heating the substrate to a temperature that is within a decomposition range of the precursor, and that allows two-dimensional crystalline material formation from a species released from the decomposed precursor; andcooling the precursor entry point;wherein the reaction chamber is a close coupled reaction chamber such that a separation between the substrate surface upon which the two-dimensional crystalline material is formed and the point at which the precursor enters the reaction chamber is sufficiently small, and a thermal gradient between the substrate surface and the point at which the precursor enters the chamber is sufficiently steep, such that the fraction of precursor that reacts in the gas phase within the reaction chamber is low enough to ...

Two-stage seeded growth of large aluminum nitride single crystals

In various embodiments, growth of large, high-quality single crystals of aluminum nitride is enabled via a two-stage process utilizing two different crystalline seeds.

CRYSTALLIZATION PROCESSING FOR SEMICONDUCTOR APPLICATIONS

A method and apparatus for forming a crystalline semiconductor layer on a substrate are provided. A semiconductor layer is formed by vapor deposition. A pulsed laser melt/recrystallization process is performed to convert the semiconductor layer to a crystalline layer. Laser, or other electromagnetic radiation, pulses are formed into a pulse train and uniformly distributed over a treatment zone, and successive neighboring treatment zones are exposed to the pulse train to progressively convert the deposited material to crystalline material. 1. A method of treating a substrate , comprising:identifying a first treatment zone;forming a molten area of the first treatment zone by exposing a surface of the first treatment zone to a first laser pulse, wherein the first laser pulse has a non-uniformity of less than about 5 percent;recrystallizing the molten area of the first treatment zone while exposing the first treatment zone to a plurality of laser pulses;identifying a second treatment zone; andrepeating the forming a molten area and the recrystallizing the molten area with the second treatment zone.2. The method of claim 1 , wherein the forming a molten area of each treatment zone further comprises exposing the surface of each treatment zone to a second laser pulse claim 1 , and a duration between the first laser pulse and the second laser pulse is less than a time necessary for a portion of the molten area to refreeze.3. The method of claim 2 , wherein the first laser pulse and the second laser pulse have the same duration and intensity.4. The method of claim 1 , wherein each pulse of the plurality of laser pulses has the same duration and intensity as the first laser pulse.5. The method of claim 1 , wherein each pulse of the plurality of laser pulses has a duration or an intensity that is different from the first laser pulse.6. The method of claim 1 , wherein the second treatment zone and the first treatment zone share a boundary.7. The method of claim 5 , wherein the ...

DEFECT REDUCTION IN SEEDED ALUMINUM NITRIDE CRYSTAL GROWTH

Bulk single crystal of aluminum nitride (AlN) having an areal planar defect density ≦100 cm. Methods for growing single crystal aluminum nitride include melting an aluminum foil to uniformly wet a foundation with a layer of aluminum, the foundation forming a portion of an AlN seed holder, for an AlN seed to be used for the AlN growth. The holder may consist essentially of a substantially impervious backing plate. 117.-. (canceled)18. A method for growing single-crystal aluminum nitride (AlN) , the method comprising:providing a backing plate sized and shaped to receive an AlN seed;disposing an AlN seed and a substantially impervious foil on the backing plate with the foil between the AlN seed and the backing plate; anddepositing aluminum and nitrogen onto the AlN seed under conditions suitable for growing single-crystal AlN originating at the AlN seed.19. The method of claim 18 , wherein the foil is substantially impervious to aluminum transport.20. The method of claim 19 , wherein the foil is substantially impervious to nitrogen.21. The method of claim 18 , wherein the foil is substantially impervious to nitrogen.22. The method of claim 18 , wherein the backing plate is substantially impervious to aluminum transport.23. The method of claim 18 , wherein a surface of the AlN seed facing the backing plate has a total thickness variance of less than 5 μm.24. The method of claim 18 , wherein a surface of the AlN seed facing the backing plate has a root mean square roughness less than 1 nm in a 10 μm×10 μm square area.25. The method of claim 18 , wherein providing the backing plate comprises exposing the backing plate to an Al vapor.26. The method of claim 18 , wherein the backing plate comprises multiple layers of grains claim 18 , at least some of which are swollen to inhibit diffusion therebetween.27. The method of claim 18 , wherein the backing plate consists essentially of a polycrystalline material.28. The method of claim 18 , wherein the backing plate is ...

VAPOR PHASE GROWTH APPARATUS AND VAPOR PHASE GROWTH METHOD

A vapor phase growth apparatus of an embodiment includes: a reaction chamber; a first gas supply path configured to supply a first process gas including organic metal and a carrier gas into the reaction chamber; a second gas supply path configured to supply a second process gas including ammonia into the reaction chamber; a first carrier gas supply path configured to supply a first carrier gas of a hydrogen or inert gas into the first gas supply path while being connected to the first gas supply path and including a first mass flow controller; and a second carrier gas supply path configured to supply a second carrier gas of a hydrogen or inert gas different from the first carrier gas into the first gas supply path while being connected to the first gas supply path and including a second mass flow controller. 1. A vapor phase growth apparatus comprising:a reaction chamber;a first gas supply path connected to the reaction chamber, the first gas supply path configured to supply a first process gas including organic metal and a carrier gas into the reaction chamber;a second gas supply path connected to the reaction chamber, the second gas supply path configured to supply a second process gas including ammonia into the reaction chamber;a first carrier gas supply path connected to the first gas supply path, the first carrier gas supply path having a first mass flow controller, the first carrier gas supply path configured to supply a first carrier gas of a hydrogen or inert gas into the first gas supply path; anda second carrier gas supply path connected to the first gas supply path, the second carrier gas supply path having a second mass flow controller, the second carrier gas supply path configured to supply a second carrier gas of a hydrogen or inert gas different from the first carrier gas into the first gas supply path.2. The vapor phase growth apparatus according to claim 1 , further comprising:a first compensation gas supply path connected to the second gas supply ...

TECHNIQUE FOR THE GROWTH AND FABRICATION OF SEMIPOLAR (Ga,Al,In,B)N THIN FILMS, HETEROSTRUCTURES, AND DEVICES

A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface. 1. A light emitting device configured as a laser device , comprising:a semipolar III-nitride film including a light emitting device structure, wherein:the light emitting device structure includes a semipolar III-nitride active region grown on or above a surface of a nitride substrate, the surface oriented at a crystal angle θ from a c-plane of the nitride substrate, wherein 75°≦θ<90°; andan edge configured on the light emitting device structure for emission of light.2. The device of claim 1 , wherein the semipolar III-nitride film comprises a gallium and nitrogen material.3. The device of claim 1 , wherein the semipolar III-nitride active region is grown on or above a semipolar surface of the substrate comprising a free-standing gallium nitride (GaN) substrate claim 1 , the semipolar surface having a {20-21} orientation or offcut thereof.4. The device of claim 1 , wherein the light emitting device structure comprises a green light emitting semipolar diode.5. The device of claim 1 , wherein:a material property of the semipolar III-nitride active region is such that the device emits light in response to a drive current density of 278 Amps per centimeter square, andthe drive current density is direct current density.6. The device of ...

EPITAXIAL STRUCTURE OF N-FACE GROUP III NITRIDE, ACTIVE DEVICE, AND METHOD FOR FABRICATING THE SAME WITH INTEGRATION AND POLARITY INVERSION

The present invention provides an epitaxial structure of N-face group III nitride, its active device, and the method for fabricating the same. By using a fluorine-ion structure in device design, a 2DEG in the epitaxial structure of N-face group III nitride below the fluorine-ion structure will be depleted. Then the 2DEG is located at a junction between a i-GaN channel layer and a i-AlGaN layer, and thus fabricating GaN enhancement-mode AlGaN/GaN high electron mobility transistors (HEMTs), hybrid Schottky barrier diodes (SBDs), or hybrid devices. After the fabrication step for polarity inversion, namely, generating stress in a passivation dielectric layer, the 2DEG will be raised from the junction between the i-GaN channel layer and the i-AlGaN layer to the junction between the i-GaN channel layer and the i-AlGaN layer. 1. An epitaxial structure of N-face AlGaN/GaN , comprising:a substrate;a buffer layer (C-doped) layer on the substrate;a carbon doped (C-doped) i-GaN layer on the buffer layer (C-doped);{'sub': 'y', 'an i-AlGaN layer, located on said C-doped i-GaN layer;'}{'sub': 'y', 'an i-GaN channel layer, located on said i-AlGaN layer;'}{'sub': 'x', 'an i-AlGaN layer, located on said i-GaN channel layer;'}{'sub': 'x', 'a fluorine-ion structure, located in said i-AlGaN layer; and'}a first gate dielectric layer, located on said fluorine-ion structure;where x=0.1˜0.3 and y=0.05˜0.75.2. The structure of claim 1 , wherein an i-AlGaN grading buffer layer is further disposed between said C-doped i-GaN layer and said i-AlGaN layer and z=0.01˜0.75.3. The structure of claim 1 , wherein the two-dimensional electron gas in said i-GaN channel layer is depleted below said fluorine-ion structure and the two-dimensional electron gas is located at the junction between said i-GaN channel layer and said i-AlGaN layer.4. A method for fabricating an enhancement-mode N-face AlGaN/GaN high electron mobility transistor with polarity inversion using an epitaxial structure of N-face AlGaN/ ...

METHOD OF FABRICATING NON-POLAR AND SEMI-POLAR DEVICES USING EPITAXIAL LATERAL OVERGROWTH

A method of fabricating a semiconductor device, comprising: forming a growth restrict mask on or above a III-nitride substrate, and growing one or more island-like III-nitride semiconductor layers on the III-nitride substrate using the growth restrict mask The III-nitride substrate has an in-plane distribution of off-angle orientations with more than 0.1 degree; and the off-angle orientations of an m-plane oriented crystalline surface plane range from about +28 degrees to about −47 degrees towards a c-plane. The island-like III-nitride semiconductor layers have at least one long side and short side, wherein the long side is perpendicular to an a-axis of the island-like III-nitride semiconductor layers. The island-like III-nitride semiconductor layers do not coalesce with neighboring island-like III-nitride semiconductor layers. 1. A device , comprising:one or more island-like III-nitride semiconductor layers having a just-orientation and an off-angle orientation of an m-plane oriented crystalline surface plane, wherein:the off-angle orientation of the m-plane oriented crystalline surface plane ranges from about +28 degrees to about −47 degrees towards a c-plane; andthe island-like III-nitride semiconductor layers have at least one long side and short side, wherein the long side is perpendicular to an a-axis of the island-like III-nitride semiconductor layers.2. The device of claim 1 , wherein the island-like III-nitride semiconductor layers do not coalesce with neighboring island-like III-nitride semiconductor layers.3. The device of claim 1 , wherein the island-like III-nitride semiconductor layers are formed on a III-nitride substrate.4. The device of claim 3 , wherein the island-like III-nitride semiconductor layers are removed from the III-nitride substrate.5. The device of claim 1 , wherein the island-like III-nitride semiconductor layers have an emitting region.6. The device of claim 5 , wherein the emitting region is at least 1 μm from an edge of a layer ...

GROUP 13 ELEMENT NITRIDE LAYER, FREE-STANDING SUBSTRATE, FUNCTIONAL ELEMENT, AND METHOD OF PRODUCING GROUP 13 ELEMENT NITRIDE LAYER

A group 13 nitride layer is composed of a polycrystalline group 13 nitride and is constituted by a plurality of monocrystalline particles having a particular crystal orientation approximately in a normal direction. The group 13 nitride comprises gallium nitride, aluminum nitride, indium nitride or the mixed crystal thereof. The group 13 nitride layer includes an upper surface and a bottom surface, and a full width at half maximum of a (1000) plane reflection of X-ray rocking curve on the upper surface is 20000 seconds or less and 1500 seconds or more. 1. A group 13 nitride layer comprising a polycrystalline group 13 nitride ,said group 13 nitride layer comprising a plurality of monocrystalline particles having a particular crystal orientation approximately in a normal direction,wherein said group 13 nitride comprises gallium nitride, aluminum nitride, indium nitride or the mixed crystal thereof,wherein said group 13 nitride layer comprises an upper surface and a bottom surface, andwherein a full width at half maximum of a (1000) plane reflection of an X-ray rocking curve on said upper surface is 20000 seconds or more and 1500 seconds or less.2. The group 13 nitride layer of claim 1 ,wherein said monocrystalline particles exposed to said upper surface of said group 13 nitride layer is communicated with said bottom surface of said group 13 nitride layer without intervening a particle boundary, andwherein a ratio DT/DB of an average cross-sectional diameter DT at outermost surfaces of said monocrystalline particles exposed to said upper surface of said group 13 nitride layer with respect to an average cross-sectional diameter DB at outermost surfaces of said monocrystalline particles exposed to said bottom surface of said group 13 nitride layer exceeds 1.0.3. The group 13 nitride layer of claim 2 , wherein said average cross-sectional diameter DT at said outermost surfaces of said monocrystalline particles exposed to said upper surface is 10 μm or larger.4. The group ...

SELF-STANDING GaN SUBSTRATE, GaN CRYSTAL, METHOD FOR PRODUCING GaN SINGLE CRYSTAL, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

An object is to provide a nonpolar or semipolar GaN substrate having improved size and crystal quality. A self-standing GaN substrate has an angle between the normal of the principal surface and an m-axis of 0 degrees or more and 20 degrees or less, wherein: the size of the projected image in a c-axis direction when the principal surface is vertically projected on an M-plane is 10 mm or more; and when an a-axis length is measured on an intersection line between the principal surface and an A-plane, a low distortion section with a section length of 6 mm or more and with an a-axis length variation within the section of 10.0×10Å or less is observed. 1: A self-standing GaN substrate with an angle between the normal of the principal surface and an in-axis of 0 degrees or more and 20 degrees or less ,wherein:the size of the projected image in a c-axis direction when the principal surface is vertically projected on an M-plane is 10 mm or more; and{'sup': '−1', 'when a region excluding a portion at a distance of 2 mm or less from a substrate end surface, of the principal surface, is assumed to be an effective region, a stacking fault density obtained by dividing a total length of stacking faults existing in the effective region by an area of the effective region is less than 15 cm.'}2: The self-standing GaN substrate according to claim 1 , wherein the size of the projected image is a 10 mm square or more.3: The self-standing GaN substrate according to claim 1 , wherein the size of the projected image in a c-axis direction is 15 mm or more.4: The self-standing GaN substrate according to claim 1 , wherein the size of the projected image in an a-axis direction is 25 mm or more.5: The self-standing GaN substrate according to claim 1 , wherein the self-standing GaN substrate contains fluorine.6: The self-standing GaN substrate according to claim 5 , wherein a concentration of fluorine exceeds 1×10cm.7: The self-standing GaN substrate according to claim 1 , wherein the self- ...

METHOD FOR PRODUCING NITRIDE CRYSTAL AND NITRIDE CRYSTAL

A high-quality nitride crystal can be produced efficiently by charging a nitride crystal starting material that contains tertiary particles having a maximum diameter of from 1 to 120 mm and formed through aggregation of secondary particles having a maximum diameter of from 100 to 1000 μm, in the starting material charging region of a reactor, followed by crystal growth in the presence of a solvent in a supercritical state and/or a subcritical state in the reactor, wherein the nitride crystal starting material is charged in the starting material charging region in a bulk density of from 0.7 to 4.5 g/cmfor the intended crystal growth. 1. (canceled)2. A GaN crystal , comprising a fluorine element and at least one halogen element selected from the group consisting of a chlorine , bromine and iodine , wherein an oxygen concentration is from 1.5×10to 2.5×10atoms/cm , and a Si concentration is 2×10atoms/cmor less.3. The GaN crystal of claim 2 , comprising the fluorine and the iodine.4. The GaN crystal of claim 2 , wherein a fluorine concentration is 1×10atoms/cmor less.5. The GaN crystal of claim 1 , which is a GaN crystal grown according to an ammonothermal process.6. A wafer comprising the GaN crystal of .7. A method of producing a device claim 1 , comprising:{'claim-ref': {'@idref': 'CLM-00005', 'claim 5'}, 'forming a light-emitting device or an electronic device by using the wafer of .'}8. A method of producing a GaN crystal claim 1 , comprising:growing a crystal, wherein a GaN crystal is grown from a GaN crystal starting material having an oxygen concentration of at least 10 ppm using an ammonothermal process,{'sub': '4', 'wherein in the crystal growing, NHF is used as a mineralizing agent, and HI as a mineralizing agent is charged in a reaction apparatus.'}9. The method of producing a GaN crystal of claim 7 , wherein a GaN polycrystal is used as the GaN crystal starting material.10. The method of producing a GaN crystal of claim 8 , further comprising growing the GaN ...

BORON NITRIDE MATERIAL AND METHOD OF PREPARATION THEREOF

A method of preparing a boron nitride material, such as boron nitride (BN) or boron carbonitride (BCN), is provided. The method may include providing a substrate, and sublimating an amine borane complex onto the substrate to obtain the boron nitride material. The amine borane complex may include, but is not limited to, borazine, amino borane, trimethylamine borane and triethylamine borane. In addition, the temperature at which the sublimating is carried out may be varied to control composition of the boron nitride material formed. In addition, various morphologies can be obtained by using the present method, namely films, nanotubes and porous foam. 1. A method of preparing a boron nitride material , the method comprisingproviding a substrate, andsublimating an amine borane complex onto the substrate to obtain the boron nitride material, wherein temperature at which the sublimating is carried out is varied to control composition of the boron nitride material formed.2. The method according to claim 1 , wherein the boron nitride material is a boron nitride nanotube.3. The method according to claim 2 , wherein providing the substrate comprises providing a substrate having a layer of a metal in discrete particulate form arranged on a support.4. The method according to claim 2 , wherein providing the substrate comprises providing a substrate having one or more carbon nanotubes.5. The method according to claim 4 , further comprising removing the one or more carbon nanotubes by annealing the substrate following sublimating of the amine borane complex onto the substrate in an environment containing oxygen at a temperature in the range of about 400° C. to about 700° C.6. (canceled)7. The method according to claim 1 , wherein providing the substrate comprises providing a layer of a metal arranged on a porous support to form the boron nitride material as a porous boron nitride material.8. The method according to claim 7 , further comprising removing the substrate by subjecting ...

BORON NITRIDE AND METHOD OF PRODUCING BORON NITRIDE

BN nanosheets are prepared by a method comprising heating to a temperature of at least 500° C., a mixture comprising: (1) an alkali borohydride, and (2) an ammonium salt. NaNmay be included to increase the yield. No catalyst is required, and the product produced contains less than 0.1 atomic percent metal impurities. 1. h-BN nanosheets.2. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets are few layer h-BN nanosheets.3. The h-BN nanosheets of claim 2 , wherein the h-BN nanosheets have 6 to 20 layers of BN.4. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets contain less than 0.1 atomic percent metal impurities.5. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets do not contain r-BN claim 1 , as determined by X-ray powder diffraction.6. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets have a full width at half maximum (FWHM) of the X-ray powder diffraction pattern for a dpeak of at most 0.50 degrees.7. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets have a full width at half maximum (FWHM) of the X-ray powder diffraction pattern for a dpeak of at most 0.30 degrees.8. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets have a full width at half maximum (FWHM) of the X-ray powder diffraction pattern for a dpeak of at most 0.50 degrees.9. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets have a full width at half maximum (FWHM) of the X-ray powder diffraction pattern for a dpeak of at most 0.25 degrees.10. The h-BN nanosheets of claim 1 , wherein the h-BN nanosheets have a particle size of 250 to 900 nm.11. A method of making BN nanosheets claim 1 , comprising heating to a temperature of at least 500° C. claim 1 , a mixture comprising: (1) an alkali metal borohydride claim 1 , and (2) an ammonium salt.12. The method of claim 11 , wherein the alkali metal borohydride comprises KBH.13. The method of claim 11 , wherein the ammonium salt comprises NHCl.14. The method of claim 11 , further ...

Nitride semiconductor crystal and method of fabricating the same

Fabricating a high-quality nitride semiconductor crystal at a lower temperature. A nitride semiconductor crystal is fabricated by supplying onto a substrate ( 105 ) a group III element and/or a compound thereof, a nitrogen element and/or a compound thereof and an Sb element and/or a compound thereof, all of which serve as materials, and thereby vapor-growing at least one layer of nitride semiconductor film ( 104 ). A supply ratio of the Sb element to the nitrogen element in a growth process of the at least one layer of the nitride semiconductor film ( 104 ) is set to not less than 0.004.

SEMICONDUCTOR EPITAXIAL STRUCTURE AND METHOD OF FORMING THE SAME

Provided is a semiconductor epitaxial structure including a nucleation layer disposed on a substrate; a buffer layer disposed on the nucleation layer; a semiconductor layer disposed on the buffer layer; a barrier layer disposed on the semiconductor layer; and a cap layer disposed on the barrier layer. In a case where a bowing of the semiconductor epitaxial structure is less than or equal to +/−30 μm, a maximum value or a minimum value of a ratio of a thickness of the buffer layer to a thickness of the semiconductor layer is represented as following formula: Y=aX1−bX2+cX3, X1≥0 nm, X2≥750 nm, X3≥515 nm, wherein X1 is a thickness of the nucleation layer, X2 is the thickness of the buffer layer, X3 is the thickness of the semiconductor layer, a, b and c are constants respectively, and Y is a ratio of X3 to X2. 1. A semiconductor epitaxial structure , comprising:a substrate;a nucleation layer disposed on a substrate;a buffer layer disposed on the nucleation layer;a semiconductor layer disposed on the buffer layer;a barrier layer disposed on the semiconductor layer; and {'br': None, 'i': Y=aX', 'bX', 'cX', 'X', 'X', 'X, '1−2+3, 1≥0 nm, 2≥750 nm, 3≥515 nm,'}, 'a cap layer disposed on the barrier layer, wherein in a case where a bowing of the semiconductor epitaxial structure is less than or equal to +/−30 μm, a maximum value or a minimum value of a ratio of a thickness of the semiconductor layer to a thickness of the buffer layer is represented as a formula ofwherein X1 is a thickness of the nucleation layer, X2 is the thickness of the buffer layer, X3 is the thickness of the semiconductor layer, a, b and c are constants respectively, and Y is the ratio of the thickness of the semiconductor layer to the thickness of the buffer layer (X3/X2) and falls between the maximum value or the minimum value.2. The semiconductor epitaxial structure according to claim 1 , wherein the maximum value of the ratio of the thickness of the semiconductor layer to the thickness of the buffer ...

Indium phosphide single-crystal body and indium phosphide single-crystal substrate

An indium phosphide single-crystal body has an oxygen concentration of less than 1×10 16 atoms·cm −3 , and includes a straight body portion having a cylindrical shape, wherein a diameter of the straight body portion is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm. An indium phosphide single-crystal substrate has an oxygen concentration of less than 1×10 16 atoms·cm −13 , wherein a diameter of the indium phosphide single-crystal substrate is more than or equal to 100 mm and less than or equal to 150 mm or is more than 100 mm and less than or equal to 150 mm.

GROUP-III NITRIDE SUBSTRATE AND METHOD OF MANUFACTURING GROUP-III NITRIDE CRYSTAL

A group-III nitride substrate includes: a base material part of a group-III nitride including a front surface, a back surface, and an inner layer between the front surface and the back surface, wherein the carbon concentration of the front surface of the base material part is higher than the carbon concentration of the inner layer. 1. A group-III nitride substrate comprising: a base material part of a group-III nitride including a front surface , a back surface , and an inner layer between the front surface and the back surface ,wherein the carbon concentration of the front surface of the base material part is higher than the carbon concentration of the inner layer.2. The group-III nitride substrate according to claim 1 , wherein the front surface of the base material part is a surface for growing a group-III nitride crystal thereon.3. The group-III nitride substrate according to claim 1 , wherein the oxygen concentration of the front surface of the base material part is lower than the oxygen concentration of the inner layer.4. The group-III nitride substrate according to claim 2 , wherein the front surface of the base material part is a +c surface claim 2 , and wherein the back surface of the base material part is a −c surface.5. The group-III nitride substrate according to claim 1 , wherein the carbon concentration of the front surface of the base material part is 5×10[atoms/cm] or more claim 1 , and wherein{'sup': 20', '3, 'the oxygen concentration of the front surface of the base material part is 1×10[atoms/cm] or more.'}6. The group-III nitride substrate according to claim 5 , wherein the carbon concentration of the front surface of the base material part is within a range of 1.5×10to 5×10[atoms/cm] claim 5 , and wherein{'sup': 20', '21', '3, 'the oxygen concentration of the front surface of the base material part is in the range of 1×10to 1×10[atoms/cm].'}7. The group-III nitride substrate according to claim 1 , wherein the oxygen concentration of the base ...

Defect reduction in seeded aluminum nitride crystal growth

Bulk single crystal of aluminum nitride (AlN) having an areal planar defect density≦100 cm −2 . Methods for growing single crystal aluminum nitride include melting an aluminum foil to uniformly wet a foundation with a layer of aluminum, the foundation forming a portion of an AlN seed holder, for an AlN seed to be used for the AlN growth. The holder may consist essentially of a substantially impervious backing plate.

A Two-Dimensional AlN Material and its Preparation Method and Application

The present invention discloses a two-dimensional AlN material and its preparation method and application, wherein the preparation method comprises the following steps: (1) selecting a substrate and its crystal orientation; (2) cleaning the surface of the substrate; (3) transferring a graphene layer to the substrate layer; (4) annealing the substrate; (5) using the MOCVD process to introduce H 2 to open the graphene layer and passivate the surface of the substrate; and (6) using the MOCVD process to grow a two-dimensional AlN layer. The preparation method of the present invention has the advantages that the process is simple, time saving and efficient. Besides, the two-dimensional AlN material prepared by the present invention can be widely used in HEMT devices, deep ultraviolet detectors or deep ultraviolet LEDs, and other fields.

METHOD FOR PRODUCING NITRIDE SINGLE CRYSTAL

A first object of the present invention is to provide a method for efficiently growing a nitride single crystal even under low pressure conditions. The present invention relates to a method for producing a nitride single crystal, comprising growing a nitride crystal on the surface of a seed crystal having a hexagonal crystal structure by setting a pressure in a reaction vessel having the seed crystal, a nitrogen-containing solvent, a mineralizer containing a fluorine atom, and a raw material placed therein to 5 to 200 MPa and performing control so that the nitrogen-containing solvent is in at least either a supercritical state or a subcritical state. 1. A method for producing a nitride single crystal , comprising growing a nitride crystal on the surface of a seed crystal having a hexagonal crystal structure by setting a pressure in a reaction vessel having the seed crystal , a nitrogen-containing solvent , a mineralizer containing a fluorine atom , and a raw material placed therein to 5 to 200 MPa and performing control so that the nitrogen-containing solvent is in at least either a supercritical state or a subcritical state.2. The method for producing a nitride single crystal according to claim 1 , wherein the pressure in the reaction vessel in the step of growing a nitride crystal is set to 10 to 200 MPa.3. The method for producing a nitride single crystal according to claim 1 , wherein in the reaction vessel claim 1 , the temperature of a region where the raw material is dissolved is lower than the temperature of a region where a nitride crystal is grown on the surface of the seed crystal.4. The method for producing a nitride single crystal according to claim 1 , wherein the mineralizer contains a halogen atom claim 1 , and the fluorine atom accounts for at least 50% by mole of the halogen atom.5. The method for producing a nitride single crystal according to claim 1 , wherein the pressure in the reaction vessel and the concentration of the fluorine atom ...

MONOLITHIC INTEGRATED LATTICE MISMATCHED CRYSTAL TEMPLATE AND PREPARATION METHOD THEREOF

The present invention provides a monolithic integrated lattice mismatched crystal template and a preparation method thereof by using low-viscosity material, the preparation method for the crystal template includes: providing a first crystal layer with a first lattice constant; growing a buffer layer on the first crystal layer; below the melting point of the buffer layer, growing a second crystal layer and a template layer by sequentially performing the growth process of a second crystal layer and the growth process of a first template layer on the buffer layer, or growing a template layer by directly performing a first template layer growth process on the buffer layer; melting and converting the buffer layer to an amorphous state, performing a second template layer growth process on the template layer grown by the first template layer growth process at the growth temperature above the glass transition temperature of the buffer layer, sequentially growing a template layer until the lattice of the template layer is fully relaxed. Compared to the prior art, the invention has advantages of simple preparation, achieving in various lattice constant material combinations on one substrate and low dislocation density, high crystal quality. 1. A monolithic integrated lattice mismatched crystal template by using low-viscosity material , characterized in that , includes:a first crystal layer having a first lattice constant;a buffer layer located on the first crystal layer, the buffer layer melting and converting to an amorphous state above its melting point;a template layer located on the buffer layer and having a second lattice constant, which differs from the first lattice constant of the first crystal layer; the lattice of the template layer being fully relaxed in the growth at a temperature above the glass transition temperature of the buffer layer.2. The crystal template according to claim 1 , characterized in that claim 1 , further includes:a second crystal layer located ...

METHOD FOR PRODUCING GALLIUM NITRIDE CRYSTAL

A method for producing a gallium nitride crystal includes growing a gallium nitride crystal by dissolving nitrogen in a mixed melt including gallium and sodium, and collecting the gallium separated from an alloy including the gallium and the sodium by reacting the alloy and a liquid that ionizes the sodium and separating sodium ions and the gallium from the alloy. 1. A method for producing a gallium nitride crystal , the method comprising:growing a gallium nitride crystal by dissolving nitrogen in a mixed melt including gallium and sodium; andcollecting the gallium separated from an alloy including the gallium and the sodium by reacting the alloy and a liquid that ionizes the sodium and separating sodium ions and the gallium from the alloy.2. The method for producing a gallium nitride crystal according to claim 1 , wherein the liquid is water having a temperature higher than a melting point of gallium.3. The method for producing a gallium nitride crystal according to claim 2 , wherein the temperature of the water is 50° C. or higher and 90° C. or lower.4. The method for producing a gallium nitride crystal according to claim 1 , wherein the liquid is an acid.5. The method for producing a gallium nitride crystal according to claim 4 , wherein the temperature of the acid is 30° C. or higher and 120° C. or lower.6. The method for producing a gallium nitride crystal according to claim 1 , wherein the collecting is performed when an amount of the gallium by mole relative to a total amount of the gallium and the sodium by mole in the mixed melt after the growing accounts for greater than 0% and 80% or less.7. The method for producing a gallium nitride crystal according to claim 1 , wherein the collecting is performed when an amount of the gallium by mole relative to a total amount of the gallium and the sodium by mole in the mixed melt after the growing accounts for greater than 0% and 64% or less.8. The method for producing a gallium nitride crystal according to claim 1 , ...

Systems and methods for binary single-crystal growth

Systems and methods for growth of multi-component single crystals are described. A first solution is flowed over a surface of a seed crystal coupled to a nozzle such that a plurality of first ions solvated in the first solution and a plurality of second ions in a second solution combine on the surface of the seed crystal to grow the single-crystal thereon. The first solution and the second solution are immiscible. A feed tank is fluidly coupled to the at least one nozzle and includes the first solution. In some aspects, the nozzle is configured to flow both the first solution and the second solution over the seed crystal.