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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Форма поиска

Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 8508. Отображено 100.
11-10-2012 дата публикации

Fabrication method of substrate

Номер: US20120258573A1
Автор: Jing-Yi Yan, Shu-Tang Yeh

A fabricating method of a substrate board is provided. The substrate board includes a substrate having rigid areas and flexible areas, and at least an electronic component disposed on the substrate, wherein each of the rigid areas is thicker than the flexible areas. A patterned high-extensive material may be additionally disposed on the substrate to improve reliability thereof. The rigid areas and the flexible areas may be formed by molds or cutters. By using an above structure, the electronic component is less affected when the substrate is under stress, so that good characteristics are maintained.

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08-11-2012 дата публикации

Circuit module and manufacturing method for the same

Номер: US20120281370A1
Принадлежит: Murata Manufacturing Co Ltd

A circuit module and a manufacturing method for the same, reduce a possibility that a defect area where an electrically conductive resin is not coated may occur in a shield layer. A mother board is prepared. A plurality of electronic components are mounted on a principal surface of the mother board. An insulator layer is arranged so as to cover the principal surface of the mother board and the electronic components. The insulator layer is cut such that grooves and projections are formed in and on the principal surface of the insulator layer and the insulator layer has a predetermined thickness H. An electrically conductive resin is coated on the principal surface of the insulator layer to form a shield layer. The mother board including the insulator layer and the shield layer both formed thereon is divided to obtain a plurality of circuit modules.

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14-02-2013 дата публикации

Printed circuit board having a non-plated hole with limited drill depth

Номер: US20130038998A1
Принадлежит: International Business Machines Corp

A printed circuit board having one or more holes that are controllably drilled to extend into the printed circuit board substrate to a predetermined depth intermediate first and second faces. A mechanical locating pin is received into each of the one or more holes to mechanically align a first component for electronically interfacing with the printed circuit board substrate. A second component is installed on the second face directly opposite of the one or more holes such that the second component is in electronic communication with conductive traces or interconnects formed on the second face directly opposite of the hole.

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04-07-2013 дата публикации

Printed Circuit Board and Method of Manufacturing Same

Номер: US20130168140A1
Принадлежит:

A method of manufacturing a printed circuit board (PCB) is provided. The method includes defining an area on the PCB to be subjected to a controlled-depth milling. The area includes a warp. The method further includes providing a plurality of positioning holes adjacent to edges of the area of the PCB, installing positioning members in the positioning holes so as to fix the PCB on a flat surface of a table of a milling equipment, and milling the area of the PCB. A PCB is also provided. The PCB includes a controlled-depth area containing patterns and having a surface lower than a surface of the PCB. The PCB further includes a plurality of positioning holes formed adjacent to edges of the controlled-depth area. 1. A method of manufacturing a printed circuit board (PCB) , comprising:defining an area on the PCB to be subjected to a controlled-depth milling, wherein the area includes a warp;providing a plurality of positioning holes adjacent to edges of the area of the PCB;installing positioning members in the positioning holes to fix the PCB on a flat surface; andmilling the area of the PCB.2. The method of claim 1 , further comprising:placing a gasket between each of the positioning members and the PCB.3. The method of claim 1 , wherein the number of the positioning holes is at least three claim 1 , and the positioning holes are dispersedly arranged around the area.4. The method of claim 1 , wherein each of the positioning members comprises a fastener and a gasket.5. The method of claim 4 , wherein each of the positioning members comprises one or more gasket claim 4 , a sum of thicknesses of the one or more gasket is more than or equal to 1 mm; and the one or more gasket is manufactured by interweaving a paper pulp and a fiber.6. The method of claim 4 , wherein the gasket has a hardness of 70±5 degrees according to SHORE D hardness scale.7. A method of manufacturing a printed circuit board (PCB) claim 4 , comprising:defining an area on the PCB to be subjected to a ...

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22-08-2013 дата публикации

METHOD OF FABRICATING PRINTED-WIRING BOARD, AND PRINTED-WIRING BOARD

Номер: US20130213705A1
Принадлежит: FUJITSU LIMITED

A method of fabricating a printed-wiring board, includes: forming a through-hole across a thickness of a printed-wiring board, the forming of the through-hole including forming a first opening part having a first diameter, forming a second opening part having a second diameter, and forming a third opening part provided between the first opening part and the second opening part, wherein the second diameter is larger than the first diameter, and the third opening part is formed in a tapered shape whose diameter decreases toward the first opening part from the second opening part. 1. A method of fabricating a printed-wiring board comprising: forming a first opening part having a first diameter,', 'forming a second opening part having a second diameter, and', 'forming a third opening part provided between the first opening part and the second opening part,, 'forming a through-hole across a thickness of a printed-wiring board, the forming of the through-hole including'}wherein the second diameter is larger than the first diameter, and the third opening part is formed in a tapered shape whose diameter decreases toward the first opening part from the second opening part.2. The method of fabricating a printed-wiring board according to claim 1 , further comprising:setting a solder ring provided with a through-hole in a space defined by the second opening part, a space defined by third opening part, or a space defined by both the second opening part and the third opening part;applying solder paste to an interior of the through-hole from a side of the second opening part;inserting a pin of an electronic component into the through-hole from the side of the second opening part; andsubjecting the printed-wiring board to a reflow treatment.3. The method of fabricating a printed-wiring board according to claim 1 , further comprising:applying solder paste to an interior of the through-hole from a side of the second opening part;inserting a pin of an electronic component into the ...

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12-09-2013 дата публикации

COMPOSITE SUBSTRATE, MODULE, AND COMPOSITE-SUBSTRATE PRODUCTION METHOD

Номер: US20130235535A1
Автор: ISEBO Kazuhiro
Принадлежит: MURATA MANUFACTURING CO., LTD.

A composite substrate includes a ceramic substrate including, on at least one surface, a circuit wire on which an electronic component is to be mounted, a plurality of external connection terminals provided on one surface of the ceramic substrate, and a resin layer provided on the one surface of the ceramic substrate. The external connection terminals have a cross sectional area that decreases with increasing distance from the one surface of the ceramic substrate, and end surfaces of the external connection terminals opposite to end surfaces connected to the ceramic substrate are partially or entirely exposed from the resin layer. 1. A composite substrate comprising:a ceramic substrate including, on at least one surface, a circuit wire on which an electronic component is to be mounted;a plurality of external connection terminals provided on one surface of the ceramic substrate; anda resin layer provided on the one surface of the ceramic substrate; whereinthe plurality of external connection terminals have a cross-sectional area that decreases with increasing distance from the one surface of the ceramic substrate, and end surfaces of the plurality of external connection terminals opposite to end surfaces connected to the ceramic substrate are partially or entirely exposed from the resin layer.2. The composite substrate according to claim 1 , wherein a height of the plurality of external connection terminals from the one surface of the ceramic substrate is less than a thickness of the resin layer.3. The composite substrate according to claim 2 , wherein outer peripheral edges of the end surfaces of the plurality of external connection terminals opposite to the end surfaces connected to the ceramic substrate are covered with the resin layer.4. The composite substrate according to claim 1 , wherein plated layers are provided on the end surfaces of the plurality of external connection terminals exposed from the resin layer.5. The composite substrate according to claim 4 ...

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31-10-2013 дата публикации

METHOD FOR MANUFACTURING SUPPORTING BOARDS OF LIGHT EMITTING DIODE MODULES

Номер: US20130283609A1
Автор: HSU SHIH-YUAN, LIN HOU-TE

A method for manufacturing supporting boards of light emitting diode modules comprises the following steps: providing a substrate which defines a plurality of through holes and receiving holes therein; providing an engaging plate which includes a plurality of electrode structures and brackets connecting the electrode structures with a connecting frame, each of the electrode structures forming a receiving cavity and an inserting part; providing a shaping roller assembly whereon the substrate and the engaging plate are wound, stacking the substrate and the engaging plate together, rotating the shaping roller assembly to make the shaping roller assembly press the stacked substrate and engaging plate, such that the through holes of the substrate are received in the receiving cavities of the engaging plate and the inserting parts of the electrode structures are inserted into the receiving holes of the substrate, whereby the supporting boards are formed. 1. A method for manufacturing supporting boards of light emitting diode modules comprising following steps:providing a non-metallic substrate, the substrate defining a plurality of through holes and receiving holes therein;providing a metallic engaging plate, the engaging plate including a plurality of electrode structures and brackets connecting the electrode structures, each of the electrode structures forming a receiving cavity and an inserting part; andproviding a shaping roller assembling, mounting the substrate and the engaging plate on the shaping roller assembly, rotating the shaping roller assembly to stack the substrate and the engaging plate together, and then roller pressing the stacked substrate and engaging plate together, such that the through holes of the substrate are received in the receiving cavities of the engaging plate and the inserting parts of the electrode structures are inserted into the receiving holes of the substrate, whereby a plurality of interconnected supporting boards of light-emitting ...

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02-01-2014 дата публикации

GEOMETRY AND DESIGN FOR CONFORMAL ELECTRONICS

Номер: US20140000108A1
Принадлежит:

A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having at least one stress relief feature, and shaping the two-dimensional, flexible substrate to form the three-dimensional structure, the stress relief features arranged to alleviate stress in the three-dimensional structure. A method of forming a three-dimensional electronic device includes forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure, cutting the two-dimensional, flexible substrate, the cuts being arranged to as to increase a radius of curvature to meet a stress relief parameter when the substrate is shaped, and shaping the two-dimensional, flexible substrate to form the three-dimensional structure. 1. A method of forming a three-dimensional electronic device , comprising:forming at least one electronic device on a two-dimensional, flexible substrate, the electronic device being formed according to a three-dimensional structure;cutting the two-dimensional, flexible substrate, the cuts being located to allow the two-dimensional substrate to be shaped, the cuts having at least one stress relief feature; andshaping the two-dimensional, flexible substrate to form the three-dimensional structure, the stress relief features arranged to alleviate stress in the three-dimensional structure.2. The method of claim 1 , wherein cutting the substrate comprises cutting the substrate such that two cut lines meet to form an apex.3. The method of claim 2 , wherein cutting the substrate comprises cutting a circle centered at the apex claim 2 , the circle forming the stress relief feature.4. The method of claim 3 , ...

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06-02-2014 дата публикации

WIRING SUBSTRATE, MULTI-PIECE WIRING SUBSTRATE ARRAY, AND MANUFACTURING METHOD THEREFOR

Номер: US20140037912A1
Принадлежит: NGK SPARK PLUG CO., LTD.

Provided are a wiring substrate; a multi-piece wiring substrate array; and a method for reliably producing the multi-piece wiring substrate array. The wiring substrate includes a substrate main body, which has first and second main surfaces, side surfaces, a groove surface, and a fracture surface; and a notch which has a concave shape in plan view, and which is provided on a side surface on a side toward the first main surface, wherein, in the side surface having the notch, the boundary between the groove surface and the fracture surface has first curved portions on opposite sides of the notch, the first curved portions being convex toward the first main surface in side view; and also has a second curved portion on a second-main-surface side of the notch, the second curved portion being convex toward the second main surface of the substrate main body in side view. 1. A wiring substrate comprising:a substrate main body which is formed of a plurality of stacked ceramic layers, which has a rectangular shape in plan view, which has a pair of opposite first and second main surfaces, and which has side surfaces each being located between the paired main surfaces, and having a groove surface located on a side toward the first main surface and a fracture surface located between the groove surface and the second main surface; anda notch which has a concave shape in plan view, and which is provided on a side surface at least on a side toward the first main surface so as to extend in a thickness direction of the side surface, the wiring substrate being characterized in that:in the side surface having the notch, the boundary between the groove surface and the fracture surface has first curved portions on opposite sides of the notch, the first curved portions being convex toward the first main surface of the substrate main body in side view;and a second curved portion on a second-main-surface side of the notch, the second curved portion being convex toward the second main ...

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13-02-2014 дата публикации

Method of manufacturing printed circuit board

Номер: US20140042122A1
Принадлежит: Samsung Electro Mechanics Co Ltd

Disclosed herein is a method of manufacturing a printed circuit board, the method including: preparing a base substrate having an insulating layer and a connection pad formed in the insulating layer; forming a photosensitive resist on the insulating layer; forming an opening part of which a side surface has a foot shape by patterning the photosensitive resist; forming a via hole exposing the connection pad by etching the insulating layer exposed by the opening part; and forming a via by filling the via hole.

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02-01-2020 дата публикации

LASER PROCESSING APPARATUS AND LASER PROCESSING METHOD

Номер: US20200004057A1
Принадлежит: Via Mechanics, Ltd.

A laser processing apparatus disclosed in the present application includes: an optical deflection unit capable of changing a deflection direction of and outgoing energy of an incoming laser pulse by changes of a frequency of and an amplitude of a driving signal to be supplied; and a control unit configured to supply driving signals with amplitudes corresponding to respective frequencies. In a laser processing apparatus configured to process a workpiece by leading outgoing laser pulse of the optical deflection unit to the workpiece and irradiating the workpiece with the laser pulse, as the amplitude corresponding to each of the frequencies, the control unit supplies an amplitude having the ratio that is close to the lowest ratio among ratios of the outgoing energy with respect to the incoming energy of the laser pulse at an amplitude having the largest outgoing energy of the optical deflection unit. 1. A laser processing apparatus comprising:an optical deflection unit capable of changing a deflection direction of and outgoing energy of an incoming laser pulse by changes of a frequency of and an amplitude of a driving signal to be supplied; anda control unit configured to supply driving signals with amplitudes corresponding to respective frequencies,wherein the laser processing apparatus is configured to process a workpiece by leading outgoing laser pulse of the optical deflection unit to the workpiece and irradiating the workpiece with the laser pulse, andwherein, as the amplitude corresponding to each of the frequencies, the control unit supplies an amplitude having a ratio that is close to the lowest ratio among ratios of the outgoing energy with respect to the incoming energy of the laser pulse at an amplitude having the largest outgoing energy of the optical deflection unit.2. The laser processing apparatus according to further comprising:a first detection unit configured to detect the incoming energy; anda second detection unit configured to detect the outgoing ...

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13-01-2022 дата публикации

Printed wiring board and method for manufacturing printed wiring board

Номер: US20220015231A1
Автор: Yuji Ikawa
Принадлежит: Ibiden Co Ltd

A method for manufacturing a printed wiring board includes forming metal posts on a conductor circuit formed on a resin insulating layer, forming the outermost resin layer on the resin insulating layer such that the metal posts is embedded in the outermost resin layer, forming a mask at a dam formation site for a dam structure of the outermost resin layer to surround at least part of a pad group including the metal posts on the outermost resin layer, and reducing a thickness of the outermost resin layer exposed from the mask such that end portions of the metal posts are exposed from the outermost resin layer, that the metal posts form the pad group, and that the outermost resin layer has the dam structure forming part of the outermost resin layer and formed to surround at least part of the pad group including the metal posts.

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05-01-2017 дата публикации

ELECTRONIC DEVICE MODULE AND METHOD OF MANUFACTURING THE SAME

Номер: US20170006707A1
Принадлежит: SAMSUNG ELECTRO-MECHANICS CO., LTD.

An electronic device module and method thereof include a first device, a rewiring part, and second devices. The first device is mounted on a surface of a board. The rewiring part is formed along the surface of the board and a contour of the first device. The second devices are mounted on the rewiring part. 1. An electronic device module , comprising:a first device mounted on a surface of a board;a rewiring part formed along the surface of the board and a contour of the first device; andsecond devices mounted on the rewiring part.2. The electronic device module of claim 1 , wherein the rewiring part comprises:an insulating layer attached along one surface of the board and a surface of the first device; anda pattern layer formed on the insulating layer.3. The electronic device module of claim 2 , wherein the insulating layer is a photosensitive insulating film.4. The electronic device module of claim 1 , further comprising:an underfill layer configured to connect a surface of the first device to the surface of the board.5. The electronic device module of claim 4 , wherein the second devices are disposed on at least one of the rewiring part formed on the surface of the board claim 4 , the rewiring part formed on an upper surface of the first device claim 4 , and the rewiring part formed on the underfill layer.6. The electronic device module of claim 4 , wherein an upper end portion of the underfill layer is disposed on a same plane as the upper surface of the first device or closely positioned to the upper surface of the first device.7. The electronic device module of claim 1 , further comprising:a mold part configured to seal the second devices.8. The electronic device module of claim 7 , wherein at least one of the second devices mounted on the rewiring part formed on one surface of the board comprises a thickness greater than a thickness of the first device and thinner than a thickness of the mold part.9. The electronic device module of claim 1 , further comprising: ...

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05-01-2017 дата публикации

Method of manufacturing printed circuit board with embedded electronic components positioned by using solder paste

Номер: US20170006708A1
Принадлежит: Unitech Printed Circuit Board Corp

A method of manufacturing a printed circuit board with embedded electronic components fixed by a solder paste includes: providing a carrier board with a copper foil layer on the carrier board, an insulating layer on the copper foil layer, and an opening on the insulating layer by laser; putting a solder paste into the opening to form a solder paste layer; performing a high-temperature reflow process of the electronic components on the solder paste layer until the solder paste layer is molten; curing the solder paste layer after cooling to fix the components to the center position of the opening; placing the copper foil layer below the electronic components and removing the solder paste layer; and performing copper plating and electroplating processes in an electroplating space to form a plating copper. The cohesion of the molten solder paste pulls the electronic components towards the center to eliminate position offset produced when the electronic components are installed.

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07-01-2016 дата публикации

Method for Producing a Printed Circuit Board with MultiLayer Sub-Areas in Sections

Номер: US20160007450A1

A method for producing a printed circuit board () with multilayer subareas in sections, characterized by the following steps: a) providing at least one conducting foil (′) and application of a dielectric insulating foil (′) to at least one subarea of the conducting foil; b) applying a structure of conducting paths (′) to the insulating layer (′); c) providing one further printed circuit board structure; d) joining of the further printed circuit board structure with the conducting foil (′) plus insulating layer (′) and conducting paths (′) by interposing a prepreg layer (′), and e) laminating the parts joined in step d) under pressing pressure and heat; and a printed circuit board produced according to this method. 1. A method for producing a printed circuit board with multilayer subareas in sections , characterized by:a) providing at least one conducting foil and application of a dielectric insulating foil to at least one subarea of the conducting foil;b) applying a structure of conducting paths to the insulating layer;c) providing one further printed circuit board structure;d) joining of the further printed circuit board structure with the conducting foil plus insulating layer and conducting paths by interposing a prepreg layer, ande) laminating the parts joined in step d) under pressing force and heat.2. A method according to claim 1 , characterized by:a′) providing a first conducting foil and applying a dielectric insulating layer to at least one subarea of the first conducting foil;b′) applying a structure of conducting paths to the insulating layer of the at least one subarea;c′) providing a second conducting foil;d′) providing a prepreg layer and joining of the at least one subassembly as produced in steps a′) and b′) and the at least the second conducting foil, wherein the third prepreg layer is provided between the conducting foils, and the conducting foils are disposed on the outside;e′) laminating the structure assembled in step d′) under pressing force ...

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07-01-2021 дата публикации

INTERCONNECT STRUCTURE

Номер: US20210007215A1

An interconnect structure includes a substrate, a dielectric block, and a conductor. The dielectric block is in the substrate. A dielectric constant of the dielectric block is smaller than a dielectric constant of the substrate, and the dielectric block and the substrate have substantially the same thickness. The conductor includes a first portion extending from a top surface to a bottom surface of the dielectric block and a second portion extending along and contacting the top surface of the dielectric block. 1. An interconnect structure , comprising:a substrate;a dielectric block in the substrate, wherein a dielectric constant of the dielectric block is smaller than a dielectric constant of the substrate, and the dielectric block and the substrate have substantially the same thickness; anda conductor comprising a first portion extending from a top surface to a bottom surface of the dielectric block and a second portion extending along and contacting the top surface of the dielectric block.2. The interconnect structure of claim 1 , wherein the conductor further comprises a third portion extending along and contacting the bottom surface of the dielectric block.3. The interconnect structure of claim 2 , wherein the third portion of the conductor is spaced apart from the substrate.4. The interconnect structure of claim 1 , further comprising a plug laterally surrounded by the conductor.5. The interconnect structure of claim 4 , wherein the plug is electrically conductive.6. The interconnect structure of claim 4 , wherein the plug is electrically non-conductive.7. The interconnect structure of claim 1 , wherein the dielectric block contacts the substrate.8. An interconnect structure claim 1 , comprising:a substrate;a dielectric block in the substrate;a shielding element laterally surrounding the dielectric block; anda conductor extending from a top surface to a bottom surface of the dielectric block, wherein the shielding element and the conductor have substantially ...

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07-01-2021 дата публикации

CONTACT PADS FOR ELECTRONIC SUBSTRATES AND RELATED METHODS

Номер: US20210007224A1
Принадлежит:

Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers. 1. An electronic substrate comprising:a non-conductive layer;a conductive layer on the non-conductive layer, the conductive layer forming at least one contact pad and at least one metal trace;a dielectric layer on the conductive layer such that the at least one metal trace is covered by the dielectric layer and a top surface of the at least one contact pad is coplanar with a top surface of the dielectric layer; andan additional conductive layer that forms at least one mounting pad, wherein a bottom surface of the at least one mounting pad is coplanar with a bottommost face of the electronic substrate.2. The electronic substrate of claim 1 , wherein the conductive layer comprises copper.3. The electronic substrate of claim 1 , wherein the dielectric layer comprises prepreg or a resin coated film.4. The electronic substrate of claim 1 , wherein the dielectric layer is devoid of acrylic-based materials.5. The electronic substrate of claim 1 , wherein a thickness of the at least ...

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07-01-2021 дата публикации

Circuit board

Номер: US20210007226A1
Автор: Chih-Chieh Fu

A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.

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02-01-2020 дата публикации

SYSTEM AND METHOD FOR DESIGN OF HIGH SPEED SIGNALING AND POWER DELIVERY

Номер: US20200008296A1
Принадлежит: Dell Products, L.P.

A printed circuit board (PCB) includes a plurality of layers and electronic components connected to its top surface. The PCB also includes a plurality of trace layers, each located at a respective depth within the layers of the PCB. A plurality of vias provide signal pathways for the trace layer. Upon their manufacture, the vias include a stub portion not necessary for the signal pathways and causing degradation of the integrity of these signal pathways. Embodiments mill the bottom of the PCB to form a variable-depth cavity. The different milling depths of the variable-depth cavity are selected to remove the stub portions of the plurality of vias and the dielectric material between the stubs. By configuring the PCB power planes as the topmost trace layers, decoupling capacitors may be located at the greatest depth of the variable-depth cavity, thus reducing the loop inductance in the power circuit of the PCB. 1. A printed circuit board (PCB) comprising a plurality of layers and a plurality of electronic components connected to the top surface of the PCB , the PCB further comprising:a plurality of trace layers, wherein each trace layer is located at a respective depth within the plurality of layers of the PCB;a plurality of vias, wherein each via provides a signal pathway for one or more of the trace layers, and wherein each via, upon manufacture, comprises a stub portion not necessary for the signal pathway; andwherein the bottom of the PCB is milled to form a variable-depth cavity in the bottom of the PCB, and wherein one or more of the depths of the variable-depth cavity are selected to remove the stub portions of the plurality of vias and to remove the PCB material between the stub portions and wherein a capacitor is connected to the bottom of the PCB within the variable-depth cavity.2. The PCB of claim 1 , wherein each of the via signal pathways connects a trace layer to a respective connector on the top of the PCB and wherein the respective connectors form an ...

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02-01-2020 дата публикации

ELECTRICALLY CONDUCTING ASSEMBLIES

Номер: US20200008297A1
Принадлежит:

The present invention pertains to a process for the manufacture of a multilayer assembly comprising applying at least one patterned substrate onto at least one surface of at least one non-patterned substrate. 19-. (canceled)10. A multilayer assembly comprising: a patterned layer (LMP) made of a core of at least one first metal compound (M1) and, optionally, a shell of at least one second metal compound (M2) at least partially coating said core, said compound (M2) being equal to or different from said compound (M1), and', 'optionally, directly adhered onto at least one surface of layer (LMP), preferably onto one surface of layer (LMP), an optically transparent substrate layer (LT-1); and, '(1) at least one patterned substrate, said patterned substrate comprising an optically transparent substrate layer (LT-2) having an outer surface and an inner surface, said layer (LT-2) being equal to or different from layer (LT-1), if any, and', {'sub': 'ot', 'directly adhered onto one surface of layer (LT-2), an optically transparent non-patterned layer (LMT) made of at least one optically transparent metal compound (M),'}, 'said at least one surface of layer (LT-2) being optionally treated by a radio-frequency glow discharge process in the presence of an etching gas, wherein layer (LMP) of the patterned substrate of the multilayer assembly is directly adhered onto the opposite surface of layer (LMT) of the non-patterned substrate., '(2) at least one non-patterned substrate, said non-patterned substrate comprising12. The multilayer assembly according to claim 10 , said multilayer assembly comprising:a patterned layer (LMP) made of a core of at least one first metal compound (M1) and, optionally, a shell of at least one second metal compound (M2) at least partially coating said core, said compound (M2) being equal to or different from said compound (M1),{'sub': 'ot', 'directly adhered onto one surface of layer (LMP), an optically transparent non-patterned layer (LMT) made of at ...

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12-01-2017 дата публикации

SMART PIXEL SURFACE MOUNT DEVICE PACKAGE

Номер: US20170009971A1

Emitter panels and displays utilizing solid state packages and methods for fabricating the same are disclosed. One emitter panel comprises a raised barrier on a submount defining a plurality of cavities, each cavity having at least one LED in a pixel area. The panel is capable of receiving electrical signals for independently controlling the emission from the emitters. Solid state displays utilize the emitter panels mounted in relation to one another to generate a message or image. The panels comprise multiple pixels each having at least one light emitter, with each panel capable of receiving electrical signals for independently controlling the emission of at the pixels. 1. A method for fabricating solid state emitter panel , comprising:providing a barrier on a submount such that a plurality of pixel areas are defined;affixing at least one light emitter in each of said pixel areas;electrically connecting said emitters to said submount;at least partially covering said light emitters in said pixel areas with an encapsulant.2. The method of claim 1 , wherein said barrier is provided on said submount using an additive process.3. The method of claim 1 , wherein said barrier is a mask.4. The method of claim 1 , further comprising molding said barrier into a grid shape and affixing it to said submount.5. The method of claim 1 , further comprising stamping said barrier into a grid shape and affixing it to said submount.6. The method of claim 1 , further comprising drilling said barrier into a grid shape and affixing it to said submount.7. The method of claim 1 , wherein said barrier comprises a polymer material.8. The method of claim 1 , wherein said barrier comprises a polyphthalamide (PPA) material.9. The method of claim 1 , wherein said barrier comprises a printed circuit board (PCB) material.10. The method of claim 1 , further comprising applying an adhesive to said submount and affixing said barrier to said submount.11. The method of claim 10 , further comprising B- ...

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11-01-2018 дата публикации

METAL PCB ASSEMBLY FOR VEHICLE LAMP AND MANUFACTURING METHOD THEREOF

Номер: US20180010775A1
Автор: SUNG Jaedeok
Принадлежит: SEJONG MATERIALS CO., LTD

The present invention relates to a manufacturing method of a metal PCB assembly for a vehicle lamp and the metal PCB assembly made by the method. The manufacturing method of a metal PCB assembly for a vehicle lamp comprises a step S in which a material of a metal PCB is prepared, a step S in which a circuit pattern and a plurality of unit patterns are formed and cut from the material of a metal PCB to form a metal PCB a step S in which a bending groove is formed on a bottom surface of the metal PCB a step S in which each of the unit patterns is protruded forward around the bending groove of the metal PCB such that each of the unit patterns is bent to be inclined from the metal PCB and a step S in which a stepwise injection molded products is coupled with the metal PCB while the unit pattern is protruded. 114. A metal PCB assembly comprising: a metal printed circuit board (PCB) ;{'b': 16', '14', '20', '20', '20', '14', '20', '14', '16', '14', '24', '14', '20', '16', '14, 'i': a,', 'b,', 'c', 'd', 'd, 'at least one unit pattern which is arranged on the metal PCB and has three surfaces cut from the metal PCB and one rest surface connected to the metal PCB , wherein the unit pattern is protruded to be inclined at a predetermined angle from the metal PCB by forming a bending groove on a bottom surface of the metal PCB , which corresponds to the one rest surface , in a width direction to a predetermined depth, and pushing the unit pattern from the metal PCB ; and'}{'b': 12', '14', '26', '16', '14, 'an injection molded product which is coupled with the metal PCB and includes a support portion which is protruded from a horizontal plane to support the unit pattern at the predetermined angle from the metal PCB .'}2. A manufacturing method of a metal PCB assembly comprising:{'b': 100', '14, 'a step S in which a material of a metal PCB is prepared;'}{'b': 110', '22', '16', '14', '14, 'a step S in which a circuit pattern and a plurality of unit patterns are formed and cut from ...

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09-01-2020 дата публикации

FRAME ASSEMBLY AND METHOD FOR MANUFACTURING SAME

Номер: US20200014005A1
Принадлежит:

Provided is a frame assembly for fixing a plurality of stacked battery cells. The frame assembly may include: a frame including an upper surface, a first side surface connected to a first end of the upper surface and a second side surface connected to a second end of the upper surface, the frame being configured to enclose the plurality of battery cells; a plurality of first bus bars disposed on the first side surface; a plurality of second bus bars disposed on the second side surface; and a flexible printed circuit board disposed along the upper surface, the first side surface, and the second side surface of the frame, the flexible printed circuit board being configured to sense the plurality of battery cells. 1. A frame assembly for fixing a plurality of stacked battery cells , the frame assembly comprising:a frame including an upper surface, a first side surface connected to a first end of the upper surface and a second side surface connected to a second end of the upper surface, the frame being configured to enclose the plurality of stacked battery cells;a plurality of first bus bars disposed on the first side surface;a plurality of second bus bars disposed on the second side surface; anda flexible printed circuit board disposed along the upper surface, the first side surface, and the second side surface of the frame, the flexible printed circuit board being configured to sense the plurality of stacked battery cells, a circuit portion disposed on the upper surface;', 'a first connection circuit portion extending from a first end of the circuit portion and coupled to the plurality of first bus bars; and', 'a second connection circuit portion extending from a second end of the circuit portion and coupled to the plurality of second bus bars., 'wherein the flexible printed circuit board comprises2. The frame assembly of claim 1 , wherein a first surface of the first connection circuit portion is bonded to the plurality of first bus bars claim 1 , and a first surface ...

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14-01-2016 дата публикации

AN ELECTRONIC SUB-ASSEMBLY, A METHOD FOR MANUFACTURING THE SAME, AND A PRINTED CIRCUIT BOARD WITH ELECTRONIC SUB-ASSEMBLY

Номер: US20160014901A1
Принадлежит:

Electronic sub-assembly comprising a carrier layer and a mounting area with at least one electronic component, wherein the carrier layer has at least in portions a material with a low coefficient of thermal expansion to adjust the coefficient of thermal expansion of the carrier layer, and wherein at least one compensation layer is provided on the carrier layer adjacent to the installation area, on which compensation layer an electrically insulating, thermally conductive layer and at least one electrically conductive layer are provided. 1. An electronic sub-assembly comprising:a carrier layer and a mounting area with at least one electronic component;the carrier layer has at least in portions a material with a low coefficient of thermal expansion to adjust the coefficient of thermal expansion of the carrier layer; andat least one compensation layer is provided on the carrier layer adjacent to the mounting area, on which compensation layer an electrically insulating, thermally conductive layer and at least one electrically conductive layer are provided.2. An electronic sub-assembly comprising;a carrier layer of electrically conductive material, the carrier layer having at least one electronic component mounted on at least one mounting area and at least one compensation layer being provided adjacent to the mounting area on the carrier layer, on which compensation layer an electrically insulating, thermally conductive layer and at least one electrically conductive layer are provided; andthe carrier layer has, at least in one section beneath the at least one mounting area, a coefficient of thermal expansion adjusted to that of the mounted component.3. The electronic sub-assembly according to claim 1 , wherein the carrier layer has a core layer of electrically conductive material with a first layer of electrically conductive material applied to both sides.4. The electronic sub-assembly according to claim 1 , wherein a core layer of the carrier layer is at least in ...

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10-01-2019 дата публикации

Plasma Etched Catalytic Laminate with Traces and Vias

Номер: US20190014666A1
Принадлежит: Sierra Circuits, Inc.

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and blanket surface plasma etch operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist. 1) A process for forming conductive traces on a catalytic laminate , the catalytic laminate having a resin rich surface with insufficient density of catalytic particles for surface electroless plating , the catalytic laminate having catalytic particles dispersed below a catalytic particle exclusion depth sufficient for electroless plating when exposed , the process comprising:drilling holes in the catalytic laminate;etching the external surfaces of the catalytic laminate until the catalytic particles are exposed;electroless plating the catalytic laminate until a conductive metal is plated on the external surfaces and also inside the drilled holes;applying a pattern mask to the external surfaces of the catalytic laminate;electroless plating the external surfaces of the catalytic laminate;stripping the pattern mask;quick etching the circuit board sufficient to remove any previously masked electroless conductive metal.2) The process of where the electroless plating and the electroplating deposit copper.3) The process of where the electroplate deposition thickness is greater than the thickness of the electroless deposition.4) The process of where the pattern mask is dry film.5) The process of where the pattern mask is liquid photoresist.6) The process of where plasma etching the external surfaces uses at least one of: a reactive plasma claim 1 , a chemical ...

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14-01-2021 дата публикации

RESIN SUBSTRATE AND ELECTRONIC DEVICE

Номер: US20210014962A1
Автор: KAMITSUBO Yusuke
Принадлежит:

A resin substrate includes a resin body, an interlayer connection conductor provided in the resin body, and a conductor pattern bonded to the interlayer connection conductor. The resin body includes a gap provided adjacent to or in a vicinity of a bonding portion of the interlayer connection conductor and the conductor pattern, and a contact portion that contacts the interlayer connection conductor. 1. A resin substrate comprising:a resin body including a gap;an interlayer connection conductor provided in the resin body; anda conductor pattern bonded to the interlayer connection conductor; wherein a contact portion that contacts the interlayer connection conductor;', 'a first resin layer with a first thermal expansion coefficient; and', 'a second resin layer with a second thermal expansion coefficient;, 'the resin body includesthe first thermal expansion coefficient is greater than the second thermal expansion coefficient;the gap is provided adjacent to or in a vicinity of a bonding portion in which the interlayer connection conductor and the conductor pattern are bonded to each other;the gap is provided in the first resin layer; andthe contact portion is provided in the second resin layer.2. The resin substrate according to claim 1 , whereinthe resin substrate includes a plurality of resin bodies;the plurality of the resin bodies are stacked so that second resin layers of the plurality of resin bodies are in contact with each other and interlayer connection conductors of the plurality of the resin bodies are overlapped with each other; andportions in which the interlayer connection conductors of the plurality of the resin bodies are bonded so as to come into contact with each other are bonded by a bonding layer.3. The resin substrate according to claim 1 , wherein the resin body includes a plurality of gaps.4. The resin substrate according to claim 1 , wherein the gap provided adjacent to or in a vicinity of the bonding portion of the interlayer connection ...

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14-01-2021 дата публикации

METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND RESIN SHEET WITH INORGANIC LAYER

Номер: US20210014974A1
Автор: TSURUI Kazuhiko
Принадлежит: AJINOMOTO CO., INC.

Provided is a technique that can achieve an insulating layer with small surface undulations and can suppress a haloing phenomenon in manufacturing a printed wiring board even when using a thin resin composition layer. Specifically, provided is a method for manufacturing a printed wiring board that includes the steps of: (A) preparing a resin sheet with an inorganic layer including (i) a support with an inorganic layer including an inorganic layer, a support in contact with the inorganic layer, and a release layer and (ii) a resin composition layer in contact with the release layer of the support with an inorganic layer; (B) laminating the resin sheet with an inorganic layer onto an internal layer substrate so that the resin composition layer of the resin sheet with an inorganic layer is in contact with the internal layer substrate; (C) curing the resin composition layer to form an insulating layer; and (D) perforating the insulating layer. 1. A method for manufacturing a printed wiring board , comprising: (i) a support with an inorganic layer comprising (a) an inorganic layer, (b) a support in contact with said inorganic layer, and (c) a release layer; and', '(ii) a resin composition layer in contact with said release layer of said support with an inorganic layer;, '(A) preparing a resin sheet with an inorganic layer comprising(B) laminating said resin sheet with an inorganic layer onto an internal layer substrate so that said resin composition layer of said resin sheet with an inorganic layer is in contact with said internal layer substrate;(C) curing said resin composition layer to form an insulating layer; and(D) perforating said insulating layer.2. The method according to claim 1 , wherein in said support with an inorganic layer claim 1 , said release layer is in contact with said inorganic layer.3. The method according to claim 1 , wherein in said support with an inorganic layer claim 1 , said release layer is in contact with said support.4. The method ...

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18-01-2018 дата публикации

Wiring on Curved Surfaces

Номер: US20180017813A1
Принадлежит: Spy Eye LLC

A process for creating wiring on a curved surface, such as the surface of a contact lens, includes the following. Creating a groove or trench in the curved surface. Forming a seed layer on the surface and on the groove. Removing the seed layer from the surface while leaving some or all of it in the groove. Depositing conductive material in the groove. Preferably, the deposited conductive material is thicker than the seed layer.

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18-01-2018 дата публикации

Chip packaging and composite system board

Номер: US20180019178A1

A chip packaging includes a substrate, a first chip, a molding material, a first circuit, and a second circuit. The substrate includes a bottom surface, a first top surface disposed above the bottom surface with a first height, and a second top surface disposed above the bottom surface with a second height. The first height is smaller than the second height. The first chip is disposed on the first top surface. The molding material is disposed on the substrate and covers the first chip. The first and second circuits are disposed on the molding material, and are respectively and electrically connected to the first chip and the second top surface of the substrate. The substrate is made of copper material with huge area and has the properties of high current withstand capacity and high thermal efficiency. The second top surface protects the first chip from damage.

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21-01-2016 дата публикации

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

Номер: US20160021736A1
Принадлежит: SAMSUNG ELECTRO-MECHANICS CO., LTD.

There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board according to an exemplary embodiment of the present disclosure includes: a first insulating layer; a second insulating layer formed below the first insulating layer; a via pad formed on an upper surface of the second insulating layer and formed so as to be buried in the second insulating layer; a double via formed on an upper surface of the via pad, formed so as to penetrate through the first insulating layer, and including an auxiliary via and a first via; and a second via formed on a lower surface of the via pad and formed so as to penetrate through the second insulating layer.

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21-01-2016 дата публикации

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

Номер: US20160021744A1
Принадлежит:

A printed circuit board includes a first circuit pattern embedded in an insulating layer so that an upper surface of the first circuit pattern is exposed to one surface of the insulating layer, a coupling pad embedded in the insulating layer to come into contact with a lower surface of the first circuit pattern, and a bump pad formed on the upper surface of the first circuit pattern to protrude from one surface of the insulating layer. 1. A printed circuit board comprising:a first circuit pattern embedded in an insulating layer wherein an upper surface of the first circuit pattern is exposed to an upper surface of the insulating layer;a coupling pad embedded in the insulating layer to come into contact with a lower surface of the first circuit pattern; anda bump pad formed on the upper surface of the first circuit pattern to protrude above the upper surface of the insulating layer.2. The printed circuit board of claim 1 , wherein a lower surface of the bump pad adjacent to the first circuit pattern is wider than an area of an upper surface of the bump pad.3. The printed circuit board of claim 1 , wherein a diameter of the bump pad is increased in a direction toward the insulating layer.4. The printed circuit board of claim 1 , wherein a width of a lower surface of the bump pad adjacent to the first circuit pattern is the same as or wider than a width of the first circuit pattern.5. The printed circuit board of claim 1 , wherein a width of the coupling pad is wider than a width of the first circuit pattern.6. The printed circuit board of claim 1 , wherein the coupling pad comes into contact with a portion of the lower surface of the first circuit pattern.7. The printed circuit board of claim 1 , wherein the upper surface of the first circuit pattern exposed to the upper surface of the insulating layer is positioned on the same level or at a level lower than the upper surface of the insulating layer.8. A method of manufacturing a printed circuit board claim 1 , the ...

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18-01-2018 дата публикации

Method for manufacturing a printed circuit board element and printed circuit board element

Номер: US20180020552A1
Автор: KHOSHAMOUZ Ali
Принадлежит:

The method for manufacturing a printed circuit board element () having an inlay () and a current sensor () for determining a current flowing in the inlay (), wherein, for the improvement of the positional accuracy of the inlay () relative to the current sensor (), the method comprises the following steps: 1. A method for manufacturing a printed circuit board element having an inlay and a current sensor for determining a current flowing through the inlay , wherein , for the improvement of the positional accuracy of the inlay relative to the current sensor , the method comprises the following steps:providing a layer of printed circuit board material having a recess;providing an inlay having an inlay outline;inserting the inlay in the recess;embedding the inlay in the recess;completing and laminating the layered printed circuit board structure;applying at least two alignment markings on an uppermost printed circuit board layer;forming a defined cross-section tapering on the inlay outline, the tapering being aligned with the at least two alignment markings;applying an assembly marking for a current sensor on an uppermost printed circuit board layer, the assembly marking being aligned with the at least two alignment markings.2. The method according to claim 1 , wherein between the steps of forming the cross-section tapering and applying the current sensor claim 1 , further printed circuit board layers are applied and laminated.3. The method according to claim 1 , wherein forming of the cross-section tapering is performed by means of milling claim 1 , laser cutting or similar.4. The method according to claim 1 , wherein the embedding of the inlay is performed by means of lamination claim 1 , compression or the like.5. The method according to claim 1 , wherein the cross-section tapering is performed by means of at least one indentation or slot.6. The method according to claim 5 , wherein the cross-section tapering is performed by means of a single-sided indentation or slot ...

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25-01-2018 дата публикации

Drill structure

Номер: US20180021861A1
Принадлежит: TCT GLOBAL Ltd

A drill structure includes a shank part and a flute part arranged on one end of the shank part. A chisel edge is formed on the front end of the flute part and two drill blades with tilt directions toward the shank part are formed on the two sides of the chisel edge. Every drill blade includes a primary relief surface with a cutting edge and a secondary relief surface with a knife-back edge. At least one assist relief surfaces is formed on the inner wall of one of the two helical grooves and an included angle is between the assist relief surface and the horizontal plane. The assist relief surface is connected with the cutting edge of one drill blade and portion of the knife-back edge of another drill blade.

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16-01-2020 дата публикации

MATING BACKPLANE FOR HIGH SPEED, HIGH DENSITY ELECTRICAL CONNECTOR

Номер: US20200022252A1
Принадлежит: Amphenol Corporation

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns. 1. A printed circuit board comprising:a plurality of layers including attachment layers and routing layers; and first and second signal vias extending through the attachment layers and connecting to respective signal traces on at least one of the routing layers;', 'ground vias extending through at least the attachment layers; and', 'non-plated air holes associated with each of the first and second signal vias and extending to a predetermined depth in the plurality of layers., 'via patterns formed in one or more of the plurality of layers, each of the via patterns comprising2. The printed circuit board as defined in claim 1 , wherein the non-plated air holes are located on opposite sides of the first and second signal vias.3. The printed circuit board as defined in claim 1 , wherein the non-plated air holes have smaller diameters than the first and second signal vias.4. The printed circuit board as defined in claim 1 , wherein the non-plated air holes extend through the attachment layers of the plurality of layers.5. The printed circuit board as defined in claim 1 , wherein one or more of the attachment layers includes a ground plane and wherein the ground plane is removed in an area around the first and second signal vias to form an antipad.6. ...

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16-01-2020 дата публикации

MODIFIED PCB VIAS TO PREVENT BURN EVENTS

Номер: US20200022257A1
Принадлежит:

A fusible via is disclosed. The fusible via includes an upper contact. The fusible via further includes a handle portion having a first end and a second end. The upper contact is disposed on the first end of the handle portion. The handle portion comprises an alloy and a blowing agent. The alloy melts above a predefined solder reflow temperature but below a thermal degradation temperature of the blowing agent. The fusible via further includes a lower contact disposed on the second end of the handle portion. 1. A method for forming a fusible via in a printed circuit board (PCB) structure having two or more metallization layers , comprising:forming a hole in the PCB structure that penetrates an upper metallization layer and an insulation layer disposed below the upper metallization layer of the PCB structure, but not a lower metallization layer of the PCB structure disposed below the insulating layer;filling the hole with a fusible material comprising an alloy and a blowing agent to form a handle portion, wherein the alloy melts above a predefined solder reflow temperature but below a thermal degradation temperature of the blowing agent;forming holes in the upper metallization layer and the lower metallization layer that are wider than the hole containing the fusible material; andfilling the holes with an interconnect metal to form upper and lower contacts, respectively.2. The method of claim 1 , further comprising:drilling at least one vent hole in at least one of the upper contact and the lower contact that extends from an external surface of at least one of the upper contact and lower contact to the handle portion to permit blowing agent gases to escape from the handle portion.3. The method of claim 1 , wherein a length and a diameter of the handle portion are variable to accommodate different blowing currents.4. The method of claim 1 , wherein the blowing agent is one or more of Phthalic anhydride claim 1 , Terephthalic acid claim 1 , or Adamantane.5. The method ...

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21-01-2021 дата публикации

WALL FOR ISOLATION ENHANCEMENT

Номер: US20210022238A1
Принадлежит:

A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element. 1. A circuit assembly , comprising:a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region;a circuit element disposed within the circuit element region of the PCB; anda Faraday wall comprising a solid, unitary body having a same shape as the trench and being disposed within the trench to surround an entirety of the circuit element.2. The circuit assembly according to claim 1 , wherein the circuit element comprises one or more of a microwave circuit claim 1 , an antenna and a radiator.3. The circuit assembly according to claim 1 , wherein the PCB has multiple layers.4. The circuit assembly according to claim 1 , wherein one or more of the multiple layers defines the trench and the Faraday wall traverses the one or more of the multiple layers within the trench.5. The circuit assembly according to claim 1 , wherein the Faraday wall comprises a conductive material.6. The circuit assembly according to claim 1 , wherein the Faraday wall has a polygonal shape within a plane of the PCB.7. The circuit assembly according to claim 6 , wherein the Faraday wall comprises one or more of corners with complex geometrical shapes claim 6 , chamfered corners and sides comprising inwardly protruding features.8. The circuit assembly according to claim 1 , wherein the Faraday wall is one or more of soldered and press-fit into a secured position within the trench.9. The circuit assembly according to claim 1 , wherein:the trench is defined as multiple trenches ...

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26-01-2017 дата публикации

FLYING TAIL TYPE RIGID-FLEXIBLE PRINTED CIRCUIT BOARD

Номер: US20170027055A1
Принадлежит: SAMSUNG ELECTRO-MECHANICS CO., LTD.

The present invention relates to a method of manufacturing a flying tail type rigid-flexible printed circuit board and a flying tail type rigid-flexible printed circuit board manufactured by the same and implement a flying tail type rigid-flexible printed circuit board with improved filling property by providing a method of manufacturing a flying tail type rigid-flexible printed circuit board including: providing a base substrate having a first inner circuit pattern layer on both surfaces; laminating a first insulating layer on a rigid domain R of the base substrate; laminating at least one circuit layer, which extends over the entire domain of the base substrate, on the first insulating layer; and removing a portion of the circuit layer, which corresponds to a flexible domain F, wherein the circuit layer includes a second insulating layer and a flying tail type rigid-flexible printed circuit board manufactured by the same. 1. A rigid-flexible printed circuit board comprising:a core layer including a flexible film having a first circuit pattern layer on one or both surfaces, the flexible film has an area corresponding to an entire area of the rigid-flexible printed circuit board;a first insulating layer laminated on a rigid portion of the core layer to expose the first circuit pattern layer on a flexible portion of the core layer and covering the first circuit pattern layer on a rigid portion of the core layer;a metal pattern disposed on the first insulating layer to be positioned on the rigid portion, which is adjacent to the flexible portion;a second circuit pattern layer disposed on the first insulating layer; anda second insulating layer covering the second circuit pattern layer and the metal pattern.2. The rigid-flexible printed circuit board according to claim 1 , wherein the metal pattern is separated from the second circuit pattern layer.3. The rigid-flexible printed circuit board according to claim 1 , further comprising:a coverlay attached to the first ...

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25-01-2018 дата публикации

Interconnect structure and method of manufacturing the same

Номер: US20180027648A1

A method for manufacturing an interconnect structure is provided. The method includes the following steps. An opening is through a substrate. A low-k dielectric block is formed in the opening. At least one first via is formed through the low-k dielectric block. A first conductor is formed in the first via.

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24-01-2019 дата публикации

PRINTED CIRCUIT BOARD FABRICATION PROCESSES AND ARCHITECTURE INCLUDING POINT-OF-USE DESIGN AND FABRICATION CAPACITY EMPLOYING ADDITIVE MANUFACTURING

Номер: US20190029117A1
Автор: Vetter Stephen J.

Apparatus and methods are provided which enable a capacity to remotely enable research, development, and production tasks to be done at a point of use (POU) as well as permitting some design tasks to be done remotely with manufacturing employing, for example, additive manufacturing (AM), for printed circuit boards (PCB) as well as other electrical items. In particular, some embodiments are directed towards facilitating POU on-site manufacturing capacity with a remote or distributed requirements/design process. 1. A method of manufacturing comprising:determining a plurality of design attributes for a printed circuit board (PCB) that fulfills requirements at a predetermined point of use (POU) where the PCB will be manufactured and installed or used and recording said plurality of design attributes on a first recording medium section;providing a first and second design software system, an additive manufacturing (AM) system comprising at least a first laser, and an oven for receiving and processing the PCB as it is manufactured at the POU on a mobile platform;creating a first PCB design based on said plurality of design attributes from said first recording medium using the first design software and saving an output from said first design software in a first data file within a second recording medium section comprising a plurality of two dimensional (2D) PCB structure data attributes;altering the first data file stored on the second recording medium to add three dimensional (3D) PCB structure data attributes to the first data file contents and saving the altered first data file contents into a second data file on a third recording medium;inputting the second data file into the AM system and manufacturing a substrate using the AM system based on the second data file, said substrate comprising a plurality of apertures comprising apertures associated with electrical conductive paths and pads;applying a conductive paste to said plurality of apertures associated with said ...

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28-01-2021 дата публикации

METHODS OF MANUFACTURING A HIGH IMPEDANCE SURFACE (HIS) ENHANCED BY DISCRETE PASSIVES

Номер: US20210029836A1
Принадлежит:

In one or more embodiments, a method of manufacturing a high impedance surface (HIS) apparatus comprises patterning a first conducting layer on a core to form a first set of conducting pads, and patterning a second conducting layer on the core to form a second set of conducting pads. The method further comprises applying solder paste to each of the conducting pads of the second set of conducting pads. Also, the method comprises placing chip capacitors on the solder paste on the second set of conducting pads. In addition, the method comprises applying underfill between the chip capacitors. Also, the method comprises applying solder paste to each of the conducting pads of the first set of conducting pads. In addition, the method comprises placing chip inductors on the solder paste on the first set of conducting pads. Further, the method comprises applying underfill between the chip inductors. 1. A method of manufacturing a high impedance surface (HIS) apparatus , wherein the method comprises:patterning a first conducting layer on a core to form a first set of conducting pads;patterning a second conducting layer on the core to form a second set of conducting pads;drilling cavities that run through the first set of conducting pads, the core, and the second set of conducting pads;forming a via in each of the cavities;plating a surface of each of the conducting pads of the first set of conducting pads and the second set of conducting pads;applying solder paste to each of the conducting pads of the second set of conducting pads;placing chip capacitors on the solder paste on the second set of conducting pads;reflowing the solder paste on the second set of conducting pads;applying underfill between the chip capacitors;applying solder paste to each of the conducting pads of the first set of conducting pads;placing chip inductors on the solder paste on the first set of conducting pads;reflowing the solder paste on the first set of conducting pads; andapplying underfill between ...

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04-02-2016 дата публикации

Printed circuit board and manufacturing method thereof

Номер: US20160037620A1
Принадлежит: Samsung Electro Mechanics Co Ltd

There is provided a printed circuit board including: a core layer having a cavity formed therein; a heat radiation body included in the cavity; an insulating layer provided on an upper surface and a lower surface of the core layer; and a heat dissipating via penetrating through the insulating layer to be in contact with the heat radiation body and dissipating heat externally, wherein the heat radiation body includes an insulating plate, a first metal block formed on an upper surface of the insulating plate, and a second metal block formed on a lower surface of the insulating plate.

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01-02-2018 дата публикации

Ceramic and polymer composite, methods of making, and uses thereof

Номер: US20180035538A1
Принадлежит: Corning Inc

A ceramic and polymer composite including: a first continuous phase comprising a sintered porous ceramic having a solid volume of from 50 to 85 vol % and a porosity or a porous void space of from 50 to 15 vol %, based on the total volume of the composite; and a second continuous polymer phase situated in the porous void space of the sintered porous ceramic. Also disclosed is a composite article, a method of making the composite, and a method of using the composite.

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01-02-2018 дата публикации

PATTERNED LAYER COMPOUND

Номер: US20180035548A1
Принадлежит:

The invention relates to a method in which a layer compound having a substrate having an adhesive layer applied thereon at least in regions is provided. An opening extending through the substrate and through the adhesive layer is introduced therein in order to obtain a patterned layer compound. A microchip having an active region arranged on the outside of the chip is provided, wherein the active region is a sensor area or a radiation coupling-out area. In addition, in accordance with the invention, the microchip is arranged on the adhesive layer of the patterned layer compound such that the active region is exposed through the opening. 1. A method comprising:providing a layer compound comprising a substrate comprising an adhesive layer applied thereon at least in regions,introducing an opening extending through the substrate and the adhesive layer in order to acquire a patterned layer compound,providing a microchip comprising an active region arranged on the outside of the chip, wherein the active region is a sensor area or a radiation coupling-out area, andarranging the microchip on the adhesive layer of the patterned layer compound such that the active region is exposed through the opening.2. The method in accordance with claim 1 , wherein the microchip is arranged on the adhesive layer of the patterned layer compound such that the active region claim 1 , in a top view on the opening claim 1 , lies within the projection of the cross-sectional area of the opening.3. The method in accordance with claim 1 , wherein introducing the opening comprises patterning the substrate and the adhesive layer in a joint process step.4. The method in accordance with claim 1 , wherein the microchip is arranged on the layer compound by means of an anisotropic conductive adhesive layer (ACA or ACF) using a flip-chip mounting technique claim 1 , wherein the anisotropic conductive adhesive layer is applied on the substrate such that the anisotropic conductive adhesive layer contacts ...

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08-02-2018 дата публикации

ENTRY SHEET FOR DRILLING AND METHOD FOR DRILLING PROCESSING USING SAME

Номер: US20180036898A1
Принадлежит: MITSUBISHI GAS CHEMICAL COMPANY, INC.

An entry sheet for drilling comprising: a metallic foil; and a layer of a resin composition, the layer formed on the metallic foil without interposing an adhesion layer, wherein the surface of the layer of the resin composition, the surface being in contact with the metallic foil, has a dispersion term γSD of surface free energy in a range from 27.0 to 37.0 mJ/mand a polar term γSP of the surface free energy in a range from 0 to 5.0 mJ/m. 1. An entry sheet for drilling comprising:a metallic foil; anda layer of a resin composition, the layer formed on the metallic foil without interposing an adhesion layer, wherein{'sup': 2', '2, 'a surface of the layer of the resin composition, the surface being in contact with the metallic foil, has a dispersion term γSD of a surface free energy in a range from 27.0 to 37.0 mJ/mand a polar term γSP of the surface free energy in a range from 0 to 5.0 mJ/m.'}2. The entry sheet for drilling according to claim 1 , wherein the resin composition comprises:a water-insoluble resin (A); anda water-soluble resin (B).3. The entry sheet for drilling according to claim 2 , wherein the water-insoluble resin (A) has the dispersion term γSD of the surface free energy in a range from 32.0 to 38.1 mJ/mand the polar term γSP of the surface free energy in a range from 0 to 6.0 mJ/m.4. The entry sheet for drilling according to claim 2 , wherein the water-insoluble resin (A) is one or more selected from the group consisting of polyurethane resins claim 2 , polyester resins claim 2 , acrylic-based resins claim 2 , and polyolefin-based resins.5. The entry sheet for drilling according to claim 2 , wherein the water-soluble resin (B) is one or more selected from the group consisting of polyethylene oxide; polypropylene oxide; cellulose derivatives; polytetramethylene glycol; polyethylene glycol; polypropylene glycol; monoether compounds of polyoxyethylene; polyoxyethylene monostearate; polyoxyethylene sorbitan monostearate; polyglycerin monostearate ...

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31-01-2019 дата публикации

Interconnection including a cable assembly and a board assembly, a board assembly for an interconnection and a method for making an interconnection

Номер: US20190036245A1
Принадлежит: MD ELEKTRONIK GMBH

An interconnection includes a cable assembly and a board assembly. The cable assembly includes a cable having an inner conductor. The board assembly comprises an intermediate layer disposed between first and second outer layers, a recess disposed between the first and second outer layers so as to form a cable-receiving space at a first side edge, and a first inner-conductor contact opening extending through at least one of the first and second outer layers and opening into the cable-receiving space. The inner conductor is inserted at the first side edge into the cable-receiving space and is disposed at an offset in a longitudinal direction relative to the first inner-conductor contact opening. The inner conductor is electrically conductively soldered via a first soldered inner-conductor connection to a first inner-conductor connection region of the first and/or second outer layers, at least in a region of the first inner-conductor contact opening.

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17-02-2022 дата публикации

Passive device packaging structure embedded in glass medium and method for manufacturing the same

Номер: US20220053644A1
Принадлежит: Zhuhai Access Semiconductor Co Ltd

A passive device packaging structure embedded in a glass medium according to an embodiment of the present disclosures includes a glass substrate and at least one capacitor embedded in the glass substrate. The capacitor includes an upper electrode, a dielectric layer, and a lower electrode. The glass substrate is provided on its upper surface with a cavity, the dielectric layer covers a surface of the cavity and has an area larger than that of the cavity. The upper electrode is provided on the dielectric layer. The dielectric layer and the lower electrode are connected by a metal via pillar passing through the glass substrate.

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30-01-2020 дата публикации

IMPLEMENTING EMBEDDED WIRE REPAIR FOR PCB CONSTRUCTS

Номер: US20200037446A1
Принадлежит:

Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer. 1. A structure for implementing embedded wire repair for printed circuit board (PCB) constructs comprising:a printed circuit board (PCB);the printed circuit board (PCB) having a repair wire layer within a PCB stack with reference planes on opposite sides of the repair wire layer;an appropriate plated through hole (PTH) forming a repair connection using said repair wire layer when a repair connection is required.2. The structure as recited in wherein said repair wire layer includes an embedded isolated internal conductor.3. The structure as recited in wherein said repair wire layer includes said isolated internal conductor separated from plated through holes (PTHs) in the PCB stack.4. The structure as recited in wherein said repair wire layer includes an embedded isolated conductive wire mesh.5. The structure as recited in wherein said repair wire layer includes an embedded isolated twisted-pair mesh.6. The structure as recited in wherein said repair wire layer includes an embedded isolated embroidered wire mesh.7. The structure as recited in wherein the repair connection enables controlled impedance with the reference planes disposed at a fixed distance from said repair wire layer.8. The structure as recited in wherein the repair connection provides enhanced channel performance over repair work at a surface level of the PCB stack.9. The structure as recited in wherein said repair wire layer includes an electrically conductive mesh formed of a selected material from a group including copper claim 1 , copper plated with nickel claim 1 , and aluminum.10. The structure as recited in wherein ...

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30-01-2020 дата публикации

Method of manufacturing through hole of substrate

Номер: US20200037452A1
Принадлежит: Fujitsu Ltd

A method of manufacturing a through hole of a substrate includes forming, to the substrate, a cutting hole surrounding a removal-target-part such that a connection part of the substrate remains, the connection part that connects the removal-target-part that is removed from the substrate and a remaining part other than the removal-target-part that has been removed, along a cutting line of the through hole formed to the substrate; applying plating on an area including an inner peripheral wall face of the cutting hole of the substrate; applying a film covering an opening of the cutting hole on a surface of the substrate applied with the plating and performing exposure and development of the film to form an etching resist covering an area including the opening of the cutting hole; performing etching of the plating applied on the substrate; removing the etching resist; and cutting the connection part to remove the removal-target-part.

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30-01-2020 дата публикации

METHOD FOR MANUFACTURING CIRCUIT BOARD

Номер: US20200037455A1
Принадлежит:

The present disclosure relates to a method for manufacturing a circuit board. The method for manufacturing the circuit board includes forming a patterned first dielectric layer on a substrate; forming an adhesive layer on the patterned first dielectric layer; forming a second dielectric layer on the adhesive layer; and patterning the second dielectric layer and the adhesive layer. 1. A method for manufacturing a circuit board , comprising:forming a patterned first dielectric layer on a substrate;forming an adhesive layer on the patterned first dielectric layer;forming a second dielectric layer on the adhesive layer; andpatterning the second dielectric layer and the adhesive layer.2. The method of claim 1 , wherein the forming the adhesive layer on the patterned first dielectric layer comprises:bonding the adhesive layer to the patterned first dielectric layer, such that the adhesive layer covers the patterned first dielectric layer and the substrate.3. The method of claim 1 , wherein the patterning the second dielectric layer and the adhesive layer comprises:performing an exposure process to the second dielectric layer; andperforming a developing process to the exposed second dielectric layer to expose a portion of the adhesive layer.4. The method of claim 3 , wherein the patterning the second dielectric layer and the adhesive layer comprises:removing the portion of the adhesive layer to at least expose at least a portion of the patterned first dielectric layer.5. The method of claim 4 , wherein the removing the portion of the adhesive layer is performed by a wet etching process.6. The method of claim 1 , further comprising:forming a conductive layer on the substrate before the forming the patterned first dielectric layer on the substrate, wherein the conductive layer is separated from the adhesive layer by the patterned first dielectric layer.7. The method of claim 1 , further comprising:filling a conductive material at least in the patterned second dielectric ...

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08-02-2018 дата публикации

CHIP PART AND MANUFACTURING METHOD THEREOF

Номер: US20180042118A1
Принадлежит: ROHM CO., LTD.

A chip part includes a substrate having a first main surface on one side thereof and a second main surface on the other side thereof, a functional device famed at a first main surface side of the substrate, an external terminal formed at the first main surface side of the substrate and electrically connected to the functional device, and a light diffusion reflection structure formed at a second main surface side of the substrate and diffusely reflecting light irradiated toward the second main surface of the substrate. 1. A chip part comprising:a substrate having a first main surface on one side thereof and a second main surface on the other side thereof;a functional device formed at a first main surface side of the substrate;an external terminal formed at the first main surface side of the substrate and electrically connected to the functional device; anda light diffusion reflection structure formed at a second main surface side of the substrate and diffusely reflecting light irradiated toward the second main surface of the substrate.2. The chip part according to claim 1 , wherein the light diffusion reflection structure is formed by a roughened surface formed at the second main surface side of the substrate.3. The chip part according to claim 1 , wherein the light diffusion reflection structure is formed by an uneven structure formed at the second main surface side of the substrate.4. The chip part according to further comprising:an insulating film covering the second main surface of the substrate.5. The chip part according to claim 4 , wherein the uneven structure includes a plurality of recesses formed at the second main surface of the substrate claim 4 , andthe insulating film includes a first portion covering an inner wall of each recess, and a second portion covering an outside region of each recess and having a thickness larger than a thickness of the first portion.6. The chip part according to further comprising:an electrode film famed at the first main ...

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08-02-2018 дата публикации

IMPLEMENTING BACKDRILLING ELIMINATION UTILIZING VIA PLUG DURING ELECTROPLATING

Номер: US20180042123A1
Принадлежит:

A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a via plug with a specialized geometry and including a capillary is inserted into each via to allow electroplating on only preferred wall surfaces of the vias. Then a board plating process of the PCB manufacturing is performed. 1. A method for implementing enhanced via creation without creating a via barrel stub during printed circuit board (PCB) manufacturing comprising:providing a printed circuit board (PCB); said printed circuit board (PCB) having an internal conductive trace;forming a via extending through the printed circuit board (PCB) including the internal conductive trace;inserting a via plug into the via, said via plug having a capillary extending through said via plug; andperforming PCB plating.2. The method as recited in includes said via plug remaining in the PCB via after PCB plating.3. The method as recited in includes providing enhanced signal integrity with said via plug.4. The method as recited in includes providing enhanced noise reduction with said via plug.5. The method as recited in includes forming with said via plug with a selected electrically insulating material.6. The method as recited in wherein inserting a via plug into the via includes slidingly inserting said via plug into the via.7. The method as recited in includes forming with said via plug with a specialized geometry and capillary conforming to the via.8. The method as recited in wherein providing a printed circuit board (PCB); said printed circuit board (PCB) having an internal conductive trace includes a standard PCB manufacturing process.9. The method as recited in wherein inserting said via plug into the via includes providing an arrayed tool used to insert multiple ones of said via plugs at once.10. The method as recited in ...

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24-02-2022 дата публикации

DRILL HOLE INSPECTION METHOD, DRILL HOLE INSPECTION SYSTEM AND INSPECTION DEVICE

Номер: US20220058788A1
Принадлежит:

A drill hole inspection method for using a drill hole inspection system to inspect a drill hole of a printed circuit board (PCB) is provided. The drill hole inspection method includes: scanning the PCB to obtain 3-dimensional (3D) image voxel data of the PCB; determining a first-dimension interval corresponding to the PCB along one direction of the 3D image voxel data; determining, in a plane of the 3D image voxel data which is orthogonal to the direction, a 2-dimensional (2D) position corresponding to the drill hole; extracting a portion of the 3D image voxel data as drill hole voxel data according to the first-dimension interval and the 2D position; analyzing the drill hole voxel data to obtain an inspection result of the drill hole; and outputting the inspection result through an output component. In addition, a drill hole inspection system and an inspection device using the same are also provided. 1. A drill hole inspection system for inspecting a drill hole in a printed circuit board (PCB) , the drill hole inspection system comprising:an imaging device configured to scan the PCB to obtain 3-dimensional (3D) image voxel data of the PCB;a storage component configured to store a plurality of modules;an output component; anda processor coupled to the imaging device, the storage component and the output component, and configured to access and execute the plurality of modules stored in the storage component, wherein the plurality of modules comprises:a PCB positioning module configured to determine a first-dimension interval corresponding to the PCB along a first direction of the 3D image voxel data;a drill hole positioning module configured to determine, in a first plane of the 3D image voxel data, a 2-dimensional (2D) position corresponding to the drill hole, wherein the first direction is orthogonal to the first plane;a voxel extraction module configured to extract, according to the first-dimension interval and the 2D position, a portion of the 3D image voxel data ...

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19-02-2015 дата публикации

Pcb backdrilling method and system

Номер: US20150047892A1
Принадлежит: Huawei Technologies Co Ltd

A printed circuit board (PCB) backdrilling method is disclosed, where a conductive layer is disposed between a surface of a PCB on an intended-for-backdrilling side of a plated through hole (PTH) and a target signal layer of the PCB, and the method includes: performing a first backdrilling on the PTH with a first preset depth starting from the surface of the PCB; controlling the backdrill bit to move along the drill hole formed in the first backdrilling toward the target signal layer; and when the backdrill bit is in contact with the conductive layer, completing a second backdrilling with a second preset depth starting from the conductive layer.

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08-05-2014 дата публикации

THROUGH-HOLE-VIAS IN MULTI-LAYER PRINTED CIRCUIT BOARDS

Номер: US20140123489A1

Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of manufacturing a PCB. Embodiments include depositing upon layers of laminate printed circuit traces and joining the layers of laminate. Embodiments also include drilling at least one via hole through the layers of laminate and placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper. 1. A method of manufacturing a multi-layer printed circuit board (‘PCB’) comprising:depositing upon layers of laminate printed circuit traces;joining the layers of laminate;drilling at least one via hole through the layers of laminate;placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper.2. The method of further comprising:forming the used portion of the via conductor so as to conduct an alternating current signal from a trace on one layer of the PCB to a trace on another layer of the PCB,the alternating current signal characterized by a frequency high enough to demonstrate skin effect, moving the alternating current toward the surface of the via conductor.3. The method of further comprising:forming the unused portion of the via conductor with no connection to any further trace,the unused portion of the via conductor implementing a resonant stub effecting an insertion loss of the alternating current signal centered on a resonant frequency,the metal having a conductivity lower than the conductivity of copper increasing resistive dampening of resonance and reducing the insertion loss.4. The method of wherein:both the used portion and the unused portion of the via conductor comprise copper, andonly the unused portion of the via conductor is coated with a metal having a conductivity lower than the ...

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06-02-2020 дата публикации

Multilayer printed circuit board via hole registration and accuracy

Номер: US20200043690A1
Принадлежит: Sanmina Corp

A method of making printed circuit board vias using a double drilling and plating method is disclosed. A first hole is drilled in a core, the first hole having a first diameter. The first hole is filled and/or plated with an electrically conductive material. A circuit pattern may be formed on one or two conductive layers of the core. A multilayer structure may then be formed including a plurality of cores that also include pre-drilled and plated via holes, wherein at least some of the pre-drilled and plated via holes are aligned with the first hole. A second hole is then drilled within the first hole and the aligned pre-drilled and plated holes, the second hole having a second diameter where the second diameter is smaller than the first diameter. A conductive material is then plated to an inner surface of the second hole.

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08-05-2014 дата публикации

Wiring board and method for manufacturing same

Номер: US20140124250A1
Принадлежит: Panasonic Corp

A wiring board includes an electric insulating base material including an incompressible member and a thermosetting member; a first wiring and a second wiring formed with the electric insulating base material interposed therebetween; and a via-hole conductor penetrating the electric insulating base material, and electrically connecting the first wiring and the second wiring to each other. The via-hole conductor includes a resin portion and a metal portion. The metal portion includes a first metal region mainly composed of Cu; a second metal region mainly composed of a Sn—Cu alloy; and a third metal region mainly composed of Bi. The second metal region is larger than the first metal region, and larger than the third metal region.

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18-02-2016 дата публикации

Blind Via Printed Circuit Board Fabrication Supporting Press Fit Connectors

Номер: US20160050756A1
Принадлежит:

An information handling system circuit board interfaces storage device surface connectors and storage device controllers disposed on opposing sides by coupling a first circuit board portion having a controller press in connector to a second circuit board portion having plural surface connectors. The first and second circuit board portions couple to each other with an adhesive activated by curing. Resistant ink is printed over openings of the first circuit board portion where adhesive is applied in order to prevent the adhesive from flowing into the openings at or before the curing of the adhesive. 19-. (canceled)10. A circuit board comprising:a first portion having plural blind vias aligned to accept a press in connector at an upper surface, the blind vias having openings formed in a lower surface to provide a passage for one or more plating fluids that plate the blind vias with a conductive material;a second portion having at least one surface connector disposed on an upper surface and operable to interface with a storage device;a blocking material disposed over the blind via lower surface openings;through vias disposed through the first and second portions to interface the press in connector blind vias with the at least one surface connector;wherein the first and second portions couple to each other with an adhesive and the blocking material prevents the adhesive from entering the blind vias.11. The circuit board of wherein the blocking material comprises a UV cured ink.12. The circuit board of wherein the blocking material comprises an epoxy ink.13. The circuit board of further comprising a fit in connector coupled to the blind vias and operable to interface a storage controller and the at least one surface connector.14. The circuit board of wherein the blind vias comprise a counter bore opening having a first width to a controlled depth to accept press in connector pins and a second width through the first portion to provide a passage for plating fluids to flow ...

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18-02-2016 дата публикации

Electronic Component Mounting Structure, Manufacturing Method and Electronic Component Product

Номер: US20160050794A1
Принадлежит:

An electronic component mounting structure, manufacturing method and an electronic component product are provided. The electronic component mounting structure comprises a printed circuit board, a metal flange, and a plurality of electronic components provided on the metal flange; a groove is provided on the printed circuit board, a metal layer is coated on a wall of the groove, the metal flange is restricted to the metal layer on the wall and is fixed in the groove, the one or more electronic components are connected to each other through a plurality of wires based on a circuit requirement, an input electrode and an output electrode are provided on the printed circuit board in a portion adjacent to the metal flange, and the input electrode and the output electrode are connected to the one or more electronic components mounted on the metal flange through wires respectively. 1. An electronic component mounting structure , comprising a printed circuit board , a metal flange embedded in the printed circuit board , and one or more electronic components provided on the metal flange , wherein a groove is provided on the printed circuit board , a metal layer is coated on a wall of the groove , the metal flange is restricted to the metal layer on the wall and is fixed in the groove , the one or more electronic components are connected to each other through a plurality of wires based on a circuit requirement , an input electrode and an output electrode are provided on the printed circuit board in a portion adjacent to the metal flange , and the input electrode and the output electrode are connected to the one or more electronic components mounted on the metal flange through wires respectively.2. The electronic component mounting structure according to claim 1 , wherein a peripheral circuit is provided on the printed circuit board claim 1 , and the input electrode and the output electrode are electrically connected to the peripheral circuit.3. The electronic component mounting ...

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18-02-2021 дата публикации

Process For Forming Traces on a Catalytic Laminate

Номер: US20210051804A1
Принадлежит: CATLAM, LLC

A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and blanket surface plasma etch operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist. 1) A process for forming conductive traces on a catalytic laminate , the catalytic laminate having a resin rich surface with insufficient density of catalytic particles for surface electroless plating , the catalytic laminate having catalytic particles dispersed below a catalytic particle exclusion depth sufficient for electroless plating when exposed , the process comprising:drilling holes in the catalytic laminate;etching the external surfaces of the catalytic laminate until the catalytic particles are exposed;electroless plating the catalytic laminate until a conductive metal is plated on the external surfaces and also inside the drilled holes;applying a pattern mask to the external surfaces of the catalytic laminate;electroless plating the external surfaces of the catalytic laminate;stripping the pattern mask;quick etching the circuit board sufficient to remove any previously masked electroless conductive metal.2) The process of where the electroless plating and the electroplating deposit copper.3) The process of where the electroplate deposition thickness is greater than the thickness of the electroless deposition.4) The process of where the pattern mask is dry film.5) The process of where the pattern mask is liquid photoresist.6) The process of where plasma etching the external surfaces uses at least one of: a reactive plasma claim 1 , a chemical ...

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25-02-2016 дата публикации

Method for Producing a Drill Hole and a Drilling Machine for this Purpose

Номер: US20160052068A1
Принадлежит:

The invention relates to a method for producing drill holes () in a sandwich component (). The sandwich component has several interconnected layers of which at least one layer () is electrically conducting and the directly adjacent layers () are not electrically conducting. Further, the invention relates to a drilling machine () having at least one drill (), a measuring device that is connected to the drill () that measures a difference in potential between a component () and a reference potential, a depth measuring device that can measure the position of the drill () relative to a reference point, and a computer unit that is equipped to execute the method automatically. 115-. (canceled)16. A method for producing a drill hole in a sandwich component having several interconnected layers of which at least one layer is electrically conducting and the directly adjacent layers are not electrically conducting , wherein the exact position of the electrically conducting layer within the sandwich component is unknown , comprising the following steps:a) Providing a drilling machine, having a drill that is electrically conducting, a measuring device connected with the drill that measures a difference in potential between the at least one electrically conducting layer and a reference potential by means of the drill and a depth measuring unit by means of which the position of the drill can be measured relative to a reference point;b) Inserting a drill hole into the sandwich component with the drilling machine up to the presumed position in the direction of drilling of the upstream, not electrically conducting layer adjacent to the electrically conducting layer;c) Optionally, pulling back the drill and exchanging it with an additional drill having a smaller exterior diameter, whereby the smaller drill is in turn connected with the measuring device;d) Optionally, inserting the additional drill into the blind hole produced in step b) and inserting a drill hole with the additional ...

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16-02-2017 дата публикации

Resin composition for permanent insulating film, permanent insulating film, multilayer printed wiring board, and process for producing the same

Номер: US20170048974A1
Принадлежит: Taiyo Ink Mfg Co Ltd

A resin composition for a permanent insulating film is provided, by which, in particular, partial through-holes obtained by partitioning a through-hole can be easily and precisely formed as designed without a deposition of catalytic species (seed) in a plating resist portion. The present invention provides a resin composition for a permanent insulating film, including a thermosetting resin, a resin filler, and a compound containing at least one atom selected from a sulfur atom and a nitrogen atom. The present invention also provides a multilayer printed wiring board in which conductive layers having a circuit pattern and insulation layers are alternately overlaid with each other, and a through-hole enabling electric conductivity among conductive layers via a through-hole. The through-hole includes a plating resist portion provided on either of an interlaminar part between the conductive layer and the insulation layer or another interlaminar part between the insulation layers, or both. The plating portion(s) is/are provided on the interlaminar parts which had been exposed in an opening as the through-hole, and on an exposed region other than the plating resist portion, and the plating resist portion is made of a cured product of the resin composition.

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16-02-2017 дата публикации

BARE DIE INTEGRATION WITH PRINTED COMPONENTS ON FLEXIBLE SUBSTRATE

Номер: US20170048986A1
Принадлежит: PALO ALTO RESEARCH CENTER INCORPORATED

Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among others, where the surface of the electronic circuit component is at the same level as the associated substrate, the surface of the electronic circuit component holding connection pads. A gap exists between the electronic circuit component, and the end of an opening within the substrate. This gap is filled with a filler material, such as a bonding material. The bonding material also used to encapsulate or bond together the back side of the substrate and electronic circuit component. During the manufacturing process, the front surface of the electronic circuit component (which includes the contact pads) and the front surface of the substrate which includes electronic circuitry are held in an adhesive relationship by a flat material having an upper surface which includes adhesive or sticky material (such as PDMS). Once the flat material is removed the planar flat or level upper surface can readily accept the formation of conductive traces by the use of inkjet printing or other technologies. 1. A method of forming a hybrid electronic assembly comprising:providing a substrate having a first surface and second surface opposite the first surface, the first surface including conductive circuit tracings, the substrate having height, width, and length dimensions;identifying at least one location on the first surface of the substrate to form at least one opening through the substrate;performing a material removal operation at the identified at least one location, to create the at least one opening in the substrate at the at least one identified location;attaching an article with a sticking surface on a first flat or planar side over the at least one opening and the at least part of the substrate on the first surface side of the substrate;placing an electronic circuit component into the at least one opening at an orientation which has the first surface ...

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22-02-2018 дата публикации

Entry sheet for drilling holes, and hole drilling method using same

Номер: US20180050462A1
Принадлежит: Mitsubishi Gas Chemical Co Inc

Entry sheet for drilling including a metallic foil and a layer of a resin composition, the layer formed on the metallic foil without interposing an adhesion layer, in which the layer of the resin composition has a peak attributable to a carbon atom-oxygen atom double bond appearing at 1700 to 1750 cm −1 and a peak attributable to a carbon atom-oxygen atom single bond appearing at 1080 to 1300 cm −1 in infrared spectroscopy, and when the absorbance at the peak attributable to the carbon atom-oxygen atom double bond appearing at 1700 to 1750 cm −1 is represented by Abs(C═O)L, and the absorbance at the peak of the carbon atom-oxygen atom single bond appearing at 1080 to 1300 cm −1 is represented by Abs(C—O)L, the layer of the resin composition has an absorbance ratio (C) of 0.12 to 1.80, the absorbance ratio (C) represented by the following expression (1). Absorbance ratio( C )=Abs(C═O) L /Abs(C—O) L    Expression (1)

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03-03-2022 дата публикации

CIRCUIT BOARD STRUCTURE AND MANUFACTURING METHOD THEREOF

Номер: US20220071000A1
Принадлежит: Unimicron Technology Corp.

The disclosure provides a circuit board structure including at least two sub-circuit boards and at least one connector. Each of the sub-circuit boards includes a plurality of carrier units. The connector is connected between the sub-circuit boards, and a plurality of stress-relaxation gaps are defined between the sub-circuit boards.

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23-02-2017 дата публикации

PRINTED WIRING BOARD ASSEMBLY, ELECTRICAL DEVICE, AND METHOD FOR ASSEMBLING PRINTED WIRING BOARD ASSEMBLY

Номер: US20170053850A1
Автор: Watanabe Manabu
Принадлежит: FUJITSU LIMITED

A printed wiring board assembly includes a first board including a first surface; a second board including a second surface and facing the first surface; a plurality of first electrodes formed on a bottom surface of a recess formed in one of the first and the second surfaces; a plurality of second electrodes formed on the one of the first surface and the second surface and positioned outside the recess; a plurality of first solders each coupled to a respective one of the plurality of first electrodes; and a plurality of second solders each coupled to a respective one of the plurality of second electrodes, wherein the plurality of first electrodes are formed at a larger pitch than a pitch at which the plurality of second electrodes are formed, and a size of each the plurality of first solders is larger than a size of the plurality of second solders. 1. A printed wiring board assembly comprising:a first board that includes a first surface;a second board that includes a second surface and faces the first surface;a plurality of first electrodes formed on a bottom surface of a recess, the recess being formed in one of the first surface and the second surface;a plurality of second electrodes formed on the one of the first surface and the second surface, the plurality of second electrodes being positioned outside the recess;a plurality of first solders each coupled to a respective one of the plurality of first electrodes; anda plurality of second solders each coupled to a respective one of the plurality of second electrodes,wherein the plurality of first electrodes are formed at a larger pitch than a pitch at which the plurality of second electrodes are formed, and a size of each the plurality of first solders is larger than a size of the plurality of second solders.2. The printed wiring board assembly according to claim 1 , wherein when the recess is formed in the first surface claim 1 , the recess is positioned to face a central portion of the second board.3. The printed ...

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25-02-2016 дата публикации

METHOD OF PRODUCING SUSPENSION BOARD WITH CIRCUIT

Номер: US20160057867A1
Принадлежит: NITTO DENKO CORPORATION

A method of producing a suspension board with circuit includes the steps of preparing a metal supporting layer; forming a curable insulating layer on the metal supporting layer using a photosensitive curable insulating composition such that an opening is formed in the curable insulating layer, curing the curable insulating layer to form an insulating layer, subjecting the metal supporting layer exposed from the opening to microwave plasma treatment, and forming a metal conducting portion on the metal supporting layer exposed from the opening. 1. A method of producing a suspension board with circuit , comprising the steps of:preparing a metal supporting layer;forming a curable insulating layer on the metal supporting layer using a photosensitive curable insulating composition such that an opening is formed in the curable insulating layer;curing the curable insulating layer to form an insulating layer;subjecting the metal supporting layer exposed from the opening to microwave plasma treatment; andforming a metal conducting portion on the metal supporting layer exposed from the opening.2. A method of producing a suspension board with circuit according to claim 1 , wherein the step of forming the curable insulating layer is performed by applying a solution containing the photosensitive curable insulating composition onto the meal supporting layer and developing the applied solution.3. A method of producing a suspension board with circuit according to claim 1 , wherein a gas used for the microwave plasma treatment contains an inert gas.4. A method of producing a suspension board with circuit according to claim 1 , wherein the metal conducting portion is electrically connected to differential signal wires.5. A method of producing a suspension board with circuit according to claim 4 , whereina plurality of the openings and a plurality of the metal conducting portions are formed, andthe plurality of metal conducting portions are electrically connected to each other via the ...

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15-05-2014 дата публикации

WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

Номер: US20140133119A1
Принадлежит: IBIDEN CO., LTD.

A wiring board includes a first substrate having a penetrating hole penetrating through the first substrate, a built-up layer formed on a surface of the first substrate and including interlayer resin insulation layers and wiring layers, the built-up layer having an opening portion communicated with the penetrating hole of the fist substrate and opened to the outermost surface of the built-up layer, an interposer accommodated in the opening portion of the built-up layer and including a second substrate and a wiring layer formed on the second substrate, the wiring layer of the interposer including conductive circuits for being connected to semiconductor elements, a filler filling the opening portion such that the interposer is held in the opening portion of the built-up layer, and mounting pads formed on the first substrate and positioned to mount the semiconductor elements. The mounting pads are positioned to form a matrix on the first substrate. 1. A wiring board , comprising:a first substrate having a penetrating hole penetrating through the first substrate;a built-up layer formed on a surface of the first substrate and comprising a plurality of interlayer resin insulation layers and a plurality of wiring layers, the built-up layer having an opening portion communicated with the penetrating hole of the first substrate and opened to an outermost surface of the built-up layer on an opposite side of the first substrate;an interposer accommodated in the opening portion of the built-up layer and comprising a second substrate and a wiring layer formed on the second substrate, the wiring layer of the interposer comprising a plurality of conductive circuits configured to be connected to a plurality of semiconductor elements;a filler filling the opening portion of the built-up layer such that the interposer is held in the opening portion of the built-up layer; anda plurality of first mounting pads formed on the first substrate and positioned to mount the semiconductor ...

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14-02-2019 дата публикации

MANUFACTURING METHOD OF PRINTED BOARD

Номер: US20190053369A1
Автор: HARADA Toshikazu
Принадлежит:

Resin films, all of which are formed of the same resin material, are laminated to form a laminate. Heat and pressure are applied to the laminate to integrate the resin films into one piece; then the pressure applied to the laminate is released and the laminate is cooled. In a predetermined region of the laminate which is to constitute a bent part, one or more of the resin films are arranged on each of one side and the other side in a lamination direction of the resin films with respect to one conductor pattern; and the total thickness of the one or more resin films arranged on the one side is larger than the total thickness of the one or more resin films arranged on the other side. Consequently, the predetermined region can be bent by utilizing the difference between contraction force generated in the one or more resin films arranged on the one side and contraction force generated in the one or more resin films arranged on the other side during the cooling after the application of heat and pressure. 1. A manufacturing method of a printed board that has a bent part , the manufacturing method comprising:a preparing step for preparing a plurality of film-like insulating base members, the insulating base members being formed of, at least, a resin material and having conductor patterns formed on their surfaces;a laminating step for laminating the insulating base members to form a laminate; anda heat-and-pressure applying step for applying heat and pressure to the laminate to integrate the insulating base members into one piece and then releasing the pressure applied to the laminate and cooling the laminate,whereinall of the insulating base members prepared in the preparing step are formed of the same resin material,in the laminating step, the laminate is formed so that: in a predetermined region of the laminate which is to constitute the bent part, one or more of the insulating base members are arranged on each of one side and the other side in a lamination direction of ...

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25-02-2021 дата публикации

SNAP-RF INTERCONNECTIONS

Номер: US20210059043A1
Принадлежит:

A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate. 1. A method of manufacturing a radio frequency connector , the method comprising:forming a signal trace from a conductive material disposed on a first substrate, the signal trace including a terminal pad;bonding a second substrate to the first substrate to substantially encapsulate the trace and terminal pad between the first substrate and the second substrate;forming an access hole from the second substrate to the terminal pad;forming a trench through the first and second substrate, the trench being positioned at least partially around the terminal pad;depositing a conductor into the access hole, the conductor providing an electrical connection to the terminal pad; anddepositing a conductive ink into the trench to form an electrically continuous conductor within the first and second substrate.2. The method of claim 1 , further comprising depositing a solder bump on the terminal pad.3. The method of claim 1 , further comprising applying solder/reflow to the conductor at the access hole.4. The method of claim 1 , wherein forming the signal trace includes milling the conductive material disposed on the first substrate.5. The method of claim 1 , wherein forming the access hole includes drilling through the second substrate.6. The method of claim 1 , wherein forming the trench includes milling through the first and second substrates.7. The method of claim 6 , wherein milling through the first and second substrates includes milling to a ground plane substantially without piercing the ground plane.8. The method of claim 1 , wherein the ...

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25-02-2021 дата публикации

SPACE EFFICIENT LAYOUT OF PRINTED CIRCUIT BOARD POWER VIAS

Номер: US20210059049A1
Принадлежит:

A disclosed method for manufacturing a printed circuit board includes creating multiple conductive layers, each including conductive traces for carrying high-speed data signals, and a non-round plated through power via for delivering high current from a switched-mode power source to and between the conductive layers. Creating the power via may include drilling an opening through the multiple conductive layers, the perimeter of which has a flattened oval shape, and plating the walls of the opening to a predetermined plating thickness using a conductive material. The power via may have a lower resistivity than a combined resistivity of multiple round, plated through vias that, together with required spacing between them, have the same footprint as the power via. The space occupied by the power via may be less than a required footprint for multiple round, plated through vias whose combined resistivity equals the resistivity of the power via. 1. A printed circuit board , comprising:a plurality of conductive layers each comprising conductive traces for carrying high-speed data signals; and the power via comprises an opening passing through the plurality of conductive layers;', 'walls of the opening are plated to a predetermined plating thickness using a conductive material; and', two straight edges of the perimeter of the power via are parallel to a major axis of an elliptical shape that encompasses the power via and are parallel to each other; and', 'two ends of the perimeter of the power via that connect the two straight edges to each other on respective sides of the power via are rounded., 'the power via has a flattened oval shape in which, when the power via is viewed from a perspective perpendicular to a top-most one of the multiple conductive layers], 'a power via for delivering current to and between the plurality of conductive layers, wherein2. The printed circuit board of claim 1 , wherein the power via has a lower resistivity than a combined resistivity of a ...

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13-02-2020 дата публикации

CLEARANCE SIZE REDUCTION FOR BACKDRILLED DIFFERENTIAL VIAS

Номер: US20200053880A1
Принадлежит:

A printed circuit board (PCB) may include a plurality of horizontally disposed signal layers. The PCB may include a first vertically disposed differential via electrically connected to a first horizontally disposed signal layer, of the plurality of horizontally disposed signal layers, and a second horizontally disposed signal layer of the plurality of horizontally disposed signal layers. The PCB may include a second vertically disposed differential via electrically connected to the first signal horizontally disposed layer and the second horizontally disposed signal layer. The PCB may include a first set of clearances encompassing the first vertically disposed differential via and the second vertically disposed differential via, a second set of clearances encompassing the first vertically disposed stub, and a third set of clearances encompassing the second vertically disposed stub. 120-. (canceled)21. A method , comprising: a plurality of horizontally disposed signal layers;', 'the first vertically disposed differential via including a first vertically disposed stub that extends from a bottom surface of the PCB to the second horizontally disposed signal layer;', 'a first vertically disposed differential via electrically connected to a first horizontally disposed signal layer, of the plurality of horizontally disposed signal layers, and a second horizontally disposed signal layer of the plurality of horizontally disposed signal layers,'}, 'the second vertically disposed differential via including a second vertically disposed stub that extends from the bottom surface of the PCB to the second horizontally disposed signal layer;', 'a second vertically disposed differential via electrically connected to the first horizontally disposed signal layer and the second horizontally disposed signal layer,'}, 'a first set of clearances associated with the first vertically disposed differential via and the second vertically disposed differential via; and', 'a second set of ...

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05-03-2015 дата публикации

SYSTEM FOR ATTACHING DEVICES TO FLEXIBLE SUBSTRATES

Номер: US20150062838A1
Принадлежит: OSRAM SYLVANIA INC.

This disclosure is directed to a system for attaching devices to flexible substrates. A device may be coupled to a flexible substrate in a manner that prevents adhesive from contacting conductive ink while the adhesive is harmful. If conductive epoxy is used to anchor conductive pads in the device to the flexible substrate, conductive epoxy may be applied beyond the edge of the device over which conductive ink may be applied to make electrical connections. Holes may also be formed in the flexible substrate allowing conductive epoxy to be exposed on a surface of the flexible substrate opposite to the device location, the conductive ink connections being made on the opposite surface. The conductive ink may also be applied directly to the conductive pads when extended beyond the device's edge. The flexible substrate may be pre-printed with circuit paths, the conductive ink coupling the device to the circuit paths. 1. Circuitry , comprising:a flexible substrate;at least one device coupled to the flexible substrate;adhesive applied to the flexible substrate to couple the at least one device to the flexible substrate; andconductive ink applied to the flexible substrate to form conductors electronically coupled to the at least one device, the conductive ink being applied after the adhesive.2. The circuitry according to claim 1 , wherein the adhesive is cured before the conductive ink is applied to the flexible substrate.3. The circuitry according to claim 1 , wherein the at least one device comprises at least one conductive pad and the adhesive is conductive epoxy anchoring the at least one device to the flexible substrate by adhering the at least one conductive pad to the flexible substrate.4. The circuitry according to claim 3 , wherein the conductive epoxy is applied to the flexible substrate so that at least a portion of the conductive epoxy is exposed beyond an edge of the at least one device when coupled to the flexible substrate and wherein the conductive ink is ...

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21-02-2019 дата публикации

PLATED OPENING WITH VENT PATH

Номер: US20190059157A1
Принадлежит:

A plated hole with a sidewall plating. The plated hole has a vent opening that has a sidewall of non-conductive material that is not plated. During attachment of a joint conductive material such as solder to the sidewall plating, gasses generated from the attachment process are outgassed through the vent opening. 114-. (canceled)15. An electronic component assembly comprising:an electronic component;a workpiece including an opening extending from a first major surface of the workpiece, the opening including an opening sidewall of non-conductive material;a sidewall plating, the sidewall plating covers a first portion of the opening sidewall of the non-conductive material in a plane parallel to the first major surface, a second portion of the opening sidewall in the plane is not covered by the sidewall plating;a conductive structure electrically coupled to the sidewall plating with a conductive joint material structure attached to the sidewall plating and to the conductive structure, wherein at least a portion of the conductive joint material structure is located in the opening and attached to the sidewall plating in the opening including in the plane, wherein the conductive joint material structure is not attached to the second portion of the opening sidewall in the plane.16. The assembly of wherein the sidewall plating extends to a conductive structure embedded in the workpiece and the sidewall plating and a portion of the opening are characterized as a plated blind via.17. The assembly of wherein the sidewall plating and the opening extends to a second major surface of the workpiece opposite the first major surface and a portion of the opening and the sidewall plating are characterized as a plated through hole via.18. The assembly of wherein the workpiece is characterized as an interposer and the conductive structure is a conductive structure of a substrate claim 15 , wherein the interposer is encapsulated in an encapsulant with the electronic component.19. The ...

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21-02-2019 дата публикации

BENT DISPLAY PANEL WITH ELECTRICAL LINES FOR A SENSOR

Номер: US20190059164A1
Принадлежит:

An electronic device including a display panel is provided. In some embodiments, the display panel includes an active display region and an electrical component. The electrical component is distinct from a touch sensor device that is adapted to receive touch input across the active display region of the display panel. An electrical conductor connects the electrical component to another component of the electronic device via the display panel, such as via a bent portion of the display panel. 1. An electronic assembly , comprising: a front major face,', 'a back major face that opposes the front major face,', 'an active display region of the front major face, and', 'a bent portion;, 'a display panel that includesa touch sensor device, the touch sensor adapted to receive touch input across the active display region of the display panel;a sensor connected to the display panel, the sensor being distinct from the touch sensor device;a circuit board that includes a processor, the circuit board positioned behind the back major face of the display panel;a first electrical conductor positioned behind the back major face of the display panel and that electrically connects the bent portion of the display panel to the circuit board; anda second electrical conductor that connects the sensor to the first electrical conductor via the bent portion of the display panel.2. The electronic assembly of claim 1 , wherein the sensor comprises a fingerprint sensor.3. The electronic assembly of claim 1 , wherein the sensor comprises a proximity sensor.4. The electronic assembly of claim 1 , further comprising a cover glass that covers the display panel and the sensor.5. The electronic assembly of claim 1 , further comprising a port configured to removably receive an external connector claim 1 , wherein:the external connector is to supply data or power from an external device, andthe sensor is positioned between the port and a cover glass of the electronic assembly.6. The electronic assembly ...

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10-03-2022 дата публикации

GLASS SUBSTRATES WITH BLIND VIAS HAVING DEPTH UNIFORMITY AND METHODS FOR FORMING THE SAME

Номер: US20220078920A1
Принадлежит:

A substrate comprising: (i) a first series of blind vias into a thickness of a substrate and open to a first primary surface; and (ii) a second series of blind vias into the thickness of a substrate and open to a second primary surface. Each blind via includes an interior wall. The interior wall includes a first tapered region and a second tapered region. The first tapered region and the second tapered region have a distinct slope. Each of the blind vias of the second series of blind vias is coaxial with a different blind via of the first series of blind vias. Each blind via of the first series of blind vias has a depth that deviates from a mean depth by less than +/−10%. Each blind via of the second series of blind vias has a depth that deviates from a mean depth by less than +/−10%. 1. A method of forming blind vias in substrates comprising:(a) transmitting a line focus of a laser beam having a wavelength through a primary surface of a first substrate and into a thickness of the first substrate, the first substrate being transparent to the wavelength of the laser beam, and the line focus having an intensity as a function of depth into the thickness of the first substrate, and the intensity is (i) sufficient to damage the substrate throughout a damaged portion into the thickness of the first substrate contiguous with the primary surface of the first substrate, and (ii) insufficient to damage the first substrate throughout a non-damaged portion that is disposed between the damaged portion and another primary surface of the first substrate.2. The method of further comprising:(b) repeating (a) to form a series of damaged portions into the thickness of the first substrate contiguous with the primary surface.3. The method of further comprising:contacting the series of damaged portions of the first substrate with an etchant, thus forming a series of blind vias into the thickness of the first substrate that is open to the primary surface;wherein, each blind via of the ...

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03-03-2016 дата публикации

Flexible Display Device With Side Crack Protection Structure And Manufacturing Method For The Same

Номер: US20160066409A1
Принадлежит:

There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display. 1. An flexible display , comprising:an active area having a plurality of pixels; anda notched inactive area including a bend allowance section with a plurality of conductive line traces, wherein a buffer layer etched area is provided between a notched line and a closest conductive line trace in the bend allowance section.2. The flexible display of claim 1 , wherein the buffer layer etched area is extended to a first routing area between the bend allowance section and a chip-on-film (COF) area.3. The flexible display of claim 1 , wherein the buffer layer etched area between the notched line and the closest conductive line trace in the bend allowance section is provided with a stripe of buffer layer spaced apart from the closest conductive line trace.4. The flexible display of claim 3 , wherein the buffer layer etched area including the stripe of buffer layer is extended to a first routing area between the bend allowance section and a chip-on-film (COF) area.5. The flexible display of claim 1 , further comprising:an auxiliary conductive line provided between the buffer layer etched area and the closest conductive line trace in the bend allowance section, wherein the auxiliary conductive line has a strain reduction pattern.6. The flexible display of claim 5 , wherein the auxiliary conductive line is spaced apart from the immediately adjacent conductive line trace in the bend allowance section.7. The flexible display of claim 5 , wherein the auxiliary conductive line is in contact with the immediately adjacent conductive line trace in the bend allowance section.8. The flexible display of claim 5 , wherein the auxiliary conductive line in the bend allowance section is extended into a first routing area between the bend allowance section and a chip-on- ...

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03-03-2016 дата публикации

Y axis beam positioning system for a pcb drilling machine

Номер: US20160066432A1
Автор: Wojciech B. Kosmowski
Принадлежит: INTERDYNE SYSTEMS Inc

A positioning system for a gantry adapted to move in the horizontal, X-Y plane that utilizes up to 80% less energy to operate than commercial machines, while at the same time decreasing the position settling times by 50%, and achieving this with an “in position window” of 2-3 microns, (a settling window) beating the current industry in position window of 7-12 microns. It accomplishes this through a novel synergistic overall design that utilizes a much lighter and much stiffer moving mass resulting in the moving components having an increased natural frequency. With this system on any style of PCB drilling machine, the drill bit life is extended in two ways: they do not dull as fast and they do not break as often. This is because the small in position window ensures that as the drill bits plunge into the substrate to be drilled (a PCB board) the drill unit sees very little motion in the horizontal plane thus keeping the bits from wandering upon hole initiation and from experiencing excessive horizontal plane sheer forces (side loads) when starting their plunge into the substrate.

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01-03-2018 дата публикации

BOARD HAVING ELECTRONIC ELEMENT, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC ELEMENT MODULE INCLUDING THE SAME

Номер: US20180063961A1
Принадлежит: SAMSUNG ELECTRO-MECHANICS CO., LTD.

A printed circuit board includes a board portion and an electronic element. The board portion includes a first substrate having an element accommodating portion and second substrates laminated on outer surfaces of the first substrate. The electronic element is disposed in the element accommodating part. The electronic element includes a heat generating element and a heat radiating member coupled to an inactive surface of the heat generating element. 1. A printed circuit board , comprising:a board portion comprising a first substrate having an element accommodating portion and second substrates laminated on outer surfaces of the first substrate; andan electronic element disposed in the element accommodating part,wherein the electronic element comprises a heat generating element and a heat radiating member coupled to an inactive surface of the heat generating element.2. The printed circuit board of claim 1 , wherein the electronic element has a thickness thicker than that of the first substrate.3. The printed circuit board of claim 2 , wherein the electronic element has a portion of the heat radiating member disposed in the second substrates.4. The printed circuit board of claim 1 , wherein the board portion further comprises wiring layers claim 1 , andthe heat radiating member is directly coupled to one of the wiring layers disposed on a lowest portion of the board portion.5. The printed circuit board of claim 4 , wherein the wiring layer disposed on the lowest portion of the board portion comprises a heat radiating pad disposed below the heat radiating member and surface-bonded to the heat radiating member claim 4 , and connection pads.6. The printed circuit board of claim 1 , wherein the heat generating element is a power amplifier claim 1 , andthe heat radiating member is a heat sink formed of copper material.7. The printed circuit board of claim 1 , wherein the first substrate is formed by laminating insulating layers claim 1 , anda wiring layer is formed between ...

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02-03-2017 дата публикации

Embedded Venting System

Номер: US20170064809A1

The embodiments relate to a method for integrating a venting system in a circuit board. Three or more interconnected accesses (VIAs) are formed in a printed circuit board (PCB). The VIAs are interconnected by routing a bi-planar channel spanning through the VIAs. The channel includes at least two sections, including a first channel section at a first plane extending from the first VIA to the second VIA and a second channel section at a second plane extending from the second VIA to the third VIA. The first and second sections are at different planar levels. 1. A method comprising:forming at least three interconnected accesses (VIAs) in a printed circuit board (PCB); and interconnecting the at least three VIAs; and', 'boring a channel spanning through the VIAs, the channel comprising at least two sections, including a first section extending from the first VIA to the second VIA and a second section extending from the second VIA to the third VIA, wherein at least one of the first and second sections is a borehole., 'integrating a venting system within the PCB, the integration comprising2. The method of claim 1 , wherein the second VIA connects the first section and the second section at a first bend orthogonal to a first plane associated with the first section claim 1 , and to a second plane associated with the second section.3. The method of claim 1 , wherein each VIA functions as a vent of the venting system claim 1 , and wherein the boring of the channel creates an isobaric venting system.4. The method of claim 1 , further comprising positioning the VIAs in relation to embedded logic claim 1 , wherein an area of the PCB comprises the embedded logic claim 1 , and wherein the area is positioned within an enclosure to prevent tampering with the embedded logic.5. The method of claim 4 , further comprising positioning the first VIA outside of the enclosure claim 4 , and positioning the third VIA within the enclosure.6. The method of claim 1 , wherein at least one of the ...

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02-03-2017 дата публикации

SHAPED SUBSTRATE WITH ARRANGEMENT OF SOLID STATE LIGHT SOURCES

Номер: US20170064820A1
Принадлежит: OSRAM SYLVANIA INC.

A substrate for a solid state lighting module has a plurality of serrated finger sections extending from an interconnecting base. The substrate may be formed from a single rectangular sheet by cutting away material between adjacent finger sections of a symmetrical second substrate to form the finger sections of the substrate. Parallel linear rows of solid state light sources may be disposed along the length of each finger section. For example, the solid state light sources may be disposed proximate to points of sawteeth at the edges of the finger sections. 1. An apparatus comprising:a solid state lighting module comprising a substrate comprising a plurality of finger sections extending from an interconnecting base, each finger section having a constantly varying width along a length thereof.2. The apparatus of claim 1 , wherein the substrate is formed from a single rectangular sheet by cutting away material between adjacent finger sections of a symmetrical second substrate to form the finger sections of the substrate.3. The apparatus of claim 1 , comprising first and second linear rows of solid state light sources disposed along the length of each finger section.4. The apparatus of claim 3 , wherein the first and second linear rows are symmetrical with respect to a centerline of each finger section.5. The apparatus of claim 4 , wherein the width of each finger section varies linearly between a maximum value and a minimum value to form sawteeth.6. The apparatus of claim 5 , wherein the solid state light sources are disposed proximate to points of the sawteeth.7. The apparatus of claim 6 , wherein the solid state light sources are dispersed in a regular pattern.8. The apparatus of claim 7 , wherein the regular pattern comprises perpendicular columns and rows claim 7 , and wherein adjacent solid state light sources in the rows are equidistant claim 7 , and wherein adjacent solid state light sources in the columns are equidistant.9. A method of forming a solid state ...

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02-03-2017 дата публикации

ELECTRONIC PACKAGE AND METHOD FORMING AN ELECTRICAL PACKAGE

Номер: US20170064821A1
Принадлежит:

Some example forms relate to an electronic package. The electronic package includes a first dielectric layer that includes an electrical trace formed on a surface of the first dielectric layer and a second dielectric layer on the surface of the first dielectric layer. The second dielectric layer includes an opening. The electrical trace is within the opening. The electronic package includes an electrical interconnect that fills the opening and extends above an upper surface of the second dielectric layer such that the electrically interconnect is electrically connected to the electrical trace on the first dielectric layer. 1. An electronic package , comprising:a first dielectric layer that includes an electrical trace formed on a surface of the first dielectric layer;a second dielectric layer on the surface of the first dielectric layer, wherein the second dielectric layer includes an opening, wherein the electrical trace is within the opening; andan electrical interconnect that fills the opening and extends above an upper surface of the second dielectric layer such that the electrical interconnect is electrically connected to the electrical trace on the first dielectric layer.2. The electronic package of claim 1 , wherein the electrical interconnect includes a via that fills the opening and is electrically connected to the electrical trace on the first dielectric layer.3. The electronic package of claim 2 , wherein the electrical interconnect includes a pad that is electrically connected to the via and extends above the upper surface of the second dielectric layer.4. The electronic package of claim 3 , wherein the via is integral with the pad.5. The electronic package of claim 3 , wherein the via is circular and the pad is circular.6. An electronic package claim 3 , comprising:a first dielectric layer that includes a conductive pad formed on a surface of the first dielectric layer;a second dielectric layer on the surface of the first dielectric layer, wherein the ...

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09-03-2017 дата публикации

DRILL STRUCTURE

Номер: US20170066063A1
Принадлежит:

A drill structure includes a shank part and a flute part. A chisel edge is formed on the front end of the flute part and two primary relief faces with tile directions toward the shank part are symmetrically formed on the two sides of the chisel edge. Each primary relief face has a cutting edge, a knife-back edge, and an outer edge. The outer edges are respectively helically extended around the periphery of the flute part to form two helical cutting edges and two helical grooves. Two assist relief faces are respectively formed on the inner walls of the two helical grooves, and every assist relief face is connected with the cutting edge of one primary relief face and portion of the knife-back edge of another primary relief face. The drill structure can decrease the thickness of the chisel edge, reduces the resistance during drilling, and increases the life. 1. A drill structure comprisinga shank part; anda flute part arranged on one end of the shank part and a chisel edge formed on a front end of the flute part, wherein two primary relief faces with tile directions toward the shank part are symmetrically formed on two sides of the chisel edge, and each primary relief face has a cutting edge, a knife-back edge, and an outer edge, and wherein the outer edges are respectively helically extended around a periphery of the flute part toward the shank part to form two helical cutting edges and two helical grooves, and wherein two assist relief faces are respectively formed on the inner walls of the two helical grooves and every assist relief face is extended from the cutting edge of one primary relief face and portion of the knife-back edge of another primary relief face.2. The drill structure according to claim 1 , wherein the assist relief face and a horizontal plane claim 1 , which is perpendicular to a rotation axis of the drill structure claim 1 , have an included angle therebetween.3. The drill structure according to claim 1 , wherein the assist relief face has a width ...

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11-03-2021 дата публикации

CATHETER COMPRISING FLEXIBLE PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD FOR FLEXIBLE CIRCUIT BOARD

Номер: US20210069469A1
Автор: Schmied Benno
Принадлежит:

A catheter includes: an elongate, hollow, and flexible tube; at least one electrode for carrying out a diagnosis or therapy in a human body, the at least one electrode being arranged at an end region of the tube; and an electrical terminal attached at an other end region of the tube for electrically connecting the catheter to a control device. The at least one electrode and the electrical terminal are connected to one another in an electrically conducting manner by way of conductive tracks on a flexible printed circuit board. The flexible printed circuit board is arranged in the tube. The printed circuit board has a shape of a long ribbon, and the ribbon is pleated. 1. A catheter , comprising:an elongate, hollow, and flexible tube;at least one electrode configured to carry out a diagnosis or therapy in a human body, the at least one electrode being arranged at an end region of the tube; andan electrical terminal attached at an other end region of the tube for electrically connecting the catheter to a control device,wherein the at least one electrode and the electrical terminal are connected to one another in an electrically conducting manner by way of conductive tracks on a flexible printed circuit board,wherein the flexible printed circuit board is arranged in the tube, andwherein the printed circuit board has a shape of a long ribbon, and the ribbon is pleated.2. The catheter according to claim 1 , wherein the ribbon is severed out of a flexible printed circuit board in a helical manner as a ribbon having a constant width.3. The catheter according to claim 1 , wherein the ribbon is crimped.4. A method for manufacturing a flexible printed circuit board in a shape of a long ribbon for the catheter according to claim 1 , the method comprising the following steps:a. providing a flexible carrier plate;b. applying conductive tracks to the flexible carrier plate so as to produce a planar printed circuit board;c. severing, along a cutting line, a ribbon out of the planar ...

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12-03-2015 дата публикации

SYSTEMS AND METHODS FOR DRILLING HOLES IN PRINTED CIRCUIT BOARDS

Номер: US20150072121A1
Принадлежит:

An entry sheet comprising polymer material for drilling printed circuit boards is provided. The entry sheet is suitable for use with a broad range of diameters, including commonly available drill diameters. The entry sheet comprises an adhesive epoxy configured to, among others, resist drill deflection, resist mechanical damage, and reduce to dust such that the entry sheet may increase drilling accuracy, protect printed circuit board from damage, minimize entry burrs, and may addresses other issues such as fliers, bird nesting, and the like. 1. An entry sheet for drilling circuit boards , the entry sheet comprising:a substrate layer having a thickness of about 6 mils or less; andan entry sheet component provided over the substrate layer, wherein the entry sheet component has a thickness of about 6 mils or less.2. The entry sheet of claim 1 , wherein the entry sheet has a thickness in the range of about 4-12 mils.3. The entry sheet of claim 1 , wherein the substrate layer has a thickness in the range of about 1-6 mils.4. The entry sheet of claim 1 , wherein the entry sheet component has a thickness in the range of about 3-6 mils.5. The entry sheet of claim 1 , wherein the entry sheet is configured to be used with drill diameters in the range of about 0.10-6.7 mm.6. The entry sheet of claim 1 , wherein the entry sheet component comprises an adhesive.7. The entry sheet of claim 1 , wherein the entry sheet component comprises an epoxy.8. The entry sheet of claim 7 , wherein the epoxy is of the type bisphenol a/epichlorohydrin.9. The entry sheet of claim 1 , wherein the substrate layer comprises high-density fiberboard claim 1 , medium density fiberboard claim 1 , metal claim 1 , metal alloys claim 1 , paper claim 1 , melamine claim 1 , random fiber mats claim 1 , plastic claim 1 , chip board claim 1 , particle board claim 1 , phenolic claim 1 , phenolic supported with paper claim 1 , cloth claim 1 , or glass fiber claim 1 , solid phenolic sheets claim 1 , or laminated ...

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12-03-2015 дата публикации

ENTRY SHEET FOR DRILLING

Номер: US20150072122A1
Принадлежит:

The present invention provides an entry sheet for drilling excellent in hole position accuracy compared with the conventional entry sheet for drilling. Such an entry sheet for drilling is an entry sheet for drilling comprising metallic support foil and a layer comprising a resin composition formed on at least one surface of the metallic support foil, in which the resin composition contains a resin and 70 parts by mass to 130 parts by mass of molybdenum disulfide based on 100 parts by mass of the resin, and the layer comprising the resin composition has a thickness in a range from 0.02 to 0.3 mm. 1. An entry sheet for drilling comprising metallic support foil and a layer formed on at least one surface of the metallic support foil and comprising a resin composition ,wherein the resin composition comprises a resin and 70 parts by mass to 130 parts by mass of molybdenum disulfide as a solid lubricant based on 100 parts by mass of the resin, andthe layer comprising the resin composition has a thickness in a range from 0.02 to 0.3 mm.2. The entry sheet for drilling according to claim 1 , wherein the molybdenum disulfide has an average particle diameter of 1 to 20 μm.3. The entry sheet for drilling according to claim 1 , wherein the molybdenum disulfide has a purity of 85 mass % or more.4. The entry sheet for drilling according to claim 1 , wherein the resin composition comprises a water-soluble resin (A).5. The entry sheet for drilling according to claim 4 , wherein the water-soluble resin (A) comprises one or two or more water-soluble resins selected from the group consisting of polyethylene oxides; polypropylene oxides; sodium polyacrylates; polyacrylamides; polyvinyl pyrrolidones; cellulose derivatives; polytetramethylene glycols; polyesters of polyalkylene glycols; polyethylene glycols; polypropylene glycols; monoethers of polyoxyethylenes; polyoxyethylene monostearates; polyoxyethylene sorbitan monostearates; polyglycerol monostearates; and polyoxyethylene-propylene ...

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12-03-2015 дата публикации

Black polyimide film and processing method thereof

Номер: US20150072158A1
Автор: Chi-Huan Lo, Chih-Wei Lin
Принадлежит: Taimide Tech Inc

A black polyimide film includes a polyimide polymer formed by reaction of diamine monomers with dianhydride monomers, and a carbon black having an oxygen-to-carbon weight ratio higher than 11%. The black polyimide film can prevent flaking of carbon black when it is subject to an etching process, and exhibit desirable characteristics of extension rate and insulation.

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17-03-2022 дата публикации

MANUFACTURING METHOD OF PRINTED BOARD

Номер: US20220087011A1
Автор: HARADA Toshikazu
Принадлежит:

Resin films, all of which are formed of the same resin material, are laminated to form a laminate. Heat and pressure are applied to the laminate to integrate the resin films into one piece; then the pressure applied to the laminate is released and the laminate is cooled. In a predetermined region of the laminate which is to constitute a bent part, one or more of the resin films are arranged on each of one side and the other side in a lamination direction of the resin films with respect to one conductor pattern; and the total thickness of the one or more resin films arranged on the one side is larger than the total thickness of the one or more resin films arranged on the other side. Consequently, the predetermined region can be bent by utilizing the difference between contraction force generated in the one or more resin films arranged on the one side and contraction force generated in the one or more resin films arranged on the other side during the cooling after the application of heat and pressure. 1. A printed board comprising:a laminate in which a plurality of insulating base members are laminated; andone or more conductor patterns provided on the laminate, wherein:the laminate includes a bent part;the laminate includes a first main surface and a second main surface;in the bent part, a distance from a conductor pattern located closest to the first main surface among the one or more conductor patterns to the first main surface of the laminate is longer than a distance from a conductor pattern located closest to the second main surface among the one or more conductor patterns to the second main surface of the laminate;the first main surface is located on an inner peripheral side in the bent part; andno via is provided in the bent part.2. The printed board according to claim 1 , wherein a via is provided in a part other than the bent part of the laminate.3. The printed board according to claim 1 , further comprising a first board part claim 1 , wherein:the first ...

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08-03-2018 дата публикации

PRINTED CIRCUIT BOARD AND A METHOD FOR PRODUCING A PRINTED CIRCUIT BOARD

Номер: US20180070450A1
Принадлежит: Conti Temic Microelectronic GmbH

The disclosure relates to a printed circuit board for an electronic component. The printed circuit board includes: an electrically insulating substrate; a number of electrically conductive conductor tracks; and at least one sensor dome having a sensor head and having a carrier body for accommodating the sensor head. The carrier body is formed integrally with the substrate. The disclosure also relates to a method for producing the printed circuit board. 1. A printed circuit board for an electronic component , the printed circuit board comprising:an electrically insulating substrate;a number of electrically conductive conductor tracks; andat least one sensor dome having a sensor head and having a carrier body for accommodating the sensor head, wherein the carrier body is formed integrally with the electrically insulating substrate.2. The printed circuit board of claim 1 , wherein the electrically insulating substrate is formed from a fiber-reinforced plastic.3. The printed circuit board of claim 1 , wherein the carrier body projects perpendicularly from a surface side of the electrically insulating substrate.4. The printed circuit board of claim 1 , wherein the sensor head is connected mechanically and in electrically conductive fashion to at least one conductor track.5. The printed circuit board of claim 1 , further comprising a cover encapsulating the sensor dome.6. A method for producing a printed circuit board having an electrically insulating substrate claim 1 , a number of electrically conductive conductor tracks claim 1 , and at least one sensor dome having a sensor head and having a carrier body for accommodating the sensor head claim 1 , wherein the carrier body is formed integrally with the substrate claim 1 , the method comprising:intergrally forming the carrier body of the sensor dome with the substrate of the printed circuit board.7. The method of claim 6 , wherein the carrier body is cut out claim 6 , with a predefined contour claim 6 , from the ...

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08-03-2018 дата публикации

Method for preparing adhesive-free polyimide flexible printed circuit board

Номер: US20180070454A1

A method for preparing an adhesive-free polyimide flexible printed circuit board is provided. The method includes the following steps: 1) placing a polyimide thin film into a low vacuum environment, and treating the polyimide thin film using plasma produced by capacitively coupled discharge of an organic amine; 2) placing the polyimide thin film obtained in step 1) into a low vacuum environment, and pretreating the polyimide thin film using plasma formed by capacitively coupled discharge of a nitrogen gas bubbled through a metal salt solution; 3) pre-plating the polyimide thin film obtained in step 2) using vacuum sputtering or chemical plating so as to obtain a dense copper film with a thickness of less than 100 nm; and 4) thickening the copper film to a required thickness by means of an electroplating method.

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19-03-2015 дата публикации

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

Номер: US20150075845A1
Автор: YOO Ki Young
Принадлежит: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Disclosed herein are a printed circuit board and a method of manufacturing the same. According to a preferred embodiment of the present invention, the printed circuit board includes: a base substrate; an inner layer build-up layer formed on the base substrate and including a first inner layer circuit layer, a second inner layer circuit layer, an inner layer insulating layer, and an inner layer via having a tapered section; and an outer layer build-up layer formed on the inner layer build-up layer and including an outer layer circuit layer, an outer layer insulating layer, and an outer layer via having a rectangular section. 1. A printed circuit board , comprising:a base substrate;an inner layer build-up layer formed on the base substrate and including a first inner layer circuit layer, a second inner layer circuit layer, an inner layer insulating layer, and an inner layer via having a tapered section; andan outer layer build-up layer formed on the inner layer build-up layer and including an outer layer circuit layer, an outer layer insulating layer, and an outer layer via having a rectangular section.2. The printed circuit board as set forth in claim 1 , wherein the inner layer build-up layer includes at least one of the first inner layer circuit layer claim 1 , the second inner layer circuit layer claim 1 , the inner layer insulating layer claim 1 , and the inner layer via.3. The printed circuit board as set forth in claim 1 , wherein the inner layer build-up layer includes:the first inner layer circuit layer formed on the base substrate;the inner layer insulating layer formed on the base substrate and the first inner layer circuit layer;the inner layer via formed on the first inner layer circuit layer and formed to penetrate through the inner layer insulating layer; andthe second inner layer circuit layer formed on the inner layer insulating layer and the inner layer via.4. The printed circuit board as set forth in claim 1 , wherein the outer layer build-up layer ...

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05-06-2014 дата публикации

Printed circuit board and method for manufacturing the same

Номер: US20140151897A1
Автор: Kyung Don Mun
Принадлежит: Samsung Electro Mechanics Co Ltd

Disclosed herein are a printed circuit board, including an insulating layer; a circuit wiring formed on one surface or both surfaces of the insulating layer and made of a single metal layer; a via formed in the insulating layer for interconnecting the circuit wirings through the insulating layer; and a pad layer formed on one surface or both surfaces of the insulating layer and adhered to an end portion of the via, the pad layer being formed of a central portion extended from the via and an outside portion made of the same single metal layer as the circuit wiring, and a method for manufacturing the same.

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11-03-2021 дата публикации

MATING BACKPLANE FOR HIGH SPEED, HIGH DENSITY ELECTRICAL CONNECTOR

Номер: US20210076486A1
Принадлежит: Amphenol Corporation

A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns. 1. A printed circuit board comprising:a plurality of layers including conductive layers separated by dielectric layers; and first and second signal vias connecting to respective signal traces on at least one of the conductive layers;', 'ground vias extending through at least some layers of the plurality of layers; and', 'at least one non-plated air hole associated with one of the first and second signal vias and extending to a predetermined depth in the plurality of layers., 'via patterns formed in one or more of the plurality of layers, each of the via patterns comprising2. The printed circuit board as defined in claim 1 , wherein the at least one non-plated air hole includes non-plated air holes located on opposite sides of the first and second signal vias.3. The printed circuit board as defined in claim 1 , wherein the at least one non-plated air hole has a smaller diameter than the first and second signal vias.4. The printed circuit board as defined in claim 1 , wherein the at least one non-plated air hole extends through one or more layers of the plurality of layers.5. The printed circuit board as defined in claim 1 , wherein one or more of the plurality of layers includes a ground plane and wherein the ground plane is removed in an area ...

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24-03-2022 дата публикации

METHOD FOR IDENTIFYING PCB CORE-LAYER PROPERTIES

Номер: US20220091181A1
Принадлежит:

A reference via in a set of plated vias on a printed circuit board is located. A reference lead is applied to the reference via. A test via in the set of plated vias is located. A test lead is applied to the test via. An electrical conductance between the reference via and the test via is measured. A property of a core layer of the printed circuit board is identified based on the electrical conductance. 1. A method comprising:locating a first reference via in a first set of plated vias on a printed circuit board;applying a reference lead to the first reference via;locating a first test via in the first set of plated vias;applying a test lead to the first test via;measuring a first electrical conductance between the first reference via and the first test via; andidentifying a first property of a first core layer of the printed circuit board based on the first electrical conductance.2. The method of claim 1 , further comprising:applying the test lead to a second test via in the set of plated vias; andmeasuring a second electrical conductance between the first reference via and the second test via.3. The method of claim 2 , wherein the identifying comprises:recording the first electrical conductance as a first value in a core lot code;recording the second electrical conductance as a second value in the core lot code; andcomparing the core lot code to a set of reference core lot codes.4. The method of claim 1 , further comprising:generating a core lot code that reflects the property of the core layer; andprinting the core lot code on the surface of the printed circuit board.5. The method of claim 1 , further comprising:applying the reference lead to a second reference via;applying the test lead to a second test via in the set of plated vias; andmeasuring a second electrical conductance between the second reference via and the second test via.6. The method of claim 1 , further comprising:locating a second reference via in a second set of plated vias on the printed ...

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05-03-2020 дата публикации

Electronics assemblies for downhole use

Номер: US20200072045A1
Принадлежит: Baker Hughes Inc

Methods, systems, devices, and products for constructing a downhole tool electronics module. Methods may include creating a circuit board by metallizing at least part of a first surface on a first side of a substrate to define at least one metallized area on the first surface, wherein the substrate comprises a ceramic material and includes: the first side, including at least (i) the first surface, and (ii) an elevated surface elevated from the first surface, and a second side opposite the first side; flattening at least partially the elevated surface to a predefined first flatness to create a mounting portion by removing material from the elevated surface; attaching an electronics component to the first surface; and mounting the circuit board on an electronics carrier by adhering at least part of the mounting portion to a mounting surface on the electronics carrier. Flattening at least partially the elevated surface to the predefined first flatness may be carried out by removing the material by areal grinding.

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15-03-2018 дата публикации

SUSPENSION BOARD WITH CIRCUIT AND PRODUCING METHOD THEREOF

Номер: US20180075871A1
Принадлежит: NITTO DENKO CORPORATION

A suspension board with circuit having an opening with an electronic element inserted therein includes an insulating layer disposed at the edge of the opening, a first terminal disposed at one surface of the insulating layer and connected to a magnetic head, and a second terminal disposed at the other surface thereof and connected to the electronic element. The insulating layer includes a first portion in which the first terminal is disposed and a second portion that extends from the first portion toward the opening and is overlapped with a slider. The second portion is thinner than the first portion and is overlapped with the second terminal. The slider has a first surface facing the second portion. The first surface is disposed between the first terminal and the second terminal. 1. A suspension board with circuit capable of being mounted with a slider including a magnetic head and an electronic element for assisting the magnetic head , and having an opening with the electronic element inserted therein at the time of mounting of the slider comprising:an insulating layer disposed at the edge of the opening,a first terminal disposed at one surface of the insulating layer in a thickness direction of the insulating layer and electrically connected to the magnetic head at the time of mounting of the slider, anda second terminal disposed at the other surface of the insulating layer in the thickness direction and electrically connected to the electronic element at the time of mounting of the slider, whereinthe insulating layer includes a first portion in which the first terminal is disposed anda second portion that extends from the first portion toward the opening in a plane direction perpendicular to the thickness direction and is overlapped with the slider in the thickness direction at the time of mounting of the slider;the second portion is thinner than the first portion so that one surface gets closer to the other surface and is overlapped with the second terminal in ...

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05-03-2020 дата публикации

ULTRA LOW-COST, LOW LEADTIME, AND HIGH DENSITY SPACE TRANSFORMER FOR FINE PITCH APPLICATIONS

Номер: US20200072871A1
Принадлежит: Intel Corporation

Space transformation technology for probe cards at sort is disclosed. In one example, a space transformer transforms a pitch of electrical contacts from a first distribution to a second distribution. The space transformer comprises a substrate with opposite first and second sides; and vias extending through the substrate between the first and second sides and oriented at different angles with respect to one another. In one example, a tester system or probe card for a die comprises a printed circuit board (PCB) with pads having a pad pitch; and a space transformer operatively coupled to the PCB, and having vias extending from the pads of the PCB through the space transformer at different angles with respect to one another and configured to electrically connect to contacts on the die having a contact pitch different than the pad pitch. 1. A space transformer device configured for transforming a pitch of electrical contacts from a first distribution to a second distribution , the device comprising:a substrate with opposite first and second sides; andvias extending through the substrate between the first and second sides and oriented at different angles with respect to one another.2. The space transformer device of claim 1 , wherein the vias are linear.3. The space transformer device of claim 1 , wherein the vias are non-linear.4. The space transformer device of claim 1 , wherein the vias are multi-angled with multiple angles in each via at an obtuse angle with respect to one another.5. The space transformer device of claim 1 , wherein the vias are arcuate.6. The space transformer device of claim 1 , wherein the vias form an array or grid on each side of the substrate.7. The space transformer device of claim 1 , wherein the vias transform a pitch of the second distribution to less than three-quarters of a pitch of the first distribution.8. The space transformer device of claim 1 , wherein the vias transform a pitch of the second distribution to less than half of a pitch ...

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24-03-2022 дата публикации

Apparatus, system, and method of providing a ramped interconnect for semiconductor fabrication

Номер: US20220093424A1
Принадлежит: Jabil Inc

The disclosure is and includes at least an apparatus, system and method for a ramped electrical interconnection for use in semiconductor fabrications. The apparatus, system and method includes at least a first semiconductor substrate having thereon a first electrical circuit comprising first electrical components; a second semiconductor substrate at least partially covering the first electrical circuit, and having thereon a second electrical circuit comprising second electrical components; a ramp formed through the second semiconductor substrate between at least one of the first electrical components and at least one of the second electrical components; and an additively manufactured conductive trace formed on the ramp to electrically connect the at least one first electrical component and the at least one second electrical component.

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26-03-2015 дата публикации

Using time-domain reflectometry to identify manufacturing information for a passive printed circuit board

Номер: US20150082628A1
Принадлежит: International Business Machines Corp

A method uses time-domain reflectometry to measure a signal reflection delay in a conductive trace formed on a specific passive printed circuit board, and uses the measured signal reflection delay as an index into a table storing a predetermined association between signal reflection delay and passive printed circuit board manufacturing information, wherein the table includes a plurality of predetermined signal reflection delay values, and wherein each of the predetermined signal reflection delay values is associated with unique passive printed circuit board manufacturing information. During manufacturing of the passive printed circuit board, a hole is drilled through the passive printed circuit board so that the hole intersects with the conductive trace and divides the conductive trace into a proximal segment extending from the connector to the hole and a distal segment that is electrically isolated from the proximal segment by the hole.

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07-03-2019 дата публикации

SEGMENTED VIA FOR VERTICAL PCB INTERCONNECT

Номер: US20190075653A1
Принадлежит: Apple Inc.

Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials. 1. An electronic device comprising:a printed circuit board comprising:a plurality of layers;a plurality of traces, the plurality of traces formed of horizontal sections on surfaces of the plurality of layers; anda plurality of vertical sections between the plurality of layers, the plurality of vertical sections including a plurality of segmented vias, wherein the plurality of segmented vias are formed by:forming a first plurality of holes in the printed circuit board, each of the first plurality of holes extending from a top surface of the printed circuit board into the printed circuit board;plating the first plurality of holes;filling the first plurality of holes;forming a second plurality of holes in the printed circuit board, each of the second plurality of holes extending from a top surface of the printed circuit board into the printed circuit board, each of the second plurality of holes between adjacent holes in the first plurality of holes, wherein each of the second plurality of holes removes a portion of the plating of two adjacent holes in the first plurality of holes such that the plating of each of the first plurality of holes forms two vertical sections; andfilling the second plurality of holes.2. The electronic device of wherein each of the plurality of segmented vias extend through interior layers of the printed circuit board.3. The electronic device of wherein filling the first plurality of holes ...

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07-03-2019 дата публикации

PCB Assembly with Molded Matrix Core

Номер: US20190075655A1
Принадлежит:

Methods and devices related to the design and fabrication of molded cores for printed circuit board assemblies and system-on-package (SIP) devices are discussed. The discussed printed circuit board assemblies may have multiple electrical components embedded in a molded core matrix and forming electrical connections with one or more printed circuit boards attached to the molded core matrix. Methods for sourcing of electrical components and production of the molded cores and printed circuit board assemblies are also discussed. The methods and devices may increase a volumetric density of electrical components in printed circuit board assemblies and provide improved mechanical properties to the electrical circuit device. 1. A method to produce a printed circuit board assembly , the method comprising:disposing a set of electrical components on a plane such that a height of each electrical component as measured along a distance perpendicular to the plane best approximates without exceeding a first height; andapplying a molding material about the set of electrical components such that a thickness of the molding material as measured along a dimension perpendicular to the plane is substantially identical to the first height to form a core of the printed circuit board assembly.2. The method of claim 1 , comprising disposing a first printed circuit board along a first side the core of the printed circuit board assembly claim 1 , such that a first electrical component of the set of electrical components contacts a first surface of the first printed circuit board.3. The method of claim 2 , comprising disposing a second printed circuit board along a second side of the core of the printed circuit board assembly opposite to the first side claim 2 , such that the first electrical component contacts the second printed circuit board.4. The method of claim 2 , wherein the first electrical component contacts the first surface at a first terminal claim 2 , and the method comprises ...

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