Hydropower-station flood optimization dispatching method taking gate operation rules into consideration

The invention discloses a hydropower-station flood optimization dispatching method which takes gate operation rules into consideration. The method includes five steps: (1) structural description of the gate operation rules, which solves an expression problem of the complex gate operation rules; (2) instantiation of the gate operation rules, which solves a problem of how to use the structural-body examples of the gate operation rules to describe specific hydropower-station gate operation rules; (3) optimization generation of a gate opening combination number sequence, which solves a problem of coupling of the gate operation rules and traditional hydropower-station flood optimization dispatching methods; (4) optimization adjustment of the gate opening combination number sequence, which solves problems that in a flood dispatching process, during specific periods, water level exceeds the limit and at the end of a dispatching period, deviation exists between the water level and a target water ...

Ion implantation method of substrate back of power device

The invention relates to an ion implantation method of a substrate back of a power device, belonging to the technical field of semiconductor power devices. The ion implantation method disclosed by the invention comprises the following steps of: after finishing steps of a front face process of the power device, thinning the substrate back to an impurity implantation layer and then depositing a metal aluminum layer by utilizing a corrosion or grinding method after ion implantation (thinning or non-thinning process can be carried out on the substrate back before the ion implantation) and ion activation are finished, but not directly carrying out metal aluminum layer deposition like the traditional process. Therefore, the contact resistance between the subsequently deposited metal aluminum and the substrate can be reduced, unnecessary parasitic multi-layer structures can be eliminated, the leakage current and the on-state voltage drop of the power device are reduced, and the switching time ...

A lift frame for growing brilliant stove just has manually and auto -Turning

The utility model relates to a lift frame for growing brilliant stove just has manually and auto -Turning, hand wheel pole top is installed one end and is installed the spring beam on the vertical positioning board, fixed block upper portion install with the fixed block before terminal surface vertically worm, servo motor is installed to the lower part, the vertical band pulley fixed block of having arranged in fixed block the place ahead, servo motor's main shaft passes the band pulley fixed block and installs little band pulley, the one end of worm is passed the band pulley fixed block and is installed the big band pulley of being connected through drive belt and taeniola wheel, upward the lead screw is installed in vertical rotation between stopper and the lower stopper middle part, the lead screw passes down one of stopper and serves and install the worm wheel that matches with the worm, install a conical gear on the hand wheel pole, the 2nd conical gear who matches with a conical gear ...

Bidirectional MOS device and method for preparing the same

A bidirectional Metal-Oxide-Semiconductor (MOS) device, including a P-type substrate, and an active region. The active region includes a drift region, a first MOS structure and a second MOS structure; the first MOS structure includes a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure includes a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; and the drift region includes a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region. The active region is disposed on the upper surface of the P-type substrate. The first MOS structure and the second MOS structure are symmetrically disposed on two ends of the upper layer of the drift region.

Dual-direction MOS-type device and manufacturing method thereof

The invention discloses a power semiconductor device and a method for manufacturing the device and belongs to the technical field of the power semiconductor device. A dual-direction MOS(Metal Oxide Semiconductor )-type device is characterized in that both ends of the upper layer of an active region are respectively provided with a symmetric plane gate MOS structure, an U-shaped composite drifting region is arranged between the symmetric plane gate MOS structures and bilaterally symmetric about a cellular centre. High device breakdown voltage and low turn-on voltage drop/electrical resistance property can be obtained under a certain cellular width through the U-shaped composite drifting region with the symmetrical characteristics and the composite gate structure, thus the device is a dual-direction symmetrical electrical field stopping device; under an IGBT (Insulated Gate Bipolar Translator) operating model, the device is an IGBT device with a current carrier storage layer and a field stopping ...

CIC filter of PIR (Pyroelectric Infrared Detector) control chip and two filtering methods

The invention provides a CIC filter of a PIR (Pyroelectric Infrared Detector) control chip and two filtering methods. The filter comprises two selectors, a delay unit, a summator, a plurality of interpolators and a plurality of image-removal filters, the data input end of each selector is respectively connected with the output ends of the image-removal filters, the data output end of one selector is connected to the summator through the delay unit, the data output end of the other selector is connected to the input end of the summator, one input end of each interpolator is respectively connected to the output end of the summator, the output end of each interpolator is connected to the input end of the image-removal filter, and the output end of each image-removal filter is also connected to the other input end of the corresponding interpolator.

Controllable self-clamping SensorFET composite lateral power device

The invention discloses a controllable self-clamping SensorFET composite lateral power device and belongs to the fields of semiconductor power device technology and power integrated circuit technology. A main switching tube of a power inverter and a SensorFET device are integrated on the same P-type substrate and adopt a shared anode structure, wherein a clamping diode string is arranged between a control electrode of the SensorFET device and the shared anode; and the main switching tube of the power inverter can be a lateral metal oxide semiconductor (MOS) composite device or a conventional MOS device. The provided controllable self-clamping SensorFET composite lateral power device can provide stable charging current for an interior circuit and effectively release avalanche energy, so a transient safety operation area of the SensorFET device is expanded. Meanwhile, due to the connection of a clamping tube and a control grid area, the energy release and clamping time are controlled soas ...

Extremely-low on resistance shallow slot buried channel VDMOS (vertical double diffusion metal oxide semiconductor) device

The invention relates to an extremely-low on resistance shallow slot buried channel VDMOS (vertical double diffusion metal oxide semiconductor) device, belonging to the technical field of semiconductor devices. In the invention, a buried layer channel structure is utilized to greatly reduce the channel resistance, and the surface field effect of a metal oxide semiconductor structure is utilized to form an accumulation layer at a forward voltage and form a depletion layer at a backward voltage. The gate oxidation layer of the metal oxide semiconductor is thin, and electrons or cavities are accumulated on the lower surface of a semiconductor of the gate oxidation layer at an extremely low forward gate voltage, thus extremely low on resistance is obtained. A metal source electrode in a shallow slot structure is adopted, thus the number of versions of a process is reduced. The structural device can be applied to a portable power and a CPU (central processing unit) power system.

Insulated gate bipolar transistor with cavity blocking layer(s)

The invention relates to an insulated gate bipolar transistor with a cavity blocking layer(s), belonging to the technical field of a power semiconductor device. In the insulated gate bipolar transistor, on the basis of the traditional IGBT (insulated gate bipolar transistor) structure, one or more continuous or discontinuous N<+> cavity blocking layer(s) is/are introduced into an N<-> drift area of a device; due to the introduction of the N<+> cavity blocking layer(s), the movement of minority carrier cavities in an N<->drift area to an emitting electrode in forward conduction is effectively relieved, the concentration of the cavities in the N<-> drift area is increased, further the concentration of electrons and the cavities of the whole N<-> drift area is greatly increased, the concentration distribution of current carriers of the drift area is optimized, the electric conduction modulation in the device body is enhanced, and the forward conduction voltage drop of the device is reduced ...

Capacity controlled numerical frequency modulation circuit

The invention relates to a capacity control digital frequency adjusting circuit which belongs to the frequency adjusting technology in the electronic technology field. The invention comprises a capacitance charge-discharge circuit and a variable capacitance circuit. In the variable capacitance circuit, the switching on-off of the switch tube is controlled by the output signal of the counter and thus the total capacitance value of the charge-discharge capacitance; therefore, the dither output of frequency can be achieved, the frequency spectrum of the former higher harmonic is extended to a new frequency range which lowers the frequency spectrum amplitude and thus the electromagnetic interference of the switch power supply is reduced. Compared with flow control digital frequency adjusting circuit, the invention can achieve the dither function of frequency much better and lower the peak value of the switch frequency higher harmonic frequency spectrum and thus inhibit electromagnetic interference ...

Inter-stage active unlocking and separating device for two-stage injection aircraft

The invention discloses an inter-stage active unlocking and separating device for a two-stage injection aircraft, which belongs to the technical field of aerospace aircrafts and comprises a front intra-group synchronous unlocking and separating mechanism, a rear intra-group synchronous unlocking and separating mechanism and a separating deck in the inter-stage separation device for the two-stage injection aircraft. The separation deck is internally and fixedly connected with the front and rear intra-group synchronous unlocking separation mechanisms, and the lower portion of the separation deck is fixedly connected to the upper portion of the separation platform of the first-stage aircraft in the two-stage injection aircraft. According to the intra-group synchronous unlocking and separating mechanism, a driving motor drives a transmission shaft to rotate, a rotary table matched with the transmission shaft rotates along with rotation of the transmission shaft, the large ends of four connecting ...

Carrier-storing grooved gate IGBT with P-type floating layer

The invention relates to a carrier-storing grooved gate IGBT with a P-type floating layer, belonging to the technical field of semiconductor power devices. On a basis of the prior carrier-storing grooved gate bipolar transistor, a P-type floating layer (13) is introduced to almost free a carrier-storing layer from bearing a withstanding voltage and decrease a forward conducted voltage drop; and the P-type floating layer (13) also improves the electric-field integration effect of the bottom of the grooved gate, thereby effectively decreasing an electric filed with a maximum peak value, preventing the bottom of the grooved gate and the vicinity of the high-concentration carrier-storing layer from being broken down by an overhigh electric field and greatly increasing the breakdown voltage of the device. A JFET zone is introduced due to the existence of the P-type floating layer. When the device is forwardly conducted, the resistance of the JFET zone continuously increases along with the continuously ...

Low-power-consumption under-voltage protection circuit based on charge redistribution

The invention belongs to the field of analog integrated circuit design, and particularly relates to a low-power-consumption under-voltage protection circuit based on charge redistribution. The circuit comprises a clock control circuit, a charge redistribution circuit and a latch circuit. The clock control circuit generates a clock signal required by the under-voltage protection circuit, the charge redistribution circuit is controlled by a Timer timer output signal, an EN enable signal and an ENB enable signal, when the Timer timer output signal is at a low level, the circuit charges the first capacitor C1 and the fourth capacitor C4, and when the Timer timer output signal is at a high level, the circuit charges the second capacitor C1 and the fourth capacitor C4. When the low level of the clock signal CLK3 comes, the in-phase input end of the latch is connected into the second capacitor C2, charge redistribution occurs at the in-phase input end voltage Vip, the latch L1 quickly enters a ...

Method for protecting front face metal pattern during thermal annealing of back face of power device

The invention relates to a method for protecting a front face metal pattern during thermal annealing of the back face of a power device, belonging to the technical field of semiconductor power devices. The method comprises the following steps of: completing the front face manufacturing process of the power device; coating a layer of organic silicon resin on the surface of a front face metal pattern of the power device; preheating and curing the organic silicon resin; performing the back face manufacturing process of the power device; and after the back face process is completed, putting the power device into an organic solvent capable of dissolving the organic silicon resin to remove the organic silicon resin. A layer of high-temperature-resistant organic silicon resin is coated and curedon the surface of the front face metal pattern of the device before back face thermal annealing, so that impurity ions in a P region or an N region on a back part can be fully activated at higher annealing ...

IGBT with current carrier storage layer and additional hole passage

The invention discloses an insulate gate bipolar transistor (IGBT) with a current carrier storage layer and an additional hole passage, and belongs to the technical field of semiconductor power devices. In the IGBT, an N-type current carrier storage layer (5) and a large P<+> tagma (4) structure are introduced on the basis of a conventional planar non-pouch-through IGBT. The N-type current carrier storage layer (5) improves a conductivity modulation effect close to an emitter and the large P<+> tagma (4) structure plays a role in providing an additional passage for a hole so that the latch-up resistance is improved. Due to the design of the N-type current carrier storage layer (5) and the large P<+> tagma (4), the flow path of a hole current of the conventional IGBT is optimized, so that a safety operation area of a device is enlarged and the sensitivity of latch current density to a temperature is reduced.

Controllable self-clamp Sensor FET (Field Effect Transistor) composite longitudinal power device with multiple bleeding channels

The invention provides a controllable self-clamp Sensor FET (Field Effect Transistor) composite longitudinal power device with multiple discharging channels, belonging to the fields of semiconductor power device technology and power integrated circuit technology. In the invention, a main switch tube of a power converter and a Sensor FET device are integrated on the same P type substrate and shareone anode, wherein the Sensor FET device completes the functions of sampling current of the main switch tube of the power converter and charging an internal control circuit; in addition, the main switch tube of the power converter has a voltage clamp structure and can maintain the voltage of a primary coil of the power converter in a transient safe operation area of the Sensor FET device, and meanwhile, when a main switch device in the power converter is switched off, avalanche energy stored by the primary coil is bled under the regulation and control of a controllable grid region of the Sensor ...

Diode of anti surge current ability with it is high

The utility model discloses a diode of anti surge current ability with it is high, it includes the N+ substrate, the N+ substrate back is the metallization negative pole, the N+ substrate openly is the N - epitaxial layer, N - epitaxial layer upper surface has the oxide layer, the oxide layer top is polycrystalline silicon, N - epitaxial layer top has two P type doped regions, two P type doped region sides have N type doped region respectively, the metallization positive pole is located the device top layer, two P type doped region belows still have a P tagma respectively, two P tagmas are connected with the metallization positive pole through P type doped region, the metallization positive pole covers at polycrystalline silicon, P type doped region, the upper surface of N type doped region and N - epitaxial layer, the surge current that adulteratees for the P type between two the P type doped regions passageway of releasing, plug also cries the district, the problem of the anti surge current ...

Fabrication method for high-voltage BCD device

A method for preparing a high-voltage BCD device belongs to the technical field of semiconductor manufacturing, and comprises the steps of growing epitaxy, preparing Nwell, preparing Pwell, preparing Deep-N, pushing and knotting at a high temperature, preparing Pbase, preparing Pbody, preparing Pwell2 and preparing Pchstop, preparing Nchstop, pushing and knotting at a high temperature, preparing field oxygen, preparing a gate and field plates, preparing PSD, preparing NSD, preparing ohm holes, preparing film resistors, forming a metal layer, preparing a passivation layer, and preparing PAD. According to the invention, a high-voltage DMOS device, a high-voltage sampling device, a low-voltage BJT device, a low-voltage CMOS device, an N capacitance, a P capacitance, a well resistor, an accurate film resistor and the like can be manufactured on the same chip. The method can also be used for manufacturing a DMOS device and a sampling device, which are both capable of withstanding higher ...

Controllable self-clamp Sensor FET (Field Effect Transistor) composite longitudinal power device with multiple bleeding channels

The invention provides a controllable self-clamp Sensor FET (Field Effect Transistor) composite longitudinal power device with multiple discharging channels, belonging to the fields of semiconductor power device technology and power integrated circuit technology. In the invention, a main switch tube of a power converter and a Sensor FET device are integrated on the same P type substrate and share one anode, wherein the Sensor FET device completes the functions of sampling current of the main switch tube of the power converter and charging an internal control circuit; in addition, the main switch tube of the power converter has a voltage clamp structure and can maintain the voltage of a primary coil of the power converter in a transient safe operation area of the Sensor FET device, and meanwhile, when a main switch device in the power converter is switched off, avalanche energy stored by the primary coil is bled under the regulation and control of a controllable grid region of the Sensor ...

Low EMI's linear constant current LED drive circuit of sectional type

The utility model discloses a low EMI's linear constant current LED drive circuit of sectional type, it includes rectifier circuit and LED lamp cluster, rectifier circuit's first output and input detection module and LED lamp cluster wire are connected, the input detection module be connected with the EMI control module wire, the reference voltage module is connected with the EMI control module wire, the EMI control module output is connected with constant current control ware module wire, LED lamp cluster negative terminal is connected with constant current control ware module wire, the problem of prior art's the linear constant current LED drive circuit of sectional type at the full wave rectification voltage cyclic variation's of input in -process owing to all there is the sudden change process of voltage and electric current when each segmentation beginning, therefore the comparatively obvious EMI of this drive circuit existence, seriously influenced the life of LED lamp etc is solved ...

Trench-type insulated gate bipolar transistor (Trench IGBT) with enhanced internal conductivity modulation

The invention relates to a Trench IGBT with enhanced internal conductivity, belonging to the technical field of power semiconductor device. According to the invention, on the basis of the structure of the conventional Trench IGBT device, a dielectric layer is introduced between a P<-> base region and an N<-> drift region of the device so as to effectively prevent the P<-> base region from extracting minority carrier holes at the edge of the N<-> drift region during forward conduction, thereby greatly increasing electrons and hole density of the whole N<-> drift region, optimizing the density distribution of carriers in the drift region, enhancing the conductivity modulation in the device, lowering the forward conduction voltage drop of the device, and better compromising the forward conduction voltage drop and the turn-off loss. Meanwhile, the chip surface utilization rate is not reduced and the chip area is saved. The Trench IGBT is suitable for the field of semiconductor power devices ...

Super-junction IGBT (Insulated Gate Bipolar Translator) device with anode auxiliary gate

The invention relates to a power semiconductor technology, in particular to a super-junction IGBT (Insulated Gate Bipolar Translator) device with an anode auxiliary gate, which comprises a metal collector; the anode auxiliary plane gate is composed of a second conductive type semiconductor polycrystal region, a first insulating dielectric layer, a first conductive type semiconductor collector region, a second conductive type source region and a second conductive type impurity buffer layer; the super junction column region is composed of a first conductive type body region and a second conductive type body region; the carrier concentration storage region is composed of a second conduction type drift region; and the cathode grid structure is composed of a first conduction type impurity region, a metal emitter, a first conduction type semiconductor region, a second conduction type semiconductor region, second conduction type polycrystalline silicon and a second insulating dielectric layer.

First-stage integrator voltage clamping circuit

The invention provides a first-stage integrator voltage clamping circuit, and belongs to the field of analog integrated circuit design, an analog modulator circuit is a main module of a high-precision oversampling circuit, the final performance of a high-precision oversampling ADC depends on the excellent analog modulator design, and a traditional four-order oversampling modulator has the advantages that the performance of the high-precision oversampling ADC depends on the excellent analog modulator design; due to the fact that the amplitude of the input voltage is unstable, the output amplitude of the sampling modulator is unstable, and finally a wrong ADC conversion result is obtained, the purpose of stable overall output is achieved by clamping the output amplitude of the first stage.

Capacitance voltage-reducing circuit

The invention relates to an electronic circuit technology, and particularly relates to a capacitance voltage-reducing circuit. The capacitance voltage-reducing circuit comprises a bleeder resistor, a voltage-reducing capacitor, a rectifier filter module, an alternative output module, an output feedback module and a controller, wherein the bleeder resistor and the voltage-reducing capacitor are connected with the input end of the rectifier filter module after being connected in parallel, the output end of the rectifier filter module is connected with the input end of the alternative output module, and the output end of the alternative output module is respectively connected with the output feedback module and the controller. The capacitance voltage-reducing circuit has the beneficial effects of increasing the output current, enhancing the loading capacity, realizing the isolation of signals on a voltage converting channel, overcoming the defect that an output voltage is influenced when a ...

Thyristor controlled by accumulation layer

An accumulation layer controlled thyristor, which belongs to the technical field of semiconductor power devices, is characterized in that the on/off of the thyristor can be controlled by stopping electron circulation through an electron barrier of an internal electric field formed in a P bypass region and an N depletion region. When a positive voltage is applied on a gate, an accumulation layer is formed at the interface between the N depletion region (33) and a gate oxide layer (6); an electron inversion channel is formed in a P-type base region (8); and electrons pass through an N active region (9), the accumulation layer, an N layer (200), and the electron inversion channel to the an N base region (3), thereby controlling the normal operation of the device. The accumulation layer controlled thyristor as the substitute of the conventional gate controlled thyristors, such as MOS controlled thyristors, has the advantages of lower conduction voltage drop, larger saturation current density ...

Recombinant epidermal growth factor (EGF) and preparation method thereof

The invention discloses a recombinant epidermal growth factor (EGF) which is artificially synthesized in vitro. His 6-tag-SUMO (Small Ubiquitin-Like Modifier) protease identifying substrate is taken as an auxiliary fragment of protein soluble expression, EGF is taken as fused expression protein of a target fragment, the EGF is connected with a vector in positive sequence by a correct reading frame without a promoter and converted into an expression strain to finally construct fused protein which is in series connected with three expression substances. In the presence of imidazole, metal chelating medium is purified to obtain the fused protein with purity of 90% by one step, and enzyme digestion is carried out on the purified fused protein by utilizing SUMO protease with high specificity and high activity, so that a tag part HS and EGF target protein are dissociated, and the metal chelating medium is utilized to separate the tag part from the EGF target protein. A natural structure which ...

Diode with floating island structure

The invention belongs to the technical field of power semiconductor devices, and relates to a diode with a floating island structure. The diode comprises an N-type semiconductor substrate, a cathode arranged at the bottom of the N-type semiconductor substrate, an N-type semiconductor drift region arranged on the upper layer of the N-type semiconductor substrate, a gate oxide layer arranged on the upper layer of the N-type semiconductor drift region, and an anode arranged on the upper layer of the gate oxide layer, wherein the gate oxide layer is of a trench gate structure, and an N-type semiconductor region is arranged between the portions, on the two sides of a trench, of the gate oxide layer. The diode is characterized in that a plurality of doping regions including P-type semiconductor doping regions are arranged in the N-type semiconductor drift region, and therefore the floating island structure is formed. The diode has the advantages that conductive voltage is reduced, the reverse ...

Ion implantation method of substrate back of power device

The invention relates to an ion implantation method of a substrate back of a power device, belonging to the technical field of semiconductor power devices. The ion implantation method disclosed by the invention comprises the following steps of: after finishing steps of a front face process of the power device, thinning the substrate back to an impurity implantation layer and then depositing a metal aluminum layer by utilizing a corrosion or grinding method after ion implantation (thinning or non-thinning process can be carried out on the substrate back before the ion implantation) and ion activation are finished, but not directly carrying out metal aluminum layer deposition like the traditional process. Therefore, the contact resistance between the subsequently deposited metal aluminum and the substrate can be reduced, unnecessary parasitic multi-layer structures can be eliminated, the leakage current and the on-state voltage drop of the power device are reduced, and the switching time ...

Voltage-stabilizing switch power source with voltage ripple detection circuit

Grooved diode with floating island structure

The invention belongs to the technical field of power semiconductor devices and relates to a grooved diode with a floating island structure. The grooved diode is characterized in that a first N type semiconductor doped region, a floating P island and second N type semiconductor doped regions are arranged in the groove, the sidewalls, located at the groove, of the second N type semiconductor doped regions are connected with gate oxide layers, the floating P island is located between the second N type semiconductor doped regions, and the first N type semiconductor doped region is located on the tops of the second N type semiconductor doped regions and the floating P island and connected with an anode. The grooved diode with the floating island structure has the beneficial effects that lower forward voltage drop can be realized under the same current density and the reliability of the device is better at high temperatures. The grooved diode with the floating island structure is especially ...

Grooved gate IGBT with P-type floating layer

The invention relates to a grooved gate IGBT with a P-type floating layer, belonging to the technical filed of semiconductor power devices. On a basis of grooved gate insulated-gate bipolar transistor (IGBT) controlled by an accumulation layer, a P-type floating layer (11) is introduced to effectively improve the electric-field integration effect of the bottom of the grooved gate and greatly increase the breakdown voltage of the device. Meanwhile, due to the existence of the P-type floating layer, a JFET zone is introduced to play the effect of shielding the groove barrier potential of the accumulation layer to a certain extent and greatly reduce the drain current of the device. When the device is forwardly conducted, the saturation current density of the device is greatly decreased so as to greatly improve the short-circuit safety operation area (SCSOA) of the device. The invention maintains the original low forward-conducted voltage drop of the grooved gate IGBT controlled by the accumulation ...

Low-voltage buried channel VDMOS (vertical double-diffused metal oxide semiconductor) device

The invention provides a low-voltage buried channel VDMOS (vertical double-diffused metal oxide semiconductor) device, belonging to the technical field of semiconductor devices. The device has the following beneficial effects: the channel resistance is greatly reduced by adopting the buried layer channel structure; the MOS gate oxide layer is very thin; the MOS surface field effect is utilized; an accumulation layer is formed when forward voltage is applied between the gate and the source while a depletion layer is formed when backward voltage is applied between the gate and the source; and electron or hole accumulation occurs on the lower semiconductor surface of the gate oxide layer under low forward gate voltage, thus acquiring extremely low resistance and good switch characteristics. The device can be widely applied to portable power supplies and CPU power supply systems.

Level shifter circuit for gate driving of gate control device

The double pulse generator of the level shifter circuit takes out the rising edge and falling edge of the pulse width modulation signal PWM_H and generates corresponding narrow pulse signals. The two narrow pulse signals respectively pass through the pulse shaper to control the two field effect transistors in the switching circuit. The pulse width of the narrow pulse signal is not enough to completely switch on the two field effect transistors, so the generated waveform is a sawtooth wave; the drains of the two field effect transistors are respectively connected to the hysteresis-adjustable Schmidt trigger to restore the narrow pulse signal to the rising edge and falling edge pulse signal of the pulse width modulation signal PWM_HS with respect to the floating side VS, and then the signal is restored to the level-shifted pulse width modulation signal PWM HS after passing through the RS latch.

RC-IGBT (reverse-conducting insulated gate bipolar translator) capable of inhibiting snapback effect

The invention relates to the power semiconductor technology, in particular to an RC-IGBT (reverse-conducting insulated gate bipolar translator) capable of inhibiting a snapback effect. A main method of the RC-IGBT comprises steps as follows: a metal resistor with proper resistance is produced between electrode contacts of a P-type collector region and an N-type collector region, when the device is connected forwards, the current IF flows through the metal resistor R and produces voltage drop IFR on the metal resistor, the voltage difference is produced between the P-type collector region and an N-type buffer layer, and if the IFR is larger than the forward connection voltage drop of a PN junction, the PN junction is connected forwards to be in an IGBT working mode, so that the snapback effect is effectively inhibited. The RC-IGBT has the benefits that the RC-IGBT has the excellent capacity of inhibiting the snapback phenomenon under the condition that the process complexity is not increased ...

Junction field effect transistor (JFET) device and manufacturing method thereof

The invention relates to a semiconductor technology, in particular to a junction field effect transistor (JFET) device and a manufacturing method thereof. The JFET device is characterized in that junction depths of a P+ gate region 1 are uneven and are gradually increased from one end close to an N+ drain region 2 to one end close to an N+ source region 3. The JFET device has the advantages that the constant-current characteristics are good, and the requirements of smaller constant-current precision can be met. The manufacturing method is particularly suitable for the JFET device and manufacturing of the JFET device.

LED driving circuit

The invention relates to the technical field of electronic circuits, in particular to an LED driving circuit. The LED driving circuit comprises an open circuit protection module, a thermal protection module, an LED module, a feedback module, a dimming module, a switching tube M1, a diode D and an inductor L, wherein a drain electrode of the switching tube M1 is connected with an external direct current power supply, a source electrode of the switching tube M1 passes through the inductor L to be connected with the input end of the open circuit protection module and the input end of the LED module, a grid electrode of the switching tube M1 is connected with the output end of the feedback module and the output end of the dimming module, the source electrode of the switching tube M1 is connected with the negative pole of the diode D at the same time, the positive pole of the diode D is connected with the ground, the open circuit protection module is in parallel connection with the LED module ...

Deep groove side oxygen controlled planar isolated gate bipolar transistor

The invention discloses a deep groove side oxygen controlled planar isolated gate bipolar transistor, belonging to the technical field of semiconductor power devices. A deep groove body electrode structure consisting of a P-type floating layer, a deep groove silicon dioxide oxide layer and a deep groove body electrode is prevented from being introduced to a planar isolated gate bipolar transistor in the conventional electric field, the introduction of an extra electric field is realized, and transverse consumption of an N-pillar is facilitated, so that the doping concentration of the N-pillar can be increased under the same withstand voltage, and the on-state voltage drop during positive break-over is lowered. A reverse electric field opposite to the original electric filed can be generated on the top of a device by applying a certain positive voltage to the body electrode, so that the original peak-value electric field is lowered and the breakdown voltage of the device is raised. By adopting ...

Bidirectional low-capacitance vertical device for ESD (Electro-Static Discharge) protection

The invention belongs to the field of electronic science and technology, and particularly relates to a bidirectional low-capacitance vertical device for ESD protection, which comprises an n + type substrate (01), a p type buried layer (02), a p type epitaxial layer (03), an n type buried layer (04), a first n type epitaxial layer (051), a second n type epitaxial layer (052), a first isolation region (31), a second isolation region (32), a third isolation region (33), a pwell region (06), an N + contact region (11), a P + region (21), a first input/output port (41) and a second input/output port (42). By introducing the p-type buried layer, the p-type epitaxial layer, the n-type buried layer and the serially connected vertical structure diodes, bidirectional conduction is realized, and parasitic capacitance is effectively reduced.

Synchronous rectification circuit

Provided is a synchronous rectification circuit, which relates to electronic circuit technologies. The synchronous rectification circuit is self-driven by a combination of a charge pump and a Boost circuit, including a rectification MOSFET, a charge pump, logic control modules, voltage detection modules, an oscillator module, a PWM generation module, a reference voltage generation module, a switch, a free-wheeling MOSFET, an isolation MOSFET, an inductor, a capacitor and sampling resistors. According to the present application, initially, the charge is stored on the capacitor through the charge pump, the Boost circuit is turned on till the voltage is increased to a certain value; through processing by the logic control modules and the like, the rectification MOSFET is turned on, thus self-driving of the synchronous rectification circuit is achieved. The self-driving mode can charge the capacitor faster, lower the duty of the rectification circuit, and reduce the average conduction voltage drop.

Insulated trench gate electrode bipolar type transistor

The invention provides a slot simulated gate bipolar transistor, which belongs to the technical field of semiconductor power devices. Based on the prior slot simulated gate bipolar transistor, the invention is additionally provided with a P<+> hole collecting zone (5), to avoid holes entering a P type zone (6) and achieve good action of bypassing the holes, thereby greatly weakening the parasitic thyristor effect, improving the safety operation zone of the device and particularly improving the high-temperature latching resistance of the device. Simultaneously, a metal emitter (8) of the invention is made into a slot metal electrode. Besides the reduction of the contact resistance of the device, the device can dissipate heat more easily and reduces temperature rise, thereby achieving excellent high-temperature operating characteristics. Furthermore, During the injection of the P<+> hole collecting zone(5) and an N<+> source(7) of the slot simulated gate bipolar transistor, an additional ...

Low-power-consumption RC relaxation oscillator

The invention belongs to the technical field of electronic circuits, and particularly relates to a low-power-consumption RC relaxation oscillator. Comprising a self-biased current source, a charging and discharging circuit, a positive threshold hysteresis comparator and a two-stage current-limiting inverter, the self-biased current source generates current irrelevant to power supply voltage, the charging and discharging circuit images the current of the self-biased current source and charges and discharges a capacitor under the control of an output signal QA and an output signal QB, and the two-stage current-limiting inverter outputs current to the self-biased current source. Voltage at two ends of the capacitor is output voltage of the positive threshold hysteresis comparator and is controlled by an output signal QA in the charging and discharging process of the capacitor, and change of an overturning threshold is achieved by changing the number of input geminate transistors. The two-stage ...

CSTBT manufacturing method

The invention relates to the semiconductor technology, in particular to a CSTBT manufacturing method. According to the basic technology of a CSTBT manufacturing method, an N-type field cut-off region 2 and an N-drifting region 3 are sequentially grown epitaxially on a P+ monocrystalline silicon wafer substrate; after a front face groove-gate MOS technology is formed, the back face is thinned. According to the main technical scheme, selective injection and low temperature annealing are performed on the back face H+ of the wafer, donors relevant to hydrogen are activated, and an N-type CS layer located at the bottom of the Pbody base region is formed. Finally, the back face metallization technology is applied, and then a complete structure of a CSTBT is formed. The CSTBT manufacturing method has the advantages of reducing manufacturing technological difficulty and lowing manufacturing cost and particularly for manufacturing the CSTBT.

LED AC drive circuit of preventing twinkleing

The utility model discloses a LED AC drive circuit of preventing twinkleing, it includes alternating current power supply, drive module and LED module, and the alternating current power supply output is connected with rectifier bridge input wire, and the first output of rectifier bridge is connected with energy storage module, drive module and LED module input wire, and the drive module output is connected with LED module input wire, another output and the earthing terminal of energy storage module, drive module and LED module of rectifier bridge are connected and ground connection, the LED AC drive circuit of having solved prior art drives LED and normally works when input voltage is greater than a definite value. But the whole circumstances of closing of LED lamp will appear when input voltage is less than a definite value, and the periodic appearance of this phenomenon, embody intrinsic stroboscopic phenomenon, seriously reduced LED's technical problem such as life.

Gate charge and discharge regulating circuit for gate control device

A gate charge and discharge adjustment regulating circuit for a gate control device belongs to the power electronics technology field. The switch control signal is connected to the control terminals of the four analog switches. The gate control signal is loaded on the gate of the correct field effect transistor under the action of the four analog switches to control the switching-on degree so as to achieve the purpose of adjusting the gate driving signal current, that is, regulating the gate charge and discharge currents of the gate control device to realize the change of the switching characteristics and conduction characteristics. The switch control signal is connected to the input terminal of the gate driving module to control the gate driving module to generate the gate driving signal.

Collecting electrode IGBT having hole injection structure

A collector-short IGBT with a hole injection structure belongs to the technical field of semiconductor power devices. In the invention, the hole injection structure and a collector-short structure are introduced into a conventional planar non-punch through IGBT. The collector-short structure comprises short-circuit N regions (3) and P-type collector regions (2) arranged alternately; and the hole injection structure (14) consists of a third P body region (5), a third P-type base region (6), a third N source region (7) and a floating conductor (11), wherein the floating conductor (11) is used for short-connecting the third P-type base region (6) and the third N source region (7). By adopting the hole injection structure and the collector-short structure in the conventional planar non-punch through IGBT, the collector-short IGBT has lower conduction voltage drop, larger saturation current density and higher turn-off speed. According to the invention, the non-punch through IGBT can have better ...

Integrated magnetic switch chip

The invention discloses an integrated magnetic switch chip, which is used for improving the accuracy of data acquisition of the integrated magnetic switch chip. The circuit comprises a Wheatstone bridge, a low-offset amplifier, a first Schmitt trigger, a second Schmitt trigger, a power supply module, a digital control module, a first transistor, a second transistor, a ground pin, a clock input pin CKI, a clock sending pin CKO and an output pin. The power supply module is respectively connected with the Wheatstone bridge, the low-offset amplifier and the first Schmitt trigger; the Wheatstone bridge is respectively connected with the low-offset amplifier and the first transistor; the digital control module is respectively connected with the low-offset amplifier, the first Schmitt trigger, the second Schmitt trigger, the clock input pin CKI, the clock sending pin CKO and the first transistor; the first Schmitt trigger is respectively connected with the low-offset amplifier and the second transistor ...

Temperature compensating circuit for linearly driving LED

The invention relates to an electronic circuit technology, in particular to a temperature compensating circuit for linearly driving an LED. The circuit is characterized by further comprising an operational amplifier, a driving tube MN and a resistor R, wherein the temperature of an LED module is sampled by a temperature sampling module and the output end of the temperature sampling module is connected with the input end of a temperature compensation module; the output voltage of the temperature compensation module and the output voltage of a reference voltage module are added together and then applied to the positive input end of the operational amplifier; the negative input end of the operational amplifier is connected with a source electrode of the driving tube MN, the enabling end EN of the operational amplifier is connected with an over-temperature turn-off module, and the output end of the operational amplifier is connected with a grid electrode of an enabling tube MN; a positive electrode ...

Low-voltage oscillator

The invention relates to an electronic circuit technology, and particularly relates to a low-voltage oscillator. The low-voltage oscillator disclosed by the invention comprises a self-adjustment current reference module, a first mirror image circuit, a second mirror image circuit, a control module, a hysteresis inverter and a capacitor C1, wherein the output end of the self-adjustment current reference module is connected to the input end of the first mirror image circuit; the output end of the first mirror image circuit is connected with the positive power end of the second mirror image circuit; the input end of the control module is connected with the negative power end of the first mirror image circuit and the input end of the second mirror image circuit; the output end of the control module is connected with the enable end of the first mirror image circuit, the enable end of the second mirror image circuit and the input end of the hysteresis inverter; the output end of the hysteresis ...

Acid-resistant magnetic nano-material of phase-transition lysozyme coating as well as preparation method and application of acid-resistant magnetic nano-material

The invention discloses an acid-resistant magnetic nano material of a phase-transition lysozyme coating as well as a preparation method and application of the acid-resistant magnetic nano material, and belongs to the technical field of preparation of nano functional materials. According to the preparation method, under the action of tris (2-carboxyethyl) phosphine salt, disulfide bonds on lysozyme chains are reduced into sulfydryl, meanwhile, configuration transformation and phase transformation occur, lysozyme is mildly and rapidly deposited on the surfaces of ferroferric oxide magnetic nanospheres, internal ferroferric oxide magnetic cores can be effectively prevented from being eroded or damaged due to the excellent acid and alkali resistance of the ferroferric oxide magnetic nanospheres, and the performance of the ferroferric oxide magnetic nanospheres is improved. And finally, the nano material and the chromium target pollutant are removed from the wastewater together for utilization ...

Shallow-slot metal oxide semiconductor diode

The invention discloses a shallow-slot metal oxide semiconductor diode for solving reducing the forward conduction voltage drop of the diode, increasing reverse breakdown voltage and reducing leakage current. The shallow-slot metal oxide semiconductor diode provided by the invention comprises a metallized cathode, an N-type heavily-doped monocrystalline silicon substrate region, an N-epitaxial layer, two deep P regions located on two sides, shallow slots located on the deep P regions, N-type heavily-doped regions on the inner sides of the shallow slots, a silicon dioxide gate oxide layer, a polycrystalline silicon gate electrode and a metallized anode, which are arranged in sequence from the bottom layer to the top. Compared with the prior art, by adopting the electron accumulation layer structure and the junction field-effect tube structure, the invention can obtain extremely low conduction voltage drop, greatly improve the breakdown voltage, and reduce the leakage current. Under reverse ...

Preparation and application of targeting antineoplastic fusion protein LPO

The invention discloses targeting antineoplastic fusion protein LPO. An artificially synthesized target gene segment LHRH-PEA wiped membrane peptide-ONC (LPO for short) is inserted in PET28a plasmids, and the fusion protein is expressed after the LPO inserted the plasmids are conveyed in escherichia coli BL21(DE3). Experiments prove that the fusion protein LPO has obvious inhibiting effect to tumor cell lines with LHRH receptors such as colon cancer LOVO cells, lung cancer A549 cells, oral cancer KB cells and prostatic cancer PC-3M cells rather than lymphoma Hut 102 and leukemia HL60 without LHRH receptors, and has targeting specificity, and is safe and reliable.

Collecting electrode IGBT having hole injection structure

A collector-short IGBT with a hole injection structure belongs to the technical field of semiconductor power devices. In the invention, the hole injection structure and a collector-short structure are introduced into a conventional planar non-punch through IGBT. The collector-short structure comprises short-circuit N<+> regions (3) and P-type collector regions (2) arranged alternately; and the hole injection structure (14) consists of a third P<+> body region (5), a third P-type base region (6), a third N<+> source region (7) and a floating conductor (11), wherein the floating conductor (11) is used for short-connecting the third P-type base region (6) and the third N<+> source region (7). By adopting the hole injection structure and the collector-short structure in the conventional planar non-punch through IGBT, the collector-short IGBT has lower conduction voltage drop, larger saturation current density and higher turn-off speed. According to the invention, the non-punch through IGBT ...

IGBT device with voltage sampling function

The invention relates to an IGBT (Insulated Gate Bipolar Translator) device with a voltage sampling function, which is characterized in that an MOS (Metal Oxide Semiconductor) structure is introduced into a floating field ring adjacent to an IGBT main junction to serve as a voltage sensor, the change of the potential of the floating ring controls the opening and closing of a channel of the MOS structure, the source electrode of the MOS structure is externally connected with a sampling resistor, and a mapping relation exists between the change of the voltage of the source electrode and the withstand voltage of the IGBT. A threshold voltage is needed for opening an MOS structure channel, and the threshold voltage is mapped to the voltage of an IGBT collector electrode to be Vst, that is, when the voltage of the IGBT collector electrode is increased to Vst, a Sensor starts to detect Vce and sample the mapping relation between the voltage change of an MOS source electrode and the IGBT collector ...

Accumulating diode

The invention belongs to the technical field of power semiconductor devices, and relates to an accumulating diode. The accumulating diode is characterized in that first N type semiconductor doped regions, a first P type semiconductor doped region and a second P type semiconductor doped region are arranged in a trench, wherein the first N type semiconductor doped regions are positioned on the side walls of the trench and are connected with gate oxide layers; the first P type semiconductor doped region and the second P type semiconductor doped region are positioned between the first N type semiconductor doped regions; the first P type semiconductor doped region is positioned on the top of the second P type semiconductor doped region and is connected with an anode. The accumulating diode has the beneficial effects that lower positive voltage drop can be realized at the same current density and the device has better reliability at high temperature. The accumulating diode is particularly suitable ...

Short -circuiting device is prevented to sapphire crystal growth furnace's tungsten thermal field

The utility model relates to a short -circuiting device is prevented to sapphire crystal growth furnace's tungsten thermal field, including the heating member, the heating member top is provided with the thermal field, and the one end of heating member is connected with the positive pole of power, and the other end is connected with the negative pole of power, the heating member both ends still are connected with first voltmeter, the one end of thermal field is passed through the second voltmeter and is linked to each other with the anodal of power, and it is continuous with the negative pole of power that the other end passes through the A third voltage table. The utility model discloses inside short circuit matter's emergence can be effectually avoided, equipment loss and personal safety accident can be avoided causing.

Water treatment separation membrane processing equipment

The invention discloses water treatment separation membrane processing equipment, and relates to the field of membrane processing equipment. The water treatment separation membrane processing equipment comprises a processing equipment table main body and a motor main body, the motor main body is arranged on the processing equipment table main body, a supporting shaft seat and a clamping table are arranged at the top of the processing equipment table main body, a water treatment separation membrane main body is arranged between the supporting shaft seat and the clamping table, and a mechanical arm is arranged on the processing equipment table main body; a glass fiber reinforced plastic raw material tank is arranged on the mechanical arm, an attaching pipe head is arranged at the output end of the glass fiber reinforced plastic raw material tank, and a pressing plate is rotationally connected to the attaching pipe head. According to the water treatment separation membrane processing equipment ...

Controllable self-clamping SensorFET composite vertical power device

The invention discloses a controllable self-clamping SensorFET composite vertical power device, which belongs to the technical field of semiconductor power devices and power integrated circuits. In the device, a main switch tube of a power inverter and a SensorFET device are integrated on the same P-type substrate and have a shared anode (or shared metal anode) structure, wherein a clamping diode string is arranged between a control electrode and the shared anode of the SensorFET device; and the main switch tube of the power inverter can be a vertical metal oxide semiconductor (MOS) composite device or the normal vertical MOS device. The controllable self-clamping SensorFET composite vertical power device provided by the invention can effectively discharge snow slide energy while providing a stable charge current for an internal circuit, so that a transient safe operating area of the SensorFET device is expanded. Moreover, the energy discharging amount and clamping time are controlled by ...

Controllable self-clamping SensorFET composite lateral power device

The invention discloses a controllable self-clamping SensorFET composite lateral power device and belongs to the fields of semiconductor power device technology and power integrated circuit technology. A main switching tube of a power inverter and a SensorFET device are integrated on the same P-type substrate and adopt a shared anode structure, wherein a clamping diode string is arranged between a control electrode of the SensorFET device and the shared anode; and the main switching tube of the power inverter can be a lateral metal oxide semiconductor (MOS) composite device or a conventional MOS device. The provided controllable self-clamping SensorFET composite lateral power device can provide stable charging current for an interior circuit and effectively release avalanche energy, so a transient safety operation area of the SensorFET device is expanded. Meanwhile, due to the connection of a clamping tube and a control grid area, the energy release and clamping time are controlled so as ...

LED driver without electrolytic capacitor

The invention belongs to the technical field of electronic circuits, and particularly relates to an LED driver without an electrolytic capacitor. The LED driver without the electrolytic capacitor comprises a rectification bridge, a reference voltage generation module, a drive module, an LED, a power tube, an operational amplifier, an analog multiplier, a current amplifier, a zero-cross detection device (ZCD), an MOS tube, a resistor and the like. A circuit in the driver works in an inductance and current critical conduction mode, power factor correction is automatically achieved, the peak value of input power is lowered through a harmonic component, a capacitance element with a small capacity value can be used, and accordingly use of the high-capacity electrolytic capacitor is avoided. Meanwhile, by means of a method for transiently responding to an enhanced network, load transient response speed is very high, interference resistance is enhanced, the load adjustment rate is high, and meanwhile ...

Step wave generating circuit

The invention relates to an electronic circuit technology and in particular relates to a step wave generating circuit. The step wave generating circuit comprises a rectifier bridge circuit and is characterized by also comprising a plurality of step voltage adjusting networks and a plurality of constant current controlling networks, wherein the rectifier bridge circuit is connected with the step voltage adjusting networks and the constant current controlling networks, and the step voltage adjusting networks and the constant current controlling networks are equal and are correspondingly connected one by one. The step wave generating circuit has the beneficial effects that a step wave with an arbitrary step number and adjustable step voltage can be generated; meanwhile, the circuit has a simple structure without digital logic control and programming, and the circuit utilization efficiency can be effectively improved. The electronic circuit technology provided by the invention is particularly ...

Preparation method of FS-IGBT

The invention provides a method for preparing an FS-IGBT (Field Stop-Insulated Gate Bipolar Translator) on a silicon wafer, which is used for solving the problems caused by a thin silicon wafer during a preparation process of a medium/low-voltage FS-IGBT that the preparation technology is complicated, the difficulty is large, the thin silicon wafer warps and deforms and is segmented, the size of the thin silicon wafer (a wafer) is limited, the yield is low, the cost is high, and industrialization is difficult to realize and overcoming the huge technical challenge caused by the thin silicon wafer in follow-up scribing of the wafer and encapsulating of a chip. The preparation method comprises the steps of selecting light-doped FZ silicon as a first silicon wafer and heavy-doped CZ silicon or FZ silicon as a second silicon wafer; firstly, making an N-type FS layer and a P-type transparent collecting zone on the back surface of the first silicon wafer; then, bonding the first silicon wafer ...

Novel preparation process of genetic engineering IFN (interferon) alpha-2b fusion protein

The invention provides a novel preparation method of a genetic engineering IFN (interferon) alpha-2b fusion protein. In order to solve the current problem that mispaired isomers cannot be removed, a fusion expression vector is adopted for fusion expression of a protein which promotes a disulfide bond of an IFN alpha-2b to be correctly folded, an efficient protease substrate fragment and an IFN alpha-2b gene to form an expression form with a soluble natural-structure; a target protein can be expressed by adopting the soluble natural structure, the activity is high, renaturation treatment is not needed, and protein isomers are avoided from being generated; a protein purification process is concise, the purity of the genetic engineering IFN alpha-b fusion protein can reach over 90 percent just by one-step metal chelation and affinity chromatography, fusion protein fragments can be removed, and the final product with the purity over 95 percent can be obtained by affinity chromatography, thus ...

Sansevieria trifasciata saponin, preparation method and application thereof

The invention discloses sansevieria trifasciata saponin, a preparation method and application thereof. The method comprises the following steps of: making the sansevieria trifasciata into dry powder, extracting by using water, alcohol or methanol, extracting by using petroleum ether or ether, and extracting by using butyl alcohol or pentanol to obtain the sansevieria trifasciata total saponin extract. The method for preparing the sansevieria trifasciata saponi optimizes the process conditions, has simple operation and low cost, has low requirement on process equipment, can reduce the consumption of solvents and enhance the leaching rate. The sterilized sansevieria trifasciata has obvious inhibition function on the growth of JurKet, has no activity killing effect on human cervical carcinoma cells (HeLa) and human gastric carcinoma cells (BGC823), and has no injury to normal Chinese Hamster Ovary (CHO), and the cell grows normally without any obvious change.

Small celestial body star catalogue terrain passive self-adaptive mechanism

The invention discloses a small celestial body star catalogue terrain passive self-adaptive mechanism which comprises a clamping device, a fixed platform, a movable platform and three motion branch chains which are located between the movable platform and the fixed platform and are the same in structure. The moving branch chains are installed on a bottom plate of the moving platform in the mode that the circumference of each moving branch chain is 120 degrees, the clamping devices are also installed on a bottom plate of the moving platform in the mode that the circumference of each moving branch chain is 120 degrees, and the clamping devices are also 120 degrees so as to clamp and fix the attachment mechanism. When the attachment mechanism makes contact with the terrain complex and an attachment fitting spherical surface does not reach the center, the position and posture of the attachment mechanism deviate in the attachment process, and at the moment, the mechanical arm is kept fixed; ...

Power MOS device with single-particle burnout resistance

The invention relates to the technical field of power semiconductor devices, in particular to a power MOS device with the single-particle burnout resistance. According to the power MOS device with the single-particle burnout resistance, the current path of the device at normal work is avoided through a silicon dioxide dielectric layer located under a heavily-doped N-type source area, and therefore turn-on resistance of the device is not affected, and silicon dioxide does not affect the breakdown voltage of the device as the insulating dielectric layer in a P-type semiconductor base area. The power MOS device with the single-particle burnout resistance has the advantages that the peak value of instantaneous current generated in the high-energy particle bombardment process is greatly reduced; the irradiation current is effectively reduced; the lateral voltage generated in a Pbody area at high current density cannot turn on a parasitic bipolar transistor due to isolation of the silicon dioxide ...

Inertial measurement unit calibration method suitable for low-precision no-azimuth reference biaxial transfer equipment

The invention discloses an inertial measurement unit calibration method suitable for low-precision no-azimuth reference biaxial transfer equipment, and belongs to the technical field of inertia. The calibration method uses the low-precision no-azimuth reference biaxial transfer equipment, 19 positions are needed in the whole calibration rotation arrangement, a first-order intermediate parameter delta and a second-order intermediate parameter omega are obtained by fitting speed error and sky direction attitude error of the positions, finally according to the relationship between the intermediate parameters and error parameters, the error parameter of each device can be calculated by the least square method, in order to eliminate location error caused by a turntable, and error parameters obtained by previous-time iterative computation and original output data of an original inertial measurement unit are substituted into a navigation equation for calculating one-time observed quantity ...

Current-stabilizing switch power source with voltage ripple detection circuit

Controllable self-clamping SensorFET composite transverse power device with multiple release channels

The invention discloses a controllable self-clamping SensorFET composite transverse power device with multiple release channels, and belongs to the fields of semiconductor power device technology and power integrated circuit technology. A main switching tube of a power converter and a SensorFET device are integrated on the same P-type substrate and share an anode structure, wherein the SensorFET device finishes the functions of sampling the current of the main switching tube of the power converter and charging an internal control circuit; the main switching tube in the power converter has a voltage clamping structure, and the voltage of a primary coil of the power converter is kept within a transient safe working area of the SensorFET device by voltage clamping; meanwhile, when a main switching device in the power converter is turned off, the avalanche energy stored by the primary coil is controlled and released through a controllable gate region of the SensorFET device to realize control ...

Bidirectional insulated gate bipolar transistor

A bidirectional IGBT device, including a cellular structure including: two MOS structures, a substrate drift layer, two highly doped buried layers operating for carrier storage or field stop, two metal electrodes, and isolating dielectrics. Each MOS structure includes: a body region, a heavily doped source region, a body contact region, and a gate structure. Each gate structure includes: a gate dielectric and a gate conductive material. The two MOS structures are symmetrically disposed on the top surface and the back surface of the substrate drift layer. The heavily doped source region and the body contact region are disposed in the body region and independent from each other, and both surfaces of the heavily doped source region and the body contact region are connected to each of the two metal electrodes. The gate dielectric separates the gate conductive material from a channel region of each of the MOS structures.

Enhancement mode planar insulated gate bipolar transistor (IGBT)

The invention discloses an enhancement mode planar insulated gate bipolar transistor (IGBT), belonging to the technical field of semiconductor power devices, wherein a hole bypass structure consisting of a P+ body region and a trench-type metallization emitter is introduced based on the traditional enhancement mode planar IGBT; and on the basis of the traditional non-through type planar IGBT, a JFET(Junction Field Effect Transistor) effect weakening structure consisting of an N type hole potential barrier layer and an N- draft region is introduced, and a path structure of expanded current formed by the N type hole potential barrier layer is introduced. Through the N type hole potential barrier layer, the conductivity modulation effect of one side of a device near the emitter can be enlarged, the JFET effect is reduced, the area flown through by electronic current is increased, therefore the on-state voltage drop is lowered; through the trench-type hole bypass structure, the current density ...

Semi-super-junction VDMOS (vertical double-diffused metal oxide semiconductor) provided with P type auxiliary buried layer

The invention relates to a semiconductor technology, in particular to a semi-super-junction VDMOS (vertical double-diffused metal oxide semiconductor) provided with a P type auxiliary buried layer. The semi-super-junction VDMOS provided with the P type auxiliary buried layer is characterized in that the P type auxiliary buried layer 3 is arranged in an N type bottom auxiliary layer 4 and is connected with the upper end surface of an N<+> substrate 2. The semi-super-junction VDMOS provided with the P type auxiliary buried layer has the benefit that pressure resistance capability of a device is increased effectively while other performance parameters are not affected. The invention is particularly suitable for the semi-super-junction VDMOS.

BIDIRECTIONAL INSULATED GATE BIPOLAR TRANSISTOR

A bidirectional IGBT device, including a cellular structure including: two MOS structures, a substrate drift layer, two highly doped buried layers operating for carrier storage or field stop, two metal electrodes, and isolating dielectrics. Each MOS structure includes: a body region, a heavily doped source region, a body contact region, and a gate structure. Each gate structure includes: a gate dielectric and a gate conductive material. The two MOS structures are symmetrically disposed on the top surface and the back surface of the substrate drift layer. The heavily doped source region and the body contact region are disposed in the body region and independent from each other, and both surfaces of the heavily doped source region and the body contact region are connected to each of the two metal electrodes. The gate dielectric separates the gate conductive material from a channel region of each of the MOS structures. 1. A bidirectional insulated gate bipolar transistor , the transistor comprising a cellular structure comprising:a) two MOS structures, each MOS structure comprising: a body region, a heavily doped source region, a body contact region, and a gate structure; and each gate structure comprising: a gate dielectric and a gate conductive material;b) a substrate drift layer;c) two highly doped buried layers, the two highly doped buried layers operating for carrier storage or field stop;d) two metal electrodes; ande) isolating dielectrics;whereinthe two MOS structures are symmetrically disposed on a top surface and a back surface of the substrate drift layer; the heavily doped source region and the body contact region are disposed in the body region and independent from each other, and both surfaces of the heavily doped source region and the body contact region are connected to each of the two metal electrodes; the gate dielectric separates the gate conductive material from a channel region of each of the MOS structures; the isolating dielectrics each are ...

Fast recovery metal oxide semiconductor diode with low power consumption

A fast recovery metal oxide semiconductor diode with low power consumption belongs to the technical field of semiconductor devices. The diode is provided with a junction field effect transistor region (4) and an electron accumulation layer structure (12), wherein the junction field effect transistor region (4) comprises two deep P regions (5) and an N-epitaxial layer (3) between the two deep P regions; and the electron accumulation layer structure (12) comprises two N heavily doped regions (7), the N-epitaxial layer (3), a gate oxide layer (8) on the surface of the N-epitaxial layer (3) and a gate electrode (9). By utilizing the following surface electric field effect of the metal oxide semiconductor structure: a plurality of sub-accumulation layers are formed in case of forward voltage while a plurality of sub-depletion layers are formed in case of backward voltage, the diode can obtain quite low turn-on voltage drop and can simultaneously bear high reverse breakdown voltage and leak less ...

Spindle tree fruit saponin and preparing method and application thereof

The invention discloses a spindle tree fruit saponin. The spindle tree fruit saponin is prepared by the following steps: crushing dry spindle tree fruit powder with ultrasound and extracting the dry spindle tree fruit powder with ethanol; leaching by petroleum ether and saturated n-butyl alcohol, and extracting the spindle tree fruit saponin under the conditions that the material-liquid ratio is 1 to 10, the extracting temperature is 60 DGE C, the concentration of the ethanol is 80%, and the ultrasonic time is 40 min. The extracting efficiency is up to 9.172%; purifying in a silica gel chromatography way, and obtaining the spindle tree fruit saponin Ebs-A and Ebs-B, wherein the Ebs-A has the obvious inhibiting effect on the growth of the human lung cancer cell line -A549, the mouse myeloma cell line -SP2/0, and the human skin melanoma cell line -A375, and the Ebs-B has the obvious cell line inhibiting effect on the growth of the human cervical carcinoma -HeLa and the human colon cancer ...

Capacity controlled numerical frequency modulation circuit

The invention relates to a capacity control digital frequency adjusting circuit which belongs to the frequency adjusting technology in the electronic technology field. The invention comprises a capacitance charge-discharge circuit and a variable capacitance circuit. In the variable capacitance circuit, the switching on-off of the switch tube is controlled by the output signal of the counter and thus the total capacitance value of the charge-discharge capacitance; therefore, the dither output of frequency can be achieved, the frequency spectrum of the former higher harmonic is extended to a new frequency range which lowers the frequency spectrum amplitude and thus the electromagnetic interference of the switch power supply is reduced. Compared with flow control digital frequency adjusting circuit, the invention can achieve the dither function of frequency much better and lower the peak value of the switch frequency higher harmonic frequency spectrum and thus inhibit electromagnetic interference ...

Position detection magnetic sensing chip

The invention discloses a position detection magnetic sensing chip, which is used for improving the accuracy of data acquisition of an integrated magnetic switch chip. The position detection magnetic sensing chip comprises a ground pin GND, an enabling receiving pin TRI, an enabling sending pin TRO and an output pin OUT; the power supply module is respectively connected with the Wheatstone bridge, the low-offset amplifier, the first Schmitt trigger and the time adjusting module; the first transistor is respectively connected with the Wheatstone bridge, the low-offset amplifier, the enabling logic module EN Logic and the ground pin GND; the low-offset amplifier is respectively connected with the first Schmitt trigger, the Wheatstone bridge, the enabling logic module and the time adjusting module; the second transistor is respectively connected with the time adjusting module, the output pin OUT, the first Schmitt trigger and the output pin OUT; and the enabling logic module is respectively ...

Shallow-slot metal oxide semiconductor diode

The invention discloses a shallow-slot metal oxide semiconductor diode for solving reducing the forward conduction voltage drop of the diode, increasing reverse breakdown voltage and reducing leakage current. The shallow-slot metal oxide semiconductor diode provided by the invention comprises a metallized cathode, an N-type heavily-doped monocrystalline silicon substrate region, an N-epitaxial layer, two deep P regions located on two sides, shallow slots located on the deep P regions, N-type heavily-doped regions on the inner sides of the shallow slots, a silicon dioxide gate oxide layer, a polycrystalline silicon gate electrode and a metallized anode, which are arranged in sequence from the bottom layer to the top. Compared with the prior art, by adopting the electron accumulation layer structure and the junction field-effect tube structure, the invention can obtain extremely low conduction voltage drop, greatly improve the breakdown voltage, and reduce the leakage current. Under reverse ...

Sansevieria trifasciata saponin, preparation method and application thereof

The invention discloses sansevieria trifasciata saponin, a preparation method and application thereof. The method comprises the following steps of: making the sansevieria trifasciata into dry powder, extracting by using water, alcohol or methanol, extracting by using petroleum ether or ether, and extracting by using butyl alcohol or pentanol to obtain the sansevieria trifasciata total saponin extract. The method for preparing the sansevieria trifasciata saponi optimizes the process conditions, has simple operation and low cost, has low requirement on process equipment, can reduce the consumption of solvents and enhance the leaching rate. The sterilized sansevieria trifasciata has obvious inhibition function on the growth of JurKet, has no activity killing effect on human cervical carcinoma cells (HeLa) and human gastric carcinoma cells (BGC823), and has no injury to normal Chinese Hamster Ovary (CHO), and the cell grows normally without any obvious change.

Pre-control and dispatching model and method for surplus water probabilities in inter-basin hydropower station group

The invention discloses a pre-control and dispatching model and method for surplus water probabilities in an inter-basin hydropower station group. The maximum surplus water probabilities of hydropower stations above season regulation performance in the inter-basin hydropower station group are minimized to serve as optimization objectives, an 'inter-basin hydropower stations-power station' two-layer optimization and coordination system structure is adopted, and load optimal distribution is directly performed on all the hydropower stations. Equalization of risks and benefits of multiple power generation bodies can be achieved. Accordingly, the new method is provided for joint optimization dispatching of the power generation body hydropower group.

Groove type power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device

The invention discloses a groove type power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device relating to the technical field of semiconductor power devices and radio frequency power devices. A surface N+ source region, a source metal field board and a bottom N+ source contact region are communicated to form an equipotential body in the mode that an N+ tank region passes through the substrate longitudinally to the bottom of the device; and the source is led out from the bottom of the device, so that the epitaxial line inductance of the source is eliminated, the series resistance of the source is reduced, and good heat conduction channels are provided for being beneficial to two-sided cooling of the device. Simultaneously, the source metal field board extended covers the light dope drain (LDD) so as to reduce the high electric field peak at the tail end of the grid and assist the light dope drain (LDD) to exhaust and reduce the grid leak capacitance. The charge balance effect ...

METHOD FOR MANUFACTURING VERTICAL SUPER JUNCTION DRIFT LAYER OF POWER SEMICONDUCTOR DEVICES

A method for manufacturing a vertical super junction drift layer of a power semiconductor device. The method includes: a): adopting P+ single crystal silicon to prepare a P+ substrate; b): finishing top processes of the devices on the P+ substrate, forming at least P type region, manufacturing active area and metallizing the top surface of the P+ substrate; c): thinning the back surface of the P+ single crystal silicon; d): selectively implanting H + ions at the back surface repeatedly and then annealing to form N pillars in the P type region; and e): metallizing the back surface.

Terminal structure for improving avalanche tolerance of super junction power device

The invention relates to the semiconductor technology, in particular to a terminal structure for improving the avalanche tolerance of a super junction power device. A terminal breakdown region is arranged in a device terminal, avalanche breakdown points are limited in the terminal breakdown region, the parasitic BJT conductivity problem of cellular breakdown is avoided, the problem of local temperature rising caused by the too long path of an avalanche current during common terminal breakdown is avoided, and therefore the avalanche tolerance and reliability of the super junction power device can be improved. The terminal structure has the advantages that the path of the avalanche current is effectively reduced when the device avalanche breakdown points are in the terminal, the anti-UIS lose efficacy capacity of the device is improved on the premise of not affecting the device breakdown voltage, and the reliability of the device is improved. The terminal structure is especially suitable ...

Recombined diphtheria toxin, preparation method, and application

Over-temperature protection circuit used for power module

The invention discloses an over-temperature protection circuit used for a power module. The circuit includes a detection module used for detecting the temperature of the power module so as to generate detection signals; an output response module connected with the detection module; a positive and negative thermal-feed hysteresis module which is connected with the output response module and the detection module and used for adjusting detection signals according to control signals so as to realize thermal hysteresis; and a protection module which is connected with the output response module and used for controlling the power module to stop work according to the control signals so as to realize protection of the power module. The output response module includes a first NMOS tube and a Zener diode, and a first node is arranged between the first NMOS tube and the Zener diode. The voltage of the first node changes according to the detection signals and the output response module outputs the control ...

High-precision self-calibration magnetic switch chip

The invention discloses a high-precision self-calibration magnetic switch chip which is used for improving the precision of chip magnetic field detection work. According to the invention, a VCC pin is respectively connected with a band-gap reference and current bias module and a debugging calibration module; the band-gap reference and current bias module is respectively connected with the power supply voltage module and the reference voltage module; the digital module is respectively connected with the debugging calibration module and the reference voltage module VREFCOMP; the Wheatstone bridge is respectively connected with the power supply voltage module, the GND pin and the low-offset comparator; the low-offset comparator is respectively connected with the reference voltage module, the digital module and the first transistor NMOS; the first transistor NMOS is respectively connected with a GND pin and an OUT pin; the multiplexing output module is respectively connected with the digital ...

Stack-packaged power MOSFET device and processing method thereof

The invention discloses a stacked and packaged power MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) device, which comprises a P-type substrate (1) and is characterized in that a P-type epitaxial layer (2), an N-type drift region (3) and an N-type drain region (4) are sequentially arranged on the P-type substrate (1), and a gate structure which is in contact with the N-type drift region (3) and the N-type drain region (4) is arranged on the P-type epitaxial layer (2); an N-type source region (5) and a metal sinking sheet (7) which are in contact with each other are respectively arranged between the gate structure and the P-type epitaxial layer (2); the N-type drain region (4) is provided with a drain metal electrode (10) in contact with the gate structure, and the lower end of the P-type substrate (1) is provided with a source metal electrode (11). The structure is simple, and the source electrode can be led out from the bottom of the device, so that the possibility is provided ...

Controllable self-clamping SensorFET composite transverse power device with multiple release channels

The invention discloses a controllable self-clamping SensorFET composite transverse power device with multiple release channels, and belongs to the fields of semiconductor power device technology and power integrated circuit technology. A main switching tube of a power converter and a SensorFET device are integrated on the same P-type substrate and share an anode structure, wherein the SensorFET device finishes the functions of sampling the current of the main switching tube of the power converter and charging an internal control circuit; the main switching tube in the power converter has a voltage clamping structure, and the voltage of a primary coil of the power converter is kept within a transient safe working area of the SensorFET device by voltage clamping; meanwhile, when a main switching device in the power converter is turned off, the avalanche energy stored by the primary coil is controlled and released through a controllable gate region of the SensorFET device to realize control ...

Bidirectional MOS type device and manufacturing method thereof

A power semiconductor device and a manufacturing method thereof belong to the technical field of power semiconductor devices. The power semiconductor device is provided with symmetrical plane gate MOS structures at the two ends of an upper layer of an active region. A U-type composite drift region is arranged between the MOS structures and is in bilateral symmetry along the center of a cellular. The bidirectional MOS type device obtains properties of high device breakdown voltage and low breakover voltage drop/ electrical resistance in a certain cellular width through the formed U-type composite drift region and composite gate structure which have a symmetry property, and is a bidirectional symmetry electric field cut-off type device. In an IGBT work pattern, the bidirectional MOS type device is an IGBT device with a carrier storage layer and a field cut-off layer. In an MOS work pattern, the bidirectional MOS type device is an MOS device with a high doping layer used for decreasing an ...

Full-speed-domain position-sensorless vector control method of surface-mounted permanent magnet synchronous motor

The invention belongs to the field of position-sensorless vector control of a permanent magnet synchronous motor, and particularly relates to a full-speed-domain position-sensorless vector control method of a surface-mounted permanent magnet synchronous motor. Comprising the following steps: constructing an I/F starting module, and adopting the I/F starting module to realize stable operation of the surface-mounted permanent magnet synchronous motor at a medium-low speed and smooth switching to a medium-high speed; detecting the stator current of the surface-mounted permanent magnet synchronous motor after the surface-mounted permanent magnet synchronous motor is switched to a medium-high speed; constructing a sliding-mode observer based on a phase-locked loop, wherein the sliding-mode observer estimates a stator counter electromotive force according to the stator current; obtaining the position information of the rotor according to the obtained estimated value of the back electromotive ...

Method for manufacturing heterogeneous super-junction structure

The invention relates to the field of the semiconductor process manufacturing technology, in particular to a method for manufacturing a heterogeneous super-junction structure. According to the method, deposited photoresist before bulk silicon etching is conducted is processed, multiple mask plates are adopted for overlaid exposure many times, and photoresist in an area to be etched is of different thicknesses accordingly. During subsequent bulk silicon etching, the etching depth is larger in the area with photoresist of a smaller thickness, and therefore the super-junction structure with heterogeneous thicknesses can be obtained. The method has the advantages that by the combination of different mask plates and different exposures, various super-junction structures of different depths can be flexibly formed, the process step is simple, and cost is low. The method is especially applied to manufacturing the heterogeneous super-junction structure.

Tunnel IGBT with anode in short circuit

An anode-short tunnel pump IGBT belongs to the technical field of semiconductor power devices. With an anode-short structure and a tunnel pump structure simultaneously introduced into a traditional IGBT, or a tunnel pump structure into an anode-short IGBT, or an anode-short structure into a tunnel pump IGBT, the invention gives the advantages of both the anode-short IGBT and the tunnel pump IGBT to the anode-short tunnel pump IGBT so as to improve the turn-off characteristic of the device and lower the conductive voltage drop of the device. The invention can better reconcile the positive saturation voltage drop with the turn-off time, and optimize the conductive characteristic of the device, so that the invention is suitable in particular for application environments characterized by high voltage, heavy current and high frequency.

Manufacturing method of high-voltage BCD semiconductor device

A manufacturing method of a high-voltage Bipolar/CMOS/DMOS (BCD) semiconductor device belongs to the technical field of manufacturing techniques of semiconductor power devices. The manufacturing method comprises the following processing steps: preparation of a substrate, preparation of a deep N-well (DNW), preparation of field oxygen, preparation of a N-well and a P-well, preparation of a gate and a field plate, preparation of a N-type source/drain (NSD), preparation of a P-type source/drain (PSD), annealing, node-pushing of NSD/PSD, preparation of an Ohm hole, formation of a metal layer; preparation of a passivation layer, and preparation of a PAD. The invention achieves the purpose of fabricating a high voltage JFET, a high voltage n-LDMOS, a medium-voltage n-LDMOS, a low voltage LDMOS, a low voltage CMOS, a NPN transistor, N-well and P-well resistors and an N-type capacitor on the same one chip. The designer can make a flexible choice according to the needs. Besides, the invention has ...

Trench MOS device with improved single event burn-out endurance

A trench MOS device with improved single event burnout endurance, applied in the field of semiconductor. The device is provided, in an epitaxial layer, with a conductive type semiconductor pillar connected to a source and a second conductive type current-directing region. Whereby, the trajectory of the electron-hole pairs induced by the single event effect is changed and thus avoids the single event burnout caused by the triggering of parasitic transistors, therefore improving the endurance of the single event burnout of the trench MOS device.

Spread-spectrum clock signal generator for digital current modulation

The invention relates to a spread-spectrum clock signal generator for digital current modulation, which belongs to the technical field of electronics. In the invention, a digital modulation current generation circuit comprising a state machine, a switching group and micro current sources is added on the basis of a common clock signal generator, and a binary signal Di generated by the state machine is utilized to control the opening and the closing of a switch Ki; when the switch Ki is opened, current Ii generated by an ith micro current source is superposed into modulation output current IDVC; and the modulation output current IDVC and the charge/discharge bias current Imain of an oscillation capacitor C0 in the common clock signal generator are superposed together to form the charge/discharge current Isum of the oscillation capacitor C0. The invention generates a spread-spectrum clock signal by changing the magnitude of the charge/discharge current of the oscillation capacitor in the clock ...

Constant-current LED (light-emitting diode) driver circuit without electrolytic capacitor

The invention relates to electronic circuit technique, in particular a constant-current LED (light-emitting diode) driver circuit without an electrolytic capacitor. The invention provides the structure diagram of an LED driving temperature compensation circuit. The constant-current LED driver circuit includes such modules as a reference voltage generation module, a logic module, a driver module, LEDs, a power tube, an operational amplifier, a PMOS (P-type metal-oxide-semiconductor) tube PM1, a delay amplifier and an error amplifier. The drain electrode of the PM1 is connected to the forward end of the LED1, and the leak current and the inductive current of the PM1 compensate mutually to form an output current with few ripples, thereby achieving LED constant-current driving. The constant-current LED (light-emitting diode) driver circuit has the following benefits: the high-capacity electrolytic capacitor is not used, so that the reliability of a power source is improved and the service life ...

PWM wave generation circuit

The invention relates to the technology of electronic circuits, in particular to a PWM wave generation circuit with an adjustable frequency and an adjustable duty ratio. The PWM wave generation circuit is characterized by comprising a reference current module, a reference voltage module, a comparator CMP1, a comparator CMP2, a logic control module, a PMOS transistor MP1, an NMOS transistor MN1 and a capacitor C1. The reference current module is connected with the source electrode of the MP1 and the source electrode of the MN1. The reference voltage module is connected with the in-phase input end of the comparator CMP1 and the negative-phase input end of the comparator CMP2. The drain electrode of the PMOS transistor is connected with the negative-phase input end of the comparator CMP1 and the in-phase input end of the comparator CMP2 after being connected with the drain electrode of the NMOS transistor, passes through the capacitor C1 and then is grounded. The output end of the comparator ...

LED (light emitting diode) light-dimming circuit

The invention belongs to integrated circuit technologies, and particularly relates to an LED (light emitting diode) light-dimming circuit. The LED light-dimming circuit comprises a primary side current sampling circuit, a comparison amplifier and a current switch circuit, wherein the primary side current sampling circuit comprises a primary side inductor and a first resistor; one end of the first resistor is connected with an inverted input end of the comparison amplifier; the other end of the first resistor is connected with an input end of the current switch circuit; a positive input end of the comparison amplifier is connected to reference voltage; an output end of the comparison amplifier is connected with a second input end of the current switch circuit; and an output end of the current switch circuit outputs variable current. The LED light-dimming circuit has the advantages that when the LED light-dimming circuit is switched off, the current switch circuit does not generate supply ...

Temperature compensating circuit used for LED

The invention relates to the electronic circuit technology, in particular to a temperature compensating circuit used for an LED. The temperature compensating circuit used for the LED comprises a drive module, an LED module and a feedback module, and is characterized by further comprising a temperature setting module, a reference voltage generation module, a temperature sampling module and a logic control module. The input end of the logic control module is respectively connected with the output end of the temperature setting module, the output end of the reference voltage generation module and the output end of the temperature sampling module; the output end of the logic control module is connected with one input end of the drive module; the other input end of the drive module is connected with the feedback module; the output end of the drive module is connected with the input end of the LED module; the input end of the temperature sampling module and the input end of the feedback module ...

Method for recovering silver from silver-containing waste

The invention relates to a method for recovering silver from a silver-containing waste material, which comprises the following steps: preparing an electrolyte from sodium thiosulfate pentahydrate, potassium citrate, sodium acetate, sodium hydroxide and sodium trithiosulfuric acid silver (I) acid (Na5 [Ag (S2O3) 3]) and H2O, regulating the electrolytic voltage to 0.01-0.10 V/cm < 2 > in the electrolyte, and electrolyzing for 5-60 minutes until silver and a silver alloy layer in the waste material are completely electrolyzed, and washing the electrolyzed silver powder with deionized water, filtering and drying to obtain the silver powder. According to the method, the silver recovery rate can reach 99%, the problems that electrolysis equipment in strong acid and strong alkali solutions is prone to corrosion, environment pollution, staff injury and the like are solved, and the method has the advantages of being easy and controllable to operate and capable of being repeatedly used and has good ...

Stable on-chip clock generation circuit

The invention belongs to the technical field of integrated circuits, and relates to a stable on-chip clock generation circuit. The circuit comprises a charging and discharging circuit, a comparator and a sequential logic circuit. In the charging and discharging circuit, four switches are used for jointly controlling charging and discharging of a charging capacitor C1, and linearly rising triangular wave signals are generated. A compensation capacitor C2 in the charging and discharging circuit is used for counteracting negative voltage mutation caused by capacitor overturning, and the waveform and frequency of triangular waves at a charging node VC are effectively stabilized. And the comparator compares the charging triangular wave signal VC with a reference voltage source VREF and outputs a signal to the sequential logic circuit. The sequential logic circuit is connected with the output of the comparator and used for generating a first clock SW and a second clock SWB, and the first clock ...

Trench Edge Termination Structure for Power Semiconductor Devices

Edge termination structures for power semiconductor devices (or power devices) are disclosed. The purpose of this invention is to reduce the difficulty of deep trench etching and dielectric filling by adopting an inverted trapezoidal trench. In order to save the area of edge termination and get a high blocking voltage on condition that the angle between the sidewall of the trench and horizontal is large, fixed charges are introduced at a particular location in the trench. Due to the Coulomb interaction between the ionized impurity in the drift region and the fixed charges, the depletion region of the terminal PN junction can extend fully, which relieves the concentration of electric field there. Therefore, the edge termination can exhibit a high breakdown voltage near to that of the parallel plane junction with a smaller area and the reduced technical difficulty of deep trench etching and dielectric filling. 1. A trench termination structure of a power semiconductor device , comprising:a heavily doped P-type substrate;a lightly doped P-type drift region on an upper surface of the heavily doped P-type substrate;a metal drain electrode on a lower surface of the heavily doped P-type substrate; anda field oxide layer on an upper surface of the lightly doped P-type drift region,wherein the lightly doped P-type drift region includes a trench and a heavily doped P-type region;the heavily doped P-type region is located in a top portion of the lightly doped P-type drift region and on a side away from an active region of the power semiconductor device;an upper surface of the heavily doped P-type region contacts a lower surface of the field oxide layer;the trench is filled with an insulating material whose upper surface contacts a lower surface of the field oxide layer;a polysilicon floating island that stores positive charges is located in the trench;a sidewall of the trench on a side near the active region contacts a N-type semiconductor main junction;an upper surface of the ...

SUPER-JUNCTION SCHOTTKY DIODE

The present invention relates to the field of semiconductor technology, particularly to a super-junction schottky diode. According to the present invention, the effective area of schottky junction is increased by forming the schottky junction in the trench located in the body of the device. Therefore, the current capacity of this novel schottky diode can be greatly improved. In addition, a super-junction structure is used to improve the device's reverse breakdown voltage and reduce the reverse leakage current. The super-junction schottky diode provided in the present invention can achieve a larger forward current, a lower on-resistance and a better reverse breakdown characteristic. 1. A super-junction schottky diode , comprising:metalized cathode electrode;a N+ substrate;an N-type drift region; anda metalized anode electrode,whereinsaid N-type drift region includes a P-type buried layer a P-type column, a P+ heavily doped region an N-type lightly doped region, and a trench,the P-type buried layer is below the trench, and as top surface of the P-type buried layer contacts with a bottom surface of the trench,the P-type column is located between two adjacent trenches,the P+ heavily doped region is located above the P-type column, and a bottom surface of the P+ heavily doped region contacts with a top surface of the P-type column,the N-type lightly doped region is located on a side of the trench and in a top surface of the N-type drift region,said trench is filled with metal, and the metal together with the N-type lightly doped region form a schottky junction,a top surface of the N-type lightly doped region is covered with the metal, and the metal together with the N-type lightly doped region form a schottky junction,a top surface of said metal contacts with a bottom surface of the metalized anode electrode, and the P+ heavily doped region contacts the bottom surface of the metalized anode electrode, anda junction depth of said P-type buried layer is the same as the ...

Folded Termination with Internal Field Plate

A junction termination with an internal field plate, the field plate structure and the junction termination extension region are folded inside the device to make full use of the thickness of the drift region in the body, thereby reducing the area of the termination and relieving the electric field concentration at the end of the PN junction. The breakdown position is transferred from the surface into the body of the original PN junction, and the withstand voltage of termination can reach to the breakdown voltage of the parallel plane junction. Under such design, a smaller area can be obtained than that of the conventional structure at the same withstand voltage.

BIDIRECTIONAL MOS DEVICE AND METHOD FOR PREPARING THE SAME

A bidirectional Metal-Oxide-Semiconductor (MOS) device, including a P-type substrate, and an active region. The active region includes a drift region, a first MOS structure and a second MOS structure; the first MOS structure includes a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure includes a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; and the drift region includes a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region. The active region is disposed on the upper surface of the P-type substrate. The first MOS structure and the second MOS structure are symmetrically disposed on two ends of the upper layer of the drift region. 1. A bidirectional Metal-Oxide-Semiconductor (MOS) device , the device comprising a P-type substrate; and', 'an active region; the active region comprising a drift region, a first MOS structure and a second MOS structure; the first MOS structure comprising a first P-type body region, a first P+ contact region, a first N+ source region, a first metal electrode, and a first gate structure; the second MOS structure comprising a second P-type body region, a second P+ contact region, a second N+ source region, a second metal electrode, and a second gate structure; the drift region comprising a dielectric slot, a first N-type layer, a second N-type layer, and an N-type region;, 'a cell structure, the cell structure comprising the active region is disposed on an upper surface of the P-type substrate; the first MOS structure and the second MOS structure are symmetrically disposed on two ends of an upper layer of the drift region;', 'the first P+ contact region and the first N+ source region are disposed in the first P-type body region; the first metal electrode and the first gate structure are disposed on an upper surface of ...

SYNCHRONOUS RECTIFICATION CIRCUIT

Provided is a synchronous rectification circuit, which relates to electronic circuit technologies. The synchronous rectification circuit is self-driven by a combination of a charge pump and a Boost circuit, including a rectification MOSFET, a charge pump, logic control modules, voltage detection modules, an oscillator module, a PWM generation module, a reference voltage generation module, a switch, a free-wheeling MOSFET, an isolation MOSFET, an inductor, a capacitor and sampling resistors. According to the present application, initially, the charge is stored on the capacitor through the charge pump, the Boost circuit is turned on till the voltage is increased to a certain value; through processing by the logic control modules and the like, the rectification MOSFET is turned on, thus self-driving of the synchronous rectification circuit is achieved. The self-driving mode can charge the capacitor faster, lower the duty of the rectification circuit, and reduce the average conduction voltage drop. 11. A synchronous rectification circuit , comprising: a low voltage charge pump module , a Boost module , an external capacitor C and a rectification metal-oxide-semiconductor field-effect transistor (MOSFET) M;wherein the low voltage charge pump module is composed of an oscillator and a charge pump;{'b': 1', '2', '1', '1', '2, 'the Boost module is composed of a first logic control module, a second logic control module, a first voltage detection module, a second voltage detection module, a pulse width modulation (PWM) generation module, a reference voltage generation module, a switch PM, a free-wheeling MOSFET NM, an isolation MOSFET NM, an inductor L and sampling resistors R and R;'}{'b': 1', '1', '2', '2', '1', '1', '2, 'wherein the isolation MOSFET NM has its drain connected to the drain of the rectification MOSFET M, its source connected to the source of the free-wheeling MOSFET NM, a lower end of the sampling resistor R and a lower plate of the external capacitor C, and ...

IGBT DEVICE WITH MOS CONTROLLABLE HOLE PATH

The present invention relates to the technical field of power semiconductor devices, particularly to an insulated gate bipolar transistor with a MOS controllable hole path. According to the present invention, a MOS controllable gate structure formed by a gate dielectric layer, a MOS control gate electrode and a P-type MOS channel region are embedded in a P+ floating p-body region of the conventional IGBT structure. The MOS region is equivalent to a switch controlled by a gate voltage. When the device is turned on under a forward voltage, the potential of the p-body region is floated to store holes, reducing the saturation conduction voltage drop of the device. Under the condition of turn-off and short-circuit, the hole extracting path is provided and the Miller capacitance is lowered, thereby lowering the turn-off losses and enhancing the short-circuit withstand capability. 1. An IGBT device with a MOS controllable hole path , whereina cell structure of the IGBT device comprises a collector metal electrode, a P+ collector region, an N-type buffer layer, an N-type drift region, and an emitter metal electrode; the collector metal electrode, the P+ collector region, the N-type buffer layer, the N-type drift region, and the emitter metal electrode are stacked in order from bottom to top;a P+ floating p-body region is disposed on a middle upper surface of the N-drift region; P+ base regions are disposed on both sides of the P+ floating p-body region, respectively; the N+ emitter region is disposed on an upper surface of the P+ base region; the N+ emitter region and the P+ base region are respectively connected to the emitter metal electrode;an IGBT gate structure is set between the N+ emitter region, the P+ base region and the P+ floating p-body region; the IGBT gate structure is not in adjacent to the P+ floating p-body region; the IGBT gate structure comprises a gate electrode and a gate dielectric layer; the gate dielectric layer extends along a longitudinal direction ...

TRENCH MOS DEVICE WITH IMPROVED SINGLE EVENT BURN-OUT ENDURANCE

A trench MOS device with improved single event burnout endurance, applied in the field of semiconductor. The device is provided, in an epitaxial layer, with a conductive type semiconductor pillar connected to a source and a second conductive type current-directing region. Whereby. the trajectory of the electron-hole pairs induced by the single event effect is changed and thus avoids the single event burnout caused by the triggering of parasitic transistors, therefore improving the endurance of the single event burnout of the trench MOS device. 1. A trench MOS device with improved single event burn-out endurance , comprising a cell structure from bottom to top comprising:a drain metal electrode, a first conductive type semiconductor substrate, a first conductive type semiconductor epitaxial layer, and a source metal electrode; wherein in the top of the first conductive type semiconductor epitaxial layer there are a second conductive type semiconductor body region, a plurality of first conductive type semiconductor source regions, a second conductive type semiconductor body contact region and a trench gate; the second conductive type semiconductor body contact region is located between two adjacent first conductive type semiconductor source regions, and an upper surface of the first conductive type semiconductor source region and an upper surface of the second conductive type semiconductor body contact region are contacted with the source metal electrode; the second conductive type semiconductor body region is located just below the first conductive type semiconductor source region and the second conductive type semiconductor body contact region, and an upper surface of the second conductive type semiconductor body region is connected to a lower surface of the first conductive type semiconductor source region and a lower surface of the second conductive type semiconductor body contact region; the trench gate is located on a side of the second conductive type ...

Method for manufacturing vertical super junction drift layer of power semiconductor devices

A method for manufacturing a vertical super junction drift layer of a power semiconductor device. The method includes: a): adopting a P+ single crystal silicon to prepare a P+ substrate; b): finishing top processes of the devices on the P+ substrate, forming at least a P type region, manufacturing active area and metallizing the top surface of the P+ substrate; c): thinning the back surface of the P+ single crystal silicon; d): selectively implanting H + ions at the back surface repeatedly and then annealing to form N pillars in the P type region; and e): metallizing the back surface.

Super-junction schottky diode

The present invention relates to the field of semiconductor technology, particularly to a super-junction schottky diode. According to the present invention, the effective area of schottky junction is increased by forming the schottky junction in the trench located in the body of the device. Therefore, the current capacity of this novel schottky diode can be greatly improved. In addition, a super-junction structure is used to improve the device's reverse breakdown voltage and reduce the reverse leakage current. The super-junction schottky diode provided in the present invention can achieve a larger forward current, a lower on-resistance and a better reverse breakdown characteristic.