СПОСОБ ИЗГОТОВЛЕНИЯ ДЕТАЛЕЙ ИЗ СЛЮДЫ МЕТОДОМ ЛАЗЕРНОЙ РЕЗКИ

Изобретение относится к способу изготовления деталей из слюды методом лазерной резки. Подготавливают и жестко фиксируют плоскую заготовку из слюды на неподвижном основании, выполненном составным из съемной металлической сетки, опирающейся на прямоугольный выступ, выполненный по периметру окна в основании, закрепленном на предметном столе, к которому подводят вытяжную магистраль для поджатия упомянутой заготовки к съемной металлической сетке. Подают сфокусированное лазерное излучение (ЛИ) регулируемой мощности посредством портальной оптической отклоняющей системы на поверхность плоской заготовки. Формируют пятно в заданной точке поверхности плоской заготовки и осуществляют рез с управлением процессом реза упомянутой заготовки путем подачи управляющих сигналов от персонального компьютера на подвижный портал, содержащий направляющие и подвижную каретку, на которой закреплена оптическая лазерная головка с обеспечением продольно-поперечных перемещений по соответствующим координатам контура реза ...

СПОСОБ НАНЕСЕНИЯ ИЗОБРАЖЕНИЯ ЛАЗЕРНОЙ ГРАВИРОВКОЙ НА ИЗДЕЛИЯ ИЗ ДРАГОЦЕННЫХ МЕТАЛЛОВ (ВАРИАНТЫ)

Изобретение относится к ювелирной промышленности, а именно к способам нанесения изображений лазерной гравировкой на изделия из драгоценных металлов. Согласно первому варианту способа поверхность изделия полируют до класса чистоты не выше 9-го и очищают, затем фиксируют изделие. Переносят компьютерное изображение в программный блок лазерного излучателя и наносят изображение на поверхность изделия с помощью лазерного луча, настроенного на точечное прожигание. После этого производят очистку поверхности готового изделия от нагара. Согласно второму варианту способа дополнительно перед нанесением изображения поверхность будущего изображения покрывают родием. Технический результат - улучшение качества изделия, уменьшение затрат. 2 н.п. ф-лы.

СТАНОК МНОГОЦЕЛЕВОЙ С ЧИСЛОВЫМ ПРОГРАММНЫМ УПРАВЛЕНИЕМ, ЛАЗЕРНОЙ ОПТИЧЕСКОЙ ГОЛОВКОЙ И АВТОМАТИЧЕСКОЙ СМЕНОЙ ИНСТРУМЕНТА

Станок содержит неподвижную станину, колонну, имеющую возможность перемещения продольно по направляющим станины, шпиндельную бабку, имеющую возможность перемещения продольно и вертикально по направляющим, закрепленным на колонне, инструментальный магазин, устройство смены заготовок, ограждение зоны резания «кабинетного типа». Для расширения технологических возможностей он снабжен поворотной шпиндельной головкой, установленной на шпиндельной бабке, лазерной оптической головкой, выполненной с возможностью автоматического открытия по команде ЧПУ, лазерным излучателем и оптико-волоконным кабелем, которой смонтирован в пружину сжатия в виде петли, уложен в изогнутый по его радиусу изгиба короб с возможностью сжатия упомянутой петли и занятия первоначального состояния с регламентированным радиусом изгиба оптико-волоконного кабеля при повороте шпиндельной головки и лазерной оптической головки. 2 ил.

Способ влажной лазерной очистки твердых поверхностей

Изобретение относится к способу влажной лазерной очистки твердых материалов и может быть использовано в машиностроении и авиастроении для селективной очистки металлической обшивки планеров воздушных судов от лакокрасочных материалов. Тонкий слой жидкости на обрабатываемой поверхности формируют посредством плоского щелевого сопла. Облучение поверхности производят импульсным несфокусированным пучком лазерного излучения. Излучатель лазера перемещают над обрабатываемой поверхностью равномерно со скоростью, обеспечивающей перекрытие диаметров абляции лазерного пучка по осям х и y. Длительность лазерного импульса устанавливают не более 10⋅10-9 с, энергию импульса не менее 800 мДж, частоту следования импульсов от 10 Гц и более. Способ позволяет селективно удалять лакокрасочные материалы с поверхности крупногабаритных конструкций сложной пространственной формы без термических (тепловых) напряжений, вызывающих деформации (коробления) материала тонкостенной металлической обшивки летательного аппарата ...

ВЫБОРОЧНОЕ УДАЛЕНИЕ МАТЕРИАЛА ОБЛУЧЕНИЕМ

Способ удаления нежелательного материала с обрабатываемой поверхности подложки содержит операции: подачи вокруг нежелательного материала потока газа, практически инертного по отношению к упомянутому нежелательному материалу, и облучения упомянутого нежелательного материала излучением. Удаляемый нежелательный материал является практически непрерывной пленкой нежелательного материала, которой покрыт желательный материал. Облучение упомянутого нежелательного материала включает воздействие на предварительно определенную поверхность упомянутой практически непрерывной пленки энергетическими фотонами с пространственной и временной концентрациями в пределах предварительно определенной поверхности, достаточными для высвобождения соответствующего поверхности раздела участка пленки нежелательного материала с обрабатываемой поверхности и недостаточными для повышения температуры желательного материала выше температуры, при которой плавится желательный материал или физические свойства желательного материала ...

СПОСОБ ЛАЗЕРНОЙ НЕЙТРАЛИЗАЦИИ ВЗРЫВООПАСНЫХ ОБЪЕКТОВ

Способ может быть применен для нейтрализации взрывоопасных объектов. Способ включает обнаружение взрывоопасного объекта в видимом или инфракрасном диапазоне, выполнение сквозного отверстия в корпусе объекта посредством непрерывного лазерного излучения повышенной мощности и дефлаграцию взрывчатого вещества через отверстие в корпусе при пониженной мощности лазерного излучения в непрерывном режиме. В процессе выполнения в корпусе объекта сквозного отверстия и в процессе дефлаграции взрывчатого вещества измеряют соответственно дальность до объекта и дальность до отверстия для соответствующей фокусировки лазерного излучения на объекте обезвреживания. Технический результат заключается в повышении надежности бездетонационного обезвреживания взрывоопасных объектов. 2 з.п. ф-лы, 2 ил.

СПОСОБ ПОЛУЧЕНИЯ ПАРАЛЛАКС-ПАНОРАМОГРАММЫ И ВАРИОИЗОБРАЖЕНИЯ

Изобретение относится к полиграфии и может быть использовано для изготовления параллакс-панорамограммы или вариоизображения. Сущность изобретения заключается в том, что используют оптический растр, у которого задняя поверхность совпадает с фокальной плоскостью оптических элементов растра. Пространственное разделение изображений, входящих в группу изображений, формирующих параллакс-панорамограмму или вариоизображение, осуществляют путем поочередной абляции участков задней поверхности оптического растра, на которых поочередно печатают изображения, входящие в группу изображений, формирующих параллакс-панорамограмму или вариоизображение. Технический результат заключается в исключении зависимости между максимальным количеством изображений, из которых формируется параллакс-панорамограмма или вариоизображение, и разрешающей способностью того или иного вида печати. 6 з.п. ф-лы, 3 ил.

ЛАЗЕРНАЯ МИКРООБРАБОТКА И СПОСОБЫ ЕЕ ОСУЩЕСТВЛЕНИЯ

... 1. Устройство (402) для лазерной обработки, содержащее лазерный пучок (410), способный формировать элемент (404) на поверхности (302) подложки (300), первую конструкцию (424а) для подачи жидкости, направляющую жидкость (422) на элемент (404), причем элемент (404) может содержать затененную область (508а), доступ к которой жидкости (422), направляемой от первой конструкции (424а) для подачи жидкости, затруднен, и по меньшей мере, вторую, другую, конструкцию (424b) для подачи жидкости, направляющую жидкость (422), в целом, по направлению к затененной области (508а), причем первая и вторая конструкции (424а, 424b) для подачи жидкости выполнены с возможностью доставки жидкости (422) к элементу (404) в течение, по меньшей мере, части времени воздействия лазерного пучка на подложку (300). 2. Устройство (402) лазерной обработки по п.1, в котором элемент (404) представляет собой глухой элемент. 3. Устройство лазерной обработки по п.1, в котором элемент (404) является удлиненным элементом, который ...

SELEKTIVE ENTFERNUNG VON MATERIAL DURCH BESTRAHLUNG

VERFAHREN UND VORRICHTUNG ZUR BEHANDLUNG VON MATERIALIEN MITTELS LASER.

Lens attachment for a photographic camera has orientation markings and optical identification coding marks

A lens attachment [1] for use on a photographic camera has a locking feature [2] on one end for location onto the camera body. This has markings [4] to indicate the orientation relative to the locating surface [6]. Latching elements [8] are organised in sectors. An identification coding is provided by a series of light absorbing [11] and light reflecting [12] elements.

SCHNEIDLASER

Bearbeitungseinrichtung für ein Werkstück

Bearbeitungseinrichtung für ein Werkstück (2), – wobei die Bearbeitungseinrichtung einen Werkstückhalter (1) aufweist, in den das Werkstück (2) einspannbar ist, – wobei die Bearbeitungseinrichtung eine erste Laservorrichtung (3) aufweist, mittels derer ein in einem Wasserstrahl (5) geführter erster Laserstrahl (4) emittierbar ist, mittels dessen von dem Werkstück (2) Material abtragbar ist, – wobei die Bearbeitungseinrichtung eine Antriebseinrichtung (6) aufweist, mittels derer die erste Laservorrichtung (3) relativ zum Werkstückhalter (1) zumindest in einer zum Wasserstrahl (5) orthogonalen Ebene positionierbar ist, – wobei die Bearbeitungseinrichtung eine Steuereinrichtung (7) aufweist, – wobei die Steuereinrichtung (7) derart ausgebildet ist, dass sie – die Antriebseinrichtung (6) derart ansteuert, dass die erste Laservorrichtung (3) relativ zum Werkstückhalter (1) zumindest in der zum Wasserstrahl (5) orthogonalen Ebene nacheinander an verschiedenen Positionen (P) positioniert wird, ...

Device, useful for processing workpiece, comprises holder in which workpiece is clamped, laser device emitting first laser beam on to jet of water, drive unit, and control unit, where laser device is positioned at different positions

The processing device comprises a holder (1) in which a workpiece (2) is clamped, a first laser device for emitting a first laser beam on to a jet of water, a drive unit (6) for positioning the first laser device relative to the workpiece holder in the jet of water in an orthogonal plane, and a control unit (7). A workpiece material is erodable by the first laser beam. The drive unit is positioned at different positions. The control unit controls the first laser device so that the first laser device emits the first laser beam on to the workpiece holder. The processing device comprises a holder (1) in which a workpiece (2) is clamped, a first laser device for emitting a first laser beam on to a jet of water, a drive unit (6) for positioning the first laser device relative to the workpiece holder in the jet of water in an orthogonal plane, and a control unit (7). A workpiece material is erodable by the first laser beam. The drive unit is positioned at different positions. The control unit ...

Laser Marker

Vorrichtung zum Bearbeiten einer mit temperaturempfindlichen Schadstoffen belasteten Oberfläche

Bearbeitungsdatenerzeugungsverfahren für kombinierte Ultrapräzisionsbearbeitungsvorrichtung und kombinierte Ultrapräzisionsbearbeitungsvorrichtung

Verfahren zum Erstellen von Bearbeitungsdaten zur Verwendung in einer hybriden Ultrapräzisionsbearbeitungsvorrichtung (100) zum Herstellen eines mikrobearbeiteten Erzeugnisses aus einem Werkstück (80), wobei die Bearbeitungsvorrichtung umfasst: ein elektromagnetische Wellen nutzendes Bearbeitungsmittel (10; 15) zum Grobbearbeiten des Werkstückes (80); ein Präzisionsbearbeitungsmittel (30) zum Präzisionsbearbeiten des grobbearbeiteten Werkstückes (81); und ein Formmessmittel (50) zum Messen einer Form des Werkstückes (80) bei Verwendung des elektromagnetische Wellen nutzenden Bearbeitungsmittels (10; 15) und des Präzisionsbearbeitungsmittels (30), wobei die Erstellung der Bearbeitungsdaten Gebrauch macht von: Information über eine ursprüngliche Form entsprechend einer Form des Werkstückes (80); Information über eine Grobbearbeitungsform zur Abtragung von dem Werkstück (80) durch das elektromagnetische Wellen nutzende Bearbeitungsmittel (10; 15); und ...

Vorrichtung zur Laserreinigung beschichteter Materallien vor dem Schweissen

Ein System (200, 300, 500) und ein Verfahren werden bereitgestellt, bei dem ein beschichtetes Werkstück (W) mit hoher Geschwindigkeit mit minimaler Porosität und Spritzerbildung verschweißt werden. Die Beschichtung (C) auf dem Werkstück wird entfernt oder durch eine Hochenergie-Wärmequelle (109) abgetragen, bevor sie in einem Schweißvorgang geschweißt wird, so dass eine hohe Schweißgeschwindigkeit erzielt wird. Die Hochenergie-Wärmequelle (109) ist stromaufwärts des Schweißvorgangs angeordnet, um zumindest einen Teil der Oberflächenbeschichtungen an einem Werkstück (W) zu verdampfen oder zu entfernen.

Schichtstrukturierungssystem

Schichtstrukturierungssystem (100) aufweisend:eine Laserquelle (102) zum Erzeugen von Laserstrahlung (104);einen Strahlmodifizierer (106) zum Empfangen der Laserstrahlung (104) und hierauf Erzeugen eines Besselstrahls (108);eine Scanvorrichtung (110) zum Schwenken des Besselstrahls (108) über ein beschichtetes Objekt (112) und dadurch mindestens teilweisen Entfernen einer Schicht (114) des beschichteten Objekts (112).

Laserbohren von nicht kreisförmigen Öffnungen

Laser beam strip butt welding process - involves laser trimming of clamped strip ends before welding

In the laser beam butt welding of strips the strip end edges are cut off by a laser beam before welding. The roughly cut strip ends are trimmed at least once with the laser in the laser cutting and welding machine while the strip ends are clamped by jaws which apply a pressing force of at least 30t. per m. strip width. Each strip end is trimmed with a circularly polarised laser beam with a supersonic nitrogen flow into the cutting gap so that the cut edges exhibit (over two-thirds of the cut depth) a roughness (Rz) of max. 60 microns prior to welding, the free strip length, projecting beyond the clamping jaws after the last laser cut, being max. 50mm. Welding is carried out while the strps are still clamped. Appts. for carrying and the process is also claimed. USE/ADVANTAG - The process is used esp. in rolling mills for butt welding hot and/or cold rolled strip ends. It allows faultless welding even of strips of alloy steel contg. 12% Cr or more and of more than 3 (pref. 4-10)mm, thickness ...

Oberflächenbearbeitete Vorhangstangen und Vorhangstangen-Montagematerialien

Vorhangstangen und Vorhangstangen-Montagematerialien, z. B. Träger, Endstücke, Rohre, Ringe und dergleichen, mit auf der Oberfläche aufgebrachtem Design, dadurch gekennzeichnet, dass das Design, das Muster oder die Ausgestaltung (4, 5, 6) der Oberfläche (3) des Gegenstandes (1) durch Bearbeiten mittels Laserstrahlen hergestellt ist.

Verfahren zur Herstellung, Wärmebehandlung und Warmumformung von Metallblechelementen

Die Erfindung betrifft ein Verfahren zur Herstellung, ein Verfahren zur Wärmebehandlung und ein Verfahren zur Warmumformung von Metallblechelementen mit einer metallischen Beschichtung mit verbesserter Maßhaltigkeit bei und nach Erwärmung sowie ein Kraftfahrzeug, insbesondere einen Personenkraftwagen.Es wird ein Verfahren zur Herstellung von Metallblechelementen (10) mit einer metallischen Beschichtung (12) mit verbesserter Maßhaltigkeit bei und nach Erwärmung zur Verfügung gestellt. Dieses umfasst das Bereitstellen eines Metallblechelements (10), welches zumindest teilweise eine metallische Beschichtung (12) aufweist, insbesondere eines Stahlblechs mit einer aluminiumhaltigen Beschichtung (12) wie z.B. mit einer Beschichtung (12) aus einer Aluminium-Silizium-Legierung, sowie das Erzeugen einer flächensegmentartigen Anordnung der Beschichtung (12). Dies erfolgt durch Einbringen wenigstens eines Trennbereichs (14) in die Beschichtung (12) derart, dass durch den Trennbereich (14) die Flächensegmente ...

Laserunterstütztes Gießen eines Kühllochs und zugeöhrigen System

Verschiedene Ausführungsformen umfassen Verfahren und zugehörige Systeme für laserunterstütztes Gießen. Einige Ausführungsformen umfassen ein Verfahren, das aufweist: Durchführen einer Laserablation an einem vorläufigen Wachsgussmodell zur Ausbildung eines modifizierten Wachsmodells, das wenigstens ein Kühlloch aufweist, das in dem Wachsgusssubstrat fehlt; Beschichten des modifizierten Wachsmodells, um eine Gussformgestalt um das modifizierte Wachsmodel herum auszubilden; und Entfernen des modifizierten Wachsmodells, um eine Gussform zu hinterlassen, die das wenigstens eine Kühlloch aufweist.

Vorrichtung und Verfahren zum Abtragen von Schichten auf einem Werkstück

The invention relates to a device and a method for removing thin layers on a support material, especially for removing barrier layers of a thin-layer solar cell. The aim of the invention is to provide an economical means of removing strips of up to a few millimetres in width without damaging the substrate of the thin-layer solar cell underlying the layer to be removed. To this end, a laser treatment device with a laser resonator and an optical system is provided. The optical system projects the treatment beam produced by the layer resonator over an area of 1 mm<2> to 1 cm<2> on the surface to be treated with an essentially homogenous distribution of power. Thin layers can be effectively removed from the substrate at pulse width of less than 100 ns and with a pulse energy density of 0.1 J/cm<2> to 10 J/cm<2>.

Verfahren zur Oberflächenvergrößerung wenigstens eines Bereichs einer Oberfläche eines Festkörpers oder einer Schicht auf einem Festkörper und damit vergrößerte Oberfläche eines Festkörpers oder einer Schicht eines Festkörpers

Die Erfindung betrifft Verfahren zur Oberflächenvergrößerung wenigstens eines Bereichs einer Oberfläche eines Festkörpers oder einer Schicht auf einem Festkörper durch Beaufschlagung des Bereichs der Oberfläche mit Laserstrahlung wenigstens eines Lasers, Verfahren zur Oberflächenvergrößerung wenigstens eines Bereichs einer Oberfläche eines Festkörpers oder einer Schicht auf einem Festkörper durch Beaufschlagung des Bereichs mit Laserstrahlung wenigstens eines Lasers, Verfahren zur Oberflächenvergrößerung wenigstens eines Bereichs einer - Oberfläche eines Festkörpers oder einer Schicht auf einem Festkörper durch Beaufschlagung des Bereichs mit Laserstrahlung wenigstens eines Lasers, Festkörper oder Schicht eines Festkörpers als wenigstens ein Teil eines Transplantats zum Einsetzen in einen Knochen und Verwendungen. Diese zeichnen sich insbesondere dadurch aus, dass ein Reservoir realisiert, die Osseointegration verbessert und/oder die Haftung wenigstens einer später aufzubringenden Beschichtung ...

Oberflächenmodifikationsverfahren und- vorrichtung

Verfahren zur räumlich periodischen Modifikation einer Oberfläche eines Substrates in einer Probenebene (P), wobei die Substratoberfläche mit einem der einzubringenden Struktur entsprechenden Beleuchtungsmuster einer Energiedichte oberhalb einer Prozessschwelle der Substratoberfläche bestrahlt wird, dadurch gekennzeichnet, dass das Beleuchtungsmuster mittels Beugung eines konvergierenden Eingangsstrahls (10) und Überlagerung resultierender, gebeugter Teilstrahlen (122) in einem Gitter-Interferometer erzeugt wird, wobei vor dem Gitter-Interferometer angeordnete Strahlformungsmittel (40; 40') den Eingangsstrahl (10) derart konvergieren lassen, dass wenigstens eine Komponente seiner gebeugten Teilstrahlen in der Nachbarschaft der Probenebene (P) eine Strahltaille aufweist.

Shaping machining process for workpieces involves use of laser beam angled to at least one axis in at least five degrees of freedom

The shaping process for a workpiece (1) involves the use of a laser beam (2) angled to at least one axis in at least five degrees of freedom. The machining may take place on several parts of the workpiece at the same time. The surface topography of the workpiece is set in three dimensions, and the position coordinates are used to control the laser machining.

Laser drilling or machining method using electrical field for removal of metal and/or plasma ions from machining point

The drilling or machining method has a current-voltage source (4) connected between the workpiece (2) and a relatively spaced electrode (3), for providing an electrical field (5), causing metal and/or plasma ions (6) adjacent the drilling or machining point (2a) of the laser beam (1) to be accelerated from the positive workpiece to the negative electrode. An independent claim for a laser drilling or machining device is also included.

Verfahren zum Materialabtrag an Festkörpern

Die vorliegende Erfindung betrifft ein Verfahren zum Materialabtrag an Festkörpern durch Laserablation, bei dem die räumliche und/oder zeitliche Kohärenz der Laserstrahlung vor dem Schritt der Materialbearbeitung, d. h. vor und/oder unmittelbar beim Auftreffen der Laserstrahlung auf dem zu bearbeitenden Festkörper herabgesetzt wird.

Methode zum Laserritzen von Solarzellen

Die vorliegende Erfindung betrifft eine Vorrichtung zur Ablation dünner Filme eines beschichteten Substrates in der Randregion des Substrates sowie das zugehörige Verfahren. Die erfindungsgemäße Vorrichtung umfasst einen Laser, eine optische Einheit, um das Laserlicht in einen Ablationsbereich zu lenken, und eine Halterung für plane Substrate. Die Halterung erlaubt, das Substrat in der Ebene des Substrates linear in zwei linear unabhängige Richtungen zu bewegen. Die Halterung erlaubt, das Substrat um eine Achse zu rotieren, welche senkrecht auf der Substratoberfläche steht. Dies erlaubt einen vereinfachten stationären Aufbau der Vorrichtung in Bezug auf optischer Einheit und Mittel zum endgültigen Entfernen der ablatierten Materialien.

Integrated circuit package having security feature and method of manufacturing same

Method of fabricating diamond-semiconductor composite substrates

LASER SURFACE HARDENING OF RAILS

Sealing a container to prevent unauthorized reuse

The surface of a container 13 underlying a sealing member 21 adhesively bonded to it is damaged preferably with a laser 23. If the member is then removed, parts of the surface (25, fig 3) are pulled off by the adhesive 22, and the damage is clearly visible. The damaged region may extend all round the container and may be writing, crazing, cracking or a fracture line. Preferably the member and the adhesive are transparent, so that even if they are reapplied the damage is still visible. This visible damage discourages reuse of the bottle by counterfeiters and the like, and the method may be used with perfume or spirits bottles and drug containers. The member 21 forms part of a seal member 16 overlying a closure 15 for the container. ...

UNDERCUTTING COMMUTATOR BARS

Laser cutting machine tool

... 1,087,534. Cutting by lasers. KEARNEY & TRECKER CORPORATION. May 26, 1966 [Aug. 18, 1965], No. 23736/66. Heading B3V. [Also in Divisions G2, G3 and H1] A laser cutting machine for metal workpieces comprises a laser 39 which produces a collimated light beam 37 of circular crosssection, a beam shaping means 42 for changing the beam cross-section into rectangular form 45, and a movable work support 17. The latter is movable along guides 13, 14 by a reversible servomotor 18 which also drives a tachometer generator 19. The laser 39 is mounted on a cutting head 24 movable transversely by a reversible servomotor 32 which also drives a tachometer generator 33. The generators 19, 33 provide feed-back signals to the servo control system 55 which is itself controlled by a tape in cabinet 52 to provide both speed and position control signals. The laser 39, Fig. 4 (not shown), comprises a ruby rod (176) with a semi-transparent reflector (181) at one end and beam expanding lenses (182), (183) at the ...

Solid oxide fuel cell with a novel substrate and a method for fabricating the same

Laser cutting apparatus and method

An apparatus and method for cutting material from a workpiece uses a laser resonator emitting an essentially coherent beam of electromagnetic radiation having at least partial linear polarization and a converting means converting the linearly polarized laser beam into an essentially coherent beam of electromagnetic radiation having at least partial circular polarization. A directing means ensures that the circularly polarized beam is directed against the workpiece at the point of the desired cut. A conventional focusing means and axially directed gas jet may be added to enhance the cutting of the laser beam. The use of a circularly polarized beam is said to reduce key angulation and improve cut surface smoothness.

Cutting apparatus

The present apparatus for trimming the edges and for cutting holes into three-dimensional hollow work pieces comprises few components and may be easily modified or retooled for use on molded work pieces of different shapes and sizes. For this purpose, the apparatus comprises a support mold 1 having a shape complementary to the shape of the work piece. The support mold is exchangeable and receives or holds the work piece in a form locking manner. The support mold comprises slots 4 or apertures 6 located where the trimming or cutting is to take place in the work piece. A laser cutting device 20 is arranged for cooperation with the support mold 1 in such a way that a relative motion may be performed between the laser cutting device and the support mold. Thus, the cutting laser beam is effective along the slots and along the edges of an aperture.

LASER BEAM UNDER CUTTING OF COMMUTATOR BARS

A method of undercutting commutator bars wherein to effect removal of insulating material along the sides of the insulating segments (5) the laser beam is directed parallel to a radius (R) but offset therefrom by a distance (X). By this means the laser beam is caused to impinge on the side wall of the insulator during the undercutting process. To effect undercutting of the other side of the insulator the commutator body (1) is moved not only forward and back along the rotational axis (2) but it is also moved transversely at the end of each stroke whereby the laser beam is caused to impinge on the commutator offset by a distance (Y) to the other side of the radius (R), the offset (Y) being equal to that of the offset (X). ...

Method for achieving final air gap and parallelism of a fuel injector control valve

A control valve of a fuel injector wherein the top face 30 of the magnetic armature spool 16 is aligned with the top face 18 of the valve body via ablation. The final air gap and parallelism (parallel alignment) of the armature are achieved by measuring the actual position of the two top surfaces to determine the alignment error and ablating the armature. The tilt axis Y and the line of greatest slope L of the armature are determined as well as the tilt height between the ends of the line of greatest slope. The armature is divided into bands B parallel to the tilt axis from which material is removed via a number successive passes of individual depth, the number of passes equal to the tilt height divided by the individual depth. A picosecond or femtosecond pulsed laser may be used. The method of production and a fuel injector comprising said control valve are also disclosed.

Laser scan speed calibration

BONDED CERAMICS-METAL MATERIAL METAL-CERAMICS COMPOSITE STRUCTURE USING IT AND METHOD OF PRODUCING THEM

IMPROVEMENTS RELATING TO CUTTING PROCESSES EMPLOYING A LASER

... 1,235,653. Cutting by burning; cutting wood by lasers. NATIONAL RESEARCH DEVELOPMENT CORP. 5 Jan., 1970 [10 Jan., 1969], No. 1578/69. Headings B4B and B5L. [Also in Divisions B3 and H1] In a laser cutting operation, the workpiece 32, Fig. 1, e.g. cloth, leather, paper, plastics, timber, is positioned between a laser beam 26 and a suction chamber 36 for extracting the fumes. In one embodiment, Fig. 1, the workpiece is supported on a grid 34 of the chamber 36 which is connected via a valve 38 to a reservoir 40, filter 42, suction pump 44 and motor 45. The laser beam is moved over the workpiece by moving a mirror 28 and lens 30. The laser beam energy is absorbed by a firebrick layer 46. In another embodiment, Fig. 4, a drum 86 having a cylindrical grid surface 85, is divided into segments by walls 88 having ceramic coatings 89, each segment having a firebrick layer 46. As the drum is rotated relative to a stationary shaft 90, each segment is connected in turn to a suction chamber 92 in the ...

VORICHTUNG TO PRODUCING A TURNING LASER BEAM

Laser engraver operation, for use in cutting objects, involves moving automatically cutting point of laser engraver above object, only when input parameter commands laser engraver to proceed auto-focus

The parameters of auto-focus and off-focus are input by the user. The cutting point of the laser engraver is automatically moved above an object and a z-axis platform is moved, if the input parameter commands the laser engraver to proceed auto-focus else the laser engraver is set not to proceed the function of auto-focus.

PROCEDURE FOR THE PRODUCTION OF A POLYMER COURSE WITH SOFT AND SEIDIGEM FEELING DURING CONTACT

PROCEDURE FOR THE PROCESSING OF ORGANIC CRYSTALS

Flat-bed laser plotter and method for operating a flat-bed laser plotter

Die Erfindung beschreibt einen Flachbett-Laserplotter (1) vorzugsweise mit einem Förderband (3) zum Abarbeiten eines Jobs für das Schneiden, Gravieren, Markieren und/oder Beschriften eines vorzugsweise flachen Werkstückes (4), der zumindest ein Gehäuse (5) mit einem Bearbeitungsraum (8) zum Positionieren eines Werkstückes (4) ausgebildet ist, wobei das Werkstück (4) bzw. ein Rohling (7) vorzugsweise über ein Zuführeinheit (2) positionierbar und von dem Förderband (3) aus dem Bearbeitungsraum zu einem Entnahmebereich (20) abtransportierbar ist, wobei dieser zumindest eine Strahlenquellen (11) in Form eines Lasers und einer Steuereinheit (12) zum Steuern des über vorzugsweise einen Riemenantrieb betriebenen Schlitten (9) mit daran verfahrbar angeordneten Fokussiereinheit (10) aufweist. An der Fokussiereinheit (10) ist ein Schutzteller (15) für die ev. vom Werkstück bzw. Rohling (4,7) reflektierenden Laserstrahlen (13) angeordnet und um den Bereich des Bearbeitungsraums (8), insbesondere über ...

REPAIR OF THE STATIONARY POETRY OF A ROTOR

PROCEDURE AND DEVICE FOR SNAPPING CUTS OF A WORKPIECE OUT OF SPRÖDBRÜCHIGEM MATERIAL

PROCEDURE FOR THE PRODUCTION OF THREE-DIMENSIONAL STRUCTURED SURFACES AND DEVICE FOR THE EXECUTION OF THE PROCEDURE

Verfahren und Einrichtung zum Bearbeiten von Werkstücken

A laser plotter, a device and a method for cutting of a graphic is disclosed. The method may comprise preparation or loading of a processing job with a graphic and identification features at a display; application of the recognition features and of the graphic to the workpiece; arrangement of the workpiece in a processing area of a laser plotter; acquisition or detection of identification features in order to determine the position and alignment of the applied graphic in the processing area; carrying out the processing after successful identification of the graphic; after the insertion of the workpiece, a laser-pointer is positioned on any selected identification feature, whereupon, a processing image represented on a display element, with the identification feature, is moved at the display element in such a way that a laser position displayed at the display element coincides with the identification feature.

Method for machining workpieces

Die Erfindung beschreibt ein Verfahren zum Gravieren, Markieren, Beschriften und/oder Schneiden von Werkstücken (7) mit aufgebrachten Graphik (17), insbesondere einem Graphikbereich, das folgenden Schritten umfasst: - Erstellen und/oder Laden eines Bearbeitungsjobs (16) mit einer Graphik (17) bzw. einem Graphikbereich und Erkennungsmerkmale (28) an einem Anzeigeelement (15), insbesondere einem Computer (15); - Aufbringen der Erkennungsmerkmale (28) und der Graphik (17) bzw. dem Graphikbereich am Werkstück (7); - Anordnen des Werkstückes (7) in einem Bearbeitungsbereich (8) eines Bearbeitungsgerätes (1), insbesondere einem Laserplotter (2) mit einer Optikeinheit (30) zum Erfassen der Erkennungsmerkmale (28); - Erfassen bzw. Detektieren des Werkstückes (7), insbesondere der Erkennungsmerkmale (28), um die Position und Ausrichtung des Werkstückes (7), insbesondere der aufgebrachten Graphik (17) bzw. des Graphikbereichs, im Bearbeitungsbereich (8) zu ermitteln; - Durchführen des Bearbeitungsprozesses ...

Method for machining workpieces

Die Erfindung beschreibt ein Verfahren zum Gravieren, Markieren, Beschriften und/oder Schneiden von Werkstücken (7) mit aufgebrachten Graphik (17), 5 insbesondere einem Graphikbereich, das folgenden Schritten umfasst: - Erstellen und/oder Laden eines Bearbeitungsjobs (16) mit einer Graphik (17) bzw. einem Graphikbereich und Erkennungsmerkmale (28) an einem Anzeigeelement (15), insbesondere einem Computer (15); - Aufbringen der Erkennungsmerkmale (28) und der Graphik (17) bzw. dem Graphikbereich am Werkstück (7); - Anordnen des Werkstückes (7) in einem Bearbeitungsbereich (8) eines Bearbeitungsgerätes (1), insbesondere einem Laserplotter (2) mit einer Optikeinheit (30) zum Erfassen der Erkennungsmerkmale (28); - Erfassen bzw. Detektieren des Werkstückes (7), insbesondere der Erkennungsmerkmale (28), um die Position und Ausrichtung des Werkstückes (7), insbesondere der aufgebrachten Graphik (17) bzw. des Graphikbereichs, im Bearbeitungsbereich (8) zu ermitteln; - Durchführen des Bearbeitungsprozesses ...

Method for engraving, with marking and/or marking a workpiece

Die Erfindung beschreibt ein Verfahren zum Gravieren, Markieren und/oder Beschriften eines Werkstückes (7) mit einem Laserplotter (2), bei dem in einem Gehäuse (3) des Laserplotters (2) eine bevorzugt jedoch mehrere, insbesondere zwei Strahlquellen (4) in Form von Lasern (5,6) eingesetzt werden, die bevorzugt abwechselnd auf das zu bearbeitendes Werkstück (7) einwirken. Das Werkstück (7) wird auf einem Bearbeitungstisch (9) definiert abgelegt und ein von der Strahlquelle (4) abgegebener Laserstrahl (10) wird über Umlenkelemente (11) an zumindest eine Fokussiereinheit (12) gesendet, von der der Laserstrahl (10) in Richtung Werkstück (7) abgelenkt und zur Bearbeitung fokussiert wird. Die Steuerung, insbesondere die Positionssteuerung des Werkstückes (7) zum Laserstrahl (10) erfolgt über eine in einer Steuereinheit (13) laufende Software, sodass das Werkstück (7) zeilenweise durch Verstellung eines Schlittens (21) bearbeitet wird. Von der Steuereinheit (13) wird eine der Qualität der Gravur ...

PROCEDURE FOR MANUFACTURING A WELDED STRUCTURE, MANUFACTURED STRUCTURE AS WELL AS YOUR APPLICATION FOR MANUFACTURING JUNCTION OF A LATTICE STRUCTURE

PRODUCTION OF LENSES FOR EYE-OPTICAL PURPOSES OF MEANS OF A EXZIMER LASER.

DISTANCE OF FOULING BY IRRADIATION

PROCEDURE FOR THE HERMETIC ATTACHMENT OF AN END OF A CATHETER FOR AN INTRODUCTION NEEDLE

PROCEDURE FOR KONFIGURATIONSTEUERN OF LASER-INDUCED DESTROYING AND CLEARING AWAY

PROCEDURE AS WELL AS DEVICE FOR THE TREATMENT OF FROM A STRETCHER MECHANISM AND A STAMP PAD EDUCATION COMPOUND PARTS

PROCEDURE AND PLANT FOR CUTTING FLAT MATERIAL.

PROCEDURE AND DEVICE FOR WORKING ON WORKPIECES WITH LASER RADIATION.

PROCEDURE FOR THE OPERATION OF A LASER ENGRAVING MECHANISM

PROCEDURE FOR THE PRODUCTION OF A HEATABLE LAMINATED GLASS DISK ALSO IN THE THERMOPLASTIC INTERMEDIATE LAYER ARRANGEMENT METAL WIRES

MAKING AN ELONGATE CUT USING HIGH ENERGY RADIATION

Laser ablation system having a moveable carriage with clamping system configured to clamp and seal against a workpiece

LASER ABLATION SYSTEM HAVING A MOVEABLE CARRIAGE WITH CLAMPING SYSTEM CONFIGURED TO CLAMP AND SEAL AGAINST A A laser ablation system (102) comprises a volume (114) configured to contain a workpiece (106) and a carriage (116) configured to move within the volume relative to a workpiece. The carriage comprises a clamping system (118), a laser enclosure (120), and a laser ablation work head (122) within the laser enclosure. The clamping system is configured to clamp the workpiece and seal against a portion (124) of the workpiece. 2112•• •,r M ••, h\* 6 \Xl\ Ch4 ...

A system and method for unveiling targets embedded in a multi-layered electrical circuit

Polymeric web exhibiting a soft and silky tactile impression

Production of microfluidic devices using laser-induced shockwaves

METHOD FOR SCRIBING SUBSTRATE OF BRITTLE MATERIAL AND SCRIBER

System and method for laser photoaltering a material using multi-beam scanning

The present application relates to systems (10) and method of photoaltering a material. The system (10) includes a laser source (14) operable to produce a primary pulsed beam (18), a holographic optical element (32) configured to receive the primary pulsed beam (18) and transmit a plurality of secondary beams (36), and a scanner (20) operable to direct the secondary beams (36) to the material. The secondary beams (36) are based on the primary pulsed beam (18). The method includes phase shifting a pulsed laser beam to produce an input beam (36), holographically altering the input beam to produce a plurality of transmission beams (36), and scanning a portion of the material (12) with the transmission beams (36).

Laser processing

CUTTING APPARATUS FOR THREE-DIMENSIONAL MOULDINGS

A b s t r a c t An apparatus for trimming the edges of and for making apertures in three-dimensional hollow mouldings is comprised of a few component parts and can be easily converted to any shapes and sizes of mouldings which are likely to arise. To this end, a hollow interchangeable backing mould (1) complementary to the hollow moulding is provided for positive supporting of the moulding. At the locations of the edges which are to be trimmed and of the apertures which are to be made, the backing mould is provided with continuous slots (4) or corresponding apertures (6). Furthermore, a laser cutting device (20) is so associated with the backing mould (1) that backing mould and laser beam head (19) are movable relative to each other along the slots and/or along the aperture edges of the backing mould.

WAVEFRONT CALIBRATION ANALYZER AND METHODS

A wavefront sensor enhances calibration of a laser ablation system, such as a laser eye surgery system, by measuring one or more characteristics of an ablated test surface. Typically, light is passed through the ablated test surface, and the light is analyzed to determine the test surface characteristics. In some embodiments, the ablated test surface is positioned along a treatment plane. In some embodiments, light is passed through a wavefront sensor, such as a Hartmann-Shack sensor, to convert the light into electrical signals. A processor then converts the electrical signals into data, such as surface maps showing high-order aberrations and/or artifacts on the test surface, refractive power measurements, shape measurements, and the like. Generated data may then be used to calibrate a laser surgery system.

LASER-BASED ABLATION METHOD AND OPTICAL SYSTEM

A method and a system for the ablation of volume elements of a target object such as an optical fiber or the like are presented. A CO2 laser is used to produce a light beam which includes long pulses having a rise time followed by a plateau where the peak power of the laser is attained. The light beam is moved across the target object in such a manner that each of its volume elements is intersected by the light beam during the plateau of a long pulse, so that each volume element is exposed to the peak power of the laser for a short effective pulse.

CUTTING APPARATUS FOR THREE-DIMENSIONAL MOULDINGS

SYSTEM FOR LASER TREATING A PIPE SURFACE

A laser cleaning system for laser treating a pipe surface includes a frame mountable to an outer circumference of a cylindrical pipe, a plurality of circumferential guide supports mounted to the frame and engageable with the outer circumference of the pipe, and a laser mounted to the frame to generate a laser beam directed toward an exterior surface of the pipe. The frame is movable about the outer circumference of the pipe on the plurality of circumferential guide supports to scan the laser beam circumferentially across the exterior surface.

LASER CUTTING MACHINE FOR TRIMMING, ADDING, PUNCHING OR SIMILAR COMPRISING A SUPPORT FOR THE REMOVABLE LASER HEAD OF A MACHINE TOOL BED

La présente invention concerne un dispositif de découpe au laser pour détourer, ajourer, poinçonner ou similaire, une pièce, ledit dispositif étant constitué d'une tête de découpe laser (1) alimentée par une fibre optique (7) connectée à un générateur de faisceau laser (8), dans lequel la tête de découpe laser (1) est solidaire d'un support amovible (2) apte à être solidarisé sur le bâti (3) ou le porte-outil (5) inférieur et/ou supérieur d'une machine-outil (4) et comprenant des moyens de commande de la tête de découpe laser (1) indépendants et programmables.

MULTILAYER MICROSTRUCTURES AND LASER BASED METHOD FOR PRECISION AND REDUCED DAMAGE PATTERNING OF SUCH STRUCTURES

Many integrated circuits require a multilayer structure which contains layer of an organic or polymeric material with a patterned metallic layer on it. Laser patterning has many favourable characteristics but it also damages the organic or polymeric material. A novel method is disclosed that makes possible laser patterning of conductive metal electrode deposited on top of an organic and/or polymeric material without significant ablation of the organic and/or polymeric material. The method can achieve higher patterning resolution, resulting in higher quality integrated circuits. The method is based on the application of a thin coating of an inexpensive anti-reflector deposited on top of the desired metal electrode which in turn lies on the organic and/or polymeric material. The thin anti- reflecting coating allows the use of a lower fluence laser for ablation of metal layer without damaging the underlying organic and/or polymeric material.

PRODUCTION OF MICROFLUIDIC DEVICES USING LASER-INDUCED SHOCKWAVES

A method an apparatus for manufacturing a microfluidic device (10) is dis closed in which a laser is used to remove selected portions of one of the la yers that make up the device. The portion of the layer may be removed before the layer is amalgamated with other layers making up the device, or the por tion may be removed after the layers have been bonded together. The laser be am used to accomplish removal is a combination of at least two laser beams ( 3, 4), one of which (3) may be a continuous beam to form a melt of the porti on to be removed, the other (4) being pulsed or modulated in some way to per iodically induce shockwaves which remove the portion. The laser beams use at least one part (5, 8, 9) of the same alignment system.

LASER MACHINING SYSTEMS AND METHODS

A laser machining method includes directing, from an F-theta lens having a long focal length of greater than about 250 millimeters, a laser beam at a non-perpendicular beam tilt angle from an optical axis of the lens having a top-hat profile and a narrow beam divergence angle of between about 1 degree and about 3 degrees towards a workpiece on a stage movable in at least an X-direction and a Y-direction, engaging the directed laser beam with the workpiece disposed in the usable field of view, moving the workpiece and the directed laser beam relative to each other, and removing portions of the workpiece with the directed laser beam to define a machined surface.

LASER MACHINING SYSTEMS AND METHODS

A laser machining method includes directing, from an F-theta lens having a long focal length of greater than about 250 millimeters, a laser beam at a non- perpendicular beam tilt angle from an optical axis of the lens having a top-hat profile and a narrow beam divergence angle of between about 1 degree and about 3 degrees towards a workpiece on a stage movable in at least an X-direction and a Y-direction, engaging the directed laser beam with the workpiece disposed in the usable field of view, moving the workpiece and the directed laser beam relative to each other, and removing portions of the workpiece with the directed laser beam to define a machined surface.

METHOD FOR AUTOMATED STRAIGHTENING OF WELDED ASSEMBLIES

An automated method for straightening/correcting deformations made to panels when welded to metallic structural components is disclosed. In the train industry, when an aluminum component, such as a vehicle's exterior shell, is welded to hidden structural parts, deformations thereon may occur. Such deformations need to be subsequently corrected, and the present method uses robots and optical measuring of the deformed surfaces to conduct a straightening thereof. The method includes four main steps. First, the deformed surface is scanned with an optical sensor to make physical measures/characterizations thereof. Second, the gathered data are compared with the desired resultant by a software. Third, once the comparison is done, the software performs an analysis to select the proper parameters to be used in the straightening method that will be applied at each area requiring straightening. Finally, a robot executes the operations specified by the software to perform the straightening process ...

PULSE TEMPORAL PROGRAMMABLE ULTRAFAST BURST MODE LASER FOR MICROMACHINING

A laser processing system provides a burst of ultrafast laser pulses having a selectively shaped burst envelope. A burst pulse laser includes a high repetition rate ultrafast laser to deliver a pulse train with each pulse in the train having an independently controlled amplitude. The respective amplitudes of each ultrafast pulse in a group define a "burst envelope." In addition to independently controlling the amplitude of each ultrafast pulse within the burst envelope, the system may also provide selective control of spacing between each ultrafast pulse and/or the overall temporal width of the burst envelope. Thus, the system provides selective shaping of the burst envelope for particular laser processing applications.

METHOD FOR CLEANING AND STRIPPING A TURBOSHAFT ENGINE BLADE USING A PULSED LASER

Un procédé de nettoyage d'une aube (1) de turbomoteur comportant un corps en superalliage recouvert d'un revêtement, procédé dans lequel on usine au moins partiellement le revêtement de l'aube (1) au moyen d'un laser impulsionnel (3), au moins la vitesse d'avance du laser impulsionnel (3) et la fréquence d'impulsion du laser impulsionnel (3) étant paramétrés pour que la surface usinée de l'aube (1) présente une rugosité comprise entre 4 µm et 10 µm.

METHOD OF APPLYING A PROTECTIVE CLADDING, PARTICULARLY TO GAS-TIGHT MEMBRANES OF ENERGY BOILERS

A method of applying a protective cladding, particularly to gas-tight membranes of energy boilers involves coupling of two gas-tight membranes (2) together, and then soaking a pair of gas-tight membranes (2) coupled together at 300°C to 800°C, favorably at around 700°C; afterwards, the membrane (2) surface where a cladding (1) is to be applied is cleaned, a pair of gas-tight membranes (2) coupled together is mounted on a positioner and then preheated up to 80°C to 600°C, favorably to around 300°C-450°C, and then the cleaned and preheated surface of a pair of gas- tight membranes (2) coupled together is covered with a protective cladding (1), wherein a protective cladding is applied at a thickness of 0.1 mm to 3.00 mm, favorably around 0.6 mm, and then the entire pair of gas-tight membranes (2) coupled together with a cladding (2) is finally soaked at 300°C to 800°C, favorably at around 700°C, and the set temperature is maintained for 10 minutes to 600 minutes, favorably for 15 minutes to ...

Method of Laser Machining Workpieces

METHOD FOR CUTTING A WORKPIECE AND AN APPARATUS FOR PERFORMING THE METHOD

To cut or separate a workpiece, having a plain or curved surface, a jet-like fluid cutting medium is used. The cutting medium is ejected from a nozzle under high pressure and is directed towards the workpiece. In order to achieve an exact cut edge, even if a high cutting speed is selected, the cutting medium is directed towards the surface of the workpiece not exactly perpendicularly, but with an angle deviation of between 0.1 and 0.3 degrees. An apparatus for performing such a cutting operation comprises a tube with a nozzle at its end through which the cutting medium is ejected. The nozzle is swivelably supported and the tube may be adjusted in X- and Y-direction such that the desired cutting angle may be controlled.

METHOD AND APPARATUS FOR SECURING AN END OF A HEADBOX FLOW TUBE

A method and apparatus are disclosed for securing an end of a headbox flow tube to an end plate. The method includes the steps of laser cutting the end plate such that the end plate defines an opening for reception therein of the end of the flow tube. The end of the flow tube is positioned within the opening, and the end of the flow tube is laser welded to the end plate in the vicinity of the opening for generating a water tight seal between the end of the flow tube and the end plate.

Laser-Schneidwerkzeugmaschine

Process for obtaining openings or outlines in ceramic substrates by laser

PRODUCTION OF THIN STEEL SHEET MATERIAL.

LASER MACHINE TOOL.

Method for adjusting oscillation frequency and/or inertia and/or e.g. dynamic balance of time balance motor in clock movement or balance and spring assembly of watch, involves controlling pulse using driving unit to drive movements of beam

The method involves removing and/or adding and/or moving a material on a movable micromechanical component by using a laser or picolaser (2) to carry out micromachining and/or micromelting of the material or an added material, for vaporizing and/or moving and/or welding the material, under the effect of a pulse from the laser or picolaser. The pulse is controlled using a driving unit (3) to generate, sequence, and interrupt the pulse, and to drive movements of a beam (20) of the laser or picolaser, where the driving unit is connected to or controlled by a measurement or comparison unit (4). Independent claims are also included for the following: (1) a balance and spring assembly for a timepiece, comprising a counterweight (2) a device for adjusting oscillation frequency and/or inertia and/or balance of a movable component in a clock movement or a balance and spring assembly of a timepiece, comprising a laser source.

Chip binder.

Method of etching a timepiece and timing element obtained by such a method.

L’invention concerne un procédé de gravage d’un élément (1), comprenant une application sur l’élément d’un faisceau laser (5) dont les impulsions durent chacune moins d’une picoseconde, de sorte à réaliser un usinage pour enlèvement de matière sur l’élément et une coloration de la surface de fond (6) d’usinage. L’invention concerne également un élément obtenu par la mise en œuvre du procédé selon l’invention, un mécanisme horloger comprenant un tel élément ainsi qu’une pièce d’horlogerie comprenant un tel mécanisme ou un tel élément.

Wafer dividing method

A method of dividing a wafer having devices formed in a plurality of regions demarcated by a plurality of streets formed in a grid pattern on a surface of the wafer, along the streets and into the individual devices. The wafer dividing method includes the steps of: forming grooves from the face side of the wafer along the streets and in a depth corresponding to the finished thickness of the devices; coating the surface of the wafer with an acrylic liquid resin curable by irradiation with UV rays to fill the grooves with the acrylic liquid resin and disposing a protective film on the acrylic liquid resin; performing irradiation with UV rays from the protective film side so as to cure the acrylic liquid resin; grinding the back side of the wafer so as to expose the grooves on the back side and divide the wafer into the individual devices; adhering the back side of the wafer to a surface of an adhesive tape adhered to an annular frame; and peeling the acrylic resin from the surface of the wafer together with the protective film.

Method to dice back-contact solar cells

A method of processing of solar cells includes determining that a back-contact solar cell is defective. The back-contact solar cell includes a first plurality of interconnect pads at a first edge thereof, and a second plurality of interconnect pads at a second, opposed thereof, the first and second pluralities of interconnect pads having opposite operational charges. The back-contact solar cell is then diced to define at least first and second back-contact solar cell sections. The first back-contact solar cell section has at least two interconnect pads, of the plurality of interconnect pads, at respective opposed edges thereof.

Methods of temporally varying the laser intensity during scribing a photovoltaic device

Methods for laser scribing a film stack including a plurality of thin film layers on a substrate are provided. A pulse of a laser beam is applied to the film stack, where the laser beam has a power that varies as a function of time during the pulse according to a predetermined power cycle. For example, the pulse can have a pulse lasting about 0.1 nanoseconds to about 500 nanoseconds. This pulse of the laser beam can be repeated across the film stack to form a scribe line through at least one of the thin film layers on the substrate. Such methods are particularly useful in laser scribing a cadmium telluride thin-film based photovoltaic device.

Semiconductor device

There is provided a semiconductor device with which stress can be prevented from locally concentrating on an external connecting terminal on a post and thus damages of the external connecting terminal can be prevented. The semiconductor device includes a semiconductor chip, a sealing resin layer stacked on a surface of the semiconductor chip, and the post which penetrates the sealing resin layer in a stacking direction of the semiconductor chip and the sealing resin layer, protrudes from the sealing resin layer, and has a periphery of the protruding portion opposedly in contact with a surface of the sealing resin layer in the stacking direction.

Packaging Integrated Circuits

An integrated circuit 15 is placed onto a lead frame 101 having lead fingers 109 of substantially constant thickness along their length. Wires are formed from the lead fingers 109 to corresponding electrical contacts the integrated circuit. Following the wire bonding process, the thickness of the tips of the lead fingers 109 is reduced by a laser process, to form tips of reduced thickness desirable for a subsequent moulding operation. Thus, at the time of the wire bonding the tips of the fingers 109 need not have a gap beneath them, so that more secure wire bonds to the lead fingers 109 can be formed.

Sapphire wafer dividing method

A sapphire wafer dividing method including a cut groove forming step of forming a plurality of cut grooves on the back side of a sapphire wafer along a plurality of crossing division lines formed on the front side where a light emitting layer is formed, a modified layer forming step of forming a plurality of modified layers inside the sapphire wafer along the division lines, and a dividing step of dividing the sapphire wafer into individual light emitting devices along the modified layers as a division start point, thereby chamfering the corners of the back side of each light emitting device owing to the formation of the cut grooves in the cut groove forming step.

Semiconductor component with marginal region

A semiconductor wafer is disclosed. One embodiment provides at least two semiconductor components each having an active region, and wherein at least one zone composed of porous material is arranged between the active regions of the semiconductor components.

Chip package and manufacturing method thereof

A chip package including a shielding layer having a plurality of conductive connectors for better electromagnetic interferences shielding is provided. The conductive connectors can be flexibly arranged within the molding compound for better shielding performance. The shielding layer having the conductive connectors functions as the EMI shield and the shielding layer is electrically grounded within the package structure.

Workpiece dividing method

A workpiece has a substrate and a film formed on the front side of the substrate. A first laser beam applied to the film from the front side of the workpiece along streets formed on the film, thereby forming a plurality of laser processed grooves along the streets. An adhesive tape is attached to the front side of the workpiece. Thereafter, a second laser beam is applied to the substrate from the back side of the workpiece along the streets, with the focal point of the second laser beam set inside the substrate, forming a plurality of modified layers along the streets. Thereafter, the adhesive tape is expanded to divide the substrate along the streets, thereby obtaining a plurality of individual devices. The back side of the substrate of each device is then ground to remove the modified layers and reduce the thickness of each device to a predetermined thickness.

On-The-Fly Manipulation Of Spot Size And Cutting Speed For Real-Time Control Of Trench Depth And Width In Laser Operations

Systems and methods cut trenches of multiple widths in a material using a single pass of a laser beam. A first series of laser pulses cut a work surface of the material at a first cutting speed using a first spot size. In a transition region from a first trench width to a second trench width, a second series of laser pulses sequentially change spot sizes while gradually changing from the first cutting speed to a second cutting speed. Then, a third series of laser pulses continue to cut the work surface at the second cutting speed using a second spot size. The method provides for increased depth control in the transition region. A system uses a selectively adjustable optical component in the laser beam path to rapidly change spot size by adjusting a position of a focal plane with respect to the work surface.

Reticle set modification to produce multi-core dies

A first reticle set designed for manufacturing dies with a limited number of cores is modified into a second reticle set suitable for manufacturing at least some dies with at least twice as many cores. The first reticle set defines scribe lines to separate the originally defined dies. At least one scribe line is removed from pairs of adjacent but originally distinctly defined dies. Inter-core communication wires are defined to connect the adjacent cores, which are configured to enable the adjacent cores to communicate during operation without connecting to any physical input/output landing pads of the resulting more numerously cored die, which will not carry signals through the inter-core communication wires off the P-core die. The inter-core communication wires may be used for power management coordination purposes or to bypass the external processor bus.

Method and apparatus for depositing phosphor on semiconductor-light emitting device

A method and apparatus for depositing a phosphor using transfer molding. The method includes: forming a plurality of light-emitting devices on a wafer and rearranging the light-emitting devices on a carrier substrate according to luminance characteristics of the plurality of light-emitting devices by examining the luminance characteristics of the plurality of light-emitting devices; depositing the phosphor on the rearranged light-emitting devices using transfer molding; and separating the light-emitting devices on the carrier substrate.

Method for making an opening in a substrate

A method for making an opening in a substrate includes creating a cutting path in the substrate for cutting out a polygonal area along predetermined side paths which enclose the opening and are connected to each other via respective corner points. The cutting path is started in an internal region of the polygonal area at a distance from the side paths. The cutting path is continued in a recess in the internal region to a start point on a first one of the side paths, the start point being disposed along the first one of the side paths at a substantial distance from each of the respective corner points so as to divide the first one of the side paths into a long side path portion and a short side path portion. The cutting path is continued, from the start point, along each of the side paths.

Laser machining apparatus with switchable laser system and laser machining method

A laser machining apparatus and method for producing from a workpiece a rotating cutting tool having a cutting edge and a flank. The laser machining apparatus works in two different operating modes. In the first operating mode, a first laser head is used for machining the workpiece at high advance speeds of the workpiece relative to the first laser head to form a rough desired contour with pulses having a duration in the nanosecond range resulting in laser melt cutting. Subsequently, the laser machining apparatus is operated in the second operating mode generating laser pulses with having a pulse duration in the picosecond range. In the second operating mode, a second laser head is activated by means of an optical scanner system and directs the laser pulses onto a two-dimensional pulse area on the surface of the workpiece, the material removal is accomplished by laser ablation.

Wafer dividing method

In a wafer dividing method, a wafer is held by a chuck table of a laser beam processing apparatus. A modified layer is formed by radiating a laser beam having a wavelength that transmits the laser beam through the wafer, while adjusting the beam convergence point to a position inside of the wafer, so as to form a pair of modified layers the interval of which is greater than the width of a cutting edge of a cutting blade and smaller than the width of planned dividing lines, on the back side of the wafer at both sides of each of the planned dividing lines. The wafer is adhered to a dicing tape and divided into individual devices by cutting along the dividing lines.

Method for producing semiconductor light-emitting chip and semiconductor light-emitting chip

In producing a semiconductor light-emitting chip whose substrate is composed of a sapphire single crystal, cracking in semiconductor light-emitting elements in the obtained semiconductor light-emitting chip is suppressed. A semiconductor light-emitting chip is obtained by forming, on an element-group formation substrate on a front surface of which semiconductor light-emitting elements are formed, the front surface being composed of a C-plane of a sapphire single crystal, dividing grooves extending toward a first direction along an M-plane of the sapphire single crystal and the front surface of the substrate from a substrate front surface side (step 103 ), forming first modified regions extending toward the first direction and second modified regions extending along the substrate front surface and toward a second direction different from the first direction in the substrate (step 104 and step 105 ), and dividing the element-group formation substrate using the first modified regions and the second modified regions (step 106 ).

Laser processing systems and methods for beam dithering and skiving

A laser processing system includes a first positioning system for imparting first relative movement of a beam path along a beam trajectory with respect to a workpiece, a processor for determining a second relative movement of the beam path along a plurality of dither rows, a second positioning system for imparting the second relative movement, and a laser source for emitting laser beam pulses. The system may compensate for changes in processing velocity to maintain dither rows at a predetermined angle. For example, the dither rows may remain perpendicular to the beam trajectory regardless of processing velocity. The processing velocity may be adjusted to process for an integral number of dither rows to complete a trench. A number of dither points in each row may be selected based on a width of the trench. Fluence may be normalized by adjusting for changes to processing velocity and trench width.

Laser beam processing method for a wafer

A processing method for a wafer which has, on a surface thereof, a device region in which a plurality of devices are formed and partitioned by division lines and an outer periphery excess region surrounding the device region, includes a dividing groove formation step of irradiating a laser beam of a wavelength having absorbability by a wafer along the division lines to form dividing grooves serving as start points of cutting, and a dividing step of applying external force to the wafer on which the dividing grooves are formed to cut the wafer into the individual devices. At the dividing groove formation step, the dividing grooves are formed along the division lines in the device region while a non-processed region is left in the outer periphery excess region on extension lines of the division lines.

Water soluble mask for substrate dicing by laser and plasma etch

Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer washed off.

In-situ deposited mask layer for device singulation by laser scribing and plasma etch

Methods of dicing substrates by both laser scribing and plasma etching. A method includes forming an in-situ mask with a plasma etch chamber by accumulating a thickness of plasma deposited polymer to protect IC bump surfaces from a subsequent plasma etch. Second mask materials, such as a water soluble mask material may be utilized along with the plasma deposited polymer. At least some portion of the mask is patterned with a femtosecond laser scribing process to provide a patterned mask with trenches. The patterning exposing regions of the substrate between the ICs in which the substrate is plasma etched to singulate the IC and the water soluble material layer washed off.

Laser and plasma etch wafer dicing using water-soluble die attach film

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The semiconductor wafer is disposed on a water-soluble die attach film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The water-soluble die attach film is then patterned with an aqueous solution.

Etching a laser-cut semiconductor before dicing a die attach film (daf) or other material layer

Semiconductor die break strength and yield are improved with a combination of laser dicing and etching, which are followed by dicing an underlying layer of material, such as die attach film (DAF) or metal. A second laser process or a second etch process may be used for dicing of the underlying layer of material. Performing sidewall etching before cutting the underlying layer of material reduces or prevents debris on the kerf sidewalls during the sidewall etching process. A thin wafer dicing laser system may include either a single laser process head solution or a dual laser process head solution to meet throughput requirements.

Method of processing optical device wafer

A method of processing an optical device wafer having an optical device layer including an n-type semiconductor layer and a p-type semiconductor layer stacked over a sapphire substrate, a buffer layer therebetween, allowing peeling of the sapphire substrate. The method includes joining a transfer substrate to the optical device layer, breaking the buffer layer by irradiation with a pulsed laser beam from the sapphire substrate side of the wafer with the transfer substrate joined to the optical device layer, and peeling the sapphire substrate from the optical device wafer with the buffer layer broken, transferring the optical device layer onto the transfer substrate. The pulsed laser beam has a wavelength longer than an absorption edge of the sapphire substrate and shorter than an absorption edge of the buffer layer, and a pulse width set so that a thermal diffusion length will be not more than 200 nm.

Optoelectronic integrated circuit substrate and method of fabricating the same

An optoelectronic integrated circuit substrate may include a first region and a second region. The first region and the second region each include at least two buried insulation layers having different thicknesses. The at least two buried insulation layers of the first region are formed at a greater depth and have a greater thickness as compared to the at least two buried insulation layers of the second region. A micro-electromechanical systems (MEMS) structure may be formed in a third region that does not include a buried insulation layer.

Method and Apparatus for Plasma Dicing a Semi-conductor Wafer

The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma. 1. A method for plasma dicing a substrate , the method comprising:providing a process chamber having a wall;providing a plasma source adjacent to the wall of the process chamber;providing a work piece support within the process chamber;placing the substrate on a carrier support to form a work piece;loading the work piece onto the work piece support;providing a cover ring disposed above the work piece;generating a plasma through the plasma source; andetching the work piece through the generated plasma.2. The method according to further comprising placing the substrate onto a support film on a frame to form the work piece.3. The method according to further comprising providing an RF power source coupled to the work piece support.4. The method according to wherein the work piece support further comprising an electrostatic chuck.5. The method according to further comprising a lifting mechanism within the work piece support claim 4 , the work piece being loaded onto the lifting mechanism.6. The method according to further comprising a filler ring extending from an outer diameter of the electrostatic chuck to the lifting mechanism.7. The method according to further comprising providing a mechanical partition between the high density source and the work piece.8. The method according to further comprising controlling the temperature of the cover ring during the etching step.9. The method according to wherein the cover ring ...

Systems and processes that singulate materials

Systems and methods for material singulation. According to some embodiments, methods for material singulation may include applying a first laser output to the material, the first laser output causing a modification of a material property of the material when exposed to the first laser output; and applying a second laser output to the material that was exposed to the first laser output to cause singulation of the material in such a way that surfaces created by the singulation of the material are substantially free from defects.

Method for Slicing a Substrate Wafer

A method for slicing a monocrystalline semiconductor layer () from a semiconductor single crystal () comprising: providing a semiconductor single crystal () having a uniform crystal structure; locally modifying the crystal structure within a separating plane () in the semiconductor single crystal () into an altered microstructure state by means of irradiation using a laser (); and removing the modified separating plane () by means of selective etching. 1. A method for slicing a mono crystalline semiconductor layer from a semiconductor single crystal comprising:providing a semiconductor single crystal having a uniform crystal structure;locally modifying the crystal structure within a separating plane in the semiconductor single crystal into an altered microstructure state by means of irradiation using a laser; andremoving the modified separating plane by means of selective etching.2. The method as claimed in patent comprising:polishing a surface of the semiconductor layer which adjoins the separating plane.3. The method as claimed in claim 1 , wherein modifying is effected by focused incidence of laser radiation emitted by the laser via the top side of the semiconductor single crystal.4. The method as claimed in claim 3 , wherein laser radiation comprises a picosecond or femtosecond laser radiation.5. The method as claimed in claim 1 , wherein a focus of the laser radiation is introduced in a raster-like fashion over the entire separating plane.6. The method as claimed in claim 1 , wherein the laser radiation is focused into the region of the separating plane via an optical unit having a numerical aperture of more than 0.5.7. The method as claimed in claim 1 , wherein the laser radiation is focused into a punctiform region in the separating plane.8. The method as claimed in claim 1 , wherein removing the modified separating plane is effected by means of a wet-chemical method.9. The method as claimed in claim 8 , wherein the wet-chemical method comprises the use of a ...

Optical device and method for manufacturing the optical device

The invention provides an optical device and an optical device manufacturing method wherein provisions are made to be able to precisely align an optical fiber relative to a substrate without heating the substrate and to maintain the optimum alignment condition for an extended period of time. More specifically, the invention provides an optical device manufacturing method which includes the steps of forming a first metallic film on a portion of a substrate, forming a second metallic film on a portion of the outer circumference of an optical fiber, and bonding together the first metallic film and the second metallic film by surface activated bonding,, and an optical device manufactured by such a manufacturing method.

WAFER LEVEL PACKAGING OF SEMICONDUCTOR CHIPS

A method of manufacturing semiconductor packages at the wafer level is disclosed. A wafer has multiple integrated circuits (ICs) formed on its active surface, with each IC in communication with a plurality under-bump metallization (UBM) pads formed on one surface the package. The UBM pads include a larger pads near the center of package and smaller UBM pads near the periphery. The method includes attaching a stiffener to an inactive surface of the wafer; forming under bump metallization pads; and forming solder bumps extending from the UBM pads. 1. A method of manufacturing semiconductor package from a wafer having at least one integrated circuit (IC) formed on an active surface , said method comprising:a) attaching a stiffener to an inactive surface of said wafer;b) forming substantially rectangular under bump metallization (UBM) pads, each one of said UBM pads in communication with said IC, said UBM pads comprising at least a first UBM pad, and a second UBM pad larger than said first UBM pad;c) forming solder bumps extending from each of said UBM pads; andd) separating said wafer into semiconductor packages.2. The method of claim 1 , further comprising forming a compliant layer on said active surface of said wafer prior to said forming said UBM pads.3. The method of claim 2 , wherein said compliant layer comprises a dielectric material.4. The method of claim 1 , further comprising thinning said wafer by grinding claim 1 , prior to said attaching said stiffener.5. The method of claim 1 , wherein said first UBM pad is formed near a periphery of said semiconductor chip package.6. The method of claim 5 , wherein said second UBM pad is formed near a center of said semiconductor chip package.7. The method of claim 1 , wherein said stiffener is made of one of organic and metallic materials.8. The method of claim 2 , further comprising forming conductive rerouting to interconnect each of a plurality of die pads corresponding to each IC claim 2 , to a corresponding one of ...

FILM FOR BACK SURFACE OF FLIP-CHIP SEMICONDUCTOR, DICING-TAPE-INTEGRATED FILM FOR BACK SURFACE OF SEMICONDUCTOR, PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE, AND FLIP-CHIP SEMICONDUCTOR DEVICE

The present invention relates to a film for back surface of flip-chip semiconductor, which is to be formed on a back surface of a semiconductor element flip-chip connected onto an adherend, wherein an amount of shrinkage of the film for back surface of flip-chip semiconductor due to thermal curing is 2% by volume or more and not more than 30% by volume relative to a total volume of the film for back surface of flip-chip semiconductor before the thermal curing. According to the film for back surface of flip-chip semiconductor according to the present invention, since it is formed on the back surface of a semiconductor element having been flip-chip connected onto an adherend, it fulfills a function to protect the semiconductor element. In addition, in the film for back surface of flip-chip semiconductor according to the present invention, since an amount of shrinkage due to thermal curing is 2% by volume or more relative to a total volume of the film for back surface of flip-chip semiconductor before the thermal curing, a warp of a semiconductor element to be generated at the time of flip-chip connecting the semiconductor element onto an adherend can be effectively suppressed or prevented. 1. A film for back surface of flip-chip semiconductor , which is to be formed on a back surface of a semiconductor element flip-chip connected onto an adherend ,wherein an amount of shrinkage of the film for back surface of flip-chip semiconductor due to thermal curing is 2% by volume or more and not more than 30% by volume relative to a total volume of the film for back surface of flip-chip semiconductor before the thermal curing.2. The film for back surface of flip-chip semiconductor according to claim 1 , which contains at least a thermosetting resin.3. The film for back surface of flip-chip semiconductor according to claim 2 , wherein a content of the thermosetting resin is 40% by weight or more and not more than 90% by weight relative to whole resin components in the film for ...

FILM FOR BACK SURFACE OF FLIP-CHIP SEMICONDUCTOR

The film for back surface of flip-chip semiconductor according to the present invention is a film for back surface of flip-chip semiconductor to be formed on a back surface of a semiconductor element having been flip-chip connected onto an adherend, wherein a tensile storage elastic modulus at 23° C. after thermal curing is 10 GPa or more and not more than 50 GPa. According to the film for back surface of flip-chip semiconductor of the present invention, since it is formed on the back surface of a semiconductor element having been flip-chip connected onto an adherend, it fulfills a function to protect the semiconductor element. In addition, since the film for back surface of flip-chip semiconductor according to the present invention has a tensile storage elastic modulus at 23° C. after thermal curing of 10 GPa or more, a warp of the semiconductor element generated at the time of flip-chip connection of a semiconductor element onto an adherend can be effectively suppressed or prevented. 1. A film for back surface of flip-chip semiconductor , which is to be formed on a back surface of a semiconductor element flip-chip connected onto an adherend ,wherein a tensile storage elastic modulus at 23° C. after thermal curing is 10 GPa or more and not more than 50 GPa.2. The film for back surface of flip-chip semiconductor according to claim 1 , wherein the film for back surface of flip-chip semiconductor is formed of at least a thermosetting resin component.3. The film for back surface of flip-chip semiconductor according to claim 2 , which comprises at least a layer formed of at least a thermosetting resin component and a thermoplastic resin component having a glass transition temperature of 25° C. or higher and not higher than 200° C.4. The film for back surface of flip-chip semiconductor according to claim 3 , wherein a blending proportion of the thermoplastic resin component having a glass transition temperature of 25° C. or higher and not higher than 200° C. falls within ...

MULTIPLE SEAL RING STRUCTURE

The present disclosure provides a method of fabricating a semiconductor device, the method including providing a substrate having a seal ring region and a circuit region, forming a first seal ring structure over the seal ring region, forming a second seal ring structure over the seal ring region and adjacent to the first seal ring structure, and forming a first passivation layer disposed over the first and second seal ring structures, A semiconductor device fabricated by such a method is also provided. 120-. (canceled)21. A method of fabricating a semiconductor device , the method comprising:providing a substrate having a seal ring region and a circuit region;forming a first seal ring structure disposed over the seal ring region;forming a second seal ring structure disposed over the seal ring region and adjacent to the first seal ring structure, wherein the first and second seal ring structures are physically separated and continuously formed around the circuit region and have no contact or pad structure portion;forming a third seal ring structure between the first and second seal ring structures at a corner section, the third seal ring structure having a triangular shape, wherein the third seal ring structure is the only ring structure present between the first and second seal ring structures at the corner section; andforming a first passivation layer disposed over the first, second, and third seal ring structures.22. The method of claim 21 , wherein the first and second seal ring structures are each formed to be a stack of metal layers disposed around the circuit region.23. The method of claim 21 , wherein the first and second seal ring structures are each formed to have a line-shaped metal layer.24. The method of claim 21 , wherein the second seal ring structure is formed to be concentric to the first seal ring structure.25. The method of claim 21 , wherein the first seal ring structure is formed to be adjacent the circuit region and the second seal ring ...

COMPOSITE SUBSTRATE, ELECTRONIC COMPONENT, AND METHOD FOR MANUFACTURING COMPOSITE SUBSTRATE, AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT

Provided are a composite substrate which includes a silicon substrate having improved crystallinity, a method for manufacturing a composite substrate, and a method for manufacturing an electronic component. A composite substrate is formed by bonding a semiconductor substrate onto a support substrate having electric insulating properties. The semiconductor substrate is formed of silicon. The semiconductor substrate includes a plurality of first regions on each of which an element portion which functions as a semiconductor device is formed, and a second region which is positioned between the plurality of first regions. In the semiconductor substrate, an oxidized portion which is composed of silicon oxide is formed on a bottom surface of the second region. 1. A composite substrate , comprising:a support substrate having electric insulating properties; anda silicon substrate disposed on the support substrate, the silicon substrate comprising a plurality of first regions and a second region positioned between the plurality of first regions,an oxidized portion containing silicon oxide as a main component, the oxidized portion being disposed on a main surface of the second region closer to the support substrate side.2. The composite substrate according to claim 1 ,wherein the support substrate is a single crystal containing aluminum oxide as a main component.3. The composite substrate according to claim 1 ,wherein the oxidized portion surrounds circumference of the plurality of first regions.4. The composite substrate according to claim 1 ,wherein the oxidized portion penetrates the silicon substrate in a thickness direction thereof.5. The composite substrate according to claim 1 ,wherein the oxidized portion is exposed from a side surface of the silicon substrate.6. The composite substrate according to claim 1 ,wherein the oxidized portion is positioned inside other surfaces excluding a main surface of the silicon substrate closer to the support substrate side.7. The ...

SYSTEMS, METHODS AND PRODUCTS INCLUDING FEATURES OF LASER IRRADIATION AND/OR CLEAVING OF SILICON WITH OTHER SUBSTRATES OR LAYERS

The present innovations relate to optical/electronic structures, and, more particularly, to methods and products consistent with composite structures for optical/electronic applications, such as solar cells and displays, composed of a silicon-containing material bonded to a substrate and including laser treatment. 1. A method of producing a composite structure composed of a silicon-containing material bonded to a substrate , the method comprising:implanting ions into silicon-containing material to a depth;engaging the silicon-containing piece into contact with the substrate; andirradiating/treating the silicon-containing piece with a laser having a wavelength of between about 350 nm to about 1070 nm.2. The method of wherein the substrate is a borosilicate/borofloat glass or a soda-lime glass.3. The method of further comprising cleaving the silicon-containing material along a surface established at about the depth at which the ions are implanted.4. The method of wherein the irradiation step is performed with a laser having a wavelength between about 500 nm and about 600 nm.5. The method of wherein the irradiation step is performed with a laser having a wavelength of about 515 nm or about 532 nm.6. The method of wherein the substrate includes a base portion composed of glass claim 1 , plastic or metal.7. The method of wherein the substrate comprises one or more layers including a film of SiN/SiO2/Si coated on a base portion.8. The method of further comprising of a step of annealing at a temperature between about 200° C. to about 450° C.9. The method of further comprising of a step of annealing at a temperature between about 200° C. to about 450° C. for a period of less than about 45 minutes.10. The method of wherein the step of annealing is performed after a step of laser irradiation/treatment.11. (canceled)12. A method of producing a composite solar cell structure composed of a silicon-containing material bonded to a glass substrate claim 8 , the method comprising: ...

LASER SCRIBING SYSTEMS, APPARATUS, AND METHODS

Scribing apparatus are disclosed. In one aspect, a dual-stage scribing apparatus has a first stage adapted to receive a first substrate, a second stage adapted to receive a second substrate, and one or more lasers adapted to emit a laser beam towards the first stage and the second stage and adapted to scribe the substrates. Scribing can be undertaken on the first stage while an orientation process may take place on the other. In another aspect, as dual-laser scribing apparatus is disclosed. Electronic device processing systems and methods including scribing apparatus are described, as are numerous other aspects. 1. A scribing apparatus , comprising:a first stage adapted to receive a first substrate,a second stage adapted to receive a second substrate, andone or more lasers adapted to emit a laser beam towards the first stage and the second stage and adapted to scribe the substrates.2. The scribing apparatus of claim 1 , wherein the first stage and the second state are arranged in a side-by-side orientation.3. The scribing apparatus of claim 1 , wherein the first stage comprises a rotary stage.4. The scribing apparatus of claim 1 , wherein the first and second stages comprise rotary stages.5. The scribing apparatus of claim 1 , wherein the first and second stages comprise side-by-side R-Theta stages configured to rotate the first and second substrates in Theta and translate the first and second substrates in R.6. The scribing apparatus of claim 1 , wherein the one or more lasers comprise two lasers whose laser beams are combined to form a scribing laser beam.7. The scribing apparatus of claim 1 , wherein the two lasers utilize free space optics.8. The scribing apparatus of claim 1 , wherein the scribing apparatus is configured to have a first operational configuration where the first substrate on the first stage is located to undergo an orientation process while the second substrate on the second stage is located to undergo a laser scribing process.9. The scribing ...

PRESSURE-SENSITIVE ADHESIVE SHEET FOR DICING AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING PRESSURE-SENSITIVE ADHESIVE SHEET FOR DICING

An object of the present invention is to provide a pressure-sensitive adhesive sheet for dicing that is capable of preventing scratching of an adsorption stage when laser-scribing a semiconductor wafer. Provided is a pressure-sensitive adhesive sheet for dicing having a base and a pressure-sensitive adhesive layer provided on the base, in which 0.02 to 5 parts by weight of an ultraviolet absorber is contained in the pressure-sensitive adhesive layer with respect to 100 parts by weight of resin solid content, and in which the light transmittance at a wavelength of 355 nm of the pressure-sensitive adhesive sheet for dicing is 30% to 80%. 1. A pressure-sensitive adhesive sheet for dicing having a base and a pressure-sensitive adhesive layer provided on the base , wherein0.02 to 5 parts by weight of an ultraviolet absorber is contained in the pressure-sensitive adhesive layer with respect to 100 parts by weight of resin solid content, andthe light transmittance at a wavelength of 355 nm of the pressure-sensitive adhesive sheet for dicing is 30% to 80%.2. The pressure-sensitive adhesive sheet for dicing according to claim 1 , wherein the light transmittance at a wavelength of 355 nm of the base is 70% to 100%.3. The pressure-sensitive adhesive sheet for dicing according to claim 1 , wherein the base is multi-layered.4. The pressure-sensitive adhesive sheet for dicing according to claim 1 , wherein the specific heat of the base is 1.0 J/gK to 3.0 J/gK.5. The pressure-sensitive adhesive sheet for dicing according to claim 1 , wherein the melting point of the base is 90° C. or more.6. A method of manufacturing a semiconductor device comprising:{'claim-ref': [{'@idref': 'CLM-00001', 'claims 1'}, {'@idref': 'CLM-00005', '5'}], 'a step of applying the pressure-sensitive adhesive sheet for dicing according to any one of to to a back side of a semiconductor wafer in which a low dielectric material layer is formed on a front side; and'}a laser scribing step of irradiating the ...

PROCESS FOR MINIMIZING CHIPPING WHEN SEPARATING MEMS DIES ON A WAFER

A method for separating a plurality of dies on a Micro-Electro-Mechanical System (MEMS) wafer comprising scribing a notch on a first side of the wafer between at least two of the plurality of dies on a first surface and depositing a metal on the first surface of the plurality of dies. The method further comprises scribing a second side of the wafer between at least two of the plurality of dies from a second surface thereof through the notch. The first side and second side are substantially parallel and opposite each other and the first surface and the second surface are substantially parallel and opposite each other. In a process in accordance with the present invention, a method to minimize chipping of the bonding portion of a MEMs device during sawing of the wafer is provided, which minimally affects the process steps associated with separating the die on a wafer. 1. A method for separating a plurality of dies on a Micro-Electro-Mechanical System (MEMS) wafer , comprising:scribing a notch on a first side of the wafer between at least two of the plurality of dies on a first surface;depositing a metal on the first surface of the plurality of dies;scribing a second side of the wafer between at least two of the plurality of dies from a second surface thereof through the notch; wherein the first side and second side are substantially parallel and opposite each other and the first surface and the second surface are substantially parallel and opposite each other.2. The method of claim 1 , wherein a saw that is utilized for scribing the notch is wider than the saw utilized for scribing the second side of the wafer to provide an undercut ledge on each of the die.3. The method of wherein the first side comprises a back side of the wafer and the second side comprises the front side of the wafer.4. The method of wherein the first surface comprises a bottom surface and the second surface comprises a top surface.5. The method of wherein the metal comprises Ti/Pt/Au.6. A method ...

Method and Machine for Producing a Semiconductor, of the Photovoltaic or Similar Electronic Component Type

The invention relates to a method for producing a semiconductor, of the photovoltaic cell type, or similar electronic components. According to the invention, at least one silicon wafer is cut from the cross-section of a silicon rod and, after doping, a substrate is assembled on either side of the silicon wafer and the latter is cut into two parts through the thickness of the silicon, so as to form two semiconductor units each comprising a substrate and a thin silicon film. 1. A method for manufacturing semiconducting units , comprising:providing a silicon bar;cutting out at least one silicon wafer in the cross section of said silicon bar;assembling a substrate on each side of said silicon wafer; andcutting in the thickness in the middle of said silicon wafer, in order to form two semiconducting units each including a substrate and a thin silicon layer.2. The method according to claim 1 , wherein said silicon bar has a circular or square section with a width of about 300 mm claim 1 , and a length of about 500 mm to 1 claim 1 ,300 mm.3. The method according to claim 1 , wherein cutting out at least one silicon wafer is achieved by sawing with a steel wire with an abrasive lubricant.4. The method according to claim 1 , wherein cutting in the middle of the silicon wafer is achieved by sawing with a steel wire with abrasive lubricant.5. The method according to claim 3 , wherein said steel wire has a diameter comprised between 80 μm and 130 μm.6. The method according to claim 1 , wherein said at least one silicon wafer has a thickness between 180 and 200 μm claim 1 , and the thin silicon layer of each semiconducting unit has a thickness between 40 μm and 80 μm.7. The method according to claim 1 , wherein said substrate is a metal or insulating substrate with a thickness between 100 μm and 300 μm.8. The method according to claim 7 , wherein the substrate is in an iron and nickel alloy with an expansion coefficient close to that of silicon.9. The method according to claim 7 ...

CHIP PACKAGE AND FABRICATION METHOD THEREOF

The invention is related to a chip package including: a semiconductor substrate having at least one bonding pad region and at least one device region, wherein the semiconductor substrate includes a plurality of heavily doped regions in the bonding pad region, and two of the heavily doped regions are insulatively isolated; a plurality of conductive pad structures disposed over the bonding pad region; at least one opening disposed at a sidewall of the chip package to expose the heavily doped regions; and a conductive pattern disposed in the opening to electrically contact with the heavily doped region. 1. A method for fabricating a chip package , comprising:providing a semiconductor wafer defined with a plurality of scribe line regions, bonding pad regions, and device regions;performing an ion implanting process to form a plurality of heavily doped regions in the bonding pad regions;forming a plurality of conductive pad structures over the bonding pad regions, wherein the conductive pad structures correspond to the heavily doped regions;forming a plurality of openings along the scribe line regions to expose the heavily doped regions; andforming a conductive pattern in the openings to electrically contact with the heavily doped regions.2. The method for fabricating the chip package as claimed in claim 1 , further comprising dicing the semiconductor wafer along the scribe line regions to divide a plurality of chip packages comprising a semiconductor substrate.3. The method for fabricating the chip package as claimed in claim 1 , further comprising forming an insulating wall between two of the heavily doping regions for isolation therebetween.4. The method for fabricating the chip package as claimed in claim 3 , wherein the semiconductor wafer further comprises an insulating layer claim 3 , and the insulting wall extends to the insulating layer.5. The method for fabricating the chip package as claimed in claim 4 , wherein the insulating layer extends to a bottom portion ...

SEMICONDUCTOR CHIPS HAVING GUARD RINGS AND METHODS OF FABRICATING THE SAME

Provided is a semiconductor chip. The semiconductor chip includes a semiconductor substrate including a main chip region and a scribe lane region surrounding the main chip region. An insulating layer is disposed over the semiconductor substrate. A guard ring is disposed in the insulating layer in the scribe lane region. The guard ring surrounds at least a portion of the main chip region. The guard ring has a brittleness greater than a brittleness of the insulating layer. 1. A method of fabricating a semiconductor chip , comprising:forming an insulating layer over a semiconductor substrate including a main chip region and a scribe lane region surrounding the main chip region; andforming an insulating guard ring in the insulating layer in the scribe lane region, the insulating guard ring surrounding at least a portion of the main chip region,wherein the insulating guard ring vertically penetrates the insulating layer to contact the semiconductor substrate and wherein the insulating guard ring is formed of a material layer having a brittleness greater than a brittleness of the insulating layer.2. The method of claim 1 , wherein the insulating guard ring is formed of a porous insulating layer.3. The method of claim 2 , wherein the porous insulating layer comprises at least one of carbon (C) claim 2 , hydrogen (H) claim 2 , nitrogen (N) claim 2 , and fluorine (F).4. The method of claim 3 , wherein the porous insulating layer is one of a Fluorosilieate Glass (FSG) layer claim 3 , a SiOC layer claim 3 , a SiOCH layer claim 3 , and a SiN layer.5. The method of claim 1 , wherein the forming of the guard ring comprises:patterning the insulating layer to form a groove exposing the semiconductor substrate in the scribe lane region;forming a porous insulating layer filling the groove and covering the insulating layer; andplanarizing the porous insulating layer to expose an upper surface of the insulating layer.6. The method of claim 5 , wherein the porous insulating layer is ...

Dicing Sheet and a Production Method of a Semiconductor Chip

A dicing sheet includes a base, an intermediate layer on one face of the base, and an pressure sensitive adhesive layer provided on the intermediate layer and having the thickness of 8 to 30 μm. The pressure sensitive adhesive layer includes a compound having an energy ray curable double bond in a molecule, and a storage elasticity G′ at 23° C. of the pressure sensitive adhesive layer before curing is larger than 4 times of a storage elasticity at 23° C. of the intermediate layer. When the dicing sheet is laminated via the adhesive sheet on a wafer formed with a cylinder shape electrodes having a height of 15 μm and a diameter of 15 μm at a pitch of 40 μm having 3 rows 3 columns in equal spacing, at a center of the electrode of the cylinder shape electrodes formed in 3 rows 3 columns, the pressure sensitive adhesive layer does not contact at a part of a height of 7.5 μm or less of the electrode. 1. A dicing sheet comprising a base , an intermediate layer on one face of said base , and an pressure sensitive adhesive layer provided on the intermediate layer and having the thickness of 8 to 30 μm , whereinthe pressure sensitive adhesive layer comprises a compound having an energy ray curable double bond in a molecule, and a storage elasticity G′ at 23° C. of the pressure sensitive adhesive layer before curing is larger than 4 times of a storage elasticity at 23° C. of the intermediate layer, andwhen the dicing sheet is laminated via the adhesive sheet on a wafer formed with a cylinder shape electrodes having a height of 15 μm and a diameter of 15 μm at a pitch of 40 μm having 3 rows 3 columns in equal spacing, at a center of the electrode of the cylinder shape electrodes formed in 3 rows 3 columns, the pressure sensitive adhesive layer does not contact at a part of a height of 7.5 μm or less of the electrode.2. The dicing sheet as set forth in wherein said compound having the energy ray curable double bond in the molecule includes an energy ray curable adhesive polymer ...

UNDER-FILL MATERIAL AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

The present invention provides an under-fill material with which a semiconductor device having a high connection reliability can be provided while securing a usable material by reducing a difference in thermal-responsive behavior between a semiconductor element and an adherend, and a method for producing a semiconductor device using the under-fill material. In the under-fill material of the present invention, a storage elastic modulus E′ [MPa] and a thermal expansion coefficient α [ppm/K] after carrying out a heat-curing treatment at 175° C. for an hour satisfy the following formula (1) at 25° C.: 1. An under-fill material , wherein a storage elastic modulus E′ [MPa] and a thermal expansion coefficient α [ppm/K] after carrying out a heat-curing treatment at 175° C. for an hour satisfy the following formula (1) at 25° C.:{'br': None, 'i': 'E′×α<', '250000 [Pa/K]\u2003\u2003(1).'}2. The under-fill material according to claim 1 , wherein the storage elastic modulus E′ is 100 to 10000 [MPa] and the thermal expansion coefficient α is 10 to 200 [ppm/K].3. The under-fill material according to claim 1 , wherein the storage elastic modulus E′ [MPa] and the thermal expansion coefficient α [ppm/K] satisfy the following formula (2):{'br': None, 'i': 'E′×α<', '10000<250000 [Pa/K]\u2003\u2003(2).'}4. The under-fill material according to claim 1 , wherein the under-fill material contains a thermoplastic resin and a thermosetting resin.5. The under-fill material according to claim 4 , wherein the thermoplastic resin contains an acrylic resin.6. The under-fill material according to claim 4 , wherein the thermosetting resin contains an epoxy resin and a phenol resin.7. A sealing sheet comprising:a back surface grinding tape; and{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the under-fill material according to ,'}wherein the under-fill material is laminated on the back surface grinding tape.8. A method for producing a semiconductor device comprising an adherend claim 4 , a ...

METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

There is provided a method for producing a semiconductor device, which is capable of suppressing voids during mounting of a semiconductor element to produce a semiconductor device with high reliability. A method for producing a semiconductor device of the present invention includes the steps of: providing a sealing sheet having a base material and an under-fill material laminated on the base material; bonding the sealing sheet to a surface of a semiconductor wafer on which a connection member is formed; dicing the semiconductor wafer to form a semiconductor element with the under-fill material; retaining the semiconductor element with the under-fill material at 100 to 200° C. for 1 second or more; and electrically connecting the semiconductor element and the adherend through the connection member while filling a space between the adherend and the semiconductor element with the under-fill material. 1. A method for producing a semiconductor device having an adherend , a semiconductor element electrically connected to the adherend , and an under-fill material for filling a space between the adherend and the semiconductor element , wherein the method comprises:a providing step of providing a sealing sheet having a base material and an under-fill material laminated on the base material;a bonding step of bonding the sealing sheet to a surface of a semiconductor wafer on which a connection member is formed;a dicing step of dicing the semiconductor wafer to form a semiconductor element with the under-fill material;a retention step of retaining the semiconductor element with the under-fill material at 100 to 200° C. for 1 second or more; anda connection step of electrically connecting the semiconductor element and the adherend through the connection member while filling a space between the adherend and the semiconductor element using the under-fill material.2. The method for producing a semiconductor device according to claim 1 , wherein the minimum melt viscosity of the ...

METHOD FOR THE PREPARATION OF A MULTI-LAYERED CRYSTALLINE STRUCTURE

This invention generally relates to a process for making a multi-layered crystalline structure. The process includes implanting ions into a donor structure, bonding the implanted donor structure to a second structure to form a bonded structure, cleaving the bonded structure, and removing any residual portion of the donor structure from the finished multi-layered crystalline structure. 1. A method for the preparation of a multi-layered crystalline structure , the method comprising:{'b': '1', 'implanting ions selected from the group consisting of hydrogen, helium and combinations thereof into a donor structure, wherein the donor structure comprises a central axis, a device layer having an implantation surface and device surface which are generally perpendicular to the central axis and an average thickness, t, extending in the axial direction from the implantation surface to the device surface of the device layer, a handle layer, and an intervening layer which is positioned along the central axis of the donor structure between the device surface and the handle layer, wherein the ions are implanted into the donor structure through the implantation surface to an implantation depth D which is greater than the thickness, t, of the device layer to form in the implanted donor structure a damage layer which is generally perpendicular to the axis and located in the intervening layer and/or in the handle layer;'}bonding the implanted donor structure to a second structure to form a bonded structure;cleaving the donor structure along the damaged layer to form a multi-layered crystalline structure comprising the second structure, the device layer and residual material, the residual material comprising at least a portion of the intervening layer and optionally a portion of the handle layer; and, removing the residual material from the multi-layered crystalline structure.2. The method of wherein at least about 1×10ions/cmare3. The method of wherein at least about 1×10ions/cmare ...

DICING/DIE BONDING INTEGRAL FILM, DICING/DIE BONDING INTEGRAL FILM MANUFACTURING METHOD, AND SEMICONDUCTOR CHIP MANUFACTURING METHOD

A dicing/die bonding integral film of the present invention includes a base film, a pressure-sensitive adhesive layer which is formed on the base film and to which a wafer ring for blade dicing is bonded, and a bonding layer formed on the adhesive layer and having a central portion to which a semiconductor wafer to be diced is bonded, wherein a planar shape of the bonding layer is circular, an area of the bonding layer is greater than an area of the semiconductor wafer and smaller than an area of each of the base film and the adhesive layer, and a diameter of the bonding layer is greater than a diameter of the semiconductor wafer and less than an inner diameter of the wafer ring, and a difference in diameter between the bonding layer and the semiconductor wafer is greater than 20 mm and less than 35 mm, 1. A dicing/die bonding integral film , comprising:a base film;a pressure-sensitive adhesive layer which is formed on the base film and to which a wafer ring to be used in blade dicing is bonded; anda bonding layer formed on the adhesive layer and having a central portion to which a semiconductor wafer to be subjected to blade dicing is bonded,wherein a planar shape of the bonding layer is circular,an area of the bonding layer is greater than an area of the semiconductor wafer and smaller than an area of each of the base film and the adhesive layer, anda diameter of the bonding layer is greater than a diameter of the semiconductor wafer and less than an inner diameter of the wafer ring, and a difference in diameter between the bonding layer and the semiconductor wafer is greater than 20 mm and less than 35 mm.2. A dicing/die bonding integral film manufacturing method , comprising:a dicing film preparation step of preparing a dicing film in which an adhesive layer is formed on a base film;a die bonding film preparation step of preparing a die bonding film in which a bonding layer is formed on a peelable base;a bonding layer cutting step of cutting the bonding layer ...

Structure for Reducing Integrated Circuit Corner Peeling

A crack prevention structure that reduces integrated circuit corner peeling and reduces cracking is disclosed. The crack prevention structure comprises a semiconductor substrate; a first plurality of dielectric layers of a first material disposed over the semiconductor substrate; a second plurality of dielectric layers of a second material different than the first material, disposed on the first plurality of dielectric layers, wherein the first plurality of dielectric layers and the second plurality of dielectric layers meet at an interface; and a plurality of metal structures and a plurality of via structures formed through the interface of the first plurality of dielectric layers and the second plurality of dielectric layers. 1. A device comprising: a first plurality of dielectric layers of a first material disposed over the semiconductor substrate;', 'a second plurality of dielectric layers of a second material different than the first material disposed over the first plurality of dielectric layers, wherein the first plurality of dielectric layers and the second plurality of dielectric layers meet at an interface;', 'a plurality of metal structures and a plurality of via structures formed through the interface of the first plurality of dielectric layers and the second plurality of dielectric layers; and', 'a bond/bump pad structure disposed in a passivation layer overlying the first and second plurality of dielectric layers, the bond/bump pad structure being coupled with a topmost metal structure of the plurality of metal structures., 'a plurality of semiconductor dies disposed between scribe lines, wherein the scribe lines include at least one crack prevention structure disposed over a semiconductor substrate, the at least one crack prevention structure comprising2. The device of claim 1 , further comprising a seal ring disposed between one of the semiconductor dies and the at least one crack prevention structure.3. The device of claim 1 , wherein the at least ...

METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT

Provided is a method of manufacturing a semiconductor element having at a cut portion with excellent quality, which minimizes a region on a silicon substrate necessary for cutting, and which prevents cutting water used when cutting by dicing is carried out from entering the semiconductor element. The method of manufacturing a semiconductor element includes: arranging, on the silicon substrate, multiple semiconductor element portions so as to be adjacent to one another; bonding the silicon substrate and a glass substrate together using the resin; and cutting the silicon substrate and the glass substrate, respectively, in a region in which the resin is provided, the cutting the silicon substrate and the glass substrate including: half-cutting the silicon substrate by dicing; cutting the glass substrate by scribing; and dividing the silicon substrate, the glass substrate, and the resin. 1. A method of manufacturing a semiconductor element , a silicon substrate;', 'a semiconductor element portion provided on the silicon substrate; and', 'a sealing member for sealing the semiconductor element portion,', 'the sealing member comprising a glass substrate provided so as to be opposed to a surface of the silicon substrate having the semiconductor element portion provided thereon, and a resin for bonding the silicon substrate and the glass substrate,, 'the semiconductor element comprisingthe method comprising:arranging, on the silicon substrate, multiple semiconductor element portions so as to be adjacent to one another;bonding the silicon substrate and the glass substrate together using the resin; and half-cutting the silicon substrate by dicing;', 'cutting the glass substrate by scribing; and', 'dividing the silicon substrate, the glass substrate, and the resin after the dicing and the scribing are carried out,, 'the cutting the silicon substrate and the glass substrate comprising, 'cutting the silicon substrate and the glass substrate, respectively, in a region in which the ...

Fibre optic laser machining equipment for etching grooves forming incipient cracks

A laser machining equipment for etching grooves in a wall of a mechanical part, or in a connecting rod for a spark ignition engine, includes a fiber optic laser device arranged to supply laser pulses. The fiber optic laser device is controlled so that laser pulses have a peak power of more than 400 W and at least two times greater than maximum mean power of the laser device, and duration of the laser pulses is below or within the nanosecond range of 1 ns to 1000 ns. The fiber optic laser device can be controlled in a quasi continuous wave (QCW) mode, or can be controlled in a Q-switch mode. The selected operating modes increase machining efficiency and produce a groove with an optimum transverse profile, particularly with a small mean radius of curvature at a bottom of the groove which then allows precise subsequent fracturing of the mechanical part with less force.

CHIP PACKAGE AND METHOD FOR FORMING THE SAME

A chip package includes: a substrate having a first and a second surfaces; a device region formed in or disposed on the substrate; a dielectric layer disposed on the first surface; at least one conducting pad disposed in the dielectric layer and electrically connected to the device region; a planar layer disposed on the dielectric layer, wherein a vertical distance between upper surfaces of the planar layer and the conducting pad is larger than about 2 μm; a transparent substrate disposed on the first surface; a first spacer layer disposed between the transparent substrate and the planar layer; and a second spacer layer disposed between the transparent substrate and the substrate and extending into an opening of the dielectric layer to contact with the conducting pad, wherein there is substantially no gap between the second spacer layer and the conducting pad. 1. A chip package , comprising:a substrate having a first surface and a second surface;a device region formed in the substrate or disposed on the substrate;a dielectric layer disposed on the first surface of the substrate;at least one conducting pad disposed in the dielectric layer and electrically connected to the device region;a planar layer disposed on the dielectric layer, wherein a vertical distance between an upper surface of the planar layer and an upper surface of the conducting pad is larger than about 2 μm;a transparent substrate disposed on the first surface of the substrate;a first spacer layer disposed between the transparent substrate and the planar layer; anda second spacer layer disposed between the transparent substrate and the substrate and extending into an opening of the dielectric layer to contact with the conducting pad, wherein there is substantially no gap between the second spacer layer and the conducting pad.2. The chip package as claimed in claim 1 , wherein the first spacer layer directly contacts with the planar layer and does not contact with the dielectric layer or the substrate. ...

METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

There is provided a method for producing a semiconductor device, capable of suppressing generation of voids at an interface between a semiconductor element and an under-fill sheet to produce a semiconductor device with high reliability. The method includes providing a sealing sheet having a support and an under-fill material laminated on the support; thermally pressure-bonding a circuit surface of a semiconductor wafer, on which a connection member is formed, and the under-fill material of the sealing sheet under conditions of a reduced-pressure atmosphere of 10000 Pa or less, a bonding pressure of 0.2 MPa or more and a heat pressure-bonding temperature of 40° C. or higher; dicing the semiconductor wafer to form a semiconductor element with the under-fill material; and electrically connecting the semiconductor element and the adherend through the connection member while filling a space between the adherend and the semiconductor element using the under-fill material. 1. A method for producing a semiconductor device having an adherend , a semiconductor element electrically connected to the adherend , and an under-fill material for filling a space between the adherend and the semiconductor element , wherein the method comprises:a providing step of providing a sealing sheet having a support and an under-fill material laminated on the support;a heat pressure-bonding step of thermally pressure-bonding a circuit surface of a semiconductor wafer, on which a connection member is formed, and the under-fill material of the sealing sheet under conditions of a reduced-pressure atmosphere of 10000 Pa or less, a bonding pressure of 0.2 MPa or more and a heat pressure-bonding temperature of 40° C. or higher;a dicing step of dicing the semiconductor wafer to form a semiconductor element with the under-fill material; anda connection step of electrically connecting the semiconductor element and the adherend through the connection member while filling the space between the adherend and ...

SEMICONDUCTOR PACKAGE HAVING ELECTRICAL CONNECTING STRUCTURES AND FABRICATION METHOD THEREOF

A semiconductor package having electrical connecting structures includes: a conductive layer having a die pad and traces surrounding the die pad; a chip; bonding wires; an encapsulant with a plurality of cavities having a depth greater than the thickness of the die pad and traces for embedding the die pad and the traces therein, and the cavities exposing the die pad and the traces; a solder mask layer formed in the cavities and having a plurality of openings for exposing the trace ends and a portion of the die pad; and solder balls formed in the openings and electrically connected to the trace ends. Engaging the solder mask layer with the encapsulant enhances adhesion strength of the solder mask layer so as to prolong the moisture permeation path and enhance package reliability. 19-. (canceled)10. A fabrication method of a semiconductor package having electrical connecting structures , comprising the steps of:providing a metal board with a plurality of substrate units;forming a patterned metal layer on the substrate units;forming a conductive layer on the metal layer, wherein the conductive layer has a die pad and a plurality of traces disposed at a periphery of the die pad, the traces each comprising a trace body, a finger pad formed at an end of the trace body and positioned proximate to the die pad, and a trace end formed at another end of the trace body and positioned distal to the die pad;mounting a chip on the die pad and electrically connecting the chip to the finger pads through bonding wires;forming an encapsulant to cover the chip, the bonding wires and the conductive layer;removing the metal board and the metal layer so as to expose the conductive layer;forming a solder mask layer on bottom surfaces of the conductive layer and the encapsulant to cover the conductive layer and the encapsulant, followed by forming a plurality of openings in the solder mask layer to expose the trace ends, respectively;forming a plurality of solder balls in the openings of ...

Semiconductor device manufacturing method

In a semiconductor device manufacturing method, an insulating layer is formed on a front surface of a semiconductor substrate. Trenches are formed in the substrate by using the insulating layer as a mask so that a first portion of the insulating layer is located on the front surface between the trenches and that a second portion of the insulating layer is located on the front surface at a position other than between the trenches. The entire first portion is removed, and the second portion around an opening of each trench is removed. The trenches are filled with an epitaxial layer by epitaxially growing the epitaxial layer over the front surface side. The front surface side is polished by using the remaining second portion as a polishing stopper.

METHOD FOR MANUFACTURING ELECTRONIC COMPONENT

Provided is a method for manufacturing electronic component improved in chip-holding efficiency, pickup efficiency and contamination resistance in a well-balanced manner, the method comprising a semi-cured adhesive layer-forming step of forming a semi-cured adhesive layer on the rear face of a wafer, a fixing step of fixing the semi-cured adhesive layer of the wafer on a ring frame with a cohesive sheet, a dicing step of dicing the wafer into semiconductor chips, a UV-irradiating step of irradiating ultraviolet ray, and a pick-up step of picking up the chips and semi-cured adhesive layers from the cohesive layer, wherein the cohesive sheet has a cohesive layer of a cohesive agent having a particular composition formed on one face of its base film. 1. A method for manufacturing an electronic component , comprising:(1) a semi-cured adhesive layer-forming step of forming a semi-cured adhesive layer by coating a pasty adhesive on the rear face of a wafer and curing the pasty adhesive partially by UV irradiation or heating into the sheet shape;(2) a fixing step of fixing the semi-cured adhesive layer of the wafer on a ring frame by bonding them to a cohesive sheet;(3) a dicing step of dicing the wafer into semiconductor chips with a dicing blade;(4) a UV-irradiating step of irradiating ultraviolet ray; and(5) a pick-up step of picking up the chips and semi-cured adhesive layers from the cohesive layer, wherein:the cohesive sheet has a base film and a cohesive layer formed on one face of the base film;the cohesive constituting the cohesive layer contains 100 parts by mass of a (meth)acrylate ester copolymer (A), 5 to 200 parts by mass of a ultraviolet polymerizable compound (B), 0.5 to 20 parts by mass of a multifunctional isocyanate curing agent (C), 0.1 to 20 parts by mass of a photopolymerization initiator (D), and 0.1 to 20 parts by mass of a silicone polymer (E);the (meth)acrylate ester copolymer (A) is a copolymer of (meth)acrylate ester monomers or a copolymer of a ...

WAFER DICING METHOD AND METHOD OF MANUFACTURING LIGHT EMITTING DEVICE CHIPS EMPLOYING THE SAME

A wafer dicing method includes forming a semiconductor device on a first surface of a wafer; first-dicing a portion of the wafer and the semiconductor device; and splitting the wafer and the semiconductor device into a plurality of semiconductor device chips by second-dicing the wafer that has been first-diced. 1. A wafer dicing method comprising:forming a semiconductor device on a first surface of a wafer;first-dicing a first portion of the wafer and the semiconductor device to produce a plurality of semiconductor devices; andsplitting the wafer and the plurality of semiconductor devices into a plurality of semiconductor device chips by second-dicing a second portion of the wafer that has been first-diced.2. The wafer dicing method of claim 1 , wherein the first-dicing comprises forming claim 1 , in the wafer claim 1 , grooves having a depth corresponding to from 30% to 70% of a thickness of the wafer.3. The wafer dicing method of claim 2 , wherein the grooves comprise:a plurality of first grooves formed on the wafer in parallel to a first direction; anda plurality of second grooves formed on the wafer in parallel to a second direction that is perpendicular to the first direction.4. The wafer dicing method of claim 1 , wherein the first-dicing is performed by using a blade claim 1 , a laser claim 1 , or plasma etching.5. The wafer dicing method of claim 1 , wherein the second-dicing comprises breaking the second portion of the wafer that has been first-diced by applying a physical force to a second surface of the wafer which is a surface opposite to the first surface.6. The wafer dicing method of claim 5 , wherein the physical force is applied to the wafer via a cutter having an unsharpened edge.7. The wafer dicing method of claim 1 , further comprising attaching a dicing tape onto a second surface of the wafer which is a surface opposite to the first surface.8. The wafer dicing method of claim 1 , further comprising performing additional processes to the plurality ...

METHOD FOR MANUFACTURING SEMICONDUCTOR CHIPS FROM A SEMICONDUCTOR WAFER

A method for manufacturing semiconductor chips from a semiconductor wafer, including the steps of: fastening, on a first support frame, a second support frame having outer dimensions smaller than the outer dimensions of the first frame and greater than the inner dimensions of the first frame; arranging the wafer on a surface of a film stretched on the second frame; carrying out wafer processing operations by using equipment capable of receiving the first frame; separating the second frame from the first frame and removing the first frame; and carrying out wafer processing operations by using equipment capable of receiving the second frame. 1. A method for processing a semiconductor wafer , comprising:fastening a first frame to a second frame;disposing a wafer on a film affixed to the second frame;processing the wafer in first processing equipment configured to receive the first frame;removing the first frame from the second frame; andprocessing the wafer in second processing equipment configured to receive the second frame.2. A method for processing a semiconductor wafer as defined in claim 1 , wherein the second frame has outer dimensions less than outer dimensions of the first frame and greater than inner dimensions of the first frame.3. A method for processing a semiconductor wafer as defined in claim 1 , wherein the first frame includes at least one fastener element configured to fasten the second frame to the first frame.4. A method for processing a semiconductor wafer as defined in claim 3 , wherein the at least one fastener element comprises fastener elements on four sides of the first frame.5. A method for processing a semiconductor wafer as defined in claim 3 , wherein the at least one fastener element comprises guide rails on three sides of the first frame and a removable lug on a fourth side of the first frame.6. A method for processing a semiconductor wafer as defined in claim 5 , wherein fastening the first frame to the second frame comprises removing ...

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device includes a metal substrate including a metal base plate, an insulating sheet located on the metal base plate, and a wiring pattern located on the insulating sheet, and a semiconductor element located on the metal substrate. The semiconductor element is sealed with a molding resin. The molding resin extends to side surfaces of the metal substrate. On the side surfaces of the metal substrate, the insulating sheet and the wiring pattern are not exposed from the molding resin, whereas the metal base plate includes a projecting portion exposed from the molding resin. 1. A semiconductor device , comprising:a substrate including a metal base plate, an insulating sheet located on said metal base plate, and a wiring pattern located on said insulating sheet;a semiconductor element located on said substrate; anda molding resin forming a housing for sealing said semiconductor element, whereinsaid molding resin extends to side surfaces of said substrate,said insulating sheet and said wiring pattern are not exposed from said molding resin on the side surfaces of said substrate, andsaid metal base plate includes a projecting portion exposed from said molding resin on the side surfaces of said substrate.2. The semiconductor device according to claim 1 , further comprising:a conductive member passing through said molding resin and providing electrical conduction between said wiring pattern and the outside; anda sleeve board located on said molding resin, including an opening for exposing said conductive member, and formed of a thermoplastic resin.3. The semiconductor device according to claim 1 , wherein said metal base plate is formed of a material containing copper or aluminum.4. The semiconductor device according to claim 1 , wherein said semiconductor element includes a wide bandgap semiconductor.5. A method of manufacturing a semiconductor device claim 1 , comprising the steps of:(a) preparing a substrate including a metal base plate, an insulating sheet ...

WAFER PROCESSING METHOD

A wafer processing method of dividing a wafer along streets. The wafer processing method includes a protective tape attaching step of attaching a protective tape to the front side of the wafer, a modified layer forming step of holding the wafer through the protective tape on a chuck table of a laser processing apparatus under suction and next applying a laser beam having a transmission wavelength to the wafer from the back side of the wafer along the streets, thereby forming a modified layer inside the wafer along each street, and a wafer dividing step of canceling suction holding of the wafer by the chuck table and next applying an air pressure to the wafer now placed on the holding surface in the condition where horizontal movement of the wafer is limited, thereby dividing the wafer along each street where the modified layer is formed, thus obtaining individual devices. 1. A wafer processing method of dividing a wafer along a plurality of crossing streets formed on a front side of said wafer to thereby partition a plurality of regions where a plurality of devices are respectively formed , said wafer processing method comprising:a protective tape attaching step of attaching a protective tape to the front side of said wafer;a laser processing apparatus preparing step of preparing a laser processing apparatus including a chuck table having a holding surface for holding said wafer, said holding surface being adapted to selectively receive a vacuum and an air pressure;a modified layer forming step of placing said protective tape attached to said wafer on said holding surface of said chuck table of said laser processing apparatus, next applying the vacuum to said holding surface to thereby hold said wafer through said protective tape on said holding surface under suction, and next applying a laser beam having a transmission wavelength to said wafer from a back side of said wafer along said streets, thereby forming a modified layer inside said wafer along each street at ...

METHOD FOR MANUFACTURING ELECTRONIC PARTS

A method for manufacturing electronic parts, which is characteristic in that it permits reduction of contamination to the semi-cured adhesive layer formed on semiconductor wafer and the cohesive sheet used therein is superior in adhesiveness for example to the lead frame, the method comprising a semi-cured adhesive layer-forming step of forming a semi-cured adhesive layer by coating a pasty adhesive entirely over the rear face of a wafer and curing the pasty adhesive partially by radiation-ray irradiation or heating into the sheet shape, a fixing step of fixing the semi-cured adhesive layer formed on a wafer and a ring frame by bonding them to the cohesive layer of a cohesive sheet, a dicing step of dicing the wafer together with the semi-cured adhesive layer with a dicing blade into semiconductor chips, and a pick-up step of picking up the chips carrying the semi-cured adhesive layer from the cohesive layer of the cohesive sheet after radiation-ray irradiation, wherein the photopolymerization initiator in the cohesive layer of the cohesive sheet has a particular property. 2. The method for manufacturing electronic parts according to claim 1 , wherein the photopolymerization initiator is ethanone claim 1 , 1-[9-ethyl-6-(2-methylbenzoyl)-9H-carbazol-3-yl]- claim 1 , 1-(O-acetyloxime) claim 1 , 2 claim 1 ,4 claim 1 ,6-trimethylbenzoyl-diphenyl-phosphine oxide claim 1 , or 2-hydroxy-1-{4-[4-(2-hydroxy-2-methyl-propionyl)-benzyl]-phenyl}-2-methyl-propan-1-one.3. The method for manufacturing electronic parts according to claim 1 , wherein the cohesive contains a (meth)acrylate ester polymer in an amount of 100 parts by mass claim 1 , an ultraviolet polymerizable compound in an amount of 5 parts or more by mass and 200 parts or less by mass claim 1 , a multifunctional isocyanate curing agent in an amount of 0.5 part or more by mass and 20 parts or less by mass and a photopolymerization initiator in an amount of 0.1 part or more by mass and 20 parts or less by mass.4. The ...

SEMICONDUCTOR STACKED PACKAGE AND METHOD OF FABRICATING THE SAME

A method of fabricating a semiconductor stacked package is provided. A singulation process is performed on a wafer and a substrate, on which the wafer is stacked. A portion of the wafer on a cutting region is removed, to form a stress concentrated region on an edge of a chip of the wafer. The wafer and the substrate are then cut, and a stress is forced to be concentrated on the edge of the chip of the wafer. As a result, the edge of the chip is warpaged. Therefore, the stress is prevented from extending to the inside of the chip. A semiconductor stacked package is also provided. 1. A semiconductor stacked package package , comprising:a substrate; anda chip having a first surface attached onto the substrate, a second surface opposing the first surface, and a trace structure formed on the first surface, wherein the trace structure is formed with a warpage portion at a position that extends beyond an edge of the chip.2. The semiconductor stacked package package of claim 1 , wherein a stress applied onto the chip is subject to being concentrated on the warpage portion.3. The semiconductor stacked package package of claim 1 , further comprising a block layer formed between the substrate and the chip.4. The semiconductor stacked package structure of claim 1 , wherein the substrate is made of glass or silicon.5. A method of fabricating a semiconductor stacked package package claim 1 , comprising the steps of:mounting on a substrate a wafer having a first surface mounted on the substrate, a second surface opposing the first surface, a trace structure formed on the first surface and at least a cutting region on the first surface;removing a portion of the wafer to form a cutting groove corresponding to the cutting region for exposing the cutting region from the cutting groove; andcutting the substrate and the wafer along the cutting groove to form on the cutting region a stress concentrated region , so as for the trace structure to be formed with a warpage portion at a ...

DEVICES WITH CRACK STOPS

An apparatus that comprises a device on a substrate and a crack stop in the substrate. Methods of forming a device are also disclosed. The methods may include providing a device, such as a semiconductor device, on a substrate having a first thickness, reducing the thickness of the substrate to a second thickness, and providing a crack stop in the substrate. Reducing the thickness of the substrate may include mounting the substrate to a carrier substrate for support and then removing the carrier substrate. The crack stop may prevent a crack from reaching the device. 1. A method of making an apparatus comprising:providing at least two devices on a substrate wherein the substrate has a first thickness;reducing the thickness of the substrate to a second thickness; andproviding at least one crack stop in the substrate.2. The method of claim 1 , wherein the crack stop is located separate from the at least two devices.3. The method of claim 1 , further comprising singulating the at least two devices.4. The method of claim 1 , further comprising mounting a carrier to the at least two devices on a side opposite the substrate.5. The method of claim 1 , wherein reducing the thickness of the substrate comprises etching claim 1 , polishing claim 1 , or grinding the substrate.6. The method of claim 1 , wherein providing at least one crack stop comprises dry etching or wet etching.7. The method of claim 6 , wherein providing a crack stop in the substrate comprises dry etching or wet etching through a patterned mask.8. The method of claim 3 , wherein singulating the at least two devices comprises removing the carrier substrate and sawing or breaking the substrate.9. The method of claim 1 , wherein providing a crack stop in the substrate is performed at the same time as providing one or more via holes through the substrate and at least one of the devices.10. The method of claim 9 , further comprising forming an ohmic contact to the substrate.11. A method of making an apparatus ...

CHIP PACKAGE AND FABRICATION METHOD THEREOF

A chip package includes a substrate having a pad region, a device region, and a remained scribe region located at a periphery of the substrate; a signal and an EMI ground pads disposed on the pad region; a first and a second openings penetrating into the substrate to expose the signal and the EMI ground pads, respectively; a first and a second conducting layers located in the first and the second openings and electrically connecting the signal and the EMI ground pads, respectively, wherein the first conducting layer and the signal pad are separated from a periphery of the remained scribe region, and wherein a portion of the second conducting layer and/or the EMI ground pad extend(s) to a periphery of the remained scribe region; and a third conducting layer surrounding the periphery of the remained scribe region to electrically connect the second conducting layer and/or the EMI ground pad. 113-. (canceled)14. A method for forming a chip package , comprising:providing a semiconductor substrate having a plurality of die regions and predetermined scribe regions, wherein each of the die regions comprise at least a contact pad region and at least a device region, and the predetermined scribe regions surround the die regions, wherein the predetermined scribe region comprises an actual scribe region, and a remained scribe region is between the predetermined scribe region and the actual scribe region;forming a signal contact pad structure and an EMI ground pad structure on the contact pad region;forming a first opening and a second opening in the die region to expose the signal contact pad structure and the EMI ground pad structure;forming a first conducting layer and a second conducting layer in the first opening and the second opening to electrically contact with the signal contact pad structure and the EMI ground pad structure, respectively, wherein the first conducting layer and the signal contact pad structure are separated from a periphery of the predetermined scribe ...

EPITAXY LEVEL PACKAGING

A method of growth and transfer of epitaxial structures from semiconductor crystalline substrate(s) to an assembly substrate. Using this method, the assembly substrate encloses one or more semiconductor materials and defines a wafer size that is equal to or larger than the semiconductor crystalline substrate for further wafer processing. The process also provides a unique platform for heterogeneous integration of diverse material systems and device technologies onto one single substrate. 1. A method of processing an epitaxial wafer comprising: wherein said plurality of compound semiconductor crystalline wafers and/or portions thereof are derived from wafers having at least one first nominal size including a first diameter;', 'mounting a separate assembly substrate over said assembly pattern, said separate assembly substrate having a second size, including a second diameter which exceeds said first diameter;', 'wherein said separate assembly substrate includes a plurality of through substrate vias extending from a top surface to a bottom surface which contacts said assembly pattern;', 'forming an epitaxial layer in said separate assembly substrate within said plurality of through substrate vias with an epitaxial process., 'arranging a plurality of compound semiconductor crystalline wafers and/or portions thereof into an assembly pattern;'}2. The method of wherein said separate assembly substrate is a solid rigid disc.3. The method of wherein said epitaxial process comprises liquid phase epitaxy (LPE) claim 1 , hydride vapor phase epitaxy (HVPE) claim 1 , metal organic chemical vapor deposition (MOCVD) claim 1 , molecular beam epitaxy (MBE) claim 1 , or other epitaxial growth methods.4. The method of wherein said plurality of compound semiconductor crystalline wafers include at least two separate wafers comprised of two different materials.5. The method of wherein a reactor used for said epitaxial process forms an epitaxial layer on N separate compound semiconductor ...

CUTTING METHOD FOR DEVICE WAFER

A cutting method for cutting a device wafer along a plurality of crossing division lines by using a cutting blade, the division lines being formed on the front side of the device wafer to partition a plurality of regions where a plurality of devices are respectively formed. The cutting method includes a hydrophilic property providing step of applying a plasma to the front side of the device wafer to thereby make hydrophilic the front side of the device wafer, and a cutting step of cutting the device wafer along the division lines by using the cutting blade as supplying a cutting fluid to the device wafer after performing the hydrophilic property providing step. 1a hydrophilic property providing step of applying a plasma to the front side of said device wafer to thereby make hydrophilic the front side of said device wafer; anda cutting step of cutting said device wafer along said division lines by using said cutting blade as supplying a cutting fluid to said device wafer after performing said hydrophilic property providing step.. A cutting method for cutting a device wafer along a plurality of crossing division lines by using a cutting blade, said division lines being formed on the front side of said device wafer to partition a plurality of regions where a plurality of devices are respectively formed, said cutting method comprising: 1. Field of the InventionThe present invention relates to a cutting method for cutting a device wafer having a plurality of devices on the front side thereof by using a cutting blade.2. Description of the Related ArtIn a semiconductor device fabrication process, a plurality of crossing division lines are formed on the front side of a semiconductor wafer to thereby partition a plurality of regions where a plurality of semiconductor devices are respectively formed. The back side of the semiconductor wafer is ground by a grinding apparatus to reduce the thickness of the wafer to a predetermined thickness. Thereafter, the semiconductor wafer ...

Methods for scribing of semiconductor devices with improved sidewall passivation

A method of singulating semi-conductor devices in the close proximity to active structures by controlling interface charge of semiconductor device sidewalls is provided that includes forming a scribe on a surface of a semi-conductor devices, where the scribe is within 5 degrees of a crystal lattice direction of the semi-conductor device, cleaving the semiconductor device along the scribe, where the devices are separated, using a coating process to coat the sidewalls of the cleaved semiconductor device with a passivation material, where the passivation material is disposed to provide a fixed charge density at a semiconductor interface of the sidewalls, and where the fixed charge density interacts with charge carriers in the bulk of the material.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING ELECTRONIC ASSEMBLY

A method of manufacturing a semiconductor device, includes: providing an adhesive layer on a support body; providing a semiconductor element on the adhesive layer; providing a resin layer on the adhesive layer, the semiconductor element being provided on the adhesive layer, and forming a substrate on the adhesive layer, the substrate including the semiconductor element and the resin layer; and removing the substrate from the adhesive layer, wherein an adhesive force of the adhesive layer in a direction in which the substrate is removed is less than an adhesive force of the adhesive layer in a planar direction in which the substrate is formed. 1. A method of manufacturing a semiconductor device , the method comprising:providing an adhesive layer on a support body;providing a semiconductor element on the adhesive layer;providing a resin layer on the adhesive layer, the semiconductor element being provided on the adhesive layer, and forming a substrate on the adhesive layer, the substrate including the semiconductor element and the resin layer; andremoving the substrate from the adhesive layer,wherein an adhesive force of the adhesive layer in a direction in which the substrate is removed is less than an adhesive force of the adhesive layer in a planar direction in which the substrate is formed.2. The method according to claim 1 ,wherein the adhesive layer has an irregularity on a surface thereof, the substrate being formed on the surface.3. The method according to claim 2 ,wherein an example of the irregularity is a crater-shaped irregularity.4. The method according to claim 2 , providing a layer that includes a first resin that exhibits an adhesive property on the support body and a particle of a second resin, the particle of the second resin being contained in the first resin, an etching rate of the second resin being higher than the first resin, and', 'etching a surface portion of the layer and removing the particle of the second resin existing in the surface ...

Film for forming protective layer

The present invention aims to provide a film for forming a protective layer that is capable of preventing cracks in a low dielectric material layer of a semiconductor wafer while suppressing an increase in the number of steps in the manufacture of a semiconductor device. This object is achieved by a film for forming a protective layer on a bumped wafer in which a low dielectric material layer is formed, including a support base, an adhesive layer, and a thermosetting resin layer, laminated in this order, wherein the melt viscosity of the thermosetting resin layer is 1×10 2 Pa·S or more and 2×10 4 Pa·S or less, and the shear modulus of the adhesive layer is 1×10 3 Pa or more and 2×10 6 Pa or less, when the thermosetting resin layer has a temperature in a range of 50 to 120° C.

METHOD FOR CHIP PACKAGE

Provided is a method for chip packaging, including the steps of: providing a semi-packaged wafer which has a cutting trail and a metal bonding pad of the chip; forming on the metal bonding pad a sub-ball metal electrode, using a selective formation process; forming a protective layer on the wafer in a region not including the sub-ball metal electrode, with the protective layer covering the cutting trail; forming a solder ball on the sub-ball metal electrode; dicing the wafer along the cutting trail. The present invention can prevent metal in the cutting trail from being affected during the production of the sub-ball metal electrode, and protect the lateral sides of a discrete chip after cutting. The process flow thereof is simple, and enhances the efficiency of the packaging as well as its yield. 1. A method for chip package , comprising:providing a semi-packaged wafer, the semi-packaged wafer having a dicing street and a metal pad;selectively forming a metal electrode on the metal pad; forming a protective layer in area outside the metal electrode on the wafer, the protective layer covering the dicing street;forming a solder ball on the metal electrode; anddicing the wafer along the dicing street.2. The method according to claim 1 , where the selective forming process is a selective electroplating process.3. The method according to claim 2 , where the selective electroplating process comprises: forming a first mask layer on the wafer claim 2 , exposing an area the metal electrode to be formed; cleaning the wafer using zincate; with the first mask layer protection claim 2 , electroplating nickel and gold successively on the wafer using a non-electrolytic electroplating process; and removing the first mask layer.4. The method according to claim 3 , where the nickel is electroplated to a thickness of 3 μm claim 3 , and the gold is electroplated to a thickness of 0.05 μm.5. The method according to claim 3 , where the first mask layer is a photoresist mask.6. The method ...

Method and Apparatus for Plasma Dicing a Semi-conductor Wafer

The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a cover ring disposed above the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma. 1. (canceled)2. (canceled)3. (canceled)4. (canceled)5. (canceled)6. (canceled)7. (canceled)8. (canceled)9. (canceled)10. (canceled)11. (canceled)12. (canceled)13. (canceled)14. (canceled)15. (canceled)16. (canceled)17. (canceled)18. (canceled)19. (canceled)20. (canceled)21. (canceled)22. (canceled)23. (canceled)24. (canceled)25. (canceled)26. (canceled)27. (canceled)28. (canceled)29. (canceled)30. (canceled)31. (canceled)32. (canceled)33. A method for plasma dicing a substrate , the method comprising:providing a process chamber having a wall;providing a plasma source adjacent to the wall of the process chamber;providing a work piece support within the process chamber, the work piece support having a monopolar electrostatic chuck;placing the substrate onto a support film on a frame to form a work piece;loading the work piece onto the monopolar electrostatic chuck;generating a plasma through the plasma source; andetching the work piece through the generated plasma.34. The method according to wherein the support film is a dielectric film.35. A method for plasma dicing a substrate claim 33 , the method comprising:providing a process chamber having a wall;providing a plasma source adjacent to the wall of the process chamber;placing the substrate onto a support film on a frame to form a work piece, the substrate having a substrate diameter;providing a work piece support within the process chamber, the work piece support ...

Method and Apparatus for Plasma Dicing a Semi-conductor Wafer

The present invention provides a method for plasma dicing a substrate, the method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing a work piece onto the work piece support, said work piece having a support film, a frame and the substrate; loading the work piece onto the work piece support; applying a tensional force to the support film; clamping the work piece to the work piece support; generating a plasma using the plasma source; and etching the work piece using the generated plasma. 1. A method for plasma dicing a substrate , the method comprising:providing a process chamber having a wall;providing a plasma source adjacent to the wall of the process chamber;providing a work piece support within the process chamber;placing a work piece onto the work piece support, said work piece having a support film, a frame and the substrate;loading the work piece onto the work piece support;applying a tensional force to the support film;clamping the work piece to the work piece support;generating a plasma using the plasma source; andetching the work piece using the generated plasma.2. The method according to further comprising introducing a heat transfer fluid between the support film and the work piece.3. The method according to wherein the heat transfer fluid is a gas.4. The method according to wherein the heat transfer fluid is helium.5. The method according to wherein the heat transfer fluid further comprising a fluid pressure greater than one Torr.6. The method according to wherein the heat transfer fluid further comprising a fluid pressure less than thirty Torr.7. The method according to wherein the support film is dicing tape.8. The method according to wherein the clamping of the work piece step is performed after the applying of the tensional force to the support film step.9. The method according to further comprising changing ...

Method and Apparatus for Plasma Dicing a Semi-conductor Wafer

The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a clamping electrode for electrostatically clamping the work piece to the work piece support; providing a mechanical partition between the plasma source and the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma. 1. A method for plasma dicing a substrate , the method comprising:providing a process chamber having a wall;providing a plasma source adjacent to the wall of the process chamber;providing a work piece support within the process chamber;providing an electrostatic chuck within said work piece support, said electrostatic chuck having a seal band, and at least one clamping electrode;placing a work piece onto said work piece support, said work piece having a support film, a frame and the substrate, wherein the substrate does not overlap said seal band;electrostatically clamping said work piece to said work piece support using said electrostatic clamp;generating a plasma using the plasma source; andetching said work piece using the generated plasma.2. The method according to further comprising said clamping electrode overlapping a portion of the substrate.3. The method according to further comprising said clamping electrode completely overlapping the substrate.4. The method according to further comprising said clamping electrode overlapping a portion of said seal band.5. The method according to further comprising said clamping electrode completely overlapping said seal band.6. The method according to further comprising an inner diameter of said seal band being larger than an outer diameter of ...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR INTEGRATED DEVICE AND METHOD OF MANUFACTURING THE SAME

A reconfigured wafer of resin-encapsulated semiconductor packages is obtained by supporting with a resin, thereafter, a grinding process is performed on top and backside surfaces to expose only a bump interconnection electrode on a surface of a semiconductor chip. Further, a chip-scale package is obtained by a dicing process along a periphery of the chip. 1. A method of manufacturing a semiconductor device comprising:forming a semiconductor package integrated body by arranging a plurality of resin-encapsulated semiconductor packages, each of which including a semiconductor chip encapsulated by a resin, an I/O electrode formed on the semiconductor chip, and a interconnection electrode unit formed on the I/O electrode, on a surface of a substrate such that the I/O electrode of the semiconductor chip is arranged on an upper side and supporting the semiconductor packages to each other with a resin;exposing the interconnection electrode unit on a surface of the semiconductor chip with a encapsulating resin of the resin-encapsulated semiconductor package left so as to coat the surface of the semiconductor chip by performing a grinding process on a surface on a side of the I/O electrode of the semiconductor package integrated body;and dividing the semiconductor chip integrated body by a dicing process along aside surface of the semiconductor chip to obtain separate semiconductor chips.2. The method according to claim 1 , wherein the resin supporting the semiconductor packages to each other and a resin of the semiconductor packages are formed of resin materials including identical major components.3. A semiconductor integrated device claim 1 , comprising:a plurality of electronic components, each of which including an I/O electrode;a interconnection electrode unit formed on the I/O electrode of each of the electronic components;a first insulating portion arranged on side surfaces of the electronic component and the interconnection electrode unit and a backside surface of ...

METHOD AND APPARATUS FOR LASER SINGULATION OF BRITTLE MATERIALS

An improved method for singulation of electronic substrates into dice uses a laser to first form cuts in the substrate and then chamfers the edges of the cuts by altering the laser parameters. The chamfers increase die break strength by reducing the residual damage and removes debris caused by the initial laser cut without requiring additional process steps, additional equipment or consumable supplies. 1. A method for laser machining a workpiece , comprising:providing a laser configured to generate laser light having a wavelength;directing pulses of said laser light having said wavelength onto said workpiece during a first cutting process to make a first cut in said workpiece, wherein said first cutting process is characterized by at least one laser parameter selected from the group consisting of pulse duration, pulse temporal shape, laser power, fluence, repetition rate, speed, pitch, spot size, spot shape and focal height;after said first cutting process, changing the at least one of said laser parameters; anddirecting pulses of said laser light having said wavelength onto said workpiece during a second cutting process characterized by the at least one changed laser parameter to make a second cut in said workpiece,wherein said second cutting process is performed at a location substantially adjacent to a space created by said first cut such that debris generated during said second cutting process is transmittable into said space.23-. (canceled)4. The method of wherein said wavelength ranges from about 255 nm to about 2 microns.5. The method of wherein changing the at least one of said laser parameters comprises changing said pulse duration claim 1 , wherein said pulse duration during at least one of said first cutting process and said second cutting process is from about 10 femtoseconds to about 100 microseconds.6. The method of wherein changing the at least one of said laser parameters comprises changing said pulse temporal shape claim 1 , wherein said pulse ...

Adhesive Composition, An Adhesive Sheet and a Production Method of a Semiconductor Device

An adhesive composition includes an acrylic polymer (A), a heat curable resin (B) having unsaturated hydrocarbon group, and a coupling agent (C) having reactive a double bond group. 1. An adhesive composition comprising an acrylic polymer (A) , a heat curable resin (B) having unsaturated hydrocarbon group , and a coupling agent (C) having reactive double bond group.2. The adhesive composition as set forth in claim 1 , wherein said coupling agent (C) is a silane coupling agent comprising the reactive double bond.3. The adhesive composition as set forth in further comprising a filler (G).4. A single layer adhesive film comprising the adhesive composition as set forth in .5. An adhesive sheet wherein an adhesive layer comprising the adhesive composition as set forth in is formed on a support.6. The adhesive sheet as set forth in wherein said support is a resin film.7. The adhesive sheet as set forth in wherein said support is a dicing sheet.8. A production method of a semiconductor device comprising:{'claim-ref': {'@idref': 'CLM-00005', 'claim 5'}, 'laminating the adhesive layer of the adhesive sheet as set forth in to a semiconductor wafer, dicing said semiconductor wafer and the adhesive layer, thereby obtaining a semiconductor chip,'}releasing the semiconductor chip from the support while the adhesive layer is transferred to said semiconductor chip, andadhering said semiconductor chip on a die pad portion or on other semiconductor chip via said adhesive layer. This patent application claims priority of Japanese patent document 2012-061102, filed on Mar. 16, 2012 in Japan, the entirety of which is incorporated herein by reference.The present invention relates to an adhesive composition particularly suitable to be used during the step of dicing a silicon wafer or so, and adhering (die bonding) an obtained semiconductor chip to an organic circuit board or a lead frame or to other semiconductor chip, and also relates to an adhesive sheet comprising the adhesive layer ...

Adhesive Composition, An Adhesive Sheet and a Production Method of a Semiconductor Device

An adhesive composition includes an acrylic polymer (A), a heat curable resin (B) having unsaturated hydrocarbon group, and a filler (C) having reactive double bond on a surface. 1. An adhesive composition comprising an acrylic polymer (A) , a heat curable resin (B) having unsaturated hydrocarbon group , and a filler (C) having reactive double bond on a surface.2. The adhesive composition as set forth in wherein said filler (C) is a silica having the reactive double bond on the surface.3. A single layer adhesive film comprising the adhesive composition as set forth in .4. An adhesive sheet wherein an adhesive layer comprising the adhesive composition as set forth in is formed on a support.5. The adhesive sheet as set forth in wherein said support is a resin film.6. The adhesive sheet as set forth in wherein said support is a dicing sheet.7. A production method of a semiconductor device comprising:{'claim-ref': {'@idref': 'CLM-00004', 'claim 4'}, 'laminating the adhesive layer of the adhesive sheet as set forth in on a semiconductor wafer, dicing said semiconductor wafer and the adhesive layer, thereby obtaining a semiconductor chip,'}releasing the semiconductor chip from the support while the adhesive layer is transferred to said semiconductor chip, andadhering said semiconductor chip on a die pad portion or on other semiconductor chip via said adhesive layer. This patent application claims priority of Japanese patent document 2012-061097, filed on Mar. 16, 2012 in Japan, the entirety of which is incorporated herein by reference.The present invention relates to an adhesive composition particularly suitable to be used during the step of dicing a silicon wafer or so, and adhering (die bonding) an obtained semiconductor chip to an organic circuit board or a lead frame or to other semiconductor chip, and also relates to an adhesive sheet comprising the adhesive layer consisting of said adhesive composition, and further relates to a production method of the semiconductor ...

METHOD OF SINGULATING A THIN SEMICONDUCTOR WAFER

A method of singulating a semiconductor wafer having two surfaces separated by a thickness T<200 μm includes partitioning it along a network of scribelines on one side. The other side is secured to an elastic foil, which is clamped to a wafer table. A radiative scribing tool is used to produce at least one laser beam having a pulse duration P≦75 ps, and causing the laser beam to scan along each of the scribelines so as to create a scribe with a depth D Подробнее

Methods and Apparatus For Patterning Photovoltaic Devices and Materials For Use With Such Devices

A picosecond laser beam shaping assembly is disclosed for shaping a picosecond laser beam for use in patterning (e.g., scribing) semiconductor devices. The assembly comprises a pulsed fibre laser source of picosecond laser pulses, a harmonic conversion element for converting laser pulses at a first laser wavelength having a first spectral bandwidth to laser pulses at a second laser wavelength having a second spectral bandwidth, and a beam shaping apparatus for shaping the laser beam at the second laser wavelength, the beam shaping apparatus having a spectral bandwidth that substantially corresponds to the second spectral bandwidth so as to produce a laser beam having a substantially rectangular cross-sectional profile. 1. Picosecond laser beam shaping assembly for shaping a picosecond laser beam for use in patterning photovoltaic devices , the assembly comprising:a pulsed fibre laser for generating picosecond laser pulses;a harmonic conversion element for converting laser pulses at a first laser wavelength having a first spectral bandwidth to laser pulses at a second laser wavelength at a second spectral bandwidth; and,a beam shaping apparatus for shaping the laser beam at the second laser wavelength and having a beam shaping element having a spectral bandwidth that substantially corresponds to the second spectral bandwidth so as to produce a laser beam having a substantially rectangular cross-sectional intensity profile.2. A picosecond laser beam shaping assembly according to claim 1 , wherein the pulsed fibre laser comprises a master oscillator fibre power amplifier.3. A picosecond laser beam shaping assembly according to any preceding claim wherein the second laser wavelength is less than the first laser wavelength.4. A picosecond laser beam shaping assembly according to any preceding claim claim 1 , wherein the second spectral bandwidth is less than the first spectral bandwidth.5. A picosecond laser beam shaping assembly according to any preceding claim claim 1 ...

LASER PROCESSING METHOD

A laser processing method which can highly accurately cut objects to be processed having various laminate structures is provided. An object to be processed comprising a substrate and a laminate part disposed on the front face of the substrate is irradiated with laser light L while a light-converging point P is positioned at least within the substrate, so as to form a modified region due to multiphoton absorption at least within the substrate, and cause the modified region to form a starting point region for cutting. When the object is cut along the starting point region for cutting, the object can be cut with a high accuracy. 113-. (canceled)14. A laser processing method comprising the steps of:irradiating an object to be processed comprising a substrate and a laminate part disposed on a front face of the substrate with laser light while positioning a light-converging point at least within the substrate, thereby forming a modified region embedded within the substrate along each line of a plurality of cutting lines arranged in a grid with respect to the substrate, each substrate modified region forming a starting point region for cutting the object inside the object at a predetermined distance from a laser light incident face of the object; andafter completion of forming the substrate modified regions, applying a stress to the object which causes cutting of the substrate and the laminate part along the cutting lines thereby generating a fracture in a thickness direction of the substrate from each starting point region that reaches a front face of the laminate part and a rear face of the substrate,wherein after the irradiation of the laser light is performed, each substrate modified region exists only within the substrate, andwherein the at least one of the front and back face of the substrate is a surface of the substrate into which the laser light enters.15. A laser processing method comprising the steps of:irradiating an object to be processed comprising a ...

Laser marking

A method and apparatus is disclosed for producing precision marks for a metrological scale in the form of a stainless steel ribbon. A laser is used to produce ultra-short pulses which have a fluence at the ribbon such that ablation takes place. The laser light can be scanned via scanner and the pitch of the marks can be controlled. The ablative technique causes little thermal input and improves the accuracy of the scale.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

A semiconductor package according to embodiments includes: a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof; a front-side cap portion including an air gap in a portion between the semiconductor chip and the front-side cap portion and a front-side penetrating electrode, and is positioned to face the front surface of the semiconductor chip; a back-side cap portion bonded with a first cap portion to hermetically seal the semiconductor chip, includes an air gap at least in a portion between the semiconductor chip and the back-side cap portion and a back-side penetrating electrode, and is positioned to face the back surface of the semiconductor chip; a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; and a back-side connecting portion which electrically connects the back electrode and the back-side penetrating electrode. 1. A semiconductor package comprising:a semiconductor chip including a front electrode on a front surface thereof and a back electrode on a back surface thereof;a front-side cap portion being positioned to face the front surface of the semiconductor chip, an air gap exists in a portion between the semiconductor chip and the front-side cap portion, the front-side cap portion includes a front-side penetrating electrode;a back-side cap portion being positioned to face the back surface of the semiconductor chip, the back-side cap portion being bonded with the front-side cap portion to hermetically seal the semiconductor chip, an air gap exists in a portion between the semiconductor chip and the back-side cap portion, the back-side cap portion includes a back-side penetrating electrode;a front-side connecting portion which electrically connects the front electrode and the front-side penetrating electrode; anda back-side connecting portion which electrically connects the back electrode and the back-side penetrating ...

WAFER DICING USING HYBRID MULTI-STEP LASER SCRIBING PROCESS WITH PLASMA ETCH

Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits. 1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits , the method comprising:forming a mask above the semiconductor wafer, the mask comprising a layer covering and protecting the integrated circuits; scribing with two or more offset but overlapping Gaussian beam passes; and, subsequently,', 'scribing with a top hat beam pass overlapping the Gaussian beam passes; and, 'patterning the mask with a multi-step laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits, the multi-step laser scribing process comprisingetching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.2. The method of claim 1 , wherein the two or more offset but overlapping Gaussian beam passes are performed sequentially.3. The method of claim 1 , wherein the two or more offset but overlapping Gaussian beam passes are performed simultaneously.4. The method of claim 1 , wherein each of the two or more offset but overlapping Gaussian beam passes are performed using a UV laser having a wavelength approximately in the range of 300-380 nanometers.5. The method of claim 1 , wherein each of the two or more offset but overlapping Gaussian beam passes are performed using a UV laser having a pulse width approximately in the range of 5-50 picoseconds.6. The method of claim 1 , wherein each of ...

Methods of Forming Semiconductor Devices

In one embodiment, a method of forming a semiconductor device includes forming openings in a substrate. The method includes forming a dummy fill material within the openings and thinning the substrate to expose the dummy fill material. The dummy fill material is removed.

SEMICONDUCTOR DEVICE AND METHOD CAPABLE OF SCRIBING CHIPS WITH HIGH YIELD

A semiconductor device comprising scribe areas that include dicing areas for separating chip areas, a groove forming area surrounding each chip area, and includes interlayer insulating lamination disposed above the semiconductor wafer; a multilayer wiring structure formed in the interlayer insulating lamination, the multilayer wiring structure including wiring layers disposed in the chip area, and dummy wirings disposed in the chip area and the scribe area, the wiring layers and the dummy wirings being formed from same mother layers; a cover layer including a passivation layer, the cover layer covering the multilayer wiring structure; and a groove formed in each groove forming area, the groove surrounding the chip areas and extending from a surface of the semiconductor wafer and at least through the passivation layer; wherein the multilayer wiring structure includes no dummy wirings in the groove forming area at least in an uppermost wiring layer. 1. A semiconductor device fabrication method comprising the steps of:(a) preparing a semiconductor wafer having a plurality of chip areas formed with semiconductor elements and a scribe area having a dicing area in said scribe area for separating said plurality of chip areas, wherein in said scribe area a groove forming area is defined to surround each chip area at a position outside of the dicing area;(b) disposing a multilayer wiring structure including dummy wirings above said semiconductor wafer, said multilayer wiring structure having interlayer insulating films and wiring layers alternately formed;(c) forming a cover layer including a passivation layer, said cover layer covering said multilayer wiring structure; and(d) forming a groove in each said groove forming area, said groove surrounding each of said plurality of chip areas and extending from a surface of said semiconductor wafer and at least through said passivation layer.2. The semiconductor device fabrication method according to claim 1 , wherein at least in ...

LASER AND PLASMA ETCH WAFER DICING USING UV-CURABLE ADHESIVE FILM

Laser and plasma etch wafer dicing using UV-curable adhesive films is described. In an example, a method includes forming a mask above the semiconductor wafer. The semiconductor wafer is coupled to a carrier substrate by a UV-curable adhesive film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The UV-curable adhesive film is then irradiated with ultra-violet (UV) light. The singulated integrated circuits are then detached from the carrier substrate. 1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits , the method comprising:forming a mask above the semiconductor wafer coupled to a carrier substrate by a UV-curable adhesive film, the mask covering and protecting the integrated circuits;patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits;etching the semiconductor wafer through the gaps in the patterned mask to form singulated integrated circuits;irradiating the UV-curable adhesive film with ultra-violet (UV) light; anddetaching the singulated integrated circuits from the carrier substrate.2. The method of claim 1 , wherein irradiating the UV-curable adhesive film with UV light comprises reducing an adhesiveness of the UV-curable adhesive film by at least approximately 90%.3. The method of claim 1 , wherein the carrier substrate is transparent to UV light and irradiating the UV-curable adhesive film with UV light comprises irradiating through the carrier substrate to the UV-curable adhesive film.4. The method of claim 1 , further comprising:subsequent to etching the semiconductor wafer and prior to irradiating the UV- ...

Method for forming a stent

A method of forming a stent includes forming a wave form from a formable material. The wave form includes a plurality of substantially straight portions and a plurality of curved portions, each curved portion connecting adjacent substantially straight portions. The method includes wrapping the wave form around a mandrel at an angle to form a helical coil comprising a plurality of turns, connecting a first curved portion of a first turn to an adjacent second curved portion of a second turn at a position along the wave form to define an end of the stent, and removing excess material from an end of the wave form extending past the first curved portion while smoothing the end of the stent.

METHOD OF MANUFACTURING LEADLESS INTEGRATED CIRCUIT PACKAGES HAVING ELECTRICALLY ROUTED CONTACTS

A method of manufacturing a leadless integrated circuit (IC) package comprising an IC chip mounted on a metal leadframe and a plurality of electrical contacts electrically coupled to the IC chip. The IC chip, the electrical contacts, and a portion of the metal leadframe are covered with an encapsulation compound, with portions of the electrical contacts exposed on a bottom surface of the encapsulation compound. The electrical contacts of the IC package having metal traces connecting bonding areas on a top surface thereof and contact areas on a bottom surface thereof, wherein at least some of the bonding areas are laterally disposed from the contact areas connected thereto. 1. A method of manufacturing a leadless integrated circuit (IC) package , comprising:providing a metal leadframe having a thickness;patterning and partially etching a top surface of the metal leadframe to a first depth to form a first pattern of recesses therein, the first pattern of recesses defining upper portions of a plurality of metal traces, each metal trace of the plurality of metal traces having a bonding area disposed on an upper surface thereof;plating with a wire bondable material the bonding areas on the top surface of the metal traces;mounting an IC chip to the metal leadframe;electrically coupling the IC chip to the bonding areas via wire bonds;applying an encapsulation compound to cover the IC chip, the wire bonds, and the plurality of metal traces and to fill the recesses in the metal leadframe to the first depth;selectively etching a bottom surface of the metal leadframe to a second depth to form a second pattern of recesses therein to isolate each of the plurality of metal traces and to remove at least some of the leadframe disposed below one or more of the bonding areas and to define contact areas on lower surfaces of the plurality of metal traces, the second depth plus the first depth being greater than the thickness of the metal leadframe;the second patter of recesses defining ...

TECHNIQUES FOR FORMING OPTOELECTRONIC DEVICES

Embodiments relate to use of a particle accelerator beam to form thin films of material from a bulk substrate are described. In particular embodiments, a bulk substrate having a top surface is exposed to a beam of accelerated particles. In certain embodiments, this bulk substrate may comprise GaN; in other embodiments this bulk substrate may comprise (111) single crystal silicon. Then, a thin film or wafer of material is separated from the bulk substrate by performing a controlled cleaving process along a cleave region formed by particles implanted from the beam. In certain embodiments this separated material is incorporated directly into an optoelectronic device, for example a GaN film cleaved from GaN bulk material. In some embodiments, this separated material may be employed as a template for further growth of semiconductor materials (e.g. GaN) that are useful for optoelectronic devices. 1. A method comprising:providing a workpiece bearing a layer of additional material;introducing a plurality of particles through the additional material to form a cleave region in the workpiece;applying energy to cleave a detached thickness of workpiece material including the layer of additional material, from a remainder of the workpiece;processing the layer of additional material; andbonding the layer of additional material to a substrate having a coefficient of thermal expansion approximately equal to a coefficient of thermal expansion of the layer of additional material.2. The method as in wherein the layer of additional material is formed on top of the workpiece at a temperature.3. The method as in wherein mismatch between the layer of additional material and the workpiece material claim 2 , develops a level of stress lower than a threshold value sufficient to nucleate and propagate defects within the layer of additional material.4. The method as in wherein processing the additional layer of material comprises relaxing a level of stress in the additional layer of material.5. ...

High throughput epitaxial liftoff for releasing multiple semiconductor device layers from a single base substrate

A semiconductor structure is provided that includes a base substrate, and a multilayered stack located on the base substrate. The multilayered stack includes, from bottom to top, a first sacrificial material layer having a first thickness, a first semiconductor device layer, a second sacrificial material layer having a second thickness, and a second semiconductor device layer, wherein the first thickness is less than the second thickness.

CHIP PACKAGE AND METHOD FOR FORMING THE SAME

An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface of the semiconductor substrate; a conducting pad structure located in the dielectric layer and electrically connected to the device region, wherein the conducting pad structure comprises a stacked structure of a plurality of conducting pad layers; a support layer disposed on a top surface of the conducting pad structure; and a protection layer disposed on the second surface of the semiconductor substrate.

STACKED SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME

A stacked semiconductor package includes a first semiconductor chip having a first surface and a second surface which faces away from the first surface and including first bonding pads which are formed on the first surface and first through electrodes which pass through the first surface and the second surface; a second semiconductor chip stacked over the second surface of the first semiconductor chip, and including second bonding pads which are formed on a third surface facing the first semiconductor chip and second through electrodes which pass through the third surface and a fourth surface facing away from the third surface and are electrically connected with the first through electrodes; and a molding part formed to substantially cover the stacked first and second semiconductor chips and having openings which expose one end of the first through electrodes disposed on the first surface of the first semiconductor chip. 1. A stacked semiconductor package comprising:a first semiconductor chip having a first surface and a second surface which faces away from the first surface and including first bonding pads which are formed on the first surface and first through electrodes which pass through the first surface and the second surface;a second semiconductor chip stacked over the second surface of the first semiconductor chip, and including second bonding pads which are formed on a third surface facing the first semiconductor chip and second through electrodes which pass through the third surface and a fourth surface facing away from the third surface and are electrically connected with the first through electrodes; anda molding part formed to substantially cover the stacked first and second semiconductor chips and having openings which expose one end of the first through electrodes disposed on the first surface of the first semiconductor chip.2. The stacked semiconductor package according to claim 1 , wherein the molding part comprises:a first molding part ...

Semiconductor Die and Method of Forming FO-WLCSP Vertical Interconnect Using TSV and TMV

A semiconductor device has a TSV wafer and semiconductor die mounted over the TSV wafer. A channel is formed through the TSV wafer. An encapsulant is deposited over the semiconductor die and TSV wafer. Conductive TMV are formed through the encapsulant over the conductive TSV and contact pads of the semiconductor die. The conductive TMV can be formed through the channel. A conductive layer is formed over the encapsulant and electrically connected to the conductive TMV. The conductive TMV are formed during the same manufacturing process. An insulating layer is formed over the encapsulant and conductive layer. A plurality of semiconductor die of the same size or different sizes can be stacked over the TSV wafer. The plurality of semiconductor die can be stacked over opposite sides of the TSV wafer. An internal stacking module can be stacked over the semiconductor die and electrically connected through the conductive TMV. 1. A method of making a semiconductor device , comprising:providing a substrate panel including a plurality of substrates;singulating the substrate panel to separate the substrates;mounting the substrates to a carrier;mounting a semiconductor die to the substrates on the carrier;depositing an encapsulant over and around the semiconductor die and the substrates on the carrier to form an encapsulated assembly;removing the carrier from the encapsulated assembly;forming an interconnect structure over the substrates over a surface of the encapsulated assembly; andsingulating the encapsulated assembly to form a plurality of semiconductor packages, each semiconductor package including the semiconductor die and substrate with encapsulant disposed around a peripheral region of the substrate.2. The method of claim 1 , wherein mounting the substrates to the carrier further includes separating the substrates by a space.3. The method of claim 2 , wherein depositing the encapsulant further includes depositing the encapsulant into the space to fill the space between ...

Semiconductor Device and Method of Forming Open Cavity in TSV Interposer to Contain Semiconductor Die in WLCSMP

A semiconductor device is made by mounting a semiconductor wafer to a temporary carrier. A plurality of TSV is formed through the wafer. A cavity is formed partially through the wafer. A first semiconductor die is mounted to a second semiconductor die. The first and second die are mounted to the wafer such that the first die is disposed over the wafer and electrically connected to the TSV and the second die is disposed within the cavity. An encapsulant is deposited over the wafer and first and second die. A portion of the encapsulant is removed to expose a first surface of the first die. A portion of the wafer is removed to expose the TSV and a surface of the second die. The remaining portion of the wafer operates as a TSV interposer for the first and second die. An interconnect structure is formed over the TSV interposer. 1. A method of making a semiconductor device , comprising:providing a substrate panel including a plurality of substrates;laminating an insulating layer over the substrates;forming a conductive layer over the substrates for electrical routing;mounting the substrates to a carrier;mounting a semiconductor die over the substrates on the carrier;depositing an encapsulant over and around the semiconductor die and the substrates to form an encapsulated assembly;removing the carrier from the encapsulated assembly;forming an interconnect structure over a surface of the encapsulated assembly; andsingulating the encapsulated assembly to form a plurality of semiconductor packages, each semiconductor package including the semiconductor die and substrate with encapsulant covering an outer edge of the substrates entirely.2. The method of claim 1 , further including forming studs over the substrates for mounting the semiconductor die to the substrates.3. The method of claim 1 , further including forming a conductive via through the substrates.4. The method of claim 1 , wherein providing the substrate panel further includes separating the substrates by a space.5. ...

SINGULATION OF IC PACKAGES

A method of dividing a two dimensional array of encapsulated integrated circuits into individual integrated circuit packages uses a first series of parallel cuts () extending fully through the leadframe () and encapsulation layer (), and defining rows of the array. The cuts terminate before the beginning and end of the rows such that the integrity of the array is maintained by edge portions () at the ends of the rows. After plating contact pads (), a second series of parallel cuts () is made extending fully through the leadframe () and encapsulation layer (). This separates the array into columns thereby providing singulation of packages between the edge portions (). 1. A method of dividing a two dimensional array of encapsulated integrated circuits into individual integrated circuit packages , wherein the array comprises a leadframe and an encapsulation layer over the leadframe in which the integrated circuits are encapsulated , wherein the method comprises:performing a first series of parallel cuts, the cuts extending fully through the leadframe and encapsulation layer, and defining rows of the array, wherein the cuts terminate before the beginning and end of the rows such that the integrity of the array is maintained by edge portions at the ends of the rows;plating contact pads of the leadframe, and including contact pad edge regions formed by the first series of cuts; andperforming a second series of parallel cuts, angled with respect to the first series of parallel cuts, the cuts extending fully through the leadframe and encapsulation layer, and separating the array into columns thereby providing singulation of packages between the edge portions.2. A method as claimed in claim 1 , wherein the leadframe comprises contact pads at the underside of the leadframe claim 1 , opposite the encapsulation layer.3. A method as claimed in claim 1 , wherein the plating comprises tin.4. A method as claimed in claim 1 , wherein the leadframe and encapsulation layer are ...

MATERIAL SHEET HANDLING SYSTEM AND PROCESSING METHODS

Methods and apparatus provide for delivering a controlled supply of gas to at least one aero-mechanical device to impart a gas flow to suspend a material sheet; preventing lateral movement of the material sheet in at least one direction when suspended; and imparting a stream of water, from a side of the material sheet opposite the at least one aero-mechanical device, to dice the material sheet when suspended. 110-. (canceled)11. A method , comprising:delivering a controlled supply of gas to at least one aero-mechanical device to impart a gas flow to suspend a material sheet;preventing lateral movement of the material sheet in at least one direction when suspended; andimparting a stream of water, from a side of the material sheet opposite the at least one aero-mechanical device, to dice the material sheet when suspended.12. The method of claim 11 , wherein the material sheet is a substantially round sheet of semiconductor material.13. The method of claim 12 , further comprising:preventing lateral movement of the material sheet in a first direction when suspended; andimparting streams of water to dice respective opposing lateral pieces from the material sheet in the first direction.14. The method of claim 13 , further comprising:preventing lateral movement of the material sheet in a second direction, transverse to the first direction; andimparting streams of water to dice respective further opposing lateral pieces from the material sheet in the second direction such that the remaining material sheet is substantially rectangular.15. The method of claim 14 , further comprising:preventing lateral movement of the material sheet in the first direction when suspended; andimparting streams of water to chamfer respective opposing edges of the material sheet in the first direction.16. The method of claim 15 , further comprising:preventing lateral movement of the material sheet in the second direction, transverse to the first direction; andimparting streams of water to chamfer ...

METHOD FOR MANUFACTURING ELECTRONIC COMPONENT, AND ELECTRONIC APPARATUS

A method for manufacturing an electronic component includes mounting a vibrating element on each singulation region of a base substrate, joining the surface of a lid substrate where grooves are arranged to the base substrate via low-melting glass so as to cover a functional element in each singulation region, thereby obtaining a laminate, and performing singulation in each singulation region by breaking the laminate along grooves. 1. A method for manufacturing an electronic component comprising:preparing a base substrate that comprises front and rear surfaces, comprises a plurality of singulation regions arranged on the front surface thereof, and comprises grooves for singulating the singulation regions arranged on the rear surface thereof, and a lid substrate that comprises grooves for singulation together with the base substrate arranged therein;mounting a functional element on each of the singulation regions of the base substrate;joining the surface of the lid substrate, where the grooves are arranged, to the base substrate via a glass material so as to cover the functional element in each of the singulation regions, thereby obtaining a laminate; andsingulating each of the singulation regions by breaking the laminate along a groove arranged in the base substrate and a groove arranged in the lid substrate.2. The method for manufacturing an electronic component according to claim 1 ,wherein the base substrate comprises a frame-shaped protrusion that protrudes from the front surface of the base substrate and comprises the functional element to be arranged therein, and a bottomed recess between a pair of the adjacent protrusions, andwherein the laminate is configured such that a bottom portion of a groove arranged in the base substrate and a groove arranged in the lid substrate at least partially overlap a bottom surface of the recess in a plan view in the thickness direction of the laminate, respectively.3. The method for manufacturing an electronic component ...

CHIP PACKAGE AND METHOD FOR FORMING THE SAME

Embodiments of the present invention provide a chip package including: a semiconductor substrate having a first surface and a second surface; a device region formed in the semiconductor substrate; a dielectric layer disposed on the first surface; and a conducting pad structure disposed in the dielectric layer and electrically connected to the device region; a cover substrate disposed between the chip and the cover substrate, wherein the spacer layer, a cavity is created an surrounded by the chip and the cover substrate on the device region, and the spacer layer is in direct contact with the chip without any adhesion glue disposed between the chip and the spacer layer. 1. A chip package , comprising: a semiconductor substrate having a first surface and a second surface;', 'a device region formed in the semiconductor substrate;', 'a dielectric layer disposed on the first surface; and', 'a conducting pad structure disposed in the dielectric layer and electrically connected to the device region;, 'a chip, comprisinga cover substrate disposed on the chip; anda spacer layer disposed between the chip and the cover substrate, wherein a plurality of cavities is created and surrounded by the spacer layer, the chip and the cover substrate on the device region, and wherein the spacer layer directly contacts the chip, and no adhesion glue is disposed between the chip and the spacer layer.2. The chip package as claimed in claim 1 , wherein the cover substrate is a transparent substrate.3. The chip package as claimed in claim 1 , wherein the projection of the spacer layer on the first surface is located between the projection of the conducting pad structure on the first surface and the projection of the device region on the first surface.4. The chip package as claimed in claim 1 , wherein the projection of the spacer layer on the first surface does not overlap the projection of the conducting pad structure on the first surface.5. The chip package as claimed in claim 1 , wherein ...

CHIP PACKAGE AND METHOD FOR FORMING THE SAME

Embodiments of the present invention provide a chip package including: a substrate having a first surface and a second surface; a device region located in the substrate; a conducting pad structure disposed on the substrate and electrically connected to the device region; a spacer layer disposed on the first surface of the substrate; a second substrate disposed on the spacer layer, wherein a cavity is created and surrounded by the second substrate, the spacer layer, and the substrate on the device region; and a through-hole extending from a surface of the second substrate towards the substrate, wherein the through-hole connects to the cavity. 1. A chip package , comprising:a substrate having a first surface and a second surface;a device region located in the substrate;a conducting pad structure disposed on the substrate and electrically connected to the device region;a spacer layer disposed on the first surface of the substrate;a second substrate disposed on the spacer layer, wherein a cavity is created and surrounded by the second substrate, the spacer layer and the substrate on the device region; anda through-hole extending from a surface of the second substrate towards the substrate, wherein the through-hole connects to the cavity.2. The chip package as claimed in claim 1 , wherein the device region comprises a temperature sensing device claim 1 , a moisture sensing device claim 1 , a pressure sensing device or a combination thereof.3. The chip package as claimed in claim 1 , further comprising a photo-sensitive region disposed on the first surface of the substrate claim 1 , wherein the photo-sensitive region is located between the conducting pad structure and the device region.4. The chip package as claimed in claim 1 , further comprising:a hole extending from the second surface of the substrate towards the conducting pad structure;a trace layer disposed on the second surface of the substrate and extending into the hole for electrically connection with the ...

CHIP PACKAGE AND METHOD FOR FORMING THE SAME

An embodiment of the invention provides a chip package which includes: a first substrate; a second substrate disposed thereon, wherein the second substrate includes a lower semiconductor layer, an upper semiconductor layer, and an insulating layer therebetween, and a portion of the lower semiconductor layer electrically contacts with at least one pad on the first substrate; a conducting layer disposed on the upper semiconductor layer of the second substrate and electrically connected to the portion of the lower semiconductor layer electrically contacting with the at least one pad; an opening extending from the upper semiconductor layer towards the lower semiconductor layer and extending into the lower semiconductor layer; and a protection layer disposed on the upper semiconductor layer and the conducting layer, wherein the protection layer extends onto a portion of a sidewall of the opening, and does not cover the lower semiconductor layer in the opening. 1. A chip package , comprising:a first substrate;a second substrate disposed on the first substrate, wherein the second substrate comprises a lower semiconductor layer, an upper semiconductor layer, and an insulating layer therebetween, and a portion of the lower semiconductor layer electrically contacts with at least one pad on the first substrate;a conducting layer disposed on the upper semiconductor layer of the second substrate and electrically connected to the portion of the lower semiconductor layer electrically contacting with the at least one pad;an opening extending from the upper semiconductor layer towards the lower semiconductor layer and extending into the lower semiconductor layer; anda protection layer disposed on the upper semiconductor layer and the conducting layer, wherein the protection layer extends onto a portion of a sidewall of the opening, and does not cover the lower semiconductor layer in the opening.2. The chip package as claimed in claim 1 , further comprising:a signal conducting ...

LASER BEAM PROCESSING METHOD FOR WAFER

A laser beam processing method for a wafer includes a first processed groove forming step in which a laser beam is radiated along a planned dividing line so that the overlapping rate of condensed beam spots is equal to or less than 95%, to thereby form a first laser beam processed groove. The laser beam processing method for a wafer further includes a second processed groove forming step in which a laser beam is radiated along the first laser beam processed groove in such a manner that the overlapping rate of condensed beam spots is equal to or more than 97%, to thereby form a second laser beam processed groove at a bottom portion of the first laser beam processed groove. 1. A laser beam processing method for a wafer having a device in each of regions demarcated by a plurality of planned dividing lines formed in a grid pattern , the method comprising:a first processed groove forming step of radiating a pulsed laser beam along the planned dividing line in such a manner that the overlapping rate of condensed beam spots of the pulsed laser beam condensed onto the wafer is equal to or less than 95%, to thereby form a first laser beam processed groove; anda second processed groove forming step of radiating, after the first processed groove forming step is performed, the pulsed laser beam along the first laser beam processed groove in such a manner that the overlapping rate of condensed beam spots of the pulsed laser beam condensed onto the wafer is equal to or more than 97%, to thereby form a second laser beam processed groove at a bottom portion of the first laser beam processed groove,wherein the depth of the second laser beam processed groove is greater than the depth of the first laser beam processed groove, and debris generated in the second processed groove forming step is deposited inside the first laser beam processed groove so as not to protrude to a surface of the wafer.2. The laser beam processing method for a wafer according to claim 1 ,wherein the condensed ...

Sliding member and production method for same

A sliding member has a sliding surface of a different form than a conventional sliding surface, and exhibits stable sliding characteristics even under a high surface pressure. The sliding member has a sliding surface formed on a surface of a metal base material, and includes two surface textures: a hard part and a tough part. The tough part contacts with the hard part and has a hardness lower than that of the hard part. The sliding surface includes the surface texture, in which the hard part and the tough part that supports the hard part are present in a mixed fashion with a micro-meso region level, and stably exhibits excellent wear resistance.

Test Line Placement to Improve Die Sawing Quality

A semiconductor wafer structure includes a plurality of dies, a first scribe line extending along a first direction, a second scribe line extending along a second direction and intersecting the first scribe line, wherein the first and the second scribe lines have an intersection region. A test line is formed in the scribe line, wherein the test line crosses the intersection region. Test pads are formed in the test line and only outside a free region defined substantially in the intersection region. 1. A method of fabricating a semiconductor structure , the method comprising:providing a semiconductor wafer comprising a first scribe line and a second scribe line perpendicular to the first scribe line;defining a free region in an intersection region of the first and the second scribe lines, wherein the free region is defined as a region that when a sawing tool is used to saw the semiconductor wafer through one of the first and the second scribe lines, a probability of the sawing tool sawing outside of the free region is less than about one percent; andforming a test key comprising test pads in at least one of the first scribe line and the second scribe line, wherein two of the test pads are placed on opposite sides of the free region, and wherein the free region is free from test pads.2. The method of further comprising:sawing through the first scribe line using the sawing tool; andsawing through the second scribe line using the sawing tool to separate dies in the semiconductor wafer.3. The method of claim 1 , wherein the free region is smaller than the intersection region.4. The method of claim 1 , wherein the intersection region is free from test pads.5. The method of claim 1 , wherein one of the test pads is formed in the intersection region and outside of the free region.6. The method of further comprising calculating the probability from accumulated data obtained from wafers sawed using the sawing tool.7. The method of claim 1 , wherein the forming the test pads ...