METHOD AND APPARATUS FOR PEAK TRACKING A BASEBAND SIGNAL

Method and Apparatus For Peak Tracking A Baseband Signal

The present application hereby claims the benefit of the filing date of a

related Provisional Application filed on September 27, 1999, and assigned

Application Serial No. 60/156,228.

FIELD OF THE INVENTION

The field of invention relates generally to wireless communication; and

more specifically to a peak tracking approach for slicing a received baseband

signal.

BACKGROUND

Super Heterodyne and Frequency Shift Keyed (FSK) Modulation /Demodulation

Figure 1 shows a portion 106 of a receiving device 166 referred to as a

demodulator. A demodulator 106 provides a signal (commonly referred to as a

baseband signal b(t) in various applications) that is representative of the

information being sent from a transmitting device 165 to a receiving device 166.

The demodulator 106 extracts (i.e., demodulates) the baseband signal b(t) from a

high frequency wireless signal that "carries" the baseband signal b(t) through the

medium (e.g., airspace) separating the transmitting and receiving devices 165, 166.

The particular demodulator 106 example of Figure 1 is designed according

to: 1) a demodulation approach that is commonly referred to as super heterodyne

detection (hereinafter referred to as a heterodyne detection for simplicity); and 3) a

modulation /demodulation scheme referred to as Frequency Shift Keying (FSK). The industry standard referred to as "BLUETOOTH" (the requirements of which

may be found in "Specification of the Bluetooth System", Core v.l.OB, 12/1/99,

and published by the Bluetooth Special Interest Group (SIG)) can apply to both of

these approaches and, accordingly, will be used below as a basis for reviewing the

following background material.

Heterodyne detection is normally used when dedicated channels are

allocated within a range of frequencies 111 (where a range of frequencies may also

be referred to as a "band" 111). For BLUETOOTH applications within the United

States, 89 channels 110,, 110₂, 110₃, . . . 110„ are carried within a 2.400 GHz to 2.482

GHz band 111. Each of the 79 channels are approximately 1 Mhz wide and are

centered at frequencies 1 Mhz apart.

The first channel 110, is centered at 2.402 Ghz, the second channel 110₂ is

centered at 2.403 Ghz, the third channel 110₃ is centered at 2.404 Ghz, etc., and the

seventy ninth channel 110₇₉ is centered at 2.480 Ghz. The heterodyne demodulator

106 accurately receives a single channel while providing good suppression of the

other channels present within the band 111. For example, if channel 110, is the

channel to be received, the baseband signal b(t) within channel 110, will be

presented while the baseband signals carried by channels 110,, and 110₃ through

110-, will be suppressed.

An FSK modulation /demodulation approach is commonly used to transmit

digital data over a wireless system. An example of an FSK modulation approach is

shown in Figure 1. A transmitting modulator 105 within a transmitting device 165 modulates a baseband signal at a carrier frequency f_carner into an antennae 102. That is (referring to the frequency domain representation 150 of the signal launched into

the antennae 102) if the baseband signal corresponds to a first logic value (e.g.,

"1"), the signal 150 has a frequency of f_camer+ fo. If the data to be transmitted

corresponds to a second logic value (e.g., "0"), the signal has a frequency of f_carrιer- fo.

Thus, the signal launched into the antennae 102 alternates between

frequencies of f_carπer+ fo and f_carπer -fo depending on the value of the data being transmitted. Note that in actual practice the transmitted signal 150 may have a profile 151 that is distributed over a range of frequencies in order to prevent large,

instantaneous changes in frequency. The carrier frequency f_carπer corresponds to the

particular wireless channel that the digital information is being transmitted within. For example, within the BLUETOOTH wireless system, f_carner corresponds to 2.402

Ghz for the first channel 110,. The difference between the carrier frequency and the frequency used to represent a logical value is referred to as the deviation

frequency fo.

Referring now to the heterodyne demodulator 106, note that the signal

received by antennae 103, may contain not only every channel within the frequency band of interest 111, but also extraneous signals (e.g., AM and FM radio

stations, TV stations, etc.) outside the frequency band 111. The extraneous signals are filtered by filter 113 such that only the frequency band of interest 111 is passed. The filter 113 output signal is then amplified by an amplifier 114. The amplified signal is directed to a first mixer 116 and a second mixer 117. A pair of downconversion signals dl(t), d2(t) that are 90° out of phase with respect

to each other are generated. A first downconversion signal dl(t) is directed to the

first mixer 116 and a second downconversion signal d2(t) is directed to the second

mixer 117. Each mixer multiples its pair of input signals to produce a mixer output

signal. Note that the transmitting modulator 105 may also have dual out of phase signals that are not shown in Figure 1 for simplicity. Transmitting a pair of signals that are 90° out of phase with respect to one another conserves airborne frequency space by a technique referred to in the art as single sideband transmission.

The frequency f_down of both downconversion signals dl(t), d2(t) is designed

to be f_camer - f_IF. The difference between the downconversion frequency f_down and the carrier frequency f_carπer is referred to as the intermediate frequency f_ff. Because it is easier to design filters 118a,b and 127a,b that operate around the intermediate

frequency, designing the downconversion that occurs at mixers 116, 117 to have an output term at the intermediate frequency f_ff enhances channel isolation.

The mixer 117 output signal may be approximately expressed as

kb_FSK(t)cos(2π f_carner t)cos(2;r f_downt). Eqn. 1

Note that Equation 1 is equal to

kb_FSK(t)[cos(2^ (f_camer - f_down)t)+cos(2π (f_came +f_down)t)] Eqn. 2

which is also equal to

kb_FSK(t)cos(2τr f_1Ft) + kb_FSK(t)cos(2τz; (f_αmer+f_doJt) Eqn. 3 using known mathematical relationships. The b_FSK(t) term represents a frequency

shift keyed form of the baseband signal (e.g., a signal that alternates in frequency

between +fo for a logical "\" and -fo for a logical "0"). The constant k is related to

the signal strength of the received signal and the amplification of amplifier 114.

For approximately equal transmission powers, signals received from a nearby

transmitting device are apt to have a large k value while signals received from a

distant transmitting device are apt to have a small k value.

Equation 3 may be viewed as having two terms: a lower frequency term

expressed by kb_FSK(t)cos(2τr f_IFt) and a higher frequency term expressed by

kb_FSK(t)cos(2π (f_carπer+f_down)t). Filter 118b filters away the high frequency term

leaving the lower frequency term kb_FSK(t)cos(2π f_IFt) to be presented at input 119 of

amplification stage 125. Note that, in an analogous fashion, a signal

^_Fsκ(^t)sin(2π f_IFt) is presented at the input 126 of amplification stage 170.

Amplification stage 125 has sufficient amplification to clip the mixer 117

output signal. Filter 127b filters away higher frequency harmonics from the

clipping performed by amplification stage 125. Thus, amplification stage 125 and

filter 127b act to produce a sinusoidal-like waveform having approximately

uniform amplitude for any received signal regardless of the distance (e.g., k factor)

between the transmitting device and the receiving device.

After filter 127, a signal s(t) corresponding to Ab_FSK(t)cos(2 r f_IFt) is presented

to the frequency to voltage converter 128 input 129 (where A reflects the uniform

amplitude discussed above). The spectral content S(f) of the signal s(t) at the frequency to voltage converter 128 input 129 is shown at Figure 1. The signal s(t)

alternates between a frequency of f_IF + fo (for a logical value of "1") and a

frequency of f_IF - fo (for a logical value of "0"). The spectral content S(f) of the

signal s(t) at the frequency to voltage converter 128 input 129 is mapped against

the transfer function 160 of the frequency to voltage converter 128 in order to

reproduce the baseband signal b(t) at the demodulator output.

Frequency Synthesis

Referring back to the pair of downconversion signals dl(t), d2(t) that are

directed to mixers 116, 117, recall that the downconversion signals dl(t) and d2(t)

should have a downconversion frequency f_down equal to f_camer -f_IF for each of the

channels 110, through 110₇₉. For example, for an intermediate frequency f_IF of

3Mhz, the frequency synthesizer 140 is responsible for generating a frequency of

2.399 Ghz in order to receive the first channel 110, (i.e, f_camer -f_IF = 2.402 - 0.003 Ghz =

2.399Ghz); a frequency of 2.400 Ghz in order to receive the second channel 110,; a

frequency of 2.401 Ghz in order to receive the third channel 110₃; . . . etc., and a

frequency of 2.477 Ghz in order to receive the 79^th channel 110₇₉. A channel select

input 141 presents an indication of the desired channel to the frequency

synthesizer 140.

Both the transmitting device 165 and the receiving device 166 typically have

a frequency synthesizer. A frequency synthesizer 140 is shown in the receiving

device 166 (but not the transmitting device 165 for simplicity). Frequency

synthesizers typically create their output signals by multiplying a reference frequency (such as the frequency of a local oscillator). As seen in Figure 1, frequency synthesizer 140 multiplies the frequency of local oscillator 142 to

produce downconversion signals dl(t) and d2(t). For example, for a local oscillator

142 reference frequency of 13.000 MHz, frequency synthesizer 140 should have a multiplication factor of 184.53846 to produce downconversion signals dl(t), d2(t) used to receive the first channel 110, (i.e., 184.53846 x 13.000MHz = 2.399 GHz).

A problem with wireless technology involves deviation from the "designed

for" carrier f_camer and /or downconversion f_down frequencies (e.g., from non zero

tolerances associated with the local oscillator 140 reference frequency). As either (or both) of the carrier and /or downconversion frequencies deviate from their

"designed for" values, offsets may be observed in the baseband signal b(t) at the demodulator 106 output.

Figure 2a shows a baseband signal 250 if the carrier and downconverting

frequencies are ideal. As discussed above, the spectral content 253 of the signals produced by filters 127a,b will be centered at the intermediate frequency f_ff. Since

the origin 250 of the frequency to voltage converter transfer curve 260 is centered at the intermediate frequency f_IF, the output signal 250 has no offset (e.g., has an offset positioned at O.Ovolts)

Errors in the carrier and /or downconversion frequency, however, will cause

the spectral content of the signals produced by filters 127a,b to be centered at an offset 254 from the intermediate frequency f_ff. That is, because f_ff in equation 3 corresponds to f_carner - f_down, if either f_carrιer or f_down (or both) are in error the value of f_IF in equation 3 does not correspond to the designed for i_w value (e.g., 3Mhz) that is centered at the origin of the transfer curve 260. As such, the baseband signal 255 will have an offset 256 with respect to O.Ovolts. SUMMARY OF INVENTION

A method that involves tracking the maximum peaks of a signal and tracking the minimum peaks of a signal. Then, calculating the midpoint between the maximum and minimum peaks and thresholding the signal against the midpoint. BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example, and not limitation, in the Figures of the accompanying drawings in which:

Figure 1 shows an embodiment of a demodulator;

Figure 2a shows a demodulator output signal without an offset;

Figure 2b shows a demodulator output signal with an offset;

Figure 3 shows a packet sent from a transmitting device to a receiving device;

Figure 4 shows an embodiment of a receive channel within the receiving device of Figure 3;

Figure 5a shows a pair of dislike synchronization words; Figure 5b shows a correlation peak for the pair of dislike synchronization words of

Figure 5a;

Figure 5c shows a pair of like synchronization words;

Figure 5d shows a correlation peak for the pair of like synchronization words of

Figure 5c;

Figure 6 shows correct and incorrect digital symbol signals for a baseband signal;

Figure 7 shows a digital symbol signal produced by a peak tracking approach;

Figure 8 shows an embodiment of a sheer that employs a peak tracking approach;

Figure 9a shows a method that may be employed by a peak tracking unit;

Figure 9b shows an embodiment of a positive peak tracker;

Figure 10 shows an embodiment of peak tracking as accomplished via envelope

detection; and

Figure 11 shows an embodiment of receive channel that employs both peak

tracking and averaging for slicing a baseband signal.

DETAILED DESCRIPTION

A method is described that involves tracking the maximum peaks of a

signal and tracking the minimum peaks of a signal. Then, calculating the midpoint

between the maximum and minimum peaks and thresholding the signal against said midpoint. An apparatus is described having a maximum peak tracking unit

for tracking the maximum peaks of a signal and a minimum peak tracking unit for

tracking the minimum peaks of a signal. The apparatus further includes a

midpoint calculator unit that receives the maximum tracked peaks and the

minimum tracked peaks to determine the midpoint between the maximum and

minimum tracked peaks. The apparatus also includes a comparator that receives

the signal and the midpoint.

Various forms of wireless communication techniques (e.g., Code Division

Multiple Access (CDMA) based schemes such as BLUETOOTH) rely on the ability

of a receiving device to determine whether or not received information is intended

for the receiving device or some other device. For example, in BLUETOOTH based

schemes, each piconet master that participates in a wireless network has a unique

code.

Figure 3 shows an example of a BLUETOOTH packet structure 320. The

packet may be viewed as having two parts: 1) an access code 325; and 2) the

remainder of the packet 360. The remainder of the packet 360 typically includes a

packet header and the random "customer" data the packet is responsible for

transporting. The access code 325 is unique to the piconet master for the

connection between the transmitting device 365 and the receiving device 366. In

BLUETOOTH applications, the access code 325 includes a 4 bit preamble 321, a 64

bit synchronization word 322, and a 4 bit postamble 323. The synchronization word 322 (which may also be referred to as a synch

word, synchronization code, synch code, and the like) is unique to the piconet

master used in the connection. Upon the reception of a packet at the receiving

device 366, the receiving device 366 "checks" the synchronization word 322

embedded within the packet. If the synchronization word 322 matches a pseudo

random sequence unique to the piconet master for a connection that includes the

receiving device 366, the receiving device 366 understands that the incoming

information is intended for the receiving device 366.

Figure 4 shows an embodiment of the functional blocks within a receiving

device that may be used to perform the above described synchronization word 322

check. Figure 4 shows a receive channel 490 having a demodulator 406 followed

by a plurality of functional components. That is, demodulator 406 may be viewed

as corresponding to the demodulator 106 shown in Figure 1 (however, other

demodulator designs are possible). An analog to digital converter 401 receives the

demodulator 406 output signal 455. The demodulator 406 output signal 455

corresponds to the baseband signal 255 shown in Figure 2b and may also be

referred to as a baseband signal 455.

As seen in Figure 4, an analog to digital converter 401 (which may also be

referred to as an A/D converter) receives the analog baseband signal 455 from the

demodulator 406. The analog baseband signal 455 may be filtered, amplified (or

processed in other ways) between the demodulator 406 output and the A/D

converter 401 input. For purposes of discussing exemplary embodiments, the analog baseband signal 455 (as it exists prior to processing by the A/D converter

401) may be viewed as an analog signal because of the linear nature of the

demodulator's operation. For example, notice that the frequency to voltage

conversion 160 associated with the frequency to voltage converter 128 of Figure 1

is performed over a continuous range of both input frequencies and output

voltages.

The analog to digital converter 401 is responsible for converting the analog

baseband signal 455 into a series of words having values representative of the

analog baseband signal waveform. Words are a plurality of bits (where the

number of bits may be given generically as "n"). An A/D converter 401 output

word may also be referred to as a sample, an output sample, an output word

sample, and the like.

A/D converters perform analog to digital conversion by a technique known

as "oversampling". Oversampling involves sampling an analog input signal 455 at

a rate higher than the bit rate of the analog signal 455. A bit rate is the rate that a

signal's Is and 0s are propagated. Thus, referring to the analog baseband signal

455 of Figure 4, the bit rate is approximately equal to the inverse of the time T that

separates the position of neighboring bit symbols. Comparing signals 455 and 403,

note that the A/D converter output signal 403 represents a sampling of the

baseband signal 455 at periodic moments in time tO, tl, t2, etc. spaced apart by Dt.

Dt therefore corresponds to the time between samples. Noting that the A/D converter 401 has a sampling clock 405, the A/D

converter 401 samples (i.e., effectively measures) the voltages of the analog

baseband signal 455 at the rate of the sampling clock 405 (or a multiple thereof). In

current BLUETOOTH applications, for example, the frequency of the sampling

clock 405 is based upon a known baseband signal 455 bit rate of 1 Megabit/s (i.e.,

T=lmicro sec). For an 8:1 oversampling rate, 8 samples are taken per baseband

signal 455 symbol.

The precision of the A/D converter output signal 403 (i.e., how closely it

resembles the baseband signal 455) improves as the speed of the sampling clock

405 increases. That is, as more samples are taken per unit time (i.e., Dt narrows)

the A/D converter 401 is able to "pick up", rather than fail to notice, sudden

changes in the analog baseband signal 455.

The resolution at which an A/D converter 401 distinguishes between

different analog input levels is limited. For example, if the word length n of the

A/D converter output word corresponds to a six bit word line, the A/D converter

401 can resolve the analog baseband 455 signal's possible voltages to a precision of

64 different levels (i.e., 2⁶ = 64). Each of these different levels are represented by a

different digital word value in the A/D converter 401 output signal 403. Note that

other word line sizes (e.g., eight bits) are also possible.

The A/D converter output signal 403 is provided to a slicer unit 410. The

slicer unit 410 converts the A/D output signal 403 into samples of recovered

symbols. That is, note that the pulses 411a,b, 412a,b, 413a,b observed in both the baseband signal 455 and the A/D converter output signal 403 are representative of

Is or 0s being transmitted from the transmitting device to the receiving device (as

discussed in the background with respect to the frequency shift keyed approach).

The slicer unit 410 effectively identifies the presence of each pulse 411a,b,

412a,b, 413a,b and reports the binary value (i.e., a "1" or a "0") of each A/D

converter output sample to the correlator 421 (as seen in the slicer output signal

422 of Figure 4). The slicer unit 410 may be designed to make a determination of

the average value of the A/D output signal 403 and threshold the individual

values of the A/D converter output signal 403 against this average value.

Figure 4 shows an example. The average value of the A/D converter output

signal 403 is seen at word value level 417. The slicer unit 410 determines this level

417 based upon the observed data stream from the A/D converter 401 (e.g., by

continually averaging its output values). The slicer unit 410 converts A/D output

values into "l"s or "0"s based upon their position with respect to the threshold

level 417.

That is, A/D converter output signal 403 values above the threshold level

417 are given a value of "1" by the slicer unit 410 while A/D converter output

signal 403 values below the threshold value 417 are given a value of "0" by the

slicer unit 410. The activity of deciding whether a signal is a "1" or a "0" based

upon its level with respect to a reference (such as threshold 417 mentioned above)

may be referred to as slicing, thresholding, comparing and the like. The slicer unit

output signal 422 is shown in Figure 4. Note that it traces a digital symbol signal 424 which is shown in Figure 4 for conceptual ease. Digital symbol signal 424 does

not need to actually exist at the slicer 410 output.

Referring briefly back to Figure 3, recall that a receiving device 366 (in order

to understand whether or not the received information is intended for the

receiving device 366) compares a synchronization word 322 that is unique to the

receiving device against a code 322 that is embedded within the received

information. Referring back to Figure 4, once the slicer unit 410 effectively

recovers the received information in the form of "l"s and "0"s, (e.g., as

represented by signals 412 and 414), the correlator unit 421 is used to "check" the

received synchronization word against the synchronization word that is unique to

the piconet master of the receiving device's connection. Because the slicer unit

output signal 422 (which also may be viewed as digital symbol signal 424) is a

representation of the specific sequence of Is and 0s being sent by the transmitting

device to the receiving device, the slicer output signal 422 will reproduce the

synchronization word that is embedded within the received information.

The correlator unit 421 performs a correlation between the received

synchronization word and the synchronization word that the receiving device is

"looking for". A correlation employs a mathematical process (e.g., a

"convolution") which may be implemented with electronic circuitry or software.

The correlation provides a measurement of the likeness between two signals. The

received synchronization word from the slicer unit 410 is correlated with the synchronization word that is unique to the piconet master of the receiving device's

connection.

This helps the receiving device understand their likeness with respect to one

another. If they are deemed to have an acceptable amount of likeness, the

synchronization words are deemed to be the same and the received information is

regarded as being intended for the receiving device. More elaboration on

correlation may be found in a U.S. Patent entitled Method and Apparatus for

Comparator Tree Structure for Fast Acquisition of Offsets Induced in a Wireless

Receiver and a U.S. Patent entitled Method and Apparatus for Identifying a Pre-

Determined Pattern From a Received Signal Via Correlation, both filed on

September 27, 2000.

Figures 5a through 5d show an example in greater detail. Figure 5a shows a

portion of an exemplary received synchronization word 501 and an exemplary

synchronization word 502a that is unique to the receiving device connection. A

corresponding correlator output waveform 503a for these two codes 501, 502a is

provided in Figure 5b. From observation of Figure 5a, codes 501 and 502a are

clearly dissimilar. As a result, a low correlation peak 505a is observed in the

correlator output waveform 503a of Figure 5b.

Figure 5c shows another exemplary received synchronization word 504 and

an exemplary synchronization word 502b that is unique to the receiving device

connection (which is the same as code 502a shown in Figure 5a). A corresponding

correlator output waveform 503b for these two codes 504, 502b is provided in Figure 5d. From observation of Figure 5c, codes 504 and 502b are clearly similar.

As a result, a high correlation peak 505b is observed in the correlator output

waveform 503b of Figure 5d.

The differences between the synchronization words 504 and 502b (e.g.,

differences 506, 507, 508 and 509) of Figure 5c are due to the non-ideal aspects of

the slicer output signal 413, 414 shown back in Figure 4. That is, recalling that the

A/D converter 401 "approximates" the analog baseband signal 455 through

oversampling and that the slicer unit 410 attempts to recover the transmitting

device's original baseband signal, some margin of error between the received

digital symbols 504 and the transmitter's original baseband signal are expected.

Thus, if an "ideal" representation of the unique receiver synchronization

word 502a,b is used for the correlation described above (i.e., a representation

having no errors resulting from the approximations and /or recovery attempts

made by the A/D converter 401 or slicer unit 410 of Figure 4), a less than perfect

correlation result is not only expected but also deemed acceptable in typical

applications. The amount of allowable imperfection may vary from application to

application, thus it is important to point out that the particular differences 506, 507,

508, and 509 of Figure 5 are examples chosen for ease of illustration and

understanding.

A perfect correlation (i.e., when the compared signals are absolutely

identical) results in correlator output waveform having a maximum amplitude,

zero width spike. Such a spike 510a,b is superimposed on the correlator output waveforms of Figures 5b and 5d for ease of understanding. The better the

correlation between the two synchronization words the more the correlator output

waveform begins to resemble a maximum amplitude, zero width spike 510a,b.

Thus note that the "better" correlation output waveform 503b of Figure 5d has a

spike having higher amplitude and narrower width (i.e., more resembles spike

510b) than the "worse" correlation output waveform peak 505 of Figure 5b.

Typically, a peak threshold level (and /or pulse width) in the correlator

output waveform is used (in light of the tolerances and acceptable margins of error

in the slicer output waveform discussed above) to identify whether or not the

received code "matches" the code that is unique to the receiving device. An

exemplary peak threshold level 511a,b is shown in Figures 5b and 5d.

Because the peak 505a of the waveform in Figure 5b is below the threshold

511a, the received code 501 of Figure 5a will be deemed as not matching the

synchronization word that is unique to the receiving device connection. Similarly,

because the peak 505b of the waveform in Figure 5d is above the threshold 511b,

the received code 504 of Figure 5c will be deemed as matching the synchronization

word that is unique to the receiving device connection. As such a packet having

the synchronization word 501 of Figure 5a will not be recognized or formally

received by the receiving device while a packet having the synchronization word

504 of Figure 5c will be recognized and formally received by the receiving device.

Recall from the discussion of Figure 2b in the background that frequency

synthesis errors can cause an offset in the baseband signal. These offsets can cause problems with the channel described above. Specifically, the threshold calculation performed by the slicer unit 410 of Figure 4 may not be able to respond fast enough to a sudden change in offset when the baseband signal 455 arrives.

As a result, during the arrival of a packet's initial symbols, the slicer unit 410 employs an incorrect threshold level 417 to the A/D converter output signal 403. The slicer unit 401 correspondingly produces an incorrect symbol representation of

the baseband signal. The result may be that identical codes produce a low

correlation peak and the receiver device mistakenly determines that a packet

actually sent to the receiving device is deemed as a packet being sent to another device.

Figure 6 shows the problem in more detail. Figure 6 shows the initial moments of a baseband signal 655 (as viewed from the output of an A/D

converter). In Figure 6, a packet of information sent by a transmitting device arrives at the receiving device at time TO. A corresponding offset 656 in the

baseband signal 655 is observed. Note that a grace period Tg may exist between the moment that a packet actually arrives TO and the moment Tx that a change in offset is first observed.

This grace period Tg typically results from a latency designed into the transmitting device between the moment that the carrier frequency f_carner begins to be transmitted and the moment the baseband signal (i.e., the packet) begins to be modulated. Typically, in order to ensure that the entire packet is reliably sent, the transmission of the baseband signal is delayed by Tg after the carrier frequency

C earnn-err is enabled.

Prior to time Tx, the A/D converter produces digital words representative

of a constant voltage level 601 with some superimposed noise energy. Assuming

the slicer unit calculates its threshold by averaging the A/D converter output

signal, the slicer unit will continually average over constant voltage level 601 to

produce a thresholding level 612 (e.g., analogous to the average value level 417 of

Figure 4) that is approximately equal to voltage level 601 during this time period.

Accurate averaging typically involves averaging over a large number of

prior samples. As such, the more accurate the slicer unit (in terms of calculating an

average value level 612), the slower it will be able to respond to the sudden change

in offset when the packet arrives. That is, even though after time TO the baseband

signal is at an offset 656, the values corresponding to level 601 will still have

weight in the sheer's averaging procedure. Thus, after time TO, the slicer will

consume an amount of time Tl before its average value determination reaches the

offset 656 of the arriving packet symbols.

During this time period Tl, the symbols of the packet are either

substantially above or below the sheer's threshold level 612 depending on the

polarity of the offset 656 (note that in the particular case shown in Figure 6, they

are above it). As such during time period Tl, the slicer will improperly threshold

the received packet symbols. In the particular case of Figure 6, the symbols over the course of time period

Tl will mostly be given a value of "1" since they are mostly above the threshold

level 612. The corresponding digital symbol signal 614 (which is analogous to

digital symbol signal 424 in Figure 4) is shown in Figure 6. Because the slicer unit

is not able to respond to the sudden change in offset, the slicer unit will present the

correlator unit with binary samples representative of signal 614 which possesses a

significant amount of error (as compared to the "correct" slicing of the A/D

converter output signal shown at signal 615). As such, the correlation peak may be

low and the receiving device may improperly decide the packet was intended for

another receiving device.

Figures 7 and δrelate to an embodiment 800 of an improved slicer design

that effectively bases its threshold on the midpoint between the peaks of the

baseband signal rather than upon a continuously calculated average value.

Because the slicer tracks the midpoint of the baseband signal rather than simply

average its value over time, the slicer embodiment 800 of Figure 8 is able to quickly

respond to sudden changes in the offset of the baseband signal.

Note that the slicer embodiment 800 of Figure 8 does not require the use of

an A/D converter. That is, referring to Figures 4 and 8, the slicer embodiment 800

of Figure 8 may be used to slice an analog demodulator output signal 455 directly

without being converted to a digital word sequence beforehand by an A/D

converter 401. In this case, the output of the slicer 800 embodiment of Figure 8

may be sampled such that a sequence of samples (e.g., as represented by slicer output signal 422) are presented to the input of a correlator. Although an A/D

converter 401 is not required, however, the slicer embodiment of Figure 8 may still

be used with an A/D converter if configured to receive digital words at its input

rather than an analog signal.

Figure 7 shows an analog baseband signal 755 that causes a sudden change

in offset voltage during the arrival of a packet. The signal 755 of Figure 7 will be

used to develop an understanding of the peak tracking undertaken by the

improved slicer design 800 of Figure 8. Figure 7 shows an exemplary positive peak

track X and negative peak track Y for the signal 755 of Figure 7.

Positive and negative peak tracking is the formation of a pair of signals that

trace or approximately trace the maximum and minimum amplitude peak levels of

a signal, respectively. Thus, positive peak tracking may be alternately phrased as

maximum peak tracking while negative peak tracking may be alternately referred

to as minimum peak tracking. In the embodiment 800 of Figure 8, positive peak

tracking is performed by the positive peak tracking unit 801while negative peak

tracking is performed by the negative peak tracking unit 802.

In one approach, the peak tracking units 801, 802 are absolute peak tracking

units. Absolute peak tracking involves capturing or otherwise holding onto the

highest and lowest levels of a signal. For example, during absolute positive peak

tracking, if a new maximum level is observed (i.e., a level greater than the

previously observed maximum), an absolute positive peak tracker 801 will

effectively replace the previous maximum with the new maximum. This new maximum is held until another maximum that is greater than the new maximum is

observed.

Similarly, during absolute negative peak tracking, if a new minimum level

is observed (i.e., a level less than the previously observed minimum), an absolute

negative peak tracker will replace a previous minimum with the new minimum.

This new minimum is held until another minimum that is less than the new

minimum is observed. The following discussion concerns the operation of an

improved slicer that employs absolute positive and negative peak tracking units.

It should be understood, however, that other peak tracking unit approaches are

possible. Some of these are discussed in more detail further below.

Referring to Figures 7 and 8, note that during the time prior to time Tx (i.e.,

before an offset 756 begins to be observed), the maximum and minimum peak

levels will be at or near the DC output level 750 of the demodulator. During this

time period both the positive and negative peak levels are presented as inputs to a

midpoint calculator unit 803. The midpoint calculator unit 803 determines the

midpoint between these levels (i.e., executes the function (X+Y)/2 where X is the

positive peak tracking unit 801 output and Y is the negative peak tracking unit 802

output). The midpoint MP between positive and negative peak levels that are

positioned at or near level 750 will similarly be positioned at or near level 750.

After time Tx, an offset 756 begins to be observed in the baseband signal

755. For the positive offset 756 seen in Figure 7, the positive peak tracking unit 801

output signal (i.e., the positive peak track X) tracks the baseband signal 755 while the negative peak tracking unit 801 output Y (i.e., the negative peak track Y of

Figure 7) remains unchanged at level 750. The midpoint level MP between the

positive and negative tracks X,Y (as calculated by the midpoint calculator 803) is

seen in Figure 7.

The midpoint level MP between the peak tracking levels X,Y is continually

adjusted in light of the tracking performed by the positive peak tracking unit 801.

Note that the midpoint MP is presented to the input of a comparator 805. The

midpoint level MP is used as a threshold against which the binary value of the

baseband signal 755 is determined. The digital symbol signal 714 produced by the

comparator 805 is shown in Figure 7.

Once the baseband signal 755 begins to swing from the first symbol peak

780 to the second symbol peak 781, the positive peak tracking unit 801 will hold

the positive peak track X at level 714 (because that is the maximum signal observed

by the positive peak tracker 801). This causes the midpoint level (i.e., the midpoint

level MP) to be held at level 721 as shown (which is at or near the offset 756).

When the midpoint MP approximately reaches the offset 756 (e.g., at level 721) the slicer properly determines the remaining symbols as seen in the digital

signal symbol signal 724. The slicer embodiment of Figure 8 therefore begins to

produce a correct symbol representations before the averaging slicer discussed

with respect to Figure 6. As such, when a packet arrives that has the proper

synchronization word, use of the improved slicer embodiment 800 of Figure 8 will

produce a higher correlation peak (recalling the discussion of correlation peaks presented in Figures 5a through 5d) than the correlation peak produced by a

receive channel having a prior art slicer.

It is important to point out that although the received signal 755 of Figure 7

has a positive offset 756 and a first symbol value of "V, the improved slicer design

800 works with negative offsets and /or a first symbol value of "0". In any of these

cases, the manner in which the midpoint reaches the offset is similar to the manner

described above.

Note that in the exemplary depiction of Figure 7, the amplitude Al of the

baseband signal 755 is equal to the offset 756. In an embodiment, the amplitude Al

of the baseband signal 755 is designed to be greater than or equal to the "worst

case" offset that the receiving device is designed to handle. Designing the

amplitude Al to be greater than or equal to the worst case offset allows the

minimum or maximum symbol peaks (e.g., minimum symbol peak 781) to reach

the DC output level 750 of the demodulator. A such, the peak tracking units 801,

802 will track the symbol peaks for any "worst case or better" offset 756.

Referring to Figures 2a,b and 7, note that the amplitude Al of the baseband

signal is established by the deviation frequency fo. That is, an expression of the

amplitude Al of the baseband signal may be simplified as-Kfo (where K is the

voltage to frequency conversion 260 (in Volts /Hz ) performed by the frequency to

voltage converter 128 over an approximately linear region). For a worst case

allowable offset 256, 756 of Z volts, the amplitude of the baseband signal 755 (i.e., its longest span from the offset to a symbol peak maximum or minimum) is

designed to be greater than or equal to Z. That is, Al = Kfo > Z.

The frequency offset 254 (associated with frequency synthesis errors as described in the background) shown in Figure 2b may also be expressed as Δ f .

The "worst case" baseband signal offset 256, 756 may therefore be also be expressed as Z ~ KΔf_max where Δf_max corresponds to the "worst case" allowable

frequency offset 254 that the receiving device can handle. From above then, Al > Z corresponds to f o > Δ f_max. Thus, in an embodiment, the slicer approach of Figure 8 may be used provided the worst case frequency offset Δ f_max is less than

the deviation frequency fo.

Figures 9a and 10 relate to methodologies that may be used for the positive

peak tracking unit 801 of Figure 8. The methodologies may be used by digital or analog circuitry depending on the input provided by the slicer 800. Figure 9b

shows a possible embodiment for an analog absolute positive peak tracking unit. Digital positive peak tracking units are also possible.

Figure 9a shows a methodology 901a for the absolute positive peak tracking

units 801 discussed above. Here, for any new input value received by the absolute positive peak tracking unit 801, the new input value is compared 903 against the

maximum value observed from the prior input values (i.e., the maximum observed value). A default value of 0.0 may be used for the initial maximum observed value. If the new value is greater than the maximum observed value, the

maximum observed value is set 906 equal to the new value. The maximum observed value is then presented at the output of the

absolute positive peak tracking unit and fedback to perform a next comparison for

the next new input value. If the new input value is less than the maximum observed value, the maximum observed value remains unchanged 907. The

maximum observed value is then presented as the output of the absolute positive peak tracking unit and also fedback to perform a next comparison for the next new

input value.

Figure 9b shows one of many possible analog (or mixed signal) absolute

positive peak tracker embodiments 901b. An analog input voltage is presented to the + input node of an open loop amplifier 920. The maximum observed value is presented as the peak tracker output which is also fedback to the - input node of the open loop amplifier 920. If the input voltage is greater than the maximum

observed value, the amplifier 920 output swings to its high power supply rail

which turns transistor Ql "on" and enables a new sampling of the input by a sample and hold circuit 921.

By turning transistor Ql "on" and enabling a new sampling of the input by the sample and hold circuit 921, the input voltage is effectively "latched" (i.e., held onto) by the sample and hold circuit 921. The sample and hold circuit 921 may

employ analog to digital conversion so that the maximum observed value can be held indefinitely. Digital to analog conversion may then be performed afterward

to provide an analog maximum observed value. If the input voltage is less than the maximum observed value, the amplifier

920 output swings to its low power supply rail which turns transistor Ql "off" and

prohibits any new sampling of the input by the sample and hold circuit 921. As

such, the sample and hold circuit 921 continues to hold onto the pre-existing

maximum observed value.

Other positive peak tracking techniques are possible including digital

techniques. A negative absolute peak tracking unit may be configured by

"switching" the amplifier 920 inputs as they appear in Figure 9b. That is, the input

is coupled to the - input node of the amplifier and the minimum observed value

(which replaces the maximum observed value) is presented to the + input node of

the amplifier 920. The methodology 901a of Figure 9a may also reflect the process

of a negative peak tracker if the term "maximum observed value" is replaced by

"minimum observed value" and the greater than symbol ">" is replaced by a less

than symbol "<".

Other peak tracking techniques besides absolute peak tracking may also be

employed. Figure 10 shows an alternate peak tracking embodiment 1000, referred

to as envelope detection. A positive envelope detector tracks a signal 1001 while it

is increasing until it reaches a relative maximum 1002. After the relative maximum

1002 is reached and the signal 1001 begins to fall, the positive envelope detector

output signal 1010 decays over time until the signal 1001 returns to a level that

reaches the decayed envelope detector output signal level (e.g., at point 1003).

From here, the positive envelope detector tracks the signal 1001 again until it falls from another relative maximum 1004. The output signal 1011 of a negative envelope detector peak tracking unit is also shown in Figure 10. Envelope detectors are known in the art and may be formed in various ways. For example, an envelope detector may be constructed (as just one case) by coupling a capacitor

in series with a resistor and capacitor that are in parallel with one another (i.e., an

RC circuit).

A peak tracking slicer may be more sensitive to the amount of noise in the channel , as compared to an averaging slicer, because it tracks a signal's peak

rather than average the signal over time. For example, an abnormal positive noise

spike on a tracked signal could be recorded by a peak tracking unit 801, 802 as a

maximum value of the received signal. This could distort the recorded amplitude

swings of the received signal (such that the calculated midpoint deviates from the true offset of the received signal).

A slicer that effectively averages the baseband signal in order to determine

the threshold level is less susceptible to noise. That is, the previous A/D converter

output values used for the average effectively act as a weight that prevents sudden

changes in the calculated average value. Figure 6 referred to another aspect of the same characteristic. That is, the prior art slicer was not able to suddenly change its average value in response to the offset of the newly arriving baseband signal.

Thus a tradeoff is apparent between a slicer that effectively averages the

baseband signal (i.e., an "averaging slicer") and an improved slicer that tracks the peaks of the baseband signal. Although averaging slicers are too slow to respond to a sudden change in offset, they may be more apt (than the peak tracking slicer

approach of Figure 8) at determining the precise offset of a noisy received signal.

Similarly, although the accuracy of a peak tracking slicer approach is more

sensitive to the noisiness of the baseband signal, it is able to rapidly calculate an

"accurate enough" thresholding level in response to a sudden change in offset.

In order to maximizing the amplitude of the correlation peak 505b discussed

with respect to Figure 5d (for a packet having the receiver connection's unique

synchronization word), both of the slicer approaches discussed above may be used

for the reception of a packet. Specifically, a peak tracking approach (as shown

with respect to Figures 7 and 8) may be used during the initial moments of a

packet's arrival until an amount of time passes (e.g., time Tl in Figure 6) that

allows an averaging slicer to adjust its calculated average value to the offset of the

baseband signal. After this period of time, the averaging slicer is used to slice the

baseband signal. As such, the receive channel "switches over" from the peak

tracking slicer to the averaging slicer over the course of a received packet.

Better said, because an averaging slicer will produce incorrect data for a

period of time after a sudden change in offset level (resulting in a lower correlation

peak) as discussed with respect to Figure 6, the improved peak tracking slicer is

used instead of the averaging slicer during the initial time period of a packet's

arrival. Once the averaging slicer has encountered enough samples to produce an

average value that is near the received signal's offset level (e.g., after the time period Tl elapses as seen in Figure 6), the averaging slicer is used to determined

the thresholding level rather than the peak tracking slicer.

This approach should maximize the number of correct symbol

representations produced by the slicer. That is, incorrect symbol representations

resulting from the slow response of an averaging slicer are avoided while incorrect

symbol representations resulting from noise that distrubs the peak tracking slicer

are avoided. Figure 11 shows a possible design embodiment. Both a peak tracking

slicer 1110a and an averaging slicer 1100b are coupled to the input of a correlator

1121 through a multiplexer 1104.

Both slicers may be configured to present sampled outputs (similar to slicer

output signal 422 of Figure 4) to the correlator 1121. Note that averaging slicer

1110b may be replaced by a slicer that determines the slicing threshold via a

feedback approach rather than a feedforward approach. Note also that the peak

tracking slicer, in this embodiment, operates in the digital domain because it

accepts A/D converter 1101 output samples. The channel select 1105 of the

multiplexer 1104 is initially set to select the output of the peak tracking slicer

1110a.

After a signal is detected by a signal detect unit 1106, a comparison circuit

1107 is enabled that compares the midpoint MP used by the peak tracking slicer

1110a and the threshold TH used by the averaging slicer 1110b. When the

averaging sheer's thresholding value TH comes within a specified range (e.g.,

within 15% as just one example - other embodiments may be larger than 15%) of the peak tracker's midpoint value MP, the comparison circuit 1107 triggers the

multiplexer 1104 to feed the correlator 1121 with the averaging slicer's data rather

than the peak tracking slicer's data.

The purpose of the signal detect unit 1106 in this embodiment is to allow the comparison by the comparison circuit 1107 to have an effect only after a packet arrives. Before a packet arrives, random noise may be on the channel causing both

slicer's to have approximately equal midpoint MP and threshold TH values (i.e.,

the averaging slicer's threshold TH will be within the specified range of the peak tracking slicer's midpoint MP).

It is important to point out that the discussion above is applicable to other

applications besides packet reception for a BLUETOOTH device. The teachings above may be applied to any receiver desiring to identify a particular data

sequence (i.e., a predetermined pattern). That is, sequences other than a synchronization word within a BLUETOOTH packet may be "found" (e.g., via

correlation) by techniques similar to those described above.

Furthermore, it is also important to note that the present teachings may be used to detect any predetermined pattern from a signal having a sudden offset.

Thus, the present teachings are also applicable to other frequency shift keyed wireless technologies besides BLUETOOTH such, as just a few examples, HomeRF, IEEE 802.11, GSM and Digitally Enhanced Cordless Telephony (DECT).

Embodiments of the present discussion may be manufactured as part of a

semiconductor chip (e.g., by a planar semiconductor manufacturing process). Note also that embodiments of the present description may be implemented not only as

part of a semiconductor chip but also within machine readable media. For

example, the designs discussed above may be stored upon and /or embedded

within machine readable media associated with a design tool used for designing

semiconductor devices. Examples include a netlist formatted in the VHSIC

Hardware Description Language (VHDL) language, Verilog language or SPICE

language. Some netlist examples include: a behavioral level netlist, a register

transfer level (RTL) netlist, a gate level netlist and a transistor level netlist.

Machine readable media also include media having layout information such as a

GDS-II file. Furthermore, netlist files or other machine readable media for

semiconductor chip design may be used in a simulation environment to perform

the methods of the teachings described above.

Thus, it is also to be understood that embodiments of this invention may be

used as or to support a software program executed upon some form of processing

core (such as the CPU of a computer) or otherwise implemented or realized upon

or within a machine readable medium. A machine readable medium includes any

mechanism for storing or transmitting information in a form readable by a

machine (e.g., a computer). For example, a machine readable medium includes

read only memory (ROM); random access memory (RAM); magnetic disk storage

media; optical storage media; flash memory devices; electrical, optical, acoustical

or other form of propagated signals (e.g., carrier waves, infrared signals, digital

signals, etc.); etc. In the foregoing specification, the invention has been described with

reference to specific exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention as set forth in the appended

claims. The specification and drawings are, accordingly, to be regarded in an

illustrative rather than a restrictive sense.