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Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

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Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

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Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
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Применить Всего найдено 1082. Отображено 100.
05-01-2012 дата публикации

Method to Protect Compound Semiconductor from Electrostatic Discharge Damage

Номер: US20120003762A1
Автор: CHANG LIANN-BE, Lin Cheng-Chen
Принадлежит:

A method to protect compound semiconductors from electrostatic discharge (ESD) damage, includes several processes as following: (a) forming a light emitting diode semiconductor over a substrate, in which the light emitting diode semiconductor has multi-layer structure and a first and a second electrodes; (b) forming a conductor-insulator-conductor (CIC) layers capacitance flip chip substrate including a first and a second conductive layers, and an insulator layer made of high-K material, in which the insulator layer is formed between the first and the second conductive layers, and there are a third and a fourth electrodes on the conductor-insulator-conductor layers substrate; and (c) electrically connecting the first electrode and the second electrode of the light emitting diode semiconductor to the third electrode and the fourth electrode of the conductor-insulator-conductor layers capacitance flip chip substrate, respectively, to effectively prevent from electrostatic discharge damage. 1. A method to protect compound semiconductors from electrostatic discharge damage , including several processes as following:forming a light emitting diode semiconductor over a substrate, in which the light emitting diode semiconductor has multi-layer structure and a first and a second electrodes;forming a conductor-insulator-conductor (CIC) layers capacitance flip chip substrate including a first and a second conductive layers, and an insulator layer made of high-K material, in which the insulator layer is formed between the first and the second conductive layers, and there are a third and a fourth electrodes on the conductor-insulator-conductor layers substrate; andelectrically connecting the first electrode and the second electrode of the light emitting diode semiconductor to the third electrode and the fourth electrode of the conductor-insulator-conductor layers capacitance flip chip substrate, respectively.2. The method to protect compound semiconductors from electrostatic ...

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Номер записи: 1
12-01-2012 дата публикации

CONDUCTIVE BUMP FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE

Номер: US20120007230A1
Автор: Huang Ying-Jui, Hwang Chien Ling, Lei Yi-Yang, Lim Zheng-Yi, Lin Cheng-Chung, Liu Chung-Shi
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

An embodiment of the disclosure includes a conductive bump on a semiconductor die. A substrate is provided. A bond pad is over the substrate. An under bump metallurgy (UBM) layer is over the bond pad. A copper pillar is over the UBM layer. The copper pillar has a top surface with a first width and sidewalls with a concave shape. A nickel layer having a top surface and a bottom surface is over the top surface of the copper pillar. The bottom surface of the nickel layer has a second width. A ratio of the second width to the first width is between about 0.93 to about 1.07. A solder material is over the top surface of the cap layer. 1. A semiconductor die comprising:a substrate;a bond pad over the substrate;an under bump metallurgy (UBM) layer over the bond pad;a copper pillar over the UBM layer, the copper pillar having a top surface with a first width and sidewalls with a concave shape;a nickel cap layer having a top surface and a bottom surface over the top surface of the copper pillar, the bottom surface of the nickel cap layer having a second width, wherein a ratio of the second width to the first width is between about 0.93 to about 1.07; anda solder material over the top surface of the nickel cap layer.2. The semiconductor die of claim 1 , wherein the solder material comprises lead free solder.3. The semiconductor die of claim 1 , further comprising a smooth interface between the conductive pillar and the nickel cap layer.4. The semiconductor die of claim 1 , wherein the ratio of the second width to the first width is between about 0.93 to about 0.99.5. A method of forming a semiconductor die comprising:providing a substrate;forming a bond pad over the substrate;depositing an under bump metallurgy (UBM) layer over the bond pad;forming a copper pillar over the UBM layer;depositing a nickel layer over the copper pillar, wherein an interface is defined between the nickel layer and the copper pillar;depositing a solder material over the nickel layer;{'sub': 3', '4, ' ...

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Номер записи: 2
26-01-2012 дата публикации

Doping Minor Elements into Metal Bumps

Номер: US20120018878A1
Автор: Cheng Ming-Da, Ho MIng-Che, Hwang Chien Ling, Lim Zheng-Yi, Lin Cheng-Chung, Liu Chung-Shi, Tsai Hui-Jung
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

A method of forming a device includes providing a substrate, and forming a solder bump over the substrate. A minor element is introduced to a region adjacent a top surface of the solder bump. A re-flow process is then performed to the solder bump to drive the minor element into the solder bump. 1. A method of forming a device , the method comprising:providing a substrate;forming a solder bump over the substrate;introducing a minor element to a region adjacent a top surface of the solder bump; andperforming a re-flow process to the solder bump to drive the minor element into the solder bump.2. The method of claim 1 , wherein the step of introducing the minor element comprises:pre-mixing the minor element into a flux; andcoating the flux over the top surface of the solder bump.3. The method of claim 1 , wherein the step of introducing the minor element comprises performing an electroless plating to form a minor element containing layer comprising the minor element on a surface of the solder bump.4. The method of claim 3 , wherein the step of performing the electroless plating comprising sequentially plating the minor element containing layer selected from the group consisting essentially of a cobalt layer claim 3 , a nickel layer claim 3 , a copper layer claim 3 , and combinations thereof.5. The method of further comprising performing an immersion to form a gold layer on the minor element containing layer.6. The method of claim 3 , wherein the minor element comprises cobalt.7. The method of claim 1 , wherein the step of introducing the minor element comprises implanting the minor element into a surface layer of the solder bump.8. The method of further comprising claim 7 , after the step of implanting the minor element and before the step of performing the re-flow process claim 7 , coating a flux on the top surface of the solder bump.9. The method of claim 7 , wherein after the step of implanting the minor element claim 7 , a bottom portion of the solder bump is ...

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Номер записи: 3
02-02-2012 дата публикации

BIPOLAR JUNCTION TRANSISTOR DEVICES

Номер: US20120025352A1
Автор: Hsu Wei-Hsun, Lien Shih-Chin, Lin Cheng-Chi, TU SHUO-LUN, Yeh Chin-Pen
Принадлежит:

A bipolar junction transistor (BJT) device including a base region, an emitter region and a collector region comprises a substrate, a deep well region in the substrate, a first well region in the deep well region to serve as the base region, a second well region in the deep well region to serve as the collector region, the second well region and the first well region forming a first junction therebetween, and a first doped region in the first well region to serve as the emitter region, the first doped region and the first well region forming a second junction therebetween, wherein the first doped region includes a first section extending in a first direction and a second section extending in a second direction different from the first direction, the first section and the second section being coupled with each other. 1. A bipolar junction transistor (BJT) device including a base region , an emitter region and a collector region , the BJT device comprising:a substrate;a deep well region in the substrate;a first well region in the deep well region to serve as the base region;a second well region in the deep well region to serve as the collector region, the second well region and the first well region forming a first junction therebetween; anda first doped region in the first well region to serve as the emitter region, the first doped region and the first well region forming a second junction therebetween;wherein the first doped region includes a first section extending in a first direction and a second section extending in a second direction different from the first direction, the first section and the second section being coupled with each other.2. The BJT device of claim 1 , wherein the first section and the second section intersect each other in a cross pattern.3. The BJT device of claim 1 , wherein the first doped region further includes a third section coupled to the first section and the second section claim 1 , the third section extending in a third direction ...

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Номер записи: 4
09-02-2012 дата публикации

CLAMPING MECHANISM AUTOMATICALLY ADAPTABLE TO CHANGE OF THICKNESS OF PRINTED CIRCUIT BOARD

Номер: US20120032384A1
Автор: Lin Cheng-Feng, Liu Chi-Tai
Принадлежит:

A clamping mechanism automatically adaptable to change of thickness of printed circuit board includes: a frame body having two parallel rail seats; two clamping rail members respectively mounted on the rail seats for clamping a printed circuit board, each clamping rail member including a first clamping rail and a second clamping rail spaced from each other by a clamping gap; and two adjustment units for adjusting the clamping gap of the clamping rail members. Each the adjustment unit includes: a support section mounted on the frame body to provide a support face; a connection section, one end of the connection section being affixed to the first clamping rail, the other end of the connection section being positioned above the support face; and a floating section positioned between the connection section and the support section and supported on the support face to apply a resilient support force to the connection section. 1. A clamping mechanism automatically adaptable to change of thickness of printed circuit board , comprising:a frame body including two horizontal elongated bar-like rail seats in parallel to each other;two clamping rail members respectively mounted on the rail seats for clamping and holding two opposite sides of a printed circuit board, each of the clamping rail members including a first straight elongated clamping rail and a second straight elongated clamping rail, the first and second clamping rails being horizontally mounted on the rail seat along the length thereof in parallel to each other, the second clamping rail being positioned above the first clamping rail, a top rail face of the first clamping rail being spaced from a bottom rail face of the second clamping rail by a certain clamping gap for clamping a corresponding side of the printed circuit board; andtwo adjustment units respectively disposed on opposite outer sides of the rail seats for adjusting the clamping gap of the clamping rail members, the clamping mechanism being characterized ...

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Номер записи: 5
01-03-2012 дата публикации

Pillar Bumps and Process for Making Same

Номер: US20120049346A1
Автор: Chou Meng-Wei, Huang Ying-Jui, Hwang Chien Ling, Lin Cheng-Chung, Lin Kuo Cheng, Liu Chung-Shi, Lu De-Yuan, Lu Wen-Hsiung
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art. 1. An apparatus , comprising:a semiconductor substrate having at least one input/output terminal on a surface thereon; a bottom portion contacting the input/output terminal;', 'an upper portion having a first width; and', 'a base portion over the bottom portion having a second width greater than the first width., 'a pillar disposed over the at least one input/output terminal comprising2. The apparatus of claim 1 , wherein the base portion has a shape claim 1 , in cross-section claim 1 , which is a trapezoidal shape.3. The apparatus of claim 1 , further comprising an under bump metallization layer underlying the pillar claim 1 , the under bump metallization layer comprising a seed layer and a barrier layer.4. The apparatus of claim 3 , wherein the seed layer comprises copper.5. The apparatus of wherein the barrier layer comprises titanium.6. The apparatus of claim 1 , wherein the pillar comprises copper.7. The apparatus of claim 1 , wherein the pillar further comprises the upper portion having vertical sides and disposed over the base portion claim 1 , the base portion having sides with non vertical portions further comprising sloping sides that extend from the bottom of the base portion and that intersect the vertical sides of the upper portion at an angle greater than 90 degrees.8. The apparatus of claim 1 , wherein the base portion ...

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Номер записи: 6
22-03-2012 дата публикации

METHOD FOR FORMING LIGHT EMITTING DEVICE

Номер: US20120070922A1
Автор: Chen Chih-Yen, HSIEH Chieh, Liao Che-Hao, Lin Cheng-Hung, Yang Chih-Chung
Принадлежит: NATIONAL TAIWAN UNIVERSITY

The invention provides a method for forming a light emitting device. A first substrate is provided. A plurality of patterned masks is formed on the first substrate, or on a semiconductor epitaxial layer grown on the first substrate, or the first substrate is etched to form a plurality of trenches, followed by performing an epitaxial lateral overgrowth process to grow an epitaxy layer over the first substrate. A light emitting structure is formed on the epitaxy layer. A first electrode layer is formed on the light emitting structure. The light emitting structure is wafer bonded to a second substrate. A photoelectrochemical etching process is performed to lift off the first substrate from the epitaxy layer. 1. A method for forming a light emitting device , comprising:providing a first substrate;forming a plurality of patterned masks over the first substrate or etching the first substrate to form a plurality of trenches;growing an epitaxy layer using an epitaxial lateral overgrowth (ELOG) method over the first substrate with the patterned masks;forming a light emitting diode structure over the epitaxy layer;forming a first electrode layer on the light emitting diode structure;bonding the light emitting diode structure to a second substrate; andperforming a photoelectrochemical etching process to lift off the epitaxy layer from the first substrate.2. The method for forming a light emitting device as claimed in claim 1 , wherein the first substrate is a sapphire substrate.3. The method for forming a light emitting device as claimed in claim 1 , further comprising forming a semiconductor layer on the first substrate before forming a plurality of patterned masks claim 1 , wherein the semiconductor layer is GaN.4. The method for forming a light emitting device as claimed in claim 3 , wherein the thickness of the semiconductor layer on the first substrate is 0˜800 nanometer.5. The method for forming a light emitting device as claimed in claim 3 , wherein the patterned masks ...

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Номер записи: 7
12-04-2012 дата публикации

HIGH VOLTAGE MOS DEVICE AND METHOD FOR MAKING THE SAME

Номер: US20120086052A1
Автор: Chen Chieh-Chih, Lien Shih-Chin, Lin Chen-Yuan, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит:

A high-voltage metal-oxide-semiconductor (HVMOS) device may include a source, a drain, a gate positioned proximate to the source, a drift region disposed substantially between the drain and a region of the gate and the source, and a self shielding region disposed proximate to the drain. A corresponding method is also provided. 1. A high-voltage metal-oxide-semiconductor (HVMOS) device comprising:a source;a drain;a gate positioned proximate to the source;a drift region disposed substantially between the drain and a region of the gate and the source; anda self shielding region disposed proximate to the drain.2. The HVMOS device of claim 1 , wherein the self shielding region comprises two PWs disposed in the N-epi spaced apart from each other.3. The HVMOS device of claim 1 , further comprising:a substrate of P-type material;a high-voltage N-well (HVNW) region disposed in a portion of the substrate to form the drift region;a first N-doped buried layer (NBL) disposed in a portion of the substrate spaced apart from the HVNW region; anda N-epi layer of epitaxially-grown N-type material disposed over the substrate, the HVNW region and the first NBL.4. The HVMOS device of claim 3 , wherein a bulk and source P-well (PW) is disposed at a portion of the N-epi layer that is adjacent to the portion of the N-epi layer that is proximate to the HVNW region claim 3 , wherein the gate is disposed to extend from the bulk and source PW to a field oxide film disposed over the portion of the N-epi layer that is proximate to the HVNW region claim 3 , and wherein the drain is disposed at a portion of the N-epi layer that is proximate to the HVNW region and is also adjacent to an opposite side of the field oxide film of that on which the gate is formed.5. The HVMOS device of claim 4 , wherein the self shielding region comprises a high-voltage interconnect region PW disposed between the first NBL and the portion of the N-epi layer that is proximate to the HVNW region.6. The HVMOS device of ...

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Номер записи: 8
26-04-2012 дата публикации

Fluorescent Gold Nanocluster Matrix

Номер: US20120100075A1
Автор: CHANG Walter Hong-Shong, LEE Chih-Hsien, Lin Cheng-An, Parak Wolfgang J., Sperling Ralph A., Yang Ting-Ya
Принадлежит: CHUNG YUAN CHRISTIAN UNIVERSITY

The present invention discloses a fluorescent gold nanocluster, comprising: a dihydrolipoic acid ligand (DHLA) on the surface thereof, wherein the fluorescent gold nanocluster generates fluorescence by the interaction between the dihydrolipoic acid ligand and the nanocluster and the particle diameter of the fluorescent gold nanocluster is between 0.5 nm and 3 nm, wherein the wavelength of the emission fluorescence of the fluorescent gold nanocluster is between 400 nm and 1000 nm. In addition, the fluorescent gold nanocluster is used as bioprobes and/or applied in fluorescent biological label, clinical image as contrast medium, clinical detection, clinical trace, and clinical treatment etc. 1. A fluorescent gold nanocluster matrix , comprising: a plurality of gold nanoclusters piled up regularly wherein the particle diameter of said gold nanocluster is between 0.5 nm and 3 nm; the surface of said gold nanocluster comprises alkanethiol ligand(s); said gold nanoclusters are piled up due to the interaction between said alkanethiol ligands on the surface thereof to form said fluorescent gold nanocluster matrix; and said fluorescent gold nanocluster matrix has the fluorescence property by aggregating said gold nanoclusters.2. The matrix according to claim 1 , further coating a spacer on the surface thereof wherein one end of said spacer is bonded to said alkanethiol and the other end of said spacer has a specific moiety inherently.3. The matrix according to claim 2 , wherein said spacer comprises an amphiphilic polymer or oligomer.4. The matrix according to claim 3 , wherein said amphiphilic polymer or oligomer comprises one substance selected from the group consisting of the following or combination thereof: poly(maleic anhydride) (PMA) claim 3 , Poly(maleic anhydride-alt-1-octadecene) (PMAO) claim 3 , polyacrylic acid (PAA) claim 3 , and derivatives thereof.5. The matrix according to claim 3 , wherein said specific moiety comprises one substance selected from the group ...

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Номер записи: 9
10-05-2012 дата публикации

Thermal Compressive Bonding with Separate Die-Attach and Reflow Processes

Номер: US20120111922A1
Автор: Huang Ying-Jui, Hwang Chien Ling, Lin Cheng-Chung, Liu Chung-Shi
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

A method of bonding includes providing a first work piece, and attaching a second work piece on the first work piece, with a solder bump disposed between the first and the second work pieces. The second work piece is heated using a heating head of a heating tool to melt the solder bump. After the step of heating the second work piece, one of the first and the second work pieces is allowed to move freely in a horizontal direction to self-align the first and the second work pieces. After the step of allowing one of the first and the second work pieces to move, a temperature of the heating head is lowed until the first solder bump solidifies to form a second solder bump. 1. An apparatus for bonding a plurality of dies , the apparatus comprising:a multi-head heating tool comprising a plurality of heating heads configured to heat the plurality of dies simultaneously to a temperature higher than a melting temperature of solder regions of the plurality of dies.2. The apparatus of claim 1 , wherein the plurality of heating heads is configured to pick up the plurality of dies through vacuuming.3. The apparatus of claim 2 , wherein the plurality of heating heads is configured to heat and to melt solder regions at a same time of the vacuuming.4. The apparatus of claim 2 , wherein the plurality of heating heads is configured to release the vacuum.5. The apparatus of claim 1 , wherein the plurality of heating heads is arranged as an array.6. The apparatus of further comprising a jig-type substrate carrier comprising a body claim 1 , wherein the body comprises a plurality of work piece holders configured to hold dies claim 1 , and wherein the plurality of heating heads is configured to be aligned to the plurality of work piece holders with a one-to-one correspondence.7. The apparatus of claim 6 , wherein the jig-type substrate carrier further comprises a cover comprising a plurality of through openings claim 6 , wherein the plurality of through openings is configured to be ...

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Номер записи: 10
10-05-2012 дата публикации

SPEECH DATA RETRIEVING AND PRESENTING DEVICE

Номер: US20120116770A1
Автор: Chen Cheng-Hsiung, Chen Ming-Fu, Chiu Chan-Fa, Jiang Daow-Ming, Lin Cheng-Jen, Liu Po-Yiu
Принадлежит:

A speech data retrieving and presenting device applied with an electronic device through a network includes a data receiving unit, a processing unit and a speech presenting unit. The data receiving unit connected to the network receives data of the electronic device through the network. The processing unit coupled to the data receiving unit receives speech data and retrieves a speech presenting signal from the speech data. The speech presenting unit coupled to the processing unit receives the speech presenting signal and outputs a speech according to the speech data. This device can assist a user to obtain network information, and provide the user a more flexible application according to the property that the device can be operated independently by a simple motion. 1. A speech data retrieving and presenting device applied with an electronic device through a network , the speech data retrieving and presenting device comprising:a data receiving unit, connected to the network, for receiving data of the electronic device through the network;a processing unit, coupled to the data receiving unit, for receiving the data and retrieving speech data from the data to obtain a speech presenting signal; anda speech presenting unit, coupled to the processing unit, for receiving the speech presenting signal and outputting a speech according to the speech data.2. The speech data retrieving and presenting device according to claim 1 , wherein the network is a wired network or a wireless network.3. The speech data retrieving and presenting device according to claim 2 , wherein the wireless network is a mobile communication system network claim 2 , and the electronic device is a mobile phone.4. The speech data retrieving and presenting device according to claim 3 , wherein the data are a multimedia file claim 3 , an E-mail claim 3 , a multimedia short message or a combination thereof.5. The speech data retrieving and presenting device according to claim 3 , wherein a content of the ...

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Номер записи: 11
17-05-2012 дата публикации

SAND-FLOWING PICTURE DEVICE

Номер: US20120117835A1
Автор: LIN CHENG-HSIUNG
Принадлежит:

A sand-flowing picture device includes a transparent, flat and sealed container, a fluid, first sand particulates with a specific gravity higher than the fluid and second sand particulates with a specific gravity lower than the fluid. The second sand particulates with a predetermined quantity fewer than the first sand particulates so as to provide slots which the first sand particulates can pass through gradually downwardly when the first sand particulates fall on and along a layer formed by the second sand particulates that rise upon inversion of the container in a vertical position. The container is substantially bubble-free. Therefore, the device can show a sand picture of dynamic variation and form a new and different decorative pattern. 1. A sand-flowing picture device , comprising:a transparent, flat and sealed container having a chamber formed therein;a fluid substantially filled into the chamber;a large quantity of first sand particulates arranged to the fluid in the chamber, each of the first sand particulates having a specific gravity higher than the fluid, so that the first sand particulates can fall in the fluid upon inversion of the container; anda small quantity of second sand particulates arranged to the fluid in the chamber, each of the second sand particulates having a specific gravity lower than the fluid, so that the second sand particulates can rise in the fluid upon inversion of the container;wherein the second sand particulates with a predetermined quantity fewer than the first sand particulates so as to provide slots which the first sand particulates can pass through gradually downwardly when the first sand particulates fall on and along a layer formed by the second sand particulates that rise upon inversion of the container in a vertical position;wherein the container is substantially bubble-free.2. The sand-flowing picture device as claimed in claim 1 , wherein the second sand particulates are hollow glass microspheres claim 1 , hollow ...

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Номер записи: 12
07-06-2012 дата публикации

METHODS AND APPARATUS FOR INTEGRATING AND CONTROLLING A PLASMA PROCESSING SYSTEM

Номер: US20120138085A1
Автор: HUANG Chung-Ho, Lin Cheng-Chieh
Принадлежит:

Methods and apparatus for controlling a plasma processing system in a purely pull mode or a hybrid pull mode. In the purely pull mode, the back end assumes master control at least for requesting and scheduling loading of production wafers. In the hybrid pull mode, the back end assumes master control at least for tool maintenance/cleaning while the front end retains master control for production wafers. 1. A plasma processing system having a front end , a plurality of load locks , and a back end , said front end including at least logic for transferring wafers between a storage location and said plurality of load locks , said back end configured to process wafers received from said plurality of load locks , comprising:first logic associated with said back end for ascertaining whether one of tool cleaning and tool maintenance is required during processing of said wafers;second logic associated with said backend, said second logic configured for entering a back end master mode if said one of said tool cleaning and said tool maintenance is required, wherein when said back end, when operating in said back end master mode, performs at least one of issuing a maintenance wafer request to said front end and suspending a front end master mode of said front end to perform said one of said tool cleaning and said tool maintenance.2. The plasma processing system of further comprising:third logic associated with said front end for receiving wafer loading instructions from said back end when said back end operates in said back end master mode.3. The plasma processing system of further comprising:third logic associated with said front end for enabling said front end to operate in said front end master mode after said one of said tool cleaning and said tool maintenance is performed.4. A plasma processing system having a front end claim 1 , a plurality of load locks claim 1 , and a back end claim 1 , said front end including at least logic for transferring wafers between a storage ...

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Номер записи: 13
28-06-2012 дата публикации

CONTROLLABLE PROSODY RE-ESTIMATION SYSTEM AND METHOD AND COMPUTER PROGRAM PRODUCT THEREOF

Номер: US20120166198A1
Автор: Huang Chien-Hung, Kuo Chih-Chung, Lin Cheng-Yuan
Принадлежит: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

In one embodiment of a controllable prosody re-estimation system, a TTS/STS engine consists of a prosody prediction/estimation module, a prosody re-estimation module and a speech synthesis module. The prosody prediction/estimation module generates predicted or estimated prosody information. And then the prosody re-estimation module re-estimates the predicted or estimated prosody information and produces new prosody information, according to a set of controllable parameters provided by a controllable prosody parameter interface. The new prosody information is provided to the speech synthesis module to produce a synthesized speech. 1. A controllable prosody re-estimation system , comprising:a controllable prosody parameter interface for loading a controllable parameter set; anda speech/text to speech (STS/TTS) core engine, said core engine including at least a prosody prediction/estimation module, a prosody re-estimation module and a speech synthesis module, wherein said prosody prediction/estimation module predicts or estimates prosody information according to the input text/speech, and transmitting the predicted or estimated prosody information to said prosody re-estimation module;said prosody re-estimation module produces new prosody information according to said input controllable parameter set and predicted/estimated prosody information. Then, said prosody re-estimation module transmits said new prosody information to said speech synthesis module to generate synthesized speech.2. The system as claimed in claim 1 , wherein the parameters of said controllable parameter set are fully independent.3. The system as claimed in claim 1 , wherein when said prosody re-estimation system is applied on text-to-speech (TTS) claim 1 , said prosody prediction/estimation module represents a prosody prediction module which predicts said prosody information according to said input text.4. The system as claimed in claim 1 , wherein when said prosody re-estimation system is applied ...

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Номер записи: 14
26-07-2012 дата публикации

DOCKING STATION AND ELECTRONIC APPARATUS USING THE SAME

Номер: US20120188697A1
Автор: Chen Yung-Hsiang, Huang Cheng-Min, Lin Cheng-Jui, Liu Hsiang-Ling, Lu Hsin, Yeh Hsin
Принадлежит: COMPAL ELECTRONICS, INC.

An electronic apparatus including a portable device and a docking station is provided. The portable device has a display surface and a first restricting element. The docking station includes a base and a frame. The base has a supporting surface, wherein the portable device is adapted to be placed on the supporting surface. The frame is disposed around the base and has a second restricting element, wherein the frame is adapted to slide related to the base to drive the second restricting element to be aligned to the first restricting element of the portable device placed on the supporting surface, such that the portable device is fixed to the base by means of a magnetic attraction force between the first restricting element and the second restricting element. 1. An electronic apparatus , comprising:a first electronic device having a first restricting element; and a base; and', 'a frame disposed around the base and having a second restricting element, wherein the frame is adapted to slide related to the base to drive the second restricting element to be fixed to the first restricting element so that the first electronic device fixes to the second electronic device., 'a second electronic device comprising2. The electronic apparatus as claimed in claim 1 , wherein the first electronic device is a portable device and the second electronic device is a docking station.3. The electronic apparatus as claimed in claim 1 , wherein the first electronic device is a docking station and the second electronic device is a portable device.4. The electronic apparatus as claimed in claim 2 , wherein the portable device has a display surface and the base has a supporting surface claim 2 , wherein the supporting surface faces to the display surface when the portable device is fixed to the docking station.5. The electronic apparatus as claimed in claim 1 , wherein the first restricting element is a magnetic attraction portion or a mechanical latching portion and the second restricting ...

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Номер записи: 15
26-07-2012 дата публикации

DOCKING STATION AND ELECTRONIC APPARATUS USING THE SAME

Номер: US20120188701A1
Автор: Chen Yung-Hsiang, Huang Cheng-Min, Lin Cheng-Jui, Liu Hsiang-Ling, Lu Hsin, Yeh Hsin
Принадлежит: COMPAL ELECTRONICS, INC.

A docking station, an electronic apparatus and a portable device are provided. The electronic apparatus comprises a portable device having a display surface and a docking station having a base and a connecting module. The base has a supporting surface. The portable device is adapted to be attached to the supporting surface. The connecting module has a first pivot and a second pivot. The first pivot is connected and pivoted to the base, and the second pivot is detachably pivoted to the portable device, such that the portable device is adapted to rotate relatively to the docking station. 1. An electronic apparatus , comprising:a portable device having a display surface;a docking station having a base and the base having a supporting surface; anda connecting module having a first pivot and a second pivot, wherein the first pivot is connected and pivoted to the base, and the second pivot is detachably pivoted to the portable device, such that the portable device is adapted to rotate relatively to the docking station.2. The electronic apparatus as claimed in claim 1 , wherein the first pivot is pivoted to the base along a first and the second pivot is detachably pivoted to the portable device along a second axis claim 1 , wherein the second axis is parallel to the first axis.3. The electronic apparatus as claimed in claim 1 , wherein the portable device being adapted to stand on the supporting surface is supported by the connecting module.4. The electronic apparatus as claimed in claim 1 , wherein the portable device is adapted to be separated from the base when the second pivot is detached from the portable device.5. The electronic apparatus as claimed in claim 1 , wherein the supporting surface faces the display surface when the portable device is attached to the base.6. The electronic apparatus as claimed in claim 1 , wherein the portable device has a back surface opposing to the display surface claim 1 , the second pivot is detachably pivoted to the back surface ...

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Номер записи: 16
23-08-2012 дата публикации

PRINTED CIRCUIT BOARD SUBSTRATE

Номер: US20120211267A1
Автор: HUANG PAI-HUNG, Lin Cheng-Hsien, YANG CHIH-KANG
Принадлежит: ZHEN DING TECHNOLOGY CO., LTD.

A printed circuit board substrate includes a metal-clad substrate and a number of N spaced circuit substrates arranged on the metal-clad substrate along an imaginary circle, and N is a natural number greater than 2. The circuit substrates are equiangularly arranged about the center of the circle, and each of the circuit substrates is oriented 360/N degrees with respect to a neighboring printed circuit board. 1. A printed circuit board substrate , comprising:a first metal-clad substrate;a number of N spaced circuit substrates arranged on the first metal-clad substrate along an imaginary circle, the circuit substrates being equiangularly arranged about the center of the circle, each of the circuit substrates being oriented 360/N degrees with respect to a neighboring circuit substrate, N representing a natural number greater than 2.2. The printed circuit board substrate as claimed in claim 1 , wherein the first metal-clad substrate includes a first insulation layer and a first electrically conductive layer formed thereon claim 1 , the first electrically conductive layer is configured to form electrically conductive patterns.3. The printed circuit board substrate as claimed in claim 2 , wherein each of the circuit substrates has a second insulation layer and a plurality of electrical traces formed thereon claim 2 , the electrical traces are in contact with the first insulation layer.4. The printed circuit board substrate as claimed in claim 1 , further comprising a second metal-clad substrate claim 1 , the circuit substrates are sandwiched between the first and second metal-clad substrates.5. The printed circuit board substrate as claimed in claim 1 , wherein N is equal to 4 claim 1 , and each of the circuit substrates is oriented 90 degrees with respect to a neighboring circuit substrate.6. A circuit substrate claim 1 , comprising:a first metal-clad substrate;a number of N spaced second circuit substrates arranged centrosymmetric with respect to a given point on the ...

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Номер записи: 17
23-08-2012 дата публикации

Circuit module device with addresses generated by method of divided voltage

Номер: US20120212154A1
Автор: Lin Che-Chuan, LIN CHENG-LUNG
Принадлежит: Eorex Corp

A circuit module device with addresses generated by a method of divided voltage, in particular a specific circuit module device that is able to connect a plurality of circuit modules having various resistances with varied divided voltage and under this circumstance, it will be able to utilize various resistances with varied voltage values to create various specific addresses for the circuit modules thereof

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Номер записи: 18
27-09-2012 дата публикации

Ultra-High Voltage N-Type-Metal-Oxide-Semiconductor (UHV NMOS) Device and Methods of Manufacturing the same

Номер: US20120241861A1
Автор: Chen Chieh-Chih, Lien Shih-Chin, Lin Chen-Yuan, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

An ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device with improved performance and methods of manufacturing the same are provided. The UHV NMOS includes a substrate of P-type material; a first high-voltage N-well (HVNW) region disposed in a portion of the substrate; a source and bulk p-well (PW) adjacent to one side of the first HVNW region, and the source and bulk PW comprising a source and a bulk; a gate extended from the source and bulk PW to a portion of the first HVNW region, and a drain disposed within another portion of the first HVNW region that is opposite to the gate; a P-Top layer disposed within the first HVNW region, the P-Top layer positioned between the drain and the source and bulk PW; and an n-type implant layer formed on the P-Top layer. 1. An ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device , comprisinga substrate of P-type material;a first high-voltage N-well (HVNW) region disposed in a portion of the substrate;a source and bulk p-well (PW) adjacent to one side of the first HVNW region, and the source and bulk PW comprising a source and a bulk;a gate extended from the source and bulk PW to a portion of the first HVNW region, and a drain disposed within another portion of the first HVNW region that is opposite to the gate;a P-Top layer disposed within the first HVNW region, the P-Top layer positioned between the drain and the source and bulk PW; andan n-type implant layer formed on the P-Top layer.2. The device according to claim 1 , further comprising a field oxide (FOX) disposed at the first HVNW region and on the n-type implant layer claim 1 , wherein the gate extended from the source and bulk PW to a portion of the FOX.3. The device according to claim 1 , further comprising a PW space is disposed between the first HVNW region and a second HVNW region claim 1 , wherein the second HVNW region is disposed in a high-side operation region of the substrate.4. The device according to claim 3 , wherein at least ...

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Номер записи: 19
18-10-2012 дата публикации

CONTAINER CAP

Номер: US20120261416A1
Автор: Lin Cheng-Chi
Принадлежит:

A container cap includes: a first cap body formed with at least one first perforation and sealedly connectable to an opening of a container; a second cap body rotatably mounted on the first cap body and formed with at least one second perforation; and a sealing member positioned between the first and second cap bodies and formed with third perforations. The number of the third perforations is equal to the number of the first perforations. The third perforations are aligned with the first perforations of the first cap body respectively. The first and second cap bodies can be relatively rotated to unseal or seal the container for a user to select a desired mode for drinking a beverage contained in the container. For example, a user can directly drink a hot beverage with his/her mouth or insert a straw into the container to drink a cold beverage. 1. A container cap comprising:(a) a first cap body formed with at least one first perforation and sealedly connectable to an opening of a container;(b) a second cap body rotatably mounted on the first cap body and formed with at least one second perforation; and(c) a sealing member positioned between the first and second cap bodies and formed with third perforations, the number of the third perforations being equal to the number of the first perforations of the first cap body, the third perforations being aligned with the first perforations of the first cap body respectively.2. The container cap as claimed in claim 1 , wherein the first cap body includes a base seat section and an upper seat section claim 1 , the upper seat section being tightly affixed to a top end of the base seat section claim 1 , the top end of the base seat section and the upper seat section together defining a receiving space for receiving the sealing member therein.3. The container cap as claimed in claim 1 , wherein the first cap body is formed with two first perforations and a vent claim 1 , the diameter of one of the two first perforations being ...

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Номер записи: 20
08-11-2012 дата публикации

Field Effect Transistor Devices with Low Source Resistance

Номер: US20120280270A1
Автор: Anant Agarwal, Charlotte Jonas, Doyle Craig Capell, John Palmour, LIN Cheng, Sarit Dhar, Sei-Hyung Ryu
Принадлежит: Individual

A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

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Номер записи: 21
08-11-2012 дата публикации

Semiconductor Structure and Manufacturing Method for the Same

Номер: US20120280316A1
Автор: Lien Shih-Chin, Lin Chen-Yuan, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor structure and a manufacturing method for the same are provided. The semiconductor structure includes a first doped well, a first doped electrode, a second doped electrode, doped strips and a doped top region. The doped strips are on the first doped well between the first doped electrode and the second doped electrode. The doped strips are separated from each other. The doped top region is on the doped strips and extended on the first doped well between the doped strips. The first doped well and the doped top region have a first conductivity type. The doped strips have a second conductivity type opposite to the first conductivity type. 1. A semiconductor structure , comprising:a first doped well;a first doped electrode;a second doped electrode;doped strips on the first doped well between the first doped electrode and the second doped electrode, wherein the doped strips are separated from each other; anda doped top region on the doped strips and extended on the first doped well between the doped strips, wherein, the first doped well and the doped top region have a first conductivity type, the doped strips have a second conductivity type opposite to the first conductivity type.2. The semiconductor structure according to claim 1 , further comprising:a dielectric structure on the doped top region;a second doped well between the first doped well and the second doped electrode; anda gate structure on the second doped well between the second doped electrode and the dielectric structure.3. The semiconductor structure according to claim 2 , wherein the gate structure is extended on the dielectric structure.4. The semiconductor structure according to claim 1 , wherein the doped strips each have a width of 0.2 um-20 um5. The semiconductor structure according to claim 1 , wherein the doped strips have a gap distance of 0.2 um-20 um therebetween.6. The semiconductor structure according to claim 1 , wherein the doped strips each have a width of 0.2 um-20 um claim 1 ...

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Номер записи: 22
15-11-2012 дата публикации

ELECTRONIC DEVICE

Номер: US20120287592A1
Автор: Lin Cheng-Hung, Lin Wen-Tai, WANG Chih-Yi
Принадлежит: WISTRON CORPORATION

An electronic device includes a casing and a battery module removably locked to the casing. The casing includes a connecting wall, two inner side walls connected to opposite ends of the connecting wall and having pillars protruding therefrom, and a first magnetic member disposed at the connecting wall. The battery module includes a first side wall to abut against the connecting wall, and two second side walls connected to two opposite ends of the first sidewall. A second magnetic member is disposed at the first side wall and has a magnetic attraction force with the first magnetic member. Each second side wall is formed with a guiding groove extending along an insertion direction of the battery module for engaging a corresponding pillar.

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Номер записи: 23
22-11-2012 дата публикации

HIGH VOLTAGE RESISTANCE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A HIGH VOLTAGE RESISTANCE SEMICONDUCTOR DEVICE

Номер: US20120292740A1
Автор: Lien Shih-Chin, Lin Chen-Yuan, Lin Cheng-Chi, Yeh Chin-Pen
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor device comprises a semiconductor substrate, a lateral semiconductor diode, a field insulation structure, and a polysilicon resistor. The diode is formed in a surface region of the semiconductor substrate, and includes a cathode electrode and an anode electrode. The field insulation structure is disposed between the cathode and anode electrodes. The polysilicon resistor is formed over the field insulation structure, and between the cathode and anode electrodes. The polysilicon resistor is electrically connected to the cathode electrode, and electrically insulated from the anode electrode. 1. A semiconductor device comprising:a semiconductor substrate;a lateral semiconductor diode formed in a surface region of the semiconductor substrate, the diode having a cathode electrode and an anode electrode;a field insulation structure disposed between the cathode and anode electrodes; anda polysilicon resistor formed over the field insulation structure and between the cathode and anode electrodes, the polysilicon resistor being electrically connected to the cathode electrode and electrically insulated from the anode electrode.2. The semiconductor device of claim 1 , wherein the polysilicon resistor is formed on an upper surface of the field insulation structure to at least partially surround the cathode electrode.3. The semiconductor device of claim 2 , wherein the polysilicon resistor includes a plurality of semicircular segments concentrically arranged between the cathode and anode electrodes.4. The semiconductor device of claim 3 , wherein the segments include at least one innermost segment that is electrically connected to the cathode electrode.5. The semiconductor device of claim 4 , wherein adjacent segments are electrically connected so as to form a continuous polysilicon resistor structure from the cathode electrode to a terminal external to the semiconductor diode.6. The semiconductor device of claim 1 , wherein the anode electrode includes a circular ...

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Номер записи: 24
13-12-2012 дата публикации

VOLTAGE CONVERTER

Номер: US20120313435A1
Автор: LIN Chen-Hsiang, LIN Cheng-I, SUN Jen-Fan, TAI Fang-Ta
Принадлежит: HON HAI PRECISION INDUSTRY CO., LTD.

A voltage converter includes a driver, a subsidiary voltage converter, an inductor, a capacitor, and a voltage detection unit. The subsidiary voltage converter generates a driving voltage transmitted to the driver to supply working power to the driver. The driver controls the capacitor to be alternately charged and discharged through the inductor, thereby generating an output voltage and output current between the inductor and the first capacitor. The voltage detection unit detects an electric potential difference of the inductor and generates a reference voltage according to the electric potential difference, and the subsidiary voltage converter receives the reference voltage and adjusts the driving voltage according to the reference voltage. 1. A voltage converter , comprising:a driver;a subsidiary voltage converter electrically connected to the driver;an inductor electrically connected to the driver;a first capacitor electrically connected to the inductor; anda voltage detection unit electrically connected to the inductor and the subsidiary voltage converter; wherein the subsidiary voltage converter generates a driving voltage transmitted to the driver to supply working power to the driver; the driver controls the first capacitor to be alternately charged and discharged through the inductor, thereby generating an output voltage and output current between the inductor and the first capacitor; the voltage detection unit detects an electric potential difference of the inductor and generates a reference voltage according to the electric potential difference; and the subsidiary voltage converter receives the reference voltage and adjusts the driving voltage according to the reference voltage.2. The voltage converter as claimed in claim 1 , further comprising a main power supply electrically connected to the subsidiary voltage converter and providing an invariable power supply voltage to the subsidiary voltage converter claim 1 , the subsidiary voltage converter ...

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Номер записи: 25
27-12-2012 дата публикации

Semiconductor device with increased channel mobility and dry chemistry processes for fabrication thereof

Номер: US20120326163A1
Автор: Anant Agarwal, Jason Gurganus, John Williams Palmour, LIN Cheng, Sarit Dhar, Sei-Hyung Ryu
Принадлежит: Cree Inc

Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.

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Номер записи: 26
24-01-2013 дата публикации

COVER STRUCTURE FOR OUTDOOR CASING

Номер: US20130020329A1
Автор: Chen Chih-Chuan, Chen Teng-Chi, LIN Cheng-Chun
Принадлежит:

A cover structure for an outdoor casing includes a top cover and an inner cover-brow. A side wall is formed on the periphery of the top cover. The inner cover-brow has a first brow plate and a second brow plate. An inclined plate interconnects the first brow plate and the second brow plate. The inclined plate has a plurality of through holes. The second brow plate is connected to the side wall. The interior included angle of the first brow plate and the inclined plate is an acute angle. The cover structure not only helps the outdoor casing to ventilate and dissipate heat, but also enhances the outdoor casing's water repellency. 1. A cover structure for an outdoor casing , comprising:a top cover, a side wall being formed on the periphery of the top cover; andan inner cover-brow, having a first brow plate and a second brow plate, an inclined plate interconnecting the first brow plate and the second brow plate, the inclined plate having a plurality of through holes, the second brow plate being connected to the side wall, the interior included angle between the first brow plate and the inclined plate being an acute angle.2. The structure of claim 1 , wherein the first brow plate and the side wall are parallel.3. The structure of claim 1 , wherein the acute angle is between 10 degrees and 80 degrees.4. The structure of claim 1 , wherein the top cover further comprises a ceiling that is connected to the side wall claim 1 , and the ceiling is a slope.5. The structure of claim 1 , further comprising a lower cover claim 1 , the lower cover and the top cover being combined corresponding to each other claim 1 , the lower cover having a hollow lid body that extends towards the top cover.6. The structure of claim 1 , further comprising a water barrier stripe claim 1 , the top cover further comprising a ceiling that is connected to the side wall claim 1 , the water barrier stripe being installed on the ceiling.7. A cover structure for an outdoor casing claim 1 , comprising:a top ...

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Номер записи: 27
24-01-2013 дата публикации

SEMICONDUCTOR STRUCTURE AND A METHOD FOR MANUFACTURING THE SAME

Номер: US20130020680A1
Автор: Chen Chieh-Chih, Lien Shih-Chin, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a diode. The diode comprises a first doped region, a second doped region and a third doped region. The first doped region and the third doped region have a first conductivity type. The second doped region has a second conductivity type opposite to the first conductivity type. The second doped region and the third doped region are separated from each other by the first doped region. The third doped region has a first portion and a second portion adjacent to each other. The first portion and the second portion are respectively adjacent to and away from the second doped region. A dopant concentration of the first portion is bigger than a dopant concentration of the second portion. 1. A semiconductor structure , comprising a diode , wherein the diode comprises:a first doped region having a first conductivity type;a second doped region having a second conductivity type opposite to the first conductivity type; anda third doped region having the first conductivity type;wherein the second doped region and the third doped region are separated from each other by the first doped region, the third doped region has a first portion and a second portion adjacent to each other, the first portion and the second portion are respectively adjacent to and away from the second doped region, a dopant concentration of the first portion is bigger than a dopant concentration of the second portion.2. The semiconductor structure according to claim 1 , wherein the diode is used as a Zener diode.3. The semiconductor structure according to claim 1 , where in the second doped region and the third doped region are separated from each other by only the first doped region.4. The semiconductor structure according to claim 1 , wherein a dielectric isolation structure is not disposed between the second doped region and the third doped region.5. The semiconductor structure according to ...

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Номер записи: 28
24-01-2013 дата публикации

DIGITAL PULSE WIDTH MODULATION CONTROLLER FOR POWER MANAGEMENT

Номер: US20130021010A1
Автор: LIN Chen-Hsiang, LIN Cheng-I, SUN Jen-Fan, TAI Fang-Ta
Принадлежит: HON HAI PRECISION INDUSTRY CO., LTD.

A digital pulse width modulation (PWM) controller is used for controlling the operating voltage of an electrical load and includes a setting module, a storage module and a control module. The setting module generates control parameters corresponding to different preset load currents and load voltages of the electrical load. The storage module stores the control parameters and the prestored load current and load voltage. The control module is in electronic communication with the storage module, and detects current load voltage and current load current of the electrical load, and compares the current load voltage and load current with the prestored load voltage. Thus, the control module can output the control parameters which are necessary to stabilize the operating voltage of the electrical load, by comparison with stored data. 1. A digital pulse width modulation (PWM) controller used for controlling operating voltage of an electrical load , the digital PWM controller comprising:a setting module creating corresponding control parameters based on different preset load currents and load voltages of the electrical load; anda control module detecting current load voltage and/or load current of the electrical load, comparing the current load voltage and/or current load current with the preset quantities, and outputting the control parameters corresponding to the current load voltage and/or load current to control the operating voltage of the electrical load.2. The digital PWM controller as claimed in claim 1 , wherein the control module is in electronic communication with an electronic switch claim 1 , the control module turns on or off the electronic switch according to the control parameters claim 1 , and the control parameter comprise phase claim 1 , frequency and drive voltage.3. The digital PWM controller as claimed in claim 2 , wherein the electronic switch is electrically connected to a power source and the electrical load claim 2 , the power source provides ...

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Номер записи: 29
21-03-2013 дата публикации

PHASE LOCKED LOOP AND ASSOCIATED PHASE ALIGNMENT METHOD

Номер: US20130070881A1
Автор: Ding Jian-Yu, Lin Cheng-Chieh, Wang Yao-Chi
Принадлежит: MStar Semiconductor, Inc.

A phase locked loop and an associated alignment method are provided. A disclosed phase locked loop receives a reference signal to provide a feedback signal. The phase locked loop is first opened. When the phase locked loop is open, a frequency range of an oscillating signal from a voltage-controlled oscillator is substantially selected. The feedback signal is provided according to the oscillation signal. After the frequency range is selected, the phase locked loop is kept open and the phases of the reference signal and the feedback signal are substantially aligned. The phase locked loop is then closed after the reference signal and the feedback signal are aligned. 1. A phase alignment method , comprising:rendering a phase locked loop, for receiving a reference signal to generate a feedback signal;opening the phase locked loop, comparing phases of the reference signal and the feedback signal to generate a phase difference signal, and changing a frequency or the phase of either the feedback signal or the reference signal to allow the phase of the feedback signal to approximate that of the reference signal; andclosing the phase locked loop after changing the frequency or the phase of either the feedback signal or the reference signal to allow the frequency of the phase of the feedback signal to follow that of the reference signal.2. The phase alignment method according to claim 1 , wherein the step of comparing the phases of the reference signal and the feedback signal to generate the phase difference signal comprises:changing the frequency or the phase of the feedback signal according to the phase difference signal when the phase locked loop is open to approximate the phase of the feedback signal to that of the reference signal; andclosing the phase locked loop after changing the frequency or the phase of the feedback signal to allow the frequency of the phase of the feedback signal to follow that of the reference signal.3. The phase alignment method according to ...

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Номер записи: 30
28-03-2013 дата публикации

SEPARATION TYPE PNEUMATIC DUAL PARTITION MEMBRANE PUMP AND EXTERNAL PNEUMATIC CONTROL VALVE THEREOF

Номер: US20130078121A1
Автор: LIN Cheng-Wei
Принадлежит:

The present invention relates to a separation type pneumatic dual partition membrane pump, which comprises a pump body and an external pneumatic control valve which is separately installed. Through the operation of the external pneumatic control valve, the main shaft of the pump body and the valve rod of the external pneumatic control valve are reciprocally moved, and the two partition membranes respectively generate stretch and compress motions for changing the volume of each liquid room in the pump body so as to perform the pump stroke and the liquid suction stroke to the liquid. 1. A separation type pneumatic dual partition membrane pump , comprising:a pump body, pump chambers formed at two sides being respectively installed with a shaft hole for the installation of a main shaft, a liquid outlet channel having an outlet port, a liquid inlet channel having an inlet port, two sides of said liquid outlet and said liquid inlet channels adjacent to said pump chambers being respectively installed with a pair of check valves, and two ends of said main shaft being respectively fastened with a partition membrane for dividing each pump chamber into an air room and a liquid room; and two end covers respectively combined at one side of said pump body, said above-mentioned partition membranes being fastened between each end cover and said pump body, said two end covers being respectively formed with a first and a second air inlet apertures, and a first and a second main air passage apertures communicated with said air room, the interiors of said first and said second air inlet apertures being respectively installed with a switch valve; andan external pneumatic control valve, a valve member thereof being formed with a main air inlet port and at least an air guide branch pipe communicated with said main air inlet port; a fixing sleeve pipe installed in said valve member, the surface thereof being radially installed with first, second, third, fourth, fifth air apertures spaced ...

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Номер записи: 31
04-04-2013 дата публикации

APPARATUS AND METHODS FOR PROCESSING A SUBSTRATE

Номер: US20130081655A1
Автор: LIN Cheng-Yu, Mendiratta Arjun, Mui David
Принадлежит: LAM RESEARCH CORPORATION

Apparatus and methods for processing a substrate are described. The methods include generating a fluid meniscus between upper and lower proximity heads. Each of the upper and lower proximity heads has a length that extends up to at least a diameter of the substrate. The method further includes dispensing a pre-wetting fluid towards an edge region of the substrate to form a pre-wet fluid meniscus on the edge region. The method also includes progressively moving the substrate along a path that is defined between the upper and lower proximity heads to progressively establish contact between the pre-wet fluid meniscus and the fluid meniscus. 1. An apparatus for processing a substrate , comprising:a process chamber having a track;a carrier connected to the track for moving the substrate along a path;upper and lower proximity heads defined in the process chamber and positioned along the path, the upper and lower proximity heads having opposing faces that define a gap in which a meniscus of fluid is formed when in operation, the path for the carrier being defined along the gap between the opposing faces, the upper and lower proximity heads having a length that extends up to at least a diameter of the substrate;a first pre-wet dispenser and a second pre-wet dispenser disposed along side of the upper proximity head, the first and second pre-wet dispensers directed toward the path;a drive for moving each of the first and second pre-wet dispensers between a center position along the length of the upper proximity head and opposite outer positions defined near outer ends of the upper proximity head;a pre-wet controller for causing the drive to move each of the first and second pre-wet dispensers based on a position of the carrier when moved under first and second pre-wet dispensers.2. The apparatus as claimed in claim 1 , wherein the outer positions include a first outer position and a second outer position claim 1 , the pre-wet controller for causing the drive to move the first ...

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Номер записи: 32
04-04-2013 дата публикации

APPLICATION BURNING DEVICE FOR POWER PWM CONTROLLERS AND APPLICATION BURNING METHOD

Номер: US20130086575A1
Автор: LIN Chen-Hsiang, LIN Cheng-I, SUN Jen-Fan, TAI Fang-Ta
Принадлежит: HON HAI PRECISION INDUSTRY CO., LTD.

An application burning device and at least one power PWM controller are mounted on a main board. The device includes a processor and a storage unit storing applications to be burned to the at least one power PWM controller. The processor determines whether there is a power PWM controller not burned yet, and burns a corresponding application to the controller. A related application burning method is also provided. 1. An application burning device for power PWM controllers , the application burning device being mounted on a main board , at least one power PWM controller being mounted on the main board , the application burning device comprising:a storage unit storing at least one application to be burned to the at least one power PWM controller; and determine whether any of the at least one power PWM controller is not burned; and', 'burn a corresponding one of the at least one application stored in the storage unit into one of the at least one power PWM controller which is determined by the processor as not burned., 'a processor to'}2. The application burning device as described in claim 1 , wherein the processor determines whether a power PWM controller is not burned according to an application burning indication of the power PWM controller.3. The application burning device as described in claim 1 , wherein the processor determines the type of the power PWM controller which is not burned claim 1 , obtains the corresponding application stored in the storage unit according to the determined type.4. The application burning device as described in claim 3 , wherein each of the at least one power PWM controllers is assigned with a type code claim 3 , and the processor reads the type code to determine the type of a power PWM controller.5. The application burning device as described in claim 1 , wherein the application burning device is a controller embedded on the main board claim 1 , and the at least one power PWM controller is electrically connected to the embedded ...

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Номер записи: 33
25-04-2013 дата публикации

FLOWING SAND PICTURE

Номер: US20130097902A1
Автор: LIN CHENG-HSIUNG
Принадлежит:

A flowing sand picture flowing sand picture includes a transparent, flat box-like picture frame holding therein a fluid, multiple heavy granular materials and multiple lightweight granular materials. Each heavy granular material has a specific gravity higher than the fluid and each lightweight granular material has a specific gravity lower than the fluid. When the transparent, flat box-like picture frame is turned upside down, the granular materials float up and down through one another, showing a picture of dynamic variation. 1. A flowing sand picture , comprising:a transparent, flat and sealed frame;a plurality of barriers fixedly mounted in said frame at selected locations and spaced from one another in a close distance by gaps;a fluid sealed in said frame; andmultiple types of lightweight granular sands sealed in said frame,wherein said multiple types of lightweight granular sands each have different specific density lower than the density of said fluid, such that said multiple types of lightweight granular sands can flow in said frame with different speeds; andwherein said multiple types of lightweight granular are hollow glass microspheres, hollow ceramics particulates or combination thereof.2. The flowing sand picture as claimed in claim 1 , wherein said barrier are transparent.3. The flowing sand picture as claimed in claim 1 , wherein said barrier are arranged in straight lines at different elevations.4. The flowing sand picture as claimed in claim 1 , wherein said barriers are arranged in curved lines at different elevations.5. The flowing sand picture as claimed in claim 1 , wherein said multiple types of lightweight granular sands each have different colors.6. The flowing sand pictures as claimed in claim 1 , wherein said multiple types of lightweight granular sands each have different sizes. This application is a continuation-in-part of U.S. application Ser. No. 13/280,465, filed on Oct. 25, 2011 and entitled “flowing sand picture”, now pending, the ...

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Номер записи: 34
30-05-2013 дата публикации

Endoscope

Номер: US20130137922A1
Автор: CHEN Wei-The, Chen Yen-Nien, Lee Pei-Yuan, Lin Cheng-Wen, SHIH Wei-Jen
Принадлежит:

An endoscope includes a tube having including a compartment extending in a longitudinal direction. A flexible strip has a diameter smaller than a diameter of the compartment. The flexible strip is received in the compartment and slideable relative to the tube in the longitudinal direction. The flexible strip is made of a super elastomer having an original shape before deformation. The flexible strip is capable of restoring the original shape after larger deformation. An image capturing module is mounted to the flexible strip. The image capturing module can transmit light beam and capture images. 1. An endoscope comprising:a tube including a compartment extending in a longitudinal direction of the tube;a flexible strip having a diameter smaller than a diameter of the compartment, with the flexible strip received in the compartment and slideable relative to the tube in the longitudinal direction, with the flexible strip being made of a super elastomer having an original shape before deformation, with the flexible strip being made of the super elastomer capable of restoring the original shape after larger deformation; andan image capturing module mounted to the flexible strip, with the image capturing module adapted to transmit light beams and to capture images.2. The endoscope as claimed in claim 1 , with the tube made of a rigid material that is difficult to deform.3. The endoscope as claimed in claim 1 , with the flexible tube including a front end and a rear end claim 1 , with the image capturing module including a photosensitive chip and at least one signal line claim 1 , with the photosensitive chip mounted to the front end of the flexible tube claim 1 , with the at least one signal line electrically connected to the photosensitive chip.4. The endoscope as claimed in claim 3 , with the flexible strip including an outer periphery having at least one groove claim 3 , with the at least one signal line received in the at least one groove.5. The endoscope as claimed ...

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Номер записи: 35
06-06-2013 дата публикации

DRUG DELIVERY DEVICES FOR DELIVERY OF OCULAR THERAPEUTIC AGENTS

Номер: US20130142858A1
Автор: Kopczynski Casey, Lin Cheng-Wen, Sutay Chris
Принадлежит: AERIE PHARMACEUTICALS, INC.

Drug delivery devices comprising a non-bioabsorbable polymer structure configured to support a composition comprising an active agent. The devices include a plurality of portions fused together and a recess configured to support the composition. At least one of the portions includes an impermeable polymer and at least one other portion includes a rate-limiting water-permeable polymer. The rate-limiting water-permeable polymer allows for transportation of the active agent to an exterior of the device. 1. A device for insertion in the eye , the device comprising:a first portion including a recess configured to support a composition comprising an active agent, the first portion comprising an impermeable polymer; anda second portion fused to the first portion, the second portion comprising a rate-limiting water-permeable polymer that allows for transportation of the active agent to an exterior of the device, wherein the rate-limiting water-permeable polymer includes a thickness in a range of about 20 μm to about 500 μm.2. The device set forth in further comprisinga flange fused to the second portion.3. The device set forth in whereinthe second portion includes a base and a flange integral with the base.4. A device for insertion in the eye claim 1 , the device comprising:a first portion comprising a rate-limiting water-permeable polymer;a second portion fused to the first portion, the second portion including a recess configured to support a composition comprising an active agent, the second portion comprising a rate-limiting water-permeable polymer; anda third portion fused to the second portion, the third portion comprising a rate-limiting water-permeable polymer,wherein the rate-limiting water-permeable polymer includes a thickness in a range of about 20 μm to about 500 μm and allows for transportation of the active agent to an exterior of the device.5. A device for insertion in the eye claim 1 , the device comprising:a non-bioabsorbable polymer structure comprising a ...

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Номер записи: 36
06-06-2013 дата публикации

REACTED LAYER FOR IMPROVING THICKNESS UNIFORMITY OF STRAINED STRUCTURES

Номер: US20130143391A1
Автор: CHANG Tzong-Sheng, LIN Cheng-Te, Wang Chih-Lin, Wu Yi-Huang
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

Methods are disclosed of forming and removing a reacted layer on a surface of a recess to provide mechanisms for improving thickness uniformity of a semiconductor material formed in the recess. The improved thickness uniformity in turn improves the uniformity of device performance. 1. A method of forming an epitaxial semiconductor material in a recess of a substrate , comprising:patterning the substrate;etching the substrate to form the recess in the substrate;performing a surface treatment to convert a surface of the recess into a reacted layer;removing the reacted layer; andforming the epitaxial semiconductor material in the recess.2. The method of claim 1 , wherein the substrate includes silicon.3. The method of claim 1 , wherein the reacted layer includes at least one of silicon oxide claim 1 , silicon nitride claim 1 , silicon oxynitride claim 1 , and silicon carbide.4. The method of claim 1 , wherein the thickness of the reacted layer is in a range from about 2 Å to about 500 Å.5. The method of claim 1 , wherein the reacted layer is formed by a rapid thermal process utilizing a reactive gas.6. The method of claim 1 , wherein epitaxial semiconductor material includes silicon germanium (SiGe).7. The method of claim 1 , wherein the epitaxial semiconductor material has a thickness variation equal to or less than about 30 Å.8. The method of claim 1 , wherein the reacted layer is formed by a plasma treatment claim 1 , an ashing process claim 1 , or a wet process using a reactive agent.9. The method of claim 1 , wherein a portion of a sidewall of the recess has a tapered angle in a range from about 50° to about 70°.10. The method of claim 1 , wherein the sidewalls of the recess are substantially vertical.11. The method of claim 1 , wherein the recess is formed after a gate structure is formed and is formed next to the gate structure.12. The method of claim 1 , wherein the semiconductor material in the recess and the gate structure are part of a p-type metal-oxide- ...

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Номер записи: 37
13-06-2013 дата публикации

Interface Structure for Copper-Copper Peeling Integrity

Номер: US20130149856A1
Автор: Lin Cheng-Chung, Liu Chung-Shi, Yu Chen-Hua
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

An integrated circuit device is disclosed. An exemplary integrated circuit device includes a first copper layer, a second copper layer, and an interface between the first and second copper layers. The interface includes a flat zone interface region and an intergrowth interface region, wherein the flat zone interface region is less than or equal to 50% of the interface. 1. A method of forming an integrated circuit device comprising:providing a substrate having a bonding pad;forming a copper seed layer over the bonding pad;{'sub': 4', '2', '2, 'performing a descumming process that utilizes a CF/O/Nplasma;'}removing a residual layer formed over the copper seed layer during the descumming process; andthereafter, forming a bump structure over the copper seed layer.2. The method of wherein an interface between the bump structure and the copper seed layer is free of a copper oxide layer.3. The method of wherein an interface between the bump structure and the copper seed layer is free of a copper fluoride layer.4. The method of wherein an interface between the bump structure and the copper seed layer includes a flat zone interface region and an intergrowth interface region claim 1 , the flat zone interface region being less than or equal to 50% of the interface.5. The method of wherein forming the bump structure over the copper seed layer comprises forming a copper pillar on the copper seed layer.6. The method of wherein forming the bump structure over the copper seed layer comprises:forming a copper pillar on the copper seed layer; andforming a solder layer on the copper pillar.7. A method comprising:forming a first copper layer over a substrate; andforming a second copper layer over the first copper layer, wherein an interface between the first copper layer and the second copper layer comprises a flat zone interface region and an intergrowth interface region, wherein the flat zone interface region is less than or equal to 50% of the interface.8. The method of claim 7 , ...

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Номер записи: 38
20-06-2013 дата публикации

LIGHT GUIDE PLATE AND EDGE LIGHT BACKLIGHT DEVICE

Номер: US20130155722A1
Автор: Chen Hsin-Hung, KUO Chun-Liang, Lin Cheng-Feng
Принадлежит: CHI MEI CORPORATION

An edge light backlight device includes a light guide plate having a base portion and microstructures, LEDs, and a reflective plate. The base portion has a light emitting side, a rear side, and a light incident side. The microstructures are formed on one of the light emitting side and the rear side and each of which extends from the light incident side in a longitudinal direction. Each of the microstructures includes a curved surface with a radius of curvature (R). The light guide plate has a thickness (T). R/T ratio ranges from 0.04 to 0.15 and each of the microstructures has a height ranging from 20 μm to 300 μm so that the light guide plate has a performance of local lighting ranging from 1% to 40%. 1. An edge light backlight device , comprising:a light guide plate including a base portion that has a light emitting side, a rear side opposite to said light emitting side, and a light incident side connecting said light emitting side and said rear side, and a plurality of microstructures that are formed on one of said light emitting side and said rear side and each of which extends from a longitudinal direction of said light incident side, each of said microstructures including a curved surface with a radius of curvature (R), said light guide plate having a thickness (T);a plurality of LEDs aligned along and operable to emit light toward said light incident side of said base portion of said light guide plate; anda reflective plate located underneath said rear side of said light guide plate;wherein, in said light guide plate, R/T ratio ranges from 0.04 to 0.15 and each of said microstructures has a height ranging from 20 μm to 300 μm from one of said light emitting side and said rear side on which said microstructures are formed so that said light guide plate has a performance of local lighting ranging from 1% to 40%.2. The edge light backlight device as claimed in claim 1 , wherein one of said light emitting side and said rear side has a dot pattern.3. The edge ...

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Номер записи: 39
27-06-2013 дата публикации

Production of Graphene

Номер: US20130161199A1
Автор: Li Lain-Jong, LIN Cheng-Te, Su Ching-Yuan, Wu Feng-Yu
Принадлежит: Academia Sinica

An apparatus for large-scale production of graphene and graphene oxide is provided. The apparatus includes a first electrode, a second electrode, an electrobath, a power supply, and a module for filtering and separating the graphene products. Large amounts of graphene and graphene oxide can be produced rapidly using electrochemical exfoliation. High-quality graphene and graphene oxide can be produced under the room temperature in a simple and cost-effective way. 1. An apparatus for producing at least one of graphene or graphene oxide , the apparatus comprising:a first electrode that includes graphite;a second electrode;a container that contains an electrolyte, in which the first and second electrodes are immersed in the electrolyte;a power supply to supply bias voltages across the first and second electrodes to cause intercalation of graphite and exfoliation of graphene; anda filtration module to separate the graphene from un-exfoliated graphite particles and collect the graphene.2. The apparatus of in which the first electrode comprises an electrode holder that holds graphite.3. The apparatus of in which the second electrode comprises an electrode holder that holds graphite.4. The apparatus of in which the electrode holder comprises a separation sieve having a pore size selected to allow the electrolyte to pass but prevent un-exfoliated graphite from passing.5. The apparatus of in which the separation sieve has a pore size selected to prevent a portion of the graphene from passing.6. The apparatus of in which the second electrode is made of metal.7. The apparatus of in which the metal comprises a precious metal that is resistant to acid.8. The apparatus of in which the second electrode is made of a mixture of graphite and a metal.9. The apparatus of in which the first electrode comprises at least one of natural graphite claim 1 , highly-oriented pyrolytic graphite claim 1 , pitch-based graphite claim 1 , carbon fiber claim 1 , coal claim 1 , a material comprising ...

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Номер записи: 40
04-07-2013 дата публикации

POSITIONING DEVICE FOR TESTING RESISTANCE OF CAMERA MODULE

Номер: US20130169299A1
Автор: Lin Cheng-An, WU CHUN-FU
Принадлежит:

A positioning device includes a positioning mechanism, a contacting mechanism located in the positioning mechanism, and a connecting mechanism located adjacent to an end of the positioning mechanism. The positioning mechanism includes a receiving member, a positioning member received in the receiving member, and a cover rotatable connected to the receiving member. The receiving member defines two sliding grooves. The cover defines two driving grooves corresponding to the two sliding grooves, each of the two driving grooves forms a driving surface, and the sliding block includes a slanted surface corresponding to the driving surface. When the cover is rotated to cover the receiving member, the driving surface resists with the slanted surface to drive the sliding block to move towards the positioning groove until the first contacting member contacts one testing point of the camera module. 1. A positioning device , used for testing a resistance of a camera module , comprising:a positioning mechanism comprising a receiving member, a positioning member received in the receiving member, and a cover rotatable connected to the receiving member, the receiving member defining two sliding grooves, the positioning member defining a positioning groove for receiving the camera module, and the two sliding grooves located at opposite sides of the positioning groove and communicating with the positioning groove;a contacting mechanism located in the positioning mechanism, comprising a first contacting module and a second contacting module, each of the first contacting module and the second contacting module comprising a sliding block slidably received in one corresponding sliding groove and a first contacting member fastened to the sliding block adjacent to the positioning groove; anda connecting mechanism located adjacent to an end of the positioning mechanism, comprising two second connecting members, and each of the two second connecting members electrically connected to one ...

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Номер записи: 41
18-07-2013 дата публикации

BUMPING PROCESS

Номер: US20130183823A1
Автор: Chiu Yie-Chuan, Dai Hua-An, Hsieh Yung-Wei, Kuo Chih-Ming, Lin Cheng-Fan
Принадлежит: Chipbond Technology Corporation

A bumping process includes providing a silicon substrate, forming a titanium-containing metal layer on the silicon substrate, wherein the titanium-containing metal layer comprises a plurality of first areas and a plurality of second areas, forming a photoresist layer on the titanium-containing metal layer, patterning the photoresist layer to form a plurality of opening slots corresponded to the first areas of the titanium-containing metal layer, forming a plurality of copper bumps at the opening slots, proceeding a heat procedure, forming a plurality of bump isolation layers on the copper bumps, forming a plurality of connective layers on the bump isolation layers, removing the photoresist layer, removing the second areas and enabling each the first areas to form an under bump metallurgy layer. 1. A bumping process at least comprising:providing a silicon substrate having a surface, a plurality of bond pads disposed on said surface, and a protective layer disposed on said surface, wherein the protective layer comprises a plurality of openings, and the bond pads are revealed by the openings;forming a titanium-containing metal layer on the silicon substrate, wherein the titanium-containing metal layer covers the bond pads and the protective layer, and said titanium-containing metal layer comprises a plurality of first areas and a plurality of second areas located outside the first areas;forming a photoresist layer on the titanium-containing metal layer;patterning the photoresist layer to form a plurality of opening slots, wherein each of the opening slots corresponds to each of the first areas of the titanium-containing metal layer and comprises an inner lateral surface;forming a plurality of copper bumps at the opening slots, wherein each of the copper bumps comprises a first top surface and a first ring surface;proceeding a heating procedure to ream the opening slots, wherein the heating procedure makes an interval space located between the inner lateral surface of ...

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Номер записи: 42
08-08-2013 дата публикации

CONNECTION PORT MODULE AND AN ELECTRONIC DEVICE INCORPORATING THE SAME

Номер: US20130201632A1
Автор: Chen Yu-Hsun, Lin Cheng-Hung, WANG Chih-Yi
Принадлежит: WISTRON CORPORATION

A connection port module is mounted to a side wall of a housing of an electronic device. The electronic device includes a control circuit. The connection port module includes a rotating box, a circuit board, and at least one connection port. The rotating box is formed with at least one opening. The circuit board is electrically coupled to the control circuit. The connection port corresponds in number to the opening and is electrically coupled to the circuit board. The connection port is disposed correspondingly to the opening. The rotating box is pivotable relative to the housing between a first position and a second position. 1. A connection port module to be mounted to a side wall of a housing of an electronic device , the electronic device including a control circuit that is disposed in the housing , said connection port module comprising:a rotating box formed with at least one first opening and to be coupled pivotably to the side wall of the housing of the electronic device;a circuit board disposed in said rotating box and to be electrically coupled to the control circuit; andat least one first connection port corresponding in number to said at least one first opening, and electrically coupled to said circuit board, each of said at least one first connection port being disposed in said rotating box at a location corresponding to a corresponding one of said at least one first opening, and being capable of electrically connecting an external device;wherein said rotating box is pivotable relative to the housing between a first position, where access to at least one of said at least one first connection port is permitted so as to enable establishment of electrical connection with the external device, and a second position, where access to at least one of said at least one first connection port is prevented when the electronic device is disposed on a plane.2. The connection port module as claimed in claim 1 , the housing of the electronic device including a top wall ...

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Номер записи: 43
15-08-2013 дата публикации

SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Номер: US20130207191A1
Автор: Chen Chien-Chih, Chen Li-Fan, Lien Shin-Chin, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a first doped region and a second doped region. The first doped region comprises a first contact region. The first doped region and the first contact region have a first type conductivity. The second doped region comprises a second contact region. The second doped region and the second contact region have a second type conductivity opposite to the first type conductivity. The first doped region is adjacent to the second doped region. 1. A semiconductor structure , comprising:a first doped region comprising a first contact region, a first body doped portion and a side doped portion, wherein the first doped region, the first contact region, the first body doped portion and the side doped portion have a first type conductivity, the first contact region is formed in the first body doped portion; anda second doped region comprising a second contact region and a second body doped portion, wherein the second doped region, the second contact region and the second body doped portion have a second type conductivity opposite to the first type conductivity, the second contact region is formed in the second body doped portion, the side doped portion is between the first body doped portion and the second body region.2. The semiconductor structure according to claim 1 , wherein the semiconductor structure is an ESD protection device.3. The semiconductor structure according to claim 1 , further comprising a first conductive structure electrically connected to the first contact region claim 1 , wherein the first conductive structure is for transmitting an electric current toward the first contact region.4. The semiconductor structure according to claim 1 , further comprising a second conductive structure electrically connected to the second contact region claim 1 , wherein the second conductive structure is for transmitting an electric current away from the second ...

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Номер записи: 44
22-08-2013 дата публикации

SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOF

Номер: US20130214407A1
Автор: Hsieh Yung-Wei, Jiang Bo-Shiun, Lin Cheng-Fan, LIN Shu-Chen, Shih Cheng-Hung
Принадлежит: Chipbond Technology Corporation

A semiconductor packaging method includes providing a substrate having a plurality of pads, each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the substrate, said conductible gel includes a plurality of conductive particles and a plurality of anti-dissociation substances; mounting a chip on the substrate, said chip comprises a plurality of copper-containing bumps, each of the copper-containing bumps comprises a ring surface and a second coupling surface having a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, wherein the conductive particles are electrically connected with the first conductive contact areas and the second conductive contact areas, said anti-dissociation substances are in contact with the second non-conductive contact area, and the ring surfaces are covered with the anti-dissociation substances. 1. A semiconductor packaging method at least comprising:providing a substrate having an upper surface and a plurality of pads disposed on the upper surface, wherein each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas;forming a conductible gel with anti-dissociation function on the upper surface and the pads of the substrate, wherein the conductible gel with anti-dissociation function includes a plurality of conductive particles and a plurality of anti-dissociation substances; andmounting a chip on the substrate, the chip comprises an active surface facing toward the upper surface of the substrate and a plurality of copper-containing bumps disposed at the active surface, wherein the conductible gel with anti-dissociation function covers the copper-containing bumps, each of the copper-containing bumps comprises a second coupling surface ...

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Номер записи: 45
22-08-2013 дата публикации

SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOF

Номер: US20130214419A1
Автор: Hsieh Yung-Wei, Lin Cheng-Fan, LIN Shu-Chen, Liu Ming-Yi, Shih Cheng-Hung
Принадлежит: Chipbond Technology Corporation

A semiconductor packaging method includes providing a substrate having a plurality of connection pads; mounting a chip on the substrate, wherein the chip comprises a plurality of copper-containing bumps directly coupled to the connection pads, and each of the copper-containing bumps comprises a ring surface; forming an anti-dissociation gel between the substrate and the chip, wherein the anti-dissociation gel comprises a plurality of anti-dissociation substances, and the ring surfaces of the copper-containing bumps are covered by the anti-dissociation substances. 1. A semiconductor packaging method at least comprising:providing a substrate having a top surface and a plurality of connection pads disposed on the top surface, wherein each of the connection pads comprises a first linking surface;mounting a chip on the substrate, wherein the chip comprises an active surface facing toward the top surface of the substrate and a plurality of copper-containing bumps disposed at the active surface, the copper-containing bumps are directly coupled to the connection pads, and each of the copper-containing bumps comprises a second linking surface and a ring surface; andforming an anti-dissociation gel between the substrate and the chip, wherein the anti-dissociation gel comprises a plurality of anti-dissociation substances, and wherein said anti-dissociation substances cover the ring surfaces of the copper-containing bumps and capture dissociated copper ions from the copper-containing bumps to inhibit short phenomena.2. The semiconductor packaging method in accordance with claim 1 , wherein each of the first linking surfaces and each of the second linking surfaces are coplanar.3. The semiconductor packaging method in accordance with claim 1 , wherein each of the connection pads comprises a lateral face being covered with the anti-dissociation substances.4. The semiconductor packaging method in accordance with claim 1 , wherein the first linking surface of each of the connection ...

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Номер записи: 46
22-08-2013 дата публикации

Fine-Pitch Package-on-Package Structures and Methods for Forming the Same

Номер: US20130214431A1
Автор: Ang Ai-Tee, Cheng Ming-Da, Huang Kuei-Wei, Lin Cheng-Chung, Liu Chung-Shi, Tsai Tsai-Tsung
Принадлежит: Taiwan Semiconductor Manufacturing Company, Ltd.

A method includes laminating a Non-Conductive Film (NCF) over a first package component, and bonding a second package component on the first package component. The NCF and the second package component are on a same side of the first package component. Pillars of a mold tool are then forced into the NCF to form openings in the NCF. The connectors of the first package component are exposed through the openings. 1. A method comprising:laminating a Non-Conductive Film (NCF) over a first package component;bonding a second package component on the first package component, wherein the NCF and the second package component are on a same side of the first package component; andforcing pillars of a mold tool into the NCF to form openings in the NCF, wherein connectors of the first package component are exposed through the openings.2. The method of further comprising:placing solder balls into the openings; andreflowing the solder balls to form solder regions on the connectors.3. The method of further comprising bonding a top package to the first package component claim 1 , wherein the top package is bonded to the first package component through solder regions in the openings.4. The method of claim 1 , wherein the step of laminating the NCF over the first package component is performed before the step of bonding the second package component on the first package component.5. The method of claim 1 , wherein the step of laminating the NCF over the first package component is performed after the step of bonding the second package component on the first package component.6. The method of claim 5 , wherein the NCF is laminated over the first package component and the second package component claim 5 , and wherein the method further comprises:laminating an additional NCF film on a wafer; andsawing the wafer and the additional NCF film into a plurality of pieces, wherein one of the plurality of pieces comprises a piece of the additional NCF and the second package component, wherein after ...

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Номер записи: 47
29-08-2013 дата публикации

VALVE DEVICE

Номер: US20130220455A1
Автор: LIN Cheng-Yu
Принадлежит:

A drain valve device includes a base and a control unit removably disposed in the base. The control unit includes a valve and a resilient component positioned between the valve and the base. The drain valve device opens automatically as soon as water entering the base exceeds a predetermined level. The drain valve device shuts automatically as soon as water entering the base is less than a predetermined level. The drain valve device has advantages, namely simple structure, convenient of use, prevention of intrusion of odor and pests, easy to clean, and unlikely to get clogged. 1. A drain valve device , comprising:a base being hollow and cylindrical and having a bottom at which at least one through hole is disposed;a cover disposed at the base and having a drain vent; and{'sup': −3', '−3, 'a control unit comprising a hollow cylindrical valve, the valve having a top rim corresponding in position to the drain vent, wherein a baffle board is disposed in the valve to partition into a water storage space above and a receiving space below, the receiving space receiving a resilient component holding between the baffle board and the base such that, as soon as an amount of water entering the water storage space exceeds a predetermined level, a resilient force of the resilient component is counterbalanced to thereby allow the valve to move downward and away from the cover, the resilient component being a compression spring with a spring constant of 2×10to 3×10kgf/mm.'}2. The drain valve device of claim 1 , wherein the cover is tablet-shaped and extends downward to form a flange enclosing the drain vent.3. The drain valve device of claim 2 , wherein a first circumferential groove is disposed at the top rim of the valve and adapted to hold the flange.4. The drain valve device of claim 1 , wherein at least one drain hole is disposed at a periphery of the water storage space.5. The drain valve device of claim 4 , wherein the at least one drain hole of the valve is disposed at a ...

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Номер записи: 48
29-08-2013 дата публикации

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

Номер: US20130221404A1
Автор: Chan Ching-Lin, Lien Shin-Chin, Lin Chen-Yuan, Lin Cheng-Chi
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor structure and a method for forming the same are provided. The semiconductor structure comprises a first doped region, a second doped region, a doped strip and a top doped region. The first doped region has a first type conductivity. The second doped region is formed in the first doped region and has a second type conductivity opposite to the first type conductivity. The doped strip is formed in the first doped region and has the second type conductivity. The top doped region is formed in the doped strip and has the first type conductivity. The top doped region has a first sidewall and a second sidewall opposite to the first sidewall. The doped strip is extended beyond the first sidewall or the second sidewall. 1. A semiconductor structure , comprising:a first doped region having a first type conductivity;a second doped region formed in the first doped region and having a second type conductivity opposite to the first type conductivity;a doped strip formed in the first doped region and having the second type conductivity; anda top doped region formed in the doped strip and having the first type conductivity, wherein the top doped region has a first sidewall and a second sidewall opposite to the first sidewall, the doped strip is extended beyond the first sidewall or the second sidewall.2. The semiconductor structure according to claim 1 , wherein the doped strip has a third sidewall and a fourth sidewall opposite to the third sidewall claim 1 , the first sidewall or the second sidewall of the top doped region is between the third sidewall and the fourth sidewall between the doped strip.3. The semiconductor structure according to claim 1 , wherein the doped strips are separated from each other by the first doped region.4. The semiconductor structure according to claim 1 , wherein the top doped region is formed in the first doped region.5. The semiconductor structure according to claim 1 , wherein the doped strip is extended beyond both the first ...

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Номер записи: 49
29-08-2013 дата публикации

Electronic Device and Method for Image Stabilization

Номер: US20130222619A1
Автор: Chueh Hsin-Ti, Lin Cheng-Hsien, Lin Ching-Fu, Tai Pol-Lin, Wu Jing-Lung
Принадлежит: HTC CORPORATION

An electronic device and methods for image stabilization for use in an electronic device are provided. The method includes the steps of: receiving a plurality of motion data, at least a portion of the plurality of motion data corresponding to a first image frame, determining a motion value corresponding to the first image frame according to the portion of motion data, determining a display offset between the first image frame to a reference image frame according to the motion value and providing a portion of the first image frame for display according to the display offset. The reference image frame is displayed prior to the first image frame and is stored in a storage unit. 1. A method for image stabilization for use in an electronic device , comprising:capturing an image frame;receiving a plurality of sensor data during a time interval comprising a time the image frame is captured,determining a motion variance corresponding to the image frame according to the plurality of sensor data;determining whether to perform a stabilization on the image frame according to the motion variance; and determining a motion offset of a first saliency region of the image frame to a reference saliency region of a reference image frame;', 'cropping a portion of the image frame according to the motion offset; and', 'displaying the portion of the image frame on a display unit of the electronic device;, 'in response to the stabilization being determined to be performedwherein the reference image frame is captured prior to the image frame and is stored in a memory unit within the electronic device.2. The method of claim 1 , wherein the step of determining the motion variance comprises:filtering the plurality of sensor data with a high pass filter;applying a plurality of weight values to the plurality of filtered sensor data;calculating the motion variance corresponding to the image frame by performing an arithmetic operation on the plurality of the filtered sensor data and corresponding ...

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Номер записи: 50
26-09-2013 дата публикации

METHOD FOR MANUFACTURING FINE-PITCH BUMPS AND STRUCTURE THEREOF

Номер: US20130249081A1
Автор: Dai Hua-An, Hsieh Yung-Wei, Lin Cheng-Fan, LIN Shu-Chen, Shih Cheng-Hung
Принадлежит: Chipbond Technology Corporation

A method for manufacturing fine-pitch bumps comprises providing a silicon substrate; forming a titanium-containing metal layer having a plurality of first zones and a plurality of second zones on the silicon substrate; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer; forming a plurality of copper bumps having a plurality of first top surfaces and a plurality of first ring surfaces; heating the photoresist layer to form a plurality of body portions and removable portions; etching the photoresist layer; forming a plurality of bump protection layers on the titanium-containing metal layer, the first top surface and the first ring surface, each of the bump protection layers comprises a bump coverage portion; plating a plurality of gold layers at the bump coverage portion; eventually, removing the second zones to enable each of the first zones to form an under bump metallurgy layer. 1. A method for manufacturing fine-pitch bumps at least comprising:providing a silicon substrate having a surface, a plurality of bond pads disposed at the surface and a protective layer disposed at the surface, wherein the protective layer comprises a plurality of openings, and the bond pads are revealed by the openings;forming a titanium-containing metal layer on the protective layer and the bond pads, the titanium-containing metal layer comprises a plurality of first zones and a plurality of second zones located outside the first zones;forming a photoresist layer on the titanium-containing metal layer;patterning the photoresist layer to form a plurality of opening slots corresponded to the first zones of the titanium-containing metal layer;forming a plurality of copper bumps at the first zones of the titanium-containing metal layer, each of the copper bumps comprises a first top surface and a first ring surface;heating the photoresist layer to ream the opening slots of the photoresist layer, and the heat process enables the photoresist ...

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Номер записи: 51
26-09-2013 дата публикации

METHOD FOR MANUFACTURING FINE-PITCH BUMPS AND STRUCTURE THEREOF

Номер: US20130249089A1
Автор: Dai Hua-An, Hsieh Yung-Wei, Lin Cheng-Fan, LIN Shu-Chen, Shih Cheng-Hung
Принадлежит: Chipbond Technology Corporation

A method for manufacturing fine-pitch bumps comprises the steps of providing a silicon substrate; forming a titanium-containing metal layer on the silicon substrate, wherein the titanium-containing metal layer comprises a plurality of first zones and a plurality of second zones; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer to form a plurality of opening slots; forming a plurality of copper bumps at the opening slots, wherein each of the copper bumps comprises a first top surface and a ring surface; heating the photoresist layer to form a plurality of body portions and a plurality of removable portions; etching the photoresist layer; and removing the second zones to enable each of the first zones to form an under bump metallurgy layer having a bearing portion and an extending portion. 1. A fine-pitch bump structure at least comprising:a silicon substrate having a surface, a plurality of bond pads disposed at the surface and a protective layer disposed at the surface, wherein the protective layer comprised a plurality of openings, and the bond pads are revealed by the openings;a plurality of under bump metallurgy layers formed on the bond pads, each of the under bump metallurgy layers comprises a bearing portion and an extending portion;a plurality of copper bumps formed on the under bump metallurgy layers, each of the copper bumps comprises a first top surface and a ring surface, the bearing portion of each of the under bump metallurgy layers is located under each of the copper bumps, and the extending portion of each of the under bump metallurgy layers is protruded to the ring surface of each of the copper bumps;a plurality of bump protection layers formed on the extending portions of the under bump metallurgy layers, the first top surface and the ring surface of each of the copper bumps, each of the bump protection layers comprises a metallic coverage portion and a bump coverage portion having a second top ...

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Номер записи: 52
26-09-2013 дата публикации

SHIFT REGISTER APPARATUS AND DISPLAY SYSTEM UTILIZING THE SAME

Номер: US20130249876A1
Автор: HUANG Sheng-Feng, LIN Cheng-Hsiao
Принадлежит: InnoLux Corporation

A shift register apparatus including a first shift register cell is disclosed. The first shift register cell includes a first logic unit, a first control unit and a first output unit. The first logic unit generates a first control signal and a second control signal according to a start signal and a first setting signal. During a first period, the first control unit employs the first and second control signals to make a first clock signal update the first setting signal and the first output unit employs the first and second control signals to make a second clock signal update the first shifted signal. During a second period, the first output unit controls the first shifted signal according to the first and second control signals such that the first shifted signal does not follow the second clock signal. 1. A shift register apparatus , comprising: a first logic unit generating a first control signal and a second control signal according to a start signal from the input terminal and a first setting signal;', 'a first control unit according to the first and second control signals to make a first clock signal from the input terminal update the first setting signal during a first period; and', 'a first output unit outputting a first shifted output signal to the output terminal, wherein during the first period, the first output unit employs the first and second control signals to make a second clock signal from the input terminal update the first shifted output signal, and during the second period, the first output unit controls the first shifted output signal according to the first and second control signals such that the first shifted output signal does not follow the second clock signal., 'a first shift register cell, which are serially connected, each of the shift register cell having an input terminal connected to an output terminal of a preceding shift register cell and an output terminal connected to an input terminal of a succeeding shift register cell, comprising, ...

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Номер записи: 53
26-09-2013 дата публикации

SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOF

Номер: US20130252374A1
Автор: Hsieh Yung-Wei, Jiang Bo-Shiun, Lin Cheng-Fan, LIN Shu-Chen, Shih Cheng-Hung
Принадлежит: Chipbond Technology Corporation

A semiconductor packaging method includes providing a substrate having a plurality of pads, each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas; forming a conductible gel with anti-dissociation function on the substrate, said conductible gel includes a plurality of conductive particles and a plurality of anti-dissociation substances; mounting a chip on the substrate, said chip comprises a plurality of copper-containing bumps, each of the copper-containing bumps comprises a ring surface and a second coupling surface having a plurality of second conductive contact areas and a plurality of second non-conductive contact areas, wherein the conductive particles are electrically connected with the first conductive contact areas and the second conductive contact areas, said anti-dissociation substances are in contact with the second non-conductive contact area, and the ring surfaces are covered with the anti-dissociation substances. 1. A semiconductor packaging method at least comprising:providing a substrate having an upper surface and a plurality of pads disposed on the upper surface, wherein each of the pads comprises a first coupling surface having a plurality of first conductive contact areas and a plurality of first non-conductive contact areas;forming a conductible gel with anti-dissociation function on the upper surface and the pads of the substrate, wherein the conductible gel with anti-dissociation function includes a plurality of conductive particles and a plurality of anti-dissociation substances; andmounting a chip on the substrate, the chip comprises an active surface facing toward the upper surface of the substrate and a plurality of copper-containing bumps disposed at the active surface, wherein the conductible gel with anti-dissociation function covers the copper-containing bumps, each of the copper-containing bumps comprises a second coupling surface ...

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Номер записи: 54
03-10-2013 дата публикации

METHOD FOR MANUFACTURING FINE-PITCH BUMPS AND STRUCTURE THEREOF

Номер: US20130256882A1
Автор: Dai Hua-An, Hsieh Yung-Wei, Lin Cheng-Fan, LIN Shu-Chen, Shih Cheng-Hung
Принадлежит:

A method for manufacturing fine-pitch bumps comprises providing a silicon substrate; forming a titanium-containing metal layer having a plurality of first zones and a plurality of second zones on the silicon substrate; forming a photoresist layer on the titanium-containing metal layer; patterning the photoresist layer; forming a plurality of copper bumps having a plurality of first top surfaces and a plurality of first ring surfaces; heating the photoresist layer to form a plurality of body portions and removable portions; etching the photoresist layer; forming a plurality of bump protection layers on the titanium-containing metal layer, the first top surface and the first ring surface, each of the bump protection layers comprises a bump coverage portion; plating a plurality of gold layers at the bump coverage portion; eventually, removing the second zones to enable each of the first zones to form an under bump metallurgy layer. 1. A fine-pitch bump structure at least comprising:a silicon substrate having a surface, a plurality of bond pads disposed at the surface and a protective layer disposed at the surface, wherein the protective layer comprised a plurality of openings, and the bond pads are revealed by the openings;a plurality of under bump metallurgy layers formed on the bond pads, each of the under bump metallurgy layers comprises a bearing portion and an extending portion;a plurality of copper bumps formed on the under bump metallurgy layers, each of the copper bumps comprises a first top surface and a first ring surface, the bearing portion of each of the under bump metallurgy layers is located under each of the copper bumps, and the extending portion of each of the under bump metallurgy layers is protruded to the first ring surface of each of the copper bumps;a plurality of bump protection layers formed on the extending portions of the under bump metallurgy layers, the first top surface and the first ring surface of each of the copper bumps, each of the ...

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Номер записи: 55
17-10-2013 дата публикации

ELECTRIC CAULKING GUN

Номер: US20130270302A1
Автор: Cheng Chen-Chen, HSU Chih-Hua, Lin Cheng-Yuan, Lin Rui-Heng
Принадлежит:

An electric caulking gun has a body and an actuating assembly. The body has a pushing shaft, a motor, a gearbox, a transmission device, a circuit board and a switch. The gearbox has a sun gear with multiple mounting slots. The actuating assembly is mounted in the body, is connected to the switch and engages the sun gear and has a connecting arm, a linking arm, an actuating element, an oscillating arm and a pressing button. The connecting arm is pivotally connected to the switch. The linking arm is connected to the connecting arm. The actuating element is mounted in the body, selectively engages one of the mounting slots and has a wedge mount and an engaging block. The oscillating arm is connected to the body and is connected to the connecting arm. The pressing button is movably mounted in the body and is connected to the oscillating arm. 1. An electric caulking gun having a front end;', 'a rear end;', 'a side;', 'a lower end;', 'a pushing shaft movably connected to the rear end of the body to push a caulking tube;', 'a motor mounted on the side of the body to provide a power to the pushing shaft to enable the pushing shaft to move relative to the body;', an external surface;', 'an internal surface;', 'multiple mounting slots formed in the external surface of the sun gear at intervals; and', 'multiple engaging teeth formed around the internal surface of the sun gear to form the sun gear as an inner gear;, 'a sun gear rotatably mounted in the body and having'}, 'a gearbox mounted in the body, connected to the pushing shaft and the motor to transmit to the power of the motor to the pushing shaft and having'}, 'a transmission device rotatably mounted in the body near the lower end of the body;', 'a circuit board mounted in the body above the gearbox and electrically connected to the motor and the transmission device; and', 'a switch pressably connected to the body above the gearbox and having a top; and, 'a body having'} [ a lower end pivotally connected to the top of ...

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Номер записи: 56
24-10-2013 дата публикации

PROCESS OF FORMING A GRID ELECTRODE ON THE FRONT-SIDE OF A SILICON WAFER

Номер: US20130276881A1
Автор: ANDERSON RUSSELL DAVID, Hang Kenneth Warren, Kao Shih-Ming, Laudisio Giovanna, Lin Cheng-Nan, Wu Chun-Kwei
Принадлежит:

A process of forming a front-grid electrode on a silicon wafer having an ARC layer, comprising the steps: 110-. (canceled)12. A silicon solar cell comprising a silicon wafer having an ARC layer on its front-side and the grid electrode of .13. The grid electrode of claim 11 , wherein the total content of the electrically conductive metal powder in metal paste A is 50 to 92 wt.-%.14. The grid electrode of claim 11 , wherein the total content of the electrically conductive metal powder in metal paste Bis 50 to 92 wt.-%.15. The grid electrode of claim 11 , wherein the at least one electrically conductive metal powder in metal paste A is silver powder.16. The grid electrode of claim 11 , wherein the at least one electrically conductive metal powder in metal paste B is silver powder.17. The grid electrode of claim 11 , wherein the glass frit contained in metal paste B consists of at least one glass frit selected from the group consisting of (i) lead-containing glass frits with a softening point temperature in the range of 571 to 636° C. and containing 53 to 57 wt.-% of PbO claim 11 , 25 to 29 wt.-% of SiO claim 11 , 2 to 6 wt.-% of AlOand 6 to 9 wt.-% of BO claim 11 , (ii) lead-free glass frits with a softening point temperature in the range of 550 to 611° C. and containing 11 to 33 wt.-% of SiO claim 11 , >0 to 7 wt.-% of AlOand 2 to 10 wt.-% of BO claim 11 , and (iii) lead-free glass frits with a softening point temperature in the range of 550 to 611° C. and containing 40 to 73 wt.-% of BiO claim 11 , 11 to 33 wt-% of SiO claim 11 , >0 to 7 wt.-% of AlOand 2 to 10 wt.-% of BO.18. The grid electrode of claim 11 , wherein the ARC layer is selected from the group consisting of TiO claim 11 , SiO claim 11 , TiO/SiO claim 11 , SiNor SiNARC layers.19. The grid electrode of claim 11 , wherein an additional firing step (1a) is performed between steps (1) and (2).201. The grid electrode of claim claim 11 , wherein the printing in steps (1) and (2) is screen printing.21. A ...

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Номер записи: 57
24-10-2013 дата публикации

SEMICONDUCTOR MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME

Номер: US20130277725A1
Автор: Lien Shih-Chin, Lin Cheng-Chi, Wu Shyi-Yuan, Yeh Chin-Pen
Принадлежит:

A semiconductor memory device includes a substrate, a well region in the substrate, a patterned first dielectric layer on the substrate extending over the well region, a patterned first gate structure on the patterned first dielectric layer, a patterned second dielectric layer on the patterned first gate structure, and a patterned second gate structure on the patterned second dielectric layer. The patterned first gate structure includes a first section extending in a first direction and a second section extending in a second direction orthogonal to the first section, the first section and the second section intersecting each other in a cross pattern. The patterned second gate structure includes at least one of a first section extending in the first direction over the first section of the patterned first gate structure or a second section extending in the second direction over the second section of the patterned first gate structure. 1. A semiconductor memory device comprising:a substrate;a well region in the substrate having a same impurity type as the substrate;a patterned first dielectric layer on the substrate extending over the well region;a patterned first gate structure on the patterned first dielectric layer, the patterned first gate structure including a first section extending in a first direction and a second section extending in a second direction orthogonal to the first section, the first section and the second section intersecting each other in a cross pattern;a patterned second dielectric layer on the patterned first gate structure; anda patterned second gate structure on the patterned second dielectric layer, the patterned second gate structure including at least one of a first section extending in the first direction over the first section of the patterned first gate structure or a second section extending in the second direction over the second section of the patterned first gate structure.3. The semiconductor memory device of further comprising a ...

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Номер записи: 58
07-11-2013 дата публикации

TOUCH PANEL, TOUCH DISPLAY PANEL AND TOUCH DISPLAY APPARATUS

Номер: US20130293508A1
Автор: Chou Shih-Po, HUANG YEN-HENG, Kuo Wei-Hung, Lin Cheng-Hsing
Принадлежит: AU OPTRONICS CORPORATION

A touch panel capable of assembling to a casing assembly having a conductive protrusion is provided. The touch panel includes a substrate, a decoration pattern layer, a touch sensing device, a reflective protecting electrode, an electrostatic discharge protecting device, a plurality of signal connecting lines, an insulating layer and a protection layer. The decoration pattern layer is located in a periphery region of the substrate and overlapped with the reflective protecting electrode. The electrostatic discharge protecting device is connected to the touch sensing device and the reflective protecting electrode to transmit electrostatic charges to the reflective protecting electrode. The signal connecting lines are overlapped with the decoration pattern layer and electrically connected to the touch sensing device. The protection layer has an opening to expose a portion of the reflective protecting electrode such that the reflective protecting electrode is electrically connected to the conductive protrusion through the opening. 1. A touch panel capable of assembling to a casing assembly , the casing assembly having at least one conductive protrusion , the touch panel comprising:a substrate having a touch region and a periphery region, the periphery region surrounding the touch region;a decoration pattern layer located in the periphery region of the substrate;a touch sensing device located in the touch region of the substrate;a reflective protecting electrode located in the periphery region of the substrate and overlapped with the decoration pattern layer;an electrostatic discharge protecting device located on the substrate, wherein the electrostatic discharge protecting device is connected to the touch sensing device and the reflective protecting electrode so as to transmit electrostatic charges of the touch sensing device to the reflective protecting electrode;a plurality of signal connecting lines located in the periphery region of the substrate and overlapped with ...

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Номер записи: 59
05-12-2013 дата публикации

pHEMT HBT INTEGRATED EPITAXIAL STRUCTURE AND A FABRICATION METHOD THEREOF

Номер: US20130320402A1
Автор: HONG Bing-Shan, LIN Cheng-Kuo, TAKATANI Shinichiro, TSAI Shu-Hsiao
Принадлежит: WIN SEMICONDUCTORS CORP.

An improved pseudomorphic high electron mobility transistor (pHEMT) and heterojunction bipolar transistor (HBT) integrated epitaxial structure and the fabrication method thereof, in which the structure comprises a substrate, a pHEMT structure, an etching-stop spacer layer, and an HBT structure. The pHEMT's structure comprises a buffer layer, a barrier layer, a first channel spacer layer, a channel layer, a second channel spacer layer, a Schottky barrier layer, an etching-stop layer, and at least one cap layer. The fabrication method of an HBT and a pHEMT are also included. 1. An improved pseudomorphic high electron mobility transistor (pHEMT) structure , comprising:a substrate;a buffer layer formed on said substrate;a barrier layer formed on said buffer layer;a first channel spacer layer formed on said barrier layer;a channel layer formed on said first channel spacer layer;a second channel spacer layer formed on said channel layer;a Schottky barrier layer formed on said second channel spacer layer;an etching-stop layer formed on said Schottky barrier layer;at least one cap layer formed on said etching-stop layer;a gate recess formed by using at least one etching process terminated at said Schottky barrier layer;a gate electrode disposed in said gate recess on said Schottky barrier layer;a drain electrode disposed on one end of said cap layer; anda source electrode disposed on another end of said cap layer.2. The improved pHEMT structure according to claim 1 , wherein said channel layer is made of InGaAs compound semiconductor with the In content 0 Подробнее

Номер записи: 60
19-12-2013 дата публикации

MONOLITHIC COMPOUND SEMICONDUCTOR STRUCTURE

Номер: US20130334564A1
Автор: LI Szu-Ju, LIN Cheng-Kuo, SYU Rong-Hao, TSAI Shu-Hsiao
Принадлежит: WIN SEMICONDUCTORS CORP.

A monolithic compound semiconductor structure is disclosed. The monolithic compound semiconductor structure comprises a substrate, an n-type FET epitaxial structure, an n-type etching-stop layer, a p-type insertion layer, and an npn HBT epitaxial structure, and it can be used to form an FET, an HBT, or a thyristor. 1. A monolithic compound semiconductor structure integrating a heterojunction bipolar transistor (HBT) , a field effect transistor (FET) , and a thyristor epitaxial structure , comprising:a substrate; a channel layer and', 'an n-type doped layer formed on said channel layer;, 'an FET epitaxial structure formed on said substrate, which comprises'}an n-type etching-stop layer;a p-type insertion layer, formed on said n-type etching-stop layer; and a sub-collector layer made of an n-type doped layer,', 'a collector layer made of an n-type doped layer and formed on said sub-collector layer,', 'a base layer made of an p-type doped layer and formed on said collector layer, and', 'an emitter layer made of an n-type doped layer and formed on said base layer,, 'an HBT epitaxial structure formed on said first p-type doped layer, which comprises'}wherein said FET epitaxial structure, said n-type etching-stop layer, said first p-type doped layer, and said sub-collector layer, said collector layer, and said base layer of said HBT epitaxial structure form the thyristor epitaxial structure.2. The monolithic compound semiconductor structure according to claim 1 , wherein said n-type etching-stop layer is formed of InGaP; the doping concentration of said n-type etching-stop layer is equal to or higher than 1×10cmand equal to or lower than 1×10cm; and the thickness of said n-type etching-stop layer is between 50 Å to 5000 Å.3. The monolithic compound semiconductor structure according to claim 1 , wherein said p-type insertion layer comprises one or multiple p-type doped layers; the doping concentration in neighboring p-type doped layers of said p-type insertion layer are ...

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Номер записи: 61
19-12-2013 дата публикации

INTEGRATED STRUCTURE OF COMPOUND SEMICONDUCTOR DEVICES

Номер: US20130334570A1
Автор: LI Szu-Ju, LIN Cheng-Kuo, SYU Rong-Hao, TSAI Shu-Hsiao
Принадлежит: WIN SEMICONDUCTORS CORP.

An integrated structure of compound semiconductor devices is disclosed. The integrated structure comprises from bottom to top a substrate, a first epitaxial layer, an etching-stop layer, a second epitaxial layer, a sub-collector layer, a collector layer, a base layer, and an emitter layer, in which the first epitaxial layer is a p-type doped layer, the second epitaxial layer is an n-type graded doping layer with a gradually increased or decreased doping concentration, and the sub-collector layer is an n-type doped layer. The integrated structure can be used to form an HBT, a varactor, or an MESFET. 1. An integrated structure of compound semiconductor devices , sequentially comprising: 'a first epitaxial layer made of a p-type doped layer formed on said substrate;', 'a substrate;'}an etching-stop layer made of an n-type doped layer formed on said first epitaxial layer;a second epitaxial layer made of an n-type graded doping layer formed on said etching-stop layer with a doping concentration gradually increased or decreased from bottom to top;a sub-collector layer made of an n-type doped layer formed on said second epitaxial layer,a collector layer made of an n-type doped layer formed on said sub-collector layer,a base layer made of an p-type doped layer formed on said collector layer, andan emitter layer made of an n-type doped layer formed on said base layer.2. The integrated structure of compound semiconductor devices according to claim 1 , wherein said first epitaxial layer claim 1 , said etching-stop layer claim 1 , said second epitaxial layer claim 1 , and said sub-collector layer form the epitaxial structure of a varactor or a metal semiconductor field effect transistor (MESFET); said sub-collector layer claim 1 , said collector layer claim 1 , said base layer claim 1 , and said emitter layer form the epitaxial structure of a heterojuction bipolar transistor (HBT).3. The integrated structure of compound semiconductor devices according to claim 1 , wherein said ...

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Номер записи: 62
23-01-2014 дата публикации

BYPASS AIR MAINTENANCE TIRE AND PUMP ASSEMBLY

Номер: US20140020805A1
Автор: "ODonnell Adam Joseph", BENEDICT Robert Leon, Crano Richard Nicholas, Gobinath Thulasiram, LIN CHENG-HSIUNG
Принадлежит:

An air maintenance tire and pump assembly includes a pair of inline valves are positioned on respective opposite sides of an in-tire air passageway inlet junction and a pair of outlet valves positioned at a downstream side of a respective inline valve. A bypass valve is further provided extending between the downstream valve sides of the inline valves, the bypass valve operative to open and bypass the flow of inlet air through the outlet valves to the tire cavity in the event that a tire cavity pressure is greater than a preset pressure level and close when a tire cavity pressure is less than the preset pressure level. 1. An air maintenance tire and pump assembly comprising:a tire having a tire cavity, first and second sidewalls extending respectively from first and second tire bead regions to a tire tread region;an elongate substantially annular air passageway enclosed within a bending region of the tire, the air passageway operatively closing and opening segment by segment as the bending region of the tire passes through a rolling tire footprint to pump air along the air passageway;an air inlet port assembly coupled to and in air flow communication with the air passageway at an inlet air passageway junction, the air inlet port assembly operable to channel inlet air from outside of the tire into the air passageway;a pair of substantially inline valves positioned on respective opposite sides of the inlet air passageway junction in air flow communication with the inlet port assembly; the inline valves operative to selectively open in respective opposite directions and pass a flow of the inlet air from an upstream valve side to a downstream valve side and into the air passageway,a pair of outlet valves, each outlet valve positioned in air flow communication with a downstream side of a respective inline valve, the valves operative to selectively open and conduct a flow of the inlet air from the downstream side of a respective inline valve to the tire cavity; anda ...

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Номер записи: 63
23-01-2014 дата публикации

GRAPHENE-CONTAINING ELECTRODES

Номер: US20140023926A1
Автор: Hu Lung-Hao, Li Lain-Jong, LIN Cheng-Te, Wu Feng-Yu
Принадлежит: Academia Sinica

A battery includes a first electrode including a plurality of particles containing lithium, a layer of carbon at least partially coating a surface of each particle, and electrochemically exfoliated graphene at least partially coating one or more of the plurality of particles. The battery includes a second electrode and an electrolyte. At least a portion of the first electrode and at least a portion of the second electrode contact the electrolyte. 1. A battery , comprising: a plurality of particles containing lithium;', 'a layer of carbon at least partially coating a surface of each of at least some of the particles; and', 'electrochemically exfoliated graphene at least partially coating one or more of the plurality of particles;, 'a first electrode comprisinga second electrode; andan electrolyte, wherein at least a portion of the first electrode and at least a portion of the second electrode contact the electrolyte.2. The battery of claim 1 , wherein the first electrode is a cathode.3. The battery of claim 1 , wherein the first electrode is an anode.4. The battery of claim 1 , wherein the particles include at least one of lithium iron phosphate claim 1 , lithium iron oxide claim 1 , lithium iron phosphorous oxide claim 1 , lithium cobalt oxide claim 1 , lithium manganese oxide claim 1 , lithium nickel oxide claim 1 , lithium cobalt manganese nickel claim 1 , or lithium cobalt manganese nickel oxide.5. The battery of claim 1 , wherein the electrochemically exfoliated graphene includes a plurality of flakes of electrochemically exfoliated graphene disposed on the carbon.6. The battery of claim 1 , wherein the electrochemically exfoliated graphene forms about 0.001 wt % to about 5 wt % of the electrode.7. An electrode material claim 1 , comprising:a plurality of particles containing lithium;a layer of carbon at least partially coating a surface of each of at least some of the particles; andelectrochemically exfoliated graphene at least partially coating one or more of ...

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Номер записи: 64
23-01-2014 дата публикации

SEMICONDUCTOR STRUCTURE AND A METHOD FOR MANUFACTURING THE SAME

Номер: US20140024205A1
Автор: Chen Chieh-Chih, Lien Shih-Chin, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a diode. The diode comprises a first doped region, a second doped region and a third doped region. The first doped region and the third doped region have a first conductivity type. The second doped region has a second conductivity type opposite to the first conductivity type. The second doped region and the third doped region are separated from each other by the first doped region. The third doped region has a first portion and a second portion adjacent to each other. The first portion and the second portion are respectively adjacent to and away from the second doped region. A dopant concentration of the first portion is bigger than a dopant concentration of the second portion. 1. A method for manufacturing a semiconductor structure , comprising forming a diode , a method for forming the diode comprising:forming a second doped region on a first doped region; andforming a third doped region on the first doped region,wherein the first doped region and the third doped region have a first conductivity type, the second doped region has a second conductivity type opposite to the first conductivity type, the second doped region and the third doped region are separated from each other by the first doped region, the third doped region has a first portion and a second portion adjacent to each other, the first portion and the second portion are respectively adjacent to and away from the second doped region, a dopant concentration of the first portion is bigger than a dopant concentration of the second portion.2. The method for manufacturing the semiconductor structure according to claim 1 , wherein the first doped region comprises a top layer and a well region claim 1 , a method for forming the top layer comprises doping a top portion of the well region.3. The method for manufacturing the semiconductor structure according to claim 2 , wherein a method for ...

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Номер записи: 65
06-02-2014 дата публикации

FABRICATING METHOD FOR FABRICATING METALLIC MEMBER

Номер: US20140033786A1
Автор: HUO QING-FENG, Lin Cheng-Hung, LIU TAO-MIN, WANG WEN-TAO, YOU YI-MING, ZHAO LIN-SHENG, Zheng Ming, Zhou Ke
Принадлежит:

A method for fabricating a metallic member includes providing a pre-forging mould. The pre-forging mould comprises an upper mould and a lower mould. The lower mould defines a pre-forging chamber, and a die cavity defined in a bottom surface of the pre-forging chamber. A metallic stock is placed above the die cavity, and the upper mould is moved toward the lower mould to forge the metallic stock, thereby forming a pre-formed body comprising a forging portion and a pre-forged base; annealing the pre-formed body; providing a forging mould to forge the pre-formed body, thereby obtaining a forged-body with a forged base thinner than that of the pre-forged base. Then the forged-body is milled to a desired size, and sandblasted, thereby obtaining the metallic member. 1. A fabricating method for a metallic member , comprising:providing a pre-forging mould, the pre-forging mould comprising an upper mould and a lower mould, the lower mould defining a pre-forging chamber therein, and a die cavity being defined on a bottom surface of the pre-forging chamber;placing a metallic stock above the die cavity, moving the upper mould toward the lower mould to forge the metallic stock, thereby forming a pre-forming body comprising a forging portion in the die cavity and a pre-forged base located between the bottom surface of the pre-forging chamber and the upper mould;annealing the pre-forming body;providing a forging mould to forge the pre-forming body, the forging mould comprising a movable mould and a stationary mould, the stationary mould defining a forging chamber having a shape and sizes being substantially the same as that of the die cavity of the lower mould, placing the pre-forming body on the stationary mould with the forging portion received in the forging chamber, moving the movable mould toward the stationary mould, thereby obtaining a forged-body having a thickness being thinner than that of the pre-forged base; andmilling the forged-body to a desired size.2. The ...

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Номер записи: 66
13-02-2014 дата публикации

Single Substrate Processing Head For Particle Removal Using Low Viscosity Fluid

Номер: US20140041581A1
Автор: Ginzburg Leon, Hussain Anwar, Kholodenko Arnold, LIN Cheng-Yu, Mandelboym Mark, Tomasch Gregory A.
Принадлежит: LAM RESEARCH CORPORATION

A head for dispensing a thin film of a fluid over a substrate is disclosed. The head includes a body assembly that extends between a first and a second end that is at least a width of the substrate. The body includes a main bore that is defined between the first and the second ends, the main bore connected to an upper side of a reservoir through a plurality of feeds that are defined between the main bore and the reservoir. The body also includes a plurality of outlets connected to a lower side of the reservoir and extends to an outlet slot. The plurality of feeds has a larger cross-sectional area than the plurality of outlets and the plurality of feeds are fewer than the plurality of outlets. The fluid is configured to flow through the main bore, through the plurality of feeds along the bore and fill the reservoir up to at least the threshold level before fluid is evenly output as a film out of the outlet slot onto the substrate. 1. An apparatus to distribute fluid material to a surface of a substrate , comprising: (i) a main bore extending between the first end and the second end, the main bore configured to couple to a delivery manifold;', '(ii) a body channel extending between the first end and the second end, the body channel being substantially parallel to the main bore; and', '(iii) a plurality of feeds connecting the main bore and the body channel, the body channel extending to a body interface surface of the body; and, '(a) a body extending a length between a first end and a second end, the length being greater than a width of the substrate, the body including,'} (i) a face plate channel extending between the first end and the second end of the body, the face plate channel substantially parallel to the main bore, the face plate channel defined at the face plate interface surface so that mating the body interface surface and the face plate interface surface defines a reservoir that couples to the feeds; and', '(ii) a plurality of outlets oriented along the ...

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Номер записи: 67
13-02-2014 дата публикации

Oligomer-protease inhibitor conjugates

Номер: US20140045770A1
Автор: Franco J. Duarte, Jennifer Riggs-Sauthier, LIN Cheng, Tacey X. Viegas, Wen Zhang, Xuyuan Gu
Принадлежит: Nektar Therapeutics

The invention provides small molecule drugs that are chemically modified by covalent attachment of a water-soluble oligomer. A conjugate of the invention, when administered by any of a number of administration routes, exhibits characteristics that are different from the small molecule drug not attached to the water-soluble oligomer.

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Номер записи: 68
27-02-2014 дата публикации

SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Номер: US20140054656A1
Автор: Chen Chieh-Chih, Lien Shih-Chin, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises a substrate, a device region, a first doped region and a gate structure. The first doped region is formed in the substrate adjacent to the device region. The gate structure is on the first doped region. The first doped region is overlapped the gate structure. 1. A semiconductor structure , comprising:a substrate;a device region;a first doped region formed in the substrate adjacent to the device region; anda gate structure on the first doped region, wherein the first doped region is overlapped the gate structure.2. The semiconductor structure according to claim 1 , wherein the device region comprises a first device region and a second device region claim 1 , the first device region and the second device region are separated from each other by the first doped region.3. The semiconductor structure according to claim 2 , wherein the first doped region has a symmetrical shape and is disposed along an outer edge of the first device region.4. The semiconductor structure according to claim 1 , further comprising a dielectric structure between the gate structure and the first doped region claim 1 , wherein the dielectric structure has a symmetrical shape.5. The semiconductor structure according to claim 1 , wherein the gate structure has a symmetrical shape.6. The semiconductor structure according to claim 1 , further comprising a gate claim 1 , wherein the device region comprises a first device region and a second device region claim 1 , the first doped region is between the first device region and the second device region claim 1 , the gate is disposed in the first device region.7. The semiconductor structure according to claim 6 , wherein the gate has a first gate sidewall and a second gate sidewall opposite to the first gate sidewall claim 6 , the smallest gap distance between the first doped region and the first gate sidewall is substantially equal to ...

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Номер записи: 69
06-03-2014 дата публикации

MOS DEVICE AND METHOD FOR FABRICATING THE SAME

Номер: US20140061721A1
Автор: Chan Ching-Lin, Lien Shih-Chin, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

An improved MOS device is provided whereby the p-top layer is defined by a series of discretely placed p type top diffusion regions. The invention also provides methods for fabricating the MOS device of the invention. 1. A MOS device comprising:a p-substrate;a high voltage n-well (HVNW) disposed in the p-substrate;a first p-well formed in the p-substrate having a first p+ doped region;a second p-well formed in the HVNW having a second p+ doped region adjacent to an n+ doped source region;a discrete p-top region having a plurality of p-top segments disposed in the HVNW; andan n-grade region disposed above the discrete p-top region,wherein each of the plurality of p-top segments having a distance from the n-grade region to define a plurality of distances, a width to define a plurality of widths and a separation distance with an adjacent p-top segment to define a plurality of separation distances.2. The MOS device of claim 1 , wherein the MOS device is a LDMOS device and the HVNW having an n+ doped drain region.3. The MOS device of claim 2 , wherein each of the distances of the plurality of distances is the same.4. The MOS device of claim 2 , wherein the distances of the plurality of distances are increasing.5. The MOS device of claim 2 , wherein a number of the plurality p-top segments claim 2 , the plurality of distances claim 2 , the plurality of widths claim 2 , and the plurality of separation distances are such that there is at least about a 15% reduction in on-resistance at a drain voltage of about 1 volt in comparison to another LDMOS device having by a continuous p-top region.6. The MOS device of claim 5 , wherein a breakdown voltage of the LDMOS device is about the same as a breakdown voltage of the another LDMOS device.7. The MOS device of claim 2 , additionally comprising a field oxide isolation region disposed to isolate the first p+ doped region claim 2 , the second p+ doped region adjacent to the n+ doped source region claim 2 , and the n+ doped drain ...

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Номер записи: 70
06-03-2014 дата публикации

INTERCONNECT FOR FUEL CELL STACK

Номер: US20140065508A1
Автор: Darga Daniel, LIN Cheng-Yu, Srivatsan Vijay
Принадлежит: Bloom Energy Corporation

Various embodiments include fuel cell interconnects having a fuel distribution portion having an inlet opening, a fuel collection portion having an outlet opening, and a primary fuel flow field containing channels, wherein the fuel distribution portion comprises at least one raised feature defining a fuel distribution flow path, and the fuel distribution flow path is not continuous with the channels in the primary fuel flow field. The at least one raised feature may include, for example, a network of ribs and/or dots. Further embodiments include interconnects having a fuel distribution portion with a variable surface depth to provide variable flow restriction and/or a plenum with variable surface depth and raised a raised relief feature on the cathode side, and/or varying flow channel depths and/or rib heights adjacent a fuel hole. 1. An interconnect for a fuel cell stack , comprising:a first side comprising a fuel distribution portion, a fuel collection portion and a first plurality of ribs and channels defining a primary fuel flow field between the fuel distribution portion and the fuel collection portion;a fuel inlet opening in the fuel distribution portion; anda fuel outlet opening in the fuel collection portion;wherein:the fuel distribution portion comprises at least one raised feature defining a fuel distribution flow path, wherein the fuel distribution flow path is not continuous with the channels in the primary fuel flow field.2. The interconnect of claim 1 , wherein the at least one raised feature comprises a blocking rib that is located between the fuel inlet opening and the primary fluid flow field such that fuel from the inlet opening is prevented from flowing in a straight line path from the fuel inlet opening to the primary fluid flow field.3. The interconnect of claim 1 , wherein the first plurality of ribs and channels defining the primary flow field comprise parallel ribs and channels extending in a first direction claim 1 , and the at least one ...

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Номер записи: 71
06-03-2014 дата публикации

Ultra-High Voltage N-Type-Metal-Oxide-Semiconductor (UHV NMOS) Device and Methods of Manufacturing the same

Номер: US20140065781A1
Автор: Chen Chieh-Chih, Lien Shih-Chin, Lin Chen-Yuan, Lin Cheng-Chi, Wu Shyi-Yuan
Принадлежит: MACRONIX INTERNATIONAL CO., LTD.

An ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device with improved performance and methods of manufacturing the same are provided. The UHV NMOS includes a substrate of P-type material; a first high-voltage N-well (HVNW) region disposed in a portion of the substrate; a source and bulk p-well (PW) adjacent to one side of the first HVNW region, and the source and bulk PW comprising a source and a bulk; a gate extended from the source and bulk PW to a portion of the first HVNW region, and a drain disposed within another portion of the first HVNW region that is opposite to the gate; a P-Top layer disposed within the first HVNW region, the P-Top layer positioned between the drain and the source and bulk PW; and an n-type implant layer formed on the P-Top layer. 1. A method for manufacturing ultra-high voltage n-type-metal-oxide-semiconductor (UHV NMOS) device , at least comprising:providing a substrate of P-type material;forming a first high-voltage N-well (HVNW) region in a portion of the substrate;forming a source and bulk p-well (PW) adjacent to one side of the first HVNW region;forming a P-Top layer within the first HVNW region; andforming an n-type implant layer on the P-Top layer.2. The method according to claim 1 , wherein the P-Top layer and the n-type implant layer are formed by ion implant or doping.3. The method according to claim 1 , further comprising:forming a source and a bulk in the source and bulk PW;forming a gate extended from the source and bulk PW to a portion of the first HVNW region; andforming a drain within another portion of the first HVNW region that is opposite to the gate, wherein the P-Top layer and the n-type implant layer are positioned between the drain and the source and bulk PW.4. The method according to claim 3 , further comprising growing a field oxide (FOX) at the first HVNW region and on the n-type implant layer claim 3 , wherein the gale is extended from the source and bulk PW to a portion of the FOX.5. The ...

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Номер записи: 72
13-03-2014 дата публикации

Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device

Номер: US20140070230A1
Автор: Albert Augustus Burk, Jr., Anant Kumar Agarwal, LIN Cheng, Michael John O'Loughlin
Принадлежит: Cree Inc

A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.

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Номер записи: 73
20-03-2014 дата публикации

METHODS FOR ENHANCING IMAGES AND APPARATUSES USING THE SAME

Номер: US20140079319A1
Автор: Chueh Hsin-Ti, Lin Cheng-Hsien, Lin Ching-Fu, Pan Chia-Ho, Tai Pol-Lin
Принадлежит: HTC CORPORATION

An embodiment of an image enhancement method is introduced. An object is detected from a received image according to a object feature. An intensity distribution of the object is computed. A plurality of color values of pixels of the object is mapped to a plurality of new color values of the pixels according to the intensity distribution. Finally, a new image comprising the new color values of the pixels is provided to a user. 1. An image enhancement method for enhancing an object within an image , comprising:receiving the image;detecting the object according to an object feature;computing an intensity distribution of the object;mapping a plurality of color values of pixels of the object to a plurality of new color values of the pixels according to the intensity distribution; andproviding a new image comprising the new color values of the pixels to a user.2. The image enhancement method of claim 1 , further comprising:applying a filter on the pixels of the object.3. The image enhancement method of claim 1 , wherein the object is an eye region of a face claim 1 , and the computation of the intensity distribution is performed by calculating a brightness histogram of the eye region.4. The image enhancement method of claim 3 , wherein the mapping of the color values is performed by expanding the brightness histogram with respect to a threshold.5. The image enhancement method of claim 4 , wherein the threshold is determined by separating the brightness histogram into two parts by a thresholding algorithm.6. The image enhancement method of claim 5 , wherein the mapping of the color values is performed by applying a histogram equalization algorithm on two parts of the intensity distribution of the eye region claim 5 , respectively.7. The image enhancement method of claim 1 , wherein the object is a face region of a person claim 1 , and the computation of the intensity distribution is performed by forming a face map comprising the color values of the face region.8. The image ...

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Номер записи: 74
03-01-2019 дата публикации

Air Maintenance System

Номер: US20190001767A1
Автор: Anderson Norman David, Dellinger Shawn William, LIN CHENG-HSIUNG, Taggart Jeffrey Silver
Принадлежит:

An air maintenance system for use with a pneumatic tire is described. The air maintenance system includes a pumping mechanism that is preferably mounted on the interior surface of a wheel rim to keep the pneumatic tire from becoming underinflated. The pumping mechanism includes at least one dual chamber pump, preferably at least two dual chamber pumps configured in series. More preferably, the dual chamber pumps are driven by an external mass that moves as the tire rotates. The tire's rotational energy operates the pump to ensure the tire cavity is maintained at the desired pressure level. An optional control valve shuts off airflow to the pumping mechanism when the tire cavity pressure is at the desired level. 1. A pneumatic tire and rim assembly comprising:a pump assembly mounted to a wheel rim of the rim assembly, said pump assembly having a piston mounted in a chamber, wherein an external sliding mass is connected to a distal end of the piston, wherein said external mass operates the pump assembly during rotation of the tire.2. The pneumatic tire and rim assembly of wherein said pump is a double acting pump having a first and second chamber.3. The pneumatic tire and rim assembly of further including a plurality of check valves for maintaining air flow in the pumps in a single direction.4. The pneumatic tire and rim assembly of wherein the first and second pump chambers are connected in series.5. The pneumatic tire and rim assembly of wherein a check valve is provided between the first and second pump chambers.7. The pneumatic tire and rim assembly of further including an inlet control valve for controlling inlet air into at least one of the pump assemblies.8. The pneumatic tire and rim assembly of wherein the external sliding mass is connected to a leaf spring. The present invention relates generally to an air maintenance system for use with a tire and, more specifically, to an air maintenance pumping assembly.Normal air diffusion reduces tire pressure over time ...

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Номер записи: 75
07-01-2016 дата публикации

PORTABLE MICROSCOPE DEVICE

Номер: US20160004057A1
Автор: Chen Chang-Yu, CHIANG Tsun-Chao, LIN Cheng-Ming, LIN Shu-Sheng
Принадлежит:

The present invention discloses a portable microscope device which can be installed on the smartphone capable of capturing image. By combing these devices, users can observe the detection sample and capture the image of the sample instantly without environment limitation. Moreover, during operation, the user can observe the whole image of the sample by substituting the microscope lens of different magnification ratio or by shifting the position of the sample. 1. A portable microscope device , for cooperating with a communication device capable of capturing image and utilizing an image capture module of the communication device to capture an image of a detection sample , comprising:a base, having an illumination module;a cover, movably installed on the base;a microscope module, having a microscope lens movably installed on the cover to enable the image capture module of the communication device to capture the image of the detection sample by the microscope lens.2. The portable microscope device of claim 1 , wherein a magnetic attraction portion is installed on the periphery of the detective portion claim 1 , a relative magnetic attraction portion of the microscope module is attracted to the magnetic attraction portion to enable the microscope module and the cover to relatively move under the condition that they are not separated.3. The portable microscope device of claim 1 , wherein the base has a restrictive groove on an upper plane thereof for a microscope slide disposed in the restrictive groove.4. The portable microscope device of claim 1 , wherein a microscope slide is installed at one side of the cover.5. The portable microscope device of claim 1 , wherein the cover is made by transparent material.6. The portable microscope device of claim 1 , wherein the base has a detective portion at the top thereof.7. The portable microscope device of claim 6 , wherein a power module is installed on the bottom of the base claim 6 , the illumination module corresponds to the ...

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Номер записи: 76
04-01-2018 дата публикации

PLASTIC BARREL, IMAGING LENS MODULE AND ELECTRONIC DEVICE

Номер: US20180003916A1
Автор: CHOU Ming-Ta, Lin Cheng-Feng, Weng Wei-Hung
Принадлежит:

A plastic barrel includes an object-end portion, an image-end portion, a tube portion and a plurality of wedge structures. The object-end portion includes an outer object-end surface, an object-end hole and an inner annular object-end surface. The image-end portion includes an outer image-end surface, an image-end opening and an inner annular image-end surface. The tube portion connects the object-end portion and the image-end portion, and includes a plurality of inclined surfaces. The wedge structures are disposed on at least one surface of the inner annular object-end surface, the inner annular image-end surface and the inclined surfaces, wherein the wedge structures are regularly arranged around the central axis, and each of the wedge structures includes an acute end and a tapered section. The tapered section connects the surface, which the wedge structure is disposed on, and the acute end. 1. A plastic barrel , comprising: an outer object-end surface;', 'an object-end hole; and', 'an inner annular object-end surface connected to the outer object-end surface and surrounding the object-end hole;, 'an object-end portion comprising an outer image-end surface;', 'an image-end opening; and', 'an inner annular image-end surface connected to the outer image-end surface and surrounding the image-end opening;, 'an image-end portion comprising 'a plurality of inclined surfaces, wherein an angle is between each of the inclined surfaces and a central axis of the plastic barrel; and', 'a tube portion connecting the object-end portion and the image-end portion, wherein the tube portion comprises an acute end; and', 'a tapered section connecting the surface, which the wedge structure is disposed on, and the acute end., 'a plurality of wedge structures, which are disposed on at least one surface of the inner annular object-end surface, the inner annular image-end surface and the inclined surfaces, wherein the wedge structures are regularly arranged around the central axis, and ...

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Номер записи: 77
04-01-2018 дата публикации

ANNULAR OPTICAL ELEMENT, IMAGING LENS MODULE AND ELECTRONIC DEVICE

Номер: US20180003959A1
Автор: CHOU Ming-Ta, Lin Cheng-Feng, Weng Wei-Hung
Принадлежит:

An annular optical element includes an outer annular surface, an inner annular surface, a first side surface, a second side surface and a plurality of strip-shaped wedge structures. The outer annular surface surrounds a central axis of the annular optical element and includes at least two shrunk portions. The first side surface connects the outer annular surface and the inner annular surface. The second side surface connects the outer annular surface and the inner annular surface, wherein the second side surface is disposed correspondingly to the first side surface. The strip-shaped wedge structures are disposed on the inner annular surface, wherein each of the strip-shaped wedge structures is disposed along a direction from the first side surface towards the second side surface and includes an acute end and a tapered portion connecting the inner annular surface and the acute end. 1. An annular optical element , comprising:an outer annular surface surrounding a central axis of the annular optical element and comprising at least two shrunk portions, wherein the shrunk portions are parts of the outer annular surface closer to the central axis;an inner annular surface surrounding the central axis and closer to the central axis than the outer annular surface;a first side surface connecting the outer annular surface and the inner annular surface;a second side surface connecting the outer annular surface and the inner annular surface, wherein the second side surface is disposed correspondingly to the first side surface; anda plurality of strip-shaped wedge structures disposed on the inner annular surface, wherein each of the strip-shaped wedge structures is disposed along a direction from the first side surface towards the second side surface and comprises an acute end and a tapered portion connecting the inner annular surface and the acute end.2. The annular optical element of claim 1 , wherein the annular optical element with the strip-shaped wedge structures is formed ...

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Номер записи: 78
03-01-2019 дата публикации

IMAGING LENS ASSEMBLY, IMAGE CAPTURING UNIT AND ELECTRONIC DEVICE

Номер: US20190004285A1
Автор: Chen Chun-Yen, Chen Wei-yu, Lin Cheng-Chen, TANG Hsiang-Chi, TSENG Yu-Tai
Принадлежит:

An imaging lens assembly includes, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The seventh lens element has an image-side surface being concave in a paraxial region thereof. The image-side surface of the seventh lens element has at least one convex shape in an off-axis region thereof. An object-side surface and the image-side surface of the seventh lens element are aspheric. At least one of an image-side surface of the fourth lens element and an image-side surface of the fifth lens element has at least one inflection point. 1. An imaging lens assembly comprising seven lens elements , the seven lens elements being , in order from an object side to an image side , a first lens element , a second lens element , a third lens element , a fourth lens element , a fifth lens element , a sixth lens element and a seventh lens element , the first lens element with positive refractive power having an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof , the seventh lens element having an image-side surface being concave in a paraxial region thereof , the image-side surface of the seventh lens element having at least one convex shape in an off-axis region thereof , and an object-side surface and the image-side surface of the seventh lens element being both aspheric; [{'br': None, 'i': 'f/R', '0≤8;'}, {'br': None, 'i': 'f/R', '0≤10,'}, {'br': None, 'i': 'Td/ΣCT<', '1.65; and'}, {'br': None, 'i': f/f', 'f, '1.10<|6|+|7|.'}], 'wherein at least one of an image-side surface of the fourth lens element and an image-side surface of the fifth lens element has ...

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Номер записи: 79
13-01-2022 дата публикации

IMAGING LENS ASSEMBLY MODULE, CAMERA MODULE AND ELECTRONIC DEVICE

Номер: US20220011651A1
Автор: CHANG Lin-An, Chen Kuan-Ming, CHOU Ming-Ta, Lin Cheng-Chen, TANG Hsiang-Chi
Принадлежит:

An imaging lens assembly module has an optical axis, and includes a lens barrel and an optical element set. The lens barrel includes an object-side portion, a tubular portion and a tip-end minimal aperture. The object-side portion includes a first assembling surface. The tubular portion includes a plurality of second assembling surfaces. The optical element set includes at least one light blocking sheet and at least one optical lens element. The light blocking sheet includes an object-side surface, an image-side surface and an inner opening surface. The optical lens element includes an optical effective portion and a peripheral portion. The object-side portion of the lens barrel includes a first reversing inclined surface gradually enlarged from the tip-end minimal aperture to the image side of the lens barrel, and the first reversing inclined surface is not contacted with the optical element set. 1. An imaging lens assembly module , which has an optical axis , comprising:a transparent flat plate; an object-side portion surrounding the optical axis, and comprising a first assembling surface, the first assembling surface facing toward an image side of the lens barrel;', 'a tubular portion surrounding the optical axis, the tubular portion connected to the object-side portion and extending to the image side of the lens barrel, and comprising a plurality of second assembling surfaces, wherein all of the second assembling surfaces face toward the optical axis, the second assembling surfaces are arranged from an object side of the lens barrel to the image side of the lens barrel in order of increasing a distance from the optical axis, and have different diameters; and', 'a tip-end minimal aperture being a symmetrical circle about the optical axis as a center, and the tip-end minimal aperture located on the object-side portion; and, 'a lens barrel disposed on an image side of the transparent flat plate, and comprising [ an object-side surface disposed on the first ...

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Номер записи: 80
05-01-2017 дата публикации

SEMICONDUCTOR DEVICE PACKAGES

Номер: US20170005042A1
Автор: CHEN Shih-Ren, Lin Cheng-Nan
Принадлежит: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

The present disclosure relates to a semiconductor device package and a method for manufacturing the semiconductor device package. The semiconductor device package includes a substrate, a grounding element, a component, a package body and a conductive layer. The grounding element is disposed in the substrate and includes a connection surface exposed at a second portion of a lateral surface of the substrate. The component is disposed on a top surface of the substrate. The package body covers the component and the top surface of the substrate. A lateral surface of the package body is aligned with the lateral surface of the substrate. The conductive layer covers a top surface and the lateral surface of the package body, and further covers the second portion of the lateral surface of the substrate. A first portion of the lateral surface of the substrate is exposed from the conductive layer. 16-. (canceled)7. A method of manufacturing a semiconductor device package , comprising:(a) providing a substrate having a top surface, a bottom surface opposite to the top surface, and a lateral surface extending from the top surface to the bottom surface, wherein the lateral surface includes a first portion adjacent to the bottom surface and a second portion aligned with the first portion and adjacent to the top surface, the substrate including a grounding element exposed at the second portion of the lateral surface of the substrate;(b) attaching at least one electronic component on the top surface of the substrate;(c) forming a package body on the substrate to encapsulate the electronic component and the top surface of the substrate;(d) covering the first portion of the lateral surface and the bottom surface of the substrate with a first adhesive;(e) forming a conductive layer on a top surface and a lateral surface of the package body, the second portion of the lateral surface of the substrate, and an exposed portion of the grounding element; and(f) removing the first adhesive.8. ...

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Номер записи: 81
08-01-2015 дата публикации

HIGH-K METAL GATE DEVICES WITH A DUAL WORK FUNCTION AND METHODS FOR MAKING THE SAME

Номер: US20150011059A1
Автор: LIN CHENG-TUNG, YAO Liang-Gi, Yu Chen-Hua
Принадлежит:

A layer of P-metal material having a work function of about 4.3 or 4.4 eV or less is formed over a high-k dielectric layer. Portions of the N-metal layer are converted to P-metal materials by introducing additives such as O, C, N, Si or others to produce a P-metal material having an increased work function of about 4.7 or 4.8 eV or greater. A TaC film may be converted to a material of TaCO, TaCN, or TaCON using this technique. The layer of material including original N-metal portions and converted P-metal portions is then patterned using a single patterning operation to simultaneously form semiconductor devices from both the unconverted N-metal sections and converted P-metal sections. 1. A method for forming a semiconductor device comprising:forming an N-metal layer suitable for use as a gate electrode for N-metal semiconductor devices, over a surface of a substrate;converting portions of said N-metal layer to P-metal portions suitable for use as gate electrodes in P-metal semiconductor devices; andforming N-metal semiconductor devices using unconverted sections of said N-metal layer and P-metal semiconductor devices using sections of said P-metal portions,wherein said N-metal layer comprises TaN and said P-metal portions comprise TaSiN and said converting includes forming a patterned removable layer over said N-metal layer, said patterned removable layer formed of polysilicon.2. The method as in claim 1 , further comprising forming a high-k gate dielectric material over said surface claim 1 , and wherein said forming an N-metal layer comprises forming said N-metal layer over said high-k gate dielectric material.3. The method as in claim 2 , wherein said high-k gate dielectric material comprises one of lanthanum oxide claim 2 , LaO claim 2 , aluminum oxide claim 2 , AlOand hafnium oxide.4. The method as in claim 2 , wherein said converting comprises adding Si to said N-metal layer and said high-k gate dielectric material comprises one of hafnium oxynitride claim 2 , ...

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Номер записи: 82
10-01-2019 дата публикации

Continuously variable transmission control system for rolling vehicle

Номер: US20190011024A1
Автор: Hsin-Lin Cheng, Yi-Huan Wu
Принадлежит: Motive Power Industry Co Ltd

A continuously variable transmission control system for a rolling vehicle includes an electrically controlled device electrically connected to a transmission driving unit connected to a belt-driven continuously variable transmission or a ball-driven continuously variable transmission. The belt-driven continuously variable transmission includes a driving wheel, a driven wheel and a conveyor belt. The conveyor belt is movably fitted in the driving wheel and the driven wheel. The ball-driven continuously variable transmission includes a transmission frame, transmission units, an annular driving unit, two oblique support units, a power-input rotor and a power-output rotor. Therefore, the continuously variable transmission control system for a rolling vehicle uses the electrically controlled device and the continuously variable transmission to enhance efficiency of transmission.

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Номер записи: 83
11-01-2018 дата публикации

OPTICAL LENS, IMAGE CAPTURING DEVICE AND ELECTRONIC DEVICE

Номер: US20180011299A1
Автор: Chen Wei-yu, Lin Cheng-Chen
Принадлежит:

An optical lens includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The second lens element has refractive power. The third lens element has positive refractive power. The fourth lens element with positive refractive power has an image-side surface being convex in a paraxial region thereof. The fifth lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof and including one convex shape in an off-axis region thereof. The sixth lens element with refractive power has an image-side surface being concave in a paraxial region thereof and including one convex shape in an off-axis region thereof. 1. An optical lens comprising six lens elements , the six lens elements being , in order from an object side to an image side:a first lens element with negative refractive power having an image-side surface being concave in a paraxial region thereof;a second lens element with positive refractive power having an object-side surface being convex in a paraxial region thereof;a third lens element;a fourth lens element with positive refractive power having an object-side surface being convex in a paraxial region thereof, and the object-side surface and an image-side surface of the fourth lens element being aspheric;a fifth lens element having an object-side surface and an image-side surface being both aspheric; anda sixth lens element having an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof, the image-side surface of the sixth lens element comprising at least one convex shape in an off-axis region thereof, and the object-side surface and the image-side surface of the sixth lens element ...

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Номер записи: 84
14-01-2016 дата публикации

METHOD FOR ACCESSING DATA IN SOLID STATE DISK

Номер: US20160011969A1
Автор: Hsiao Yi-Long, LIN Cheng-Yi
Принадлежит: QUANTA STORAGE INC.

A method for accessing data in solid state drive (SSD) is disclosed. The method includes: Receiving and buffering an access request; splitting the access request into a number of separate access requests each corresponding to a respective physical block; merging the separate access requests to form a reconfigured access request conformed to a flash operation mode; transmitting the reconfigured access request; accessing the reconfigured access request in a mode conformed to flash operation to increase access speed. 1. A method for accessing data in solid state drive (SSD) , comprising:receiving and buffering an access request from a host by an SSD;splitting the access request into a separate access request corresponding to a respective physical block;remerging the separate access request to form a reconfigured access request conformed to a flash operation mode;transmitting the reconfigured access request to a multi-plane flash memory of the SSD;accessing physical units of the reconfigured access request from the multi-plane flash memory in a mode conformed to flash operation.2. The method for accessing data in SSD according to claim 1 , wherein the received access request is buffered to a buffer memory.3. The method for accessing data in SSD according to claim 1 , wherein the access request is split according to an address of the physical block of the access request obtained with reference to a logical address.4. The method for accessing data in SSD according to claim 3 , wherein the separate access request is merged according to the address of the physical block and preferentially in a mode conformed to a flash operation supporting quick access.5. A method for accessing data in SSD claim 3 , comprising:receiving and buffering an access request from a host by an SSD;preferentially transmitting the sequenced physical block of the access request to a multi-plane flash memory and accessing the transmitted access request in a mode conformed to flash operation;splitting ...

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Номер записи: 85
14-01-2016 дата публикации

MEMORY CIRCUIT FOR PRE-CHARGING AND WRITE DRIVING

Номер: US20160012881A1
Автор: Dhong Sang Hoo, HSIEH Ho-Chieh, KUO Ming-Zhang, Lin Cheng-Chung, Tseng Kuo Feng
Принадлежит:

A memory includes a word line, a bit line and a complementary bit line. A memory cell has a data node coupled to the bit line and a complementary data node coupled to the complementary bit line. The word line controls access to the memory cell. A circuit is coupled to the bit line and the complementary bit line. The circuit is configured to pull up to a high voltage, pull down to a low voltage, or float the bit line and the complementary bit line based on a first timing of pre-charging and a second timing of write driving. The first timing and the second timing are synchronized. 1. A memory , comprising:a word line;a bit line and a complementary bit line;a memory cell having a data node coupled to the bit line and a complementary data node coupled to the complementary bit line, wherein the word line controls access to the memory cell; anda circuit coupled to the bit line and the complementary bit line, wherein the circuit is configured to pull up to a high voltage, pull down to a low voltage, or float the bit line and the complementary bit line based on a first timing of pre-charging and a second timing of write driving, wherein the first timing and the second timing are synchronized by control signals and further wherein the circuit comprises a first PMOS transistor coupled between a high voltage node and the bit line, a second PMOS transistor coupled between the high voltage node and the complementary bit line, a first NMOS transistor coupled between a low voltage node and the bit line, a second NMOS transistor coupled between the low voltage node and the complementary bit line, and wherein the circuit is configured to turn on the first PMOS transistor and the second PMOS transistor for pre-charging.2. The memory of claim 1 , wherein ending of the first timing of pre-charging and starting of the second timing of write driving are performed simultaneously.3. (canceled)4. The memory of claim 14 , wherein the first PMOS transistor and the second NMOS transistor are ...

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Номер записи: 86
14-01-2021 дата публикации

SURFACE ACOUSTIC WAVE DEVICE AND METHOD OF MANUFACTURING THE SAME

Номер: US20210013865A1
Автор: Lin Cheng-Fan, Shih Cheng-Hung
Принадлежит:

A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening. 1. A surface acoustic wave device comprising:a piezoelectric substrate including a base, a conductive pad and a transducer, the conductive pad and the transducer are disposed on the base and electrically connected with each other;a supportive layer disposed on the piezoelectric substrate and surrounding the transducer, a lower via hole and an opening hole are formed in the supportive layer, the lower via hole is located outside the opening hole and exposes the conductive pad, and the opening hole is located above the transducer;a cover layer disposed on the supportive layer and covering the opening hole, an upper via hole is formed in the cover layer, located above the lower via hole and communicated to the lower via hole, wherein the upper via hole has a first top opening, a first bottom opening and a first lateral opening, the first top opening is located on a top surface of the cover layer, the first bottom opening is located on a bottom surface of the cover layer, the first lateral opening is located on a lateral surface of the cover layer, and both ends of the first lateral opening are connected to the first up opening and the first bottom opening, respectively; anda pillar bump disposed in the lower via hole and the upper via hole and connected to the conductive pad, wherein the pillar bump in the cover layer includes a first part and a second part, the first part is located in the upper via ...

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Номер записи: 87
21-01-2016 дата публикации

Method of Producing Testosterone Formulation and Testosterone Formulation Produced Thereby

Номер: US20160015719A1
Автор: LEE CHIEN-HUNG, Lin Cheng-Chieh
Принадлежит:

The present invention is about a method of producing testosterone formulation and the testosterone formulation produced thereby. The method of this invention comprises dissolving testosterone propionate and dibucaine HCl in alcohol, adding particular percentages of polyethylene glycol 400 and polyethylene glycol 4000, and cooling under particular speed to produce the testosterone formulation which has the advantages of moderate viscosity, easy to use and excellent particle consistency.

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Номер записи: 88
18-01-2018 дата публикации

3-dimensional printing apparatus and dispensing device thereof

Номер: US20180015659A1
Автор: Freeman Chen, Yih-Lin Cheng, Yu-Kai YANG
Принадлежит: Sony Corp

The present disclosure provides a dispensing device and a 3-D printing apparatus including the same. The dispensing device comprises a main body with a main body heater, a head portion and a heating device. The main body includes a passage with a longitudinal axis and the main body heater is used for heating the material in at least a section of the passage to a flowable condition. The head portion is connected to an end of the passage and communicates with the passage and further includes an outlet for discharging the heated material. The heating device includes a peripheral path surrounding the head portion and heats a region surrounded by the peripheral path.

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Номер записи: 89
21-01-2016 дата публикации

Method of collecting garbage blocks in a solid state drive

Номер: US20160019142A1
Автор: Hsiao Yi-Long, LIN Cheng-Yi
Принадлежит:

A method of collecting garbage blocks in a solid state drive includes collecting a garbage block of a multiple level cell flash memory, selecting a spare block as a target block, copying effective data of the garbage block to a physical cell of the target block, searching for unprogrammed physical pages of the physical cell of the target block, using dummy data to complete programming of the unprogrammed physical pages of the physical cell, deleting the effective data in the garbage block, and recycling the garbage block to be a new spare block.

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Номер записи: 90
17-04-2014 дата публикации

SELF-INFLATING TIRE

Номер: US20140102610A1
Автор: LIN CHENG-HSIUNG
Принадлежит:

A self-inflating tire assembly includes an air tube connected to a tire and defining an air passageway, the air tube being composed of a flexible material operative to allow an air tube segment opposite a tire footprint to flatten, closing the passageway, and resiliently unflatten into an original configuration. The air tube is sequentially flattened by the tire footprint in a direction opposite to a tire direction of rotation to pump air along the passageway to an inlet device for exhaust from the passageway or to an outlet device for direction into the tire cavity. 1. A self-inflating tire assembly comprising:a tire having a tire cavity, first and second sidewalls extending respectively from first and second tire bead regions to a tire tread region;a passageway in the tire, a pump positioned in the passageway, said pump including a tube, a plurality of check valves mounted in said tube and spaced apart from each other and forming a plurality of tube segments, said tube having a first end in fluid communication with the atmosphere, and a second end in fluid communication with the tire cavity.2. The self inflating tire assembly of wherein a check valve is positioned at the first end of the tube.3. The self inflating tire assembly of wherein a check valve is positioned at the second end of the tube.4. The self inflating tire assembly of wherein the passageway is formed in the sidewall.5. The self inflating tire assembly of wherein the passageway annular.6. The self inflating tire assembly of wherein the passageway is formed in the tread.7. A self-inflating tire assembly comprising:a tire having a tire cavity, first and second sidewalls extending respectively from first and second tire bead regions to a tire tread region;a passageway in the tire, a first and second pump positioned in the passageway, each pump including a tube, a plurality of check valves mounted in said tube and spaced apart from each other and forming a plurality of tube segments, said tube having a ...

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Номер записи: 91
19-01-2017 дата публикации

Button Structure

Номер: US20170018375A1
Автор: Lin Cheng-Shan, Pan Chung-Ming, Wu Chiang-Chang
Принадлежит:

A button structure applied in an electronic device includes an up-cover having a pressing portion including a button base and a center column portion disposed on the button base, wherein the center column portion has a first limitation portion, the first limitation portion includes a first tilt side surface; and a second limitation portion disposed on the up-cover, wherein the second limitation portion forms a hole and includes a second tilt side surface surrounding the hole. The present invention utilizes the limitation portion of pressing portion and the limitation portion of the up-cover to limit the range of recovering displacement of the pressing portion. 1. A button structure , applied in an electronic device including an up-cover , the button structure comprising: a button base; and', 'a center column portion, disposed on the button base, comprising a first limitation portion surrounding a terminal of the center column portion, wherein the first limitation portion comprises a first side surface, and the first side surface forms a first angle related to a first plane of the up-cover; and, 'a pressing portion, comprisinga second limitation portion, disposed on the up-cover, wherein the second limitation portion forms a hole and comprises a second side surface surrounding the hole, and the second side surface forms a second angle related to the first plane of the up-cover;wherein the center column portion is disposed in the hole, the second limitation portion surrounds the first limitation portion, and the first angle and the second angle are not equal to 90 degrees.2. The button structure of claim 1 , wherein the button base forms a specific angle with nonzero degrees related to a base of the electronic device.3. The button structure of claim 1 , wherein the first side surface of the first limitation portion and the second side surface of the second limitation portion are configured to limit the pressing portion in the hole.4. The button structure of claim 1 , ...

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Номер записи: 92
21-01-2016 дата публикации

SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICAL STRUCTURE

Номер: US20160020180A1
Автор: CHEN DE-FANG, Huang Tai-Chun, Lee Tze-Liang, LIN CHENG-TUNG, Lin Huan-Just, Lu Yung-Cheng, Peng Chih-Tang, TSAI Teng-Chun, Wang Chien-Hsun, Wang Li-Ting
Принадлежит:

According to an exemplary embodiment, a method of forming a vertical structure with at least two barrier layers is provided. The method includes the following operations: providing a substrate; providing a vertical structure over the substrate; providing a first barrier layer over a source, a channel, and a drain of the vertical structure; and providing a second barrier layer over a gate and the drain of the vertical structure. 1. A method of forming a vertical structure with at least two barrier layers , comprising:providing a substrate;providing a vertical structure over the substrate;providing a first barrier layer over a source, a channel, and a drain of the vertical structure;forming a first interlayer dielectric over the first barrier layer corresponding to the source of the vertical structure; andproviding a second barrier layer over a gate and the drain of the vertical structure.2. (canceled)3. The method of claim 1 , further comprising forming the gate over the channel of the vertical structure.4. The method of claim 3 , further comprising forming a second interlayer dielectric over the second barrier layer corresponding to the gate and the drain of the vertical structure.5. The method of claim 4 , further comprising:performing chemical mechanical polishing on the second interlayer dielectric and stopping on the second barrier layer;etching the second interlayer dielectric and the second barrier layer to expose a top of the drain; andforming silicide on the drain.6. The method of claim 5 , further comprising:forming an opening through the first barrier layer, the first interlayer dielectric, the second barrier layer, and the second interlayer dielectric; andforming contact metal in the opening.7. The method of claim 1 , further comprising:etching the second barrier layer to expose the drain and a top of the gate; andforming a third barrier layer as a spacer over the top of the gate and a sidewall of the drain.8. The method of claim 1 , wherein providing the ...

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Номер записи: 93
21-01-2016 дата публикации

Semiconductor Devices and Fabrication Methods With Improved Word Line Resistance And Reduced Salicide Bridge Formation

Номер: US20160020295A1
Автор: CHEN Kuan-Chih, LIN Cheng-Wei, Liu Kuang-Wen
Принадлежит:

Provided are improved semiconductor memory devices and method for manufacturing such semiconductor memory devices. A method may incorporate the formation of silicide regions in a semiconductor. The method may allow for a semiconductor with a silicide layer with improved resistance and reduced silicide bridge formation.

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Номер записи: 94
21-01-2016 дата публикации

Heterojunction Bipolar Transistor

Номер: US20160020307A1
Автор: CHIU JUI-PIN, LIN Cheng-Kuo, SYU Rong-Hao, TSAI Shu-Hsiao
Принадлежит:

A heterojunction bipolar transistor, comprising an elongated base mesa, an elongated base electrode, two elongated emitters, an elongated collector, and two elongated collector electrodes. The elongated base electrode is formed on the base mesa along the long axis of the base mesa, and the base electrode has a base via hole at or near the center of the base electrode. The two elongated emitter are formed on the base mesa respectively at two opposite sides of the base electrode, and each of two emitters has an elongated emitter electrode formed on the emitter. The elongated collector is formed below the base mesa. The two elongated collector electrodes are formed on the collector respectively at two opposite sides of the base mesa.

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Номер записи: 95
17-01-2019 дата публикации

ANNULAR OPTICAL ELEMENT, IMAGING LENS MODULE AND ELECTRONIC DEVICE

Номер: US20190018171A1
Автор: CHANG Ming-Shun, CHOU Ming-Ta, Lin Cheng-Feng
Принадлежит:

An annular optical element having an optical axis includes an outer diameter surface, an inner annular surface, an object-side surface and an image-side surface. The object-side surface includes an annular reflecting surface, an annular auxiliary surface and a connecting surface. The annular reflecting surface is inclined with the optical axis. The annular auxiliary surface is closer to the optical axis than the annular reflecting surface is to the optical axis. The connecting surface is for connecting to an optical element, wherein the connecting surface is closer to the optical axis than the annular auxiliary surface is to the optical axis. The image-side surface is located opposite to the object-side surface and includes an annular optical surface. A V-shaped groove is formed by the annular auxiliary surface and the annular reflecting surface of the object-side surface. 1. An annular optical element , having an optical axis and comprising:an outer diameter surface surrounding the optical axis;an inner annular surface surrounding the optical axis and forming a central hole; an annular reflecting surface inclined with the optical axis;', 'an annular auxiliary surface, wherein the annular auxiliary surface is closer to the optical axis than the annular reflecting surface is to the optical axis; and', 'a connecting surface for connecting to an optical element, wherein the connecting surface is closer to the optical axis than the annular auxiliary surface is to the optical axis; and, 'an object-side surface connecting the outer diameter surface and the inner annular surface, wherein the object-side surface comprisesan image-side surface connecting the outer diameter surface and the inner annular surface, wherein the image-side surface is located opposite to the object-side surface and comprises an annular optical surface; {'br': None, 'i': 'da', '39 degrees<<89 degrees.'}, 'wherein a V-shaped groove is formed by the annular auxiliary surface and the annular reflecting ...

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Номер записи: 96
17-04-2014 дата публикации

METHOD OF FORMING LIGHT EMITTING DIODE DIES, LIGHT EMITTING DIODE WAFER AND LIGHT EMITTING DIODE DIE

Номер: US20140103367A1
Автор: Chen Cheng-Yen, Lai Yu-Hung, Lin Cheng-Hung, LO Yu-Yun
Принадлежит: GENESIS PHOTONICS INC.

A method of forming light emitting diode dies includes: forming an epitaxial layered structure that defines light emitting units on a front surface of a substrate wafer; forming a photoresist layer over a back surface of the substrate wafer; aligning the substrate wafer and patterning the photoresist layer so as to form openings in the photoresist layer, each of the openings having an area less than a projected area of the respective light emitting unit; forming a solder layer on the photoresist layer such that the solder layer fills the openings in the photoresist layer; removing the photoresist layer and a portion of the solder layer that covers the photoresist layer from the substrate wafer; and dicing the substrate wafer. 1. A method of forming light emitting diode dies , comprising:forming a plurality of alignment marks and an epitaxial layered structure on a front surface of a transparent substrate wafer, the epitaxial layered structure defining a plurality of row cutting-line regions, a plurality of column cutting-line regions, and a plurality of light emitting units which are spaced apart from one another, each of the light emitting units having a projected area projected on the substrate wafer in a normal direction relative to the substrate wafer;forming a photoresist layer over a back surface of the substrate wafer, wherein the photoresist layer is formed with a plurality of windows that are aligned respectively with the alignment marks so as to permit visualization of the alignment marks therethrough from the back surface of the substrate wafer for alignment of the substrate wafer in subsequent photolithographic processing;aligning the substrate wafer in an exposure apparatus through the alignment marks from the back surface of the substrate wafer and patterning the photoresist layer so as to form a plurality of spaced apart openings in the photoresist layer using photolithographic techniques, the openings being respectively aligned with the light ...

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Номер записи: 97
19-01-2017 дата публикации

Frame Module

Номер: US20170018879A1
Автор: Lin Cheng-Shan, Pan Chung-Ming, Wu Chiang-Chang
Принадлежит:

A frame module for an electronic device includes a plurality of brackets and a shield element. A connector for transmitting a radio-frequency signal is formed between two of the plurality of brackets. The shield element is fixed with the two of the plurality of brackets via riveting, wherein a hole is formed in the shield element, and the connector is placed in the hole to fix the connector after the shield element is fixed with the two of the plurality of brackets via riveting. 1. A frame module for an electronic device , comprisinga plurality of vertical brackets, wherein a connector for transmitting a radio-frequency signal is formed between two of the plurality of brackets; anda shield element fixed with the plurality of vertical brackets via riveting;wherein the shield element is formed with a first hole, wherein the connector is placed in the first hole after the shield element is fixed with the plurality of vertical brackets.2. The frame module of claim 1 , wherein the connector and the plurality of vertical brackets are formed in one piece or the connector is fixed on the plurality of vertical brackets via metal welding.3. The frame module of claim 1 , wherein the shield element is fixed with the two of the plurality of brackets via riveting.4. The frame module of claim 3 , wherein the shield element is fixed on the plurality of vertical brackets via metal welding or soldering after the shield element is fixed on the plurality of vertical brackets via riveting.5. The frame module of claim 1 , further comprising an adaptor fixed with the connector and the shield element via riveting.6. The frame module of claim 5 , wherein after the cover board of the adaptor is fixed with the connector and the shield element via riveting claim 5 , the adaptor is fixed with the connector and the shield element via metal welding or soldering.7. The frame module of claim 5 , wherein the adaptor comprises:a plug coupled to the connector for receiving the radio-frequency signal ...

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Номер записи: 98
22-01-2015 дата публикации

Systems and Methods for Reducing Contact Resistivity of Semiconductor Devices

Номер: US20150021757A1
Автор: Chang Hui-Cheng, Chen Bing-Hung, Chen Chi-Yuan, Lai Chia-Han, Lee Hong-Mao, LIN CHENG-TUNG, LIN Wei-Jung, TSAI Teng-Chun, Wang Li-Ting
Принадлежит:

Systems and methods are provided for reducing a contact resistivity associated with a semiconductor device structure. A substrate including a semiconductor region is provided. One or more dielectric layers are formed on the semiconductor region, the one or more dielectric layers including an element. A gaseous material is applied on the one or more dielectric layers to change a concentration of the element in the one or more dielectric layers. A contact layer is formed on the one or more dielectric layers to generate a semiconductor device structure. The semiconductor device structure includes the contact layer, the one or more dielectric layers, and the semiconductor region. A contact resistivity associated with the semiconductor device structure is reduced by changing the concentration of the element in the one or more dielectric layers. 1. A method for reducing a contact resistivity associated with a semiconductor device structure , the method comprising:providing a substrate including a semiconductor region;forming one or more dielectric layers on the semiconductor region, the one or more dielectric layers including an element;applying a gaseous material on the one or more dielectric layers to change a concentration of the element in the one or more dielectric layers; andforming a contact layer on the one or more dielectric layers to generate a semiconductor device structure, the semiconductor device structure including the contact layer, the one or more dielectric layers, and the semiconductor region;wherein a contact resistivity associated with the semiconductor device structure is reduced by changing the concentration of the element in the one or more dielectric layers.2. The method of claim 1 , wherein the element includes oxygen.3. The method of claim 1 , wherein the one or more dielectric layers include a first oxide layer.4. The method of claim 3 , wherein:the substrate includes a transistor having a source region and a drain region; andthe semiconductor ...

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Номер записи: 99
19-01-2017 дата публикации

Electronic Apparatus

Номер: US20170020029A1
Автор: Lin Cheng-Shan, Pan Chung-Ming
Принадлежит:

An electronic apparatus is configured for processing a network communication operation. The electronic apparatus includes a frame and a plurality of electronic modules. The plurality of electronic modules are disposed on the frame and each electronic module is closely surrounded by other electronic modules for forming a pillar-shape wind channel, such that the electronic apparatus is assisted to process a heat dissipation. 1. An electronic apparatus , configured for processing a network communication operation , comprising:a frame; anda plurality of electronic modules, disposed on the frame;wherein each electronic module is closely surrounded by other electronic modules to form a column-shape wind channel, such that the electronic apparatus is assisted to process a heat dissipation.2. The electronic apparatus of claim 1 , wherein the plurality of electronic apparatuses are closely surrounded to each other to form a trapezoid structure which is hollow inside for forming the column-shape wind channel.3. The electronic apparatus of claim 2 , wherein the trapezoid structure increases an available utilization area of each electronic module claim 2 , and the plurality of electronic modules are a plurality of printed circuit boards.4. The electronic apparatus of claim 2 , further comprising another electronic module to be disposed at a diagonal line of the trapezoid structure.5. The electronic apparatus of claim 2 , further comprising another electronic module to be disposed at a midline connecting two legs of the trapezoid structure.6. The electronic apparatus of claim 1 , further comprising a fan to be disposed at a base of the column-shape wind channel claim 1 , such that the fan is configured to generate an upward conduction air to assist the heat dissipation of the electronic apparatus. This application claims the benefit of both U.S. Provisional Application No. 62/193,099, filed on Jul. 16, 2015 and entitled “The structure design of new product”, the contents of ...

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Номер записи: 100