Pixel and including the pixel of the display device

Mode of execution

In the below, reference will be made among them show an exemplary embodiment of the Figure more fully described the present invention. If the technical personnel in the field will be recognized, in all of the present disclosure without deviating from the spirit or scope of the lower, can be in a variety of way modify the embodiment described.

Figures and description will be considered in terms of the substance is illustrative and not restrictive, and the whole in the specification, the same Figure mark indicating the same element.

Unless the contrary is clearly described, otherwise the phrase "including" understood as implied including the statements of the element, but not excluding any other element.

Figure 1 shown according to an exemplary embodiment of the block diagram of the display device. As shown, the display device includes: includes a plurality of pixel PX1 to PXn display unit 10, the scan driver 20, the data driver 30, emission control driver 40, power supply 50 and the controller 60.

The pixel PX1 PXn in to each connected to a plurality of scan lines S1 to Sn two of the corresponding scanning line, a plurality of emitting control line EM1 to in EMn corresponding to one of the emission control lines and a plurality of data lines D1 to Dm in corresponding to one of the data lines. In addition, although in fig. 1 the display unit 10 not directly shown, but the plurality of pixel PX1 to PXn connected to a plurality of power cord from the power supply 50 receives the power supply voltage ELVDD 1st, 2nd power supply voltage ELVSS Vint and initialization voltage.

Included in the display unit 10 in a plurality of pixel PX1 to PXn basically in the form of a matrix. Although not specifically limited, but the plurality of scan lines S1 to Sn and a plurality of emission control lines EM1 to EMn substantially in the pixel row direction extends, and a plurality of data lines D1 to Dm substantially in the pixel row direction extends, and the scanning line arranged substantially parallel to each other, emission control lines arranged substantially parallel to each other and data lines arranged substantially parallel to each other.

A plurality of pixel PX1 to each pixel in the PXn connected to two of the corresponding scanning line. Namely, the pixel PX1 to each pixel in the PXn connected to including the corresponding pixel of the pixel row corresponding to the scanning line and with a 1st on the pixel row corresponding to the scanning line 2nd. Included in the 1st pixel row of a group of pixels can be connected to the 1st scanning line S1 and the dummy scanning line S0. Included in the pixel row n (n greater than 1) in a group of pixels are respectively connected to the and as a corresponding pixel row of the pixel row corresponding to the n of the n scanning line Sn and is taken as the pixel row of the n - 1 of the pixel row of the n - 1 corresponding to the scan line Sn - 1.

A plurality of pixel PX1 to PXn according to each of the plurality of the data lines through the through D1 to Dm corresponding to the transmission of the data signal supplied to the organic light-emitting diode drive current having a predetermined brightness of the emitted light.

The scan driver 20 through the plurality of scan lines S1 to Sn generating each pixel with the corresponding scanning signal, and the transmission of the scanning signal. That is, the scan driver 20 through and including in each pixel of the respective row of the plurality of pixels of the corresponding scanning line of the scan signal.

The scan driver 20 from the controller 60 receiving the scanning drive control signal SCS in order to produce the scanning signal, and sequentially the scanning signal supplied to the plurality of scan lines S1 to Sn, the plurality of scan lines S1 to Sn are respectively connected to a in each pixel row of a group of pixels.

The data driver 30 through a plurality of the data signals to the data lines D1 to Dm transmitting to each pixel.

The data driver 30 from the controller 60 receives the data drive control signal DCS, and supply and a plurality of data lines D1 to Dm corresponding to the data signal, the plurality of data lines D1 to Dm are respectively connected to a in each of the pixels in the row of a group of pixels.

Emission control driver 40 is connected to a plurality of pixel PX1 PXn connected to a plurality of emission control lines EM1 to EMn. Namely, a plurality of emitting control line EM1 to EMn in the row direction substantially extending parallel to each other, and a plurality of pixel and emission control driver 40 is connected.

Emission control driver 40 generated by a plurality of emitting control line EM1 to EMn with each pixel corresponding to the transmission control signal. Each pixel is controlled by the transmission control signal in response to the control to transmit the data signal corresponding to the light. Namely, through the corresponding control line in response to the transmission of the transmission of the transmission control signal to control the pixels included in the transmitting control of work of the transistor, therefore is connected to the emission control transistor of the organic light-emitting diode can emit or not emit corresponding to the data signal based on the drive current of the brightness of the light.

The power supply 50 to the power supply voltage ELVDD 1st, 2nd power supply voltage ELVSS Vint and initialization voltage supply to the display unit 10 of each of the pixels. 1st ELVDD it can be predetermined that the power supply voltage of the high level voltage, the power supply voltage and 2nd 1st ELVSS can be smaller than the power supply voltage ELVDD or can is at the ground voltage. Initialization voltage can be Vint is set equal to or less than the voltage value of the power supply voltage of the 2nd ELVSS.

1st ELVDD voltage value of the power supply voltage, the supply voltage of the 2nd ELVSS Vint voltage value and the voltage value of the initialization voltage is not limited to the particular magnitude, but according to the voltage value by the controller 60 transmission power control signal PCS control set or control.

Controller 60 a plurality of Image signal is converted to multiple Image data signal DATA and the plurality of Image data signal DATA transmission to the data driver 30. The controller 60 receives the vertical synchronization signal, the horizontal synchronization signal and the clock signal (not shown), for generating a control scan driver 20, emission control driver 40 and the data driver 30 of the control signal, and the control signal is transmitted to the scan driver 20, emission control driver 40 and the data driver 30. Namely, the controller 60 controls the scanning driver for generating 20 scanning drive control signal SCS, used to control the emission control driver 40 of emission driving control signal ECS and used to control the data driver 30 of DCS data driving control signal, and the transmission is used to control the scan driver 20 scanning drive control signal SCS, is used to control the emission control driver 40 of emission driving control signal ECS and used to control the data driver 30 of the data drive control signal DCS.

In addition, the controller 60 is used to generate a control power supply 50 on the power control signal PCS and will be used to control the power supply 50 PCS transmission power control signal to the power supply 50.

Figure 2 and Figure 6 to Figure 8 according to the invention is shown in the exemplary embodiment of the pixel of the wiring diagram. Specifically, Figure 2 and Figure 6 to Figure 8 shown according to different exemplary embodiment of the on set up by the Figure 2 shown in the display unit 10 of the plurality of pixel PX1 to PXn in section n of the and m rows of pixels in the pixel column in the limited area of the pixel (PXn) 100 of the wiring diagram. In such an exemplary embodiment, to facilitate describing, each transistor is exemplified p channel metal oxide semiconductor field effect transistor (MOSFET) (PMOS transistor).

Figure 3 is shown for driving Figure 2 and Figure 6 to Figure 8 of the pixel signal of the sequence chart, and will be described according to fig. 2 and Figure 6 to Figure 8 of the exemplary embodiment of the process of driving pixel.

Figure 2 shown in the pixel 100 - 1 comprising an organic light emitting diode OLED, the storage capacitor Cst and 1st transistor T1 to the 8th transistor T8.

1st transistor T1 is connected to the 1st a node N1 of the grid, is connected to the 2nd node N2 and connected to the source of the 3rd node N3 of the drain, the 2nd node N2 is also connected to the 5th transistor T5 of the drain. The drive current according to the corresponding data signal D flowing through the 1st transistor T1. The gate of the transistor, and the source and drain in the article can also be called as a gate electrode, the source electrode and the drain electrode.

The drive current with the representatives of the 1st transistor T1 of the source and the gate to the voltage difference between the corresponding current, and the drive current may be a data signal D data voltage corresponding to the voltage of the variable electric current.

2nd transistor T2 includes being connected to the gate of the j Sj of the scanning line, the data line is connected to the article i Di and connected to the source of the 2nd node N2 of the drain, 1st transistor T1 of the source and 5th transistor T5 of the drain common connected to the 2nd node N2. 2nd transistor T2 in response to the adoption of the scanning line Sj j corresponding to the transmission of the scanning signal S with the data signal D data voltage corresponding to the data line through the article i Di transmission to 2nd node N2.

3rd transistor T3 includes being connected to the scanning line of the grid of the Sj j and are respectively connected to the 1st transistor T1 gate and a drain of the drain and the source. 3rd transistor T3 in response to the adoption of the scanning line Sj j corresponding to the transmission of the scanning signal S work. When turned on, 3rd transistor T3 will be 1st transistor T1 between the grid of the drain is connected to the 1st to diode connected transistor T1.

When 1st to diode connected transistor T1 when, from the applied to the 1st transistor T1 of the voltage of the source of the data by the 1st transistor T1 threshold voltage compensation of voltage is applied to the 1st transistor T1 of the grid. 1st transistor T1 has a gate connected to the storage capacitor of the Cst 1st electrode, therefore by the storage capacitor Cst holding voltage. By 1st transistor T1 threshold voltage compensation data voltage is applied to the gate, and by the storage capacitor Cst maintain, therefore flows through the 1st transistor T1 of the driving current can not be 1st transistor T1 of the influence of the threshold voltage.

4th transistor T4 is connected to the of a j - 1 scanning line Sj - 1 gate, is connected to the initialization voltage supply line and connected to the source of the 1st node N1 of the drain. 4th transistor T4 through the section j - 1 in response to the scanning line Sj - 1 j - 1 of the transmission of the scanning signal S [j - 1] will by initializing the initialization voltage applied to the voltage supply line of the 1st Vint transmission to node N1. 4th transistor T4 can be in response to a previous article j - 1 of the pixel row corresponding to the j - 1 scanning line Sj - 1 j - 1 of the transmission of the scanning signal S [j - 1] is applied to the data signal D before transmission to the initialization voltage Vint 1st node N1. In section j through the scanning line Sj transmission scanning signal S transmission to the includes a corresponding pixel 100 - 1 of the pixel prior to the j, j - 1 through of the scanning line Sj - 1 j - 1 of the transmission of the scanning signal S [j - 1] transmission to j - 1 of the pixel row.

In this case, does not restrict the initialization voltage the voltage value of the Vint, but it can be the initialization voltage is set to the voltage value of the Vint can reduce the 1st transistor T1 to initialize the gate voltage of the low level voltage of the value. That is, where the section j - 1 scanning signal S [j - 1] to the gate-on voltage level to the transmission to the 4th transistor T4 during the interval of the gate of the, 1st transistor T1 is initialized to the grid of the initialization voltage Vint.

5th transistor T5 is connected to the section j comprises transmitting control line EMj gate, is connected to the 1st ELVDD supply-line of the power supply voltage source and is connected to the 2nd node N2 of the drain.

6th transistor T6 is connected to the section j comprises transmitting control line EMj gate, is connected to the 3rd node N3 is connected to the source electrode of the organic light-emitting diode and the anode of the OLED to the drain.

5th transistor T5 and 6th transistor T6 through the transmission line in response to the section j of the j EMj transmission of emission control signal EM work. When the 5th transistor T5 and 6th transistor T6 of the j in response to the emission control signal EM turns on, the power supply voltage from the 1st ELVDD towards the direction of the organic light emitting diode OLED is formed on the current path. Flowing through the organic light emitting diode OLED drive current results in a organic light emitting diode OLED according to the drive current of the light-emitting, thus by the pixel 100 - 1 display and data signal corresponding to the Image.

The storage capacitor Cst 1st 1st of the electrode connected to the node N1, and the storage capacitor Cst 2nd 1st of the electrode connected to the power supply voltage ELVDD supply-line. As mentioned above, the storage capacitor Cst connected to the 1st transistor T1 of the grid and 1st ELVDD supply-line between the power supply voltage, thereby maintaining the applied to the 1st transistor T1 gate voltage.

7th transistor T7 is connected to the of a j - 1 scanning line Sj - 1 gate, is connected to the anode of the organic light emitting diode OLED is connected to the source and the drain of the initialization voltage Vint.

7th transistor T7 can be in response to a previous article j - 1 of the pixel row corresponding to the j - 1 scanning line Sj - 1 j - 1 of the transmission of the scanning signal S [j - 1] the initialization voltage Vint transmission to the anode of the organic light emitting diode OLED. According to the transmission of the initialization voltage Vint to the anode of the organic light emitting diode OLED is reset to the full low voltage.

8th transistor T8 is connected to a 2nd node N2 of the source and the gate and connected to the drain of the initialization voltage Vint. 8th transistor T8 of the common is connected to the gate and source of the 2nd node N2, therefore in the 2nd node N2 8th penalty diode connected transistor T8.

With respect to the Figure 1 as shown in the block diagram of the display device and Figure 2 as shown in the pixel 100 - 1 of the wiring diagram to describe according to fig. 3 of the detailed sequence chart of driving operation.

Figure 3 is shown for driving Figure 1 as shown in the pixel 100 of the sequence chart of the signal. The with reference to Figure 3 describes some of the pixel display black Image, the some of the pixel for example is connected to the n - 1 of the scanning line Sn - 1 and i Di and data lines of the pixel connected to the scanning line of the n Sn and the same article i Di pixel data.

Connected to the same article i Di other pixels of the data can be received with the application to display a black Image of the pixels of the black gray scale data signals corresponding impact Black. In the data signal transmission to the some of the pixel after the applied has a low level until the voltage of the control signal until the transmission of L, can be applied to the data line of the data signal i Di Ib Black generating leakage current. In this case, the leakage current can be reduced by Ib stored in the 1st node N1 in the voltage. By means of the reduced voltage, each pixel can be displayed according to the corresponding data signal than Image dark Image, thereby generating the cross talk phenomenon.

Therefore, the display may be formed of a black Image of the pixels connected to the same data line Di pixel crosstalk phenomenon.

With reference to Figure 2 and Figure 3, in the t11 and t12 during the interval between the, 4th transistor T4 and 7th transistor T7 j - 1 by the adoption of the scanning line Sj - 1 j - 1 of the transmission of the scanning signal S [j - 1] of the low level voltage L is turned on. For initialization in the 1st transistor T1 of the voltage at the gate electrode of the initialization voltage Vint through 4th transistor T4 is transmitted to the 1st node N1.

In t12 and t13 during the interval between the, 2nd transistor T2 and 3rd transistor T3 by the adoption of the scanning line j j Sj transmission of the scanning signal S of the low level voltage L is turned on. In Di corresponding to the data on the data signal GR2 through the conducting of 2nd transistor T2 is transmitted to the 2nd node N2, and 1st transistor T1 through the conducting of 3rd transistor T3 is connected to diode mode.

In t14 and t15 during the interval between, with the black gradation corresponding to the data signal applied to the data line of the Black i Di. Will now with reference to Figure 4 described t14 and t15 the interval.

Figure 4 shown by fig. 3 as shown in the signal driving connected to the scanning line of the j and i Di Sj data of a part of the pixels. As shown in Figure 4 shown in, 2nd transistor T2, 3rd transistor T3, 5th transistor T5 and 6th transistor T6 off.

However, when included in the pixel 100 - 1 of the transistor T1 to T8 when working at a high temperature, according to the threshold voltage of the transistor of the forward offset, when the between the gate and source voltage difference is big or is zero, leakage current can flow through the transistor.

When the black gradation data signal Black Vblack corresponding to the black voltage applied to the data line when the section i Di, leakage current Ib1 can be by a black voltage Vblack and 2nd node N2 the voltage difference between the 2nd flowing through the cut-off of the transistor T2.

8th transistor T8 the opposite phase to the 2nd to diode mode is connected to the node N2, and initialization voltage supply line is connected to the 8th transistor T8 of the drain. By means of the threshold voltage of the forward offset and initialization voltage Vint and 2nd node N2 of the voltage difference between the, leakage current Ib1 through 8th transistor T8 drops to the initialization voltage Vint. Therefore, in the pixel 100 - 1 light-emitting before applied to the black voltage Vblack i Di does not affect the data of the pixel 100 - 1 in the 1st node N1 are maintained at the voltage Vdata - Vth.

In t18 to t20 during the interval between the, 5th transistor T5 and 6th transistor T6 have low level voltage L of the emission control signal EM is turned on. The storage in the storage capacitor Cst caused by the voltage in the drive current is transmitted to the organic light emitting diode OLED, and organic light emitting diode OLED light-emitting.

In does not have the 8th transistor T8 in the traditional pixel arrangement, leakage current Ib0 through 1st transistor T1 and cut-off of 3rd transistor T3 is transmitted to the 1st node N1 in order to reduce the voltage. Therefore, the pixel display than applied to the data line of the Di according to the voltage of the data gray gray scale, so as to produce cross talk phenomenon.

Figure 5 A shows the presentation of the cross talk phenomenon comparison display device of the display unit, and Figure 5 B shown according to an exemplary embodiment of the display unit of the display device. On Figure 5 A and Figure 5 B, will assume that the display unit 10 of the 1st region 150 can display a black Image, and adjacent area 151 and 152 display a white Image.

As shown in Figure 5 A shown in, when the display unit 10 in the region of the 1st 150 can display a black Image, a 1st region with 150 in the picture element is connected to the same data line of the adjacent region of the pixel of the 151 and 152 display than the white Image dark Image, thus presenting the cross talk phenomenon.

However, in accordance with an exemplary embodiment of a pixel 100 - 1 under the condition of the display device, as shown in Figure 5 B shown in, when the 1st region 150 can display a black Image, a 1st region with 150 in the picture element is connected to the same data line of the adjacent region of the pixel of the 151 and 152 in the does not present the crosstalk in the display of a white Image.

Namely, according to an exemplary embodiment, even when the display device when in work under a high temperature, the use of the 8th transistor T8 can remove the black voltage of drain current, so as to prevent the crosstalk phenomenon of the display device.

Will now with reference to Figure 6 to Figure 8 described according to other exemplary embodiment of the pixel.

Figure 6 shown can be included in fig. 1 in the pixel of the display device 100 - 2.

In addition to the alternative Figure 2 as shown in the pixel 100 - 1 of the 8th transistor T8 of the 8th transistor T18 outside, Figure 6 as shown in the pixel 100 - 2 and Figure 2 of the pixel 100 - 1 are the same.

8th transistor T18 including connected to the 3rd node N3 of the source and the gate and connected to the drain of the initialization voltage Vint. 8th transistor T18 the gate and source of the common is connected to the 3rd node N3, therefore 8th transistor T18 to diode mode is connected to the 3rd node N3.

On the with reference to Figure 3 of the pixel 100 - 2 of the working process, in t11 and t12 during the interval between the, 4th transistor T4 and 7th transistor T7 j - 1 by the adoption of the scanning line Sj - 1 j - 1 of the transmission of the scanning signal S [j - 1] of the low level voltage L is turned on. Will be used for initialization 1st transistor T1 of the voltage of the gate electrode of the initialization voltage Vint through 4th transistor T4 is transmitted to the 1st node N1.

In t12 and t13 during the interval between the, 2nd transistor T2 and 3rd transistor T3 by the adoption of the scanning line j j Sj transmission of the scanning signal S of the low level voltage L is turned on. A data line on the Di corresponding data signal GR2 through the conducting of 2nd transistor T2 is transmitted to the 2nd node N2, and 1st transistor T1 through the conducting of 3rd transistor T3 is connected to diode mode.

In t14 and t15 during the interval between, with the black gradation corresponding to the data signal applied to the data line of the Black i Di.

As the black voltage Vblack and 2nd node N2 to the voltage difference between, the leakage current can be Ib 2nd through cut-off of the transistor T2 flows into the 2nd node N2 and further through 1st transistor T1 flows to the 3rd node N3.

8th transistor T18 the opposite phase to the 3rd to diode mode is connected to node N3, and initialization voltage Vint is connected to the 8th transistor T18 of the drain. By means of the threshold voltage of the forward offset and initialization voltage Vint and 3rd node N3 to the voltage difference between, the leakage current through the 8th Ib transistor T18 Vint drops to the initialization voltage. Therefore, in the pixel 100 - 2 light-emitting before applied to the black voltage Vblack i Di does not affect the data of the pixel 100 - 2 of the 1st node N1 are maintained at the voltage.

In t18 and t20 during the interval between the, 5th transistor T5 and 6th transistor T6 have low level voltage L of the emission control signal EM is turned on. By the storage capacitor in the Cst charged voltage, drive current transmission to the organic light emitting diode OLED, and organic light emitting diode OLED light-emitting.

Namely, according to an exemplary embodiment, when the display device when in work under a high temperature, by using the 8th transistor T18 for removing the black voltage caused by the leakage current, can prevent the crosstalk phenomenon of the display device.

Figure 7 shown according to an exemplary embodiment of the pixel 100 - 3. In addition to the alternative 8th transistor T8 of the 8th transistor T28 of the gate is connected to the DC voltage source outside, Figure 7 as shown in the pixel 100 - 3 and Figure 2 as shown in the pixel 100 - 1 are the same.

Namely, Figure 7 shown in the 8th transistor T28 including connected to the 2nd node N2 source, is connected to the drain of the initialization voltage Vint and connected to the gate of the DC voltage source. Therefore, 8th transistor T28 from the DC voltage source receives the predetermined DC voltage, with the pixel 100 - 3 of the element according to fig. 3 of the driving timing diagram related to the work. In this case, the DC voltage is used for cut-off 8th transistor T28 of the predetermined voltage, and in fig. 7 in the exemplary embodiment, pixel 100 - 3 is configured to PMOS transistor, so that the direct current voltage can be predetermined high level voltage.

Therefore, with transistor cut-off level of the DC voltage is transmitted to the grid, so that the 8th transistor T28 cut-off, and is applied to a data line of the Di i black voltage Vblack leakage current caused by Vint Ib drops to the initialization voltage.

Figure 8 shown according to an exemplary embodiment of the pixel 100 - 4. In addition to the alternative 8th transistor T18 of the 8th transistor T38 is connected to the DC voltage source outside, Figure 8 as shown in the pixel 100 - 4 with Figure 6 as shown in the pixel 100 - 2 are the same.

Namely, Figure 8 shown in the 8th transistor T38 including connected to the 3rd node N3 of the source, is connected to the drain of the initialization voltage Vint and connected to the gate of the DC voltage source. Therefore, 8th transistor T38 from the DC voltage source receives the predetermined DC voltage, with the pixel 100 - 4 of the element according to fig. 3 of the driving timing diagram related to the work.

Through the transistor cut-off level of the DC voltage applied to the gate, 8th transistor T38 stop, therefore is applied to the data line of the Di i black voltage Vblack leakage current caused by Vint Ib drops to the initialization voltage.

In includes according to Figure 2 and Figure 6 to Figure 8 the exemplary embodiment of the pixel 100 - 1, 100 - 2, 100 - 3 and 100 - 4 in the display device, when the display device under the high temperature work, removal may be by the black voltage caused by the leakage current in order to inhibit the cross talk phenomenon, thereby improving the Image quality characteristic.

On pixel 100 - 1, 100 - 2, 100 - 3 and 100 - 4, described 8th transistor T8, T18, T28 and T38 are respectively connected to the 2nd node N2 or 3rd node N3, however, 8th transistor T8 can be connected to a pixel of the 2nd node N2, and 8th transistor T18 can be connected to the pixel of the 3rd node N3.

Despite the combination is now considered a utility to an embodiment of the illustrative embodiment has described the present invention, but it will be understood that, the present invention is not limited to the disclosed embodiments, but on the contrary, the present invention aimed at is covered in the spirit and scope of the present disclosure in various modifications and equivalent arrangement.