УСТРОЙСТВО И СПОСОБ СЧИТЫВАНИЯ ИЗОБРАЖЕНИЯ ИЗЛУЧЕНИЯ И СИСТЕМА СЧИТЫВАНИЯ ИЗОБРАЖЕНИЯ ИЗЛУЧЕНИЯ

... 1. Устройство считывания изображения излучения, содержащее совокупность пикселей, размещенных в виде матрицы, причем каждый из пикселей включает в себя, по меньшей мере, один элемент фотоэлектрического преобразования для преобразования падающего излучения в электрические заряды, и схему вывода сигнала для вывода сигналов из пикселей, отличающееся тем, что совокупность дорожек считывания сигнала, посредством которых пиксель и схема вывода сигнала соединены друг с другом, обеспечены для каждого пикселя, и каждый из пикселей включает в себя полупроводниковые элементы, подключенные к каждой из дорожек считывания сигнала, и каждая из дорожек считывания сигнала выбирается на основании активации полупроводникового элемента. 2. Устройство считывания изображения излучения по п.1, отличающееся тем, что элемент фотоэлектрического преобразования включает в себя элемент преобразования длины волны для осуществления преобразования длины волны падающего излучения. 3. Устройство считывания изображения излучения ...

FARBFILTER UND VERFAHREN ZUR HERSTELLUNG DESSELBEN

Photosensormatrix mit Randabschluss definiert von undurchsichtigem Filterschichtstapel

HALBLEITERSCHEIBENGROSSE INTEGRIERTE OPTISCHE ELEMENTE

Bildsensor und Verfahren zu seiner Herstellung

Ein Bildsensor, der eine über einem Halbleitersubstrat ausgebildete Zwischendielektrikumschicht, eine über der Zwischendielektrikumschicht ausgebildete Farbfilterschicht, eine über dem Farbfilter ausgebildete Planarisierungsschicht und ein über der Planarisierungsschicht ausgebildetes Mikrolinsen-Array mit einer lückenlosen, durchgängigen Form und einer mehrschichtigen Struktur umfasst.

Ladungsgekoppelte Vorrichtung

Eine Metallverdrahtungsschicht (2), eine Mehrzahl von Metallpfropfen (3), eine Metallverdrahtungsschicht (4), eine Mehrzahl von Metallpfropfen (5), eine Metallverdrahtungsschicht (6), eine Mehrzahl von Metallpfropfen (7) und eine Metallverdrahtungsschicht (8) sind so bereitgestellt, dass sie einen Raum umgeben, der sich von einem photoelektrischen Wandlerelement (1) aus in der Richtung senkrecht zu einer Hauptoberfläche eines Halbleitersubstrats (10) befindet. Diese Metallteile bilden einen Lichtpfad. Der Lichtpfad reflektiert von außen einfallendes Licht und verhindert dadurch, dass das einfallende Licht zu anderen photoelektrischen Wandlerelementen gelangt. Somit ist es möglich, eine ladungsgekoppelte Vorrichtung zu gewinnen, in der der Nachteil von Farbdispersion und Farbverschmierung zwischen einander benachbarten Pixeln verringert ist.

Halbleitervorrichtung mit einer Bonding-Fläche und einer Abschirmungsstruktur und Verfahren zur Herstellung derselben

Eine Halbleitervorrichtung mit: einem Vorrichtungssubstrat (310) mit einer Vorderseite (312) und einer Rückseite (314), die einer ersten Seite bzw. einer zweiten Seite der Halbleitervorrichtung entsprechen; einer auf der Vorderseite (312) des Vorrichtungssubstrats (310) ausgebildeten Metallstruktur (342); einem auf der zweiten Seite der Halbleitervorrichtung angeordneten Bonding-Pad (374), das in einer elektrischen Verbindung mit der Metallstruktur (342) steht; und einer auf der Rückseite (314) des Vorrichtungssubstrats (310) angeordneten Metallabschirmungsstruktur (376), wobei die Metallabschirmungsstruktur (376) und das Bonding-Pad (374) unterschiedliche Dicken aufweisen.

Verfahren zur Herstellung eines Bildsensors

Ausführungen beziehen sich auf einen Bildsensor und ein Verfahren zur Herstellung eines Bildsensors. Gemäß Ausführungen kann ein Verfahren das Ausbilden eines Halbleitersubstrates, das einen Bildpunkt-Teil und einen Peripherie-Teil umfasst, das Ausbilden einer Zwischenschicht-Dielektrikum-Schicht, die eine Metallleitung enthält, auf und/oder über dem Halbleitersubstrat, das Ausbilden von Fotodioden-Mustern auf und/oder über der Zwischenschicht-Dielektrikum-Schicht, die mit der Metallleitung im Bildpunkt-Teil verbunden sind, das Ausbilden einer dieleketrischen Bauelemente-Isolations-Schicht auf und/oder über der Zwischenschicht-Dielektrikum-Schicht, die die Fotodioden-Muster enthält, das Ausbilden eines ersten Durchkontaktierungslochs auf und/oder über der dielektrischen Bauelemente-Isolationsschicht, um die Fotodioden-Muster teilweise freizulegen, und das Ausbilden eines zweiten Durchkontaktierungslochs auf und/oder über der dielektrischen Bauelemente-Isolationsschicht, um die Metallleitung ...

SILIZIUMWAFER MIT MONOLITHISCHEN OPTOELEKTRONISCHEN KOMPONENTEN

Image sensor and display

Pixel-level optically transitioning filter elements for detector devices

Backside illuminated imager and method of fabricating the same

Image sensor and method of configuring an image sensor

PROCEDURE FOR THE PRODUCTION OF A SOLID ILLUSTRATION DEVICE

Method of fabricating heterojunction photodiodes integrated with cmos

METHOD OF MANUFACTURING AN IMAGE SENSOR AND IMAGE SENSOR

PHOTODIODE AND OTHER SENSOR STRUCTURES IN FLAT-PANEL X-RAY IMAGERS AND METHOD FOR IMPROVING TOPOLOGICAL UNIFORMITY OF THE PHOTODIODE AND OTHER SENSOR STRUCTURES IN FLAT-PANEL X-RAY IMAGERS BASED ON THIN-FILM ELECTRONICS

A radiation sensor including a scintillation layer configured to emit photons upon interaction with ionizing radiation and a photodetector including in order a first electrode, a photosensitive layer, and a photon-transmissive second electrode disposed in proximity to the scintillation layer. The photosensitive layer is configured to generate electron-hole pairs upon interaction with a part of the photons. The radiation sensor includes pixel circuitry electrically connected to the first electrode and configured to measure an imaging signal indicative of the electron-hole pairs generated in the photosensitive layer and a planarization layer disposed on the pixel circuitry between the first electrode and the pixel circuitry such that the first electrode is above a plane including the pixel circuitry. A surface of at least one of the first electrode and the second electrode at least partially overlaps the pixel circuitry and has a surface inflection above features of the pixel circuitry. The ...

Image sensor

Electronic device and manufacturing method thereof

Solid-state imaging apparatus, camera, imaging device, electronic device, driving method and manufacturing method

The present invention discloses a solid-state imaging apparatus, a camera, an imaging device, an electronic device, a driving method and a manufacturing method. The solid-state imaging apparatus includes a pixel unit and a driving unit. The pixel unit includes a matrix of pixels, which are configured to convert light into an electric signal. Each pixel includes a photoelectric conversion film, an injection unit, an accumulation unit, and a barrier unit. The photoelectric conversion film is configured to carry out photoelectric conversion. The injection unit is configured to inject a charge generated at the photoelectric conversion film to a semiconductor substrate. The accumulation unit is disposed in the semiconductor substrate and configured to accumulate the charge generated at the photoelectric conversion film. The barrier unit provides an electric potential barrier between the photoelectric conversion film and the accumulation unit. The pixel unit selectively injects the charge to ...

Image sensor, method for reducing flicker of light emitting diode, and imaging system

IMAGE SENSOR ILLUMINATED BY THE BACKPLANE UNIFORM SUBSTRATE TEMPERATURE

L'invention concerne un capteur d'images comprenant des cellules photosensibles comportant des photodiodes (D) et au moins un circuit supplémentaire à forte dissipation thermique comportant des transistors (M7, M8). Le capteur d'images est réalisé de façon monolithique et comprend une couche (60) d'un matériau semiconducteur ayant des première et deuxième faces opposées (15, 16) et comprenant, du côté de la première face (15), des premières régions (34, 38) correspondant aux bornes de puissance des transistors, l'éclairage du capteur d'images étant destiné à être réalisé du côté de la deuxième face ; un empilement de couches isolantes (70) recouvrant la première face ; un renfort (78) thermiquement conducteur recouvrant l'empilement du côté opposé à la couche ; et des vias (76) thermiquement conducteurs reliant la couche au renfort.

SENSOR Of IMAGE HAS HIGH LEVEL OF INTEGRETION

L'invention concerne la fabrication de composants électroniques à très haute densité d'intégration, notamment un capteur d'image. Le composant comporte deux circuits intégrés superposés dont l'un (le capteur d'image) est formé sur la face avant d'un premier substrat de silicium aminci (12) ; l'autre est réalisé sur la face avant d'un deuxième substrat (30), avec une couche de planarisation isolante (28, 48) interposée entre les faces avant des deux substrats. Le silicium (12) de la face arrière du substrat aminci est ouvert localement au-dessus d'une première plage conductrice (P1) située dans le substrat aminci et d'une deuxième plage conductrice (P2) située dans le deuxième substrat. Une portion de couche conductrice (50), déposée sur les deux plages, les relie électriquement pour assurer l'interconnexion entre les deux circuits. Les plots de connexion extérieure (PL1) peuvent également être formés dans cette couche conductrice (50). Application à la connexion d'un capteur d'image sur ...

OPTICAL SENSOR HAVING SENSING SURFACE CURVE.

L'invention concerne un détecteur optique (100) à surface de détection courbe comprenant : - un capteur photosensible (110) ; - un support (130) imposant une courbure au capteur photosensible ; et - une couche de colle (120), disposée entre le capteur photosensible et le support, d'épaisseur supérieure à 30 µm. La couche de colle de forte épaisseur permet de réduire les contraintes imposées au capteur, à rayon de courbure égal, et donc de réduire un rayon de courbure minimum du capteur photosensible. On compense ainsi des défauts importants d'un système d'imagerie situé en amont.

MANUFACTORING PROCESS Of a DEVICE Of IMAGERY HAS BACK ILLUMINATION FACE, AND CORRESPONDING DEVICE

Dispositif intégré d'imagerie à illumination face arrière, et procédé de fabrication correspondant, caractérisé en ce qu'il comprend un empilement diélectrique (ISO) comportant une couche supérieure de dioxyde de silicium (OXS), une couche intermédiaire de nitrure de silicium (NI) et une couche inférieure de dioxyde de silicium (OXI), et une couche de silicium (SIS) au dessus de l'empilement diélectrique et ayant une face avant (F1), ledit dispositif comprenant au moins une tranchée d'isolation (TIS) s'étendant depuis la face avant (F1) jusque dans la couche intermédiaire de nitrure de silicium (NI).

MANUFACTORING PROCESS Of an OPTICAL SEMICONDUCTOR CASE AND OPTICAL BOITIERSEMI-CONDUCTEUR

MANUFACTORING PROCESS Of an OPTICAL SEMICONDUCTOR CASE AND OPTICAL BOITIERSEMI-CONDUCTEUR

MANUFACTORING PROCESS Of an OPTICAL SEMICONDUCTOR CASE AND OPTICAL BOITIERSEMI-CONDUCTEUR

반도체 장치 및 전자 기기

... [과제] 각각의 성능을 충분히 발휘하여 고성능화를 도모하고, 또한 양산성, 비용 저감을 도모한 반도체 장치를 제공한다. [해결 수단] 제1의 반도체 기판과, 제1의 다층 배선층과, 제2의 반도체 기판과, 제2의 다층 배선층을 가지며, 제1의 반도체 기판과 제2의 반도체 기판은, 제1의 다층 배선층과 제2의 다층 배선층이 마주 대하도록 적층되고, 제1의 반도체 기판과 제2의 반도체 기판이 적층된 칩의, 화소 어레이를 포함하는 화소 영역과 화소 영역 외의 영역의 각각에서, 제1의 다층 배선층의 가장 제2의 반도체 기판측의 적어도 하나 이상의 배선과, 제2의 다층 배선층의 가장 제1의 반도체 기판측의 적어도 하나 이상의 배선이 직접 접합된 고체 촬상 장치를 구성한다.

반도체 장치와 그 제조 방법, 및 전자 기기

... 반도체 장치는 이면 조사형의 고체 촬상 장치로서 구성된다. 상기 장치는 반제품 상태의 픽셀 어레이를 구비한 제1의 반도체 웨이퍼와, 반제품 상태의 로직 회로를 구비한 제2의 반도체 웨이퍼를 접합하고, 상기 제1의 반도체 웨이퍼가 박막화되고, 상기 픽셀 어레이 및 상기 로직 회로간에 전기적 접속이 이루어지고, 상기 픽셀 어레이 및 상기 로직 회로가 완성품 상태로 되고, 서로 접합된 제1 및 제2의 반도체 웨이퍼가 마이크로칩으로 분할함으로써 제조된다.

Infrared image sensor

... 적외선을 감지할 수 있는 이미지 센서가 제공된다. 이미지 센서는 빛을 받아 광전하들을 축적하는 광전 변환 소자 및 광전 변환 소자 상부에서, 제 1 파장 대역을 갖는 빛을 제 1 파장 대역보다 짧은 제 2 파장 대역을 갖는 빛으로 변환시켜 상기 광전 변환 소자로 제공하는 파장 변환층을 포함한다.

표시 장치

... 표시 장치는 표시 패널을 갖고, 포토센서와 산화물 반도체층을 포함하는 트랜지스터가 배치된다. 객체가 표시 패널에 접근하고 외광을 차단할 때, 표시 장치는 표시 패널에 투영되는 객체의 그림자를 포토센서로 검출하여, 객체의 위치 또는 움직임이 검출된다. 객체가 표시 패널과 접촉하고 있지 않을 때에도, 객체가 검출될 수 있다.

Method of manufacturing Image Sensor

BACKSIDE ILLUMINATION CMOS IMAGE SENSOR AND METHOD OF MANUFACTURING THE SAME

SOLID-STATE IMAGING DEVICE, A METHOD OF DRIVING THE SOLID-STATE IMAGING DEVICE, AND A CAMERA APPARATUS, PARTICULARLY FOR RELATING TO AN X-Y ADDRESS TYPE SOLID-STATE IMAGING DEVICE TYPIFIED BY A MOS-TYPE SOLID-STATE IMAGING DEVICE, A METHOD OF DRIVING THE SOLID-STATE IMAGING DEVICE, AND A CAMERA APPARATUS THAT USES THE SOLID-STATE IMAGING DEVICE AS AN IMAGE-CAPTURING DEVICE

PURPOSE: A solid-state imaging device, a method of driving the solid-state imaging device, and a camera apparatus are provided to eliminate non-selection hot carrier white point when a three-transistor-type pixel configuration having no selection transistor is adopted. CONSTITUTION: A vertical decoder(13) selects each pixel(11) of a pixel section(12) in units of rows by scanning in a vertical direction, and also selects the row for electronic shutter. A vertical driving circuit(14) drives each pixel of the row selected by the vertical decoder. The column circuit, which is provided in such a manner as to correspond to each vertical pixel column of the pixel section, receives the reset level and the signal level from each pixel of the row selected by the vertical decoder, and calculates the difference between these levels, thereby obtaining a pixel signal for one line, and performs various kinds of signal processing, such as a process for removing fixed pattern noise of the pixel, and AD ...

SOLID IMAGING APPARATUS AND A METHOD THEREOF, CAPABLE OF PREVENTING MIXING COLOR DUE TO THE ELECTRICAL AND OPTICAL FACTORS

PURPOSE: A solid imaging apparatus and a method thereof are provided to photograph an high quality image by improving the spatial resolution in the photographing pixel. CONSTITUTION: A plurality of pixels(21) is formed on an active layer(12) of a semiconductor substrate(11). The plurality of pixels comprises a plurality of photoelectro transform portions(22) and a MOS transistor(23). An element isolation region(24) is formed between the pixels in the row direction or column direction. A wiring layer(31) is formed on the surface of the semiconductor substrate. COPYRIGHT KIPO 2011 ...

초점 길이 조정 및/또는 기울기의 축소를 위한 고객 맞춤화 가능한 스페이서를 포함하는 광학 모듈, 및 광학 모듈의 제조

... 광학 모듈은 광학 채널의 초점 길이의 변화를 감소시키기 위해, 광학 채널의 기울기의 발생을 감소시키기 위해, 및/또는 접착제가 이미지 센서의 활성 부분으로 이동하는 것을 방지하기 위해 고객 맞춤화된 스페이서를 이용하여 제조된다.

APPARATUS, FOR PREVENTING THE GENERATION OF THE BLOOMING AND FLARE THE MANUFACTURING METHOD THEREOF AND ELECTRONIC DEVICE

PURPOSE: The solid imaging apparatus, the manufacturing method thereof and electronic device control the incident of the adjacent pixel of the light through the light-shielding layer of the pixel boundary. The optics color mixture is reduced. CONSTITUTION: The pixel region(23) defined in the semiconductor substrate(22). The unit pixel(24) is composed of the photo diode(PD) and plurality of pixel transistors. The photo diode is formed in the entire region of the thickness direction of the semiconductor substrate. The multilayer wiring layer is formed on the surface of the semiconductor substrate. The light-shielding layer(39) is formed in the pixel boundary on the reflection barrier layer(36). COPYRIGHT KIPO 2010 ...

화상 센서, 검사 시스템 및 물품의 검사 방법

... 고감도 화상 센서가 진성 또는 저농도 p-도핑된(약 1013 cm-3 미만의 도핑 레벨과 같은) 실리콘의 에피택셜층을 포함한다. CMOS 또는 CCD 회로가 에피택셜층의 정면 상에 제조된다. 에피택셜 p 및 n-형 층이 에피택셜층의 이면 상에 성장된다. 순수 붕소층이 n-형 에피택셜층 상에 침착된다. 몇몇 붕소가 붕소 침착 프로세스 중에 이면으로부터 n-형 에피택셜층 내로 수 nm 혼입된다. 반사 방지 코팅이 순수 붕소층에 도포될 수도 있다. 센서의 동작 중에, 수십 내지 수백 볼트의 음의 바이어스 전압이 붕소층에 도포되어 이면으로부터 이격하여 광전자를 가속하고 애벌란치 효과에 의해 부가의 전자를 생성한다. 접지된 p-웰은 역바이어스된 에피택셜층으로부터 요구에 따라 능동 회로를 보호한다.

MANUFACTURING METHOD OF IMAGE SENSOR FOR IMPROVING THE OPERATING RELIABILITY

PURPOSE: A manufacturing method of image sensor is provided to form the contact hole of the fixed size on the photodiode layer. CONSTITUTION: The hard mask layer is formed on the photodiode layer(140). The photoresist pattern is formed in the top of hard mask. The first trench is formed in the hard mask layer. The ion injection etching layer is formed in the photodiode layer. Using the etching of the ion injection method, the second trench is formed. Using the etching of the domain of the metal wiring layer(200) corresponding to second trench, the third trench(166) is formed. The third trench exposes the metal wiring(210). COPYRIGHT KIPO 2010 ...

DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF

CMOS PIXEL WITH DUAL GATE PMOS TRANSISTOR CHARACTERISTICS WITHOUT CHARACTERISTIC DEGRADATION IN MINIMAL SIZE

PURPOSE: A CMOS pixel with a dual gate PMOS transistor is provided to prevent characteristics degradation of transistors of minimal sizes when adapting CMOS process parameters for size reduction. CONSTITUTION: A CMOS circuit includes a P- silicon substrate, an N- well(12), first and second P+ regions(14,16), a PMOS transistor(19), a gate oxide(28), and an electrode(20). A junction between the N- well and the P- silicon substrate forms a pixel which accumulates signal-generated carriers. The first and second P+ regions are formed in the N- well. The PMOS transistor includes a source, a drain, a channel, and a gate formed in the N- well. The first P+ region servers as the source, the second P+ region forms the drain, and a part of the N- well between the first and second P+ regions forms the channel. The gate oxide is formed over the channel of the PMOS transistor. The electrode is formed on the gate oxide so as to form the gate of the PMOS transistor. © KIPO 2005 ...

PIXEL OF A MULTI STACKED CMOS IMAGE SENSOR AND MANUFACTURING METHOD THEREOF WITH HIGH RESOLUTION

PURPOSE: A pixel of a multi stacked CMOS image sensor and a manufacturing method thereof are provided to simplify the process by etching only the insulating layer around a light receiving part to form a contact plug. CONSTITUTION: A light receiving part(30) includes a first to a third photodiode layers stacked successively. An integrated circuit is placed under the light receiving part. An electrode layer is formed on the upper part and the lower part of each photodiode layer. A contact plug connects transistors of the electrode layer and the integrated circuit. The contact plug is separated with the light receiving part. COPYRIGHT KIPO 2012 ...

SEMICONDUCTOR PACKAGE CAPABLE OF REDUCING CRACKS AND A MANUFACTURING METHOD THEREOF

PURPOSE: A semiconductor package and a manufacturing method thereof are provided to form a second bonding pattern between a semiconductor chip and a transparent substrate, thereby reducing physical stress applied to the semiconductor chip. CONSTITUTION: A semiconductor chip comprises a first surface(11), a second surface, and a pixel area(PA). The semiconductor chip comprises an edge area(EA) that surrounds the pixel area. A first adhesive pattern(21) is located on the first surface of the semiconductor chip. A second adhesive pattern(31) is located between the first adhesive pattern and the pixel area. A conductive pad(41) is formed on the edge area of the first surface. COPYRIGHT KIPO 2011 ...

Method for manufacturing a image sensor by filling a upper part of dielectric trench and forming air gap to improve optical cross-talk

PURPOSE: A method for manufacturing an image sensor is provided to maximize the light collecting efficiency of the image sensor by securing the light-guiding function of an air gap. CONSTITUTION: An interlayer insulating film(330) is formed on a semiconductor substrate. A metal layer is deposited on the interlayer insulating film and is etched to form a reflective pattern, a wiring pattern(342), and a dummy pattern into an integrated shape. A trench is formed between the reflective pattern and the wiring pattern or between the reflective pattern and the dummy pattern. An air gap(302) is formed by filling the upper side of the trench using a gap-fill oxide. The air gap functions as a light guide. COPYRIGHT KIPO 2010 ...

MANUFACTURING METHOD OF SOLIDE IMAGING DEVICE

Semiconductor device having transistor and photodiode and driving method thereof

Packing structure and packing method

Packing structure and pecking method are provided, packing method includes providing chip unit which has first surface and the first surface includes device region, providing protect cover having second surface, forming adhesion unit with changeable viscosity and adhering first surface of chip unit to second surface of protect cover; processing adhesion unit so the adhesion unit includes first region and second region having different viscosity. In the packing method of the disclosure, first region and second region with different viscosity are formed by light source illumination or heating, so binding force between chip unit and protect cover is reduced but not eliminated. In subsequent process of being arranged on board, the chip unit can be protected by the protect cover from being polluted or damaged and after the chip unit is arranged on board, the protect cover can be easily moved without affecting the performance of the chip unit.

Trenched-bonding-dam device and manufacturing method for same

Trenched-bonding-dam devices and corresponding methods of manufacture are provided. A trenched-bonding-dam device includes a bonding dam structure positioned upon a top surface of a substrate. The bonding dam structure has a bottom surface attached to a top surface of the substrate, an inner dam surrounded by an outer dam, and a trench between the inner and outer dams. The device may further include an optics system including a lens and an adhesive positioned within a bonding region between a bottom surface of the optics system and a top surface of at least one of the inner and outer dams. The trench may be dimensioned to receive a portion of the excess adhesive flowing laterally out of the bonding region during bonding of the substrate to the optics system, laterally confining the excess adhesive and reducing lateral bleeding of the adhesive.

Solid-state imaging device, method for manufacturing the same and imaging apparatus

A solid-state imaging device includes a semiconductor substrate having a pixel region including a photoelectric conversion portion, a wiring portion including a conductor line and disposed on the semiconductor substrate with an insulating film therebetween, a metal pad connected to the conductor line, a pad-coating insulating film coating the metal pad, and a waveguide material layer. The wiring portion and the pad-coating insulating film each have an opening therein over the photoelectric conversion portion, and the openings continue from each other to define a waveguide opening having an open side and a closed side. The waveguide material layer is disposed in the waveguide opening and on the pad-coating insulating film with a passivation layer therebetween. The pad-coating insulating film has a thickness of 50 to 250 nm and a face defining the opening. The face is slanted so as to diverge toward the open side of the opening.

Method for manufacturing light-receiving device

The present invention relates to a method for manufacturing a light-receiving device 1, comprising the steps of: providing a resin layer 14 containing a photocurable resin on a transparent substrate 13 integrally formed of a plurality of transparent substrate portions 13A in accordance with the manner of covering the transparent substrate 13; selectively radiating light to the resin layer 14 to conduct the developing treatment so that the resin layer 14 remains at least in the areas of the transparent substrate portions 13A surrounding the area portions opposite to the light-receiving portions 11 in the transparent substrate 13; cutting the transparent substrate 13 in a accordance with the units of the transparent substrate portions 13A to obtain a plurality of transparent substrate portions 13A; cutting the base substrate 12 in accordance with the units of the base substrate portions 12A to obtain a plurality of base substrate portions 12A; and bonding the base substrate portions 12A and ...

Image recognition device and liquid crystal display apparatus having the same

In an image recognition apparatus and an LCD apparatus having the same, a plurality of gate lines arranged in a transparent substrate has a predetermined slope such that the gate lines intersect with two sides of the transparent substrate, which are adjacent to or facing each other. A plurality of sensing signal output line arranged in the transparent substrate is substantially perpendicular to the gate lines. An image recognition sensor is formed on a pixel area defined by the gate and sensing signal output lines adjacent to each other. The image recognition sensor senses an image pattern of an object in response to gate driving signals from the gate lines and outputs the sensed image pattern through the sensing signal output lines. Accordingly, the LCD apparatus may prevent appearance of the moire image and deterioration of the display quality of the LCD panel.

Chip package structure

Solid-state imaging device, method for producing solid-state imaging device, and electronic device

The present invention provides a solid-state imaging device which is capable of achieving further improved reliability, while being further suppressed in the production cost. The present invention provides a solid-state imaging device in which a second semiconductor substrate that is provided with a photoelectric conversion part and a second element, a second insulating layer, a first semiconductor substrate that is provided with a first element, and a first insulating layer are sequentially arranged in this order from the light incidence side. This solid-state imaging device is configured such that: the first semiconductor substrate is provided with a groove-like part; the groove-like part has a first side wall and a second side wall; and a part of at least one of the first side wall and the second side wall extends in a direction that is oblique to the light incidence-side surface of the first semiconductor substrate.

Semiconductor device package and method for manufacturing the same

A semiconductor package includes a semiconductor device and a second substrate. The semiconductor device is disposed on, and electrically connected to, the second substrate. The semiconductor device includes a first substrate and a multi-layered structure. The multi-layered structure is disposed on a top surface of the first substrate and a layer of the multi-layered structure extends outwardly beyond a lateral edge of a topmost surface of the multi-layered structure.

Semiconductor device and method for forming the same

Thermal imaging systems with vacuum-sealing lens cap and associated wafer-level manufacturing methods

Backside illuminated image sensor having deep light reflective trenches

INTEGRATED MIS PHOTOSENSITIVE DEVICE USING CONTINUOUS FILMS

L'invention concerne un dispositif photosensible intégré doté d'une photodiode à semi-conducteur métal-isolant (MIS) constitué d'au moins une couche sensiblement continue de matière semi-conductrice et d'une couche sensiblement continue de matière diélectrique.

SEMICONDUCTOR DEVICE

An object is to achieve low-power consumption by reducing the off-state current of a transistor in a photosensor. A semiconductor device including a photosensor having a photodiode, a first transistor, and a second transistor; and a read control circuit including a read control transistor, in which the photodiode has a function of supplying charge based on incident light to a gate of the first transistor; the first transistor has a function of storing charge supplied to its gate and converting the charge stored into an output signal; the second transistor has a function of controlling reading of the output signal; the read control transistor functions as a resistor converting the output signal into a voltage signal; and semiconductor layers of the first transistor, the second transistor, and the read control transistor are formed using an oxide semiconductor.

SEMICONDUCTOR WAFER, METHOD FOR MANUFACTURING LIGHT RECEIVING SENSOR, AND LIGHT RECEIVING SENSOR

A semiconductor wafer includes a semiconductor substrate, a dielectric multilayer film formed on the semiconductor substrate and serving as an optical filter on a light receiving sensor, and a light detection region formed in the semiconductor substrate, with the Poisson ratio VS, Young's modulus ES, the radius r, and the thickness b of the semiconductor substrate, stress σ in the dielectric multilayer film, and the thickness d of the dielectric multilayer film satisfy a relationship 1.0×10−3≧{3×r2×d×(1−VS)×σ}/(ES×b2).

SOLID-STATE IMAGING APPARATUS AND METHOD OF MANUFACTURING THE SAME

A solid-state imaging apparatus includes: an imaging section having a light-receiving portion for receiving light from an object to image the object; and a substrate on which the imaging section is disposed, wherein a predetermined member provided on the substrate in the neighborhood of the light receiving portion is partially or entirely coated in black.

Solid-state imaging device, method of fabricating solid-state imaging device, and camera

Disclosed is a solid-state imaging device receiving incident light from a backside thereof. The imaging device includes a semiconductor layer on which a plurality of pixels including photoelectric converters and pixel transistors are formed, a wiring layer formed on a first surface of the semiconductor layer, a pad portion formed on a second surface of the semiconductor layer, an opening formed to reach a conductive layer of the wiring layer, and an insulating film extendedly coated from the second surface to an internal side-wall of the opening so as to insulate the semiconductor layer.

Solid-state image sensing apparatus

This invention provides a solid-state image sensing apparatus in which a sensor portion that performs photo-electric conversion and plural layers of wiring lines including a signal line for the sensor portion are formed on a semiconductor substrate; which includes an effective pixel portion configured such that light enters the sensor portion, and an optical black portion shielded so that the light does not enter the sensor portion; and which has a light-receiving surface on the back surface side of the semiconductor substrate. The optical black portion includes the sensor portion, a first light-shielding film formed closer to the back surface side of the semiconductor substrate than the sensor portion, and a second light-shielding film formed closer to the front surface side of the semiconductor substrate than the sensor portion.

Photo sensor and method of forming the same

A method of forming a photo sensor in a photo diode is provided. The photo diode is formed in a semiconductor wafer. The semiconductor wafer includes a substrate with a first conductive type, and an insulating layer surrounding the photo sensor. A first ion implantation process, utilizing dopants with a second conductive type, is performed to form a plurality of first doped regions in the surface of the photo sensor. A second ion implantation process, utilizing dopants with the second conductive type, is performed to form a second doped region in the surface of the photo sensor. The second doped region is overlapped with a portion of each of the first doped regions.

Raised photodiode sensor to increase fill factor and quantum efficiency in scaled pixels

An image pixel cell with a doped, hydrogenated amorphous silicon photosensor, raised above the surface of a substrate is provided. Methods of forming the raised photosensor are also disclosed. Raising the photosensor increases the fill factor and the quantum efficiency of the pixel cell. Utilizing hydrogenated amorphous silicon decreases the leakage and barrier problems of conventional photosensors, thereby increasing the quantum efficiency of the pixel cell. Moreover, the doping of the photodiode with inert implants like fluorine or deuterium further decreases leakage of charge carriers and mitigates undesirable hysteresis effects.

Semiconductor device, apparatus, and method for producing semiconductor device

A semiconductor device comprising: a substrate; a semiconductor layer; and a wiring structure section between the substrate and the semiconductor layer, the wiring structure section including a plurality of stacked wiring layers and a plurality of stacked insulating films, the wiring structure section including an electrode, wherein an opening for connecting a member to the electrode is formed in the semiconductor layer and the wiring structure section; the semiconductor layer has an isolation region in which an insulating film is embedded and which surrounds the opening; the wiring structure section has a ring which is formed of the plurality of wiring layers and surround the opening; and a distance between the opening and the ring closest to the opening is larger than a distance between the opening and the isolation region closest to the opening.

Delamination and crack resistant image sensor structures and methods

A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.

SEMICONDUCTOR DEVICE AND SOLID-STATE IMAGING DEVICE

Certain embodiments provide a semiconductor device including a semiconductor substrate having an element portion, an insulating film provided on a main surface of the semiconductor substrate, at least one wire provided on the insulating film and electrically connected to the element portion, an uneven portion provided on the main surface side of the semiconductor substrate, and a protection film provided in contact with the wire and the uneven portion, and also in contact with the insulating film.

SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF

A transistor a gate of which, one of a source and a drain of which, and the other are electrically connected to a selection signal line, an output signal line, and a reference signal line, respectively and a photodiode one of an anode and a cathode of which and the other are electrically connected to a reset signal line and a back gate of the transistor, respectively are included. The photodiode is forward biased to initialize the back-gate potential of the transistor, the back-gate potential is changed by current of the inversely-biased photodiode flowing in an inverse direction in accordance with the light intensity, and the transistor is turned on to change the potential of the output signal line, so that a signal in accordance with the intensity is obtained.

One-transistor pixel array

To reduce the pixel size to the smallest dimensions and simplest form of operation, a pixel may be formed by using only one ion sensitive field-effect transistor (ISFET). This one-transistor, or 1T, pixel can provide gain by converting the drain current to voltage in the column. Configurable pixels can be created to allow both common source read out as well as source follower read out. A plurality of the 1T pixels may form an array, having a number of rows and a number of columns and a column readout circuit in each column.

SEMICONDUCTOR DEVICE AND SOLID-STATE IMAGING DEVICE

The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.

Multiple deep trench isolation (MDTI) structure for CMOS image sensor

The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, a plurality of pixel regions is disposed within a substrate and respectively comprising a photodiode. A boundary deep trench isolation (BDTI) structure is disposed between adjacent pixel regions, extending from a back-side of the substrate to a first depth within the substrate, and surrounding the photodiode. A multiple deep trench isolation (MDTI) structure is disposed within the individual pixel region, extending from the back-side of the substrate to a second depth within the substrate, and overlying the photodiode. A dielectric layer fills in a BDTI trench of the BDTI structure and a MDTI trench of the MDTI structure.

Solis-state imaging device, method of driving same, and camera apparatus

A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.

SEMICONDUCTOR APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD OF DESIGNING SEMICONDUCTOR APPARATUS, AND ELECTRONIC APPARATUS

A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.

Photodiode and other sensor structures in flat-panel X-ray imagers and method for improving topological uniformity of the photodiode and other sensor structures in flat-panel X-ray imagers based on thin-film electronics

A radiation sensor including a scintillation layer configured to emit photons upon interaction with ionizing radiation and a photodetector including in order a first electrode, a photosensitive layer, and a photon-transmissive second electrode disposed in proximity to the scintillation layer. The photosensitive layer is configured to generate electron-hole pairs upon interaction with a part of the photons. The radiation sensor includes pixel circuitry electrically connected to the first electrode and configured to measure an imaging signal indicative of the electron-hole pairs generated in the photosensitive layer and a planarization layer disposed on the pixel circuitry between the first electrode and the pixel circuitry such that the first electrode is above a plane including the pixel circuitry. A surface of at least one of the first electrode and the second electrode at least partially overlaps the pixel circuitry and has a surface inflection above features of the pixel circuitry.

Image acquisition device, biometric authentication device, and electronic apparatus

An image acquisition device includes: an imaging unit which has a plurality of light receiving elements; a condensing unit which condenses light which is input to the light receiving elements, and includes a plurality of microlenses which are arranged one to one with the light receiving elements on a plane; and a band pass filter including amorphous silicon films on a path on which light from an object is input to the light receiving elements.

Stacked modular architecture high-resolution thermal chip camera

An uncooled high-resolution 12 micron pixel pitch 3D-stacked component thermal camera including an electronics board, a camera circuit card assembly (CCA) with an application-specific integrated circuit (ASIC), a synchronous dynamic random access memory (SDRAM), flash memory, a spacer, a wafer level packaged Focal Plane Array (FPA) wafer with a lens housing attach ring on the FPA, and a window.

Method of producing semiconductor epitaxial wafer, semiconductor epitaxial wafer, and method of producing solid-state image sensor

A method of producing a semiconductor epitaxial wafer is provided. The method includes irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, in which the modified layer includes a constituent element of the cluster ions in solid solution. The method further includes forming an epitaxial layer on the modified layer of the semiconductor wafer. The irradiating is performed such that a portion of the modified layer in a thickness direction becomes an amorphous layer, and an average depth of an amorphous layer surface from a semiconductor wafer surface-side of the amorphous layer is at least 20 nm from the surface of the semiconductor wafer.

Solid-state image sensing device and camera system using the same

A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.

Imaging device and electronic device

An imaging device with excellent imaging performance is provided. In the imaging device, a first layer, a second layer, and a third layer have a region overlapping with one another, the first layer and the second layer each include transistors, and the third layer includes a photoelectric conversion element. Off-state currents of the transistors formed in the first layer are lower than those of the transistors formed in the second layer, and field-effect mobilities of the transistors formed in the second layer are higher than those of the transistors formed in the first layer.

Vertically integrated image sensor chips and methods for forming the same

A method includes bonding a Backside Illumination (BSI) image sensor chip to a device chip, forming a first via in the BSI image sensor chip to connect to a first integrated circuit device in the BSI image sensor chip, forming a second via penetrating through the BSI image sensor chip to connect to a second integrated circuit device in the device chip, and forming a metal pad to connect the first via to the second via.

Optical modules including customizable spacers for focal length adjustment and/or reduction of tilt, and fabrication of the optical modules

Optical modules are made using customizable spacers to reduce variations in the focal lengths of the optical channels, to reduce the occurrence of tilt of the optical channels, and/or prevent adhesive from migrating to active portions of an image sensor.

Display device and manufacturing method thereof

A display device includes: a first substrate; a photo transistor on the first substrate; and a switching transistor connected to the photo transistor. The photo transistor includes a light blocking film on the first substrate, a first gate electrode on the light blocking film and in contact with the light blocking film, a first semiconductor layer on the first gate electrode and overlapping the light blocking film, and a first source electrode and a first drain electrode on the first semiconductor layer. The switching transistor includes a second gate electrode on the first substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and a second source electrode and a second drain electrode on the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are at a same layer of the display device, and each includes crystalline silicon germanium.

GERMANIUM-SILICON LIGHT SENSING APPARATUS

A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including forming a germanium-silicon layer for the second group of photodiodes on a first semiconductor donor wafer; defining a first interconnect layer on the germanium-silicon layer; defining integrated circuitry for controlling pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer; bonding the first interconnect layer with the second interconnect layer; defining the pixels of an image sensor array on a second semiconductor donor wafer; defining a third interconnect layer on the image sensor array; and bonding the third interconnect layer with the germanium-silicon layer.

METHOD FOR PRODUCING A PLURALITY OF COMPONENTS

The invention relates to a method for producing a plurality of components (100), wherein a carrier composite (10) is provided with a coherent base body (13) and a wafer composite (200) is provided with a coherent semiconductor body composite (20) and a substrate (9). The wafer composite is connected to the carrier composite to form a common composite. In a subsequent method step, a plurality of separation channels (60) are generated at least through the base body (13) to form a grid structure (6), which determines the dimensions of the components (100) to be produced. A passivation layer (61) is shaped in such a way that it covers the side surfaces of the separation channels (60). Finally, the common composite is separated, wherein the substrate (9) is removed from the semiconductor body composite (20) and the common composite is separated along the separation channels (60) to form a plurality of components (100).

Semiconductor device including photosensor and transistor having oxide semiconductor active layer

An object is to achieve low-power consumption by reducing the off-state current of a transistor in a photosensor. A semiconductor device including a photosensor having a photodiode, a first transistor, and a second transistor; and a read control circuit including a read control transistor, in which the photodiode has a function of supplying charge based on incident light to a gate of the first transistor; the first transistor has a function of storing charge supplied to its gate and converting the charge stored into an output signal; the second transistor has a function of controlling reading of the output signal; the read control transistor functions as a resistor converting the output signal into a voltage signal; and semiconductor layers of the first transistor, the second transistor, and the read control transistor are formed using an oxide semiconductor.

BACKSIDE ILLUMINATED IMAGE SENSOR

A backside illuminated image sensor includes a substrate, a backside passivation layer disposed on backside of the substrate, and a transparent conductive layer disposed on the backside passivation layer.

SOLID-STATE IMAGE PICKUP APPARATUS AND IMAGE PICKUP SYSTEM

An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.

Imaging Device and Electronic Device

An imaging device that does not need a lens is provided. The imaging device includes a first layer, a second layer, and a third layer. The second layer is positioned between the first layer and the third layer. The first layer includes a diffraction grating. The second layer includes a photoelectric conversion element. The third layer includes a transistor including an oxide semiconductor in an active layer. 1. An imaging device comprising:a first layer;a second layer; anda third layer,wherein the second layer is positioned between the first layer and the third layer,wherein the first layer comprises a diffraction film,wherein the second layer comprises a photoelectric conversion element, andwherein the third layer comprises a first transistor comprising an oxide semiconductor in a channel formation region.2. The imaging device according to claim 1 ,wherein the third layer further comprises a second transistor, a third transistor, and a fourth transistor,wherein one of a source electrode and a drain electrode of the first transistor is electrically connected to one electrode of the photoelectric conversion element,wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor,wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the third transistor, andwherein one of a source electrode and a drain electrode of the second transistor is electrically connected to one of a source electrode and a drain electrode of the fourth transistor.3. The imaging device according to claim 2 , wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one electrode of a capacitor.4. The imaging device according to claim 1 , wherein the oxide semiconductor comprises In claim 1 , Zn claim 1 , and M claim 1 , where M ...

Wafer level chip scale package having continuous through hole via configuration and fabrication method thereof

A wafer level chip scale package (WLCSP) has a device chip, a carrier chip, an offset pad, a conductive spacing bump and a through hole via (THV). The device chip is attached to the carrier chip. The offset pad is disposed on a first surface of the device chip. The conductive spacing bump is formed on the offset pad. The through hole via includes a through hole and a hole metal layer. The through hole penetrates through the carrier chip and the device chip, and the hole metal layer is formed in the through hole and in contact with the offset pad.

STACKED LENS STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS

A stacked lens structure has a configuration in which substrates with lenses having a lens disposed on an inner side of a through-hole formed in the substrate are bonded and stacked by direct bonding. The present technique can be applied to a camera module or the like in which a stacked lens structure in which at least three substrates with lenses including first to third substrates with lenses which are substrates with lenses in which a through-hole is formed in the substrate and a lens is formed on an inner side of the through-hole is integrated with a light receiving element, for example.

Imaging device

An imaging device free from discoloring under high temperature or high irradiation and having high color reproducibility is provided. Multilayer filters made of inorganic materials are provided above respective photoelectric conversion elements. The filters include red filters having predetermined spectra characteristics, green filters having predetermined spectral characteristics, and two kinds of blue filters having spectral characteristics different in peak wavelength.

Use of surface patterning for fabricating a single die direct capture dental X-ray imaging sensor

A device and process in which a single continuous depositional layer of a polycrystalline photoactive material is deposited on an integrated charge storage, amplification, and readout circuit with an irregular surface wherein the polycrystalline photoactive material is comprised of a II-VI semiconductor compound or alloys of II-VI compounds.

Semiconductor device and manufacturing method thereof

A semiconductor device manufacturing method is disclosed. The method includes etching a silicon on insulator (SOI) from its surface (i.e., semiconductor substrate layer) to form a first trench and a second trench. The first trench extends through the SOI substrate and reaches an electrode pad. The second trench terminates in the semiconductor substrate layer. The manufacturing method also includes forming an insulation film that covers the surface of the semiconductor substrate layer as well as the side walls and bottoms of the first and second trenches. The manufacturing method also includes removing the insulation film from the bottoms of the first and second trenches to expose the electrode pad from the first trench bottom and to expose the semiconductor substrate layer from the second trench bottom.

Image sensors including hydrophobic interfaces and methods of fabricating the same

A method of fabricating an image sensor device includes forming an insulating layer on a substrate including a photodiode therein, and forming a wiring structure on the insulating layer. The wiring structure includes at least one wiring layer and at least one insulating interlayer. A cavity is formed extending into the wiring structure over the photodiode to expose a surface of the at least one insulating interlayer. The surface of the at least one insulating interlayer exposed by the cavity is modified to define a hydrophobic surface. Related systems and devices are also discussed.

Image pickup device, image pickup apparatus, and production apparatus and method

... [Object] The present disclosure relates to an image pickup device, an image pickup apparatus, and a production apparatus and method with which protection performance of an organic film can be improved.[Solving Means] An image pickup device according to the present disclosure includes: a photoelectric conversion device that photoelectrically converts incident light that has entered from outside; an organic film that is formed by being laminated on a light-incident surface side of the photoelectric conversion device; and an inorganic film that is formed by being laminated on a light-incident surface and side surfaces of the organic film and seals the organic film, the side surfaces of the organic film being tilted by an angle at which a thickness of the inorganic film that is formed by being laminated on the side surfaces becomes a predetermined thickness. The present disclosure is applicable to an image pickup device, an image pickup apparatus, a production apparatus for an image pickup ...

Area Sensor and Display Apparatus Provided With An Area Sensor

An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.

Array configuration and readout scheme

The described embodiments may provide a chemical detection circuit that may comprise a plurality of first output circuits at a first side and a plurality of second output circuits at a second side of the chemical detection circuit. The chemical detection circuit may further comprise a plurality of tiles of pixels each placed between respective pairs of first and second output circuits. Each tile may include four quadrants of pixels. Each quadrant may have columns with designated first columns interleaved with second columns. Each first column may be coupled to a respective first output circuit in first and second quadrants, and to a respective second output circuit in third and fourth quadrants. Each second column may be coupled to a respective second output circuit in first and second quadrants, and to a respective first output circuit in third and fourth quadrants.

Solid-state image sensing apparatus

This invention provides a solid-state image sensing apparatus in which a sensor portion that performs photo-electric conversion and plural layers of wiring lines including a signal line for the sensor portion are formed on a semiconductor substrate; which includes an effective pixel portion configured such that light enters the sensor portion, and an optical black portion shielded so that the light does not enter the sensor portion; and which has a light-receiving surface on the back surface side of the semiconductor substrate. The optical black portion includes the sensor portion, a first light-shielding film formed closer to the back surface side of the semiconductor substrate than the sensor portion, and a second light-shielding film formed closer to the front surface side of the semiconductor substrate than the sensor portion.

Photoelectric conversion element, production method thereof, photosensor, imaging device and their driving method

To provide a photoelectric conversion element capable of functioning as a photoelectric conversion element when a compound having a specific structure is applied to the photoelectric conversion element, causing the element to exhibit a low dark current, and reducing the range of increase in the dark current even when the element is heat-treated, and an imaging device equipped with such a photoelectric conversion element. A photoelectric conversion element having a photoelectric conversion film which is sandwiched between a transparent electrically conductive film and an electrically conductive film and contains a photoelectric conversion layer and an electron blocking layer, wherein the electron blocking layer contains a compound having, as a substituent, a substituted amino group containing three or more ring structures.

Two-Transistor Pixel Array

A two-transistor (2T) pixel comprises a chemically-sensitive transistor (ChemFET) and a selection device which is a non-chemically sensitive transistor. A plurality of the 2T pixels may form an array, having a number of rows and a number of columns. The ChemFET can be configured in a source follower or common source readout mode. Both the ChemFET and the non-chemically sensitive transistor can be NMOS or PMOS device.

Pixel of a multi-stacked cmos image sensor and method of manufacturing the same

Provided is a pixel of a multi-stacked complementary metal-oxide semiconductor (CMOS) image sensor and a method of manufacturing the image sensor including a light-receiving unit that may include first through third photodiode layers that are sequentially stacked, an integrated circuit (IC) that is formed below the light-receiving unit, electrode layers that are formed on and below each of the first through third photodiode layers, and a contact plug that connects the electrode layer formed below each of the first through third photodiode layers with a transistor of the IC.

Semiconductor device and method for manufacturing the same

There are provided a first waveguide member in an imaging region and a peripheral region of a semiconductor substrate and a via plug penetrating the first waveguide member.

Photoelectric conversion device and electronic apparatus

A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.

Back side illuminated image sensor with reduced sidewall-induced leakage

Provided is an image sensor device. The image sensor device includes having a front side, a back side, and a sidewall connecting the front and back sides. The image sensor device includes a plurality of radiation-sensing regions disposed in the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers and extends beyond the sidewall of the substrate. The image sensor device includes a bonding pad that is spaced apart from the sidewall of the substrate. The bonding pad is electrically coupled to one of the interconnect layers of the interconnect structure.

Array Column Integrator

Circuits are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a device is described that includes a chemFET including a first terminal and a second terminal, and a floating gate coupled to a passivation layer. An integrator circuit is coupled to the second source/drain terminal of the chemFET via a data line. The integrator circuit applies a bias voltage to the data line during a read interval, thereby inducing a current through the chemFET based on a threshold voltage of the chemFET. The integrator circuit then generates an output signal proportional to an integral of the induced current through the chemFET during the read interval.

Photodiode and manufacturing method for same, substrate for display panel, and display device

A third semiconductor layer 14 is formed on a light receiving surface 13 a of a second semiconductor layer 13 so as to cover the light receiving surface 13 a of the second semiconductor layer 13 at least partially in a plan view. A first semiconductor layer 10 is formed on an opposite surface of the light receiving surface 13 a of the second semiconductor layer 13 so as to overlap the light receiving surface 13 a and the third semiconductor layer 14 at least partially in a plan view. In the second semiconductor layer 13 , the relative light receiving sensitivity to respective wavelengths of light has the highest value at a wavelength in an infrared region. Thus, even if the intensity of light of the infrared region that is emitted to an object of detection is not increased when sensing by a photodiode is performed using light of the infrared range, it is possible to achieve a photodiode that has a high S/N ratio, which is a ratio of data of received light with respect to noise, and that has high detection accuracy.

Method of implanting impurities and method of manufacturing a complementary metal oxide semiconductor (cmos) image sensor using the same

In a method of doping impurities, an amorphous layer is formed on a substrate. Impurities are implanted through a top surface of the amorphous layer to form a first doping region at an upper portion of the substrate. The first doping region and the amorphous layer are transformed into a second doping region and a recrystallized layer, respectively, by a laser annealing process. The recrystallized layer is removed.

Solid state imaging device

According to one embodiment, a solid state imaging device includes a photoelectric converting portion including a semiconductor region and a semiconductor film. The semiconductor region has a first region and a second region. The first region is of a second conductivity type. The first region is provided in a semiconductor substrate. The second region is of a first conductivity type. The first conductivity type is a different conductivity type from the second conductivity type. The second region is provided on the first region. The semiconductor film is of the second conductivity type. The semiconductor film is provided on the semiconductor region. An absorption coefficient of a material of the semiconductor film to a visible light is higher than an absorption coefficient of a material of the semiconductor substrate to the visible light. A thickness of the semiconductor film is smaller than a thickness of the semiconductor region.

X-y address type solid state image pickup device and method of producing the same

In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Solid-state image sensing apparatus

This invention provides a solid-state image sensing apparatus in which a sensor portion that performs photo-electric conversion and plural layers of wiring lines including a signal line for the sensor portion are formed on a semiconductor substrate; which includes an effective pixel portion configured such that light enters the sensor portion, and an optical black portion shielded so that the light does not enter the sensor portion; and which has a light-receiving surface on the back surface side of the semiconductor substrate. The optical black portion includes the sensor portion, a first light-shielding film formed closer to the back surface side of the semiconductor substrate than the sensor portion, and a second light-shielding film formed closer to the front surface side of the semiconductor substrate than the sensor portion.

Bonding pad structure and fabricating method thereof

A bonding pad structure is used in an integrated circuit device. The integrated circuit device includes a semiconductor substrate with a first surface and a second surface. The bonding pad structure includes a dielectric layer, a conductor structure, a pad opening and an isolation trench. The dielectric layer is formed on the second surface of the semiconductor substrate. The conductor structure is disposed within the dielectric layer. The pad opening is formed in the first surface of the semiconductor substrate. The pad opening runs through the semiconductor substrate and a part of the dielectric layer, so that the conductor structure is exposed. The isolation trench has an opening in the first surface of the semiconductor substrate. The isolation trench runs through the semiconductor substrate and a part of the dielectric layer, and the isolation trench is disposed around the pad opening.

Method for manufacturing semiconductor device and semiconductor device

A minute transistor and the method of manufacturing the minute transistor. A source electrode layer and a drain electrode layer are each formed in a corresponding opening formed in an insulating layer covering a semiconductor layer. The opening of the source electrode layer and the opening of the drain electrode layer are formed separately in two distinct steps. The source electrode layer and the drain electrode layer are formed by depositing a conductive layer over the insulating layer and in the openings, and subsequently removing the part located over the insulating layer by polishing. This manufacturing method allows for the source electrode later and the drain electrode layer to be formed close to each other and close to a channel forming region of the semiconductor layer. Such a structure leads to a transistor having high electrical characteristics and a high manufacturing yield even in the case of a minute structure.

Optical elements, method of replicating optical elements, particularly on a wafer level, and optical devices

Integrated multiple optical elements may be formed by bonding substrates containing such optical elements together or by providing optical elements on either side of the wafer substrate. The wafer is subsequently diced to obtain the individual units themselves. The optical elements may be formed lithographically, directly, or using a lithographically generated master to emboss the elements. Alignment features facilitate the efficient production of such integrated multiple optical elements, as well as post creation processing thereof on the wafer level.

Solid-state imaging device

A purpose of the present invention is to provide a preferable separation structure of wells when a photoelectric conversion unit and a part of a peripheral circuit unit or a pixel circuit are separately formed on separate substrates and electrically connected to each other. To this end, a solid-state imaging device includes a plurality of pixels including a photoelectric conversion unit and a amplification transistor configured to amplify a signal generated by the photoelectric conversion unit; a first substrate on which a plurality of the photoelectric conversion units are disposed; and a second substrate on which a plurality of the amplification transistors are disposed. A well of a first conductivity type provided with a source region and a drain region of the amplification transistor is separated from a well, which is disposed adjacent to the well in at least one direction, of the first conductivity type provided with the source region and the drain region of the amplification transistor.

Solid-state imaging apparatus and manufacturing method of solid-state imaging apparatus

The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.

Method of manufacturing an optical member having stacked high and low refractive index layers

A method of making an optical member including high refractive index layers and low refractive index layers, which are each relatively thin as compared with an optical length, and disposed alternately in the lateral direction with respect to an optical axis. Each width of the high refractive index layers and the low refractive index layers is equal to or smaller than the wavelength order of incident light.

Embedded wafer level optical package structure and manufacturing method

A method of forming an embedded wafer level optical package includes attaching a sensor die, PCB bars and an LED on adhesive tape laminated on a carrier, attaching a dam between two light sensitive sensors of the sensor die, encapsulating the sensor die, the PCB bars, the LED, and the dam in an encapsulation layer, debonding the carrier, grinding a top surface of the encapsulation layer, forming vias through the encapsulation layer to the sensor die and the LED, filling the vias with conductive material, metalizing the top surface of the encapsulation layer, dielectric coating of the top surface of the encapsulation layer, dielectric coating of a bottom surface of the encapsulation layer, patterning the dielectric coating of the bottom surface of the encapsulation layer, and plating the patterned dielectric coating of the bottom surface of the encapsulation layer.

Semiconductor unit, method of manufacturing the semiconductor unit, solid-state image pickup unit, and electronic apparatus

A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.

Solid-state image pickup device, method of manufacturing solid-state image pickup device, and electronic apparatus

Disclosed herein is a solid-state image pickup device including a solid-state image pickup element operable to produce an electric charge according to the amount of light received, a lens disposed on the upper side of a pixel of the solid-state image pickup element, a protective film which covers the upper side of the lens and a surface of which is flattened, and a surface film which is formed at the surface of the protective film and which is higher in hydrophilicity than the inside of the protective film.

Solid-state image pickup apparatus and image pickup system

An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.

Methods and Apparatus for Glass Removal in CMOS Image Sensors

Methods for glass removal while forming CMOS image sensors. A method for forming a device is provided that includes forming a plurality of pixel arrays on a device wafer; bonding a carrier wafer to a first side of the device wafer; bonding a substrate over a second side of the device wafer; thinning the carrier wafer; forming electrical connections to the first side of the device wafer; subsequently de-bonding the substrate from the second side of the device wafer; and subsequently singulating individuals ones of the plurality of pixel arrays from the device wafer. An apparatus is disclosed. 1. A method for forming a device , comprising:forming a plurality of pixel arrays on a device wafer;bonding a substrate to the device wafer;thinning the device wafer;forming electrical connections on the device wafer after bonding the substrate to the device wafer;de-bonding the substrate from the device wafer; andsingulating individuals ones of the plurality of pixel arrays from the device wafer.2. The method of claim 1 , wherein singulating includes sawing claim 1 , lasering claim 1 , scribing claim 1 , pressing claim 1 , etching claim 1 , and combinations thereof.3. The method of claim 1 , wherein the substrate comprises glass.4. The method of claim 1 , wherein the device wafer includes a front side illumination (FSI) CMOS image sensor (CIS).5. The method of claim 1 , wherein the substrate is bonded to the device wafer by a heat release bonding material.6. The method of claim 1 , wherein forming electrical connections on the device wafer further comprises thinning the device wafer to expose conductive through vias in the device wafer.7. The method of claim 1 , wherein forming electrical connections on the device wafer includes forming a conductive redistribution layer on the device wafer.8. The method of claim 7 , wherein forming electrical connections on the device wafer includes forming solder balls coupled to the conductive redistribution layer on the device wafer.9. A ...

Semiconductor device and manufacturing method thereof

In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.

Image sensor having compressive layers

An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer.

Semiconductor device

High field-effect mobility is provided for a semiconductor device including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a transistor in which a stack of oxide semiconductor layers is provided over a gate electrode layer with a gate insulating layer provided therebetween, an oxide semiconductor layer functioning as a current path (channel) of the transistor and containing an n-type impurity is sandwiched between oxide semiconductor layers having lower conductivity than the oxide semiconductor layer. In the oxide semiconductor layer functioning as the channel, a region on the gate insulating layer side contains the n-type impurity at a higher concentration than a region on the back channel side. With such a structure, the channel can be separated from the interface between the oxide semiconductor stack and the insulating layer in contact with the oxide semiconductor stack, so that a buried channel can be formed.

Camera, and method of manufacturing a pluralityof cameras

In accordance with the invention, a camera or optical module for a camera is provided, the camera or optical module comprising: —a first substrate with a plurality of first optical devices, —a second substrate with a plurality of second optical devices, —and a spacer between the first substrate and the second substrate, the spacer having a first and a second attachment surface, the first substrate attached to the first attachment surface and the second spacer attached to the second attachment surface, —the spacer having a through hole from the first attachment surface to the second attachment surface so that there is an interior space between the first substrate and the second substrate, the interior space being hermetically closed off, —the first optical devices and the second optical devices being mutually arranged so that light impinging, from an object side, on a first optical device is directed to an assigned second optical device through the interior space, —the camera further comprising a screen device in the interior space, the screen device comprising one screening wall or at a plurality of screening walls, the screening wall(s) blocking off light portions from a first device from getting to a second device other than the assigned second device.

Semiconductor device and method of manufacturing the same

According to one embodiment, in a semiconductor device, a semiconductor substrate has a first surface and a second surface which is opposed to the first surface. An insulating layer is provided on the first surface of the semiconductor substrate. A metal wiring is provided within the insulating layer. A support substrate is bonded to the insulating layer. A poly silicon electrode is connected to the metal wiring through a contact. A pad is provided on the second surface of the semiconductor substrate and is connected to the poly silicon electrode through a metal film deposited in a via-hole to penetrate the semiconductor substrate and extend to the poly silicon electrode.

Display device and manufacturing method thereof

A display device includes: a first substrate; a photo transistor on the first substrate; and a switching transistor connected to the photo transistor. The photo transistor includes a light blocking film on the first substrate, a first gate electrode on the light blocking film and in contact with the light blocking film, a first semiconductor layer on the first gate electrode and overlapping the light blocking film, and a first source electrode and a first drain electrode on the first semiconductor layer. The switching transistor includes a second gate electrode on the first substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and a second source electrode and a second drain electrode on the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are at a same layer of the display device, and each includes crystalline silicon germanium.

Wafer-level device packaging

The present invention relates to a semiconductor device packaged at the wafer level such that an entire packaged device is formed prior to separation of individual devices. The semiconductor device package includes a semiconductor chip having one or more bonding pads associated with the chip and a protective layer bonded over the semiconductor chip. An insulation layer is positioned on at least side edges and a lower surface of the semiconductor chip. Interconnection/bump metallization is positioned adjacent one or more side edges of the semiconductor chip and is electrically connected to at least one bonding pad. A compact image sensor package can be formed that is vertically integrated with a digital signal processor and memory chip along with lenses and a protective cover.

Solid-state imaging device and imaging apparatus

The invention is directed to a solid-state imaging device in which pixels each including a photoelectric conversion portion formed above a semiconductor substrate and an MOS type signal reading circuit formed at the semiconductor substrate and provided for reading out a signal corresponding to electric charges generated in the photoelectric conversion portion are disposed in an array form, wherein: the photoelectric conversion portion includes a pixel electrode, a counter electrode and a photoelectric conversion layer as defined herein; a bias voltage is applied to the counter electrode as defined herein; the signal reading circuit includes a charge storage portion, an output transistor and a reset transistor as defined herein; the charge storage portion includes a first charge storage region, a second charge storage region and a separation/connection region as defined herein; and the output transistor outputs a signal corresponding to the potential of the second charge storage region.

Semiconductor device and manufacturing method thereof

A semiconductor device and a manufacturing method thereof are provided which can suppress corrosion by chemicals in processes, while preventing generation of thermal stress on a mark. A semiconductor device includes a semiconductor layer with a front-side main surface and a back-side main surface opposed to the front-side main surface, a plurality of light receiving elements formed in the semiconductor layer for performing photoelectric conversion, a light receiving lens disposed above the back-side main surface for supplying light to the light receiving element, and a mark formed inside the semiconductor layer. The mark extends from the front-side main surface to the back-side main surface. The mark has a deeply located surface recessed toward the front-side main surface rather than the back-side main surface. The deeply located surface is formed of silicon.

Systems, Methods and Devices Having Stretchable Integrated Circuitry for Sensing and Delivering Therapy

System, devices and methods are presented that integrate stretchable or flexible circuitry, including arrays of active devices for enhanced sensing, diagnostic, and therapeutic capabilities. The invention enables conformal sensing contact with tissues of interest, such as the inner wall of a lumen, a the brain, or the surface of the heart. Such direct, conformal contact increases accuracy of measurement and delivery of therapy. Further, the invention enables the incorporation of both sensing and therapeutic devices on the same substrate allowing for faster treatment of diseased tissue and fewer devices to perform the same procedure.

Lens array for partitioned image sensor having color filters

An apparatus includes an image sensor including N image sensor regions arranged thereon. N lens structures are included in a lens array disposed proximate to the image sensor. Each one of the N lens structures is arranged to focus a single image onto a respective one of the N image sensor regions. The N lens structures include a first lens structure having a red color filter, a second lens structure having a green color filter, and a third lens structure having a blue color filter. Each one of the N lens structures includes a glass wafer and a lens formed on the glass wafer. Each one of the red color filter, the green color filter, and the blue color filter is one of coated on the glass wafer underneath the lens and coated over the lens on the glass wafer.

Solid-state image pick-up device and manufacturing method thereof, image-pickup apparatus, semiconductor device and manufacturing method thereof, and semiconductor substrate

A solid-state image pick-up device is provided which includes a semiconductor substrate main body which has an element forming layer and a gettering layer provided on an upper layer thereof; photoelectric conversion elements, each of which includes a first conductive type region, provided in the element forming layer; and a dielectric film which is provided on an upper layer of the gettering layer and which induces a second conductive type region in a surface of the gettering layer.

Manufacturing method of solid-state image sensor

A single crystal silicon layer is formed on a principal surface of a first wafer by epitaxial growth. A silicon oxide layer is formed on the single crystal silicon layer. Next, a defect layer is formed inside the single crystal silicon layer by ion implantation, and then, the second wafer is bonded to the silicon oxide layer on the first wafer. After that, an SOI wafer including the silicon oxide layer formed on the second wafer and the single crystal silicon layer formed on the silicon oxide layer is formed by separating the first wafer including the single crystal silicon layer from the second wafer including the single crystal silicon layer in the defect layer. Then, a photodiode is formed in the single crystal silicon layer. An interconnect layer is formed on a surface of the single crystal silicon layer which is opposite to the silicon oxide layer.

SOLID-STATE IMAGING DEVICE AND METHOD FOR FABRICATING THE SAME

A solid-state imaging device includes: a substrate; an insulator layer formed on the substrate; a semiconductor layer formed on the insulator layer; and a silicon layer formed on the semiconductor layer. The silicon layer includes a plurality of pixels each including a photoelectric converter configured to convert light into signal charge, and a circuit configured to read the signal charge, and a refractive index of the insulator layer is lower than a refractive index of the semiconductor layer. 1. A solid-state imaging device comprising:a substrate;an insulator layer formed on the substrate;a semiconductor layer formed on the insulator layer;a silicon layer formed on the semiconductor layer, anda plurality of pixels formed in the silicon layer, the plurality of pixels each including a photoelectric converter configured to convert light into signal charge, and a circuit configured to read the signal charge, whereina refractive index of the insulator layer is lower than a refractive index of the semiconductor layer.2. The solid-state imaging device of claim 1 , whereinthe insulator layer contains any one of a silicon oxide film, a silicon nitride film, and a metal oxide film that each contain an impurity.3. The solid-state imaging device of claim 1 , whereinthe insulator layer contains a p-type impurity, and{'sup': 10', '2, 'a concentration of the p-type impurity in the insulator layer is greater than or equal to about 1×10ions/cm.'}4. The solid-state imaging device of claim 1 , whereinthe semiconductor layer is made of silicon containing an impurity, and{'sup': 17', '3, 'a concentration of the impurity in the semiconductor layer is greater than or equal to about 1×10ions/cm.'}5. The solid-state imaging device of claim 1 , whereinan SFQR of an interface between the insulator layer and the semiconductor layer, which is a local flatness of the interface, is equal to or less than about 0.1 μm.6. The solid-state imaging device of claim 1 , whereinthe silicon layer ...

IMAGE PICKUP DEVICE, IMAGE PICKUP APPARATUS, AND PRODUCTION APPARATUS AND METHOD

[Object] The present disclosure relates to an image pickup device, an image pickup apparatus, and a production apparatus and method with which protection performance of an organic film can he improved. 1. An image pickup device , comprising:a photoelectric conversion device that photoelectrically converts incident light that has entered from outside;an organic film that is formed by being laminated on a light-incident surface side of the photoelectric conversion device; andan inorganic film that is formed by being laminated on a light-incident surface and side surfaces of the organic film and seals the organic film,the side surfaces of the organic film being tilted by an angle at which a thickness of the inorganic film that is formed by being laminated on the side surfaces becomes a predetermined thickness.2. The image pickup device according to claim 1 , wherein:the inorganic film is a protection film that suppresses permeation of moisture or oxygen, or both of them; andthe side surfaces of the organic film are tilted by an angle at which the thickness of the inorganic film that is formed by being laminated on the side surfaces becomes a thickness with which a sufficient effect as the protection film can be obtained.3. The image pickup device according to claim 2 ,wherein the inorganic film is further formed by being laminated on a layer that is in contact with a surface of the organic film opposite to the light-incident surface or a layer that is formed more on the opposite side of the light-incident surface than the layer that is in contact with the surface of the organic film opposite to the light-incident surface, in a peripheral section of the organic film.4. The image pickup device according to claim 3 , further comprising ribs that are formed by being laminated on the light-incident surface of the inorganic film.5. The image pickup device according to claim 4 , further comprisinga transparent layer that is formed of glass or resin and formed by being ...

CHIP PACKAGE AND METHOD FOR FORMING THE SAME

An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a device region disposed in the semiconductor substrate; a dielectric layer disposed on the first surface of the semiconductor substrate; a conducting pad structure disposed in the dielectric layer and electrically connected to the device region, a carrier substrate disposed on the dielectric layer; and a conducting structure disposed in a bottom surface of the carrier substrate and electrically contacting with the conducting pad structure. 1. A chip package , comprising:a semiconductor substrate having a first surface and a second surface;a device region disposed in the semiconductor substrate;a dielectric layer disposed on the first surface of the semiconductor substrate;a conducting pad structure disposed in the dielectric layer and electrically connected to the device region;a carrier substrate disposed on the dielectric layer; anda conducting structure disposed on a lower surface of the carrier substrate and electrically contacting with the conducting pad structure.2. The chip package as claimed in claim 1 , further comprising an optical element disposed on the second surface of the semiconductor substrate.3. The chip package as claimed in claim 2 , wherein the optical element comprises a light filter film claim 2 , a microlens claim 2 , or combinations thereof.4. The chip package as claimed in claim 2 , further comprising a transparent substrate disposed on the second surface of the semiconductor substrate.5. The chip package as claimed in claim 4 , further comprising a spacer layer disposed between the second surface of the semiconductor substrate and the transparent substrate.6. The chip package as claimed in claim 1 , wherein the second surface of the semiconductor substrate is a substantially planar surface.7. The chip package as claimed in claim 1 , further comprising a hole located in the carrier substrate claim 1 ...

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

When a trench that penetrates a semiconductor substrate in a scribe region in a solid-state imaging element of a back side illumination type, occurrence of contamination of the solid-state imaging element caused by an etching step for foaming the trench or a dicing step for singulating a semiconductor chip is prevented. When a silicide layer that covers a surface and the like of an electrode of a transistor is formed, in order to prevent formation of the silicide layer that covers a main surface of the semiconductor substrate in the scribe region, the main surface of the semiconductor substrate is covered with an insulation film before a forming step for the silicide layer. 1. A method for manufacturing a semiconductor device that has a solid-state imaging element of a back side illumination type , comprising the steps of:(a) providing a semiconductor substrate that comprises a main surface and a back surface on the opposite side of the main surface;(b) forming an element separation region at a part of the main surface of a second region that surrounds a first region of the semiconductor substrate in plan view;(c) forming an insulation film that covers the main surface of the semiconductor substrate exposed from the element separation region in the second region;(d) after the step (c), forming a silicide layer that is in contact with the main surface of the semiconductor substrate of the first region;(e) after the step (d), forming a wiring layer over the main surface of the semiconductor substrate and joining a support substrate above the wiring layer;(f) after the step (e), exposing the insulation film by removing the semiconductor substrate of the second region; and(g) after the step (f), cutting the wiring layer and the support substrate of the second region, and thereby obtaining the solid-state imaging element that includes the semiconductor substrate of the first region.2. The method for manufacturing a semiconductor device according to claim 1 , further ...

SYSTEMS AND METHODS FOR GENERATING DEPTH MAPS USING A CAMERA ARRAYS INCORPORATING MONOCHROME AND COLOR CAMERAS

A camera array, an imaging device and/or a method for capturing image that employ a plurality of imagers fabricated on a substrate is provided. Each imager includes a plurality of pixels. The plurality of imagers include a first imager having a first imaging characteristics and a second imager having a second imaging characteristics. The images generated by the plurality of imagers are processed to obtain an enhanced image compared to images captured by the imagers. Each imager may be associated with an optical element fabricated using a wafer level optics (WLO) technology. 1. A camera array , comprising:a plurality of cameras configured to capture images of a scene;an image processor configured to process at least a subset of images captured by the plurality of cameras;wherein the plurality of cameras comprises at least two cameras having different imaging characteristics including at least one monochrome camera and at least one color camera; measure parallax within the processed images by detecting parallax-induced changes that are consistent across the images taking into account the position of the cameras that captured the images;', 'generate a depth map using the measured parallax; and', 'synthesize an image using the images captured by the at least one monochrome camera and the at least one color camera using the depth map., 'wherein the image processor is configured to2. The camera array of claim 1 , wherein the plurality of cameras comprises at least two cameras having different imaging characteristics including different fields of view.3. The camera array of claim 2 , wherein the image processor is configured to synthesize images having different levels of zoom.4. The camera array of claim 3 , further comprising:a display;wherein the image processor is configured to synthesize images that smoothly transition from one zoom level to another zoom level when displayed.5. The camera array of claim 4 , wherein the transition is from a zoom level corresponding to ...

STACKED LENS STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS

A deformation of a stacked lens is suppressed. 120-. (canceled)21. A stacked lens structure comprising:a plurality of substrates including a first substrate having a first through-hole, a second substrate having a second through-hole, and a third substrate having a third through-hole; anda plurality of lenses including a first lens disposed in the first through-hole, a second lens disposed in the second through-hole, and a third lens disposed in the third through-hole; the first substrate is bonded to the second substrate to form a first bonding surface,', 'the second substrate is bonded to the third substrate to form a second bonding surface, and', 'a first distance from a central line to the first bonding surface is different than a second distance from the central line to the second bonding surface, the central line passing through a central point of the stacked lens structure and running in a plane direction of the first to third substrates, the central point being a center of the stacked lens structure in a thickness direction of the stacked lens structure., 'wherein,'}22. The stacked lens structure according to claim 21 , wherein the first substrate is bonded to the second substrate via a first insulating layer.23. The stacked lens structure according to claim 22 , wherein the second substrate is bonded to the third substrate via a second insulating layer.24. The stacked lens structure according to claim 23 , wherein the first insulating layer and the second insulating layer include a plasma bonded portion.25. The stacked lens structure according to claim 21 , wherein an anti-reflection film is formed on at least one of the substrates of the plurality of substrates.26. The stacked lens structure according to claim 25 , wherein the anti-reflection film is formed on a surface of at least one of the lenses of the plurality of lenses.27. The stacked lens structure according to claim 25 , wherein the anti-reflection film includes a plurality of films having ...

Systems and methods for generating depth maps using a camera arrays incorporating monochrome and color cameras

A camera array, an imaging device and/or a method for capturing image that employ a plurality of imagers fabricated on a substrate is provided. Each imager includes a plurality of pixels. The plurality of imagers include a first imager having a first imaging characteristics and a second imager having a second imaging characteristics. The images generated by the plurality of imagers are processed to obtain an enhanced image compared to images captured by the imagers. Each imager may be associated with an optical element fabricated using a wafer level optics (WLO) technology.

SOLID-STATE IMAGING DEVICE AND MANUFACTURING METHOD THEREFOR

A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion. 1. A solid-state imaging device comprising: a photoelectric conversion unit including a first semiconductor region of a first conductivity type,', 'a floating diffusion region, and', 'a transfer transistor including a transferring gate electrode configured to transfer signal charge generated at the photoelectric conversion unit to the floating diffusion region;, 'a plurality of pixels, the pixel including'}a signal processing circuit for processing a signal output from the plurality of pixels;a first semiconductor substrate; anda second semiconductor substrate,whereinthe first semiconductor substrate includes a pixel region;a plurality of the photoelectric conversion units and a plurality of the floating diffusion regions are arranged in the pixel region;a first element isolation portion is provided in the pixel region, configured to electrically isolate at least a part of the plurality of the photoelectric conversion units and at least a part of the plurality of the floating diffusion regions;the second semiconductor substrate includes a circuit region;a plurality of transistors included in the signal processing circuit are arranged in the circuit region;a second element isolation portion is arranged in the circuit region, configured to electrically isolate at least a part of the plurality of transistors; andthe first element isolation ...

Radiation detecting apparatus, radiation detecting system, and manufacturing method for radiation detecting apparatus

A radiation detecting apparatus includes a scintillator, a pixel array in which a plurality of pixels that each converts visible light converted by the scintillator into electric signals is arranged in a two-dimensional array form on a first surface of a substrate, a plurality of connection terminal portions arranged on a periphery of the pixel array on the first surface of the substrate, and a conductive member to which a constant potential is supplied, wherein the conductive member, the pixel array, and the scintillator are arranged in this order from a side irradiated with radiation, and the scintillator is arranged on a first surface side, and wherein the conductive member is arranged in a region of a second surface opposite to the first surface of the substrate except for a region opposite to the plurality of connection terminal portions.

OPTICAL MODULES INCLUDING CUSTOMIZABLE SPACERS FOR FOCAL LENGTH ADJUSTMENT AND/OR REDUCTION OF TILT, AND FABRICATION OF THE OPTICAL MODULES

Optical modules are made using customizable spacers to reduce variations in the focal lengths of the optical channels, to reduce the occurrence of tilt of the optical channels, and/or prevent adhesive from migrating to active portions of an image sensor. 146-. (canceled)47. A wafer-level fabrication process for making a plurality of optical modules , the method comprising:providing a respective beam shaping system over a first surface of each of a plurality of transparent covers;providing a spacer, wherein the spacer has respective through-holes each of which is substantially aligned with a corresponding one of the beam shaping systems and corresponds to a respective optical channel, the spacer including extensions extending away from the beam shaping systems so as to provide respective alignment edges;providing material laterally surrounding the respective transparent covers;measuring at least one optical property for an optical channel corresponding to each beam shaping system;modifying a height of one or more of the extensions based on the measuring to produce a resulting structure;separating the resulting structure into a plurality of modules each of which includes at least one of the beam shaping systems, at least one of the transparent covers, a portion of the spacer including at least one of the alignment edges, and a portion of the material laterally surrounding the at least one of the transparent covers and defining at least one adhesion edge; andsubsequently bringing the alignment edge of at least one of the modules into contact with a surface of a respective image sensor, and providing adhesive to attach the adhesion edge of the module to a surface of a printed circuit board on which the image sensor is mounted.48. The method of wherein forming the spacer includes a plurality of vacuum injection steps.49. The method of wherein modifying a height of one or more of the extensions includes micromachining the one or more extensions.5052-. (canceled)53. An ...

SOLID STATE IMAGING APPARATUS AND METHOD OF PRODUCING THE SAME

There is provided a solid state imaging apparatus, including: an optical film layer on which a solid state image sensor is mounted; a multifunctional chip laminated at a periphery of the solid state image sensor in the optical film layer being electrically contacted with the optical film layer via a metal body; a sealing resin layer for sealing the periphery where the multifunctional chip is laminated on the optical film layer; and a concave structure for blocking a flow of the sealing resin in a liquid state when the sealing resin layer is formed at the periphery of the sealing resin layer. Also, a method of producing the solid state imaging apparatus is also provided. 1. A solid state imaging apparatus , comprising:an optical film layer on which a solid state image sensor is mounted;a multifunctional chip laminated at a periphery of the solid state image sensor in the optical film layer being electrically contacted with the optical film layer via a metal body;a sealing resin layer for sealing the periphery where the multifunctional chip is laminated on the optical film layer; anda concave structure for blocking a flow of the sealing resin in a liquid state when the sealing resin layer is formed at the periphery of the sealing resin layer.2. The solid state imaging apparatus according to claim 1 , whereinthe concave structure for blocking a flow is a scoop portion configured by scooping a surface surrounding the multifunctional chip.3. The solid state imaging apparatus according to claim 2 , whereinthe concave structure for blocking a flow is configured by multiply surrounding the multifunctional chip.4. The solid state imaging apparatus according to claim 2 , whereinthe concave structure for blocking a flow is formed by scooping only the optical film layer by dry etching in a wafer production step.5. The solid state imaging apparatus according to claim 2 , whereinan inner wall of the concave structure for blocking a flow is scooped surrounding the periphery of the ...

Sensor and method for fabricating the same

A sensor and its fabrication method are provided. The sensor comprises: a base substrate, a group of gate lines and a group of data lines arranged as crossing each other, and a plurality of sensing elements arranged in an array and defined by the group of gate lines and the group of data lines, each sensing element comprising a Thin Film Transistor (TFT) device and a photodiode sensing device, wherein the photodiode sensor device comprises: a bias line disposed on the base substrate; a transparent electrode disposed on the bias line and being electrically contacted with the bias line; a photodiode disposed on the transparent electrode; and a receiving electrode disposed on the photodiode; the TFT device is located above the photodiode. When the sensor is functioning, light is directly transmitted onto the photodiode sensor device through the base substrate. In comparison with conventional technologies, the light loss is largely reduced and the light absorption usage ratio is improved.

PHOTOELECTRIC CONVERSION DEVICE

A photoelectric conversion device includes an element surrounding an active region including first and second areas verging each other at a virtual line, a charge accumulation region arranged in the first area, a floating diffusion region arranged across the first and second areas, a transfer gate electrode, and a first semiconductor region including a portion arranged between the charge accumulation region and the element isolation so as to surround at least part of the charge accumulation region, and a portion arranged in the second area. A width of the second area in a direction parallel to the virtual line is smaller than a width of the first area in the direction. 1. A photoelectric conversion device comprising:an element isolation arranged to surround an active region including a first area and a second area which verge each other at a virtual line;a charge accumulation region of a first conductivity type arranged in the first area;a floating diffusion region of the first conductivity type arranged across the first area and the second area;a gate electrode configured to form a channel for transferring charges accumulated in the charge accumulation region to the floating diffusion region; anda first semiconductor region including a portion arranged between the charge accumulation region and the element isolation, so as to surround at least part of the charge accumulation region, and including a portion arranged in the second area, the first semiconductor region having a second conductivity type different from the first conductivity type,wherein a width of the second area in a direction parallel to the virtual line is smaller than a width of the first area in the direction,a boundary line defining an outer edge of the second area includes a first boundary line having a first point on the virtual line as one end and a second point which is not on the virtual line as the other end and a second boundary line having a third point on the virtual line as one end and a ...

Methods and Apparatus for Sensor Module

Methods and apparatus for integrating a CMOS image sensor and an image signal processor (ISP) together using an interposer to form a system in package device module are disclosed. The device module may comprise an interposer with a substrate. An interposer contact is formed within the substrate. A sensor device may be bonded to a surface of the interposer, wherein a sensor contact is bonded to a first end of the interposer contact. An ISP may be connected to the interposer, by bonding an ISP contact in the ISP to a second end of the interposer contact. An underfill layer may fill a gap between the interposer and the ISP. A printed circuit board (PCB) may further be connected to the interposer by way of a solder ball connected to another interposer contact. A thermal interface material may be in contact with the ISP and the PCB. 1. A device , comprising:an image sensor device having a first surface and a second surface opposite the first surface;an interposer having a first surface and a second surface opposite the first surface, the first surface of the interposer bonded to the first surface of the image sensor device;one or more conductive vias extending through the interposer; andan image signal processor (ISP) bonded to the second surface of the interposer, the one or more conductive vias electrically connecting the image sensor device to the ISP.2. The device of claim 1 , further comprising a color filter layer disposed over the second surface of the image sensor device.3. The device of claim 1 , wherein the first surface and the second surface of the image sensor device comprise a frontside and a backside of the image sensor device claim 1 , respectively.4. The device of claim 1 , further comprising an underfill disposed between the ISP and the interposer.5. The device of claim 4 , wherein the ISP comprises contacts extending through the underfill and contacting the one or more conductive vias.6. The device of claim 1 , wherein the interposer comprises a first ...

SOLID-STATE IMAGE PICKUP APPARATUS AND IMAGE PICKUP SYSTEM

An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer. 1wherein the second substrate is provided with a high-melting-metal compound layer, andwherein the first substrate is not provided with a high-melting-metal compound layer.. An apparatus in which a first substrate and a second substrate are placed upon each other, the first substrate being where a photoelectric conversion element and a gate electrode of a transfer transistor for transferring an electric charge from the photoelectric conversion element are disposed, the second substrate being where a peripheral circuit portion for reading out a signal based on the electric charge generated at the photoelectric conversion element is disposed, This application is a Continuation of U.S. application Ser. No. 13/898,264, filed May 20, 2013, which is a Continuation of U.S. application Ser. No. 12/975,088, filed Dec. 21, 2010, now becomes U.S. Pat. No. 8,466,403 issued Jun. 18, 2013, which claims priority from International Application No. PCT/JP2009/071703, filed Dec. 26, 2009, which are hereby incorporated by reference herein in their entireties.The present invention relates to a backside-illumination solid-state image pickup apparatus.Recent higher-speed solid-state image pickup apparatuses have caused the proposal of a structure in which a semiconductor compound layer is provided at a transistor.Japanese Patent Laid-Open No. 2001-111022 discusses a solid-state image pickup apparatus in which a high-melting-metal semiconductor compound layer is not provided on a photodetector of a photoelectric converting section, and a high-melting-metal semiconductor compound layer is provided at a ...

ARRAY SUBSTRATE OF X-RAY SENSOR AND METHOD FOR MANUFACTURING THE SAME

An array substrate of an X-ray sensor and a method for manufacturing the same are provided, the method comprising a step of forming a thin-film transistor element and a photodiode sensor element, wherein the step of forming the thin-film transistor element comprises: forming a gate electrode () on an base substrate () by a mask process; depositing a gate insulating layer () on the base substrate () on which the gate electrode () is formed; the step of forming the photodiode sensor element comprises: forming an ohmic contact layer () on the base substrate () through the same mask process while forming the gate electrode (); forming a semiconductor layer () and a transparent electrode () through a mask process on the substrate () on which the ohmic contact layer () is formed; depositing the gate insulating layer on the base substrate on which the semiconductor layer () and the transparent electrode () are formed while depositing the gate insulating layer () on the base substrate () on which the gate electrode () is formed. A gate pattern and an ohmic contact layer are formed through the same mask process, and a passivation layer substitutes a channel blocking layer to reduce the number of the mask processes and simplify the manufacturing process and improve throughput and yield of the product. 1. A method for manufacturing an array substrate of an X-ray sensor , comprising a step of forming a thin-film transistor element and a step of forming a photodiode sensor element , wherein the step of forming the thin-film transistor element comprises:forming a gate electrode on an base substrate by a mask process;depositing a gate insulating layer on the base substrate on which the gate electrode is formed;the step of forming the photodiode sensor element comprises:forming an ohmic contact layer on the base substrate through a same mask process with the gate electrode while forming the gate electrode;forming a semiconductor layer and a transparent electrode through a mask ...

GERMANIUM-SILICON LIGHT SENSING APPARATUS

An image sensor array including a carrier substrate; a first group of photodiodes coupled to the carrier substrate, where the first group of photodiodes include a first photodiode, and where the first photodiode includes a semiconductor layer configured to absorb photons at visible wavelengths and to generate photo-carriers from the absorbed photons; and a second group of photodiodes coupled to the carrier substrate, where the second group of photodiodes include a second photodiode, and where the second photodiode includes a germanium-silicon region fabricated on the semiconductor layer, the germanium-silicon region configured to absorb photons at infrared or near-infrared wavelengths and to generate photo-carriers from the absorbed photons. 1. An image sensor array comprising:a carrier substrate;a first group of photodiodes coupled to the carrier substrate, wherein the first group of photodiodes comprise a first photodiode, and wherein the first photodiode comprises a semiconductor layer configured to absorb photons at visible wavelengths and to generate photo-carriers from the absorbed photons; anda second group of photodiodes coupled to the carrier substrate, wherein the second group of photodiodes comprise a second photodiode, and wherein the second photodiode comprises a germanium-silicon region fabricated on the semiconductor layer, the germanium-silicon region configured to absorb photons at infrared or near-infrared wavelengths and to generate photo-carriers from the absorbed photons.2. The image sensor array of claim 1 , wherein the first group of photodiodes and the second group of photodiodes are arranged in a two-dimensional array.3. The image sensor array of claim 1 , wherein each photodiode of the first group of photodiodes and the second group of photodiodes includes a respective wavelength filter configured to transmit a portion of received light and a respective lens element configured to focus the received light.4. The image sensor array of claim 1 ...

GERMANIUM-SILICON LIGHT SENSING APPARATUS

A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including forming a germanium-silicon layer for the second group of photodiodes on a first semiconductor donor wafer; defining a first interconnect layer on the germanium-silicon layer; defining integrated circuitry for controlling pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer; bonding the first interconnect layer with the second interconnect layer; defining the pixels of an image sensor array on a second semiconductor donor wafer; defining a third interconnect layer on the image sensor array; and bonding the third interconnect layer with the germanium-silicon layer. 1. A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths , the method comprising:forming a germanium-silicon layer for the second group of photodiodes on a first semiconductor donor wafer;defining a first interconnect layer on the germanium-silicon layer, wherein the interconnect layer includes a plurality of interconnects coupled to the first group of photodiodes and the second group of photodiodes;defining integrated circuitry for controlling pixels of the image sensor array on a semiconductor carrier wafer;after defining the integrated circuitry, defining a second interconnect layer on the semiconductor carrier wafer, wherein the second interconnect layer includes a plurality of interconnects coupled to the integrated circuitry;bonding the first interconnect layer with the second interconnect layer;defining the pixels of an image sensor array on a second semiconductor donor wafer;after defining the pixels of the image sensor ...

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS

A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips. 1. An image sensor comprising:a first semiconductor section including a first semiconductor substrate and a first multi-wiring layer, the first semiconductor substrate including a photodiode, and the first multi-wiring layer including a first insulating interlayer and first and second wirings; anda second semiconductor section including a second semiconductor substrate and a second multi-wiring layer, the second semiconductor section including at least a part of a signal processing circuit, and the second multi-wiring layer including a second insulating interlayer and third and fourth wirings, the first semiconductor section and the second semiconductor section are bonded together such that the first multi-wiring layer and the second multi-wiring layer face each other,', 'the first wiring of the first multi-wiring layer directly contacts the third wiring of the second multi-wiring layer in a pixel region including the photodiode, and', 'the second wiring of the first multi-wiring layer directly contacts the fourth wiring of the second multi-wiring layer in a peripheral region other than the pixel region., 'wherein,'}2. The image sensor according to claim 1 , wherein a part of the first insulating interlayer and a part of the second insulating interlayer are connected with each other.3. The image sensor according to claim 1 , further comprising a light-shielding layer ...

DELAMINATION-RESISTANT SEMICONDUCTOR DEVICE AND ASSOCIATED METHOD

A delamination-resistant semiconductor device includes a conductive layer, a semiconductor layer, and a spacer. The conductive layer has a first side opposite a second side. The semiconductor layer is on the first side and defines an aperture therethrough spanned by the conductive layer. The spacer is on the second side and has a top surface, proximate the conductive layer, that defines a blind hole spanned by the conductive layer. A method for preventing delamination of a multilayer structure, includes a step of disposing a first layer on a substrate such that the first layer spans an aperture of the substrate. The method also includes a step of disposing a second layer on the first layer. The second layer has a blind hole adjacent to the first layer such that the first layer spans the blind hole. 1. A delamination-resistant semiconductor device comprising:a conductive layer having a first side opposite a second side;a semiconductor layer on the first side and defining an aperture therethrough spanned by the conductive layer; anda spacer on the second side and having a top surface proximate the conductive layer that defines a blind hole spanned by the conductive layer.2. The delamination-resistant semiconductor device of claim 1 , further comprising a redistribution layer on a surface of the semiconductor layer within the aperture and electrically connected to the conductive layer.3. The delamination-resistant semiconductor device of claim 2 , further comprising a dielectric layer at least partially filling the aperture claim 2 , a region of the redistribution layer being between the semiconductor layer and the dielectric layer.4. The delamination-resistant semiconductor device of claim 1 , further comprising a dielectric layer at least partially filling the aperture.5. The delamination-resistant semiconductor device of claim 1 , the conductive layer including a stack of conductive layers interspersed with dielectric layers.6. The delamination-resistant ...

Semiconductor device, manufacturing method, and electronic apparatus

A method of manufacturing a semiconductor device includes: forming, on a cover glass, a film having a predetermined specific gravity and configured to shield an alpha ray that arises from the cover glass; and bonding the cover glass on which the film is formed and an image pickup device, by filling a transparent resin between the cover glass and the image pickup device.

Elevated Photodiode with a Stacked Scheme

A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.

SOLID-STATE IMAGING ELEMENT, PRODUCTION METHOD THEREOF, AND ELECTRONIC DEVICE

A solid-state imaging element including a phase difference detection pixel pair that includes first and second phase difference detection pixels is provided. In particular, each phase difference detection pixel of the first and second phase difference detection pixels includes a first photoelectric conversion unit arranged at an upper side of a semiconductor substrate and a second photoelectric conversion unit arranged within the semiconductor substrate. The first photoelectric conversion film may be an organic film. In addition, phase difference detection pixels may be realized without using a light shielding film. 130-. (canceled)31. An imaging device comprising:a semiconductor substrate having a first photoelectric conversion unit and a second photoelectric conversion unit;an upper electrode disposed above the semiconductor substrate;a lower electrode disposed above the semiconductor substrate;a photoelectric conversion film disposed between the upper electrode and the lower electrode; the second photoelectric conversion unit is disposed below the first photoelectric conversion unit,', 'the lower electrode has a first portion and a second portion in a cross-sectional view, and', 'both the first and the second portions of the lower electrode overlap at least a portion of the first photoelectric conversion unit in a plan view., 'wherein,'}32. The imaging device according to claim 31 , wherein the first photoelectric conversion unit claim 31 , the second photoelectric conversion unit claim 31 , a part of the photoelectric conversion film claim 31 , and the first and second portions of the lower electrode are part of a first pixel in a plurality of pixels.33. The imaging device according to claim 32 , wherein the first pixel is a phase difference detection pixel.34. The imaging device according to claim 33 , wherein the plurality of the pixels includes pairs of phase difference detection pixels.35. The imaging device according to claim 34 , wherein a charge converted ...

Wafer level sequencing flow cell fabrication

A method for forming sequencing flow cells can include providing a semiconductor wafer covered with a dielectric layer, and forming a patterned layer on the dielectric layer. The patterned layer has a differential surface that includes alternating first surface regions and second surface regions. The method can also include attaching a cover wafer to the semiconductor wafer to form a composite wafer structure including a plurality of flow cells. The composite wafer structure can then be singulated to form a plurality of dies. Each die forms a sequencing flow cell. The sequencing flow cell can include a flow channel between a portion of the patterned layer and a portion of the cover wafer, an inlet, and an outlet. Further, the method can include functionalizing the sequencing flow cell to create differential surfaces.

SEMICONDUCTOR APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD OF DESIGNING SEMICONDUCTOR APPARATUS, AND ELECTRONIC APPARATUS

A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via. 1. A semiconductor device comprising:a first material layer adjacent to a second material layer;a first via passing through the first material layer and extending into the second material layer; anda second via extending into the first material layer, 'along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via.', 'wherein,'}2. The semiconductor device of including:a first insulating layer in the first material layer;a second insulating layer in the second material layer, 'the first via extends into the second insulating layer in the second material layer, and', 'wherein,'}the second via extends into the first insulating layer in the first material layer.3. The semiconductor device of wherein the first via and the second via are filled with a conductive material.4. The semiconductor device of wherein the first via reaches a second interconnect in the second insulating layer in the second material layer.5. The semiconductor device of wherein the second via reaches a first interconnect in the first insulating layer in the first material layer.6. The semiconductor device of including an on chip lens over the photodiode of the first material layer.7. The semiconductor device of including an on chip color filter between the photodiode and the on chip lens.8. The semiconductor device of wherein the first via has a diameter 1.5 to 10 times a diameter of the second via along a common cross section parallel to an interface between the two material layers.9. The semiconductor ...

Semiconductor device for detection of radiation and method of producing a semiconductor device for detection of radiation

The semiconductor device for detection of radiation comprises a semiconductor substrate ( 1 ) with a main surface ( 11 ), a dielectric layer ( 6 ) comprising at least one compound of a semiconductor material, an integrated circuit ( 2 ) including at least one component sensitive to radiation ( 3 ), a wiring ( 4 ) of the integrated circuit embedded in an intermetal layer ( 8 ) of the dielectric layer ( 6 ), an electrically conductive through-substrate via ( 5 ) contacting the wiring, and an optical filter element ( 7 ) arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer ( 9 ) at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer ( 8 ), and the wiring is arranged between the main surface and the passivation layer.

METHOD FOR MANUFACTURING DEEP TRENCH ISOLATION GRID STRUCTURE

The present disclosure provides a CMOS image sensor and a pixel structure thereof, and a method for manufacturing a deep trench isolation grid structure in the pixel structure. The method for manufacturing the deep trench isolation grid structure comprises: depositing a first isolation layer and a second isolation layer sequentially on the side walls and bottom surface of each deep trench; and depositing a third isolation layer that fills each deep trench on the upper surface of the second isolation layer, so that the first isolation layer, the second isolation layer and the third isolation layer in the plurality of deep trenches constitute the grid. The deep trench isolation grid structure formed by the method can effectively reduce electrical crosstalk between adjacent grid lines, thereby improving the device performance of the CMOS image sensor which is built upon the deep trench isolation grid structure and the pixel structure thereof. 1. A method for manufacturing a deep trench isolation grid structure , comprising:providing a stack layer, wherein a top of the stack layer is a silicon epitaxial layer;forming a plurality of deep trenches in a grid shape in the silicon epitaxial layer;depositing a first isolation layer and a second isolation layer sequentially on side walls and a bottom surface of each of the plurality of deep trenches; andfilling each of the plurality of deep trenches by depositing a third isolation layer on an upper surface of the second isolation layer, wherein the first isolation layer, the second isolation layer and the third isolation layer together constitute the grid.2. The method according to claim 1 , wherein the first isolation layer is deposited on an upper surface of the silicon epitaxial layer and the second isolation layer is deposited on the first isolation layer; anddepositing the third isolation layer further comprises:wherein the method further comprises:depositing a third isolation material layer that fills each of the ...

Visible and infrared image sensor

A method of image sensor fabrication includes forming a second semiconductor layer on a back side of a first semiconductor layer. The method also includes forming one or more groups of pixels disposed in a front side of the first semiconductor layer. The one or more groups of pixels include a first portion of pixels separated from the second semiconductor layer by a spacer region, and a second portion of pixels, where a first doped region of the second portion of pixels is in contact with the second semiconductor layer. Pinning wells are also formed and separate individual pixels in the one or more groups of pixels, and the pinning wells extend through the first semiconductor layer. Deep pinning wells are also formed and separate the one or more groups of pixels.

SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS

Imaging devices and electronic apparatuses incorporating imaging devices are provided. An imaging device as disclosed can include a first pixel of a first pixel and a second pixel of a second pixel. The first and second pixels each have a first electrode, a portion of a photoelectric conversion film, and a portion of a second electrode, where the photoelectric conversion film is between the first electrode and the second electrode. The first electrode of the first pixel has a first area, while the first electrode of the second pixel has a second area that is smaller than the first area. The first pixel can include a light shielding film. Alternatively or in addition, the first pixel can be divided into first and second portions. 2. The imaging device of claim 1 , further comprising:a light shielding film, wherein the light shielding film is adjacent at least a portion of the first electrode of the first pixel.3. The imaging device of claim 2 , further comprising:an interlayer insulating film, wherein at least a portion of the interlayer insulating film is between the light shielding film and the first electrode of the first pixel.4. The imaging device of claim 1 , further comprising:a first charge accumulation unit, wherein the first electrode of the first pixel is connected to the first charge accumulation unit;a second charge accumulation unit, wherein the first electrode of the second pixel is connected to the second charge accumulation unit.5. The imaging device of claim 4 , wherein the first electrode of the first pixel and the first electrode of the second pixel are lower electrodes claim 4 , and wherein the first portion of the second electrode of the first pixel and the second portion of the second electrode of the second pixel are upper electrodes.6. The imaging device of claim 1 , wherein the first electrode of the first pixel is divided into a first portion and a second portion claim 1 , wherein the first portion of the first electrode is separated from ...

SOLID-STATE IMAGING DEVICE AND MANUFACTURING METHOD THEREFOR

A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion. 1. An imaging device comprising:a first semiconductor substrate;a second semiconductor substrate provided on a first side of the first semiconductor substrate and electrically connected to the first semiconductor substrate;a plurality of photoelectric conversion units each including a semiconductor region of a first conductivity type which is provided in the first semiconductor substrate;a plurality of optical portions provided on a second side of the first semiconductor substrate, the second side being opposite to the first side of the first semiconductor substrate;a floating diffusion region of the first conductivity type which is provided in the first semiconductor substrate and is connected to a contact plug provided on the first side of the first semiconductor substrate;a plurality of transfer gates provided on the first side of the first semiconductor substrate;an isolation portion provided in the first semiconductor substrate; anda plurality of transistors provided in the second semiconductor substrate,whereinthe plurality of the photoelectric conversion units at least include first through fourth photoelectric conversion units,the first photoelectric conversion units and the second photoelectric conversion unit are arranged on a first line along a first direction,the third photoelectric conversion unit and the fourth photoelectric ...

SEMICONDUCTOR IMAGE SENSOR MODULE AND METHOD OF MANUFACTURING THE SAME

A CMOS type semiconductor image sensor module wherein a pixel aperture ratio is improved, chip use efficiency is improved and furthermore, simultaneous shutter operation by all the pixels is made possible, and a method for manufacturing such semiconductor image sensor module are provided. The semiconductor image sensor module is provided by stacking a first semiconductor chip, which has an image sensor wherein a plurality of pixels composed of a photoelectric conversion element and a transistor are arranged, and a second semiconductor chip, which has an A/D converter array. Preferably, the semiconductor image sensor module is provided by stacking a third semiconductor chip having a memory element array. Furthermore, the semiconductor image sensor module is provided by stacking the first semiconductor chip having the image sensor and a fourth semiconductor chip having an analog nonvolatile memory array. 1. (canceled)2. A light detecting device , comprising:a first region including a plurality of photodiodes;a second region including a plurality of pixel transistors and a first pad; anda third region including a plurality of analog to digital converters and a second pad, whereinthe first pad and the second pad are bonded to one another,a first photodiode of the plurality of photodiodes and a first analog to digital converter of the plurality of analog to digital converters are electrically connected to one another through the first pad and the second pad, andthe first region, the second region, and the third region are stacked and electrically connected to one another.3. The light detecting device according to claim 2 , wherein a first side of the first region is a light incident side claim 2 , and a second side of the first region opposite the first side is connected to a first side of the second region.4. The light detecting device according to claim 3 , wherein the second side of the first region is bonded to the first side of the second region with an adhesive ...

Semiconductor Image Sensor Device Having Back Side Illuminated Image Sensors with Embedded Color Filters

Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed. 1. A method comprising:forming pixel regions within a substrate, the substrate having a first side and a second side opposite the first side;forming light-blocking structures over the second side of the substrate, wherein the light-blocking structures define an opening extending through the light-blocking structures, the opening being aligned with one of the pixel regions;forming a passivation layer within the opening; andforming a color filter within the opening.2. The method of claim 1 , wherein forming the passivation layer within the opening includes forming the passivation layer over a top surface of at least one of the light-blocking structures claim 1 , the top surface facing away from the substrate.3. The method of claim 2 , wherein the top surface of the at least one of the light-blocking structures remain covered by the passivation layer after forming the color filter within the opening.4. The method of claim 1 , wherein the passivation layer defines a recess within the opening claim 1 , andwherein forming the color filter within the opening includes forming the color filter within the recess defined by the passivation layer.5. The method of claim 1 , further comprising forming an antireflective coating layer over the second side of the substrate prior to forming the light-blocking structures over the second side of the substrate.6. The method of claim 1 , further comprising:forming an interconnect structure over the first ...

INTERCONNECTS FOR FOCAL PLANE ARRAY INTEGRATED CIRCUITS

A focal plane array assembly includes a readout integrated circuit with a contact array surface, a photodiode array with a contact array surface facing the readout integrated circuit contact array surface, and an anisotropic conductive film disposed between contact array surfaces. The anisotropic conductive film includes conductive bodies that interconnect the photodiode array with the readout integrated circuit and an adhesive that couples the photodiode array to the readout integrated circuit. 1. A focal plane array assembly , comprising:a readout integrated circuit (ROIC) having a contact array surface;a photodiode array (PDA) having a contact array surface facing the ROIC contact array surface;an anisotropic conductive film (ACF) disposed between the PDA contact array surface and the ROIC contact array surface, wherein the ACF includes conductive bodies that interconnect the PDA with the ROIC and adhesive that mechanically couples the PDA to the ROIC.2. A focal plane array assembly as recited in claim 1 , wherein the film encapsulates the interconnects extending between the PDA and the ROIC.3. A focal plane array assembly as recited in claim 1 , wherein a topside of the PDA opposite the PDA contact array surface includes pixel circuitry.4. A focal plane array assembly as recited in claim 1 , wherein a topside of the PDA opposite the PDA contact array surface is free from wire bond connections.5. A focal plane array assembly as recited in claim 1 , further including a window facing the PDA contact array surface.6. A focal plane array assembly as recited in claim 5 , wherein the window directly abuts the PDA contact array surface.7. A focal plane array assembly as recited in claim 5 , wherein the window is separated from the PDA contact array surface by a gap.8. A package assembly claim 5 , comprising:a printed circuit board (PCB) defining an aperture; a readout integrated circuit (ROIC) spanning the aperture and having a contact array surface;', 'a photodiode ...

Method for manufacturing x-ray flat panel detector and x-ray flat panel detector tft array substrate

A common interconnect ring is provided at a periphery of a portion used to form a TFT array of an X-ray flat panel detector, and an X-ray flat panel detector TFT array substrate connected to signal lines and scanning lines via pairs of two protection diodes connected in parallel and having mutually-reverse polarities is manufactured. When inspecting the X-ray flat panel detector TFT array substrate, the same reference bias voltage as the amplifier of a detection circuit is applied from an external voltage application pad provided at the vicinity of a connection unit for the common interconnect ring and the protection diodes on the same side of the signal lines, a signal is provided to a scanning line connection pad to switch the thin film transistor ON, and an electrical signal flowing through the signal line is read from a signal line connection pad.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD, AND ELECTRONIC APPLIANCE

There is provided a semiconductor device including: a plurality of bumps () on a first semiconductor substrate (); and a lens material () in a region other than the plurality of bumps on the first semiconductor substrate, wherein a distance between a side of a bump closest to the lens material and a side of the lens material closest to the bump is greater than twice a diameter of the bump closest to the lens material, and wherein the distance between the side of the bump closest to the lens material and the side of the lens material closest to the bump is greater a minimum pitch of the bumps. 1. A semiconductor device comprising:a plurality of bumps on a first semiconductor substrate; anda lens material in a region other than the plurality of bumps on the first semiconductor substrate, wherein a distance between a side of a bump closest to the lens material and a side of the lens material closest to the bump is greater than twice a diameter of the bump closest to the lens material, and wherein the distance between the side of the bump closest to the lens material and the side of the lens material closest to the bump is greater a minimum pitch of the bumps.2. The semiconductor device according to claim 1 , wherein the lens material is formed only in a pixel region on the first semiconductor substrate.3. The semiconductor device according to claim 1 , wherein the lens material is formed only in the region other than a region on the first semiconductor substrate that corresponds to a second semiconductor substrate configured to be bonded to the first semiconductor substrate via the bump.4. The semiconductor device according to claim 3 , wherein the lens material is formed to have an opening in a region on the first semiconductor substrate claim 3 , the opening being larger than the second semiconductor substrate.5. The semiconductor device according to claim 4 , further comprising:an under-fill resin formed between the second semiconductor substrate and the first ...

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS

A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer. 1. A method of manufacturing a semiconductor device comprising:laminating a first semiconductor wafer including a first substrate and a first insulating layer which is formed so as to come into contact with one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer which is formed so as to come into contact with one surface of the second substrate and bonding the first semiconductor wafer and the second semiconductor wafer to each other;forming a third insulating layer on the other surface of a side opposite to the one surface of the first substrate;penetrating the third insulating layer, the first substrate, and the first insulating layer, performing etching so as that the second insulating layer remains on a second wiring layer which is formed in the second insulating layer, and forming a first connection hole;forming an insulating film on the first connection hole;performing etching of the second insulating layer on the second wiring layer and the insulating film, forming a second ...

PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF

A package structure including a first die, a second die, an encapsulant, a dam structure, a light-transmitting sheet, a conductive connector, a circuit layer, and a conductive terminal is provided. The first die includes a first active surface. The first active surface has a sensing area. The second die is arranged such that a second back surface thereof faces the first die. The encapsulant covers the second die. The encapsulant has a first encapsulating surface and a second encapsulating surface. The dam structure is located on the first encapsulating surface and exposes the sensing area. The light-transmitting sheet is located on the dam structure. The conductive connector penetrates the encapsulant. The circuit layer is located on the second encapsulating surface. The first die is electrically connected to the second die through the conductive connector and the circuit layer. The conductive terminal is disposed on the circuit layer. 1. A package structure , comprising:a first die, comprising a first active surface and a first back surface opposite to the first active surface, wherein the first active surface has a sensing area;a second die, comprising a second active surface and a second back surface opposite to the second active surface, wherein the second die is arranged such that the second back surface faces the first back surface of the first die;an encapsulant, covering the second die and having a first encapsulating surface and a second encapsulating surface opposite to the first encapsulating surface;a dam structure, located on the first encapsulating surface and exposing the sensing area of the first die;a light-transmitting sheet, located on the dam structure;a conductive connector, penetrating the encapsulant;a first circuit layer, located on the second encapsulating surface, wherein the first die is electrically connected to the second die through the conductive connector and the first circuit layer; anda conductive terminal, disposed on the first ...

BAND-PASS FILTER FOR STACKED SENSOR

In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes an image sensor disposed within a first substrate. A first band-pass filter and a second band-pass filter are disposed on the first substrate. A dielectric structure is disposed on the first substrate. The dielectric structure is laterally between the first band-pass filter and the second band-pass filter and laterally abuts the first band-pass filter and the second band-pass filter. 1. An integrated chip structure , comprising:an image sensor disposed within a first substrate;a first band-pass filter disposed on the first substrate;a second band-pass filter disposed on the first substrate; anda dielectric structure disposed on the first substrate, wherein the dielectric structure is laterally between the first band-pass filter and the second band-pass filter and laterally abuts the first band-pass filter and the second band-pass filter.2. The integrated chip structure of claim 1 , wherein the first band-pass filter and the second band-pass filter have heights that are substantially equal to a height of the dielectric structure.3. The integrated chip structure of claim 1 , wherein the first band-pass filter comprises a plurality of different layers laterally contacting one another along vertically extending interfaces.4. The integrated chip structure of claim 1 , wherein the first band-pass filter comprises a plurality of different layers having bottommost surfaces that are substantially co-planar with a bottommost surface of the dielectric structure.5. The integrated chip structure of claim 1 , wherein a bottommost surface of the dielectric structure contacts the image sensor.6. The integrated chip structure of claim 1 , wherein the dielectric structure comprises silicon dioxide.7. An integrated chip structure claim 1 , comprising:an image sensor comprising a first substrate having a plurality of pixels;a plurality of band-pass filter layers ...

METHOD OF PRODUCING SEMICONDUCTOR EPITAXIAL WAFER, SEMICONDUCTOR EPITAXIAL WAFER, AND METHOD OF PRODUCING SOLID-STATE IMAGE SENSOR

A production method for a semiconductor epitaxial wafer includes: irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, in which the modified layer includes a constituent element of the cluster ions in solid solution. The production method further includes forming an epitaxial layer on the modified layer of the semiconductor wafer. The irradiating is performed such that a portion of the modified layer in a thickness direction becomes an amorphous layer and an average depth of an amorphous layer surface from a semiconductor wafer surface-side of the amorphous layer is at least 20 nm from the surface of the semiconductor wafer. 1. A method of producing a semiconductor epitaxial wafer , comprising:irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, the modified layer including a constituent element of the cluster ions in solid solution; andforming an epitaxial layer on the modified layer of the semiconductor wafer, a portion of the modified layer in a thickness direction becomes an amorphous layer, the amorphous layer having a first surface and a second surface disposed on a side opposite of the first surface, the first surface being closer to the surface of the semiconductor wafer than the second surface, and', 'an average depth of the first surface of the amorphous layer from the surface of the semiconductor wafer is at least 20 nm., 'wherein the irradiating is performed such that'}2. The method of producing the semiconductor epitaxial wafer of claim 1 , wherein the irradiating is performed such that the average depth is at least 20 nm and no greater than 200 nm from the surface of the semiconductor wafer.3. The method of producing the semiconductor epitaxial wafer of claim 1 , wherein the irradiating is performed such that an average thickness of the amorphous layer is no greater than 100 nm.4. ...

Method for manufacturing an opto-microelectronic device

Method for manufacturing a microelectronic device from a first substrate ( 10 ), including the production of at least one electronic component in the semi-conductor substrate after transferring the first substrate ( 10 ) onto a second substrate ( 20 ), characterized in that it comprises: a first phase carried out prior to the transfer, and including forming at least one pattern made of a sacrificial material in a layer of the first substrate ( 10 ), a second phase carried out after the transfer and including the substitution of the electronic component for the pattern.

Wafer Structure, Method For Manufacturing The Same, And Chip Structure

A wafer structure, a method for manufacturing the wafer structure, and a chip structure. A front surface of a first chip provided with a photosensitive array is bonded to a front surface of a second chip provided with a logic device. An electrical-connection through-hole is provided on a back surface of the first chip at a pad region. The electrical-connection through-hole runs from the back surface of the first chip, via a top wiring layer in the first chip, to a top wiring layer in the second chip. A pad is provided on the electrical-connection through-hole. Hence, integration of a photosensitive device of a stacked type is achieved. There are advantages of a high integration degree and a simple structure. Transmission efficiency of a device is effectively improved, and complexity of a manufacturing process is reduced. 1. A chip structure , comprising: a front surface of the first chip faces a front surface of the second chip;', 'a bonding layer is provided between the front surface of the first chip and the front surface of the second chip;', 'the first chip comprises a photosensitive array region, a peripheral circuit region and a pad region;', 'a first interconnection layer is formed on the front surface of the first chip at the pad region and the peripheral circuit region;', 'the second chip comprises a logic device, and a second interconnection layer connected with the logic device;, 'a first chip and a second chip that are stacked, whereina first insulating layer, covering a back surface of the first chip at the pad region;a first electrical-connection through-hole located at the pad region, running from the first insulating layer, via a top wiring layer in the first interconnection layer at the pad region, to a top wiring layer in the second interconnection layer; anda pad located on the first electrical-connection through-hole.2. The chip structure according to claim 1 , further comprising:a second insulating layer, covering the back surface of the first ...

WAFER-LEVEL PROCESS FOR CURVING A SET OF ELECTRONIC CHIPS

A wafer-level process includes providing a set of electronic chips, including a stack with a set of matrix arrays of pixels, an interconnect layer electrically connected to the set of matrix arrays of pixels, and a first layer, including vias electrically connected to the interconnect layer. The wafer-level process further includes forming metal pillars on the first layer, the pillars being electrically connected to the vias, and forming a material integrally with the first layer, around the metal pillars. The wafer-level process also includes dicing the electronic chips so as to release the thermomechanical stresses to which the stack is subjected. Finally, the wafer-level process includes making the metal pillars coplanar after dicing the electronic chips. 1. A wafer-level process for curving a set of electronic chips , comprising: a set of matrix arrays of pixels,', 'an interconnect layer electrically connected to the set of matrix arrays of pixels,', 'a first layer, comprising vias electrically connected to the interconnect layer;, 'providing the set of electronic chips, comprising a stack includingthe stack possessing a first thickness and a first coefficient of thermal expansion;forming metal pillars on the first layer, said pillars being electrically connected to the vias;forming a material integrally with the first layer, around the metal pillars; the material possessing a second thickness, a second coefficient of thermal expansion strictly higher than the first coefficient of thermal expansion, and a forming temperature;dicing the electronic chips so as to release the thermomechanical stresses to which the stack is subjected; the forming temperature, the ratio between the first and second coefficients of thermal expansion and the ratio between the first and second thicknesses being chosen so that, at the end of the dicing the electronic chips, the stack is curved with a predefined convex shape that is oriented towards the set of matrix arrays of pixels, at ...

SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING SAME, AND ELECTRONIC DEVICE

The present disclosure relates to a solid-state imaging device, a method for manufacturing the same, and an electronic device capable of increasing utilization efficiency of a substrate. The solid-state imaging device includes a first semiconductor substrate provided with a sensor circuit having a photoelectric conversion part, and a second semiconductor substrate and a third semiconductor substrate provided with respective circuits different from the sensor circuit. The first semiconductor substrate, the second semiconductor substrate, and the third semiconductor substrate are stacked on each other in three layers, and a metal element for an electrode constituting an electrode for external connection is disposed in the first semiconductor substrate. An electrode for a measuring terminal is disposed within the second semiconductor substrate or the third semiconductor substrate, and the first semiconductor substrate is stacked after performing a predetermined measurement. The present technology can be applied to a backside-illuminated solid-state imaging device, for example. 1. A solid-state imaging device comprising:a first semiconductor substrate provided with a sensor circuit having a photoelectric conversion part; anda second semiconductor substrate and a third semiconductor substrate provided with respective circuits different from the sensor circuit,wherein the first semiconductor substrate serves as an uppermost layer, and the first semiconductor substrate, the second semiconductor substrate, and the third semiconductor substrate are stacked on each other in three layers,a metal element for an electrode constituting an electrode for external connection is disposed in the first semiconductor substrate, anda metal element for an electrode constituting an electrode for a measuring terminal is disposed within the second semiconductor substrate or the third semiconductor substrate, and the first semiconductor substrate is stacked after performing a predetermined ...

Semiconductor Image Sensor Device Having Back Side Illuminated Image Sensors with Embedded Color Filters

Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed. 1. A device comprising:a substrate having a first side and a second side that is opposite the first side;an interconnect structure in contact with the first side of the substrate;a pixel disposed in the substrate;a radiation-blocking structure disposed over the second side of the substrate, the radiation-blocking structure defining a recess; anda passivation layer disposed in the recess.2. The device of claim 1 , further comprising a shallow trench isolation structure disposed within the substrate claim 1 , andwherein the passivation layer extends to the shallow trench isolation structure disposed within the substrate.3. The device of claim 1 , further comprising a color filter disposed in the recess claim 1 , andwherein the passivation layer disposed in the recess has a first sidewall and opposing second sidewall and the color filter extends from the first sidewall to the second sidewall.4. The device of claim 1 , wherein the pixel is closer to the first side of the substrate than the second side of the substrate.5. The device of claim 1 , further comprising:an antireflective layer disposed over the second side of the substrate, anda buffer layer disposed over the antireflective layer.6. The device of claim 1 , wherein the radiation-blocking structure has a top surface facing away from the substrate claim 1 , andwherein a portion of the passivation layer physically contacts the top surface of the radiation-blocking structure.7. The ...

REAR-FACE ILLUMINATED SOLID STATE IMAGE SENSORS

A microelectronic unit includes a semiconductor element having a front surface to which a packaging layer is attached, and a rear surface remote from the front surface. The element includes a light detector including a plurality of light detector element arranged in an array disposed adjacent to the front surface and arranged to receive light through the rear surface. The semiconductor element also includes an electrically conductive contact at the front surface connected to the light detector. The conductive contact includes a thin region and a thicker region which is thicker than the thin region. A conductive interconnect extends through the packaging layer to the thin region of the conductive contact, and a portion of the conductive interconnect is exposed at a surface of the microelectronic unit. 1. A method of forming a microelectronic unit comprising:forming a recessed portion extending through a packaging layer attached to a front surface of a semiconductor element and terminating at a thin region of a conductive contact, the conductive contact being disposed at the front surface of the semiconductor element, the semiconductor element having a rear surface remote from the front surface and including a light detector disposed adjacent to the front surface, connected to the conductive contact and aligned with a portion of the rear surface to receive light through the rear surface portion, wherein the light detector includes a plurality of light detector elements arranged in an array, wherein the conductive contact has a first thickness at the thin region and includes a thicker region having a second thickness that is thicker than the first thickness; andforming a conductive interconnect extending through the recessed portion to connect to the conductive contact at the thin region, at least a portion of the conductive interconnect being exposed at a surface of the microelectronic unit.2. The method of claim 1 , wherein the semiconductor element includes a ...

Solid image-pickup device with flexible circuit substrate

A solid image-pickup device has a semiconductor substrate, which includes an image-pickup area having a plurality of light sensors arranged thereon. A transparent plate having the same shape and the same size as those of the semiconductor substrate when viewed as a plan view is bonded to the surface of the semiconductor substrate. Also, a through hole extends from the second side of the semiconductor device towards the first side. An electrically conductive material is located in the through hole. Additionally, the electrically conductive material is physically connected to at least a portion of a lower surface of a laminar layer portion comprising at least one conductive layer located at the first side of the semiconductor substrate and is electrically connected to the laminar layer portion.

SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS

A solid state imaging device that includes a substrate having oppositely facing first and second surfaces and a photoelectric conversion unit layer having a light incident side facing away from the substrate. The substrate includes a first photoelectric conversion unit and a second photoelectric conversion and the photoelectric conversion layer includes a third photoelectric conversion unit. 1. A solid-state imaging device comprising:a semiconductor substrate having a first surface corresponding to a light incident side and a second surface opposite to the first surface;a first photodiode in the semiconductor substrate;a gate electrode having a portion embedded in the semiconductor substrate from the second surface; andan organic photoelectric conversion unit above the first surface of the semiconductor substrate,wherein the first photodiode is disposed adjacent to the portion of the gate electrode embedded in the semiconductor substrate.2. The solid-state imaging device according to claim 1 , wherein the organic photoelectric conversion unit has a lower electrode claim 1 , an organic photoelectric conversion layer claim 1 , and an upper electrode in order from the first surface.3. The solid-state imaging device according to claim 1 , further comprising a second photodiode in the semiconductor substrate claim 1 , wherein the second photodiode is disposed above the first photodiode.4. The solid-state imaging device according to claim 3 , wherein the first photodiode is for a red color and the second photodiode is for a blue color.5. The solid-state imaging device according to claim 3 , further comprising a semiconductor region having a p-type conductivity between the first photodiode and the portion of the gate electrode embedded in the semiconductor substrate.6. The solid-state imaging device according to claim 3 , further comprising a floating diffusion disposed at the second surface of the semiconductor substrate claim 3 , the floating diffusion being disposed ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion. 1. (canceled)2. A semiconductor device comprising:a photodiode;first to fourth transistors; anda capacitor,wherein one of a source and a drain of the first transistor is electrically connected to the photodiode,wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor,wherein the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the third transistor,wherein the other of the source and the drain of the first transistor is electrically connected to the capacitor,wherein one of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the fourth transistor, andwherein a channel formation region in the third transistor comprises an oxide semiconductor.3. The semiconductor device according to claim 2 , wherein the photodiode comprises a silicon.4. The semiconductor device according to claim 2 , wherein a channel formation region in the first transistor comprises an oxide semiconductor.5. A semiconductor device comprising:a photodiode;first to fourth transistors; anda capacitor,wherein one of a source and a drain of the first transistor is electrically connected to the photodiode,wherein the other of the source and the drain of the first transistor is electrically connected to a gate of the ...

Semiconductor structure and manufacturing method thereof

A semiconductor structure includes a chip, a light transmissive plate, a spacer, and a light-shielding layer. The chip has an image sensor, a first surface and a second surface opposite to the first surface. The image sensor is located on the first surface. The light transmissive plate is disposed on the first surface and covers the image sensor. The spacer is between the light transmissive plate and the first surface, and surrounds the image sensor. The light-shielding layer is located on the first surface between the spacer and the image sensor.

IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME

An image sensor includes a semiconductor substrate, a plurality of photoelectric transducer devices and a dielectric isolating structure. The semiconductor substrate has a backside surface and a front side surface opposite to the backside surface. The photoelectric transducer devices are disposed on the front side surface. The dielectric isolating structure extends downwards into the semiconductor substrate from the front side surface and penetrates through the backside surface, so as to from a grid structure and isolate the photoelectric transducer devices from each other. 1. An image sensor , comprising:a semiconductor substrate having a backside surface and a front side surface opposite to the backside surface;a plurality of photoelectric transducer devices disposed on the front side surface;a dielectric isolating structure extending downwards into the semiconductor substrate from the front side surface and penetrating through the backside surface, so as to from a grid structure and isolate the photoelectric transducer devices from each other; anda color filter (CF) formed on the grid structure and directly in contact with the semiconductor substrate.2. The image sensor according to claim 1 , wherein the grid structure and the semiconductor substrate defines a plurality of recesses and each of the recesses is corresponding to a sub-pixel region.3. The image sensor according to claim 2 , further comprisinga plurality of micro lenses disposed on the CF at least partially extending into the recesses.4. The image sensor according to claim 1 , further comprising an embedded light shielding layer embedded in the dielectric isolating structure.5. The image sensor according to claim 4 , wherein the dielectric isolating structure further comprises a first dielectric layer and a second dielectric layer; and the embedded light shielding layer is disposed between the first dielectric layer and the second dielectric layer.6. The image sensor according to claim 4 , wherein the ...

SOLID-STATE IMAGING APPARATUS AND METHOD OF MANUFACTURING THE SAME

A solid-state imaging apparatus includes: an imaging section having a light-receiving portion for receiving light from an object to image the object; and a substrate on which the imaging section is disposed, wherein a predetermined member provided on the substrate in the neighborhood of the light receiving portion is partially or entirely coated in black. 1. A solid-state imaging apparatus comprising:an imaging section having a light-receiving portion for receiving light from an object to image the object; anda substrate on which the imaging section is disposed, whereina predetermined member provided on the substrate in the neighborhood of the light receiving portion is partially or entirely coated in black.2. The solid-state imaging apparatus according to claim 1 , wherein the predetermined member is coated in black using inkjet printing.3. The solid-state imaging apparatus according to claim 2 , whereinthe predetermined member is a member located in a range on the substrate where the light from the object impinges; anda part of the predetermined member located within the range is coated in black.4. The solid-state imaging apparatus according to claim 2 , whereinthe predetermined member is a member having reflectance of a predetermined value or higher provided on the substrate; andthe predetermined member is coated in black.5. The solid-state imaging apparatus according to claim 1 , wherein the predetermined member is a wire connecting the substrate and the imaging section or a packaged component disposed on the substrate.6. A method of manufacturing a solid-state imaging apparatus claim 1 , comprising:disposing an imaging section, on a substrate, the imaging section having a light-receiving portion for receiving light from an object to image the object; andpartially or entirely coating a predetermined member provided in the neighborhood of the light-receiving portion in black.7. A solid-state imaging apparatus comprising:an imaging section having a light-receiving ...

ELECTRONIC IMAGE-CAPTURING DEVICE COMPRISING A LAYER FORMING OPTICAL LENSES

An electronic image-capturing device includes a wafer having a face exposed to light and including pixel circuits able to deliver electrical signals in the form of pixels, respectively representative of the light reaching regions of the exposed face. The device includes a lens layer above the exposed face, that is configured to let the light pass. Sections of the lens layer, which respectively correspond to regions of the exposed face, are respectively provided with apertures able to modify the refractive index of the material of the lens layer. The apertures of each section are distributed so as to obtain, in each section, a refractive-index gradient such that the refractive index of the lens layer varies between a high refractive index in a local portion and a lower refractive index in a peripheral portion. 1. An electronic image-capturing device , comprisinga wafer having a face exposed to light and including pixel circuits configured to capture light reaching respective regions of said face and deliver electrical signals as pixels, respectively representative of the light reaching the regions of said face, respectively;a lens layer on said face, said lens layer including sections that respectively correspond to the regions of said face, the sections being respectively provided with apertures able to modify a refractive index of the lens layer, the apertures of each section being distributed so as to obtain, in each section, a refractive-index gradient such that the section has a refractive index that varies between a high refractive index in a local portion and a lower refractive index in a peripheral portion.2. The device according to claim 1 , wherein said lens layer has a constant thickness.3. The device according to claim 1 , wherein each aperture has a conical frustum shape.4. The device according to claim 1 , wherein the apertures of each section have a density that increases from said local portion to said peripheral portion.5. The device according to ...

Semiconductor Devices, Methods of Manufacturing Thereof, and Image Sensor Devices

Semiconductor devices, methods of manufacturing thereof, and image sensor devices are disclosed. In some embodiments, a semiconductor device comprises a semiconductor chip comprising an array region, a periphery region, and a through-via disposed therein. The semiconductor device comprises a guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and a portion of the periphery region. 1. A semiconductor device comprising:a semiconductor chip comprising an array region, a periphery region, and a through-via disposed in the semiconductor chip, the semiconductor chip comprising a substrate and dielectric layer on a first side of the substrate; anda guard structure disposed in the semiconductor chip between the array region and the through-via or between the through-via and the periphery region, the guard structure comprising a conductive feature extending from the first side of the substrate to a second side of the substrate.2. The semiconductor device of claim 1 , wherein the periphery region comprises a transistor.3. The semiconductor device of claim 1 , wherein the guard structure further comprises a first doped region of a first conductivity type interposed between the conductive feature and the through-via.4. The semiconductor device of claim 3 , wherein the guard structure further comprises a second doped region of a second conductive type interposed between the conductive feature and the through-via.5. The semiconductor device of claim 4 , wherein the first doped region extends completely through the substrate.6. The semiconductor device of claim 3 , wherein the first doped region extends through a shallow trench isolation.7. The semiconductor device of claim 6 , wherein a tapering of the first doped region is opposite of a tapering of the shallow trench isolation.8. The semiconductor device of claim 3 , wherein the first doped region comprises a different semiconductor material than a ...

PHOTODIODE AND OTHER SENSOR STRUCTURES IN FLAT-PANEL X-RAY IMAGERS AND METHOD FOR IMPROVING TOPOLOGICAL UNIFORMITY OF THE PHOTODIODE AND OTHER SENSOR STRUCTURES IN FLAT-PANEL X-RAY IMAGERS BASED ON THIN-FILM ELECTRONICS

A radiation sensor including a scintillation layer configured to emit photons upon interaction with ionizing radiation and a photodetector including in order a first electrode, a photosensitive layer, and a photon-transmissive second electrode disposed in proximity to the scintillation layer. The photosensitive layer is configured to generate electron-hole pairs upon interaction with a part of the photons. The radiation sensor includes pixel circuitry electrically connected to the first electrode and configured to measure an imaging signal indicative of the electron-hole pairs generated in the photosensitive layer and a planarization layer disposed on the pixel circuitry between the first electrode and the pixel circuitry such that the first electrode is above a plane including the pixel circuitry. A surface of at least one of the first electrode and the second electrode at least partially overlaps the pixel circuitry and has a surface inflection above features of the pixel circuitry. The surface inflection has a radius of curvature greater than one half micron. 1a photoconductor detector including an electrode and a photoconductive layer, the photoconductive layer being configured to generate electron-hole pairs upon interaction with ionizing radiation;pixel circuitry electrically connected to the electrode and configured to measure an imaging signal indicative of the electron-hole pairs generated in the photoconductive layer; anda planarization layer disposed on the pixel circuitry between the electrode and the pixel circuitry such that the electrode is above a plane including the pixel circuitry;wherein the electrode at least partially overlaps the pixel circuitry, andwherein the planarization layer at least partially planarizes over a feature of the pixel circuitry.. A radiation sensor comprising: This application is a continuation of U.S. application Ser. No. 14/477,960, filed Apr. 16, 2015, which, in turn, is a continuation of U.S. application Ser. No. 14/275, ...

Fan-out sensor package and camera module

The fan-out sensor package includes: a core member having a through-hole; an integrated circuit (IC) for a sensor disposed in the through-hole and having a first surface having a sensor region and first connection pads disposed thereon, a second surface opposing the first surface and having second connection pads disposed thereon, and through-silicon vias (TSVs) penetrating between the first and second surfaces and electrically connecting the first and second connection pads to each other; an encapsulant covering the core member and the second surface of the IC for a sensor and filling at least portions of the through-hole; a redistribution layer disposed on the encapsulant; and vias penetrating through at least portions of the encapsulant and electrically connecting the redistribution layer and the second connection pads to each other.

IMAGE SENSOR

An image sensor is provided. The image sensor includes a first substrate; a plurality of photoelectric conversion units positioned in the first substrate; a first connection layer disposed on the first substrate; a plurality of first pixel pads disposed on the first connection layer; a plurality of first peripheral pads disposed on the first substrate; a plurality of second pixel pads respectively positioned on the plurality of first pixel pads; a plurality of second peripheral pads respectively positioned on the plurality of first peripheral pads; a second connection layer disposed on the plurality of second pixel pads and the plurality of second peripheral pads; a device disposed on the second connection layer; and a second substrate disposed on the second connection layer and the device, wherein a pitch of the plurality of first pixel pads is substantially the same as a pitch of the plurality of pixel regions of the first substrate. 1. An image sensor comprising:a first substrate comprising a pixel array region comprising a plurality of pixel regions and a peripheral region around the pixel array region;a plurality of photoelectric conversion units respectively positioned in the plurality of pixel regions of the first substrate;a first connection layer disposed on the pixel array region and the peripheral region of the first substrate;a plurality of first pixel pads disposed on a portion of the first connection layer on the pixel array region of the first substrate;a plurality of first peripheral pads disposed on a portion of the first connection layer on the peripheral region of the first substrate;a plurality of second pixel pads respectively positioned on the plurality of first pixel pads;a plurality of second peripheral pads respectively positioned on the plurality of first peripheral pads;a second connection layer disposed on the plurality of second pixel pads and the plurality of second peripheral pads;a device disposed on the second connection layer; anda ...

WAFER ON WAFER STACK METHOD OF FORMING AND METHOD OF USING THE SAME

A wafer on wafer (WOW) stack includes a first wafer having dies of a first type. The WOW stack further includes a second wafer bonded to the first wafer. The second wafer has dies of a second type. An integer number of dies of the second type are bonded to a corresponding die of the first type. A total area of the dies of the second type bonded to the corresponding die of the first type is less than or equal to an area of the corresponding die of the first type. A functionality of the dies of the first type is different from a functionality of the dies of the second type. 1. A wafer on wafer (WOW) stack comprising:a first wafer having dies of a first type; anda second wafer bonded to the first wafer, the second wafer having dies of a second type, wherein an integer number of dies of the second type are bonded to a corresponding die of the first type, a total area of the dies of the second type bonded to the corresponding die of the first type is less than or equal to an area of the corresponding die of the first type, and a functionality of the dies of the first type is different from a functionality of the dies of the second type.2. The WOW stack of claim 1 , wherein each die of the second type has a same area.3. The WOW stack of claim 1 , wherein at least one die of the second type bonded to the corresponding die of the first type has a different area from at least another die of the second type bonded to the die of the first type.4. The WOW stack of claim 1 , wherein the integer number of dies of the second type is an even number.5. The WOW stack of claim 1 , wherein the integer number of dies of the second type is an odd number claim 1 , the second wafer further comprises a plurality of parasitic improving regions claim 1 , and a parasitic improving region of the plurality of parasitic improving regions is bonded to the corresponding die of the first type.6. The WOW stack of claim 1 , wherein a first die of the second type bonded to the corresponding die of the ...

IMAGING DEVICE AND METHOD OF MANUFACTURING THE SAME

In an imaging device having a waveguide, a surface of an insulating film covering a seal ring is prevented from getting rough. A pixel region, a peripheral circuit region, and a seal region are defined over a semiconductor substrate. After formation of a pad electrode in the peripheral circuit region and a seal ring in the seal ring region, a TEOS film is so formed as to cover the pad electrode and the seal ring. A pattern of a photoresist for exposing a portion of the TEOS film covering the pad electrode and the seal ring, respectively, is formed and etching treatment is subjected to the exposed TEOS film. Then, after the pattern of the photoresist has been formed, a second waveguide holding hole is formed in the pixel region by performing etching treatment. 1. A solid-state image sensing device , comprising:a semiconductor substrate having a main surface,a pixel region including a plurality of pixels formed on the main surface of the semiconductor substrate,a peripheral circuit region formed outside of the pixel region,a seal ring region including a seal ring formed outside of the peripheral circuit region and continuously enclosing the pixel region and the peripheral region,a protective insulating film formed to cover the pixel region, the peripheral circuit region, and the seal ring region, anda groove formed over the seal ring without penetrating through the protective insulating film, whereinin a plan view, a width of the groove is larger than a width of the top part of the seal ring, andin a direction perpendicular to an extending direction of the seal ring, the center of the groove is displaced outside of the center of the seal ring.2. A solid-state image sensing device according to claim 1 , whereina first concave portion is formed along the seal ring in the groove located outside of the seal ring in the protective insulating film, andwhen a position of a surface of the protective insulating film located immediately above the seal ring is a first position, ...

SEMICONDUCTOR APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS, METHOD OF DESIGNING SEMICONDUCTOR APPARATUS, AND ELECTRONIC APPARATUS

A semiconductor device including a first material layer adjacent to a second material layer, a first via passing through the first material layer and extending into the second material layer, and a second via extending into the first material layer, where along a common cross section parallel to an interface between the two material layers, the first via has a cross section larger than that of the second via. 120-. (canceled)21. A semiconductor device , comprising:a first semiconductor chip including a plurality of photoelectric conversion elements and a first multi wiring layer; wherein the first semiconductor chip and the second semiconductor chip are bonded to each other with the first multi wiring layer facing the second multi wiring layer;', 'a connection conductor, wherein a wiring of the first multi layer wiring and a wiring of the second multi layer wiring electrically connect the first multi wiring layer to the second multi wiring layer through a first conductive portion and a second conductive portion, and wherein the second conductive portion comprises Cu and Al., 'a second semiconductor chip including a second multi wiring layer,'}22. The semiconductor device of claim 21 , further comprising: a barrier metal layer within the second conductive portion.23. The semiconductor device of claim 22 , wherein the barrier metal layer comprises TiN.24. The semiconductor device of claim 21 , wherein a size of the second conductive portion is different from that of the first conductive portion.25. The semiconductor device of claim 24 ,wherein a diameter of the second conductive portion is different from a diameter of the first conductive portion.26. The semiconductor device of claim 21 ,wherein the second conductive portion has a diameter that is different than a diameter of the first conductive portion along a common cross section parallel to an interface between the first semiconductor chip and the second semiconductor chip.27. The semiconductor device of claim 21 ...

SOLID STATE IMAGING APPARATUS, PRODUCTION METHOD THEREOF AND ELECTRONIC DEVICE

A solid state imaging apparatus includes an insulation structure formed of an insulation substance penetrating through at least a silicon layer at a light receiving surface side, the insulation structure having a forward tapered shape where a top diameter at an upper portion of the light receiving surface side of the silicon layer is greater than a bottom diameter at a bottom portion of the silicon layer. Also, there are provided a method of producing the solid state imaging apparatus and an electronic device including the solid state imaging apparatus. 1. An imaging device , comprising:a first substrate including a photoelectric conversion element;a second substrate including a wiring layer and at least a part of a logic circuit; and wherein the first substrate is bonded to the second substrate,', 'wherein the insulation region includes a first insulation material and a second insulation material,', 'wherein the insulation region is disposed between the wiring layer of the second substrate and a light receiving side of the first substrate in a vertical direction, and', 'wherein the insulation region is disposed at a side of a scribe area., 'an insulation region penetrating through at least a silicon layer of the first substrate,'}2. The imaging device according to claim 1 , whereinthe first insulation material is selected from the group consisting of silicon nitride, hafnium oxide, aluminum oxide, zirconium oxide, tantalum oxide, titanium oxide, lanthanum oxide, praseodymium oxide, cerium oxide, neodymium oxide, promethium oxide, samarium oxide, europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, holmium oxide, thulium oxide, ytterbium oxide, lutetium oxide yttrium oxide.3. The imaging device according to claim 1 , whereinthe second insulation material is selected from silicon oxide, silicon nitride, silicon oxynitride and silicon carbide.4. The imaging device according to claim 1 , whereinthe first insulation material is hafnium oxide and the second ...