Sense amplifier circuit for semiconductor memory has first and second load transistors respectively connected to first and second data lines to provide charging currents to data lines
Номер патента: DE10034231A1
Опубликовано: 12-04-2001
Автор(ы): Dong-Woo Lee, Heung-Soo Im
Принадлежит: SAMSUNG ELECTRONICS CO LTD
Опубликовано: 12-04-2001
Автор(ы): Dong-Woo Lee, Heung-Soo Im
Принадлежит: SAMSUNG ELECTRONICS CO LTD
Реферат: A first load PMOS transistor (14) is connected to a first data line (DDL) to provide a first charging current to the first data line connected to a memory location (MC). Second load PMOS transistors (10,12) are connected to a second data line (DDL) to provide a second charging current, different to the first charging current, to the second data line connected to an empty memory location (DMC).
Sense amplifier with reduced area occupation for semiconductor memories
Номер патента: US7843738B2. Автор: Ignazio Martines,Michele La Placa,Antonio Giambartino. Владелец: STMICROELECTRONICS SRL. Дата публикации: 2010-11-30.