A cache memory hierarchy that reduces power consumption by reducing accesses to main memory
Номер патента: AU3333793A
Опубликовано: 19-07-1993
Автор(ы): Edward S Zager, Gregory S Mathews
Принадлежит: Intel Corp
Опубликовано: 19-07-1993
Автор(ы): Edward S Zager, Gregory S Mathews
Принадлежит: Intel Corp
Integrated cache memory with system control logic and adaptation of RAM bus to a cache pinout
Номер патента: US6131140A. Автор: Thurman J. Rodgers,Peter Voss,Raymond M. Leong,Tek Wei. Владелец: Cypress Semiconductor Corp. Дата публикации: 2000-10-10.