SEMICONDUCTOR ARRANGEMENT WITH A FIELD-EFFECT TRANSISTOR

The invention at least partly refers a outer Halbleiteranorduung with one a outer surface with a Isoliersehicht covered plattenförmigen semiconductor body, which arrangement contains at least one field-effect transistor with insulating gate electrode, whereby a Substraigebiet of first lead ähigkeitstyp the outer mentioned a surface borders and two also to this surface grenzenda, by which 8ubstratgebiet lowers from each other separated, to the source and due electrode zones by the second type of conductivity opposite for the type of conductivity of the substrate area is attached, whereby on the insulating layer between the source zone and the Senkonzone at least a Torelek rode is attached and whereby on the mentioned surface facing the side of the semiconductor body the Sk bstratgebiet electrical ones leading on a metallic base plate is attached, which also provided and i it outside of DTE semiconductor body an extending metal pus gleichstro is äßig directly with on a äer both electrode zones which is appropriate layer of metal connected for a connection leader. Anoränungen ni a field-effect transistor of the above-described Az@ are well-known. The mentioned metal pus, which is attached within the casing, is for many Sehaltungsanorduungen, in particular such with Feldeffekttrausistoren with several Torelekäroden, of importance. With this Schaltungsanardnungen it is north frequently desired that the source is electrically leading connected with the substrate area. In practice however it turned out that field-effect transistor in Anorduungen of the descriptive well-known design in many cases, in particular with high frequencies, worse characteristics be90 to sit. The invention has among other things the purpose to be created both these the well-known designs of adhering disadvantages be avoided a simple design or at least to a large extent be reduced. The invention be the basis among other things the realization that the abenbeschriebene well-known arrangement is particularly sensitive regarding their electrical behavior for the quality of the connection between that semiconductor bodies and the Kontaktechicht, and that by application of a simple measure, without change of the internal structure of the semiconductor body, which electrical and switchingtechnical characteristics of the arrangement can be substantially improved. The semiconductor arrangement according to invention eingaugs of the descriptive kind is characterized by the fact that a Metallsehicht in actually well-known stands way at the mentioned surface with the electrode zone and also with the substrate area in contact and so that pn practicing suppl. August between the electrode zone and the substrate area knrzscbließt. The Halbleßteranordnung after the invention exhibits substantial advantages compared with the well-known Anorduung already described. During this well-known arrangement the electrical connection between the contact layer and the substrate area can at least locally more or less be gleiehrichtend e.g. by unzuläugliches Auflöten of the semiconductor body on the Konh ktschieht (ima the general by the base plate of the casing one forms). The possibility that see a such rectifying contact forms, is increased still thereby that generally S exhibits bs advice area for receiving optimal electrical Eigenschaßen of the field-effect transistor a relatively high resistivity, so that see on this substrate easily more or less rectifying contacts to form. Due to a such rectifying contact such an impedance between the contact layer and the Elek can rodenzonen to be received that in particular with high frequencies the electrical characteristics of the arrangement are impaired, as below is still more near described. By the mounting of a layer of metal after the invention, whereby the pH transition between a zone and the substrate area at the surface Imrzgeschlossen, serving as source zone, so that outer this pn practicing suppl. August no more tensions außreten can, that mention sewal a unzuläuglichen contact eliminated between the Kentaktachicht and the substrate area practically. The mounting of the layer of metal after the invention, Ne without those would seem redundant the invention underlying realization, causes from there a substantial improvement of the Auordnung. The mentioned metal pus k n over a separate contact on the electrode zone to be actually fastened. To the Vereinfaehung of the design is it however ven advantage, if the metal pus the outer NIetallschieht standing with the electrode zone and the substrate area in contact is attached. It is noticed that it - for example from Swiss patent specification No. 453,507 - admits actually is, a in-transition by means of a layer of metal Imrzzuschließen. Also a design is well-known, with which the source zone the surface is short circuit by a layer of metal with the substrate area, with this design is however the substrate contact on this layer of metal by means of a connection leader to be attached, that becomes over a separate isolating Durchflihrung by the casing outward gefiihr. The base plate kù n during this execution as substrate contact not to be used, because with the absence one would herbeifiihren gleiehstro nrnäßigen direct connection between the base plate and the source zone the resistance between the electrode zones and the base plate over the high impedance substrate area an inadmissible reduction of the slope. Compared with this well-known design the arrangement exhibits a large Vereinfaohung of the assembly and the casing after the invention from there. The invention is more near described below on the basis in the designs a dargestelltenAusfiihrungsbeispieles. In the designs the Fig shows. 1 schematically a transverse oh CCIT by an arrangement of a well-known design, Fig. 2 a plan view on the semiconductor body of an arrangement after the invention, Fig. 3 schematically a cross section along the line HI-HI of the Fig. 2 by a part of the arrangement after Fig. 2 with associated casing, Fig. 4 the reciprocal of the output absorption as function of the signal frequency fiir an arrangement after the invention and for a Anorduung well-known design and the Fig. 5 the output capacitance as function of the signal frequency for an arrangement after the invention and fär a well-known arrangement. The designs are schematiseh and for the sake of clarity drawn, in particular in the D ckenrichtung, not full-scale. Fig. 1 shows a transverse longing CCIT by an example of a well-known design of an arrangement with a field-effect transistor with insulating gate electrode. The Anorduung consists of a plattenförmigen silicon body --1--, which contains a field-effect transistor with insulating Torelek rode. This field-effect transistor contains an EN the surface --2-- the Silieiumkörpers border-leading substrate area --3-- as well as a n-leading Quellenzene --4-- and a n-leading reduction zone --5--, those also to the surface --2-- border and by the substrate area --3-- from each other separated are. The plattenförmige Silieiumkörper --1-- is the outer surface --2-- with an insulating layer consisting of Siliciamoxyd --6-- covered. On these Silicinmoxydschicht --6-- is a gate electrode --7-- in form of an aluminum layer attached, those with a Anscblußleiter --8-- is provided. The reduction zone --5-- is with a Anscb_lußkontal --9-- in form of a Aluminiumsehicht with a connection leader --10-- provided. The Quellenzene --4-- is with a connection contact --11-- provide in form of a Aluminiumschieht. The substrate area --3-- is by means of a Lotsehieht --13-- on a metallic base plate --14-- attached, those with a connection leader --15-- is provided. The connection leaders --8 and 10-- are insulating by the cap --47-- the casing outward vehicle. The connection leader --15-- is with the Sabstratgebiet--3-- over the plumb bob layer --13-- connected and further with the source zone --4-- more ifoer a metal pus --16-- connected, both with the base plate --14-- and with the connection contact --11-- is connected. By insufficient Auflöten the transition can --17-- between the Sabstratgebiet --3--and dsr plumb bob layer --13-- more or less rectifying its. In this case can do e.g. impedance, those by the Rsihensehalümg of the capacity between reduction zone --5-- and substrate area--3--lying pnÜberganges --12--, between Substratgcbiet --3--and Lotsehioht --13-- lying closing transition --17-- and the resistance of the intermediate part of the substrate area --3-- , in particular with high frequencies particularly to be disturbing and among other things the output conductivity and the expenditure August capacity are formed for Fig by unwanted Rüclakopplungseffek e impair. 2 is a plan view on the semiconductor body in accordance with the example. Fig. shows 3 schematiseh a transverse longing CCIT along the line a Ill III the Fig. 2 by a part of a Anorduung after the invention. This arrangement is a tetrode (MOS) - Feldeffekttranslstor with two gate electrodes --G1 and G2 --. In Fig. 2 is suggested only the Aluminiumkontaktsctächten of the electrodes as shaded squares. 48 the contact of the source --S-- becomes (S. Fig. 3) by the layer --41-- formed, while the first gate electrode --G1 -- by the layer--37--, the second gate electrode --G2 -- by the layer --48-- and the Kentak lowers --D-- by the layer --39-- one forms. The due aluminum layers roden to the Torelel --37, 48-- are on a layer --66-- from silicon oxide, while the Aluminiumschiehten belonging to Quellenund reduction village --41 and 39-- over windows in these Siliciumoxydsohicht with Quellenund reduction zone --34 and 35-- are connected (S. g. 3). The substrate area --33-- (S. Fig. 3) consists of failure that Silicinm with a resistivity of 10 em. Into this Sabstratgebiet n-leading areas are in into the Halbleiterteehnik usual way --34, 35 and 49-- diffuse thereby forms the area --34-- the source zone, the area --35-- the reduction zone and the area --49-- the island, by those the underneath of the first and second gate electrode -- Gt (37) and G2 (48)-- in connection are located to formed S romkauäle with one another. The Siliciumscheibs is (S. Fig. 3) by means of a gold layer --43-- on a Bodenplatts --44-- from a gilded iron nickel cobalt alloy, like Fernico, festgslötst, which Bodenplatts with a connection leader --45-- , during on the ground a cap is provided --47-- , the “thema4 is attached - R. OU I table in Fig. 3 is represented. The Torelel roden--37 and 48-- and those-lower --39-- h are he itself by insulating Durchfiihrungen era straining connection leaders by the cap --47-- outward vehicle such as pattern tsch in Fig. 3 is represented. These connection leaders are actual on in Fig. 2 also --G1, G and D-- marked Kontatä surfaces fastened, those to the aluminum layer -- 37, 39 and 48-- belong. The obenbescbxiebene structure of the semiconductor body is generally usual for metal-oxide semiconductor tetrodes, so that the dimensions and the production of this structure, which are not substantial for the invention, are left except consideration. The Aiuminiumschicht --41--, which is with the source zone in contact, is (S. Fig. 3) with the base plate --44-- by means of a Alumintumdrahtes --50-- connected. The aluminum layer --41-- is after the invention both with the source zone --34-- and with the substrate area --33-- connected, so that pn practicing suppl. August --42-- between these areas the outer surface lmrzgeschlossen becomes. To the Veranschauliohung improvement of the electrical characteristics, which is erzeflt by application of the invention, are in the Fig. 4 and 5 comparatively measurements of two electrical parameter as Fun ion of the signal frequency represented, whereby the curve --A-- itself on on the basis the Fig. , during itself the curve refers 2 and 3 descriptive tetrode MOS Transistcr after the invention --B-- to an otherwise completely identical MOS transistor refers, whereby only the aluminum layer --41-- not direk at the surface with the substrate area --33-- in contact is, so that the pn transition --42-- the outer surface do not lmrzgeschlossen is. Fig. 4 show horizontal in logarithmic scale the signal frequency and vertically in linear scale the AusdID course conductivity (output conduetance) ges, those to usual way one defines as ges = (D); (VG1 = constantly), whereby ID the river between Quellenund reduction zone, VD the tension between Quellenund reduction village and VG1 the tension between the first ToreIektrode --GI-- and the r it the source connected substrate area represents. The measurements were durchgefiihrt with the following Einstellspaunungen: Tension between Quelleund lowers VDS = 13 q Spaunung between --G -- and lower VG2s = + 4 V. The Spaunung between the first Tcrelel rode --Gi-- and the source --S-- it was adjusted in such a manner that the reduction stream ID amounted to 4 mA. From Fig. 4 it is erslchtlieh that the output conductivity with the well-known design --B-- already of for instance I05 cycles per second of outer strongly zunirù t, while with the Anorduung after the invention the output conductivity up to frequencies remains practically alike in close proximity to 10 cycles per second. Fig. kerizental in logarithmic scale the signal frequency shows 5 and vertically in linear scale the output capacitance Cos, i.e. the capacity between lowers and the substrate and/or the source, measured with the same attitude tensions and - flow, as into Fig. 4. With the well-known design --B-- the expenditure August capacity depends strongly on the frequency. With the design after the invention --A-- the expenditure August capacity is practically constant and amounts to also with low frequencies only some pF. The invention was not limited to the descriptive remark example, but many Abwandiungen are possible in the context of the invention for the specialist. So l nn it perhaps recommendable its that to the Verbessenmg of the Kentaures between the layer of metal --41-- (S. Fig. 3) and the substrate area --33-- at the surface a contact diffusion with same type of conductivity as the substrate area, but with higher doping is made. No additional DIffusionsschrlB is necessary, in this Zus r menhang in particular is pointed out in those cases, in which a such Diffusicn must be made nevertheless for the attachment of additional zones in the semiconductor body, that the invention refers also to integrated monclithische circuits, which contain or several field-effect transistor with insulating Torelek rode. The metal pus, which rodenzenen one the Elek with the base plate connects, can exist instead of from a wire e.g. also of a auigedampften and by a Isclierschicht from the I-more lalbleiterkörper separated metal strip. Further is the number of gate electrodes the field-effect transistor for the application of the invention not substantially, during also instead of silicon other semiconductor materials, like germanium or AIIIBVVerbindungen, and instead of Silfclumoxyd also Isclierschlch EN from other materials, e.g. Silioiunmitrld and/or or A], rùi iumoxyd, to be used can.