Semiconductor device with self-aligned back side features
Номер патента: EP3178112A1
Опубликовано: 14-06-2017
Автор(ы): Stephen A. Fanelli
Принадлежит: Qualcomm Inc
Опубликовано: 14-06-2017
Автор(ы): Stephen A. Fanelli
Принадлежит: Qualcomm Inc
Реферат: Various methods and devices that involve self-aligned features on a semiconductor on insulator process are provided. An exemplary method comprises forming a gate on a semiconductor on insulator wafer. The semiconductor on insulator wafer comprises a device region, a buried insulator, and a substrate. The exemplary method further comprises applying a treatment to the semiconductor on insulator wafer using the gate as a mask. The treatment creates a treated insulator region in the buried insulator. The exemplary method also comprises removing at least a portion of the substrate. The exemplary method also comprises, selectively removing the treated insulator region from the buried insulator to form a remaining insulator region after removing that portion of the substrate.
Semiconductor Device With Self-Aligned Back Side Features
Номер патента: US20170047346A1. Автор: Stephen A. Fanelli. Владелец: Qualcomm Inc. Дата публикации: 2017-02-16.