Patterns of passivation material on bond pads and methods of manufacture thereof

Cross-reference to related applications

The open request to submit 15 February 2011 No. 61/443 of the United States Provisional Patent application, 190 of the priority, if there is not consistent with the part of this specification, , in addition to those not consistent with the outside part of the specification, by reference to the specification as a whole will be the same for the whole is introduced for all purposes.

Technical Field

The disclosed embodiment relates to the field of semiconductor device, more specifically relates to a semiconductor device technology of bonding pad, the structure and configuration of the bonding pad and other electronic device assembly.

Background Art

Here the description of the background technology generally used for the purpose of displaying the open context. In the background technology described in the part, the work of the inventor of the currently designated in the description and in the to may not be in addition to aspects of the prior art, neither expressly nor impliedly admitted as prior art of the present disclosure.

Electronic component includes a semiconductor bare chip and generally includes one or a plurality of semiconductor bare chip of the semiconductor package body, and is usually referred to as "chip". Semiconductor bare chip is usually in the form of a substrate or carrier other supporting an electronic component in the semiconductor package body, such as an electronic component to the other includes a plurality of lead wire of the lead frame. By utilizing the lead of the semiconductor package can be coupled to the body such as a circuit board or other electronic components such as the substrate. Alternatively, semiconductor package and the semiconductor bare chip in accordance with the different ways can be coupled to the other electronic component or substrate, such as the use of direct coupling of the solder bumps.

In order to provide various electronic component is electrically connected with each other between the various electronic components and electrically connected with the inside of the, usually using bonding wire. Bonding wiring general coupling in place for bonding pad on the electronic component. Figure 1A is cross-sectional diagram of the semiconductor bare chip 100, the semiconductor bare chip 100 included in the metal layer 106 on the passivation layer 104 of the bonding pad 102. Such as visible, the bonding pad 102 is exposed, and the passivation layer 104 in bonding pad 102 completely or almost fully at the position of the opening to thereby expose the bonding pad 102. Bonding pad 102 generally by a metal such as aluminum, of the appropriate type is made of an electrically conductive material. Coupled to the bonding pad 102 bonding connection 112 such as copper or gold and so on generally consists of a conductive material is made of the other. Bonding connection 112 in order to establish combustion at the end of the coupled to the bonding pad 102 end 114. If in Figure 1B can be seen in, then the bonded connection end 114 is applied to bonding pad 102, so that the bonding connection 112 is coupled to the bonding pad 102, thereby providing a bonding connection 112 with the bonding pad 102 is electrically connected between the. Bonding connection 112 to the bonding pad 102 of the coupling can be the end part of the bonding wire 114 because of the creation of bonding connection end 114 of the combustion and at the same time still soft or molten of the implementation of, or through the end part to the bonding wire 114 for re-heating the implementation of the welding process.

When the bonding wire connecting end 114 coupled to the bonding pad 102 is, the metal compound (not shown) formed on the bonded connection end 114 of the bonding pad 102 between, to thereby provide a bonded connection end 114 of the bonding pad 102 bonded between. General implementation of the tests such as reliability test, in order to test the connection end portion of the linkage 114 to the bonding pad 102 bonding. This kind of test will result in bonding connection end 114 of the bonding pad 102 by the bonding between the various iron and/or chemical substance such as chlorine of pollution. This kind of pollution will result in bonding connection end 114 of the bonding pad 102 and the bonding between the intermetallic compound formed between them in the integration of the. The problem in the integration of the linkage can include bonding potential failure and/or bonded connection end 114 of the bonding pad 102 separation.

Content of the invention

The present disclosure provides a method, the method includes the steps of forming a bonding pad on the electronic component, wherein the bonding pad comprises a conductive material. The method further includes the conductive material is provided on the surface of passivation material, and removing from the surface of the passivation material in order to expose the conductive material so as to form the part of the passivation material comprises a conductive material and the bonding pad.

The present invention also provides an electronic assembly, the electronic assembly includes a bonding pad, wherein the bonding pad comprises a conductive material and the passivation material. A conductive material and a passivating material is arranged such that the contact surface of the bonding pad is substantially smooth and defines a peak and valley.

The present disclosure also provides a method, the method comprises in the on the electronic component provided at a location where the passivation material, wherein the passivation material in the electronic assembly is arranged so that part of the pattern of the exposed position. The method also includes at the position above the passivation material depositing a conductive material, in order to in the position of the bonding pad including the passivation material, wherein the contact surface of the bonding pad is substantially smooth and defines a peak and valley.

Description of drawings

The adoption of the following specific description in conjuction with the embodiment will be easily understood. In the Figure of the attached drawing, through the way of example and not by way of limitation to the embodiment illustrated.

Figure 1A and Figure 1B is of cross-sectional view diagrammatically shown for the bonded wire bonded to the bonding pad is the prior art.

Figure 2A and Figure 2B is of cross-sectional view diagrammatically shown is used for a bonding wire is bonded to the bonding pad of the one embodiment.

Figure 3A to Figure 3D is top of the graphic used for described here the pattern of bonding pad examples of passivation material.

Figure 4A and Figure 4B is of cross-sectional view diagrammatically shown for the bonded wire bonded to the bonding pad of the arrangement of another embodiment.

Figure 5 and Figure 6 is of the process flow diagram for manufacturing described herein an exemplary method of bonding pad.

Mode of execution

Figure 2A is cross-sectional view of semiconductor die 200, the semiconductor bare chip 200 included in the layer 206 on the passivation layer 204 is formed in the pad 202. Although semiconductor bare chip 200 generally includes a plurality of layers, but, for the sake of a clear and easy to understand, not shown in this way the additional layer. Layer 206 generally by such as silicon, copper (cu), aluminum (Al), aluminum-copper alloy, aluminum-silicon alloy, is made of a material such as nickel (Ni). Pad 202 generally include for example, copper (cu), aluminum (Al), aluminum-copper alloy, aluminum-silicon alloy, the conductive material such as nickel (Ni), which is generally different from form 206 material. Passivation layer 204 can utilize for example include an oxide, nitride, silicon oxide, silicon and so on nitride passivation material of any suitable form.

According to various embodiments, the pad 202 includes the bonding pad 202 on the top surface of the spacer 208, to thereby form a bonding pad 210. The spacer 208 can be formed by passivation material or other hard material. Examples of passivation material including for example, for the passivation layer 204 referred to, for example, silicon nitride, oxide, nitride, silicon oxide, and the like. The deposition of the passivation layer 204 before, the layer 206 is formed on the bonding pad 202, the spacer 208 provided in the pad 202 is. Then can etch the passivation layer 204 in order to expose pad 202. However, according to various embodiments, the passivation layer 204 the remaining portions of the pad 202 is. This can be through the in this field to achieve a known way, such as in the passivation layer 204 before the deposition of the bonding pad 202 to provide mask layer (not shown), therefore it is convenient during the etching process from the bonding pad 202 removed from the surface of the passivation layer 204 of the part. As another example, the deposition of the passivation material can be to form a passivation layer 204 before the bonding pad 202 to provide thin-film (not shown). For example, can be deposited photoresist film (or any other appropriate material) in order to cover the pad 202 substantially the entire top surface. Then the photoresist film may be selectively etched in order to expose pad 202 to the top surface of the spacer 208 of the part. The etching of the photoresist film, the bonding pad 202 selectively on the top surface of passivation material is deposited. Passivation material is not deposited on the bonding pad 202 of the top surface of the covering on the part of the photoresist film. In Figure 2A in, remain in the bonding pad 202 or the passivation material on the passivation layer 204 is expressed as part of the spacer 208.

According to various embodiments, the spacer 208 can be independent of the passivation layer 204 formed of added to the pad 202. For example, can be in the layer 206 is formed on the bonding pad 202 and can be in the pad 202 and layer 206 is formed above the passivation layer 204. Can that the passivation layer 204 is completely or nearly completely opening in order to expose pad 202. The can then be included in the bonding pad 202 of the spacer 208 independently added to the pad 202. From the bonding pad 202 to remove the part of the passivation material to thereby the pad 202 is formed on the spacer 208. Such as mentioned before can be utilized by an etching process or a thin film process such as removing any suitable process of passivation material.

Such as chart 2A of in the, pad 202 and a spacer 208 together to form a bonding pad 210. Bonding pad 210 are not smooth or non-smooth and defines a plurality of peak 218a and a plurality of grain 218b (but to clearly purpose, in Figure 2A only marking a plurality of peak and valley several). A plurality of peaks 218a and a plurality of grain 218b defined bonding pad 210 of the contact surface. Although in Figure 2A and 2B in the cross section of the spacer 208 shown as having a substantially square shape, but this is not intended to limit, other shapes are possible.

With reference to Figure 2B, upon completion of the bonding pad 210, can be a bonding wiring 212 bonded to the bonding pad 210. Bonding the wiring 212 generally by the for example, copper (cu), aluminum (Al), aluminum-copper alloy, aluminum-silicon alloy, such as nickel (Ni) is made of an electrically conductive material, but generally is different from a bonding pad 210 material. Or directly in bonding terminal part 214 after the formation of the (in the bonding wire connecting end 114 because the creation of bonding connection end 114 of the bonding wire 212 of combustion and is still soft or molten at the same time), or by suitable welding process, a bonding wiring 212 end 214 coupled to the bonding pad 210. Bonding terminal part 214 by the filling in the peak 218a valley between 218b and coupling or bonding to the bonding pad 210. The metal compound (not shown) formed in the spacer 208 between, to the end part of the bonded wire 214 bonded to the bonding pad 210. Although Figure 2B the bonded terminal part 214 is not shown completely covers the bonding pad 210, but according to various embodiments, bonding terminal part 214 can be the entire cover or substantially cover the bonding pad 210. Similarly, if necessary, bonding terminal part 214 can be covered with less bonding pad 210.

Formed in the end part of the bonding wire 214 and bonding pad 210 for bonding between the during and/or after testing, testing process from such as iron and/or chemical substances such as (such as chlorine) the pollutants might have because the mobile by forming the end part of the bonding wire 214 and bonding pad 210 and bonding between the begin to interfere with or damage the end part formed in the bonding wire 214 and bonding pad 210 the integration of the bonding between the. When the contaminant along the end part formed in the bonding wire 214 and bonding pad 210 mobile when the bonding between the, pollutants will encounter bonding pad 210 of the spacer 208. The spacer 208 to prevent further spread of the pollutants by forming the connecting end of the linkage 214 and bonding pad 210 is bonded between the. This will bring about to remain intact and firm bonding integration, so as to prevent the end part formed in the bonding wire 214 and bonding pad 210 the failure of the bonding between the. Moreover, because the spacer is the peak 208 and 218a and 218b provide not smooth or flat contact surface, it improves the bonding terminal part 214 and the bonding pad 210 adhesion between.

According to various embodiments, the bonding pad 210 of the spacer 208 is arranged into a pattern. Figure 3A to Figure 3D is top of arrangement examples of various patterns of bare chip pad 210 spacer 208. As can be seen, these examples include round inner circular (Figure 3A), square of the square (Figure 3B), pattern checkerboard (Figure 3C) and diagonal checkerboard pattern (Figure 3D). Pattern means that these examples are not limiting, and the scope of the present disclosure is not intended to limited by this. Additionally, although the bonding pad 210 shown as substantially square, however, the bonding pad 210, such as circular, rectangular, triangular and the like of the other shape is possible. Similarly, for the purposes of creating pattern, other shapes are possible (for example, can use the circular or triangular checkerboard pattern to create).

Figure 4A and Figure 4B is cross-sectional view of semiconductor die 400, the semiconductor bare chip 400 includes bonding pads 410 another embodiment of, the bonding pad 410 includes a spacer 408. In this embodiment, in bonding pad 410 prior to the formation of, the spacer 408 provided directly above the layer 406 on. Refers to the method described in the before the spacer 408 is formed on the layer 406 on. If necessary, can be in accordance with the pattern of the before described form the spacer 408. Layer 406 is generally such as silicon, copper (cu), aluminum (Al), aluminum-copper alloy, aluminum-silicon alloy, is made of a material such as nickel (Ni). The spacer 408 can be made of include, for example, oxide, nitride, silicon oxide, nitride of any appropriate silicon and so on made of passivation material. Although in Figure 4A and 4B in the cross section of the spacer 408 having a substantially square shape shown, but this does not mean that the limits, other shapes are possible.

Once the spacer 408 properly in the layer 406 need of bonding pad 410 is the position of the, will be for example, copper (cu), aluminum (Al), aluminum-copper alloy, aluminum-silicon alloy, such as nickel (Ni) of the conductive material 402 is deposited on the spacer 408 above, in order to form a spacer 408 the bonding pad 410. Conductive material 402 to form general different from 406 of the material.

Such as chart 4A of in the, conductive material 402 general the top surface is not smooth or flat, and thus define the following contact surface, the contact surface generally defining a plurality of peaks 418a and a plurality of grain 418b (but to clearly purpose, in Figure 4A only marking a plurality of peak and valley several). Such as chart 4B of in the, bonding wire 412 end 414 can be in on the map before 2A and 2B described the contact surface is coupled to the bonding pad 410. Bonding wire connecting end portion 414 filling in the peak 418a valley between 418b in, to the end part of the bonded wire 414 bonded to bonding pad 410. This can be caused by bonding connection end portion 414 and the bonding pad 410 bonded more firmly between. Additionally, the conductive material 402 of the spacer 408 can prevent the end part of the bonding wire 414 and bonding pad 410 the reliability of the bonding between the testing of the end part of the pollutants on the bonding wire 414 and bonding pad 410 in the bonding between the propagation. Moreover, spacer 408 and peak 418a and 418b common provide not smooth or flat contact surface, thereby improving bonding connection end portion 414 and the bonding pad 410 adhesion between. Because spacer 408 by the passivation material or other hard materials such as silicon nitride, so the spacer 408 can be used as the bonding wire connecting end portion 414 of the support structure. When the bonding wire connecting end portion 414 pressed conductive material 402, the, spacer 408 ensure that sufficient conductive material 402 retained in the bonding wire connecting end portion 414 and the layer 406 between. Two adjacent spacer 408 can be used to limit the space between the conductive material 402, thereby maintaining the adhesion and connection.

Although Figure 4B the end part of the bonded wire 414 is not shown completely covers the bonding pad 410, but according to various embodiments, bonding wire connecting end portion 414 can be the entire cover or substantially cover the bonding pad 410. Similarly, if necessary, the end part of the bonding wire 414 can be covered with less bonding pad 410.

Although the bonding pad 210,410 described as coupled to, for example, a semiconductor bare chip 200,400 layer 206,406 layer, but bonding pad 210,410 can be formed in the other type of arranged. For example, bonding pad 210,410 silicon through holes may be located on the (TSV). Additionally, although the present disclosure the bonding pad 210,410 described as including or defining the semiconductor bare chip 200,400 upper, but bonding pad 210,410 can be included in such as semiconductor packaging arrangement, the substrate (including, but not limited to, lead frame, a circuit board, etc.), other types of electronic component. Bonding pad 210,410 and bonding wiring 212,412 can be used in such as the semiconductor bare chip, semiconductor package and the substrate (such as lead frame and circuit board) of the various electronic components, such as providing internal connection. Bonding pad 210,410 and bonding wiring 212,412 also can be used to provide such as semiconductor bare chip, semiconductor package and the substrate (such as lead frame and circuit board) between various of the mutual connection of the electronic assembly.

Figure 5 is flowchart of manufacturing the bonding pad 210 method 500 example. In 502 is, method 500 includes the forming a bonding pad on the electronic component, wherein the bonding pad comprises a conductive material. In 504 is, method 500 includes the conductive material is provided on the surface of passivation material. In 506 is, method 500 further includes removing the passivation material from the surface in order to expose portion of the conductive material comprises a conductive material and thereby forming a bonding pad of the spacer. The spacer is formed by retained on the surface of the conductive material is made of passivation material.

Figure 6 is flow chart of used for making bonding pad 410 method 600 example. In 602 is, method 600 includes in electronic component provided at a position on the passivation material, wherein the passivation material in the electronic assembly is arranged so that part of the pattern of the exposed position. In 604 is, method 600 is included in the position above the passivation material in the depositing a conductive material comprises the passivation material at the bonding pad, wherein the bonding pad of the contact surface is substantially not smooth or flat and define a peak and valley.

The description may use perspective-based descriptions, such as the upper/lower. This kind of description is only for convenience of discussion, is not described here to an embodiment of the application is limited to any particular direction.

The purpose of the disclosure, terms refer to "A/B" or A B. The purpose of the disclosure, terms "B A and/or" means "(A), (B) or (A and B)". The purpose of the disclosure, terms "A, B and C at least one" means "(A), (B), (C), (and A B), (and A C), (and B C) or (A, and B C)". The purpose of the disclosure, terms "(A) B" means "(B) or (AB)", that is, for the optional elements A.

The protection in accordance with the most contribute to the understanding of the subject of the request, the various operating and described as a plurality of discrete operation. However, the order of description should not be regarded as dependent on these implied must be of an order of operation. In particular, the operation can not in accordance with the present the sequential execution. In accordance with the operation of the described embodiment can be different from the order of the execution. In the additional embodiment, can carry out various additional operation and/or the operation of the description can be omitted.

The description the use of expressions "in one embodiment", "in an embodiment" or similar language, each can refer to the same or different embodiment one or more. Furthermore, such as on the disclosed embodiments use of terms "including", "comprising", "having", are synonymous.

Although here shown and described the particular embodiment, however, without deviating from the spirit of the present disclosure, is suitable for realizing the same purpose of a wide variety of alternative and/or equivalent implement example or embodiments may replace the illustrated and described these embodiments. The present disclosure is intended to cover embodiments of the discussion here any adjustment or modification. Therefore, obviously designed to only by the claims and their equivalent to limit programme embodiment described herein.