Flip chip mounting body, flip chip mounting method and flip chip mounting apparatus

FLIP CHIP MOUNTING METHOD AND BUMP FORMING METHOD

A solder resin composition (6) including a solder powder (5a) and a resin (4) is placed on a first electronic component (2), and a connecting terminal (3) of the first electronic component (2) and an electrode terminal (7) of a second electronic component (8) are arranged to face each other. The first electronic component (2) and the solder resin composition are heated to have a gas spouted from a gas generating source (1) included in the first electronic component (2), and the gas (9a) is permitted to flow in a convective manner in the solder resin composition (6). Thus, the solder powder (5a) is flowed in the solder resin composition (6), self-collected on the connecting terminal (3) and the electrode terminal (7), and the connecting terminal (3) and the electrode terminal (7) are electrically connected. The flip chip mounting method by which the electrode terminal of the semiconductor chip wired at a narrow pitch and the connecting terminal of the circuit board can be connected with ...

Preparation method of semiconductor device, and semiconductor device

CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE AND METHOD FOR PRODUCING THE SAME

Disclosed is a circuit connecting material for connecting a first circuit member having a first circuit electrode formed on a major surface of a first substrate with a second circuit member having a second circuit electrode formed on a major surface of a second substrate in such a manner that the first circuit electrode and the second circuit electrode are arranged facing each other. This circuit connecting material contains a curing agent generating free radicals, a radically polymerizable substance, and a compound having a secondary thiol group. This circuit connecting material can be cured in a short time at a low temperature, while being excellent in storage stability.

RESIN COMPOSITION FOR AN ADHESIVE FILM, AND ADHESIVE FILM USING SAME

The present invention relates to a resin composition for an adhesive film and to an adhesive film using same. The resin composition for an adhesive film of the present invention comprises a thermoplastic resin, a thermosetting resin, a photolatent curing agent and an organic solvent. In the present invention, provided are an adhesive film and a resin composition for the adhesive film which contains a photolatent curing agent and has excellent room temperature storage properties and a quasi-limitless shelf life, and which can be cured in a short time under low temperature conditions of below 120°C and more particularly temperature conditions which are very low as compared with existing processing of below 100°C, and which ensures high reliability of the package itself and has an outstanding adhesive force.

A METHOD FOR ATTACHING CHIPS TO A TRANSPONDER

The present invention relates to a method for supplying chips (2) to cavities (5) of a chip carrier web (4) by allowing the chips (2) to flow over the chip carrier web (4) in a medium. The medium is a gas. The presentinvention also relates to a method for attaching chips (2) to transponders on a transponder web (1)comprising successive and/or adjacent circuitry patterns (3), or to a structural part web, from which structuralparts are separated and attached to the transponder web. The chips (2), which are located in cavities (5) of achip carrier web (4), are attached to precise locations on the transponder web (1), or the structural part web by bringing the transponder web (1), or the structural part web and the chips (2) in contact with each other in a nip (N1).

Anisotropically conducting adhesive, and process for producing an anisotropically conducting adhesive

An anisotropically conducting adhesive includes a thermoplastic base material; and particles which include metal particles and metal ions, which are electrically conductive, and which are finely distributed within the thermoplastic base material below a percolation threshold, wherein the particles are enriched in certain regions under the influence of exposure to at least one of light and heat. A process for producing an anisotropically conducting adhesive includes providing a material comprised of thermoplastic base material in which electrically conductive particles including metal particles and metal ions are dispersed; and exposing the material to at least one of light and heat in predetermined regions in a targeted manner so that a targeted local heating occurs in the exposed regions and an increased mobility of the metal particles and metal ions occurs which is effective to provide a plurality of anisotropically electrically conductive paths having an enriched amount of the electrically ...

ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE

An electronic device includes a substrate, an electronic element mounted on the substrate, bumps that electrically connect the substrate to the electronic element, dummy bumps that are formed on the substrate to surround the electronic element, and a side fill that is formed around the electronic element and is in contact with the dummy bumps. 1. An electronic device , comprising:a substrate;an electronic element mounted on the substrate;bumps that electrically connect the substrate to the electronic element;dummy bumps that are formed on the substrate to surround the electronic element; anda side fill that is formed around the electronic element and is in contact with the dummy bumps.2. The electronic device as claimed in claim 1 , whereinthe electronic element is a light-emitting element or a light-receiving element;the substrate includes an opening that is formed in a position corresponding to a light emitter of the light-emitting element or a light receiver of the light-receiving element; andthe bumps are formed around the opening.3. A method for manufacturing an electronic device claim 1 , the method comprising:forming bumps on a substrate;connecting an electronic element via the bumps to the substrate;after connecting the electronic element to the substrate, forming dummy bumps on the substrate;applying a side fill resin onto the bumps and the dummy bumps; andcuring the side fill resin. The present application is based upon and claims the benefit of priority of Japanese Patent Application No. 2017-029990, filed on Feb. 21, 2017, the entire contents of which are incorporated herein by reference.An aspect of this disclosure relates to an electronic device and a method for manufacturing the electronic device.An electronic device including a light-emitting element and a light-receiving element is used in the field of optical communication. Such an electronic device is called an optical module and is used for high-speed optical communication performed by, for ...

Method for producing semiconductor chip with adhesive film, adhesive film for semiconductor used in the method, and method for producing semiconductor device

The method for producing a semiconductor chip with an adhesive film of the present invention comprises steps of preparing a laminate in which at least a divided semiconductor wafer comprising a plurality of semiconductor chips, obtained by forming a cut which separates the semiconductor wafer into a plurality of semiconductor chips on one side of the semiconductor wafer in a thickness less than that of the semiconductor wafer and by grinding the other side of the semiconductor wafer on which no cut is formed to reach the cut, an adhesive film for a semiconductor and a dicing tape are laminated, the adhesive film for a semiconductor having a thickness in the range of 1 to 15 m and a tensile elongation at break of less than 5%, and the tensile elongation at break being less than 110% of the elongation at a maximum load; and dividing the adhesive film for a semiconductor by picking up the plurality of semiconductor chips in a laminating direction of the laminate, thereby preparing a semiconductor ...

FLIP CHIP MOUNTING METHOD AND METHOD FOR CONNECTING SUBSTRATES

A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 21 are disposed in mutually facing relation and a resin 13 containing conductive particles 12 and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin 13 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 13. The resin 13 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof. The resin 13 pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board 10 and the semiconductor chip 20. In this state, by pressing the semiconductor chip 20 against the circuit board 10, the conductive particles ...

Verfahren zur Herstellung von Klebeverbindungen für Elektronik- und Mikroelektronikanwendungen

A method for attaching chips to a transponder

Electronic component and process for producing same

ELECTRONICS COMPONENT IN THE FORM OF INTEGRATED CIRCUIT FOR HOT INSERTION IN A SUBSTRATE AND PROCESSES FOR SA MANUFACTURE

CHIP STACK PACKAGE HAVING PILLAR BUMP USING METAL BUMP AND MANUFACTURING METHOD THEREOF

ADHESIVE COMPOSITION, CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE OF CIRCUIT CONNENCTOR, AND SEMICONDUCTOR DEVICES

INTERLAYER DIELECTRIC AND PRE-APPLIED DIE ATTACH ADHESIVE MATERIALS

FLIP CHIP MOUNTING METHOD AND METHOD FOR CONNECTING SUBSTRATES

A flip chip mounting method and a method for connecting substrates, which are applicable to next generation LSI flip chip mounting and have high productivity and reliability. A circuit board (21) having a plurality of connecting terminals (11) and a semiconductor chip (20) having a plurality of electrode terminals (12) are arranged to face each other, and a resin (13) containing conductive particles (12) and an air bubble generating agent is supplied to a space between the circuit board and the semiconductor chip. In such state, the resin (13) is heated, air bubbles (30) are generated from the air bubble generating agent contained in the resin (13), and the resin (13) is pushed to the outside of the air bubbles (30) by growth of the generated air bubbles (30). The pushed out resin (13) are self-collected between the circuit board (10) and the terminals of the semiconductor chip (20) in a column shape. In such state, by pressing the semiconductor chip (20) to the circuit board (10), the ...

A method and system for bonding electrical devices using an electrically conductive adhesive

A system (10) for bonding electrical devices (13, 15) using an electrically conductive adhesive (14) to adhere the electrical devices (13, 15) together, the system (10) comprising: an ultrasonic transducer (11) to generate an ultrasonic vibration; and an ultrasonic to thermal energy apparatus (20) operatively attached to and covering an operational end (12) of the ultrasonic transducer (11), the ultrasonic to thermal energy apparatus (20) damping the ultrasonic vibration to minimise ultrasonic vibration transmitted to a first electrical device (13) and causing the conversion of the ultrasonic vibration to a heating pulse which is conducted through the first electrical device (13) to the adhesive (14); wherein the adhesive (14) is softened by the heating pulse to bond the electrical devices (13, 15) together.

METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE BY CONNECTING AN INTEGRATED CIRCUIT TO A SUBSTRATE USING A LIQUID CRYSTAL POLYMER LAYER WITH OPENINGS AND A CORRESPONDING DEVICE

A method of making an electronic device (10) includes forming an electrically conductive pattern (12) on a substrate (11), forming a cover layer (e.g. a liquid crystal polymer (LCP) cover layer) (13) on the substrate (11) and the electrically conductive pattern (12), forming openings (16a, 16b, 16c) in the cover layer (13) and being aligned with the electrically conductive pattern (12), positioning an integrated circuit (IC) (17) on the cover layer (13) so that bond pads (18a, 18b, 18c) of the IC (17) are aligned with the openings (16a, 16b, 16c) and heating under pressure the cover layer (13) to both mechanically secure and electrically interconnect the IC (17) to the substrate (11). An electrically conductive material (14) (solder paste, conductive epoxy, gold stud bump or solder-capped copper pillar) may be filled in the openings (16a, 16b, 16c) before the positioning of the IC (17). The substrate (11) may be a liquid crystal polymer substrate.

SURFACE-COVERING STRUCTURE AND METHOD FOR PRODUCING A SURFACE-COVERING STRUCTURE

The invention relates to a surface-covering structure (0) which comprises a first layer (1, 21), a recess (2, 22) in the first layer (1) and at least one electronic module (4, 8) in the recess (2, 22).

REWORKABLE POLY(ETHYLENE-VINYL ALCOHOL) ADHESIVE FOR ELECTRONIC APPLICATIONS

The present invention provides a reworkable, semi-crystalline thermoplastic adhesive composition, suitable for bonding electronic components. The adhesive composition, preferably provided as an adhesive film, includes one or more poly(ethylene-vinyl alcohol) copolymers.

Semiconductor device connected by anisotropic conductive film

A semiconductor device connected by an anisotropic conductive film, the film having a storage modulus of 100 MPa to 300 MPa at 40° C. after curing of the film, and a peak point of 80° C. to 90° C. in a DSC (Differential Scanning calorimeter) profile of the film.

Reworkable die attachment

An integrated circuit is reworkably attached to a circuit board in a manner that forms a compliant bond which is stable under conditions of high thermal stress and thermal coefficient of expansion mismatch. A thermoplastic adhesive having a melting temperature higher than integrated circuit operating temperature is coated on the integrated circuit and dried. The adhesive is then cured. The coated integrated circuit is bonded to the circuit board with a thermosetting epoxy having a low curing temperature, such that curing the adhesive does not damage the circuit board. The integrated circuit is readily removed from the circuit board without damaging the board by heating the integrated circuit to soften the bond between the integrated circuit and the circuit board at the thermoplastic adhesive interface. An alternate embodiment of the invention provides a copper plate interface that is soldered to the circuit board, and to which an integrated circuit is permanently bonded. Reworkability is ...

Semiconductor package

A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit, a first semiconductor chip stack and a second semiconductor chip stack on the horizontal unit, and a molding member that surrounds the lower semiconductor chip, the first and second semiconductor chip stacks, and the heat emission member. The vertical unit may be arranged between the first semiconductor chip stack and the second semiconductor chip stack, and an upper surface of the vertical unit may be exposed in the molding member.

3D-JOINING OF MICROELECTRONIC COMPONENTS WITH CONDUCTIVELY SELF-ADJUSTING ANISOTROPIC MATRIX

... 3D joining of microelectronic components and a conductively self-adjusting anisotropic matrix are provided. In an implementation, an adhesive matrix automatically makes electrical connections between two surfaces that have electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

Semiconductor element and semiconductor device

A semiconductor element is provided with electrode pads which are arranged on a front surface of an element main body, an insulating protection film which covers the front surface of the element main body excepting its outer peripheral area while exposing the electrode pads, and an insulating adhesive layer which is formed to cover a back surface, a sidewall surface and a corner between the front surface and the sidewall surface of the element main body. A plurality of semiconductor elements are stacked on a circuit substrate. The semiconductor elements are adhered via the insulating adhesive layer.

3D-joining of microelectronic components with conductively self-adjusting anisotropic matrix

... 3D joining of microelectronic components and a conductively self-adjusting anisotropic matrix are provided. In an implementation, an adhesive matrix automatically makes electrical connections between two surfaces that have electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

Verfahren zum Verkleben eines Bauelements mit einer Oberfläche

MICRO-SYSTEM ELEMENT AND PROCEDURE FOR STICKING MICRO CONSTRUCTION UNITS ON A SUBSTRATE

Adhesive composition, circuit connection material, circuit member connection structure and semiconductor device

PROCEEDED Of ASSEMBLY Of AT LEAST a CHIP WITH a TELEGRAPHIC ELEMENT, ELECTRONIC CHIP HAS DEFORMABLE CONNECTION ELEMENT, MANUFACTORING PROCESS Of a PLURALITY OF CHIPS, AND ASSEMBLY Of AT LEAST a CHIP WITH a TELEGRAPHIC ELEMENT

Le procédé d'assemblage d'un élément filaire avec une puce électronique comporte dans une première étape la disposition de l'élément filaire dans une rainure de la puce délimitée par un premier élément (8) et un deuxième élément (8'), reliés par un élément de liaison (6) comprenant un matériau plastiquement déformable, puis dans une deuxième étape le serrage des premier et deuxième éléments (8, 8') pour déformer l'élément de liaison (6) jusqu'à la fixation de l'élément filaire dans la rainure. The method of assembling a wire element with an electronic chip comprises in a first step the arrangement of the wire element in a groove of the chip delimited by a first element (8) and a second element (8 '), connected by a connecting element (6) comprising a plastically deformable material, then in a second step the clamping of the first and second elements (8, 8 ') to deform the connecting element (6) until the attachment of the wire element in the groove.

칩 패키징 장치 및 그 방법

... 칩 패키징 장치가 개시된다. 칩 패키징 장치는 적어도 하나의 칩 공급 디바이스; 대응하는 칩 공급 디바이스에 의해 제공되는 칩을 처리하도록 구성된 적어도 하나의 칩 처리 디바이스 및 적어도 하나의 칩 이송 디바이스를 포함하고, 각 칩 이송 디바이스는 복수의 접합 헤드를 가지며, 접합 헤드 각각은 대응하는 칩 처리 디바이스에 의해 처리된 하나의 칩을 이송하는데 사용된다. 각 칩 처리 디바이스는 적어도 두 개의 픽업 플랫폼을 포함하며, 픽업 플랫폼 각각은 다수의 칩이 동시에 이에 제공될 수 있도록 구성되고, 대응하는 칩 이송 디바이스 상의 복수의 접합 헤드는 각 픽업 플랫폼으로부터 다수의 칩을 한 번에 동시에 픽업하도록 구성된다. 칩 패키징 방법도 개시된다.

고 효율 열 경로들을 가진 적층형 반도체 다이 어셈블리들을 제조하는 방법들

... 반도체 다이 어셈블리들을 패키징하기 위한 방법. 일 실시예에서, 방법은 제 1 다이 및 제 1 다이 위에서 스택으로 배열된 복수의 제 2 다이들을 가진 반도체 다이 어셈블리를 패키징하는 것에 관한 것이며, 제 1 다이는 제 2 다이들의 스택으로부터 바깥쪽으로 측방향으로 연장된 주변 영역을 가진다. 방법은 제 1 다이의 주변 영역에 열 전달 구조를 결합하는 단계 및 제 2 다이들 사이에 언더필 재료를 흘려보내는 단계를 포함할 수 있다. 언더필 재료는 열 전달 구조가 언더필 재료의 측방향 흐름을 제한하도록 제 1 다이의 주변 영역에 열 전달 구조를 결합한 후 흘려보내진다.

CHIP STACKED PACKAGE USING PILLAR TYPE BUMPS CAPABLE OF SECURING PREDETERMINED SPACE BETWEEN ADJACENT CHIPS AND MANUFACTURING METHOD THEREOF

PURPOSE: A chip stacked package and its manufacturing method are provided to secure enough space between adjacent chips and to prevent the damage of a circuit pattern due to the difference of a thermal expansion coefficient between a spacer and a protection layer using a plurality of pillar type bumps. CONSTITUTION: A package substrate(310) includes an upper surface with a predetermined metal pattern and a lower surface. A plurality of chips(321,322) are stacked on the upper surface of the package substrate. Each chip has an active surface with bonding pads and non-conductive dummy pads and a rear surface. A bonding wire(340) is used for connecting electrically the bonding pad of the chip with the metal pattern of the package substrate. A plurality of pillar type bumps(360) are interposed between the chips to keep the distance between the chips in a predetermined range. © KIPO 2007 ...

FILM-LIKE ADHESIVE, PROCESS FOR PRODUCING THE SAME, ADHESIVE SHEET AND SEMICONDUCTOR DEVICE

ADHESIVE COMPOSITION, CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE OF CIRCUIT CONNECTORS, AND SEMICONDUCTOR DEVICES

An adhesive composition which contains an adhesive component comprising a thermoplastic resin, a radical-polymerizable compound, and a radical polymerization initiator, wherein the adhesive component exhibits a signal in the ESR measurement at 25°C.

ADHESIVE SHEET, AND CONNECTING STRUCTURE FOR CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE WHICH USE THE ADHESIVE SHEET

Disclosed is an adhesive sheet which comprises a substrate material and an adhesive layer provided on the substrate material and comprising an adhesive composition, wherein the thickness (Ts) of the substrate material and the thickness (Ta) of the adhesive layer satisfy the requirement expressed by the formula (1) and the thickness (Ts) is 42 μm or less. 0.40 ≤ Ta/Ts ≤ 0.65 (1) ...

ELECTRONIC COMPONENT MOUNTING STRUCTURE

An electronic component mounting structure includes: an electronic component including a plurality of bump electrodes that includes a base resin provided on an active face of the electronic component and a plurality of conductive films that cover a part of a surface of the base resin, expose an area excluding the part of the surface, and are electrically coupled to a plurality of electrode terminals provided on the active face; and a substrate including a plurality of terminals. In the structure, the electronic component is mounted on the substrate, and the base resin includes: a first opening surrounding the plurality of the electrode terminals; a connection portion in which a part of one ends of the plurality of the conductive films that are drawn out on the surface of the base resin is disposed, the other ends of the conductive films being coupled to the electrode terminals; and a bonding portion that is bonded to the substrate, and is formed in an area excluding the first opening and ...

Semiconductor devices and semiconductor devices including a redistribution layer

A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.

Integrated circuit packaging system with ultra-thin chip and method of manufacture thereof

A method of manufacture of an integrated circuit packaging system includes: providing a circuit substrate having an active side opposite to an inactive portion; attaching a nonconductive cover to the active side; forming a separation-gap partially cutting into the nonconductive cover and the circuit substrate to a kerf depth; attaching a back-grinding tape to the nonconductive cover; removing a portion of the inactive portion; and exposing the nonconductive cover by removing the back-grinding tape.

CONTACT-BONDING DEVICE

A compression bonding device capable of packaging electric components on both sides of a substrate is provided. A compression bonding device 1 includes first and second pressing rubbers 15, 25. Electric components 32, 33 can be simultaneously packaged on the front face and the rear face of a substrate 31 by sandwiching the substrate 31 between the first and second pressing rubbers 15, 25. The electric components 32, 33 are not subjected to a force for horizontally moving them because the first and second pressing rubbers 15, 25 are prevented from horizontal extension by a first dam member 16. Thus, the electric components 32, 33 are connected to the substrate 31 without misalignment, thereby obtaining a highly reliable electric device 30a.

METHOD FOR GLUING A SURFACE TO A COMPONENT

By using a specially modified epoxide-based adhesive, surfaces can be glued both precisely and quickly to a component. The parts which are to be glued are precisely adjusted to the gluing area, fixed by UV light and subsequently thermally hardened.

THICKNESS FILM CONDUCTOR COMPOSITION HAVING IMPROVED ADHESIVENESS

PROBLEM TO BE SOLVED: To improve the adhesiveness of soldering while minimizing the reduction of conductive solderability by compounding a metallic conductor phase, inorg. binder phase and specific adhesion accelerator at specific ratios. SOLUTION: This thick film conductor compsn. is a base paste which consists of (A) 50 to 90 wt.% pulverized metallic conductor phase, (B) 1 to 18 wt.% inorg. binder phase and (C) 0.01 to 3.0 wt.% adhesion accelerator expressed by the general formula: [Ma1+]x[Mb2+]1-xAl2-xSi2+xO8 (Ma is Na or K; Mb is Ca; (x) is 0 to 1) and in which all of A, B and C are dispersed in an org. medium. C is, for example, crystalline anorthite, orthoclase or albite. The metallic conductor phase consists of, for example, Ag:Ag+Pd:Ag+Pt and the Pd content is 0 to 20 wt.% and the Pt content is 0 to 20 wt.%. The inorg. binder is, for example, one or ≥2 glass (e.g.: bismuthic acid frit) or oxide (e.g.: a mixture composed of copper oxide, pyrochlore compd., cobalt oxide, lead oxide ...

AN ADMISSION AND A FILE ASSEMBLY AROUND A FILM TO TRANSPORTING

Adhesive film for semiconductor, semiconductor chip, and method for processing semiconductor device

FLIP-ATTACHED AND UNDERFILLED STACKED SEMICONDUCTOR DEVICES

A tape for use as a carrier in semiconductor assembly, which has one or more base sheets (101) of polymeric, preferably thermoplastic, material having first (101a) and second (101b) surfaces. A polymeric adhesive film (102, 104) and a foil (103, 105) of different, preferably inert, material are attached to the base sheet on both the first and second surface sides; they thus provide a thickness (120) to the tape. A plurality of holes is formed through the thickness of the tape; the holes are preferably tapered with an angle between about 70° and 80° with the second tape surface. A reflow metal element (301), with a preferred diameter (302) about equal to the tape thickness, is held in each of the holes.

FLIP CHIP MOUNTING METHOD AND BUMP FORMING METHOD

A flip chip mounting method and a bump forming method which are applicable to next generation LSI flip chip mounting and have high productivity and reliability. A resin (14) containing a solder powder (16) and an air bubble generating agent is supplied to a space between a circuit board (21) having a plurality of connecting terminals (11) and a semiconductor chip (20) having a plurality of electrode terminals (12). Then, the resin (14) is heated and air bubbles (30) are generated from the air bubble generating agent contained in the resin (14). The resin (14) is pushed to the outside of the air bubbles by growth of the generated air bubbles (30), and are self-collected between the connecting terminals (11) and the electrode terminals (12). Furthermore, by heating the resin (14) and melting the solder powder (16) contained in the self-collected resin (14) between the terminals, a connector is formed between the terminals and a flip chip mounting body is completed.

Process for Forming Bumps and Solder Bump

There is provided a process for forming bumps wherein a plurality of fine bumps are uniformly formed with high productivity. In this process, a resin (13) comprising solder powder and a convection additive (12) is supplied onto a substrate (10) having a plurality of electrodes (11) thereon. And subsequently the substrate (10) is heated to a temperature that enables the solder powder to melt while keeping a flat plate (14) in contact with a surface of the supplied resin (13). During this heating step, the molten solder powder is allowed to self-assemble onto the electrodes (11) so that a plurality of solder balls resulting from the grown molten solder powder are concurrently formed on the electrodes (11) in self-alignment manner. Finally, by moving the flat plate (14) away from the surface of the supplied resin (13), followed by removing such resin (13), there is provided the substrate (10) wherein the bumps (16) are formed on the plurality of the electrodes.

Stacked die with a recess in a die BGA package

Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.

Fabrication method of semiconductor circuit device

When a semiconductor wafer is formed to be thin, steps need to be taken to prevent warping of the wafer. For this purpose, a protective tape is affixed to a surface of the semiconductor wafer, and a back side of the semiconductor wafer is then ground to a predetermined thickness. A die bonding film is affixed to the back side of the semiconductor wafer, and a dicing tape is affixed on the die bonding film. The dicing tape that is affixed to the semiconductor wafer is held by a holding jig. The protective tape is peeled off from the wafer surface, and the die bonding film is heated to improve the adherence between the semiconductor wafer and the die bonding film. The semiconductor wafer is subjected to dicing for separation into individual semiconductor chips. The semiconductor chips are then die-bonded in a predetermined number onto a wiring substrate to fabricate a semiconductor device.

A-staged Thermoplastic-Polyimide (TPI) Adhesive Compound Containing Flat Inorganic Particle Fillers and Method of Use

A compound and method of use thereof consisting of an A-staged thermoplastic-polyimide (TPI) adhesive, a viscous uncured liquid of polyamic-acid polymer (PAA), the TPI precursor, synthesized and dissolved in a polar aprotic organic solvent, and including, as appropriate, combinations of flat particulate inorganic ceramic and/or metallic electrically insulating, and/or electrically conducting, and/or thermally conducting fillers for interface-bonding to create a robust joint between surfaces with conventional lamination processes that utilize relatively moderate temperatures and applied pressures, such particles resulting in the reduction of the occurrence and size of gas voids within the adhesive bondline. 1. The process of reducing the occurrence and size of gas voids in a bondline formed by the thermoplastic polyimide adhesive interface bonding of two surfaces , said process comprising in combination: 1. a quantity of polar aprotic organic solvent;', '2. a quantity of TPI precursor polyamic-acid polymer (PAA) synthesized and dissolved in said solvent wherein said polyamic-acid polymer comprises a mixture of diamine and dianhydride monomers, said monomers selected, in combination, to result in a thermoplastic polyimide having the characteristic of being insoluble in an organic solvent in the fully imidized, fully cured state, and', '3. a quantity of flat particulate filler; said filler comprising an inorganic material having a particle size of between 0.1 and 2.0 um in thickness, and 1.0 and 20.0 um in width and wherein the width of said particles is greater than the thickness;, 'A. providing an adhesive solution consisting of an A-staged uncured thermoplastic-polyimide (TPI) solution, said thermoplastic polyimide having the characteristic of being insoluble in an organic solvent in the fully imidized, fully cured state, in the form of a viscous liquid solution containing in combinationB. applying said uncured solution to at least one of said surfaces;C. applying ...

CONDUCTIVE FILM ADHESIVE

An inventive composition and process for formation of a conductive bonding film are disclosed. The invention combines adhesive bonding sheet technologies (e.g. die attach films, or DAFs) with the electrical and thermal conductivity performance of transient liquid phase sintered paste compositions. The invention films are characterized by high bulk thermal and electrical conductivity within the film as well as low and stable thermal and electrical resistance at the interfaces between the inventive film and metallized adherends.

Method for making electronic device with cover layer with openings and related devices

A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.

ELECTRONIC DEVICE AND ITS REPRODUCTIVE PRODUCTION

PURPOSE: To make a bare chip replasable by fixing the bare chip on a substrate with heat-plastic adhesive so as to melt the adhesive with reheating. CONSTITUTION: A conductive layer 2 with desired pattern is printed on a ceramic wiring substrate 1, and heat-plastic adhesive 3 is printed on the section where the chip is to be attached. Then a bare chip 4 is placed on the adhesive 3, and the adhesive 3 is heated with a heater 5 to fix the bare chip 4 on the wiring substrate 1. A wire 6 is spread between the electrode of the bare chip 4 and the specified conductive layer 2. Then, a probe needle 4 is contacted with the conductive layer 2 to inspect the characteristics. The bare chip 4 proved to be defective is partially heated with a small heater to melt the adhesive 3. Then, the bare chip 4 is replaced. COPYRIGHT: (C)1986,JPO&Japio ...

Mikrosystembauelement und Verfahren zum Kleben von Mikrobauteilen auf ein Substrat

Ein Verfahren zum Kleben von Mikrobauteilen auf ein Substrat (1) bei der Herstellung von Mikrosystembauelementen hat die Schritte: DOLLAR A - Auftragen eines reaktiven oder nicht reaktiven Schmelzklebstoffs (5) auf das Mikrobauteil (18) und/oder das Substrat (1); DOLLAR A - Erwärmen des Schmelzklebstoffs (5), und DOLLAR A - Aufbringen des mindestens einen Mikrobauteils (18) auf das Substrat (1), wobei der Schmelzklebstoff (5) auf den Kontaktflächen zwischen Mikrobauteil (18) und Substrat (1) ist.

A METHOD FOR ATTACHING CHIPS TO A TRANSPONDER

METHOD FOR CEMENTING A COMPONENT TO A SURFACE

By using a specially modified epoxide-based adhesive, surfaces can be glued both precisely and quickly to a component. The parts which are to be glued are precisely adjusted to the gluing area, fixed by UV light and subsequently thermally hardened.

CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE AND METHOD FOR PRODUCING THE SAME

INTERLAYER DIELECTRIC AND PRE-APPLIED DIE ATTACH ADHESIVE MATERIALS

FILM-LIKE ADHESIVE, PROCESS FOR PRODUCING THE SAME, ADHESIVE SHEET AND SEMICONDUCTOR DEVICE

A die bonding film-like adhesive capable of being laminated on the rear surface of a wafer at a temperature lower than the softening point of a protective tape for an extremely thin wafer or a dicing tape being pasted while reducing thermal stress, e.g. warp, of the wafer and simplifying production process of a semiconductor device and exhibiting excellent heat resistance and reliability of moisture resistance; an adhesive sheet being produced by pasting the film-like adhesive and the dicing tape; and a semiconductor device. © KIPO & WIPO 2007 ...

3D IC decoupling capacitor structure and method for manufacturing the same

A semiconductor structure is disclosed. The semiconductor structure includes: a polymer base layer; a backside redistribution layer (RDL) over the polymer base layer; a molding layer over the backside RDL; a polymer layer over the molding layer; a front side RDL over the polymer layer; and a metal-insulator-metal (MIM) capacitor vertically passing through the molding layer, the MIM capacitor including a first electrode, an insulation layer and a second electrode, wherein the insulation layer surrounds the first electrode, and the second electrode surrounds the insulation layer, and the molding layer surrounds the second electrode. An associated method for manufacturing a semiconductor structure is also disclosed.

METHOD FOR MAKING ELECTRONIC DEVICE WITH COVER LAYER WITH OPENINGS AND RELATED DEVICES

A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.

Semiconductor devices

A semiconductor device comprising a semiconductor element; a substrate; and a hot-melt adhesive sheet bonding the semiconductor element to the substrate, wherein the hot-melt adhesive sheet comprises a spacer having the form of a sheet and a hot melt adhesive on both sides of the spacer. A semiconductor device comprising a semiconductor element; a substrate; and a hot-melt adhesive sheet bonding the semiconductor element to the substrate, wherein the hot-melt adhesive sheet comprises a mixture of a hot melt adhesive and a spacer, wherein the adhesive is selected from a silicone-modified epoxy resin adhesive, a silicone adhesive, and a silicone-modified polyimide adhesive, and the spacer has the form of particles.

METHOD AND DEVICE INCLUDING REWORKABLE ALPHA PARTICLE BARRIER AND CORROSION BARRIER

A method and device comprising an easily reworkable alpha particle barrier is provided. The easily reworkable alpha particle barrier is applied in the space between the surface of the chip and the surface of the substrate, and reduces soft error rate (SER). Further, the easily reworkable alpha particle barrier material is chosen from the group of an organic material, a hydrocarbon, more specifically a polyalphaolefin (PAO) oil, and a polymer or filled polymer; wherein the polyalphaolefin oil has a viscosity below 1000 cSt (at 100° C.). The easily reworkable alpha particle barrier material can be used with multichip modules (MCM's) allowing easy device rework of one or more dies without affecting other dies on the same substrate.

Electronic device and method of manufacturing electronic device

An electronic device includes: a first electronic component; first members that are provided on a first surface of the first electronic component and that include outside surfaces configured to face diagonally upward with respect to the first surface; a second electronic component provided above the first surface; second members that are provided corresponding to the first members on a second surface of the second electronic component which faces the first surface and that include inside surfaces configured to face diagonally downward with respect to the second surface and configured to face the outside surfaces; and solder that is provided between the first surface and the second surface and that electrically connects the first electronic component and the second electronic component.

Imagermodul für eine Fahrzeug-Kamera und Verfahren zu dessen Herstellung

Die Erfindung betrifft ein Imagermodul (1) für eine Fahrzeug-Kamera, wobei das Imagermodul (1) mindestens aufweist: einen Linsenhalter (3), ein in dem Linsenhalter (3) aufgenommenes Objektiv (4), eine flexible Leitereinrichtung (2) mit Leitungen (10), und einen mit den Leitungen (10) der flexiblen Leitereinrichtung (2) kontaktierten Bildsensor (5), der eine Vorderseite mit einer sensitiven Fläche aufweist, wobei der Bildsensor (5) in Flip-Chip-Technik über an seiner Vorderseite (5b) vorgesehene Stud-Bumps (6) mit den Leitungen (10) kontaktiert ist. Hierbei ist vorgesehen, dass der Linsenhalter (3) ein Kunststoff-Teil (17), insbesondere Spritzgussteil, mit einem Tubusbereich (3a) zur Aufnahme des Objektivs (4) und einem eine Unterseite (3c) aufweisenden Befestigungsbereich (3b) aufweist, und die flexible Leitereinrichtung (2) auf der Unterseite (3c) des Befestigungsbereich (3b) stoffschlüssig angebracht ist, und zwischen der Vorderseite (5b) des Bildsensors (5) und der flexiblen Leitereinrichtung ...

Producing package-on-package electronic circuits, involves sticking a chip on a bottom package to an interposer using radiation-curable thermoplastic adhesive, soldering on a top package and irradiating the adhesive

A method for the production of electronic circuits in a package-on-package configuration involves sticking a semiconductor element located on a bottom package to a rewiring board (interposer) with the aid a radiation-crosslinkable thermoplastic adhesive, soldering a top package onto the interposer using pre-applied solder bumps and then irradiating the adhesive to form a strong joint. A method for the production of an electronic circuit in a package-on-package configuration (10) comprising (A) a lower sub-assembly (bottom package; 10a) with a first semiconductor element (11), a first wiring carrier (12) and a first housing with a rewiring circuit board (13) carrying an array of solder balls (14), and (B) an upper sub-assembly (top package; 15) with a second semiconductor element (16). The method involves (a) applying a radiation-crosslinkable thermoplastic adhesive (18) to the top of (11) or to a side of the first housing facing (11), (b) placing the first housing with (13) onto (11) so ...

Lead-on-chip semiconductor device

In order to fix a semiconductor chip 3 to an inner lead portion 1a of a lead 1, an insulating adhesive tape 2 is used which has a thermoplastic adhesive agent 2b on the inner lead portion side surface of a polyimide tape 2a and a thermosetting adhesive agent 2c on the semiconductor chip side surface of the polyimide tape 2a. During heat treatment when the semiconductor chip 3 is adhered and fixed to the inner lead portion 1a by means of the insulating adhesive tape 2, the organic component contained within the thermosetting adhesive agent 2c is largely prevented from escaping from the adhesive and adhering to the lead surface, thus improving the bonding performance of a metallic thin wire 4 to the lead 1. ...

FILM ADHESIVES CONTAINING MALEIMIDE AND RELATED COMPOUNDS AND METHODS FOR USE THEREOF

Adhesive sheet, and connecting structure for circuit member and semiconductor device which use the adhesive sheet

Disclosed is an adhesive sheet which comprises a substrate material and an adhesive layer provided on the substrate material and comprising an adhesive composition, wherein the thickness (Ts) of the substrate material and the thickness (Ta) of the adhesive layer satisfy the requirement expressed by the formula (1) and the thickness (Ts) is 42 [mu]m or less. 0.40 = Ta/Ts = 0.65 (1).

CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE AND METHOD FOR PRODUCING THE SAME

Disclosed is a circuit connecting material for connecting a first circuit member having a first circuit electrode formed on a major surface of a first substrate with a second circuit member having a second circuit electrode formed on a major surface of a second substrate in such a manner that the first circuit electrode and the second circuit electrode are arranged facing each other. This circuit connecting material contains a curing agent generating free radicals, a radically polymerizable substance, and a compound having a secondary thiol group. This circuit connecting material can be cured in a short time at a low temperature, while being excellent in storage stability. COPYRIGHT KIPO & WIPO 2010 ...

Anisotropic conductive film, composition for the same and semiconductor device

Anisotropically conducting adhesive, and process for producing an anisotropically conducting adhesive

PCT No. PCT/DE95/00769 Sec. 371 Date Dec. 27, 1996 Sec. 102(e) Date Dec. 27, 1996 PCT Filed Jun. 16, 1995 PCT Pub. No. WO96/00969 PCT Pub. Date Jan. 11, 1996An anisotropically conducting adhesive includes a thermoplastic base material; and particles which include metal particles and metal ions, which are electrically conductive, and which are finely distributed within the thermoplastic base material below a percolation threshold, wherein the particles are enriched in certain regions under the influence of exposure to at least one of light and heat. A process for producing an anisotropically conducting adhesive includes providing a material comprised of thermoplastic base material in which electrically conductive particles including metal particles and metal ions are dispersed; and exposing the material to at least one of light and heat in predetermined regions in a targeted manner so that a targeted local heating occurs in the exposed regions and an increased mobility of the metal particles ...

THERMALLY CONDUCTIVE COMPOSITE AND USES FOR MICROELECTRONIC PACKAGING

SEMICONDUCTOR COMPONENT FABRICATION METHOD AND SEMICONDUCTOR COMPONENT

A method of manufacturing a semiconductor component of the present invention has: obtaining a semiconductor wafer having stud electrodes formed on a functional surface thereof, and a circuit board having solder bumps on one surface and having electrode pads on the other surface thereof; bonding the semiconductor wafer and the circuit board, while providing a resin layer having a flux activity between the semiconductor wafer and the circuit board, and so as to bring the stud electrodes into contact with the solder bumps, while penetrating the resin layer having a flux activity, to thereby obtain a bonded structure; applying a solder material onto the electrode pads of the bonded structure; and dicing the bonded structure to obtain a plurality of semiconductor components.

Adhesive composition and circuit member connection structure

Verfahren zum Verbinden integrierter Schaltungschips an Substraten

Attachment of surface mount devices to printed circuit boards using a thermoplastic adhesive

REWORKABLE ADHESIVE FOR ELECTRONIC APPLICATIONS

... 2083514 9118957 PCTABS00008 Reworkable adhesive that has a high shear strength through a range of use temperatures but which has a low strength and is reworkable at a suitable processing.

METHOD FOR ASSEMBLING AT LEAST ONE CHIP TO A WIRE ELEMENT, ELECTRONIC CHIP DEFORMABLE CONNECTING ELEMENT, METHOD OF MANUFACTURING A PLURALITY OF CHIPS, AND MOUNTING AT LEAST ONE CHIP WITH A WIRE ELEMENT

ADHESIVE COMPOSITION, FILMY ADHESIVE, ADHESIVE SHEET, AND SEMICONDUCTOR DEVICE MADE WITH THE SAME

An adhesive composition which can reconcile, to a high degree, process characteristics including suitability for filling on an adherend (suitability for infiltration) and suitability for low-temperature laminating with semiconductor device reliability such as reflow resistance; and a filmy adhesive, an adhesive sheet having excellent process characteristics including easy strippability from dicing sheets, and a semiconductor device having excellent productivity, high adhesion strength at high temperatures, and excellent moisture resistance which each comprises or is produced with the adhesive composition. The adhesive composition comprises (A) a thermoplastic resin, (B) a bisallylnadimide represented by the following general formula (I), and (C) a (meth)acrylate compound having a functionality of 2 or higher. (Chemical formula 1) (I) (In the formula, R1 is a divalent organic group comprising an aromatic ring and/or a linear, branched, or cyclic aliphatic hydrocarbon.) © KIPO & WIPO 2008 ...

METHOD FOR PRODUCING SEMICONDUCTOR CHIP WITH ADHESIVE FILM, ADHESIVE FILM FOR SEMICONDUCTOR USED IN THE METHOD, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE

A method for producing a semiconductor chip with an adhesive film has a step for preparing a laminate of at least a divided semiconductor wafer, an adhesive film for semiconductor, and a dicing tape. The divided semiconductor wafer consists of a plurality of semiconductor chips obtained by forming cuts for fractionating the semiconductor wafer into a plurality of semiconductor chips with a depth smaller than the thickness of the semiconductor wafer on one side of the semiconductor wafer and grinding the other side of the semiconductor wafer where the cuts are not formed until the cuts are reached. The adhesive film for semiconductor has a thickness in the range of 1-15 μm, and a tensile fracture elongation of less than 5% which is less than 110% of elongation at the time of maximum load. The method also has a step for dividing the adhesive film for semiconductor by picking up the plurality of semiconductor chips in the laminating direction of each laminate and obtaining a semiconductor ...

A light-emitting device and the manufacturing method thereof

METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE

In a method for fabricating a semiconductor, a first conductive pattern structure partially protruding upwardly from first insulating interlayer is formed in first insulating interlayer. A first bonding insulation layer pattern covering the protruding portion of first conductive pattern structure is formed on first insulating interlayer. A first adhesive pattern containing a polymer is formed on first bonding insulation layer pattern to fill a first recess formed on first bonding insulation layer pattern. A second bonding insulation layer pattern covering the protruding portion of second conductive pattern structure is formed on second insulating interlayer. A second adhesive pattern containing a polymer is formed on second bonding insulation layer pattern to fill a second recess formed on second bonding insulation layer pattern. The first and second adhesive patterns are melted. The first and second substrates are bonded with each other so that the conductive pattern structures contact each other.

Semiconductor package and method for manufacturing the same

The present disclosure provides a semiconductor package that prevents a bump bridge from being formed between adjacent conductive bumps to realize a fine bump pitch when each unit circuit part is directly stacked without using a printed circuit board and a method for manufacturing the same. The semiconductor package includes a first semiconductor chip structure including a first unit circuit part, a first passivation layer disposed on the first unit circuit part, and a conductive bump electrically connected to the first unit circuit part, and a second semiconductor chip structure including a second unit circuit part, a second passivation layer having a stepped portion that is recessed inward and disposed on the second unit circuit part, and a bump pad provided in the stepped portion. The first semiconductor chip structure and the second semiconductor chip structure are stacked to allow the conductive bump to be bonded to the bump pad within the stepped portion.

Hot-melt adhesive film for implanting electronic modules into cards, e.g. telephone cards or credit cards, comprises an elastomer, a crosslinker and optionally a copolyamide

Adhesive film for implanting electronic modules into cards comprises 60-100 wt.% of an elastomer, 0-40 wt.% of a copolyamide and 0.1-10 wt.% of a crosslinker. An independent claim is also included for the production of such a film by mixing the ingredients, applying the mixture to a support and drying the product.

STACKED DIE IN DIE BGA PACKAGE

ATTACHMENT OF SURFACE MOUNT DEVICES TO PRINTED CIRCUIT BOARDS USING A THERMOPLASTIC ADHESIVE

FLIP CHIP MOUNTING METHOD AND BUMP FORMING METHOD

Method for making electronic device with cover layer with openings and related devices

A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.

Electrically conductive adhesives

Disclosed herein are electrically conductive adhesives (ECA) comprising: (a) organic binder, (b) electrically conductive powders comprised of surface coated spherical copper particles and surface coated flaky copper particles, and optional (c) solvent.

Method of fabricating a stacked die in die BGA package

Semiconductor devices and stacked die assemblies, and methods of fabricating the devices and assemblies for increasing semiconductor device density are provided.

METHODS OF MANUFACTURING STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH HIGH EFFICIENCY THERMAL PATHS

Method for packaging a semiconductor die assemblies. In one embodiment, a method is directed to packaging a semiconductor die assembly having a first die and a plurality of second dies arranged in a stack over the first die, wherein the first die has a peripheral region extending laterally outward from the stack of second dies. The method can comprise coupling a thermal transfer structure to the peripheral region of the first die and flowing an underfill material between the second dies. The underfill material is flowed after coupling the thermal transfer structure to the peripheral region of the first die such that the thermal transfer structure limits lateral flow of the underfill material.

Bridging arrangement and method for manufacturing a bridging arrangement

A bridging arrangement for coupling a first terminal to a second terminal includes a plurality of particles of a first type forming at least one path between the first terminal and the second terminal, wherein the particles of the first type are attached to each other; a plurality of particles of a second type arranged in a vicinity of a contact region between a first particle of the first type and a second particle of the first type, wherein at least a portion of the plurality of particles of the second type is attached to the first particle of the first type and the second particle of the first type.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device includes a step of preparing a semiconductor element including a functional surface on which a bump is formed and an adhesive layer of a film shape including a flux component, a step of positioning the semiconductor element above a board including an electrode, a step of activating a flux component by applying ultrasonic vibration to the semiconductor element, a step of bringing the bump into contact with the electrode by pressing the semiconductor element to the board, and a step of bonding the bump to the electrode by continuing the application of the ultrasonic vibration and the pressing of the semiconductor element.

Hybrid Bonding Systems and Methods for Semiconductor Wafers

Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together. 1. A method comprising:depositing a first protection layer on a first bonding surface of a first semiconductor wafer;removing the first protection layer from the first bonding surface of the first semiconductor wafer to expose the first bonding surface of the first semiconductor wafer;applying a plasma process to the first bonding surface of the first semiconductor wafer;performing a cleaning process on the first bonding surface of the first semiconductor wafer;coupling the first semiconductor wafer to a second semiconductor wafer; andannealing the first semiconductor wafer and the second semiconductor wafer to bond the first bonding surface of the first semiconductor wafer to a second bonding surface of the second semiconductor wafer, wherein bonding the first bonding surface of the first semiconductor wafer to the second bonding surface of the second semiconductor wafer comprises:forming a first bond between a first insulating layer of the first bonding surface and a second insulating layer of the second bonding surface; andforming a second bond between a first conductive pad of the first bonding ...

Light-emitting device, manufacturing method thereof and display module using the same

The application discloses a light-emitting device including a carrier which includes an insulating layer, an upper conductive layer formed on the insulating layer, a plurality of conducting vias passing through the insulating layer, and a lower conductive layer formed under the insulating layer; four light-emitting elements arranged in rows and columns flipped on the carrier; and a light-passing unit formed on the carrier and covering the four light-emitting elements; wherein each of the light-emitting elements including a first light-emitting bare die emitting a first dominant wavelength, a second light-emitting bare die emitting a second dominant wavelength, and a third light-emitting bare die emitting a third dominant wavelength; and wherein two adjacent first light-emitting bare die in a row has a first distance W1, two adjacent first light-emitting bare die in a column has a second distance W2, and W1 is the same as W2.

Semiconductor device and manufacturing method thereof

A semiconductor device according to an embodiment includes a lead frame, a semiconductor chip provided above the lead frame, and a bonding material including a sintered material containing a predetermined metal material and a predetermined resin, where the bonding material includes a first portion provided between the lead frame and the semiconductor chip, and a second portion provided on the lead frame around the semiconductor chip, where the bonding material bonds the lead frame and the semiconductor chip, wherein an angle formed by a lower face of the semiconductor chip and an upper face of the second portion adjacent to the lower face is 80 degrees or less.

Method and material for attaching a chip to a submount

A die attachment material may include an ultra-violet (UV) curable resin and silver particles to attach a chip to a submount, where the silver particles are positioned within the UV curable resin. A method may include heating the die attachment material to obtain the UV curable resin on sintered silver particles, where at least a portion of the die attachment material is position between a chip and a submount. The method may further include irradiating, with UV light, the UV curable resin to obtain a polymer on the sintered silver particles. The polymer may form a layer on the sintered silver particles.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE

A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip. 1. A method , comprising:providing an electrically conductive foil attached on a carrier;exposing at least one portion of the carrier by removing at least one portion of the electrically conductive foil;attaching a first semiconductor chip to a non-removed portion of the electrically conductive foil, wherein the first semiconductor chip comprises a first contact pad arranged over a first face of the first semiconductor chip and a second contact pad arranged over a second face of the first semiconductor chip, wherein the second contact pad is at least one of electrically or thermally coupled to the electrically conductive foil and wherein the first contact pad is electrically coupled to the electrically conductive foil; andforming a first electrically conductive layer over the first semiconductor chip.2. The method of claim 1 , comprising:embedding the first semiconductor chip at least partly in a non-conductive layer between the carrier and the first electrically conductive layer.3. The method of claim 1 , wherein the attaching the first semiconductor chip to the electrically conductive foil comprises one of the following connection techniques:soldering,diffusion soldering,diffusion bonding,conductive adhesive bonding,ultrasonic bonding, andthermal compression.4. The method of claim 1 ,wherein removing the at least one ...

Carbon nanotube structure, heat dissipation sheet, and method of manufacturing carbon nanotube structure

A carbon nanotube structure includes a plurality of carbon nanotubes, and a graphite film that binds one ends of the plurality of carbon nanotubes. And a heat dissipation sheet includes a plurality of carbon nanotube structures arranged in a sheet form, wherein each of the carbon nanotube structures includes a plurality of carbon nanotubes, and a graphite film that binds one ends of the plurality of carbon nanotubes.

Semiconductor device and a method of manufacturing thereof

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

WAFER BONDING STRUCTURE AND WAFER BONDING METHOD

Wafer bonding methods and wafer bonding structures are provided. An exemplary wafer bonding method includes providing a first wafer; forming a first interlayer dielectric layer and a first bonding layer passing through the first interlayer dielectric layer on the surface of the first wafer; providing a second wafer; forming a second interlayer dielectric layer and a second bonding layer passing through the second interlayer dielectric layer on surface of the second wafer; forming a self-assembling layer on at least one of a surface of the first interlayer dielectric layer and a surface of the second interlayer dielectric layer; and bonding the first wafer with the second wafer, the first bonding layer and the second bonding layer being fixed with each other, and the first interlayer dielectric layer and the second interlayer dielectric layer being fixed with each other by the self-assembling molecular layer. 1. A wafer bonding method , comprising:providing a first wafer;forming a first interlayer dielectric layer and a first bonding layer passing through the first interlayer dielectric layer on a surface of the first wafer;providing a second wafer;forming a second interlayer dielectric layer and a second bonding layer passing through the second interlayer dielectric layer on a surface of the second wafer;forming a self-assembling molecular layer on at least one of a surface of the first interlayer dielectric layer and a surface of the second interlayer dielectric layer; andbonding the first wafer with the second wafer, the first bonding layer and the second bonding layer being fixed with each other, and the first interlayer dielectric layer and the second interlayer dielectric layer being fixed with each other by the self-assembling molecular layer.2. The wafer bonding method according to claim 1 , wherein:the self-assembling molecular layer includes at least one of a first self-assembling molecular layer and a second self-assembling molecular layer;the first self- ...

Method of applying conductive adhesive and manufacturing device using the same

An applying method includes the following steps. Firstly, a conductive adhesive including a plurality of conductive particles and an insulating binder is provided. Then, a carrier plate is provided. Then, a patterned adhesive is formed on the carrier plate by the conductive adhesive, wherein the patterned adhesive includes a first transferring portion. Then, a manufacturing device including a needle is provided. Then, the needle of the manufacturing device is moved to contact the first transferring portion. Then, the transferring portion is transferred to a board by the manufacturing device.

Semiconductor package having a multi-channel and a related electronic system

A substrate including internal interconnections, first and second finger electrodes, and having first to fourth quadrants. External terminals are formed on the substrate and connected to the first and second finger electrodes via the internal interconnections. A first tower including first semiconductor chips is formed on the substrate. First conductive wires are formed between the first semiconductor chips and the first finger electrodes. A second tower including second semiconductor chips is formed on the substrate. Second conductive wires are formed between the second semiconductor chips and the second finger electrodes. The external terminals include a first group connected to the first finger electrodes and configuring a channel, and a second group connected to the second finger electrodes, and configuring another channel. The first finger electrodes are formed on the third quadrant, and the second finger electrodes are formed on the first quadrant.

Display apparatus and method of manufacturing the same

A display apparatus includes a display panel including a lower base substrate and a connecting portion disposed on the lower base substrate, a flexible circuit board attached on a side surface of the display panel, and including a base film and a conductive pattern disposed on the base film, a conductive paste part disposed between the side surface of the display panel and the flexible circuit board, a first anisotropic conductive film (ACF) film disposed between the side surface of the display panel and the conductive paste part, and a second ACF film disposed between the conductive paste part and the flexible circuit board. The connecting portion is exposed at the side surface of the display panel, and the first ACF film directly makes contact with the connecting portion.

BONDING PROCESS USING TEMPERATURE CONTROLLED CURVATURE CHANGE

A first substrate including a radius of curvature and a stressor layer is first provided. An outermost bowed, e.g., curved, surface of the first substrate is then brought into intimate contact with a surface of a second substrate. Bonding of the entirety of the first substrate to the second substrate is then achieved by reducing the radius of curvature of the first substrate by controlling the temperature at which bonding occurs. 1. A method of bonding a first substrate to a second substrate , said method comprising:providing a first substrate having a radius of curvature and containing a stressor layer;contacting an outermost bowed surface of said first substrate to a portion of a surface of a second substrate; andbonding said first substrate to an entirety of said surface of said second substrate, wherein said bonding is performed at a temperature that removes said radius of curvature of said first substrate.2. The method of claim 1 , wherein said first substrate comprises a spalled material portion of a base substrate.3. The method of claim 2 , wherein said spalled material portion of said base substrate is provided by a method that comprises:forming said stressor layer above a surface of said base substrate; andremoving said material portion of said base substrate from said base substrate by performing a spalling process.4. The method of claim 3 , further comprising forming an edge exclusion material on said surface and at each vertical edge of said base substrate prior to forming said stressor layer.5. The method of claim 4 , wherein said edge exclusion material comprises a photoresist material claim 4 , a polymer claim 4 , a hydrocarbon material claim 4 , an ink claim 4 , a metal claim 4 , or a paste.6. The method of claim 3 , further comprising forming a handle substrate on an exposed surface of said stressor layer prior to performing said spalling process.7. The method of claim 6 , wherein said spalling process further comprises pulling or peeling said ...

Semiconductor device and method for manufacturing the same

To miniaturize metal columns. A semiconductor device includes a metal column ( 14 ) that extends in a stretching direction; a polymer layer ( 16 ) that surrounds the metal column from a direction crossing the stretching direction; and a guide ( 12 ) that surrounds the polymer layer in the crossing direction so as to be spaced from the metal column with the polymer layer interposed therebetween. A method for manufacturing semiconductor devices includes a step of filling a mixture ( 20 ) containing metal particles ( 22 ) and polymers ( 24 ) in a guide ( 12 ); and a step of subjecting the mixture to a heat treatment so that the polymers agglomerate to the guide to form a polymer layer ( 16 ) that makes contact with the guide and the metal particles agglomerate away from the guide with the polymer layer interposed therebetween to form a metal column ( 14 ) that stretches in a stretching direction of the guide from the metal particles.

Anisotropically conductive moisture barrier films and electro-optic assemblies containing the same

An electro-optic assembly includes a layer of electro-optic material configured to switch optical states upon application of an electric field and an anisotropically conductive layer having one or more moisture-resistive polymers and a conductive material, the moisture-resistive polymer having a WVTR less than 5 g/(m2*d).

ANISOTROPIC CONDUCTIVE FILM, METHOD FOR PRODUCING ANISOTROPIC CONDUCTIVE FILM, METHOD FOR PRODUCING CONNECTION BODY, AND CONNECTION METHOD

To reduce substrate warp occurring after connection an anisotropic conductive film is used. An anisotropic conductive film has: a first insulating adhesive layer; a second insulating adhesive layer; and a conductive particle-containing layer sandwiched by the first insulating adhesive layer and the second insulating adhesive layer and having conductive particles contained in an insulating adhesive, wherein air bubbles are contained between the conductive particle-containing layer and the first insulating adhesive layer, and, the conductive particle-containing layer, a portion thereof below the conductive particles and in contact with the second insulating adhesive layer has a lower degree of cure than other portions thereof. 1. A method for producing a connection body , the connection body being obtained by anisotropic conductive connection between a terminal of a first electronic component and a terminal of a second electronic component by using an anisotropic conductive film , the anisotropic conductive film comprising:a first insulating adhesive layer; anda conductive particle-containing layer laminated on the first insulating adhesive layer and having conductive particles each contained independently in an insulating adhesive;wherein air bubbles are contained between the conductive particle-containing layer and the first insulating adhesive layer, andwherein the air bubbles are contained in accordance with the conductive particles, the method comprising curing the anisotropic conductive film in a sandwiched state of sandwiching the anisotropic conductive film between the first electronic component and the second electronic component.2. A connection body obtained by anisotropic conductive connection between a first electronic component and a second electronic component by using an anisotropic conductive film , the anisotropic conductive film comprising:a first insulating adhesive layer; anda conductive particle-containing layer laminated on the first insulating ...

Anisotropic conductive film, method for producing anisotropic conductive film, method for producing connection body, and connection method

To reduce substrate warp occurring after connection an anisotropic conductive film is used. An anisotropic conductive film has: a first insulating adhesive layer; a second insulating adhesive layer; and a conductive particle-containing layer sandwiched by the first insulating adhesive layer and the second insulating adhesive layer and having conductive particles contained in an insulating adhesive, wherein air bubbles are contained between the conductive particle-containing layer and the first insulating adhesive layer, and, the conductive particle-containing layer, a portion thereof below the conductive particles and in contact with the second insulating adhesive layer has a lower degree of cure than other portions thereof.

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF

A light-emitting module includes a common carrier; a plurality of semiconductor devices formed on the common carrier, and each of the plurality of semiconductor devices including three semiconductor dies; a carrier including a connecting surface; a third bonding pad and a fourth bonding pad formed on the connecting surface; and a connecting layer. One of the three semiconductor dies includes a stacking structure; a first bonding pad; and a second bonding pad with a shortest distance less than 150 microns between the first bonding pad. The connecting layer includes a first conductive part including a first conductive material having a first shape; and a blocking part covering the first conductive part and including a second conductive material having a second shape with a diameter in a cross-sectional view. The first shape has a height greater than the diameter. 1. A light-emitting module , comprising:a common carrier;a plurality of semiconductor devices formed on the common carrier, and each of the plurality of semiconductor devices comprising at least three semiconductor dies; a stacking structure,', 'a first bonding pad with an outmost surface positioned away from the stacking structure, and', 'a second bonding pad,', 'wherein a shortest distance between the first bonding pad and the second bonding pad is less than 150 microns;, 'at least one of the three semiconductor dies comprisinga carrier comprising a connecting surface;a third bonding pad and a fourth bonding pad formed on the connecting surface of the carrier; and a first conductive part formed between the first bonding pad and the third bonding pad, and comprising a first conductive material having a first shape;', 'a second conductive part formed between the second bonding pad and the fourth bonding pad, and comprising the first conductive material; and', 'a blocking part covering the first conductive part and comprising a second conductive material having a second shape with a diameter in a cross- ...

Anisotropic Conductive Adhesive with Reduced Migration

Illustrative embodiments of an anisotropic conductive adhesive (ACA) configured to be cured after being subjected to a magnetic field are disclosed. In at least one illustrative embodiment, the ACA may comprise a binder and a plurality of particles suspended in the binder. Each of the plurality of particles may comprise a ferromagnetic material coated with a layer of electrically conductive material and with a moisture barrier, such that the electrically conducting material forms electrically conductive and isolated parallel paths when the ACA is cured after being subjected to the magnetic field.

SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES INCLUDING A REDISTRIBUTION LAYER

A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described. 1. A semiconductor device , comprising:a conductive material in electrical communication with a bond pad;a seed material adjacent to at least a portion of the bond pad;a protective material adjacent the seed material; anda conductive pillar in electrical communication with the seed material through an opening in the protective material.2. The semiconductor device of claim 1 , wherein the protective material comprises a polyimide claim 1 , silicon dioxide claim 1 , silicon nitride claim 1 , tetraethylorthosilicate claim 1 , borophosphosilicate glass claim 1 , or a polymer.3. The semiconductor device of claim 1 , wherein the seed material comprises at least one of copper claim 1 , titanium claim 1 , titanium nitride claim 1 , or titanium silicide.4. The semiconductor device of claim 1 , wherein sides of the seed material are coplanar with sides of the protective material.5. The semiconductor device of claim 1 , wherein the conductive pillar is located between portions of the seed material.6. The semiconductor device of claim 1 , wherein sides of the conductive pillar are spaced from sides of the protective material.7. The semiconductor device of claim 1 , further comprising a semiconductor die comprising another bond pad in electrical communication with the conductive material.8 ...

Semiconductor device and a method of manufacturing thereof

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad, and a second bonding pad on a top surface of the stacking structure, wherein a shortest distance between the first bonding pad and the second bonding pad is less than 150 μm; a carrier comprising a connecting surface; a third bonding pad and a fourth bonding pad on the connecting surface of the carrier; and a conductive connecting layer comprising a current conductive area between the first bonding pad and the third bonding pad and between the second bonding pad and the fourth bonding pad.

ANISOTROPIC CONDUCTIVE FILM (ACF), BONDING STRUCTURE, AND DISPLAY PANEL, AND THEIR FABRICATION METHODS

An anisotropic conductive film (ACF), a bonding structure, and a display panel, and their fabrication methods are provided. The ACF includes a resin gel and a plurality of conductive particles dispersed in the resin gel. The plurality of conductive particles is aligned and connected, in response to an electric field, to form a conduction path in the resin gel. The bonding structure includes the anisotropic conductive film (ACF) sandwiched between first and second substrates. The display panel includes the bonding structure.

Leadless integrated circuit package having standoff contacts and die attach pad

A leadless integrated circuit (IC) package comprising an IC chip mounted on a die attach pad and a plurality of electrical contacts electrically connected to the IC chip. The IC chip, the electrical contacts, and the die attach pad are all covered with a molding material, with portions of the electrical contacts and die attach pad protruding from a bottom surface of the molding material.

Hybrid Bonding Systems and Methods for Semiconductor Wafers

Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together. 1. A method comprising:forming a first protection layer over a first semiconductor wafer;forming a second protection layer over a second semiconductor wafer;placing the first semiconductor wafer and the second semiconductor wafer into a chamber;removing the first protection layer and the second protection layer while the first semiconductor wafer and the second semiconductor wafer are in the chamber;coupling a top surface of the second semiconductor wafer to a top surface of the first semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are in the chamber; andhybrid bonding the first semiconductor wafer to the second semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are in the chamber.2. The method of claim 1 , further comprising after removing the first protection layer and the second protection layer claim 1 , activating the top surfaces of the first semiconductor wafer and the second semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are in the chamber.3. The method of claim 1 , ...

Light-emitting device, manufacturing method thereof and display module using the same

A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.

Display apparatus and method of manufacturing the same

A display apparatus includes a display panel including a lower base substrate and a connecting portion disposed on the lower base substrate, a flexible circuit board attached on a side surface of the display panel, and including a base film and a conductive pattern disposed on the base film, a conductive paste part disposed between the side surface of the display panel and the flexible circuit board, a first anisotropic conductive film (ACF) film disposed between the side surface of the display panel and the conductive paste part, and a second ACF film disposed between the conductive paste part and the flexible circuit board. The connecting portion is exposed at the side surface of the display panel, and the first ACF film directly makes contact with the connecting portion.

A-staged Thermoplastic-Polyimide (TPI) Adhesive Compound and Method of Use

A compound and method of use thereof consisting of an A-staged thermoplastic-polyimide (TPI) adhesive, a viscous uncured liquid of polyamic-acid polymer (PAA), the TPI precursor, synthesized and dissolved in a polar aprotic organic solvent, and including, as appropriate, combinations of particulate ceramic and/or metallic thermally conducting, electrically insulating, and thermally conducting, electrically conducting fillers for interface-bonding to create a robust joint between surfaces with conventional lamination processes that utilize relatively moderate temperatures and applied pressures. 1. An adhesive solution for interface bonding of two surfaces said solution arranged to form a bondline between said surfaces , said solution comprising an A-staged uncured thermoplastic-polyimide (TPI) , said thermoplastic polyimide having the characteristic of being insoluble in an organic solvent in the fully imidized , fully cured state , said solution in the form of a viscous liquid containing in combination:A. a quantity of polar aprotic organic solvent; andB. a quantity of TPI precursor polyamic-acid polymer (PAA); synthesized and dissolved in said solvent wherein said polyamic-acid polymer comprises a mixture of diamine and dianhydride monomers, and whereinsaid diamine monomer is selected from the group consisting of 3,3′-diaminobenzophenone (3,3′-DABP), 3,4′-diaminobenzophenone (3,4′-DABP), 1,3-Bis (4-aminophenoxy) benzene (TPER), 3,4′-Oxydianiline (3,4′-ODA), 4,4′-Oxydianiline (4,4′-ODA), 4,4′-Methylene dianiline (4,4′-MDA), an aliphatic diamine, and a silicon-diamine; and whereinsaid dianhydride monomer is selected from the group consisting of 3,3′,4,4′-Biphenyltetracarboxylic dianhydride (BPDA), 3,3′,4,4′-Benzophenone tetracarboxylic dianhydride (BTDA), 4,4′-Oxydiphthalic anhydride (ODPA), Pyromellitic dianhydride (PMDA), and 2,2′-Bis-(3,4-Dicarboxyphenyl) hexafluoropropane dianhydride (6FDA); and 'wherein said bondline will be formed in situ by the curing and ...

SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE PILLARS

A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described. 1. A semiconductor device , comprising:a conductive plug in electrical communication with active circuitry of a semiconductor die;a conductive material over the conductive plug;a dielectric material over the conductive material comprising an aperture exposing at least a portion of the conductive material;a seed material within the aperture and in electrical contact with the conductive material;a protective material within the aperture comprising an opening exposing a portion of the seed material at a bottom of the aperture; anda conductive pillar over surfaces of the protective material and over surfaces of the seed material.2. The semiconductor device of claim 1 , further comprising a conductive pillar of another semiconductor die in electrical contact with a conductive element of the semiconductor die claim 1 , the conductive element on a side of the semiconductor die opposite the conductive pillar.3. The semiconductor device of claim 1 , further comprising a conductive element of a logic die in contact with the conductive pillar of the semiconductor die.4. The semiconductor device of claim 1 , further comprising a conductive pad over the conductive material within the aperture.5. The semiconductor device of claim 1 , wherein the conductive pillar is at least partially ...

Hybrid Bonding Systems and Methods for Semiconductor Wafers

Hybrid bonding systems and methods for semiconductor wafers are disclosed. In one embodiment, a hybrid bonding system for semiconductor wafers includes a chamber and a plurality of sub-chambers disposed within the chamber. A robotics handler is disposed within the chamber that is adapted to move a plurality of semiconductor wafers within the chamber between the plurality of sub-chambers. The plurality of sub-chambers includes a first sub-chamber adapted to remove a protection layer from the plurality of semiconductor wafers, and a second sub-chamber adapted to activate top surfaces of the plurality of semiconductor wafers prior to hybrid bonding the plurality of semiconductor wafers together. The plurality of sub-chambers also includes a third sub-chamber adapted to align the plurality of semiconductor wafers and hybrid bond the plurality of semiconductor wafers together. 1. A method comprising:forming a first protection layer over at least a first contact pad of a first semiconductor wafer;forming a second protection layer over at least a second contact pad of a second semiconductor wafer;placing the first semiconductor wafer and the second semiconductor wafer in a first environment after forming the first protection layer and the second protection layer;removing the first protection layer and the second protection layer while the first semiconductor wafer and the second semiconductor wafer are in a reduced oxygen environment, wherein an amount of oxygen in the reduced oxygen environment is lower than an amount of oxygen in the first environment;coupling a top surface of the second semiconductor wafer to a top surface of the first semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are in the reduced oxygen environment; andbonding the first semiconductor wafer to the second semiconductor wafer while the first semiconductor wafer and the second semiconductor wafer are in the reduced oxygen environment.2. The method of claim 1 , ...

Induction heating for underfill removal and chip rework

Underfill materials and methods for removing an underfill material from beneath a chip in relation to removal of the chip from a substrate. The underfill material may a plurality of particles dispersed in a bulk matrix. The material constituting the particles may be capable of generating heat energy when exposed to a time-varying magnetic field. The bulk matrix of the underfill material between the chip and a substrate may be heated with heat energy transferred from the particles. While heated, the underfill material is removed. The heating of the underfill material may also be used to heat solder bumps connecting the chip with the substrate so that the solder bumps are liquefied.

Semiconductor device package having an underfill barrier

The present disclosure relates to a semiconductor device package comprising a substrate, a semiconductor device, and a underfill. The substrate includes a top surface defining a mounting area, and a barrier section on the top surface and adjacent to the mounting area. The semiconductor device is mounted on the mounting area of the substrate. The underfill is disposed between the semiconductor device and the mounting area and the barrier section of the substrate. A contact angle between a surface of the underfill and the barrier section is greater than or equal to about 90 degrees.

Method For Manufacturing Led Display

The present invention provides a method for manufacturing an LED display including a wiring board and LEDs arranged at a constant distance from the wiring board. The method includes: aligning an LED substrate having LEDs with a wiring board , and pressing and joining the LED substrate onto the wiring board. Each LED has a bonding surface. The wiring board includes bonding layers. The aligning step is performed so that the bonding surfaces are joined on the bonding layers in the pressing and joining step. The method further includes: temporarily bonding the LEDs onto the wiring board by curing the bonding layers through irradiation with ultraviolet light UV; peeling off the LEDs from the LED substrate through irradiation with laser light L; and permanently bonding the LEDs onto the wiring board by heating the bonding layers of the LEDs so as to further cure the bonding layers. 1. A method for manufacturing an LED display by joining an LED substrate onto a wiring board , the LED substrate including a light transmitting wafer and LEDs formed in a plurality of rows at predetermined intervals on a first surface of the wafer , each LED having LED electrodes , the wiring board including wiring board electrodes and a circuit layer having a circuit configured to drive the LEDs and laminated on a first surface of the wiring board , and then by irradiating the LED substrate with laser light from a second surface of the wafer and peeling off the LEDs from the LED substrate so as to mount the LEDs on the wiring board so that the LED electrodes are electrically conductively connected to the wiring board electrodes , the method comprising: wherein each LED having the LED electrodes and a bonding surface on an upper surface of the LED, the bonding surface being disposed in a predetermined region neighboring the LED electrodes,', a circuit layer having a circuit configured to drive the LEDs and laminated on a first surface of the wiring board;', 'elastic support members disposed at ...

Quantum dot led package and quantum dot led module including the same

A quantum dot LED package is disclosed. The quantum dot LED package includes: a heat dissipating reflector having a through cavity; a quantum dot plate accommodated in the upper portion of the through cavity; an LED chip accommodated in the lower portion of the through cavity and whose top surface is coupled to the lower surface of the quantum dot plate; electrode pads disposed on the lower surface of the LED chip and protruding more downward than the lower surface of the heat dissipating reflector; and a resin part formed in the through cavity to fix between the LED chip and the reflector and between the quantum dot plate and the reflector.

Semiconductor component fabrication method and semiconductor component

Verwendung eines Schmelzklebstoffes, pastöses Fixationsmittel für Mikrobauteile und Detektor zum Nachweis ionisierender Strahlung

Die Erfindung betrifft die Verwendung eines Schmelzklebstoffes zur Fixierung mindestens eines Mikrobauteils auf einem Träger und ein pastöses Fixationsmittel für Mikrobauteile, bestehend aus einem pulverförmigen Schmelzklebstoff, einem Stellmittel und einem Lösungsmittel für das Stellmittel. Weiterhin betrifft die Erfindung ein Verfahren zur Fixierung mindestens eines Mikrobauteils auf einem Träger, wobei ein Schmelzklebstoff auf einen Träger aufgebracht wird, dort das Mikrobauteil in einem vorbestimmten Abstand vom Träger positioniert und durch den Schmelzklebstoff fixiert wird, bis eine feste Klebeverbindung zwischen dem mindestens einen Mikrobauteil und dem Träger durch Abkühlung des Heißklebers entstanden ist, der entstandene Spalt durch ein Epoxydharz aufgefüllt und durch Aushärten des Epoxydharzes beide Bauteile sicher verklebt sind. Außerdem betrifft die Erfindung auch einen Detektor zum Nachweis ionisierender Strahlung mit einer Vielzahl von flächig angeordneten Detektorelementen, welcher nach diesem Verfahren hergestellt wurde.

Method for gluing a component to a surface

By using a specially modified epoxide-based adhesive, surfaces can be glued both precisely and quickly to a component. The parts which are to be glued are precisely adjusted to the gluing area, fixed by UV light and subsequently thermally hardened.

Top-side laser for direct transfer of semiconductor devices

An apparatus includes a needle including a hole extending from a first end to a second end through the needle and an energy-emitting device arranged in the hole of the needle. The energy-emitting device being configured to emit a specific wavelength and intensity of energy directed at an electrically-actuatable element to bond a circuit trace and the electrically-actuatable element.

Electronic sub-assembly and method for the production of an electronic sub-assembly

An electronic sub-assembly (36) comprising at least one electronic component (14) embedded in a sequence of layers, wherein the electronic component (14) is arranged in a recess of an electrically conductive central layer (16) and directly adjoins a resin layer (12, 20) on each side.

플립 칩 실장 방법 및 범프 형성 방법

제1 전자 부품(2) 상에 땜납 분말(5a)과 수지(4)를 포함하는 땜납 수지 조성물(6)을 탑재하고, 제1 전자 부품(2)의 접속 단자(3)와 제2 전자 부품(8)의 전극 단자(7)가 대향하도록 배치하고, 제1 전자 부품(2)과 땜납 수지 조성물을 가열하여 제1 전자 부품(2)에 포함되는 가스 발생원(1)으로부터 가스를 분출시키고, 가스(9a)를 땜납 수지 조성물(6) 중에서 대류시킴으로써, 땜납 분말(5a)을 땜납 수지 조성물(6) 중에서 유동시키고, 접속 단자(3) 및 전극 단자(7) 상에 자기 집합시켜 접속 단자(3)와 전극 단자(7)를 전기적으로 접속시킨다. 이로 인해, 협(狹)피치로 배선된 반도체 칩의 전극 단자와 회로 기판의 접속 단자를 높은 접속 신뢰성으로 접속할 수 있는 플립 칩 실장 방법과 회로 기판 상에 실장하기 위한 범프 형성 방법을 제공한다.

Method for fabricating of semiconductor package

A method for manufacturing a semiconductor package is provided to connect electrically a bonding pad of a semiconductor chip and a connective pad of a substrate by using conductive particles included in a material layer. A material layer(212) including conductive particles is formed on a semiconductor chip(200) having a plurality of bonding pads(202,210). A baking process for the material layer is performed. The semiconductor chip is attached to a position corresponding to the bonding pads on the substrate including a connective pad(222) by using the material layer. A predetermined voltage is applied to the semiconductor chip and the substrate in order to collect the conductive particles between the bonding pads of the semiconductor chip and a connective pad of the substrate. The material layer including the conductive particles is hardened in order to prevent a floating state of the particles collected between the bonding pads of the semiconductor chip and the connective pad of the substrate.

Process for forming bumps and solder bump

복수의 미세 범프를 균일성 좋게 형성할 수 있고, 또한 생산성이 높은 범프 형성 방법은, 복수의 전극(11)이 형성된 기판(10) 상에, 땜납 분말 및 대류 첨가제(12)를 함유하는 수지(13)를 공급한 후, 기판(10) 상에 공급된 수지(13)의 표면을 평판(14)에 맞닿게 하면서, 기판(10)을 땜납 분말이 용융되는 온도로 가열한다. 이 가열 공정에서, 용융된 땜납 분말을 자기 집합시킴과 더불어, 자기 집합에 의해서 성장한 땜납 볼(15)을, 복수의 전극(11) 상에 자기 정합적으로 일괄 형성한다. 그 후, 평판(14)을 수지(13)의 표면으로부터 분리하여, 수지(13)를 제거하면, 복수의 전극 상에 범프(16)가 형성된 기판(10)을 취득할 수 있다. The bump formation method which can form a some fine bump uniformly, and has high productivity is carried out by resin containing the solder powder and the convection additive 12 on the board | substrate 10 with which the some electrode 11 was formed ( After the 13 is supplied, the substrate 10 is heated to a temperature at which the solder powder is melted, while the surface of the resin 13 supplied on the substrate 10 is brought into contact with the flat plate 14. In this heating step, the molten solder powder is self-assembled, and the solder balls 15 grown by the self-assembly are collectively formed on the plurality of electrodes 11 in a self-aligned manner. After that, when the flat plate 14 is separated from the surface of the resin 13 and the resin 13 is removed, the substrate 10 having the bumps 16 formed on the plurality of electrodes can be obtained.

Anisotropic conductive film, method for producing anisotropic conductive film, method for producing connection body, and connection method

본 발명은 이방성 도전 필름을 사용한 접속에 있어서, 접속 후의 기판 휨의 저감을 도모하는 것을 목적으로 한다. 이방성 도전 필름(23)은 제1 절연성 접착제층(30)과, 제2 절연성 접착제층(31)과, 제1 절연성 접착제층(30) 및 제2 절연성 접착제층(31)에 끼움 지지되고, 도전성 입자(32)가 절연성 접착제(33)에 함유된 도전성 입자 함유층(34)을 갖고, 도전성 입자 함유층(34)과 제1 절연성 접착제층(30) 사이에 기포(41)가 함유되고, 도전성 입자 함유층(34)은 제2 절연성 접착제층(31)과 접하는, 도전성 입자(32)의 하부의 경화도가 다른 부위의 경화도보다도 낮은 것이다. This invention aims at reducing the board curvature after a connection in the connection using an anisotropic conductive film. The anisotropic conductive film 23 is sandwiched between the first insulating adhesive layer 30, the second insulating adhesive layer 31, the first insulating adhesive layer 30 and the second insulating adhesive layer 31, and is electrically conductive. The particle 32 has the electroconductive particle containing layer 34 contained in the insulating adhesive 33, the bubble 41 is contained between the electroconductive particle containing layer 34 and the 1st insulating adhesive layer 30, and an electroconductive particle containing layer Reference numeral 34 has a lower degree of curing of the lower portion of the conductive particles 32 in contact with the second insulating adhesive layer 31 than that of other portions.

半导体组件的制造方法和半导体组件

本发明的制造半导体组件的方法包括：获得具有形成于其功能表面上的突起电极的半导体晶片，和在一个表面具有焊料凸块且在其另一个表面具有电极垫的电路板；将所述半导体晶片与电路板结合，同时在所述半导体晶片和电路板之间提供具有焊剂活性的树脂层，并且使所述突起电极接触所述焊料凸块，同时穿透所述具有焊剂活性的树脂层，从而获得结合结构；向所述结合结构的电极垫涂覆焊料；和切割所述结合结构以获得多个半导体组件。

Flip-chip mounting resin composition and bump forming resin composition

차세대 LSI의 플립 칩 실장에 적용가능한, 생산성 및 신뢰성이 높은 플립 칩 실장에 적합한 플립 칩 실장용 수지 조성물은, 수지(13)가 가열되었을 때에 비등하는 대류 첨가제(12)를 함유하고 있다. 수지(13)가 가열되었을 때, 금속 입자가 수지 중에서 용융함과 아울러, 비등한 대류 첨가제(12)가 수지 속을 대류한다. The resin composition for flip chip mounting suitable for flip chip mounting with high productivity and reliability applicable to flip chip mounting of next generation LSI contains the convection additive 12 which boils when resin 13 is heated. When the resin 13 is heated, the metal particles melt in the resin, and the boiling convection additive 12 convex in the resin. 회로 기판(10)과 반도체 칩(20)의 사이에 공급된 수지(13)를 가열하고, 수지(13) 속에서 용융한 금속 입자가, 회로 기판(10)과 반도체 칩(20)의 단자(11, 21) 사이에 자기 집합함으로써, 단자 사이를 전기적으로 접속하는 접속체(22)를 형성하고, 그 후, 수지(13)를 경화시켜서, 반도체 칩(20)을 회로 기판(10)에 고정시킴으로써 플립 칩 실장체가 얻어진다. The metal particles melted in the resin 13 by heating the resin 13 supplied between the circuit board 10 and the semiconductor chip 20 form the terminals of the circuit board 10 and the semiconductor chip 20 ( By self-assembly between 11 and 21, the connection body 22 which electrically connects between terminals is formed, after that, resin 13 is hardened and the semiconductor chip 20 is fixed to the circuit board 10. FIG. By doing so, a flip chip mounting body is obtained.

Multilayer adhesive film for semiconductor package

PURPOSE: An adhesive film for the semiconductor package is provided to prevent a chip crack or the pattern damage of the top of a chip caused by the gathering of inorganic particles because of non-including inorganic particles in an adhesive layer. CONSTITUTION: An adhesive film for semiconductor package comprises a base material layer, a tckifying layer, and an adhesive layer. The adhesive layer comprises a thermoplastic resin, and thermosetting resin including an epoxy resin of which softening point is 30-100°C, and a hardener of which softening point is above 120°C. The hardener is phenol resin which is chemical formula 1. In the chemical formula 1, R1 are similar or different each other. R1 are hydrogen, a C1-10 linear chain or branched chain alkyl, a cyclic alkyl, a hydroxyl, or an aryl. R2 is phenol, cresol, or aminotriazine. n is the integer of 1-3.

Use of a hotmelt adhesive, pasty fixation compound for micro devices and detector for detecting ionizing radiation

Use of a hotmelt adhesive is disclosed for fixing at least one micro device on a carrier. A pasty fixation compound is further disclosed for micro devices including a powdered hotmelt adhesive, an anti-flow additive and a solvent for the anti-flow additive. Furthermore, a method is disclosed for fixing at least one micro device on a carrier, a hotmelt adhesive being applied to a carrier, the micro device being positioned at a predetermined distance from the carrier and fixed by the hotmelt adhesive until a solid adhesive bond has been produced between the at least one micro device and the carrier by cooling the hotmelt adhesive, the gap produced being filled by an epoxy resin and the two devices being adhesively bonded securely by curing of the epoxy resin. Furthermore, a detector is disclosed for detecting ionizing radiation which has a multiplicity of detector elements disposed in a two-dimensional arrangement.

Detector module of a detector and use of a hot melt adhesive for the production of a detector module

Detektormodul eines Detektors, das Detektormodul bestehend aus einer Vielzahl von Detektorelementen, die in Form von Mikrobauteilen (2) auf einem Träger (1) fixiert sind, dadurch gekennzeichnet, dass bei der Herstellung zur Fixierung die folgenden Verfahrensschritte durchgeführt werden: 1.1. Aufbringen eines Schmelzklebstoffes (13) auf einen Träger (1), wobei die von dem mindestens einen Mikrobauteil (2) bedeckte Fläche auf dem Träger (1) nur zu einem Teil durch den Schmelzklebstoff (13) bedeckt wird, 1.2. Positionieren des mindestens einen Mikrobauteils (2) in einem, einen Spalt bildenden, vorbestimmten Abstand vom Träger (1) bis eine feste Klebeverbindung zwischen dem mindestens einen Mikrobauteil (2) und dem Träger (1) durch Abkühlung des Heißklebers entstanden ist, und 1.3. Auffüllen des Spaltes durch ein Epoxydharz und Aushärten des Epoxydharzes. Detector module of a detector, the detector module consisting of a plurality of detector elements, which are fixed in the form of microcomponents (2) on a support (1), characterized in that in the preparation for fixation, the following process steps are carried out: 1.1. Applying a hotmelt adhesive (13) to a carrier (1), wherein the area covered by the at least one microcomponent (2) on the carrier (1) is only partially covered by the hotmelt adhesive (13), 1.2. Positioning the at least one microcomponent (2) in a predetermined distance from the carrier (1) forming a gap until a firm adhesive bond has been formed between the at least one microcomponent (2) and the carrier (1) by cooling the hot melt adhesive, and 1.3. Filling of the gap by an epoxy resin and curing of the epoxy resin.

Flip chip mounting resin composition and bump forming resin composition

次世代ＬＳＩのフリップチップ実装に適用可能な、生産性及び信頼性の高いフリップチップ実装に適したフリップチップ実装用樹脂組成物は、樹脂１３が加熱されたときに沸騰する対流添加剤１２を含有している。樹脂１３が加熱されたとき、金属粒子が樹脂中で溶融するとともに、沸騰した対流添加剤１２が樹脂中を対流する。回路基板１０と半導体チップ２０との間に供給された樹脂１３を加熱し、樹脂１３中で溶融した金属粒子が、回路基板１０と半導体チップ２０の端子１１、２１間に自己集合することによって、端子間を電気的に接続する接続体２２を形成し、その後、樹脂１３を硬化させて、半導体チップ２０を回路基板１０に固定させることによって、フリップチップ実装体が得られる。 A flip chip mounting resin composition suitable for flip chip mounting with high productivity and reliability applicable to next-generation LSI flip chip mounting contains a convection additive 12 that boils when the resin 13 is heated. is doing. When the resin 13 is heated, the metal particles melt in the resin, and the boiled convective additive 12 convects in the resin. By heating the resin 13 supplied between the circuit board 10 and the semiconductor chip 20, the metal particles melted in the resin 13 are self-assembled between the terminals 11 and 21 of the circuit board 10 and the semiconductor chip 20, A connection body 22 that electrically connects the terminals is formed, and then the resin 13 is cured, and the semiconductor chip 20 is fixed to the circuit board 10 to obtain a flip chip mounting body.

도전 재료, 접속 구조체 및 접속 구조체의 제조 방법

도전 재료가 일정 기간 방치된 경우에도, 전극 상에 도전성 입자에 있어서의 땜납을 효율적으로 배치할 수 있고, 또한 가열 시에 도전 재료의 황변을 충분히 억제할 수 있는 도전 재료를 제공한다. 본 발명에 따른 도전 재료는, 도전부의 외표면 부분에 땜납을 갖는 복수의 도전성 입자와, 경화성 화합물과, 3불화붕소 착체를 포함한다.

Dicing/die bonding film

본 발명의 다이싱·다이본드 필름은 지지 기재 상에 점착제층 및 다이 접착용 접착제층이 순차 적층된 다이싱·다이본드 필름으로서, 상기 점착제층의 두께가 10 내지 80 μm이고, 23℃에서의 저장 탄성률이 1×10 4 내지 1×10 10 Pa인 것을 특징으로 한다. The dicing die-bonding film of this invention is a dicing die-bonding film in which the adhesive layer and the die-bonding adhesive bond layer were laminated | stacked sequentially on the support base material, The thickness of the said adhesive layer is 10-80 micrometers, The storage modulus is 1 × 10 4 to 1 × 10 10 Pa. 점착제층, 다이 접착용 접착제층, 다이싱·다이본드 필름, 방사선 경화형 점착제층, 워크 부착 부분, 다이싱링, 칩 형상 워크 Pressure-sensitive adhesive layer, die-bonding adhesive layer, dicing die-bonding film, radiation-curable pressure-sensitive adhesive layer, workpiece attachment portion, dicing ring, chip-shaped workpiece

Anisotropic conductive film and method for manufacturing the same

본 발명의 일 실시예는 베이스 필름, 상기 베이스 필름상에 배치되며 개구부를 갖는 지지부, 상기 개구부에 배치된 적어도 하나의 도전 입자 및 상기 지지부 및 상기 도전 입자상에 배치된 점착층;을 포함하는 이방성 도전 필름(anisotropic conductive film, ACF)을 제공한다. One embodiment of the present invention is an anisotropic conductive comprising: a base film, a support portion disposed on the base film and having an opening, at least one conductive particle disposed in the opening, and an adhesive layer disposed on the support portion and the conductive particle Anisotropic conductive film (ACF) is provided.

Adhesive composition for semiconductor, adhesive film comprising the same

본 발명은 125℃에서 10분의 제1 단계, 150℃에서 5분의 제2 단계, 175℃에서 1분의 제3 단계, 및 175℃에서 1시간의 제4 단계의 경화 공정 중, 상기 제1 단계에서의 DSC 경화율이 전체 경화율 100% 대비 40% 이하이며, 제4 단계의 DSC 경화율은 상기 제3 단계의 경화율 대비 30% ~ 60%의 상승률을 갖으며, 제2 단계 및 제3 단계는 전 단계의 DSC 경화율 대비 5% 이상의 상승률을 갖는 것을 특징으로 하는, 반도체 접착 필름에 관한 것이다. The present invention relates to a curing process of the first step of 10 minutes at 125 ° C, the second step of 5 minutes at 150 ° C, the third step of 1 minute at 175 ° C, and the fourth step of 1 hour at 175 ° C. The DSC curing rate in the first stage is 40% or less than the total curing rate of 100%, the DSC curing rate in the fourth stage has an increase rate of 30% to 60% compared to the curing rate of the third stage, and the second stage and The third step relates to a semiconductor adhesive film, which has an increase rate of 5% or more relative to the DSC curing rate of the previous step.

Semiconductor package and method of forming the same

반도체 패키지 및 그 제조 방법을 제공한다. 이 반도체 패키지 및 이의 제조 방법에서는 기판 절연막과 칩 절연막 중에 적어도 하나가 더미 개구부를 포함하며, 플립칩 본딩을 위한 자기 접합 솔더 본딩(self-assembly solder bonding) 공정에서 기판 접속단자와 칩 접속단자를 연결하는 내부 솔더볼이 되지 못하고 주변에 잔류하는 솔더 입자들이 상기 더미 개구부를 채워 더미 솔더를 형성한다. 이로써, 잔류하는 솔더 입자들에 의한 전기적 단락(Short), 누설전류등의 문제점을 해결할 수 있어 신뢰성있는 반도체 패키지를 제공할 수 있다. 또한, 더미 개구부가 신호전달 경로인 회로 패턴의 소정부분을 노출시키도록 형성되므로, 더미 금속패턴을 고의로 형성할 필요가 없어 회로기판의 신호 배선 디자인을 변경할 필요가 없다.

Metal Particles-Dispersed Composition and Flip Chip Mounting Process and Bump-Forming Process Using the Same

There is provided a composition that is suitably used for a flip chip mounting process or a bump-forming process. The composition comprises a first component 3 a , a second component 3 b , metal particles 1,1′ and a convection additive. The metal particles 1,1′ are dispersed in the second component 3 b . The convection additive is contained in the second component 3 b . The first component 3 a is contained in an interior of at least one particle 1 . When such at least one metal particle 1 melts upon heating, the first component 3 a comes in contact with the second component 3 b to form a thermoset resin 3 c . The convection additive is capable of generating a gas upon heating, so that the gas provides a convection effect in the composition.

Metal particles-dispersed composition and flip chip mounting process and bump-forming process using the same

A flip chip mounting process wherein a semiconductor chip and a circuit substrate are electrically interconnected. The process includes the steps of preparing a semiconductor chip on which a first plurality of electrodes are formed and a circuit substrate on which a second plurality of electrodes are formed; supplying a composition onto a surface of the circuit substrate, such surface being provided with second plurality of electrodes; bringing the semiconductor chip into contact with a surface of said composition such that the first plurality of electrodes are opposed to the second plurality of electrodes; and heating the circuit substrate, and thereby electrical connections including a metal component constituting the metal particles dispersed in the composition are formed between the first plurality of electrodes and the second plurality of electrodes. Also, a thermoset resin layer is formed between the semiconductor chip and the circuit substrate.

Structure and method for stress reduction in flip chip microelectronic packages using underfill materials with spatially varying properties

A structure for a flip chip package assembly includes: a flip chip die with solder attach bumps; a substrate for receiving and solder attaching the flip chip die; an underfill material with spatially varying curing properties applied to fill voids between the flip chip die and the substrate, and for forming a fillet around the perimeter of the flip chip die and extending to the surface of the substrate; and wherein the portion of the underfill material forming the fillets is cured prior to curing the portion of the underfill material that fills the voids between the flip chip die and the substrate.

Process for producing bondage joints by means of laser

The invention relates to a process for the temperature-controlled quick adhesive bonding of thin-walled, large-area structures of films, thin metal sheets or complex structures, which are coated with hot-setting adhesive, overlapped with one another and subjected to a temperature-controlled and computer-monitored hot adhesive bonding in the form of a spot or a seam by means of a mobile Nd:YAG laser. Exemplary embodiments are explained. <IMAGE>

Semiconductor wafer bonding method and semiconductor device manufacturing method

<P>PROBLEM TO BE SOLVED: To provide a bonding method for a semiconductor wafer which provides stable electrical connection between connecting portions in a laminated semiconductor wafer and enables the efficient manufacturing of a plurality of semiconductor elements, and a highly reliable manufacturing method for a semiconductor device. <P>SOLUTION: According to the bonding method for the semiconductor wafer, a bonding layer 60 containing a curing agent having flux activity, a thermosetting resin, and solder powder is interposed between the semiconductor wafer 210 and the semiconductor wafer 220 to obtain a semiconductor wafer laminate 230 composed of the semiconductor wafers 210 and 220. The semiconductor wafer laminate 230 is then heated and pressurized in the thickness direction thereof to melt the solder powder to cause it to be agglomerated between a connection portion 212 and a connection portion 222. Subsequently, the agglomerated solder powder is solidified to cure thermosetting resin, thus causing the semiconductor wafers 210 and 220 to be fixed to each other. The connection portion 212 is connected electrically to the connection portion 222 at a connection portion 225 (solidified product of the melted solder powder) to form a semiconductor wafer bonded structure 240. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Dicing die-bonding film

Anisotropic conductive film, method for producing the same, and connection structure

Manufacturing method of semiconductor chip with adhesive film, adhesive film for semiconductor used in manufacturing method, and manufacturing method of semiconductor device

Conductive material and connection structure

도전 재료 중에서의 도전성 입자의 분산성이 높아 도전성 입자에 있어서의 땜납을 전극 상에 효율적으로 배치할 수 있어, 전극 사이의 도통 신뢰성을 높일 수 있는 도전 재료를 제공한다. 본 발명에 따른 도전 재료는, 복수의 도전성 입자와 열경화성 화합물과 열경화제를 포함하고, 상기 도전성 입자는 도전부의 외표면 부분에 땜납을 갖고, 상기 도전성 입자는 상기 도전부의 상기 땜납의 외표면에 O-Si 결합을 갖는다.

Anisotropic conductive film and its preparation method, connector and its preparation method and connection method

本发明目的在于在利用各向异性导电膜的连接中，谋求降低连接后的基板翘曲。各向异性导电膜（23）包括：第1绝缘性粘接剂层（30）；第2绝缘性粘接剂层（31）；以及被第1绝缘性粘接剂层（30）及第2绝缘性粘接剂层（31）挟持并在绝缘性粘接剂（33）含有导电性粒子（32）的含导电性粒子层（34），在含导电性粒子层（34）与第1绝缘性粘接剂层（30）之间含有气泡（41），含导电性粒子层（34）中，与第2绝缘性粘接剂层（31）相接的导电性粒子（32）的下部的硬化度低于其他部位的硬化度。

Vertical and horizontal measuring microscope

(57)【要約】 【課題】 新規な導電ペーストの構造およびその製造方 法を提供する。 【解決手段】 本発明の導電ペーストの構造は、ポリマ 材料と、導電性被膜、例えば錫を有する粒子、例えば銅 との混合物である。熱を加えて、隣接粒子の被膜同士を 融合させる。ポリマ材料は、スチレンアリルアルコール 樹脂または熱可塑性フェノキシポリマである。この構造 は、２つの導電面例えばチップパッドと基板パッドとの 間に設けられて、これらパッドの間に、電気的相互接続 および機械的接着を与える。

Method and system for bonding electrical devices using an electrically conductive adhesive

A system for bonding electrical devices using an electrically conductive adhesive to adhere the electrical devices together, the system comprising: an ultrasonic transducer to generate an ultrasonic vibration; and an ultrasonic to thermal energy apparatus operatively attached to and covering an operational end of the ultrasonic transducer, the ultrasonic to thermal energy apparatus damping the ultrasonic vibration to minimize ultrasonic vibration transmitted to a first electrical device and causing the conversion of the ultrasonic vibration to a heating pulse which is conducted through the first electrical device to the adhesive; wherein the adhesive is softened by the heating pulse to bond the electrical devices together.

Method and system for bonding electrical devices using an electrically conductive adhesive

一种用于粘接电气设备(13、15)的系统(10)，其使用导电粘合剂(14)将电气设备(13、15)粘附在一起。所述系统(10)包括：产生超声波振动的超声换能器(11)和操作性地连接并覆盖所述超声换能器(11)的操作端(12)的超声波-热能装置(20)，所述超声波-热能装置(20)阻尼所述超声波振动以使传递至第一电气设备(13)的超声波振动最小，并使超声波振动转换为热脉冲，所述热脉冲通过所述第一电气设备(13)传导至所述粘合剂(14)，其中，所述粘合剂(14)被所述热脉冲软化从而将所述电气设备(13、15)粘接在一起。

Conductive connection sheet, connection method between terminals, formation method of connection terminal, semiconductor device and electronic device

Semiconductor component fabrication method and semiconductor component

本发明的制造半导体组件的方法包括：获得具有形成于其功能表面上的突起电极的半导体晶片，和在一个表面具有焊料凸块且在其另一个表面具有电极垫的电路板；将所述半导体晶片与电路板结合，同时在所述半导体晶片和电路板之间提供具有焊剂活性的树脂层，并且使所述突起电极接触所述焊料凸块，同时穿透所述具有焊剂活性的树脂层，从而获得结合结构；向所述结合结构的电极垫涂覆焊料；和切割所述结合结构以获得多个半导体组件。

Adhesive composition for semiconductor circuit connection and adhesive film containing the same

본 발명은 열가소성 수지; 열경화성 수지; 경화제; 및 특정 구조의 화합물을 포함하는 반도체 접착용 수지 조성물과 이를 이용하여 제조되는 반도체용 접착 필름에 관한 것이다. The present invention is a thermoplastic resin; Thermosetting resin; Hardener; And a resin composition for semiconductor bonding including a compound having a specific structure, and an adhesive film for semiconductors prepared using the same.

Flip chip mounting process and flip chip assembly

차세대 LSI의 플립 칩 실장에 적용 가능한, 생산성 및 신뢰성이 높은 플립 칩 실장 방법은, 복수의 전극 단자(11)를 구비한 배선 기판(10) 상에, 땜납 분말 및 대류 첨가제(12)를 함유하는 수지(13)를 공급한 후, 수지(13)의 표면에 복수의 접속 단자(21)를 구비한 반도체 칩(20)을 맞닿게 한다. 이 상태에서, 배선 기판(10)을, 땜납 분말이 용융되는 온도로 가열한다. 가열 온도는, 대류 첨가제(12)의 비점보다도 높은 온도로 실행되어서, 비등한 대류 첨가제(12)는 수지(13) 중에서 대류한다. 이 가열 공정에서, 용융된 땜납 분말을, 배선 기판(10)의 전극 단자(11)와 반도체 칩(20)의 접속 단자(21)의 사이에 자기 집합시킴으로써, 전극 단자(11)와 접속 단자(21)를 전기적으로 접속한다. 마지막으로, 수지(13)를 경화시켜서, 반도체 칩(20)을 배선 기판(10)에 고정한다. The highly productive and reliable flip chip mounting method applicable to flip chip mounting of the next generation LSI includes solder powder and convective additive 12 on the wiring board 10 having the plurality of electrode terminals 11. After supplying the resin 13, the semiconductor chip 20 including the plurality of connection terminals 21 is brought into contact with the surface of the resin 13. In this state, the wiring board 10 is heated to a temperature at which the solder powder is melted. The heating temperature is performed at a temperature higher than the boiling point of the convective additive 12, and the boiling convective additive 12 convections in the resin 13. In this heating step, the molten solder powder is self-assembled between the electrode terminal 11 of the wiring board 10 and the connection terminal 21 of the semiconductor chip 20 to thereby form the electrode terminal 11 and the connection terminal ( 21) is electrically connected. Finally, the resin 13 is cured to fix the semiconductor chip 20 to the wiring board 10.

Semiconductor package assembly and a manufacturing method thereof

本发明提供一种半导体封装件及其制造方法。该半导体封装件包括电路基板、在电路基板上的半导体芯片、在电路基板和半导体芯片之间的内部焊球以及填充电路基板的基板绝缘层和芯片绝缘层中的至少一个层中的虚设开口的虚设焊料。虚设焊料不将半导体芯片与基板电连接。电路基板可以包括基础基板、在基础基板上的基板连接端子和覆盖基础基板的基板绝缘层。半导体芯片可以包括芯片连接端子和暴露芯片连接端子的芯片绝缘层。内部焊球可以设置在基板连接端子和芯片连接端子之间，以将电路基板电连接到半导体芯片。

Manufacturing method of semiconductor device

提供半导体装置的制造方法，其不会导致粘合剂膜与半导体芯片的安装位置精度下降，且可实现工艺简化。为此，用预切片法对元件形成结束后的半导体晶片(1)切片并研磨其内表面，把切片后的半导体芯片粘在粘合剂膜(2)上，把粘合剂膜的表面贴附在切片带(3)上。之后用化学蚀刻除去上述粘合剂膜的从上述各半导体芯片间的间隙处露出的区域。

Leadless integrated circuit package having standoff contacts and die attach pad

本发明提供了一种具有支架触点以及管芯附垫的无引脚集成电路封装，该无引脚集成电路(IC)封装包括：安装到管芯连接焊盘上的IC芯片以及电气地连接到IC芯片的多个电触点。IC芯片、电触点和管芯连接焊盘都由模塑材料所覆盖，并且电触点和管芯连接焊盘的一部分从模塑材料的底面凸出。

Bump forming method and bump forming apparatus

本发明公开了一种凸块形成方法及凸块形成装置。该凸块形成方法是在布线衬底(31)的电极(32)上形成凸块(19)的方法。首先，在向布线衬底(31)中包含电极(32)的第一区域(17)上供给了含有导电性粒子(16)和气泡产生剂的流体(14)后，将在面积比第一区域(17)大的衬底(40)的主面(18)上形成有面积与第一区域(17)相等的突起面(13)的衬底(40)配置成使该突起面(13)与布线衬底(31)的第一区域(17)相对。然后，加热流体(14)，使流体(14)中所含有的气泡产生剂产生气泡(30)。

Thick film conductor compositioning with improved adhesion

본 발명은 장석과로부터의 결정성 물질의 첨가로 인해 기판에 대한 땜납성 및 부착성이 개선된 후막 도체 조성물에 관한 것이다. The present invention relates to thick film conductor compositions having improved solderability and adhesion to a substrate due to the addition of crystalline material from the feldspar family.

Thermally conductive composite and uses for microelectronic packaging

The present invention provides thermally conductive, electrically insulating composites that can be used to help conduct heat away from a heat source such as from microelectronic structures that generate heat during use. In one aspect, the present invention relates to an electronic system comprising a microelectronic device and a thermally conductive, composite in thermal contact with the microelectronic device. The composite is derived from ingredients comprising a macrocyclic oligomer; and a thermally conductive filler.

Conductive connection material and connection method between terminals using the same

The present invention provides a conductive connecting material having a multilayered structure comprising a resin composition (A) and a metal foil (B) selected from a solder foil or a tin foil, wherein the volume ratio ((A)/(B)) of the resin composition (A) and the metal foil (B) selected from a solder foil or a tin foil in the conductive connecting material is 1-40 or 20-500, as well as a method for connecting terminals using the conductive connecting material. The conductive connecting material of the present invention is preferably used for electrically connecting electronic members in an electrical or electronic component.

Semiconductor electronic component and semiconductor device using the same

A chip-on-chip type semiconductor electronic component which meets requirement of further density increase of semiconductor integrated circuits is provided. A semiconductor device is also provided. In the chip-on-chip type semiconductor electronic component, the circuit surface of a first semiconductor chip and the circuit surface of a second semiconductor chip are arranged to face each other. A distance (X) between the first semiconductor chip and the second semiconductor chip is 50µm or less, and the shortest distance (Y) between the side surface of the second semiconductor chip and a first external electrode is 1mm or less. The semiconductor device using such semiconductor electronic component is also provided.

Connection structure and manufucturing method therefor

A connection structure including: a first circuit member having a plurality of first electrodes; a second circuit member having a plurality of second electrodes; and an intermediate layer having a plurality of bonding portions electrically connecting the first electrodes and the second electrodes, in which at least one of the first electrode and the second electrode that are connected by the bonding portion is a gold electrode, and 90% or more of the plurality of bonding portions include a first region containing a tin-gold alloy and connecting the first electrode and the second electrode and a second region containing bismuth and being in contact with the first region.

Bump forming method and solder bump

복수의 미세 범프를 균일성 좋게 형성할 수 있고, 또한 생산성이 높은 범프 형성 방법은, 복수의 전극(11)이 형성된 기판(10) 상에, 땜납 분말 및 대류 첨가제(12)를 함유하는 수지(13)를 공급한 후, 기판(10) 상에 공급된 수지(13)의 표면을 평판(14)에 맞닿게 하면서, 기판(10)을 땜납 분말이 용융되는 온도로 가열한다. 이 가열 공정에서, 용융된 땜납 분말을 자기 집합시키는 동시에, 자기 집합에 의해서 성장한 땜납 볼(15)을, 복수의 전극(11) 상에 자기 정합적으로 일괄 형성한다. 그 후, 평판(14)을 수지(13)의 표면으로부터 분리하여, 수지(13)를 제거하면, 복수의 전극 상에 범프(16)가 형성된 기판(10)을 취득할 수 있다.

Electronic sub-assembly and method for the production of an electronic sub-assembly

The invention relates to an electronic sub-assembly (36) having at least one electronic component (14) embedded in a sequence of layers, the electronic component(14) being arranged in a recess of an electrically conducting central layer (16) and directly adjoining a resin layer (12, 20) on each side.

Semiconductor device and manufacturing method thereof

Fixing body and manufacture method thereof

本发明的安装体包括层叠了多个半导体芯片(10(10a、10b))的层叠半导体芯片(20)和安装有层叠半导体芯片(20)的安装基板(13)，在层叠半导体芯片(20)的各半导体芯片(10(10a、10b))上，在面对安装基板(13)侧的芯片表面(21(21a、21b))上形成有多个元件电极(12(12a、12b))，在安装基板(13)上对应于多个元件电极(12a，12b)的每一个而形成有电极端子(14)，安装基板(13)的电极端子(14)与元件电极(12a，12b)通过钎焊粒子集合形成的钎焊凸块电连接。由此，能够容易地制造安装的层叠封装的安装体。

Manufacturing method for electronic component module and electromagnetically readable data carrier

A semiconductor bear chip (9) having a bump (10) subjected to high temperatures is pressed, from the upper side, onto a wiring board (8) including a wiring pattern, a thermosetting resin film (4) covering an electrode area on the wiring pattern and having insulating particles dispersed and included and a thermoplastic resin film (7) covering the thermosetting resin film (4), while applying a ultrasonic wave, thereby inserting the bumps (10) of the semiconductor bear chip (9) through the thermoplastic resin film and the thermosetting resin film to bond the top end portion of the bump (10) with the electrode area.

Multi-layer adhesive film for die stacking

An adhesive film for die stacking at least two neighboring semiconductor dies containing metal wire bonds, comprises (a) Layer-1 adhesive, which comes in contact with the first semiconductor die and is capable of flowing around the metal wire bonds of that first semiconductor die at die attach temperatures, and (b) Layer-2 adhesive, which comes in contact with the second semiconductor die, in which Layer-2 adhesive comprises 30-85 weight % thermoplastic rubber with a glass transition temperature of less than 25°C and a weight average molecular weight of greater than 100,000.

Anisotropic electrically-conductive film, method for manufacturing same, and connection structure

一種異向性導電膜，其將於表面具有氧化被膜的焊料粒子等金屬粒子作為異向性導電連接用之導電粒子，該異向性導電膜於絕緣膜內具備金屬粒子，金屬粒子於俯視下規則排列。於金屬粒子之異向性導電膜表面側端部或異向性導電膜背面側端部之至少任一端部，以接觸或是接近之方式配置有助焊劑(flux)。較佳之金屬粒子為焊料粒子。較佳為絕緣膜成為2層結構，於其層間配置有金屬粒子。

Crimping device

A compression bonding device capable of packaging electric components on both sides of a substrate is provided. A compression bonding device 1 includes first and second pressing rubbers 15, 25. Electric components 32, 33 can be simultaneously packaged on the front face and the rear face of a substrate 31 by sandwiching the substrate 31 between the first and second pressing rubbers 15, 25. The electric components 32, 33 are not subjected to a force for horizontally moving them because the first and second pressing rubbers 15, 25 are prevented from horizontal extension by a first dam member 16. Thus, the electric components 32, 33 are connected to the substrate 31 without misalignment, thereby obtaining a highly reliable electric device 30a.

Circuit connecting material, connection structure and method for producing the same

본 발명의 회로 접속 재료는 제1 기판의 주면 상에 제1 회로 전극이 형성된 제1 회로 부재와, 제2 기판의 주면 상에 제2 회로 전극이 형성된 제2 회로 부재를, 제1 회로 전극 및 제2 회로 전극을 대향 배치시킨 상태에서 접속하기 위한 회로 접속 재료로서, 유리 라디칼을 발생하는 경화제와, 라디칼 중합성 물질과, 2급 티올기를 갖는 화합물을 함유한다.　 본 발명의 회로 접속 재료는 저온 단시간 경화가 가능하고, 또한 보존 안정성이 우수한 것이다. The circuit connection material of the present invention includes a first circuit member having a first circuit electrode formed on a main surface of a first substrate, a second circuit member having a second circuit electrode formed on a main surface of a second substrate, and a first circuit electrode; As a circuit connection material for connecting in the state which has arrange | positioned the 2nd circuit electrode, the hardening agent which generate | occur | produces a free radical, the radically polymerizable substance, and the compound which has a secondary thiol group are contained. The circuit connection material of this invention can be hardened at low temperature for a short time, and is excellent in storage stability. 회로 접속 재료, 접속 구조체, 2급 티올기, 접착력, 보존 안정성 Circuit connection material, connection structure, secondary thiol group, adhesive force, storage stability

Flip chip mounting method and bump forming method using conductive particles

Method and structure of die stacking using pre-applied underfill

Structures and processes for die stacking using an opaque or translucent pre-applied underfill material generally include selectively applying a low surface tension material to at least a portion of an alignment mark surface on a die; and applying the opaque or translucent underfill material to the die surface, wherein the underfill material does not wet or adhere to the low surface tension material such that the alignment mark surface is free of underfill material.

Curing liquid resin encapsulants of microelectronics components with microwave energy