METHOD FOR FABRICATING SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER AND SEMICONDUCTOR DEVICE
A method for fabricating a semiconductor device in which a scribing region can be diced with a high yield. The method for fabricating a semiconductor device comprising (a) a step for providing a semiconductor wafer having a plurality of chip regions in which semiconductor elements are formed, and scribe regions for separating the plurality of chip regions to include a dicing region for cutting wherein a stress relax region is defined on the outside of the dicing region in the scribe region so as to surround each chip region, (b) a step for forming a multilayer wiring structure in which an interlayer insulation layer and a wiring layer are formed alternately on the semiconductor wafer wherein a dummy wiring is arranged in the sparse-wiring-density region of the wiring layer and no dummy wiring is formed in the stress relax region at least in the uppermost wiring layer, (c) a step for forming a cover layer including a passivation layer while covering the multilayer wiring structure, (d) a step for forming a stress relax trench penetrating at least the passivation layer from above in the stress relax region, and (e) a step for dicing the semiconductor wafer in the dicing region.













