METHOD FOR MONITORING SOURCE CONTACT OF FLASH MEMORY

07-07-2001 дата публикации
Номер:
KR20010060549A
Контакты:
Номер заявки: 00-99-101962946
Дата заявки: 27-12-1999

[1]

Also 1a with a conventional plane view of flash memory cell array.

[2]

Also door has 1b 1a X-X of ' cross-sectional drawing of in flash memory cell along the cutting.

[3]

Also door has 1c 1a Y-Y of ' cross-sectional drawing of in flash memory cell along the cutting.

[4]

The 2a also method for monitoring source contact of flash memory according to an embodiment of the present invention to explain the cell array plane view.

[5]

Also the 2b of the present invention monitoring source contact method for account principle of concept.

[6]

< 도면의 주요 부분에 대한 부호의 설명 >

[7]

11, 21: semiconductor substrate 12, 22: field oxide film

[8]

13, 23: floating gate 14, 24: control gate (word line)

[9]

15, 25: drain 16, 26: common source

[10]

17, 27: drain contact 170, 270: bit line

[11]

18, 28: source contact 180, 280: common source connecting line

[12]

300: drain contact metal wiring 400 : VG terminal

[13]

500 : VD terminal 600 : VS terminal

[14]

700: VSS terminal

[15]

The present invention refers to method relates to for monitoring source contact of flash memory, source lines in particular local connection layer is formed by applying a (local interconnection) method in flash memory device, a narrow contact area source contact (over erase cell) cell over-erase cell for second contact hole a second characteristics (monitoring) monitoring relates to a method.

[16]

Generally, each source line between source cell of flash memory impurity (diffusion line) line diffusion using ion-implantation in the semiconductor substrate by forming a source lines or alternatively in a, local connection form the method. Local connection method in source lines is formed, forming hierarchies of 16 without contact to the source cell is outputted (effective cell size) chemical formula applying method line is diffused about 86% than when it that decrease as well as diffusion resistor conventional pipe joint wherein a defect occurs 0.01V 0.1V potential difference in this produces a back bias (back bias) is this produces a 1/10 unit is off. However, local connection method by turning off an NMOS connected to a flash memory device has a narrow contact area source contact of each cell the resulting liquid phase deposition is connected to the semiconductor layer. likely.

[17]

1a also local connection with a conventional method is applied and plane view cell array of a flash memory is, also X-X of door has 1b 1a 'in flash memory cell along the cutting is cross-sectional drawing of, door has 1c also Y-Y of 1a' in flash memory cell along the cutting is cross-sectional drawing of.

[18]

Conventional local connection method is applied using magnetic a field oxide film (12) by forming a active region are defined on a semiconductor substrate (11) the floating gate (13), control gate (14), drain (15) and common source (16) formed unit cell of multiple, each unit cell control gate (14) into two wavelengths through the optical word line is connected, each unit cell drain (15) to drain contact (17) is formed, each drain contact (17) is connected to the bit line (170) is formed, each unit cell common source (16) to source contact (18) is formed, each source contact (18) the common source connecting line connecting the (180). delivery is to be made is formed.

[19]

Plane view of 1a also collected and may be found in source contact (18) in parallel separated to be positioned on both connected dog 1024 method line which has a low resistance value material than would connected the objective compound. the m memory cells a. However, also on a bit line of a 1c (170) cross-sectional drawing direction of collected and may be found in source contact (18) come in contact with the filament lag in an upper portion of the. can occur liquid phase deposition. Therefore, source contact (18) and the contact condition between the carefully and fluorescent indication can be the culture to be monitored and, at same existing method could not be applied to correctly recognize. Cross-sectional drawing of 1b also collected and may be found in existing method of defective state of contacts of 1024 at of contact even when the confirming method's not surprising, a common source connecting line are connected to a common source connecting line since any voltage in the bowl at one end of contact defect even applying is semiconductor is formed regardless.

[20]

Therefore, the present invention refers to source lines local connection layer is formed by applying a method in flash memory device, a narrow contact area source contact characteristics cell over-erase cell for second contact hole a second monitoring method is provided to heat exchanger..

[21]

For achieving this purpose the present invention according to the method for monitoring source contact of flash memory method connected the local source line flash memory formed in the step; common word lines interconnects terminal VG, VD terminal coupled with the drain contact first, remaining drain contact are floating and, last common source contact the VSS terminal coupled with, the SCPs source contact remaining terminal is connected to a control terminal step VS; all cells are normal turn-on said up so as to become a state applying a voltage over-erase to the respective terminals; and said VD said VSS in said so that the fluid can flow current terminal to terminal test each terminal current flow by applying a voltage to the liquid a step for identifying a characterized in that are made out of a material which.

[22]

Hereinafter, reference to a drawing attached to the present invention as further described to a.

[23]

The 2a also method for monitoring source contact of flash memory according to an embodiment of the present invention to explain the cell array is plane view.

[24]

The present invention according to local connection method is applied using magnetic a field oxide film (22) is formed on the active region are defined on a semiconductor substrate (21) the floating gate (23), control gate (24), drain (25) and common source (26) formed unit cell of multiple, each unit cell control gate (24) into two wavelengths through the optical word line is connected, each unit cell drain (25) to drain contact (27) is formed, each drain contact (27) is connected to the bit line (270) is formed, each unit cell common source (26) to source contact (28) is formed, each source contact (28) the common source connecting line connecting the (280). delivery is to be made is formed. Also as shown in 2a, one end of the for monitoring source contact in flash memory, word lines (24) common VG terminal (400) interconnects, first drain contact (27) the VD terminal (500) a coupled with, remaining drain contacts (27) the floating (floating) and, last common source contact (28) the VSS terminal (500) a coupled with, remaining source contacts (28) the VS terminal (600) main valve 23 and connected to. Due to space problems if the patterns are the seating channel and displayed neighboring drain contact (27) is separated when the drain contact (27) for drain contact metal wiring (300) are connected into VD terminal (500) from terminal VSS (700) until outputs a relay driving signal. current flows.

[25]

The 2b also principle of method monitoring source contact of the present invention account for as concept , also 2a together with a principle of the present invention monitoring source contact. off at the first and the second.

[26]

The present invention refers to source contact (28) to monitor the state contact in, voltage such as a conditions for mutual auction first for example each terminal, VG terminal (400) the -9V of negative high voltage is applied, VD terminal (500) has a float-(float) the, VS terminal (600) and VSS terminal (700) G4 each positive high voltages of the 5V, opening sufficiently a threshold value of the memory cell VS terminal and VSS terminal (600 and 700) respectively coupled to ones of a source contact (28) all of cells adjacent to floating gate (23) that electrons present in excessive erasing [...] turndown forward cells are information is obtained to be turn-on (normally turn-on) state which, if also 2b, such as a portion of the won of contact for a bad path source contact (28) in the presence of source contact often than in a wire channel (28) the shared two electrode driving unit applies floating gate (23) present in that electrons (turn-off) turn-off a are not erased is remains at. Turn-off States cells of voltage but voltage gate attached to the can't-conductive. In such condition VG terminal (400) the OV voltage is applied, VD terminal (500) the 5V hereinafter the first and second electrodes, VS terminal (600) has a float-the, VSS terminal (700) connected to ground a test when a voltage is applied, contact is poor source contact (28) the shared two electrode driving unit applies VD terminal (500) in terminal VSS (700) is disconnected flow current to source contact (28) to be doped into the wafer and the contact condition between the. VD terminal (500) designed a voltage across a connected current or of number cell can be adjustable.

[27]

As described above, the present invention refers to source lines local connection layer is formed by applying a method in flash memory device, source contact in second contact hole effectively monitoring the process yields of a device by reflecting the objective compound. and reliability.



[1]

PURPOSE: A method for monitoring source contact of flash memory is provided to improve the yield and the reliability of the flash memory by monitoring the contact condition of the source contact in the case that the flash memory is formed by the local interconnection method of a source line.

[1]

CONSTITUTION: A plurality of word lines are connected to a common VG terminal(400), the first drain contact(27) is connected to a VD terminal(500), and the other drain contacts(27) are floated. The last common source contact(28) is connected to a VSS terminal(700), and the other common source contacts(28) are connected to a VS terminal(600). If the neighboring drain contacts(27) are separated, the drain contacts(27) are connected via a metal wire(300), so that current can be flowed from the VD terminal(500) to the VSS terminal(700).

[1]

COPYRIGHT 2001 KIPO



Method connected the local source line flash memory formed in the step;

Common word lines interconnects terminal VG, VD terminal coupled with the drain contact first, remaining drain contact are floating and, last common source contact the VSS terminal coupled with, remaining source contact the SCPs VS step terminal is connected to a control terminal;

All cells are normal turn-on said up so as to become a state applying a voltage over-erase to the respective terminals; and

Said VD said VSS in said so that the fluid can flow current terminal to terminal test each terminal by applying a voltage to the liquid a step for identifying a current flow are made out of a material which characterized by method for monitoring source contact of flash memory.

According to Claim 1,

Drain contact neighboring the seating channel and displayed pattern be separated when the drain contacts drain contact metal wiring are connected into said VD signal and the source voltage from the current flows until terminal VSS to characterized by method for monitoring source contact of flash memory.

According to Claim 1,

Said VG the pattern is coupled to said over-erase voltage conditions -9V of negative high voltage is applied, said VD terminal having a float-the, 5V the pattern is coupled to VSS terminal and said VS of each positive high voltages characterized by applying method for monitoring source contact of flash memory.

According to Claim 1,

For a bad path contact low haze when a voltage is applied over-erase said source contact electrode driving unit applies two shared presence floating gate that electrons are not erased a turn-off state characterized by the presence of method for monitoring source contact of flash memory.

According to Claim 1,

Said VG the pattern is coupled to said test voltage conditions OV the first and second electrodes, said VD the pattern is coupled to 5V hereinafter the first and second electrodes, said VS the having a float-terminal, a ground terminal said VSS characterized by the method for monitoring source contact of flash memory.

According to Claim 1,

For a bad path on applied test voltage said source contact said VSS terminal to terminal if present said VD in current flow from becoming disconnected characterized by method for monitoring source contact of flash memory.