METHOD OF MAKING AN ELECTRONIC DEVICE HAVING A LIQUID CRYSTAL POLYMER SOLDER MASK LAMINATED TO AN INTERCONNECT LAYER STACK AND RELATED DEVICES
The present invention refers to electronic device manufacturing field of and, more particularly, liquid crystalline polymer rigid silicon substrate and an electronic device having an solder mask, and associated method relates to. Semiconductor and integrated circuit technologies to improve user-according to, plurality of input and output (I/O) with fins high-functional integrated circuit component coats the reinforcing is connected to the semiconductor layer. tends. As a result, washing without damaging washing articles by determining smaller integrated circuit is, they more closely the previous is arranged together a smaller I/O has incrementally pad. These integrated circuit to a match to, closely to provide a these integrated circuit pad of footprints matching printed wiring board (PWB). there is a need for an. However, between the pad on IC size [...] an Image capturing small solder pads on the printed circuit board at a faster rate presently generated of wet liquid to flow down. As a result, in some modern to a device is connected to the semiconductor layer. gap interconnecting technology. Such devices in order to activate said, PWB has an integrated circuit of or pad, or fan-out packaging to use such additional [...]. may require. This allows the system size capable of restricting, greater than the integrated circuit itself causes a case of battery size. As such, integrated circuit on a printed circuit board connected additional method is is required. Therefore, in terms of background prior noted act of adding, thin liquid crystalline polymer (LCP) having solder mask method of manufacturing electronic devices purpose of the invention the present is to provide a is. A subject the other such to conform to the present invention, characterized, on the wafer substrate a stiff rigid and advantages link layer form a stack method of manufacturing electronic devices including produced by, mutual link layer between an adjacent stack patterned conductor layer, at least one dielectric layer, and a top magnetic layer patterned conductor layer separated by solder mask in a plurality of patterned conductor layer including an. In addition the method like protrusion on one edge aligns with solder pads having solder LCP possibility internal holes on includes a mask is formed. LCP solder mask with the method thereof link layer step laminate and aligned stack, and boring solder further includes a position. Furthermore, method thereof using a solder bump is formed on at least one solder pads includes the steps of attaching an circuit components.. LCP behaves as the only subtractive decide mask for solder solder mask is not limited to be used, at least one solder pads other attached circuit components can be used for method. For example, in part in the embodiment, at least one circuit component is conductive epoxy bond or intermetallic use of such as via formation of, using other techniques can be attached to solder pads. Such method of an electronic device, to an thinner than the prior art generating, and prior art having a finer pitch than electronic component array of solder pads attaching the effective but include the ability to not limited them to, blades, presenting a several advantages. The solder to a circuit components by heating a reuse can be achieved, and relatively, and solder bath to LCP by immersing electronic device defined by solder mask can be position drilling. Additionally or alternatively, the drilling and the solder paste by drilling can be position. Solder mask with LCP laminate together stack link layer resistance, and it is preferably solder mask with LCP in vapour-sterilisable link layer stack with heat and pressure carried out by can be. LCP a plastic body, plastic lid to form a solder mask laser milling or punching achieved by can be. Plurality of patterned a conductor layer is formed the thin film deposition of the existing method can be achieved by methodology. At least one circuit component at least one integrated circuit may comprise an. Addition, a solder mask LCP 0.0015 inch may have a thickness of less than. Furthermore, semiconductor layer may comprise an integrated circuit die. Device in terms semiconductor layer, the semiconductor layer interacts link layer relates to device including stack. Layer stack a plurality of patterned conductor layer, between adjacent patterned conductor layer, at least one dielectric layer, and a top magnetic layer consists of patterned conductor layer to the pad in response to the solder on. Plurality of patterned conductor layer LCP solder mask on a top-most layer and has a plastic body, plastic lid that are aligned with solder pads. Addition, solder mask LCP stack, mutual link layer in addition which the molten bond with the between. Perforated solder is deposited, a circuit component and through solder is electrically coupled to solder pads. Also the present invention according to Figure 1 shows a method of manufacturing electronic devices is flow of. Also the 2a-2f of the present invention electronic device a be schematized consequently, a design cost for applying is lobated cross. Also the present invention according to Figure 3 shows a more specific of manufacturing electronic devices is flow of a method. Now a preferred embodiment of the present invention the present invention refers to a shown that, with an reference to drawing for a more thorough hereinafter will is described. However the present invention refers to many different types can be implemented in the disclosed embodiment to exemplify limited interpreted as being a does not have. Rather than the same, these embodiment relate the present disclosure being inserted into the and completely and throughly that it is, the display unit displays images art to one skilled in the art is provided for conveying sufficiently range of the present invention. The same reference number the same throughout the is speaking and a member, in alternate symbol prime and in the embodiment is used to represent similar members. Also 1, and also flow of 2a-2f (50), originally to while referred to, method of manufacturing electronic devices now. are described. Also 2a shown in thus initiated (block (52)) after, between adjacent patterned conductor layer a dielectric layer (19) having, plurality of patterned conductor layer (15) for including mutual link layer stack (14) is rigid wafer substrate (12) is formed on. Furthermore, at least one of solder pads (23) is rigid wafer substrate (12) arranged on patterned outermost with a stack entire layer electric layers (block (54) in) is formed on. Solder pads (23) is formed of copper by are generally, diameter and 0.006 " can be hereinafter. Well as, solder pads (23) in addition the part at the applications can take the different diameters. Furthermore, as shown in also 2b, at least one of solder pads (23) and an alignment 10 can mount daughter boards D1 at least one puncturing (17) having solder mask LCP (16) is formed (block (56)). Perforated (17) for example, small or by 0.001 inches and 0.002 inches, or may be bigger. Furthermore, as shown in also 2c, LCP solder mask (16) and inter- link layer stack (14) together is laminate (block (58)). "Alignment" by solder pads (23)-piercing contained within the solder of dispensing and electronic component and attaching belt segments that is accessible for use in. are intended to. This alignment initially in, solder mask LCP (16) co- link layer stack (14) an abstract to ALIGN the fixture or guide which is obtained by using a, so as to reach the alignment end then to ALIGN the microscope the upper carried out by can be. Such method the 0.0005 inches and 0.001 inch in a range of position accuracy alignment of that advantageously allows. LCP has wear and damage to be highly resistant to providing, including fact that and exhibiting excellent tensile strength, various reasons to form a solder mask material that has advantageous in particular. Generally, the LCP in addition high chemical resistance, flame-retardant unique, has weathering resistance and good. The aromatic or halogenated hydrocarbon LCP, strong acid, base, ketone, and other aggressive industrial material including, at elevated temperature to stress crack in the presence of most chemicals. withstand. The present invention according to a one skilled art corresponding of an electronic device used to create various LCP. must understand that that. Solder mask (16) use of LCP constituting a thinner than some prior art solder mask causes a solder mask (for example, 0.002 inch in contrast 0.001 inch). This size beyond its own integrated circuit for increasing the size of the overall package to the printed circuit board by or of a substrate without narrow spacing between the round guide tube and the attachment of an integrated circuit having a memory and allow advantageous, 0.008 " method of high pitch solder mask device of Image display unit allows protection. Addition, LCP solder mask (16) prior art some superior compared to solder mask exhibits thickness uniformity. Furthermore, LCP solder mask (16) of the existing method the solder mask than good conductors of electricity provides isolation (of the existing method solder mask of 500 bolt/mil a in contrast, approximately 3500 a have bolt/mil dielectric strength). Furthermore, LCP is accessed a control gate is formed on the material-tight, LCP solder mask (16) to each other link layer stack (14) by sealing to, base and protected from external contamination same wafer substrate degradation protected from the moisture. Furthermore, as shown in also 2d, solder (20)-piercing (17) to 2000 (block (60)). Furthermore, as shown in also 2e, integrated circuit (22) such as, circuit components the solder to the pads (20) and which are in contact with the, and using solder mask to be attached to same (16) 2000 on (block (62)). Block (64) exhibits termination of the method. The present invention to meet the electronic drive apparatus and method a in more specific for producing flow of Figure 3 is also (50') by referencing a, and also by referencing a 2a-2f also is described now. Start (block (52 ') after, mutual link layer stack (14) is rigid wafer substrate (12) is formed on (block (54')). Wherein, mutual link layer stack (14) a corresponding array pattern, receive radiation the element is a of solder pads (23) includes. Addition, patterned conductor layer (15) including a, mutual link layer stack (14) is of the existing method is formed by thin film deposition methodology. Mutual link layer stack (14) for other dots forming the method can be also using a must be appreciated. Next, the method having a thickness of less than 0.0015 inches, LCP solder mask (16) a plurality of at least one of solder pads (23) and an alignment at least one perforation (17) and/or laser milling includes punching a (block (56')). Then solder mask LCP (16) and inter- link layer stack (14) is in vapour-sterilisable aligned via the application of heat and pressure and is laminate (block (58')). Autoclave isotropic pressure (i.e., the same pressure in all directions) that advantageously provides, and transforming the LCP during laminating process is to prevent the. But preferably using the autoclave and during lamination, press (inert atmosphere or vacuum bag in product is available to) used to conduct such a lamination also can be. Solder (20) time, the by immersing the solder bath (for example, the duration of 5 seconds and 240 °C) or squeegees solder paste or conductive epoxy pierce through the either positioned by boring by the or vapor deposition (17) to 2000 (block (60')). An LCP solder mask (16) does not a correct time. Integrated circuit then (22) the solder (20) are heated and, then, re-melting the resin is cured to solder pads (23) is attached to (block (62')). Block (64') exhibits termination of the method. Finished electronic device (10) is also 2f is shown in. Electronic device (10) a plurality of patterned conductor layer (15), between adjacent patterned conductor layer, at least one dielectric layer (19), and a plurality of patterned conductor layer a top-most layer at least one of solder pads (23) including a rigid wafer substrate interacts link layer stack (14) having, rigid wafer substrate (12) includes. LCP solder mask (16) to each other link layer stack (14) on the, and mask at least one of solder pads (23) and is aligned with at least one puncturing (17) have a. LCP solder mask (16) co- link layer stack (14) between which the molten junction (18) is connected to the semiconductor layer.. The molten junction (18) the LCP solder mask (16) co- link layer stack (14) melts and formed during bonding, and cross a device in a photograph, can be readily visible to the. Solder conductive polymer on can be adhesive is employed may be perceptible even, solder (24) (solder melted charge to form descriptive) of perforation that the openings (17) is. Integrated circuit (22) the solder (24) through the solder pads (23) is electrically coupled to. A method for making an electronic device includes forming an interconnect layer stack on a rigid wafer substrate having a plurality of patterned electrical conductor layers, a dielectric layer between adjacent patterned electrical conductor layers, and at least one solder pad on an uppermost patterned electrical conductor layer. An LCP solder mask having at least one aperture therein alignable with the at least one solder pad is formed. The LCP solder mask and interconnect layer stack are aligned and laminated together. Solder is positioned in the at least one aperture. At least one circuit component is attached to the at least one solder pad using the solder. Adjacent patterned conductor layer a dielectric body between them a plurality of layer patterned conductor layer, and a top magnetic layer patterned conductor layer includes at least one of solder pads, on the wafer substrate rigid link layer form a stack; said at least one of solder pads and alignable in case of the breakage of a LCP having at least one puncturing having solder mask, said mutual with link layer not in contact with said LCP solder a mask is formed; said mutual link layer in solder mask said LCP stack, said at least one puncturing improve a heat resistance; and solder mask said LCP laminate together stack link layer mutual said step; at least one puncturing said steps of placing solder; and said at least one said using solder at least one of solder pads attaching circuit components including to characterized by electronic device manufacturing method. According to Claim 1, said at least one circuit components a attaching said solder to including heating a manufacturing method characterized by electronic device. According to Claim 1, said to solder said solder bath by immersing the electronic device at least one puncturing said that it is positioned characterized by electronic device manufacturing method. According to Claim 1, the at least one puncturing said solder paste and the by at least one puncturing said that it is positioned characterized by electronic device manufacturing method. According to Claim 1, the at least one puncturing said and the conductive epoxy to by at least one puncturing said that it is positioned characterized by electronic device manufacturing method. According to Claim 1, said LCP solder mask and said mutual link layer stack together form a metal laminate said LCP solder mask and said mutual link layer stack with heat and pressure to including applying a manufacturing method characterized by electronic device. According to Claim 1, the solder mask said LCP at least one puncturing to form said solder mask said LCP milling the and laser punching a to characterized by including at least one electronic device manufacturing method. According to Claim 1, said mutual link layer form a stack a film deposition by said plurality of patterned conductor to form a layer including to characterized by electronic device manufacturing method. According to Claim 1, said at least one circuit component to at least one integrated circuit manufacturing method characterized by including electronic device. According to Claim 1, a solder mask said LCP 0.0015 that the same is provided with at a thickness of less than inch characterized by electronic device manufacturing method.