Semiconductor package and manufacturing method thereof

08-03-2019 дата публикации

Номер:

CN0105280598B

Автор: 江政嘉, 林欣达, 黄富堂, 王愉博, 王隆源, 徐逐崎, 施嘉凯

Принадлежит: Siliconware Precision Industries Co Ltd

Контакты:

Номер заявки: 36-10-20144624

Дата заявки: 29-07-2014

[1]

Technical Field

[2]

The invention relates to a semiconductor package and manufacturing method thereof, in particular to a conductive column electrically connected on the ball does with the stacked type semiconductor package and manufacturing method thereof.

[3]

Background Art

[4]

In the stacked type semiconductor package in the technology of, frequents in the upper substrate and the lower substrate are respectively formed on the used for electrically connecting a plurality of solder balls, the upper substrate and the lower substrate to laminating the through the solder balls electrically connected with each other, and by the solder balls control the semiconductor package and the height of the upper substrate and the lower substrate of the gap between the.

[5]

However, some of the flux re-welding (reflow) operation which forms the ping pong state, is not easy to control the height of the semiconductor package, and the fusion between the solder balls at needs to have a large space, so as not to be widely used for having more fine-pitch of the semiconductor on the package.

[6]

Figure 1 A and Figure 1B is the section view schematic view of prior art semiconductor package 1 and its manufacturing method.

[7]

As shown in Figure 1 A shown, first providing with a plurality of 1st pad 101 1st of base plate 10, and form a plurality of having a pitch d1 1st of solder balls 11 to some 1st pad 101 on, and by a plurality of solder balls 121 of the semiconductor wafer 12 is arranged in the 1st substrate 10 on, re-form has a plurality of openings 131 of package 13 for the 1st base plate 10 on the, in order to coat the semiconductor wafer 12 and the welding bead 121 with the 1st are exposed out of the solder ball 11 of the top and the side. At the same time, provided with a plurality of 2nd pad 141 of the 2nd base plate 14, and form a plurality of the solder balls should be some 1st 11 2nd of solder balls 15 to some 2nd pad 141 on.

[8]

As shown in Figure 1 B shown, these 1st to solder balls 11 and these 2nd solder ball 15 re-welding operation is carried out, in order to together form a molten state and engaged with each other into a plurality of conductor 16.

[9]

The above-mentioned disadvantages of the prior art lies in: some of the 1st solder balls 11 and these 2nd solder ball 15 for re-welding operation which forms the ping pong state, is not easy to control the semiconductor package 1 of the height, or the package colloid 13 with the 2nd base plate 14 between the gap 17, and the some 1st solder balls 11 or some of the 2nd solder ball 15 mutually easily between the bridge and the short-circuiting, plus some of the 1st solder balls 11 and these 2nd solder ball 15 of the fusion at a larger space is required to have, so as not to be widely used for with more fine-pitch of the semiconductor package 1 on.

[10]

Therefore, how to overcome the above problems of the prior art, it is has become the current anxious to resolve the issue.

[11]

Content of the invention

[12]

In view of the above deficiencies of the prior art, the purpose of this invention to provide a semiconductor package and manufacturing method thereof, be easy to control the height of the semiconductor package, and used for having more fine-pitch the conduction of the ball semiconductor on the package.

[13]

The semiconductor package includes: 1st semiconductor device, with the surface of the 1st 1st the bottom surface with the top surface; a plurality of conducting ball, and it is formed on the top surface of the semiconductor device of the 1st 1st; 2nd semiconductor device, with the surface of the bottom surface of the top surface of the 2nd and 2nd, and the 2nd 1st is facing the bottom surface of the top surface of the 1st of the semiconductor device; and a plurality of conductive columns, and it is formed on the bottom surface of the semiconductor device of the 2nd 2nd, and respectively engaging the some on the ball in order to electrically connecting the semiconductor device and the 1st 2nd semiconductor device, wherein the conductive column height of less than 300 microns.

[14]

The invention also provides a semiconductor package, comprising: 1st semiconductor device, having a top surface and the bottom surface of the 1st 1st; a plurality of conducting ball, and it is formed on the top surface of the semiconductor device of the 1st 1st; 2nd semiconductor device, with the surface of the bottom surface of the top surface of the 2nd and 2nd, and the 2nd 1st is facing the bottom surface of the top surface of the 1st of the semiconductor device; and a plurality of conductive columns, and it is formed on the bottom surface of the semiconductor device of the 2nd 2nd, and respectively engaging the some on the ball in order to electrically connecting the semiconductor device and the 1st 2nd semiconductor device, wherein the conductive column is a cylinder and one half of the height greater than its diameter.

[15]

The invention also provides a semiconductor package, comprising: 1st semiconductor device, having a top surface and the bottom surface of the 1st 1st; a plurality of conducting ball, and it is formed on the top surface of the semiconductor device of the 1st 1st; 2nd semiconductor device, with the surface of the bottom surface of the top surface of the 2nd and 2nd, and the 2nd 1st is facing the bottom surface of the top surface of the 1st of the semiconductor device; and a plurality of conductive columns, and it is formed on the bottom surface of the semiconductor device of the 2nd 2nd, and respectively engaging the some on the ball in order to electrically connecting the semiconductor device and the 1st 2nd semiconductor device, wherein the conductive column is elliptic cylinder and its long axis is greater than the length of the minor axis of 1.1 times.

[16]

The invention also provides a method for making a semiconductor package, comprising: providing opposite the top surface of the 1st 1st 1st with the bottom surface of the semiconductor device, and has a relatively of the top surface of the 2nd 2nd 2nd with the bottom surface of the semiconductor device, the semiconductor device of the top surface of the 1st 1st is formed with a plurality of turn on the ball, and the 2nd 2nd of the bottom surface of the semiconductor device is formed with a plurality of conductive columns, wherein the conductive column height is smaller than 300 microns; and the 1st semiconductor device on some on the ball are respectively corresponding to the semiconductor device on the 2nd these conducting pin, in order to some on the ball are respectively engaged with the some conductive column electrically connected to the semiconductor device and the 1st 2nd semiconductor device.

[17]

The above 1st 2nd semiconductor device or the semiconductor device can be a substrate, intermediary board, a semiconductor wafer, the semiconductor wafer or semiconductor package structure.

[18]

The ball on the ball can be a single layer, double-layer sphere or three-layer sphere, the double-layer sphere has inner ball with the coating of the inner layer of the outer layer of the ball, the inner layer of the three-layer sphere with the sphere and the sphere of the inner layer of the coating in order of the intermediate layer and the outer layer. Or, the conducting ball can have at least one cylinder with the coating of the cylinder and the outer layer, and the conductive ball can be composed of varying ratios of tin-lead material, tin-silver material or formed by the tin-silver-copper material.

[19]

The conductive column can be cylinders and one half of the height greater than its diameter, or the conductive column elliptical cylinder and its long axis is greater than the length of the minor axis of 1.1 times, the conductive column can also be is a polygonal cylinder or spherical cylinder.

[20]

The above semiconductor package and manufacturing method thereof can include: the 1st encapsulation structure of the semiconductor device with the top surface of the 1st 2nd 2nd between the bottom surface of the semiconductor device, in order to coat these conducting ball and some of the conducting pin.

[21]

The above semiconductor package and manufacturing method thereof in, the 1st 1st of the top surface of the semiconductor device provided with a semiconductor element, in order to make the semiconductor element block is embedded in the package colloid.

[22]

The above semiconductor package and manufacturing method thereof can include: forming the protection layer on the semiconductor element and the 2nd the gap between the semiconductor device, the protective layer as a protection, for radiating or electrical ground.

[23]

The above semiconductor package and manufacturing method thereof can include: forming a plurality of supporting elements for the semiconductor device with the 1st 2nd between semiconductor device, of the support element as the support, for radiating or electrical ground.

[24]

The above semiconductor package and manufacturing method thereof can include: forming at least one electronic component for the 1st 2nd semiconductor device or the semiconductor device on the inside or on the surface.

[25]

An upper can be known, the invention of the semiconductor package and manufacturing method thereof in, mainly through the top surface of the 1st semiconductor device for forming a plurality of conductive ball, and the bottom surface of the 2nd semiconductor device for forming a plurality of conductive columns, and the some conducting ball and respectively engaging the some conductive column in order to electrically connected to the 1st and 2nd semiconductor device, wherein the conductive the height of the post can be smaller than 300 microns or greater than one half of the diameter of the, or the long axis of the conductive length may be greater than the length of the minor axis of 1.1 times.

[26]

Therefore, the invention is used for the re-welding operation is only needed when the some conducting spherical into molten state, but some of the conducting pin will preserve the state does not change the net frame state will not form, to the some conduction ball and respectively engaging the some conducting pin, so as to avoid these conducting ball each other bridge and the short-circuiting, and is easy to control the height of the semiconductor package, or the package colloid with the 2nd the gap between the semiconductor device, also can be used for having more fine-pitch the conduction of the semiconductor package on the ball, can also improve the reliability of the semiconductor package structure.

[27]

Description of drawings

[28]

Figure 1 A and Figure 1B is the section view schematic view of prior art semiconductor package and manufacturing method thereof;

[29]

Figure 2 A to Figure 2E is the section view schematic view of semiconductor package and manufacturing method thereof of the 1st embodiment;

[30]

Figure 3 A to Figure 3E is the section view schematic view of semiconductor package and manufacturing method thereof of the 2nd embodiment;

[31]

Figure 4A is the section view schematic view of a semiconductor package of the present invention 3rd embodiment of;

[32]

Figure 4B is the section view schematic view of a semiconductor package of the present invention 4th embodiment of;

[33]

Figure 5 A to Figure 5D is the schematic view of the present invention are respectively various embodiments the conduction of the ball; and

[34]

Figure 6 A to Figure 6C is the schematic view of the present invention are respectively various embodiments of conductive column.

[35]

Description of the symbols

[36]

1. 2 A, 2 b, 2 c, 2 d semiconductor package

[37]

10 1St base plate

[38]

101. 201 1St pad

[39]

11 1St solder ball

[40]

12 Semiconductor wafer

[41]

121. 28 Solder ball

[42]

13. 24 Package colloid

[43]

131. 241 Opening

[44]

14 2Nd base plate

[45]

141. 202 2Nd pad

[46]

15 2Nd solder ball

[47]

16 Conductor

[48]

17. 271 Gap

[49]

20 1St semiconductor device

[50]

20 A 1st top surface

[51]

20 B 1st bottom surface

[52]

21. 21 A, 21 b, 21 c, 21 d on ball

[53]

211 At the top of the

[54]

212 Side

[55]

213 And the inner layer of the body of the

[56]

214 Intermediate layer

[57]

215 Of the outer layer

[58]

216 Cylinder

[59]

22 Semiconductor element

[60]

221 Conductive element

[61]

23 Primer

[62]

25 2Nd semiconductor device

[63]

25 A 2nd top surface

[64]

25 B 2nd bottom surface

[65]

251 3Rd pad

[66]

26. 26 A, 26 b, 26 c conductive column

[67]

27 Protective layer

[68]

29 Support element

[69]

30 Electronic element

[70]

D1, d2 interval

[71]

The height H

[72]

L length of the major axis

[73]

The diameter of the R

[74]

S length of the minor axis.

[75]

Mode of execution

[76]

The following by a description of the specific embodiment of the embodiment of the present invention, technical personnel in the field by the specification the disclosure easily understand the other advantages and effects of this invention.

[77]

Need-to-know, the specification attached schema by the structure of the , proportion, size and the like, are only used for cooperating with the specification the disclosure, for the understanding of the technical personnel in the field with the reading, and non-used for limiting the invention can be implemented a limited condition, it is not with the essence of the technical significance, modification of any structure, the proportionate relationship change or size adjustment, without prejudice to the invention can be derived from the efficacy and the purpose of the can be reached under the, shall remain with the revealed by the present invention the technical content that can be fall within the scope of.

[78]

At the same time, cited in this specification such as "on", "a", "1st", "2nd", "top", "bottom" and the like terms, also only for ease of description of the invention, but not for limiting the scope of this invention can be implemented, its relative relation between the change or adjustment, without substantive change under the technical content, when the also as the scope of this invention can be implemented.

[79]

Figure 2 A to Figure 2E is the section view schematic view of a semiconductor package of the present invention 2 a and its preparation method of the 1st embodiment.

[80]

As shown in Figure 2 A shown, first providing has opposite the top surface of the 1st 20 a with the bottom surface of the 1st 20 b, a plurality of 1st pad 201 and a plurality of 2nd bond pad 202 of the 1st semiconductor device 20, some of the 1st pad 201 and these 2nd bond pad 202 are respectively formed on the top surface of the 1st 20 a and the bottom of the 1st 20 b.

[81]

Then, form a plurality of having a pitch d2 conduction of the ball 21 in the 1st semiconductor device 20 of the top surface of the 1st 20 a of these 1st pad 201 on, and set up such as the semiconductor wafer of the semiconductor element 22 for the 1st semiconductor device 20 of the top surface of the 1st 20 a, and through a number of conductive element such as solder ball 221 is electrically connected with the semiconductor element 22 with the 1st semiconductor device 20, then forming the primer 23 in the semiconductor element 22 with the 1st semiconductor device 20 of the top surface of the 1st 20 a to cover between these conductive element 221.

[82]

These conducting ball 21 interval d2 can be smaller than the existing 1 A 1st of the solder ball 11 interval d1, but not limited to this. Moreover, the conducting ball 21 can be a uniform sphere, and according to different laws or regulations or the melting point of the demand from the different proportion of tin-lead (Sn - Pb), tin-silver (Sn - Ag) or tin-silver-copper (Sn - Ag - Cu) formed of material such as, for example 63 Sn - 37 Pb, 90Sn - 10Pb, 98Sn - 2Ag, 95.5 Sn - 4.0 Ag - 0.5 cu and the like.

[83]

At the same time, the conducting ball 21 can be a single layer of the ball, the ball of the ball-or three layers, the double-layer sphere has inner ball with the coating of the inner layer of the outer layer of the ball, the inner layer of the three-layer sphere with the sphere and the sphere of the inner layer of the coating in order of the intermediate layer and the outer layer, the conducting ball 21 can also have at least one cylinder with the coating of the cylinder outer, please see Figure 5 A to Figure 5 D.

[84]

As shown in Figure 2 B shown, encapsulation structure 24 for the 1st semiconductor device 20 of the top surface of the 1st 20 a, in order to coat these conducting ball 21, semiconductor element 22, the conductive element 221 and primer 23 and embedding the semiconductor element 22 for the package colloid 24 in, can also be exposed out of the semiconductor element 22 on the upper surface. Followed, by laser or other means for the package colloid 24 on the burn-through or form a plurality of openings 241 to are exposed from the some on ball 21 of the top 211, but may be not exposed out of the some on ball 21 side 212 in order to form the relatively small opening 241.

[85]

As shown in Figure 2 C shown, provided opposite to the top surface of the 2nd has 25 a with the bottom surface of the 2nd 25 b and a plurality of 3rd pad 251 of the 2nd semiconductor device 25, and form a plurality of has the H of the height of the conductive column 26 for the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b of the some 3rd pad 251 on the, and the conductive column 26 can be smaller than the height H of 300 microns (µm). The 1st semiconductor device 20 or 2nd semiconductor device 25 can be a substrate, intermediary board, a semiconductor wafer, the semiconductor wafer or the semiconductor package structure and the like, the intermediary board can be a silicon-containing material of the intermediary board, the inorganic lie between the board or organic in and lie between the board and the like.

[86]

The conductive column 26 a can be cylinders and the height H is larger than one half of the diameter R (H>1/2 R), or the conductive column 26 b elliptical cylinder and its long axis length L is greater than the length of the minor axis of the S 1.1 times (L>1.1 S), the conductive column 26 can also be is a polygonal cylinder or spherical cylinder and the like. The conductive column 26 can be made of a copper, gold or alloys thereof and other metal material or conductive material, and the conductive column 26 can be formed on the surface of the oxidation (not shown in the Figure ), such as electroplating of the chromium layer or organic may weld protective film (Organic Solderablity Preservative, OSP).

[87]

As shown in Figure 2 D shown, the map 2 B 1st of the semiconductor device 20 of these conducting ball 21 respectively corresponding to Figure 2 C 2nd of semiconductor device 25 on some of the conducting pin 26, and by re-welding operation would be the some on ball 21 forming a molten state, and the some on ball 21 are bonded respectively these conducting pin 26 to electrically connected to the 1st semiconductor device 20 and the 2nd semiconductor device 25.

[88]

In addition, the protective layer can be formed 27 for the semiconductor element 22 with the upper surface of the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b of the gap between the 271. The protective layer 27 can be non conductive film (non - conductive film, NCF), (adhesive film), prepreg (prepreg) body, polyimide (polymide, PI), and the radiating (thermal adhesive) or the ground plane (ground) and the like, and this protective layer 27 can be used for the protection of the semiconductor element 22 from damage and the 2 D of the reliability of the overall structure, can also be to the semiconductor element 22 producing the heat radiating effect, can also be used for electrically grounding to prevent electromagnetic interference (electromagnetic interference, EMI) or electrostatic discharge (electrostatic discharge, ESD).

[89]

As shown in Figure 2 E shown, forming a plurality of solder balls 28 for the 1st semiconductor device 20 of the some 2nd bond pad 202 on, so as to form a semiconductor package 2 a.

[90]

The invention also provides a as shown in Figure 2 E indicated by the semiconductor package 2 a. The semiconductor packages 2 a includes a 1st semiconductor device 20, is a plurality of ball 21, a 2nd semiconductor device 25, a plurality of conductive column 26 and a package colloid 24.

[91]

The 1st semiconductor device 20 has a relatively of the top surface of the 1st 20 a with the bottom surface of the 1st 20 b, a plurality of 1st pad 201 and a plurality of 2nd bond pad 202, these 1st pad 201 and these 2nd bond pad 202 are respectively formed on the top surface of the 1st 20 a and the bottom of the 1st 20 b.

[92]

These turn on the ball 21 can be having a pitch d2 the 1st and is formed on the semiconductor device 20 of the top surface of the 1st 20 a of these 1st pad 201 on, and the spacing d2 can be smaller than the existing 1 A 1st of the solder ball 11 interval d1, but not limited to this. The conducting ball 21 can be a uniform sphere, and according to different laws or regulations or the melting point of the demand from the different proportion of tin-lead (Sn - Pb), tin-silver (Sn - Ag) or tin-silver-copper (Sn - Ag - Cu) formed of material such as, for example 63 Sn - 37 Pb, 90Sn - 10Pb, 98Sn - 2Ag, 95.5 Sn - 4.0 Ag - 0.5 cu and the like.

[93]

[94]

The 2nd semiconductor device 25 having a relatively of the top surface of the 2nd 25 a with the bottom surface of the 2nd 25 b and a plurality of 3rd pad 251. The 1st semiconductor device 20 or the 2nd semiconductor device 25 can be a substrate, intermediary board, a semiconductor wafer, the semiconductor wafer or the semiconductor package structure and the like, the intermediary board can be a silicon-containing material of the intermediary board, the inorganic lie between the board or organic in and lie between the board and the like.

[95]

These conducting pin 26 can be less than 300 microns of height H, and are respectively formed on the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b of the some 3rd pad 251 on, and some of the conducting pin 26 can be respectively engaged with the some on ball 21 to electrically connected to the 1st semiconductor device 20 and the 2nd semiconductor device 25.

[96]

The conductive column 26 a can be cylinders and the height H is larger than one half of the diameter R, or the conductive column 26 b elliptical cylinder and its long axis length L is greater than the length of the minor axis of the S 1.1 times, the conductive column 26 can also be is a polygonal cylinder or spherical cylinder and the like. The conductive column 26 can be made of a copper, gold or alloys thereof and other metal material or conductive material, and the conductive column 26 can be formed on the surface of the oxidation (not shown in the Figure ), such as electroplating of the chromium layer or organic may weld protective film (OSP).

[97]

The package colloid 24 can be formed in the 1st semiconductor device 20 of the top surface of the 1st 20 a in order to coat these conducting ball 21, and the package colloid 24 can have a plurality of openings 241 to are exposed from the some on ball 21 of the top 211.

[98]

The semiconductor packages 2 a can include for example the semiconductor wafer of the semiconductor element 22, which is set for the 1st semiconductor device 20 of the top surface of the 1st 20 a and embedding the package colloid 24 in, the semiconductor element 22 can be exposed on the upper surface of the package colloid 24 the upper surface of the, and the semiconductor element 22 can be through a plurality of conductive element 221 is electrically connected with the 1st semiconductor device 20.

[99]

The semiconductor packages 2 a may include a primer 23, formed in the semiconductor element 221 and the 1st semiconductor device 20 in order to cover the between the some conductive element 221.

[100]

The semiconductor packages 2 a may include a protective layer 27, formed in the semiconductor element 22 with the upper surface of the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b of the gap between the 271. The protective layer 27 can be non conductive film (NCF), adhesive film, prepreg, polyimide (PI), and the radiating or ground plane and the like, and this protective layer 27 can be used for the protection of the semiconductor element 22 from damage and increase the semiconductor package 2 a of the reliability of the structure, can also be to the semiconductor element 22 producing the heat radiating effect, can also be used for electrically grounding to prevent electromagnetic interference (EMI) or electrostatic discharge (ESD).

[101]

Figure 3 A to Figure 3E is the section view schematic view, and Figure 3 A to Figure 3 E with the Figure 2 A to diagram of semiconductor package 2 b and its manufacturing method of the embodiment of the 2nd 2 E the same part of the description will not be repeated.

[102]

As shown in Figure 3 A shown, first providing has opposite the top surface of the 1st 20 a with the bottom surface of the 1st 20 b, a plurality of 1st pad 201 and a plurality of 2nd bond pad 202 of the 1st semiconductor device 20, some of the 1st pad 201 and these 2nd bond pad 202 are respectively formed on the top surface of the 1st 20 a and the bottom of the 1st 20 b.

[103]

Then, form a plurality of having a pitch d2 conduction of the ball 21 in the 1st semiconductor device 20 of the top surface of the 1st 20 a of these 1st pad 201 on, and set up such as the semiconductor wafer of the semiconductor element 22 for the 1st semiconductor device 20 of the top surface of the 1st 20 a, and through a plurality of such as solder balls or bonding wire conductive element 221 is electrically connected with the semiconductor element 22 with the 1st semiconductor device 20.

[104]

As shown in Figure 3 B shown, provided opposite to the top surface of the 2nd has 25 a with the bottom surface of the 2nd 25 b and a plurality of 3rd pad 251 of the 2nd semiconductor device 25, and form a plurality of has the H of the height of the conductive column 26 for the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b of the some 3rd pad 251 on, and the conductive column 26 can be smaller than the height H of 300 microns.

[105]

As shown in Figure 3 C shown, the chart 3 A 1st of the semiconductor device 20 of these conducting ball 21 respectively corresponding to Figure 3 B 2nd of semiconductor device 25 on some of the conducting pin 26, and by re-welding operation would be the some on ball 21 forming a molten state, and the some on ball 21 are bonded respectively these conducting pin 26 to electrically connected to the 1st semiconductor device 20 and the 2nd semiconductor device 25.

[106]

As shown in Figure 3 D shown, formed with a more fine-grained package colloid 24 the 1st semiconductor device 20 of the top surface of the 1st 20 a with the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b between, in order to coat these conducting ball 21, the conductive column 26, semiconductor element 22 and conductive element 221, and with the package colloid 24 substituted Figure 2 A clamworm shown in 23.

[107]

As shown in Figure 3 E shown, forming a plurality of solder balls 28 for the 1st semiconductor device 20 of the some 2nd bond pad 202 on, so as to form a semiconductor package 2 b.

[108]

The invention also provides a if article 3 E as shown semiconductor package 2 b, Figure 3 E semiconductor package 2 b with the Figure 2 E semiconductor package 2 a roughly the same, the main differences are as follows:

[109]

In fig. 3 E in, the package colloid 24 formed on the 1st semiconductor device 20 of the top surface of the 1st 20 a with the 2nd semiconductor device 25 of the bottom surface of the 2nd 25 b between, in order to coat these conducting ball 21, the conductive column 26, semiconductor element 22 and conductive element 221.

[110]

Therefore, Figure 3 E 2nd of semiconductor device 25 of the bottom surface of the 2nd 25 b with the package colloid 24 and not formed between the Figure 2 E gap 271, whereas Figure 3 E 2nd of semiconductor device 25 of the bottom surface of the 2nd 25 b with the semiconductor element 22 can also be does not need to be formed between the with fig. 2 E protective layer 27, and Figure 3 E can be used for more fine-grained package colloid 24 is directly coated the some conductive element 221 in order to replace the Figure 2 E Pastern of 23.

[111]

Figure 4A is the semiconductor package 2 c with the plans of this invention semiconductor package 2 c is a section view of the 3rd embodiment of the schematic view, Figure 4 A 3 E semiconductor package 2 b is roughly the same, the main differences are as follows:

[112]

In fig. 4 A in, the semiconductor package 2 c can include a plurality of support element 29, formed in the 1st semiconductor device 20 with the 2nd semiconductor device 25 between. In other words, the semiconductor package 2 c of the preparation method may include forming a plurality of supporting elements 29 for the 1st semiconductor device 20 with the 2nd semiconductor device 25 between.

[113]

Of the support element 29 can be used for supporting the 2nd semiconductor device 25 in order to protect the semiconductor element 22 from the damage of the semiconductor package 2 c of the reliability of the structure, can also be to the semiconductor element 22 producing the heat radiating effect, can also be used for electrically grounding to prevent electromagnetic interference (EMI) or electrostatic discharge (ESD).

[114]

In addition, Figure 4 A support element 29 also can be formed on the article 2 E of the plan 1st semiconductor device 20 with the 2nd semiconductor device 25 between.

[115]

Figure 4B is the semiconductor package 2 d with the plans of this invention semiconductor package 2 d of the top view of the 4th embodiment schematic view, Figure 4 B 4 A semiconductor package 2 c is roughly the same, the main differences are as follows:

[116]

In fig. 4 B in, the semiconductor package 2 d can include at least one electronic component 30, which is formed the 1st semiconductor device 20 or the 2nd semiconductor device 25 on the inside or on the surface, the surface can be for the top surface of the 1st 20 a, the bottom surface of the 1st 20 b, the top surface of the 2nd 25 a or the bottom surface of the 2nd 25 b. In other words, the semiconductor package 2 d of the method may include forming at least one electronic component 30 for the 1st semiconductor device 20 or the 2nd semiconductor device 25 on the inside.

[117]

In addition, Figure 4 B electronic element 30 also can be formed on the Figure 2 E and Figure 3 E 1st of the semiconductor device 20 or 2nd semiconductor device 25 on the inside or on the surface.

[118]

Figure 5 A to Figure 5D is the schematic view of the present invention are respectively various embodiments the conduction of the ball 21 a to turn on ball 21 d.

[119]

As shown in Figure 5 A shown, the conducting ball 21 a can be a double-layer sphere, and has inner ball 213 and the covering the inner layer of the body of the 213 of the outer layer 215.

[120]

As shown in Figure 5 B shown, the conducting ball 21 b can be a three-layer sphere, and has inner ball 213 is coated with the inner layer of the ball body in order 213 of the intermediate layer 214 and the outer layer 215. The inner layer of the ball 213, the intermediate layer 214 and the outer layer 215 can be respectively for the material of the plastic, metal (other than tin) and tin, the inner layer of the body of the 213 as the plastic material can reduce the conducting ball 21 b of the cost.

[121]

As shown in Figure 5 C shown, the conducting ball 21 c can has a circular column 216 with the coating and the cylinder 216 of outer layer 215.

[122]

As shown in Figure 5 D shown, the conducting ball 21 d can have two cylinder 216 and the covering the two cylinder 216 of outer layer 215.

[123]

The above-mentioned Figure 5 A to Figure 5 D and the inner sphere 213 or cylinder 216 can make this turn on the ball 21 a to the conducting ball 21 d with strengthening structure or avoid the outer layer 215 of collapse situation, but the outer layer 215 may be formed in the molten state in order to engage the conductive column 26.

[124]

Figure 6 A to Figure 6C is the schematic view of the present invention are respectively various embodiments of conductive column 26 a to the conductive column 26 c.

[125]

As shown in Figure 6 A three-dimensional view with of the following form shown, because of the conductive column 26 a is required to have a certain height H (or length) can reach fine pitch (fine pitch), the conductive column 26 a of the width (or diameter), the shape and the material under such conditions are not changed, when the conductive column 26 a H are the height of 100 microns (µm) and 500 microns, its corresponding torque M are 100 F and 500 F, wherein the moment of the M unit is Newton (Nm) · m, F is acting force and its unit is Newton (N), said the conductive column 26 a for the 500 micron moment M equal to 100 micron moment of M 5 times (500 F ÷ 100 F=5), this will lead to the conductive column 26 a for 500 microns when the problem of easy to break.

[126]

The height (H)	100	200	300	400	500
Torque (M)	100 F	200 F	300 F	400 F	500 F

[127]

Therefore, the experimental results by a plurality of times, the conductive column 26 a better height (or length) is less than 300 microns, can be such that the conductive column 26 a has a relatively fine pitch and to avoid rupture situation.

[128]

In fig. 6 A in, the conductive column 26 a can be cylinders and the height H can be greater than the diameter R of the half. But in other embodiments, the conductive column 26 a also elliptical cylinder, a polygonal cylinder or spherical cylinder and the like.

[129]

As shown in Figure 6 B shown in the upper view, the conductive column 26 b elliptical cylinder and its long axis length L can be greater than the length of the minor axis of the S 1.1 times.

[130]

As shown in Figure 6 C of shown in cutaway view, the conductive column 26 c can be at least two sphere (such as two or three ball) constituting or piled into the spherical cylinder.

[131]

[132]

[133]

The above embodiment is used for the description of the execution example the principles of the invention and their efficacy, but not for limiting of the present invention. Any technical personnel in the field are not contrary to the spirit of this invention and the context, to modify the above-mentioned examples. Therefore the invention of the scope of the rights protection, should be as listed in the claims.

[134]

A semiconductor package is provided, which includes: a first semiconductor device having a first top surface and a first bottom surface opposite to the first top surface; a plurality of conductive balls formed on the first top surface of the first semiconductor device; a second semiconductor device having a second top surface and a second bottom surface opposite to the second top surface; and a plurality of conductive posts formed on the second bottom surface of the second semiconductor device and correspondingly bonded to the conductive balls for electrically connecting the first semiconductor device and the second semiconductor device, wherein the conductive posts have a height less than 300 um. Therefore, the present invention can easily control the height of the semiconductor package and is applicable to semiconductor packages having fine-pitch conductive balls.

1. A semiconductor package, comprising:

1st semiconductor device, with the surface of the top surface and the bottom surface of the 1st 1st;

A plurality of turn on the ball, and it is formed on the top surface of the 1st 1st of the semiconductor device;

The semiconductor element, which is arranged on the top surface of the 1st 1st of the semiconductor device;

2nd semiconductor device, with the surface of the bottom surface of the top surface of the 2nd and 2nd, and the 2nd 1st is facing the bottom surface of the top surface of the 1st of the semiconductor device;

A plurality of conductive columns, and it is formed on the bottom surface of the semiconductor device of the 2nd 2nd, and respectively engaging the some on the ball in order to electrically connecting the semiconductor device and the 1st 2nd semiconductor device, wherein the conductive column height is smaller than 300 microns;

The protective layer, and it is formed on the semiconductor element and the 2nd the gap between the semiconductor device, and as a protection, for radiating or electrical ground; and

A plurality of supporting elements, and it is formed on the semiconductor device and the 1st 2nd between semiconductor device, and as a support, for the purpose of radiation or electrical ground, wherein of the support element and are bonded respectively of these conducting ball and the some conductive column are formed from the semiconductor device and the 1st 2nd between semiconductor device.

2. The semiconductor package according to Claim 1, is characterized in that, the semiconductor device or the 1st 2nd the semiconductor device substrate, intermediary board, a semiconductor wafer or semiconductor package structure.

3. The semiconductor package according to Claim 1, is characterized in that, the 2nd 1st semiconductor device or the semiconductor device is a semiconductor wafer.

4. The semiconductor package according to Claim 1, is characterized in that, the conducting ball is the single-layer sphere, double-layer sphere or three-layer sphere, the double-layer sphere has inner ball with the coating of the inner layer of the outer layer of the ball, the inner layer of the three-layer sphere with the sphere and the sphere of the inner layer of the coating in order of the intermediate layer and the outer layer.

5. The semiconductor package according to Claim 1, is characterized in that, the conducting ball has at least one cylinder with the coating of the cylinder and the outer layer.

6. The semiconductor package according to Claim 1, is characterized in that, the conducting ball by different proportion of tin-lead material, tin-silver material or formed by the tin-silver-copper material.

7. The semiconductor package according to Claim 1, is characterized in that, the conductive column is a cylinder, an elliptical cylinder, a polygonal cylinder or spherical cylinder.

8. The semiconductor package according to Claim 1, is characterized in that, the conductive column is a cylinder and one half of the height greater than its diameter.

9. The semiconductor package according to Claim 1, is characterized in that, the conductive column is elliptic cylinder and its long axis is greater than the length of the minor axis of 1.1 times.

10. The semiconductor package according to Claim 1, is characterized in that, the semiconductor package further includes a package colloid, and it is formed on the top surface of the 1st 1st of the semiconductor device with the 2nd 2nd between the bottom surface of the semiconductor device, in order to coat these conducting ball and some of the conducting pin.

11. The semiconductor package according to Claim 1, is characterized in that, the semiconductor element is embedded in the buried in the package colloid.

12. The semiconductor package according to Claim 1, is characterized in that, the semiconductor package also includes at least one electronic component, and it is formed on the semiconductor device or the 2nd 1st of the semiconductor device on the inside or on the surface.

13. A semiconductor package, comprising:

1st semiconductor device, having a top surface and the bottom surface of the 1st 1st;

A plurality of turn on the ball, and it is formed on the top surface of the 1st 1st of the semiconductor device;

The semiconductor element, which is arranged on the top surface of the 1st 1st of the semiconductor device;

2nd semiconductor device, with the surface of the bottom surface of the top surface of the 2nd and 2nd, and the 2nd bottom surface to the top surface of the 1st 1st of the semiconductor device;

The protective layer, and it is formed on the semiconductor element and the 2nd the gap between the semiconductor device, and as a protection, for radiating or electrical ground; and

14. A semiconductor package, comprising:

1st semiconductor device, having a top surface and the bottom surface of the 1st 1st;

A plurality of turn on the ball, and it is formed on the top surface of the 1st 1st of the semiconductor device;

The semiconductor element, which is arranged on the top surface of the 1st 1st of the semiconductor device;

The protective layer, and it is formed on the semiconductor element and the 2nd the gap between the semiconductor device, and as a protection, for radiating or electrical ground; and

15. The semiconductor package according to Claim 13 or 14, is characterized in that, the conducting ball is the single-layer sphere, double-layer sphere or three-layer sphere, the double-layer sphere has inner ball with the coating of the inner layer of the outer layer of the ball, the inner layer of the three-layer sphere with the sphere and the sphere of the inner layer of the coating in order of the intermediate layer and the outer layer.

16. The semiconductor package according to Claim 13 or 14, is characterized in that, the conducting ball has at least one cylinder with the coating of the cylinder and the outer layer.

17. The semiconductor package according to Claim 13 or 14, is characterized in that, the semiconductor element is embedded in the buried in the package colloid.

18. Method for making a semiconductor package, comprising:

Providing has relative 1st 1st 1st top surface and the bottom surface of the semiconductor device, and has a relatively of the top surface of the 2nd 2nd 2nd with the bottom surface of the semiconductor device, the semiconductor device of the top surface of the 1st 1st is formed with a plurality of conducting ball, the 1st 1st of the top surface of the semiconductor device provided with a semiconductor element, and the 2nd 2nd of the bottom surface of the semiconductor device is formed with a plurality of conductive columns, wherein the conductive column height is smaller than 300 microns;

The 1st semiconductor device on some on the ball are respectively corresponding to the semiconductor device on the 2nd these conducting pin, in order to some on the ball are respectively engaged with the some conductive column electrically connected to the semiconductor device and the 1st 2nd semiconductor device;

Forming a protection layer on the semiconductor element and the 2nd the gap between the semiconductor device, the protective layer as a protection, for radiating or electrical ground; and

Forming a plurality of supporting elements for the semiconductor device with the 1st 2nd between semiconductor device, of the support element as the support, the heat dissipation or electrically grounding for the purpose, wherein of the support element and are bonded respectively of these conducting ball and the some conductive column are formed from the semiconductor device and the 1st 2nd between semiconductor device.

19. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the conducting ball is the single-layer sphere, double-layer sphere or three-layer sphere, the double-layer sphere has inner ball with the coating of the inner layer of the outer layer of the ball, the inner layer of the three-layer sphere with the sphere and the sphere of the inner layer of the coating in order of the intermediate layer and the outer layer.

20. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the conducting ball has at least one cylinder with the coating of the cylinder and the outer layer.

21. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the conductive column is a cylinder, and the cylinder is larger than one half of the height of the diameter.

22. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the conductive column is an elliptical cylinder, and the long axis of the elliptical cylinder length greater than the length of the minor axis of 1.1 times.

23. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the method also includes forming the package colloid for the 1st of the semiconductor device with the top surface of the 1st 2nd 2nd between the bottom surface of the semiconductor device, in order to coat these conducting ball and some of the conducting pin.

24. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the semiconductor element is embedded in the buried in the package colloid.

25. Manufacturing method of the semiconductor package according to Claim 18, which is characterized in that, the method also includes forming at least one electronic component for the 1st 2nd semiconductor device or the semiconductor device on the inside or on the surface.

CPC - классификация

H H0 H01 H01L H01L2 H01L22 H01L222 H01L2224 H01L2224/H01L2224/0 H01L2224/04 H01L2224/040 H01L2224/0401 H01L2224/05 H01L2224/050 H01L2224/0501 H01L2224/05015 H01L2224/05016 H01L2224/0507 H01L2224/05078 H01L2224/051 H01L2224/0519 H01L2224/055 H01L2224/0556 H01L2224/05561 H01L2224/0558 H01L2224/05582 H01L2224/056 H01L2224/0561 H01L2224/05611 H01L2224/06 H01L2224/061 H01L2224/0613 H01L2224/06132 H01L2224/0618 H01L2224/06181 H01L2224/1 H01L2224/11 H01L2224/118 H01L2224/1182 H01L2224/11825 H01L2224/12 H01L2224/121 H01L2224/1210 H01L2224/12105 H01L2224/13 H01L2224/130 H01L2224/1301 H01L2224/13014 H01L2224/13017 H01L2224/1302 H01L2224/13023 H01L2224/1307 H01L2224/13078 H01L2224/1308 H01L2224/13082 H01L2224/13083 H01L2224/131 H01L2224/1311 H01L2224/13111 H01L2224/1314 H01L2224/13144 H01L2224/13147 H01L2224/1319 H01L2224/135 H01L2224/1358 H01L2224/13582 H01L2224/136 H01L2224/1367 H01L2224/13671 H01L2224/1369 H01L2224/14 H01L2224/140 H01L2224/1401 H01L2224/141 H01L2224/16 H01L2224/161 H01L2224/1614 H01L2224/16145 H01L2224/16147 H01L2224/162 H01L2224/1622 H01L2224/16227 H01L2224/1623 H01L2224/16237 H01L2224/17 H01L2224/170 H01L2224/1703 H01L2224/1705 H01L2224/17051 H01L2224/171 H01L2224/1718 H01L2224/17181 H01L2224/175 H01L2224/1751 H01L2224/17517 H01L2224/17519 H01L2224/2 H01L2224/29 H01L2224/291 H01L2224/292 H01L2224/2929 H01L2224/293 H01L2224/3 H01L2224/32 H01L2224/321 H01L2224/3214 H01L2224/32145 H01L2224/322 H01L2224/3222 H01L2224/32225 H01L2224/7 H01L2224/73 H01L2224/732 H01L2224/7320 H01L2224/73204 H01L2224/7325 H01L2224/73253 H01L2224/8 H01L2224/81 H01L2224/811 H01L2224/8119 H01L2224/81191 H01L2224/81192 H01L2224/81193 H01L2224/818 H01L2224/8181 H01L2224/81815 H01L2224/83 H01L2224/831 H01L2224/8310 H01L2224/83101 H01L2224/838 H01L2224/8380 H01L2224/83801 H01L2224/8385 H01L2225 H01L2225/H01L2225/0 H01L2225/06 H01L2225/065 H01L2225/0651 H01L2225/06513 H01L2225/0654 H01L2225/06548 H01L2225/0656 H01L2225/06568 H01L2225/1 H01L2225/10 H01L2225/102 H01L2225/1023 H01L2225/105 H01L2225/1058 H01L2225/108 H01L2225/1082 H01L23 H01L23/H01L23/3 H01L23/31 H01L23/312 H01L23/3128 H01L23/315 H01L23/3157 H01L23/4 H01L23/42 H01L23/49 H01L23/498 H01L23/4981 H01L23/49816 H01L23/4983 H01L23/49833 H01L23/5 H01L23/56 H01L23/562 H01L23/564 H01L24 H01L24/H01L24/0 H01L24/05 H01L24/06 H01L24/1 H01L24/11 H01L24/13 H01L24/14 H01L24/16 H01L24/17 H01L24/2 H01L24/29 H01L24/3 H01L24/32 H01L24/8 H01L24/81 H01L24/83 H01L25 H01L25/H01L25/0 H01L25/06 H01L25/065 H01L25/0657 H01L25/1 H01L25/10 H01L25/105 H01L25/16 H01L25/162 H01L25/5 H01L25/50 H01L29 H01L292 H01L2924 H01L2924/H01L2924/0 H01L2924/06 H01L2924/063 H01L2924/0635 H01L2924/1 H01L2924/15 H01L2924/153 H01L2924/1531 H01L2924/15311 H01L2924/1532 H01L2924/15321 H01L2924/1533 H01L2924/15331 H01L2924/18 H01L2924/181 H01L2924/1816 H01L2924/18161 H01L2924/3 H01L2924/38 H01L2924/381 H01L2924/384 H01L2924/3841

IPC - классификация

H H0 H01 H01L H01L2 H01L21 H01L21/H01L21/6 H01L21/60 H01L23 H01L23/H01L23/4 H01L23/48 H01L23/488

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